diff --git a/Info.md b/Info.md index 5fb3849..1bb043a 100644 --- a/Info.md +++ b/Info.md @@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING). # Details -Last updated on Mon 10 Feb 2020 08:23:32 PM UTC (2020-02-10T20:23:32+00:00). +Last updated on Thu 20 Feb 2020 05:46:09 PM UTC (2020-02-20T17:46:09+00:00). -Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [d7ff3f25](https://github.com/SymbiFlow/prjxray/commit/d7ff3f25c61d5421cea9ec465885d40f8f15d5f0). +Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [84b1457b](https://github.com/SymbiFlow/prjxray/commit/84b1457b885861fee221c5c6255d41cfb962ffc0). Latest commit was; ``` -commit d7ff3f25c61d5421cea9ec465885d40f8f15d5f0 -Merge: d40738bd 764a251e -Author: Tim Ansell -Date: Mon Jan 27 08:11:50 2020 -0800 +commit 84b1457b885861fee221c5c6255d41cfb962ffc0 +Merge: 66916fb7 44593414 +Author: litghost <537074+litghost@users.noreply.github.com> +Date: Wed Feb 19 16:31:44 2020 -0800 - Merge pull request #1207 from SymbiFlow/dependabot/submodules/third_party/googletest-10b1902 + Merge pull request #1238 from litghost/remap_some_timing - build(deps): bump third_party/googletest from `78fdd6c` to `10b1902` + Remap some timing ``` @@ -59,7 +59,7 @@ Date: Mon Jan 27 08:11:50 2020 -0800 ### Settings -Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/d7ff3f25c61d5421cea9ec465885d40f8f15d5f0/settings/artix7.sh) +Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/84b1457b885861fee221c5c6255d41cfb962ffc0/settings/artix7.sh) ```shell export XRAY_DATABASE="artix7" export XRAY_PART="xc7a50tfgg484-1" @@ -98,28 +98,30 @@ source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh Results have checksums; + * [`b28e7c9dfa775b9840497627a4222312957f5191b14a01574f0ef387cab457a2 ./artix7/.tile_type_CFG_CENTER_TOP.json.swp`](./artix7/.tile_type_CFG_CENTER_TOP.json.swp) + * [`64154eef5b68fc34438a56a86ad5ca4d5a16b188806f4d15b28512f56b56abad ./artix7/.tile_type_CLBLL_L.json.swp`](./artix7/.tile_type_CLBLL_L.json.swp) * [`80e59350a189f9a4fca689bef5758ccafa8a2b4be002574f0027cea426ff3c10 ./artix7/element_counts.csv`](./artix7/element_counts.csv) * [`b5a8a5e4aa788f9a8b17a0b0879814d9e8f38f6cbb65740fb537935fb028296a ./artix7/gridinfo/grid-xc7a50tfgg484-1-db.txt`](./artix7/gridinfo/grid-xc7a50tfgg484-1-db.txt) * [`2b18b3806f0e58024469eac1fe11749d04c6b035d2c2eafa7d2f30bf57173fa9 ./artix7/harness/README.md`](./artix7/harness/README.md) * [`560f255b569fd4798989f45104d4a511b51380418d4ca6fc53201141b36b20aa ./artix7/harness/arty-a7/pmod/design.bit`](./artix7/harness/arty-a7/pmod/design.bit) * [`1d8a121c3aa3bca7893429cfb08a8748206134271432daa52cdc9d3f5593bda0 ./artix7/harness/arty-a7/pmod/design.dcp`](./artix7/harness/arty-a7/pmod/design.dcp) - * [`461a864546805fd2967e9d1a9c90d757ffdd00b75e0b108b911c92a6e641ce9d ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json) + * [`55f2d747a74e2cdbf2043be9641e427f9a06d2438160d54e2b16f05d52f165d3 ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json) * [`fb90ad5fe10750f33d5802e1409ebc2406f7b0adab4bf6ef12b53c0e100b43ea ./artix7/harness/arty-a7/pmod/design.txt`](./artix7/harness/arty-a7/pmod/design.txt) * [`931c1598b75005a8a8e5b2225cc7454c2c7be451cb907bc4c047cb04db99772d ./artix7/harness/arty-a7/swbut/design.bit`](./artix7/harness/arty-a7/swbut/design.bit) * [`5d06132c788097344a9bca7040a08dd0e1632e177ed8def1d7445132020cc768 ./artix7/harness/arty-a7/swbut/design.dcp`](./artix7/harness/arty-a7/swbut/design.dcp) - * [`0bfc7be00730a6d1f6256f1953acd49ba70ee333959f130a8d7c63c206e62364 ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json) + * [`343ad995ee7b220ae74271a0aaec83219c1c9562f206d8054c1689b02a0ba24e ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json) * [`884af447661ff1cb653cd8280602c2348435366b35bf2627e2221af34899d191 ./artix7/harness/arty-a7/swbut/design.txt`](./artix7/harness/arty-a7/swbut/design.txt) * [`128e73ee026cf2238a35c7e993b845e3551919c90fc77b277635bc5098d59741 ./artix7/harness/arty-a7/uart/design.bit`](./artix7/harness/arty-a7/uart/design.bit) * [`955daed70c5728c13865eddc9bd7001d93183a50c560559a7b6628aa85b1fbbe ./artix7/harness/arty-a7/uart/design.dcp`](./artix7/harness/arty-a7/uart/design.dcp) - * [`60569d21bfec904003b27ad67ca05f5549eed64fcf8dd52c7612d721949cad4b ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json) + * [`f407998f6a7a7def35b271b71f6736f495f80512c9f49ec1ca5ebe2544108b39 ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json) * [`0583aa7502ee7a0303510c524f5500d8e1b9598aa26016d3d0e4e9623bf8ab8d ./artix7/harness/arty-a7/uart/design.txt`](./artix7/harness/arty-a7/uart/design.txt) * [`d3109010f8fced3be08e720741a157d08b7042359e84d04bbe677f50cbf10a04 ./artix7/harness/basys3/swbut/design.bit`](./artix7/harness/basys3/swbut/design.bit) * [`abedfa7f2ee5a4dbc51b582ebae62dd20489f745a4a239e49b18ba3e02be019f ./artix7/harness/basys3/swbut/design.dcp`](./artix7/harness/basys3/swbut/design.dcp) - * [`9ce9ee53a4ce81ef252cebdd5543a9887d96e1b6b19c900f1f736dd17134afc5 ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json) + * [`5d08d9434fd6a8340dfe354613455554c037f6c886a35f6cc98055ff955613c1 ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json) * [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689 ./artix7/harness/basys3/swbut/design.txt`](./artix7/harness/basys3/swbut/design.txt) * [`3ad62b024991225f1565e84159f2eb59d08e9fc6cf2577ea1698952b5dc0e4ec ./artix7/harness/basys3/swbut_50/design.bit`](./artix7/harness/basys3/swbut_50/design.bit) * [`773fe43b4974ab353bde87e544abb6b541cdcb280de40df76afa96f7fa23db46 ./artix7/harness/basys3/swbut_50/design.dcp`](./artix7/harness/basys3/swbut_50/design.dcp) - * [`9ce9ee53a4ce81ef252cebdd5543a9887d96e1b6b19c900f1f736dd17134afc5 ./artix7/harness/basys3/swbut_50/design.json`](./artix7/harness/basys3/swbut_50/design.json) + * [`5d08d9434fd6a8340dfe354613455554c037f6c886a35f6cc98055ff955613c1 ./artix7/harness/basys3/swbut_50/design.json`](./artix7/harness/basys3/swbut_50/design.json) * [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689 ./artix7/harness/basys3/swbut_50/design.txt`](./artix7/harness/basys3/swbut_50/design.txt) * [`fca753747fb1d583483e22980c4dae3a2de6451a326d46eab3581ea6f50f5b2d ./artix7/mask_bram_l.block_ram.db`](./artix7/mask_bram_l.block_ram.db) * [`30b4cfe8b60ccde4423a0bd0d7ad5242bea58d54abf5d15601dd3f390465e821 ./artix7/mask_bram_l.db`](./artix7/mask_bram_l.db) @@ -153,13 +155,13 @@ Results have checksums; * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_liob33.db`](./artix7/mask_liob33.db) - * [`fd3454a45c2e5b6ed2dbbf56ca91b635b5b3742195b50ccabd275f5ff0137693 ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db) - * [`fd3454a45c2e5b6ed2dbbf56ca91b635b5b3742195b50ccabd275f5ff0137693 ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db) - * [`fd3454a45c2e5b6ed2dbbf56ca91b635b5b3742195b50ccabd275f5ff0137693 ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db) + * [`e0a10ea8df6bf4eb7e33ee62c9bf0e2185175d6304a51c49a5a7cf1636304049 ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db) + * [`e0a10ea8df6bf4eb7e33ee62c9bf0e2185175d6304a51c49a5a7cf1636304049 ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db) + * [`e0a10ea8df6bf4eb7e33ee62c9bf0e2185175d6304a51c49a5a7cf1636304049 ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./artix7/mask_riob33.db`](./artix7/mask_riob33.db) - * [`fd3454a45c2e5b6ed2dbbf56ca91b635b5b3742195b50ccabd275f5ff0137693 ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db) - * [`fd3454a45c2e5b6ed2dbbf56ca91b635b5b3742195b50ccabd275f5ff0137693 ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db) - * [`fd3454a45c2e5b6ed2dbbf56ca91b635b5b3742195b50ccabd275f5ff0137693 ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db) + * [`e0a10ea8df6bf4eb7e33ee62c9bf0e2185175d6304a51c49a5a7cf1636304049 ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db) + * [`e0a10ea8df6bf4eb7e33ee62c9bf0e2185175d6304a51c49a5a7cf1636304049 ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db) + * [`e0a10ea8df6bf4eb7e33ee62c9bf0e2185175d6304a51c49a5a7cf1636304049 ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db) @@ -262,19 +264,19 @@ Results have checksums; * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db) - * [`8a3dc47b0c02904bd3eee1ac5b9737a9cd6bd25b64db996e379994c7f276b2e2 ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db) + * [`9e15defb9392796094d4f162cfb0a25b32baabd4b90dbe16c2c6aaad00fb5d32 ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db) - * [`64610f610f562aff48627e6377a109b1e5d3269ecb57ef59dadba749bf3ade4d ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db) - * [`92913f6d38cfdb14fb9c16e70a47d75e507c0ee4764bcc7941f2e0ac3e784e88 ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db) - * [`3a578126f675c44d882902f68c2f837c1d83011c6a069199289a586aad166cc2 ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db) + * [`863ac2cfc70c34186a7809a493c551076ef9358e9090b6da1ca2b2a80130ad39 ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db) + * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db) + * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49 ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db) * [`cf4f6a2b44d13e094f588464a902c315080d2150a522e4241c82ca201a4771e0 ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db) * [`de8c6b666e22b9004c531b2ac6d586b056c5f3935cb710bc434656f8a29a66e8 ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db) * [`5835e20544b2364f798c3e00c1e26badde89982052e601b1999242a4975de44f ./artix7/segbits_lioi3_tbytesrc.db`](./artix7/segbits_lioi3_tbytesrc.db) * [`07eae2a33315997fb8cfc1780c4b492a80b4931f71ef87d187ac4b68203fdcf6 ./artix7/segbits_lioi3_tbytesrc.origin_info.db`](./artix7/segbits_lioi3_tbytesrc.origin_info.db) * [`859993e9655344aa30940e91a26bbba8459d2eb948803d15331a430c93970200 ./artix7/segbits_lioi3_tbyteterm.db`](./artix7/segbits_lioi3_tbyteterm.db) * [`1d06fcaa0cce4e3c88c8b819663df448de2a1c1b4d104ba67de04a461f2a5d23 ./artix7/segbits_lioi3_tbyteterm.origin_info.db`](./artix7/segbits_lioi3_tbyteterm.origin_info.db) - * [`ef96b302cc5e6c55a4d7429ac6e1246f4c09d9c56715e0a15fabc39f2b073b38 ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db) - * [`c0c0e854bb692faa299ede30a5b73f510c28abfb479641d51661fe3abdeb060d ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db) + * [`39042dad94143ea5c97eafd34c7c0a72039bc5cf3e70c20dad60de2402ace923 ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db) + * [`f7b69a660831ad69cf119bc91dc15acc6e862b822e3821149285a9b0da9539e7 ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db) * [`ef0db5acddcfe0181445a4045755fa5d8df9daa424b38faca8ac2b6e9cf0fbf8 ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db) * [`65821f052354f0b447607c4644cbabc9f6b4f0f567257bcaa71a2c1b622d8092 ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db) * [`71a57e394185b811eedb26f2553b285350858ca2e3a0b8690ed2ec47137e47a2 ./artix7/segbits_rioi3_tbytesrc.db`](./artix7/segbits_rioi3_tbytesrc.db) @@ -338,30 +340,30 @@ Results have checksums; * [`45670d393b2985d49504d4fd7df6ee9e7bdbd50c4836324e23102c28d670ee82 ./artix7/tile_type_BRKH_DSP_L.json`](./artix7/tile_type_BRKH_DSP_L.json) * [`a465e47514fca696f0b8fa1c3d965d777f406ea45bb2973dfb356839fb3141eb ./artix7/tile_type_BRKH_DSP_R.json`](./artix7/tile_type_BRKH_DSP_R.json) * [`d0368330d5b3fc313adaa13ee71bfd8488fd8278d19a0b8bc822ac555b314e2e ./artix7/tile_type_BRKH_GTX.json`](./artix7/tile_type_BRKH_GTX.json) - * [`9392827b3b140e74227e0118963d1038a034bb7352335d9c66b222a2ac905997 ./artix7/tile_type_BRKH_INT.json`](./artix7/tile_type_BRKH_INT.json) + * [`57fc91c74f6f8ba896d82cfca1da01ce12e0d4d292b1e7e6e84e94ae5411995f ./artix7/tile_type_BRKH_INT.json`](./artix7/tile_type_BRKH_INT.json) * [`d7f3fa9b1bc6af5675c03d5143aca4e4e63c0677d5b2185f4ed931002c5c1820 ./artix7/tile_type_BRKH_TERM_INT.json`](./artix7/tile_type_BRKH_TERM_INT.json) * [`2dc3ebf7d8642d39e4d1d5b8728638e7e2a9eafbe7cd5af2be056df507428a5a ./artix7/tile_type_B_TERM_INT.json`](./artix7/tile_type_B_TERM_INT.json) * [`a590a5010dda4e32502ea58cec633ed40d273ebc31919be3d6aff842463cfc2d ./artix7/tile_type_CFG_CENTER_BOT.json`](./artix7/tile_type_CFG_CENTER_BOT.json) - * [`f0aa8188fed968109674ecc950f0669987f32e6f8433d3bf5f2ee97df0f231a4 ./artix7/tile_type_CFG_CENTER_MID.json`](./artix7/tile_type_CFG_CENTER_MID.json) - * [`f0fb8428ba600e5f0e5f42b99da4122d2ce2625c65db0266e823e038f00feb0f ./artix7/tile_type_CFG_CENTER_TOP.json`](./artix7/tile_type_CFG_CENTER_TOP.json) - * [`2422048220d392e7417740d0580d96de1f5a34dd3536c32f703ec396ea1f8176 ./artix7/tile_type_CLBLL_L.json`](./artix7/tile_type_CLBLL_L.json) + * [`ac751dcb98ab6f2398892f845b38d0596653221f5f6ac473488445909649bcd7 ./artix7/tile_type_CFG_CENTER_MID.json`](./artix7/tile_type_CFG_CENTER_MID.json) + * [`8c9bb1ff7154b6e05d9f32a0bb22f7bc64030cbe5b0b67b15453c3a518766d42 ./artix7/tile_type_CFG_CENTER_TOP.json`](./artix7/tile_type_CFG_CENTER_TOP.json) + * [`861e0cbd81f80d235ce0c08187f933918f7fc5a142188671f7e32ad2134f6f53 ./artix7/tile_type_CLBLL_L.json`](./artix7/tile_type_CLBLL_L.json) * [`1768455327a64e81f38890eb6f596283592b4adbe40fa09a137040ecff532994 ./artix7/tile_type_CLBLL_R.json`](./artix7/tile_type_CLBLL_R.json) - * [`ac6d87769f407489c01cb7f547413f57d675578b38492080606f6e949282b8e3 ./artix7/tile_type_CLBLM_L.json`](./artix7/tile_type_CLBLM_L.json) - * [`d4c579cb22d375d71b70b47fe94c1208cca1a0a57207dfdb06656ff5c5c5186d ./artix7/tile_type_CLBLM_R.json`](./artix7/tile_type_CLBLM_R.json) + * [`b0c7856660b4c11dd2fd20822c5d87150fae906a18ab95392998a13c6c803f46 ./artix7/tile_type_CLBLM_L.json`](./artix7/tile_type_CLBLM_L.json) + * [`f8846ab9c1e9163ce4bc68b15526c45c3674c1e35e0a5f30e3dfc10b43bce9da ./artix7/tile_type_CLBLM_R.json`](./artix7/tile_type_CLBLM_R.json) * [`197086df1d28707d9823ea8e21281820044f89cff5c3c59d04afa5ea667b9abd ./artix7/tile_type_CLK_BUFG_BOT_R.json`](./artix7/tile_type_CLK_BUFG_BOT_R.json) * [`ed51d2df5f2a390711a82ccce5115f740366652a8502774362f4e9829adc28f6 ./artix7/tile_type_CLK_BUFG_REBUF.json`](./artix7/tile_type_CLK_BUFG_REBUF.json) * [`cf9dd6b21757f5108229be0055999e3694b869e41b680dee9f69cde05ec9ee0f ./artix7/tile_type_CLK_BUFG_TOP_R.json`](./artix7/tile_type_CLK_BUFG_TOP_R.json) * [`7b9406332b7d802c5007cd2d9f557309d3cbf54cf3204677fd67cac3c418e330 ./artix7/tile_type_CLK_FEED.json`](./artix7/tile_type_CLK_FEED.json) - * [`15dbdc3aaec3433761b56b82e1f168ec9ceb4976565764dbf48ba6e71ea0595d ./artix7/tile_type_CLK_HROW_BOT_R.json`](./artix7/tile_type_CLK_HROW_BOT_R.json) - * [`957202161c2d329efebd02e17cc1a3a10b821af7e3a40f48a39b49cf48f309f3 ./artix7/tile_type_CLK_HROW_TOP_R.json`](./artix7/tile_type_CLK_HROW_TOP_R.json) + * [`441944cdae73c1d861ddee278f751a6ca372a75efb81802abd26b8db8087c445 ./artix7/tile_type_CLK_HROW_BOT_R.json`](./artix7/tile_type_CLK_HROW_BOT_R.json) + * [`68bf3ad19a1fb0771de906a3c9e6345f2b2228d6c389db9c0e9e007c124c746b ./artix7/tile_type_CLK_HROW_TOP_R.json`](./artix7/tile_type_CLK_HROW_TOP_R.json) * [`b595847032aea0b815abb56656fea5a4005cb7187eeb4623d1b08338b3029434 ./artix7/tile_type_CLK_MTBF2.json`](./artix7/tile_type_CLK_MTBF2.json) * [`fd40b96630265c911b0eb7e15bc287280e4fd07da9c81b58beebbcbe0d7681f5 ./artix7/tile_type_CLK_PMV.json`](./artix7/tile_type_CLK_PMV.json) * [`abeb5e942b8752216729d24a776388169a4d298cf10a1c50b0547ddeee56a730 ./artix7/tile_type_CLK_PMV2.json`](./artix7/tile_type_CLK_PMV2.json) * [`deb089e1bc152a455180e327f4e6a284303b4e63ca8dba23dffb4f670af0351e ./artix7/tile_type_CLK_PMV2_SVT.json`](./artix7/tile_type_CLK_PMV2_SVT.json) * [`5ce27433cf79173f3e915564af8464d6186d65369e2a4e57d93057d430cbc90c ./artix7/tile_type_CLK_PMVIOB.json`](./artix7/tile_type_CLK_PMVIOB.json) * [`d2d9bf1e652904afca19deff2ff8d05b40fa8a160e911ada074b006e3a6272c0 ./artix7/tile_type_CLK_TERM.json`](./artix7/tile_type_CLK_TERM.json) - * [`654b44e56a6ff02f09631b6ce689fbb23cee7a3421c024187e5683501afc42a6 ./artix7/tile_type_CMT_FIFO_L.json`](./artix7/tile_type_CMT_FIFO_L.json) - * [`d8985cca30294cb701721ca86f11bc447efdedc7b98d6202e6f74fef891f56d9 ./artix7/tile_type_CMT_FIFO_R.json`](./artix7/tile_type_CMT_FIFO_R.json) + * [`9ce1599c972fd785195440773b7eb79fc2abb509b5dd072d63f7c4ece5498950 ./artix7/tile_type_CMT_FIFO_L.json`](./artix7/tile_type_CMT_FIFO_L.json) + * [`6b7cfa99fa6fa5d01081775674d464f8bdbf1dcd674cca4fc4a9d31d73ebf88f ./artix7/tile_type_CMT_FIFO_R.json`](./artix7/tile_type_CMT_FIFO_R.json) * [`4df9f94e58368d397b0c0c45f0e8baf0f375f0ed81cee4fba98f642fd24a8889 ./artix7/tile_type_CMT_PMV.json`](./artix7/tile_type_CMT_PMV.json) * [`f33bebe60367065f7a2551a4764b7c55267d616b04395e6d5bd61a628800da17 ./artix7/tile_type_CMT_PMV_L.json`](./artix7/tile_type_CMT_PMV_L.json) * [`0aa97796fdfbb18aaa03c2128c2762afdd1362dbd25dc971683ea165117f790d ./artix7/tile_type_CMT_TOP_L_LOWER_B.json`](./artix7/tile_type_CMT_TOP_L_LOWER_B.json) @@ -382,8 +384,8 @@ Results have checksums; * [`17539ba01ea6a00c8344f3b954feaeaf021c79b56b69dee8a3ebd64e843642c5 ./artix7/tile_type_GTP_INT_INTERFACE.json`](./artix7/tile_type_GTP_INT_INTERFACE.json) * [`8161e7e508536df01e2d58da947c228db0af1c8dd9af88c6919d2e3c3568790e ./artix7/tile_type_HCLK_BRAM.json`](./artix7/tile_type_HCLK_BRAM.json) * [`191a39fc956f7bb56e36f65a7fad57632f489052887a8569869c40b21af80d63 ./artix7/tile_type_HCLK_CLB.json`](./artix7/tile_type_HCLK_CLB.json) - * [`1cfb2da98cc16d8759dc816a2eea31bfa39d2b607b765b0a338e09eeb6a50ef2 ./artix7/tile_type_HCLK_CMT.json`](./artix7/tile_type_HCLK_CMT.json) - * [`852802f8a88ef919074024f83181172e8114bc4ffd929d4d98e4a488f0c9a427 ./artix7/tile_type_HCLK_CMT_L.json`](./artix7/tile_type_HCLK_CMT_L.json) + * [`ca4dc215eb05e20c613da253c2d13929f1ec43a31cd816cf0a6449e135d1e894 ./artix7/tile_type_HCLK_CMT.json`](./artix7/tile_type_HCLK_CMT.json) + * [`cb281635fc51452b7bbed0f2cec780c3915501ae7d9d6a0b92fa5934bd390123 ./artix7/tile_type_HCLK_CMT_L.json`](./artix7/tile_type_HCLK_CMT_L.json) * [`b9839b9c2b660625ac28e93f0817741bef6d0e1ed65a96431f461f2c89cc8fb0 ./artix7/tile_type_HCLK_DSP_L.json`](./artix7/tile_type_HCLK_DSP_L.json) * [`42fd5e8e2d9acb69c05171851ce6c1738ace0bb1294ab255230b0d5b0c38e03c ./artix7/tile_type_HCLK_DSP_R.json`](./artix7/tile_type_HCLK_DSP_R.json) * [`55c960eaada832f9c300ec932582b4aed11063abc2bd7f6894488ec563410883 ./artix7/tile_type_HCLK_FEEDTHRU_1.json`](./artix7/tile_type_HCLK_FEEDTHRU_1.json) @@ -405,8 +407,8 @@ Results have checksums; * [`c2a0b3273fa35c4f25ef13ddc211a1d6cf8b9655c2aefb5c78bdbeb53a60ed2c ./artix7/tile_type_INT_FEEDTHRU_2.json`](./artix7/tile_type_INT_FEEDTHRU_2.json) * [`1d485459ccb8b8deb194961c6b31193fccdadec2d8d7bfb2dc724107c5f111ec ./artix7/tile_type_INT_INTERFACE_L.json`](./artix7/tile_type_INT_INTERFACE_L.json) * [`20164cc8ec06d35a112a5262e196bf3a2832e84dc150d702084bff3ec24ec701 ./artix7/tile_type_INT_INTERFACE_R.json`](./artix7/tile_type_INT_INTERFACE_R.json) - * [`0a57da4a0ba1202bae547eda0f1c24c1539893ef621ad069597c9e8d3976a30d ./artix7/tile_type_INT_L.json`](./artix7/tile_type_INT_L.json) - * [`6c58cb2e57f1257ab7d1ba66589a3876882a4c1dbc19ebff067a22a2575db601 ./artix7/tile_type_INT_R.json`](./artix7/tile_type_INT_R.json) + * [`8a797a63bfa17434596b552857bdfe4f650124755169f5a41fbff493596bcbe4 ./artix7/tile_type_INT_L.json`](./artix7/tile_type_INT_L.json) + * [`de16784ca2b0f5b2198302b8427c6788dd0940164c0560d9aa0f74f198192045 ./artix7/tile_type_INT_R.json`](./artix7/tile_type_INT_R.json) * [`2895d4a043ce8b668ac49e7758248adc54bc1e10ce0b3caafef99445b9d4383e ./artix7/tile_type_IO_INT_INTERFACE_L.json`](./artix7/tile_type_IO_INT_INTERFACE_L.json) * [`8f9b875f1b4cb7750dd92cc496d75fc3294204b9b4cf6a4c73d5ca882f517908 ./artix7/tile_type_IO_INT_INTERFACE_R.json`](./artix7/tile_type_IO_INT_INTERFACE_R.json) * [`1601e8b364fbb7bd1ead4ac45680c1bc44ed6f5e564b6e834671c6415093d849 ./artix7/tile_type_LIOB33.json`](./artix7/tile_type_LIOB33.json) @@ -460,6 +462,8 @@ Results have checksums; * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf) * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf) * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf) + * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf) + * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569 ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf) * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf) @@ -471,7 +475,7 @@ Results have checksums; * [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863 ./artix7/timings/LIOB33.sdf`](./artix7/timings/LIOB33.sdf) * [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523 ./artix7/timings/LIOB33_SING.sdf`](./artix7/timings/LIOB33_SING.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./artix7/timings/LIOI3.sdf`](./artix7/timings/LIOI3.sdf) - * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./artix7/timings/LIOI3_SING.sdf`](./artix7/timings/LIOI3_SING.sdf) + * [`4cd6468585cb94150403030132d9ba73b414875a93a3f87b8e5a8d56a64ef43f ./artix7/timings/LIOI3_SING.sdf`](./artix7/timings/LIOI3_SING.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./artix7/timings/LIOI3_TBYTESRC.sdf`](./artix7/timings/LIOI3_TBYTESRC.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./artix7/timings/LIOI3_TBYTETERM.sdf`](./artix7/timings/LIOI3_TBYTETERM.sdf) * [`8adb21c5b19dc331cfeba427e65c1c15f33fbd7e43427acba206c109f5ce9985 ./artix7/timings/MONITOR_BOT.sdf`](./artix7/timings/MONITOR_BOT.sdf) @@ -496,6 +500,11 @@ Results have checksums; * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcsg324-1/part.yaml`](./artix7/xc7a35tcsg324-1/part.yaml) * [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b ./artix7/xc7a35tcsg324-1/tileconn.json`](./artix7/xc7a35tcsg324-1/tileconn.json) * [`a351c54eac49ef248efaf4148c8f93c2ddde16dabe5aee8184794f847c1da8ea ./artix7/xc7a35tcsg324-1/tilegrid.json`](./artix7/xc7a35tcsg324-1/tilegrid.json) + * [`48c715243411156182302fe04f461e6605d4f2008a4fb8fc40c7fa73948c2f2d ./artix7/xc7a35tftg256-1/package_pins.csv`](./artix7/xc7a35tftg256-1/package_pins.csv) + * [`56434a2445f9a972c7e8e10ec09955d4a273a81d00d67ee614af70acda4a8ea0 ./artix7/xc7a35tftg256-1/part.json`](./artix7/xc7a35tftg256-1/part.json) + * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tftg256-1/part.yaml`](./artix7/xc7a35tftg256-1/part.yaml) + * [`1604d48580815e26069c2b4909fcc50e8e8f974ad0beb349ced2329c302bb06b ./artix7/xc7a35tftg256-1/tileconn.json`](./artix7/xc7a35tftg256-1/tileconn.json) + * [`a351c54eac49ef248efaf4148c8f93c2ddde16dabe5aee8184794f847c1da8ea ./artix7/xc7a35tftg256-1/tilegrid.json`](./artix7/xc7a35tftg256-1/tilegrid.json) * [`1b01a06e9bae479981698cdb89fff971c825c75266b3b529cd69cd54815ce805 ./artix7/xc7a50tfgg484-1/package_pins.csv`](./artix7/xc7a50tfgg484-1/package_pins.csv) * [`6f58dc1e7f454bb28592ecfc9b343541283593d596dba555d0088d0bff9ca1ae ./artix7/xc7a50tfgg484-1/part.json`](./artix7/xc7a50tfgg484-1/part.json) * [`41c360b1e2f7e08b9051f1160a34954ce4c05a445a07f226f1f4059caf1fa1d3 ./artix7/xc7a50tfgg484-1/part.yaml`](./artix7/xc7a50tfgg484-1/part.yaml) @@ -507,7 +516,7 @@ Results have checksums; ### Settings -Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/d7ff3f25c61d5421cea9ec465885d40f8f15d5f0/settings/kintex7.sh) +Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/84b1457b885861fee221c5c6255d41cfb962ffc0/settings/kintex7.sh) ```shell export XRAY_DATABASE="kintex7" export XRAY_PART="xc7k70tfbg676-2" @@ -579,13 +588,13 @@ Results have checksums; * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./kintex7/mask_hclk_r.db`](./kintex7/mask_hclk_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/mask_hclk_r.origin_info.db`](./kintex7/mask_hclk_r.origin_info.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_liob33.db`](./kintex7/mask_liob33.db) - * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db) - * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db) - * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db) + * [`6e9da05ca974c1e8d4ce81fd53ec4658fc225ac9b83e3f4888b1246d757fc33e ./kintex7/mask_lioi3.db`](./kintex7/mask_lioi3.db) + * [`6e9da05ca974c1e8d4ce81fd53ec4658fc225ac9b83e3f4888b1246d757fc33e ./kintex7/mask_lioi3_tbytesrc.db`](./kintex7/mask_lioi3_tbytesrc.db) + * [`6e9da05ca974c1e8d4ce81fd53ec4658fc225ac9b83e3f4888b1246d757fc33e ./kintex7/mask_lioi3_tbyteterm.db`](./kintex7/mask_lioi3_tbyteterm.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./kintex7/mask_riob33.db`](./kintex7/mask_riob33.db) - * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db) - * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db) - * [`7db4e012a058ddedde6f42fd3cf00105d56ae9695e6755b52c421bfc32e404a8 ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db) + * [`6e9da05ca974c1e8d4ce81fd53ec4658fc225ac9b83e3f4888b1246d757fc33e ./kintex7/mask_rioi3.db`](./kintex7/mask_rioi3.db) + * [`6e9da05ca974c1e8d4ce81fd53ec4658fc225ac9b83e3f4888b1246d757fc33e ./kintex7/mask_rioi3_tbytesrc.db`](./kintex7/mask_rioi3_tbytesrc.db) + * [`6e9da05ca974c1e8d4ce81fd53ec4658fc225ac9b83e3f4888b1246d757fc33e ./kintex7/mask_rioi3_tbyteterm.db`](./kintex7/mask_rioi3_tbyteterm.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./kintex7/ppips_bram_int_interface_l.db`](./kintex7/ppips_bram_int_interface_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./kintex7/ppips_bram_int_interface_l.origin_info.db`](./kintex7/ppips_bram_int_interface_l.origin_info.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./kintex7/ppips_bram_int_interface_r.db`](./kintex7/ppips_bram_int_interface_r.db) @@ -683,20 +692,20 @@ Results have checksums; * [`d51f086d6e887d5709d3c4e0bc00b8467fa6344de9a4c0f6de66aeba66e90287 ./kintex7/segbits_hclk_l.origin_info.db`](./kintex7/segbits_hclk_l.origin_info.db) * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db) - * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db) - * [`5fb487ee7df385332b336fae791f0936c7b537e70f5cc28e39abb0a74e0b7af2 ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db) + * [`892e56587b54d31f67f051cdb3590da4963667d055216cfa7ef273c7a7caa88d ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db) + * [`a95cce3b7e517700ff838a45a8c8016dacc5cabae8ed28386fa4f9277900fc7a ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db) - * [`6481d01ab889d6128b279be7e959975b69eaeb455afea1d2df5039c44bff7b22 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db) - * [`01cd7426da888ca40c5cc422a29fa9daf3d8de1901ed32ea118abd41def9d3da ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db) - * [`4b54ecc84ea68529786638d672099578b1fd11f47672cf8742701457e8ab15d8 ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db) + * [`3a386ac7ee8f809c76fe23c22d92a1f57539cb4f055651ea58bdae5f0542f7e1 ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db) + * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db) + * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49 ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db) * [`87adc9bb57b446e57722145e6461085763a5f0e690558e96c2581ea623b36071 ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db) * [`ac3c8c024a554c18f4378cc720f47319d102bb435be35a9cc1809fe5a678d842 ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db) * [`5ce44e654b750b72090c2f3f00fbacb5acc338f9647ffb061b336331f812b488 ./kintex7/segbits_lioi3_tbytesrc.db`](./kintex7/segbits_lioi3_tbytesrc.db) * [`9112812c7da07f5c5fffa01a773484bfe592af9021d871be0c0e5ba4901f69fd ./kintex7/segbits_lioi3_tbytesrc.origin_info.db`](./kintex7/segbits_lioi3_tbytesrc.origin_info.db) * [`23ee01e24c5831233c4213234eec53e5f0b55a291a8205e8954275d0da1363ae ./kintex7/segbits_lioi3_tbyteterm.db`](./kintex7/segbits_lioi3_tbyteterm.db) * [`ced0bcac7d938f4231fb2c6653e86e02932fb2994830d128892889fc3b63bef4 ./kintex7/segbits_lioi3_tbyteterm.origin_info.db`](./kintex7/segbits_lioi3_tbyteterm.origin_info.db) - * [`b6be0b91d37dd1299a16d0f132f156290b798b329280875e407a07d8c06a554f ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db) - * [`505a43562533122b2d5e70737212c44183706aaada60afc829ee79c3423b6730 ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db) + * [`39042dad94143ea5c97eafd34c7c0a72039bc5cf3e70c20dad60de2402ace923 ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db) + * [`f7b69a660831ad69cf119bc91dc15acc6e862b822e3821149285a9b0da9539e7 ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db) * [`4210f9eb79cffe057f850a853b49e3cf18f7378e7e9e081d4a05afa534be9bf2 ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db) * [`8e046515cca08233bc3c6e5642452f8cb1242d31b1ddf2cfd34d723f00500f01 ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db) * [`d4d3718a5759779146849fd66e663409d5a20b9ec045350933722292f67e6c4a ./kintex7/segbits_rioi3_tbytesrc.db`](./kintex7/segbits_rioi3_tbytesrc.db) @@ -767,30 +776,30 @@ Results have checksums; * [`45670d393b2985d49504d4fd7df6ee9e7bdbd50c4836324e23102c28d670ee82 ./kintex7/tile_type_BRKH_DSP_L.json`](./kintex7/tile_type_BRKH_DSP_L.json) * [`a465e47514fca696f0b8fa1c3d965d777f406ea45bb2973dfb356839fb3141eb ./kintex7/tile_type_BRKH_DSP_R.json`](./kintex7/tile_type_BRKH_DSP_R.json) * [`d0368330d5b3fc313adaa13ee71bfd8488fd8278d19a0b8bc822ac555b314e2e ./kintex7/tile_type_BRKH_GTX.json`](./kintex7/tile_type_BRKH_GTX.json) - * [`123abfc7c4ddc9069d9ab83399c29b29b75326e70b63defacb1edf93a7b915a3 ./kintex7/tile_type_BRKH_INT.json`](./kintex7/tile_type_BRKH_INT.json) + * [`bf67f49cc635e6b5e20c2b998081b53c60d8bc7a8e65ba6b753b30d1511ebbf3 ./kintex7/tile_type_BRKH_INT.json`](./kintex7/tile_type_BRKH_INT.json) * [`d7f3fa9b1bc6af5675c03d5143aca4e4e63c0677d5b2185f4ed931002c5c1820 ./kintex7/tile_type_BRKH_TERM_INT.json`](./kintex7/tile_type_BRKH_TERM_INT.json) * [`2dc3ebf7d8642d39e4d1d5b8728638e7e2a9eafbe7cd5af2be056df507428a5a ./kintex7/tile_type_B_TERM_INT.json`](./kintex7/tile_type_B_TERM_INT.json) * [`cb0ed0b57df7fe2e2324db148674ba7355bf5ffca6082fff2f45d34f0b9d7b74 ./kintex7/tile_type_CFG_CENTER_BOT.json`](./kintex7/tile_type_CFG_CENTER_BOT.json) - * [`52f7b09c8c366fc6cc1c0b9cb1ee68c65925b7c8138e2c24ee3ebb6ea9d24692 ./kintex7/tile_type_CFG_CENTER_MID.json`](./kintex7/tile_type_CFG_CENTER_MID.json) - * [`1504ff5de1346c86ed8660308d217bb2e2c4d767a4192840f93b346ff951f0e9 ./kintex7/tile_type_CFG_CENTER_TOP.json`](./kintex7/tile_type_CFG_CENTER_TOP.json) - * [`7ba828c5f6609242e7af16400b3c2388fd792c97bdb3fb3bdca461b700658701 ./kintex7/tile_type_CLBLL_L.json`](./kintex7/tile_type_CLBLL_L.json) + * [`afbf405f26603065eeedc154f02359bbfda224dbf05ad4e384669b36b3e71c88 ./kintex7/tile_type_CFG_CENTER_MID.json`](./kintex7/tile_type_CFG_CENTER_MID.json) + * [`1219934efb18bdb510ed7be0714179f73dca167200d3a17a8fce0deb2c80ed4e ./kintex7/tile_type_CFG_CENTER_TOP.json`](./kintex7/tile_type_CFG_CENTER_TOP.json) + * [`bbe8deb47c43eab181309a3e00f509d67132310c98e7b559c5f06608fbe495f5 ./kintex7/tile_type_CLBLL_L.json`](./kintex7/tile_type_CLBLL_L.json) * [`7e0897809297c5a1ccabd701f472a74af50d01d7b251b3d934d7cb5f82d4d663 ./kintex7/tile_type_CLBLL_R.json`](./kintex7/tile_type_CLBLL_R.json) - * [`5bce88aae4a38b057257b3f252b7b7bc47ceeb6895622ce7f35b0d082df06279 ./kintex7/tile_type_CLBLM_L.json`](./kintex7/tile_type_CLBLM_L.json) - * [`676e8347e5f2c001ad5bc6b918f27e932c2f4c5651477b6089ced3b8160b8f13 ./kintex7/tile_type_CLBLM_R.json`](./kintex7/tile_type_CLBLM_R.json) + * [`1097850e4c91165ab04d8b72deff769e10b01b177c0b324a8ced60adca8145b0 ./kintex7/tile_type_CLBLM_L.json`](./kintex7/tile_type_CLBLM_L.json) + * [`1a939cf4dc02447a8033125ddedb4ccc2dd4733908d7c46b4c4a045c09d43433 ./kintex7/tile_type_CLBLM_R.json`](./kintex7/tile_type_CLBLM_R.json) * [`08850f5e93cf95214e939d649538631640c17b3757af4975ff99d7334f06fa53 ./kintex7/tile_type_CLK_BUFG_BOT_R.json`](./kintex7/tile_type_CLK_BUFG_BOT_R.json) * [`ed51d2df5f2a390711a82ccce5115f740366652a8502774362f4e9829adc28f6 ./kintex7/tile_type_CLK_BUFG_REBUF.json`](./kintex7/tile_type_CLK_BUFG_REBUF.json) * [`9081821652697a4fc9547849a1ccbdb650b074d51b85c11941fb1dde0227fd1a ./kintex7/tile_type_CLK_BUFG_TOP_R.json`](./kintex7/tile_type_CLK_BUFG_TOP_R.json) * [`7b9406332b7d802c5007cd2d9f557309d3cbf54cf3204677fd67cac3c418e330 ./kintex7/tile_type_CLK_FEED.json`](./kintex7/tile_type_CLK_FEED.json) - * [`c2ab9f0ee4d5e88eb2fd6a58d5d9b0717c34d959dd44c272d59ebe351c919f69 ./kintex7/tile_type_CLK_HROW_BOT_R.json`](./kintex7/tile_type_CLK_HROW_BOT_R.json) - * [`28289d7e4b17da1907ca08813205f8b164a4a961d7dcf17415fd7ab77b6fdfae ./kintex7/tile_type_CLK_HROW_TOP_R.json`](./kintex7/tile_type_CLK_HROW_TOP_R.json) + * [`e8e43bb5e3699d6bc06b5cbe5b79b3e137899d69fe251bafd5bb93f8ede1770a ./kintex7/tile_type_CLK_HROW_BOT_R.json`](./kintex7/tile_type_CLK_HROW_BOT_R.json) + * [`fdc492f8e7fd1254927699559f7a1da130b5b5ac55406914e77b85823a36c7fd ./kintex7/tile_type_CLK_HROW_TOP_R.json`](./kintex7/tile_type_CLK_HROW_TOP_R.json) * [`b595847032aea0b815abb56656fea5a4005cb7187eeb4623d1b08338b3029434 ./kintex7/tile_type_CLK_MTBF2.json`](./kintex7/tile_type_CLK_MTBF2.json) * [`fd40b96630265c911b0eb7e15bc287280e4fd07da9c81b58beebbcbe0d7681f5 ./kintex7/tile_type_CLK_PMV.json`](./kintex7/tile_type_CLK_PMV.json) * [`abeb5e942b8752216729d24a776388169a4d298cf10a1c50b0547ddeee56a730 ./kintex7/tile_type_CLK_PMV2.json`](./kintex7/tile_type_CLK_PMV2.json) * [`deb089e1bc152a455180e327f4e6a284303b4e63ca8dba23dffb4f670af0351e ./kintex7/tile_type_CLK_PMV2_SVT.json`](./kintex7/tile_type_CLK_PMV2_SVT.json) * [`5ce27433cf79173f3e915564af8464d6186d65369e2a4e57d93057d430cbc90c ./kintex7/tile_type_CLK_PMVIOB.json`](./kintex7/tile_type_CLK_PMVIOB.json) * [`d2d9bf1e652904afca19deff2ff8d05b40fa8a160e911ada074b006e3a6272c0 ./kintex7/tile_type_CLK_TERM.json`](./kintex7/tile_type_CLK_TERM.json) - * [`4f152ffc860e25c3b129a7adee061da54a5eeac9bd26a61316d6b953256aac01 ./kintex7/tile_type_CMT_FIFO_L.json`](./kintex7/tile_type_CMT_FIFO_L.json) - * [`a375af6d5f0399a2255ee3d1464e17874e3a54f30a9f424b0ae5f8d11a4bfbe9 ./kintex7/tile_type_CMT_FIFO_R.json`](./kintex7/tile_type_CMT_FIFO_R.json) + * [`81eccd6ca3df6121136dfe8a55949220ae09dd6859ea08e9df24fb8244fe113b ./kintex7/tile_type_CMT_FIFO_L.json`](./kintex7/tile_type_CMT_FIFO_L.json) + * [`d75725847f120a5ab367415e6a2f213da047e414447122034822b425aa58d115 ./kintex7/tile_type_CMT_FIFO_R.json`](./kintex7/tile_type_CMT_FIFO_R.json) * [`0d318f14c1713557ca8f175bc37c3128c92a0e99675463674c832098e4d21e9b ./kintex7/tile_type_CMT_PMV.json`](./kintex7/tile_type_CMT_PMV.json) * [`df512c2761c8ca0f13eed8522bd5baf28efba8e0545a972136cb07a904c7659d ./kintex7/tile_type_CMT_PMV_L.json`](./kintex7/tile_type_CMT_PMV_L.json) * [`e0468db7b92d088b704f20d51c1feaa6f1db4471e7b917932e00238b7cf81820 ./kintex7/tile_type_CMT_TOP_L_LOWER_B.json`](./kintex7/tile_type_CMT_TOP_L_LOWER_B.json) @@ -811,8 +820,8 @@ Results have checksums; * [`87ed05da2257badfcf4103b99401a91b04231e72b920c320b50e2369eba1d7ba ./kintex7/tile_type_GTX_INT_INTERFACE.json`](./kintex7/tile_type_GTX_INT_INTERFACE.json) * [`8161e7e508536df01e2d58da947c228db0af1c8dd9af88c6919d2e3c3568790e ./kintex7/tile_type_HCLK_BRAM.json`](./kintex7/tile_type_HCLK_BRAM.json) * [`985dc21b1b0b8e43e55474dc5ef9c50d15819873deaec3df8cd82dbb4bb2e0d8 ./kintex7/tile_type_HCLK_CLB.json`](./kintex7/tile_type_HCLK_CLB.json) - * [`b222009caa07d7626dc7e7aafdd409231f6374cae06376c866aebdc754aeaec4 ./kintex7/tile_type_HCLK_CMT.json`](./kintex7/tile_type_HCLK_CMT.json) - * [`d69c2f4499b9ac660f4917b272ab77ac939a4d3162c99bd98dfc2e12f30e9fdb ./kintex7/tile_type_HCLK_CMT_L.json`](./kintex7/tile_type_HCLK_CMT_L.json) + * [`319213b6113a162a45595d13138dc31677793b6fb6a42617ebd72dbc9b9830cb ./kintex7/tile_type_HCLK_CMT.json`](./kintex7/tile_type_HCLK_CMT.json) + * [`2574dae31ec4f8ee63b0a84463a8998f726ef66ea0829bce7804858e68184764 ./kintex7/tile_type_HCLK_CMT_L.json`](./kintex7/tile_type_HCLK_CMT_L.json) * [`a5dc1d0b7d061fc0780058af9326c1ab87f4578f3e29f397e5a3af957bd1ef4f ./kintex7/tile_type_HCLK_DSP_L.json`](./kintex7/tile_type_HCLK_DSP_L.json) * [`43335bfe14ad8a30ab6382fa82d154ef997f9393dc1c314ec9334dc6bb7e6db3 ./kintex7/tile_type_HCLK_DSP_R.json`](./kintex7/tile_type_HCLK_DSP_R.json) * [`55c960eaada832f9c300ec932582b4aed11063abc2bd7f6894488ec563410883 ./kintex7/tile_type_HCLK_FEEDTHRU_1.json`](./kintex7/tile_type_HCLK_FEEDTHRU_1.json) @@ -835,16 +844,16 @@ Results have checksums; * [`c2a0b3273fa35c4f25ef13ddc211a1d6cf8b9655c2aefb5c78bdbeb53a60ed2c ./kintex7/tile_type_INT_FEEDTHRU_2.json`](./kintex7/tile_type_INT_FEEDTHRU_2.json) * [`e219cb0263a13aacbdd68c169a9e81d0b48946af42fab70a3b3770a1d9d4cb6b ./kintex7/tile_type_INT_INTERFACE_L.json`](./kintex7/tile_type_INT_INTERFACE_L.json) * [`9105c2211c1e731ba13e5b13d719da4e3793b680b5758bc3299b7517ac898773 ./kintex7/tile_type_INT_INTERFACE_R.json`](./kintex7/tile_type_INT_INTERFACE_R.json) - * [`559231184560b8b89ccd897157dbc3a1eb3709ab3a4688fa9bb0fbe23da1c5ed ./kintex7/tile_type_INT_L.json`](./kintex7/tile_type_INT_L.json) - * [`095842234677e4eb278ba9c922d7196de795bb1e5a2b124a4e9e6924c48fdb8c ./kintex7/tile_type_INT_R.json`](./kintex7/tile_type_INT_R.json) + * [`6ad8f9d6c7fbc040190870c27337e23431305f46fd00c074c018265aaf6da6bc ./kintex7/tile_type_INT_L.json`](./kintex7/tile_type_INT_L.json) + * [`16e822888686a8bc7217d20198bb3384c2bd55441709c8a8c31351095cb19fa1 ./kintex7/tile_type_INT_R.json`](./kintex7/tile_type_INT_R.json) * [`fc02c2232b2c6363f5c22e481eacdd5f6bba4f3fc3ff6396bf39ac6cd1788b8c ./kintex7/tile_type_IO_INT_INTERFACE_L.json`](./kintex7/tile_type_IO_INT_INTERFACE_L.json) * [`b5a87bc7b76917328044bf8514816d2809a0bc49ab5dd2d0ae0962fc35ab64bf ./kintex7/tile_type_IO_INT_INTERFACE_R.json`](./kintex7/tile_type_IO_INT_INTERFACE_R.json) * [`bb29d28315f884ab1b788b792192095e68aa4e8dbe53bce90af4e7fc47b97d91 ./kintex7/tile_type_LIOB33.json`](./kintex7/tile_type_LIOB33.json) * [`82654d5e3c20b25e4fc9823e99a7132f83967a2bd477a4cebdc90ac129343d48 ./kintex7/tile_type_LIOB33_SING.json`](./kintex7/tile_type_LIOB33_SING.json) - * [`d7fe3daaa3dd420bd3b95877b8895e0ccd2f095979f9dec5f5df5c26035227f8 ./kintex7/tile_type_LIOI3.json`](./kintex7/tile_type_LIOI3.json) - * [`c387ec5818143edfcd2aba0b428ca028dbe4bcde16b53529f19af970ed815667 ./kintex7/tile_type_LIOI3_SING.json`](./kintex7/tile_type_LIOI3_SING.json) - * [`f49ce1bfc0eb235b8600a603a5a6b91364a4d8c1566491620d74d6fa52f19cad ./kintex7/tile_type_LIOI3_TBYTESRC.json`](./kintex7/tile_type_LIOI3_TBYTESRC.json) - * [`6ac93da3974dd4a44cfe17e9fc66599ed65135f36d455b459f1b3d8fa400e7ad ./kintex7/tile_type_LIOI3_TBYTETERM.json`](./kintex7/tile_type_LIOI3_TBYTETERM.json) + * [`e56152ce55602268bffa3416ec579a444b63a6ca1354a06c06ebdb121500ed6b ./kintex7/tile_type_LIOI3.json`](./kintex7/tile_type_LIOI3.json) + * [`189f8577d36c70a75509e8258068304f69eca91963549d82d3d361b4ce252f3a ./kintex7/tile_type_LIOI3_SING.json`](./kintex7/tile_type_LIOI3_SING.json) + * [`967fb298abc2bc034ef87ad1cae5e60febc54be3f05c723eb2483dc6188c14ed ./kintex7/tile_type_LIOI3_TBYTESRC.json`](./kintex7/tile_type_LIOI3_TBYTESRC.json) + * [`943d986fffcf5ea020f28e3be2c5e7320338076087a12b30ea3a248537b8b8f9 ./kintex7/tile_type_LIOI3_TBYTETERM.json`](./kintex7/tile_type_LIOI3_TBYTETERM.json) * [`ec23df842a105af6ffec036b52b06576751bafd08036277637cab85ff649a6c7 ./kintex7/tile_type_L_TERM_INT.json`](./kintex7/tile_type_L_TERM_INT.json) * [`25d9506bd69029661b4cd16ca8d8293167c1e534ba9a3b6f996e113284bb4458 ./kintex7/tile_type_MONITOR_BOT_FUJI2.json`](./kintex7/tile_type_MONITOR_BOT_FUJI2.json) * [`d127887f1d67464255cf63770ca5cc7d36017f0e3d44707f26b7e15f31bfae80 ./kintex7/tile_type_MONITOR_MID_FUJI2.json`](./kintex7/tile_type_MONITOR_MID_FUJI2.json) @@ -857,10 +866,10 @@ Results have checksums; * [`99fb6150f86a5c2e810578001b95f04c0c98337cdf5ad2b2a042b4ffa021e805 ./kintex7/tile_type_PCIE_TOP.json`](./kintex7/tile_type_PCIE_TOP.json) * [`ce94713d3b6f1fb054476a2855c94464b12e322737c91c5b45752f73d0d4fb28 ./kintex7/tile_type_RIOB18.json`](./kintex7/tile_type_RIOB18.json) * [`0862b19a62179654d985d7388a275182f3ba68b0b191e497b45fef3b9520ebc7 ./kintex7/tile_type_RIOB18_SING.json`](./kintex7/tile_type_RIOB18_SING.json) - * [`3dae32dde8bcf7698449d12ceacbcd7e96e32c1290fa90e244ac75dcda7abbeb ./kintex7/tile_type_RIOI.json`](./kintex7/tile_type_RIOI.json) - * [`fcd84eb676a0391cd6b97b9c94fbb8a485086613081bf72c58aaba73c1ed98f3 ./kintex7/tile_type_RIOI_SING.json`](./kintex7/tile_type_RIOI_SING.json) - * [`fa6ff8c076aae5c245f5bd05114859836ca1691ba9d61d0e043536d76bfce87e ./kintex7/tile_type_RIOI_TBYTESRC.json`](./kintex7/tile_type_RIOI_TBYTESRC.json) - * [`9198ce00e393962cf82e9d478a4353294499193d150cc6ce78fd6477c696c32d ./kintex7/tile_type_RIOI_TBYTETERM.json`](./kintex7/tile_type_RIOI_TBYTETERM.json) + * [`9637eafd6bce4596ef6cc9e016665ec1b68866025120b84262b19d4fc2af2509 ./kintex7/tile_type_RIOI.json`](./kintex7/tile_type_RIOI.json) + * [`9f5f4e3358d332a2a29abc8e22ca40bec2c46997ea5eb13b141cc50d832480c6 ./kintex7/tile_type_RIOI_SING.json`](./kintex7/tile_type_RIOI_SING.json) + * [`878e7e070b52281b2bce957115852ad0fc5053a4250a9a74b680cd2635a49c76 ./kintex7/tile_type_RIOI_TBYTESRC.json`](./kintex7/tile_type_RIOI_TBYTESRC.json) + * [`08629ec01637ed66b406145f75c6ae81c10d102c5aa8ea1d9f63ee596904270c ./kintex7/tile_type_RIOI_TBYTETERM.json`](./kintex7/tile_type_RIOI_TBYTETERM.json) * [`70cb1fb23ec7d55263600fceebce6839e72cdf4e7c95bab7d1e44b9fadd3af15 ./kintex7/tile_type_R_TERM_INT.json`](./kintex7/tile_type_R_TERM_INT.json) * [`0792bf8ada2c6c57694712025e7b1fa8d6e5c4f604a8586ff25c947ce45cd527 ./kintex7/tile_type_R_TERM_INT_GTX.json`](./kintex7/tile_type_R_TERM_INT_GTX.json) * [`fc909565278739a6beeb94d5bcb0780a6ec3dfa2d0f83389699974abc3d0427a ./kintex7/tile_type_TERM_CMT.json`](./kintex7/tile_type_TERM_CMT.json) @@ -879,36 +888,34 @@ Results have checksums; ### Settings -Created using following [settings/zynq7.sh (sha256: d14cc965fed165904defd17848eef57aef3c2bd0f3983a9f03d0b0448e1cf9e8)](https://github.com/SymbiFlow/prjxray/blob/d7ff3f25c61d5421cea9ec465885d40f8f15d5f0/settings/zynq7.sh) +Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/84b1457b885861fee221c5c6255d41cfb962ffc0/settings/zynq7.sh) ```shell export XRAY_DATABASE="zynq7" -export XRAY_PART="xc7z010clg400-1" +export XRAY_PART="xc7z020clg484-1" export XRAY_ROI_FRAMES="0x00000000:0xffffffff" # All CLB's in part, all BRAM's in part, all DSP's in part. -export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB36_X0Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y39" +export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X113Y149 RAMB18_X0Y0:RAMB18_X5Y59 RAMB36_X0Y0:RAMB36_X5Y29 DSP48_X0Y0:DSP48_X4Y59" export XRAY_EXCLUDE_ROI_TILEGRID="" -export XRAY_IOI3_TILES="RIOI3_X31Y9" +export XRAY_IOI3_TILES="RIOI3_X73Y9 LIOI3_X0Y9" +export XRAY_PS7_INT="INT_L_X18Y100" # These settings must remain in sync -export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99" +export XRAY_ROI="SLICE_X0Y0:SLICE_X49Y49 RAMB18_X0Y0:RAMB18_X2Y19 RAMB36_X0Y0:RAMB36_X2Y9 IOB_X0Y0:IOB_X0Y49 DSP48_X0Y0:DSP48_X2Y19" # Most of CMT X0Y2. -export XRAY_ROI_GRID_X1="83" -export XRAY_ROI_GRID_X2="118" +export XRAY_ROI_GRID_X1="0" +export XRAY_ROI_GRID_X2="86" # Include VBRK / VTERM -export XRAY_ROI_GRID_Y1="0" -export XRAY_ROI_GRID_Y2="51" +export XRAY_ROI_GRID_Y1="105" +export XRAY_ROI_GRID_Y2="155" -export XRAY_PIN_00="L14" -export XRAY_PIN_01="L15" -export XRAY_PIN_02="M14" -export XRAY_PIN_03="M15" -export XRAY_PIN_04="K16" -export XRAY_PIN_05="J16" -export XRAY_PIN_06="J15" +export XRAY_PIN_00="Y9" +export XRAY_PIN_01="U10" +export XRAY_PIN_02="N17" +export XRAY_PIN_03="P18" source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh @@ -956,13 +963,13 @@ Results have checksums; * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db) - * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453 ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db) - * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453 ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db) - * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453 ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db) + * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93 ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db) + * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93 ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db) + * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93 ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db) * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db) - * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453 ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db) - * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453 ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db) - * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453 ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db) + * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93 ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db) + * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93 ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db) + * [`2c1f7fcba20a4545e1fa58318b49a3d22c09ec5383992925eae0800744afbb93 ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db) @@ -1072,19 +1079,19 @@ Results have checksums; * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db) * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0 ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db) * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db) - * [`10fd0b901d0437a854d0b7ff823d971848b9b6ccd34dda374c2f0860c8f84843 ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db) + * [`6c8830dde9549cccff2fd2591711f22a2412ebdab609766ac146c31e936df955 ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db) * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db) - * [`276c871adc0e2706b78e75d2539fba6b79319f36c0199df41463285ffa098bc7 ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db) - * [`01cd7426da888ca40c5cc422a29fa9daf3d8de1901ed32ea118abd41def9d3da ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db) - * [`4b54ecc84ea68529786638d672099578b1fd11f47672cf8742701457e8ab15d8 ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db) + * [`0eafd11ed141f49b91c31d40e26f0211ee96bd5311e52ffc5e1391fee6b1027c ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db) + * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db) + * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49 ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db) * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8 ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db) * [`868eb3fb1066b2658e9786925f11569dc2d3e4a5ab1395d9a371737b085d0b24 ./zynq7/segbits_lioi3.origin_info.db`](./zynq7/segbits_lioi3.origin_info.db) * [`8222fc98a6a9bc6dd50e5178600dddecc3145a51109795b6f0b7e7f85bd8470a ./zynq7/segbits_lioi3_tbytesrc.db`](./zynq7/segbits_lioi3_tbytesrc.db) * [`61983925ee089c501fab2e1d7ab0b0efe3fd014436421fe351719a86e477fc09 ./zynq7/segbits_lioi3_tbytesrc.origin_info.db`](./zynq7/segbits_lioi3_tbytesrc.origin_info.db) * [`796197b351063cada8564de43931ecc657a018a6405e3e497a12946aafea8910 ./zynq7/segbits_lioi3_tbyteterm.db`](./zynq7/segbits_lioi3_tbyteterm.db) * [`098379913510473b58ff901108835ea64f469dc88f4667f39804c20b4a9b10c2 ./zynq7/segbits_lioi3_tbyteterm.origin_info.db`](./zynq7/segbits_lioi3_tbyteterm.origin_info.db) - * [`b6be0b91d37dd1299a16d0f132f156290b798b329280875e407a07d8c06a554f ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db) - * [`505a43562533122b2d5e70737212c44183706aaada60afc829ee79c3423b6730 ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db) + * [`39042dad94143ea5c97eafd34c7c0a72039bc5cf3e70c20dad60de2402ace923 ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db) + * [`f7b69a660831ad69cf119bc91dc15acc6e862b822e3821149285a9b0da9539e7 ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db) * [`874b7f7587a09c22e8514915465ea3c9176e8a6f4c30347bbea02aac073d00b2 ./zynq7/segbits_rioi3.db`](./zynq7/segbits_rioi3.db) * [`f568eb959ffa1ce070acab8208626b5cba2dcee6bb7ec086232790ceb5508bb8 ./zynq7/segbits_rioi3.origin_info.db`](./zynq7/segbits_rioi3.origin_info.db) * [`02657f7f1c3b938911a62d88e1719c0936f82c07cd716593608393d44aa283a0 ./zynq7/segbits_rioi3_tbytesrc.db`](./zynq7/segbits_rioi3_tbytesrc.db) @@ -1143,36 +1150,36 @@ Results have checksums; * [`1a81bf9fbc72eb95ba686a6f0ebdcf5afd305ebc4c45a22d38857e83933ce3c1 ./zynq7/tile_type_BRKH_CMT.json`](./zynq7/tile_type_BRKH_CMT.json) * [`45670d393b2985d49504d4fd7df6ee9e7bdbd50c4836324e23102c28d670ee82 ./zynq7/tile_type_BRKH_DSP_L.json`](./zynq7/tile_type_BRKH_DSP_L.json) * [`a465e47514fca696f0b8fa1c3d965d777f406ea45bb2973dfb356839fb3141eb ./zynq7/tile_type_BRKH_DSP_R.json`](./zynq7/tile_type_BRKH_DSP_R.json) - * [`9392827b3b140e74227e0118963d1038a034bb7352335d9c66b222a2ac905997 ./zynq7/tile_type_BRKH_INT.json`](./zynq7/tile_type_BRKH_INT.json) + * [`57fc91c74f6f8ba896d82cfca1da01ce12e0d4d292b1e7e6e84e94ae5411995f ./zynq7/tile_type_BRKH_INT.json`](./zynq7/tile_type_BRKH_INT.json) * [`82ab38041299c36b81ed1f583fadfe07841c5d23efe92107f98eec11a1597498 ./zynq7/tile_type_BRKH_INT_PSS.json`](./zynq7/tile_type_BRKH_INT_PSS.json) * [`d7f3fa9b1bc6af5675c03d5143aca4e4e63c0677d5b2185f4ed931002c5c1820 ./zynq7/tile_type_BRKH_TERM_INT.json`](./zynq7/tile_type_BRKH_TERM_INT.json) * [`2dc3ebf7d8642d39e4d1d5b8728638e7e2a9eafbe7cd5af2be056df507428a5a ./zynq7/tile_type_B_TERM_INT.json`](./zynq7/tile_type_B_TERM_INT.json) * [`9b10dc51a32b2113193337807fa4bb0ff9e51ffb10e24f96a4e3070fc0a90c6e ./zynq7/tile_type_B_TERM_INT_PSS.json`](./zynq7/tile_type_B_TERM_INT_PSS.json) * [`8a63872373a1adf0b60871588272f24b946f9b3dfeee7d951159e50f4758b003 ./zynq7/tile_type_B_TERM_VBRK.json`](./zynq7/tile_type_B_TERM_VBRK.json) * [`a590a5010dda4e32502ea58cec633ed40d273ebc31919be3d6aff842463cfc2d ./zynq7/tile_type_CFG_CENTER_BOT.json`](./zynq7/tile_type_CFG_CENTER_BOT.json) - * [`f0aa8188fed968109674ecc950f0669987f32e6f8433d3bf5f2ee97df0f231a4 ./zynq7/tile_type_CFG_CENTER_MID.json`](./zynq7/tile_type_CFG_CENTER_MID.json) - * [`f0fb8428ba600e5f0e5f42b99da4122d2ce2625c65db0266e823e038f00feb0f ./zynq7/tile_type_CFG_CENTER_TOP.json`](./zynq7/tile_type_CFG_CENTER_TOP.json) + * [`ac751dcb98ab6f2398892f845b38d0596653221f5f6ac473488445909649bcd7 ./zynq7/tile_type_CFG_CENTER_MID.json`](./zynq7/tile_type_CFG_CENTER_MID.json) + * [`8c9bb1ff7154b6e05d9f32a0bb22f7bc64030cbe5b0b67b15453c3a518766d42 ./zynq7/tile_type_CFG_CENTER_TOP.json`](./zynq7/tile_type_CFG_CENTER_TOP.json) * [`fdb5232b4fb42588b3c95d5bc3c44b4ad15e77863b658667ae8a72c40129d81d ./zynq7/tile_type_CFG_SECURITY_BOT_PELE1.json`](./zynq7/tile_type_CFG_SECURITY_BOT_PELE1.json) * [`2b02366b3d65c1c145a7ad0cec6003635f8e22ba9d8399691fc41baa35004173 ./zynq7/tile_type_CFG_SECURITY_MID_PELE1.json`](./zynq7/tile_type_CFG_SECURITY_MID_PELE1.json) * [`2874f7e009ab95f607f01d3388e2a44d3438cb3bf5e01824414e12a69a51a0dc ./zynq7/tile_type_CFG_SECURITY_TOP_PELE1.json`](./zynq7/tile_type_CFG_SECURITY_TOP_PELE1.json) - * [`2422048220d392e7417740d0580d96de1f5a34dd3536c32f703ec396ea1f8176 ./zynq7/tile_type_CLBLL_L.json`](./zynq7/tile_type_CLBLL_L.json) + * [`861e0cbd81f80d235ce0c08187f933918f7fc5a142188671f7e32ad2134f6f53 ./zynq7/tile_type_CLBLL_L.json`](./zynq7/tile_type_CLBLL_L.json) * [`1768455327a64e81f38890eb6f596283592b4adbe40fa09a137040ecff532994 ./zynq7/tile_type_CLBLL_R.json`](./zynq7/tile_type_CLBLL_R.json) - * [`ac6d87769f407489c01cb7f547413f57d675578b38492080606f6e949282b8e3 ./zynq7/tile_type_CLBLM_L.json`](./zynq7/tile_type_CLBLM_L.json) - * [`d4c579cb22d375d71b70b47fe94c1208cca1a0a57207dfdb06656ff5c5c5186d ./zynq7/tile_type_CLBLM_R.json`](./zynq7/tile_type_CLBLM_R.json) + * [`b0c7856660b4c11dd2fd20822c5d87150fae906a18ab95392998a13c6c803f46 ./zynq7/tile_type_CLBLM_L.json`](./zynq7/tile_type_CLBLM_L.json) + * [`f8846ab9c1e9163ce4bc68b15526c45c3674c1e35e0a5f30e3dfc10b43bce9da ./zynq7/tile_type_CLBLM_R.json`](./zynq7/tile_type_CLBLM_R.json) * [`00fb73f1bde6a4622a27668c9359cbe08c9b884e8b1e8e89f3911918c0841178 ./zynq7/tile_type_CLK_BUFG_BOT_R.json`](./zynq7/tile_type_CLK_BUFG_BOT_R.json) * [`ed51d2df5f2a390711a82ccce5115f740366652a8502774362f4e9829adc28f6 ./zynq7/tile_type_CLK_BUFG_REBUF.json`](./zynq7/tile_type_CLK_BUFG_REBUF.json) * [`dd22d0df228b262237bcf46bc16e49d4f3981027d5c9d39eeb6958088e030780 ./zynq7/tile_type_CLK_BUFG_TOP_R.json`](./zynq7/tile_type_CLK_BUFG_TOP_R.json) * [`7b9406332b7d802c5007cd2d9f557309d3cbf54cf3204677fd67cac3c418e330 ./zynq7/tile_type_CLK_FEED.json`](./zynq7/tile_type_CLK_FEED.json) - * [`ea99768869e71f39fa48dace2c6e236823d4da681e75810969a4afec44d04180 ./zynq7/tile_type_CLK_HROW_BOT_R.json`](./zynq7/tile_type_CLK_HROW_BOT_R.json) - * [`48ff0882a84e9f1a6425142dc945090a69f043c8da8bca03df9715ddad2db439 ./zynq7/tile_type_CLK_HROW_TOP_R.json`](./zynq7/tile_type_CLK_HROW_TOP_R.json) + * [`18ca6b73966bd313a063ba52d0780a77c247b5aca6e0f8b2475422b1f40a4d3d ./zynq7/tile_type_CLK_HROW_BOT_R.json`](./zynq7/tile_type_CLK_HROW_BOT_R.json) + * [`e748ba7115cadf0baeecd538c614b8f2b9653fe1bd61d875e1f0badda083408b ./zynq7/tile_type_CLK_HROW_TOP_R.json`](./zynq7/tile_type_CLK_HROW_TOP_R.json) * [`b595847032aea0b815abb56656fea5a4005cb7187eeb4623d1b08338b3029434 ./zynq7/tile_type_CLK_MTBF2.json`](./zynq7/tile_type_CLK_MTBF2.json) * [`fd40b96630265c911b0eb7e15bc287280e4fd07da9c81b58beebbcbe0d7681f5 ./zynq7/tile_type_CLK_PMV.json`](./zynq7/tile_type_CLK_PMV.json) * [`abeb5e942b8752216729d24a776388169a4d298cf10a1c50b0547ddeee56a730 ./zynq7/tile_type_CLK_PMV2.json`](./zynq7/tile_type_CLK_PMV2.json) * [`deb089e1bc152a455180e327f4e6a284303b4e63ca8dba23dffb4f670af0351e ./zynq7/tile_type_CLK_PMV2_SVT.json`](./zynq7/tile_type_CLK_PMV2_SVT.json) * [`5ce27433cf79173f3e915564af8464d6186d65369e2a4e57d93057d430cbc90c ./zynq7/tile_type_CLK_PMVIOB.json`](./zynq7/tile_type_CLK_PMVIOB.json) * [`d2d9bf1e652904afca19deff2ff8d05b40fa8a160e911ada074b006e3a6272c0 ./zynq7/tile_type_CLK_TERM.json`](./zynq7/tile_type_CLK_TERM.json) - * [`654b44e56a6ff02f09631b6ce689fbb23cee7a3421c024187e5683501afc42a6 ./zynq7/tile_type_CMT_FIFO_L.json`](./zynq7/tile_type_CMT_FIFO_L.json) - * [`d8985cca30294cb701721ca86f11bc447efdedc7b98d6202e6f74fef891f56d9 ./zynq7/tile_type_CMT_FIFO_R.json`](./zynq7/tile_type_CMT_FIFO_R.json) + * [`9ce1599c972fd785195440773b7eb79fc2abb509b5dd072d63f7c4ece5498950 ./zynq7/tile_type_CMT_FIFO_L.json`](./zynq7/tile_type_CMT_FIFO_L.json) + * [`6b7cfa99fa6fa5d01081775674d464f8bdbf1dcd674cca4fc4a9d31d73ebf88f ./zynq7/tile_type_CMT_FIFO_R.json`](./zynq7/tile_type_CMT_FIFO_R.json) * [`4df9f94e58368d397b0c0c45f0e8baf0f375f0ed81cee4fba98f642fd24a8889 ./zynq7/tile_type_CMT_PMV.json`](./zynq7/tile_type_CMT_PMV.json) * [`f33bebe60367065f7a2551a4764b7c55267d616b04395e6d5bd61a628800da17 ./zynq7/tile_type_CMT_PMV_L.json`](./zynq7/tile_type_CMT_PMV_L.json) * [`f1215a9fe5b4330f16a921df1e4e92a8568e591bf8b06743d0a319c924d8bf95 ./zynq7/tile_type_CMT_TOP_L_LOWER_B.json`](./zynq7/tile_type_CMT_TOP_L_LOWER_B.json) @@ -1187,8 +1194,8 @@ Results have checksums; * [`7b46567b5f4b81d0a92218a78c1c69345cbb0a6de530ddf9af1025ab425b1349 ./zynq7/tile_type_DSP_R.json`](./zynq7/tile_type_DSP_R.json) * [`8161e7e508536df01e2d58da947c228db0af1c8dd9af88c6919d2e3c3568790e ./zynq7/tile_type_HCLK_BRAM.json`](./zynq7/tile_type_HCLK_BRAM.json) * [`191a39fc956f7bb56e36f65a7fad57632f489052887a8569869c40b21af80d63 ./zynq7/tile_type_HCLK_CLB.json`](./zynq7/tile_type_HCLK_CLB.json) - * [`7c46c5d8571e843783f07de3ba55390cafa9d137b9c895a4a36d73ee69bb30ed ./zynq7/tile_type_HCLK_CMT.json`](./zynq7/tile_type_HCLK_CMT.json) - * [`2bae66ed5b436cf24fe2cfdb7a2da5eef3073071ba5ac0c1a2c9e7d3dd12d428 ./zynq7/tile_type_HCLK_CMT_L.json`](./zynq7/tile_type_HCLK_CMT_L.json) + * [`b34960efba0d2a95de2963b88722623d464cbb8a17a42b23ea4ef277e47b9da0 ./zynq7/tile_type_HCLK_CMT.json`](./zynq7/tile_type_HCLK_CMT.json) + * [`8ec9761a431193b3ba7835e46bec1e8309bef74113dff237e5f2f0f7fa4e4502 ./zynq7/tile_type_HCLK_CMT_L.json`](./zynq7/tile_type_HCLK_CMT_L.json) * [`b9839b9c2b660625ac28e93f0817741bef6d0e1ed65a96431f461f2c89cc8fb0 ./zynq7/tile_type_HCLK_DSP_L.json`](./zynq7/tile_type_HCLK_DSP_L.json) * [`42fd5e8e2d9acb69c05171851ce6c1738ace0bb1294ab255230b0d5b0c38e03c ./zynq7/tile_type_HCLK_DSP_R.json`](./zynq7/tile_type_HCLK_DSP_R.json) * [`55c960eaada832f9c300ec932582b4aed11063abc2bd7f6894488ec563410883 ./zynq7/tile_type_HCLK_FEEDTHRU_1.json`](./zynq7/tile_type_HCLK_FEEDTHRU_1.json) @@ -1208,8 +1215,8 @@ Results have checksums; * [`1d485459ccb8b8deb194961c6b31193fccdadec2d8d7bfb2dc724107c5f111ec ./zynq7/tile_type_INT_INTERFACE_L.json`](./zynq7/tile_type_INT_INTERFACE_L.json) * [`968e12ff7db0cfec075e08f3221ab8d6cf02e07364b09eed32ed001913b96d02 ./zynq7/tile_type_INT_INTERFACE_PSS_L.json`](./zynq7/tile_type_INT_INTERFACE_PSS_L.json) * [`20164cc8ec06d35a112a5262e196bf3a2832e84dc150d702084bff3ec24ec701 ./zynq7/tile_type_INT_INTERFACE_R.json`](./zynq7/tile_type_INT_INTERFACE_R.json) - * [`0a57da4a0ba1202bae547eda0f1c24c1539893ef621ad069597c9e8d3976a30d ./zynq7/tile_type_INT_L.json`](./zynq7/tile_type_INT_L.json) - * [`6c58cb2e57f1257ab7d1ba66589a3876882a4c1dbc19ebff067a22a2575db601 ./zynq7/tile_type_INT_R.json`](./zynq7/tile_type_INT_R.json) + * [`8a797a63bfa17434596b552857bdfe4f650124755169f5a41fbff493596bcbe4 ./zynq7/tile_type_INT_L.json`](./zynq7/tile_type_INT_L.json) + * [`de16784ca2b0f5b2198302b8427c6788dd0940164c0560d9aa0f74f198192045 ./zynq7/tile_type_INT_R.json`](./zynq7/tile_type_INT_R.json) * [`2895d4a043ce8b668ac49e7758248adc54bc1e10ce0b3caafef99445b9d4383e ./zynq7/tile_type_IO_INT_INTERFACE_L.json`](./zynq7/tile_type_IO_INT_INTERFACE_L.json) * [`8f9b875f1b4cb7750dd92cc496d75fc3294204b9b4cf6a4c73d5ca882f517908 ./zynq7/tile_type_IO_INT_INTERFACE_R.json`](./zynq7/tile_type_IO_INT_INTERFACE_R.json) * [`1601e8b364fbb7bd1ead4ac45680c1bc44ed6f5e564b6e834671c6415093d849 ./zynq7/tile_type_LIOB33.json`](./zynq7/tile_type_LIOB33.json) @@ -1262,6 +1269,8 @@ Results have checksums; * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4 ./zynq7/timings/CMT_TOP_R_LOWER_T.sdf`](./zynq7/timings/CMT_TOP_R_LOWER_T.sdf) * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e ./zynq7/timings/CMT_TOP_R_UPPER_B.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_B.sdf) * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721 ./zynq7/timings/CMT_TOP_R_UPPER_T.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_T.sdf) + * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf) + * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44 ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf) * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT.sdf`](./zynq7/timings/HCLK_CMT.sdf) * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3 ./zynq7/timings/HCLK_CMT_L.sdf`](./zynq7/timings/HCLK_CMT_L.sdf) * [`b5d5ca72d453879fca2bf2470fb0a670ebfb38d6e85cdbfdb3967e2e4f59ee73 ./zynq7/timings/HCLK_IOI3.sdf`](./zynq7/timings/HCLK_IOI3.sdf) @@ -1276,7 +1285,7 @@ Results have checksums; * [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863 ./zynq7/timings/RIOB33.sdf`](./zynq7/timings/RIOB33.sdf) * [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523 ./zynq7/timings/RIOB33_SING.sdf`](./zynq7/timings/RIOB33_SING.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/RIOI3.sdf`](./zynq7/timings/RIOI3.sdf) - * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/RIOI3_SING.sdf`](./zynq7/timings/RIOI3_SING.sdf) + * [`4cd6468585cb94150403030132d9ba73b414875a93a3f87b8e5a8d56a64ef43f ./zynq7/timings/RIOI3_SING.sdf`](./zynq7/timings/RIOI3_SING.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/RIOI3_TBYTESRC.sdf`](./zynq7/timings/RIOI3_TBYTESRC.sdf) * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1 ./zynq7/timings/RIOI3_TBYTETERM.sdf`](./zynq7/timings/RIOI3_TBYTETERM.sdf) * [`feb5cf787894379d158c5218ba44af20458c8008a1e75e30df00adde8aa97108 ./zynq7/timings/carry4_slicel.sdf`](./zynq7/timings/carry4_slicel.sdf) diff --git a/artix7/harness/arty-a7/pmod/design.json b/artix7/harness/arty-a7/pmod/design.json index 28db8a9..55d4152 100644 --- a/artix7/harness/arty-a7/pmod/design.json +++ b/artix7/harness/arty-a7/pmod/design.json @@ -1060,68 +1060,87 @@ "INT_R_X1Y112.WR1BEG_S0.NE6END3", "INT_R_X1Y116.WW2BEG2.NN6END3", "INT_R_X23Y46.IMUX24.SE2END0", + "LIOB33_SING_X0Y99.IOB_Y1.IN_TERM.NONE", "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_SING_X0Y99.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y3.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y3.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y3.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y3.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y3.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y3.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y5.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y5.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y5.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y5.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y7.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y7.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y7.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y9.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y9.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y9.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP", + "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN", + "LIOB33_X0Y51.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y51.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y51.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y51.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y51.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y51.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y53.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y53.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y53.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y53.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y53.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y53.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y75.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y75.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y75.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y75.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y75.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y77.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y77.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y77.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y77.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y77.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", diff --git a/artix7/harness/arty-a7/swbut/design.json b/artix7/harness/arty-a7/swbut/design.json index e7d3184..0115b14 100644 --- a/artix7/harness/arty-a7/swbut/design.json +++ b/artix7/harness/arty-a7/swbut/design.json @@ -845,50 +845,64 @@ "INT_R_X43Y61.IMUX34.SR1BEG_S0", "INT_R_X43Y61.SR1BEG_S0.WW4END_S0_0", "INT_R_X43Y63.SS6BEG0.SE6END0", + "LIOB33_X0Y1.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP", + "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN", + "LIOB33_X0Y121.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y121.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y121.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y121.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y121.IOB_Y1.PULLTYPE.PULLDOWN", + "LIOB33_X0Y123.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y123.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y123.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y123.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y123.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y123.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y125.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y125.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y125.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y125.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y125.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y125.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y127.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y127.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y127.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y127.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y127.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y127.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y137.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y137.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y137.IOB_Y0.PULLTYPE.PULLDOWN", + "LIOB33_X0Y137.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y137.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y137.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y137.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", @@ -919,34 +933,45 @@ "LIOI3_X0Y127.IDELAY_Y1.IDELAY_TYPE_FIXED", "LIOI3_X0Y127.ILOGIC_Y0.ZINV_D", "LIOI3_X0Y127.ILOGIC_Y1.ZINV_D", + "RIOB33_SING_X43Y50.IOB_Y0.IN_TERM.NONE", "RIOB33_SING_X43Y50.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_SING_X43Y50.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_SING_X43Y50.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y51.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y51.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y51.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y51.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y51.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y51.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y55.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y55.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y55.IOB_Y0.PULLTYPE.PULLDOWN", + "RIOB33_X43Y55.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y55.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y55.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y55.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y57.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y57.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y57.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y57.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y57.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y57.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y57.IOB_Y1.PULLTYPE.PULLDOWN", + "RIOB33_X43Y61.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y61.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y61.IOB_Y0.PULLTYPE.PULLDOWN", + "RIOB33_X43Y61.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y61.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y61.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y75.IOB_Y1.PULLTYPE.PULLDOWN", "RIOI3_SING_X43Y50.IDELAY_Y0.IDELAY_TYPE_FIXED", diff --git a/artix7/harness/arty-a7/uart/design.json b/artix7/harness/arty-a7/uart/design.json index 66d82ea..eb899da 100644 --- a/artix7/harness/arty-a7/uart/design.json +++ b/artix7/harness/arty-a7/uart/design.json @@ -340,24 +340,32 @@ "INT_R_X43Y68.NR1BEG0.LOGIC_OUTS18", "INT_R_X43Y69.LV0.NR1END0", "INT_R_X43Y87.LH0.LV18", + "LIOB33_X0Y1.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y1.IOB_Y0.PULLTYPE.PULLDOWN", + "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP", + "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN", + "LIOB33_X0Y111.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y111.IOB_Y0.PULLTYPE.PULLDOWN", + "LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y111.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y111.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y121.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y121.IOB_Y0.PULLTYPE.PULLDOWN", + "LIOB33_X0Y121.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y121.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", @@ -375,16 +383,20 @@ "LIOI3_X0Y121.IDELAY_Y0.IDELAY_TYPE_FIXED", "LIOI3_X0Y121.IDELAY_Y1.IDELAY_TYPE_FIXED", "LIOI3_X0Y121.ILOGIC_Y1.ZINV_D", + "RIOB33_X43Y67.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y67.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y67.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y67.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y67.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y67.IOB_Y1.PULLTYPE.PULLDOWN", + "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y75.IOB_Y1.PULLTYPE.PULLDOWN", "RIOI3_X43Y67.IDELAY_Y0.IDELAY_TYPE_FIXED", diff --git a/artix7/harness/basys3/swbut/design.json b/artix7/harness/basys3/swbut/design.json index 1a2ca6f..93807a3 100644 --- a/artix7/harness/basys3/swbut/design.json +++ b/artix7/harness/basys3/swbut/design.json @@ -3471,75 +3471,96 @@ "INT_R_X43Y76.SL1BEG1.ER1END1", "INT_R_X43Y87.ER1BEG1.SE6END0", "INT_R_X43Y87.IMUX34.WR1END1", + "LIOB33_SING_X0Y0.IOB_Y0.IN_TERM.NONE", "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_SING_X0Y0.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y1.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y3.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y3.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y3.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y3.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y3.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y3.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y5.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y5.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y5.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y5.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y7.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y7.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y7.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y9.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y9.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y9.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y11.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y11.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y11.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y11.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y11.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y11.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y17.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y17.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y17.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y17.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y17.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y17.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y17.IOB_Y1.PULLTYPE.PULLDOWN", + "LIOB33_X0Y19.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y19.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y19.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y19.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y19.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y19.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y19.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y19.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP", + "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y43.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y43.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y111.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y111.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y111.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y111.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y111.IOB_Y1.PULLTYPE.NONE", @@ -3603,68 +3624,88 @@ "LIOI3_X0Y111.OLOGIC_Y1.OMUX.D1", "LIOI3_X0Y111.OLOGIC_Y1.OQUSED", "LIOI3_X0Y111.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF", + "RIOB33_X43Y25.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y25.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y25.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y25.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y25.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y25.IOB_Y1.PULLTYPE.PULLDOWN", + "RIOB33_X43Y31.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y31.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y31.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y31.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y31.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y31.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y31.IOB_Y1.PULLTYPE.PULLDOWN", + "RIOB33_X43Y37.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y37.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y37.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y37.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y37.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y37.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y37.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y37.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y39.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y39.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y39.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y39.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y39.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y39.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y43.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y43.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y43.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y43.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y43.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y45.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y45.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y45.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y45.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y45.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y45.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y47.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y47.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y47.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y47.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y47.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y47.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y61.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y61.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y61.IOB_Y0.PULLTYPE.PULLDOWN", + "RIOB33_X43Y61.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y61.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y61.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y75.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y75.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y75.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y87.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y87.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y87.IOB_Y0.PULLTYPE.PULLDOWN", + "RIOB33_X43Y87.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y87.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y87.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y87.IOB_Y1.PULLTYPE.NONE", diff --git a/artix7/harness/basys3/swbut_50/design.json b/artix7/harness/basys3/swbut_50/design.json index 1a2ca6f..93807a3 100644 --- a/artix7/harness/basys3/swbut_50/design.json +++ b/artix7/harness/basys3/swbut_50/design.json @@ -3471,75 +3471,96 @@ "INT_R_X43Y76.SL1BEG1.ER1END1", "INT_R_X43Y87.ER1BEG1.SE6END0", "INT_R_X43Y87.IMUX34.WR1END1", + "LIOB33_SING_X0Y0.IOB_Y0.IN_TERM.NONE", "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_SING_X0Y0.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y1.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y3.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y3.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y3.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y3.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y3.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y3.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y5.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y5.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y5.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y5.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y7.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y7.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y7.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y9.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y9.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y9.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y11.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y11.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y11.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y11.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y11.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y11.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y17.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y17.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y17.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y17.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y17.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y17.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y17.IOB_Y1.PULLTYPE.PULLDOWN", + "LIOB33_X0Y19.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y19.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y19.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y19.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y19.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y19.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y19.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y19.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP", + "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y43.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y43.IOB_Y1.PULLTYPE.NONE", + "LIOB33_X0Y111.IOB_Y0.IN_TERM.NONE", "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "LIOB33_X0Y111.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "LIOB33_X0Y111.IOB_Y0.PULLTYPE.NONE", + "LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE", "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "LIOB33_X0Y111.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "LIOB33_X0Y111.IOB_Y1.PULLTYPE.NONE", @@ -3603,68 +3624,88 @@ "LIOI3_X0Y111.OLOGIC_Y1.OMUX.D1", "LIOI3_X0Y111.OLOGIC_Y1.OQUSED", "LIOI3_X0Y111.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF", + "RIOB33_X43Y25.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y25.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y25.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y25.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y25.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y25.IOB_Y1.PULLTYPE.PULLDOWN", + "RIOB33_X43Y31.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y31.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y31.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y31.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y31.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y31.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y31.IOB_Y1.PULLTYPE.PULLDOWN", + "RIOB33_X43Y37.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y37.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y37.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y37.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y37.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y37.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y37.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y37.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y39.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y39.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y39.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y39.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y39.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y39.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y43.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y43.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y43.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y43.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y43.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y45.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y45.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y45.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y45.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y45.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y45.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y47.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y47.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y47.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y47.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY", "RIOB33_X43Y47.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN", "RIOB33_X43Y47.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y61.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y61.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y61.IOB_Y0.PULLTYPE.PULLDOWN", + "RIOB33_X43Y61.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y61.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y61.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y75.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE", + "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y75.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y75.IOB_Y1.PULLTYPE.NONE", + "RIOB33_X43Y87.IOB_Y0.IN_TERM.NONE", "RIOB33_X43Y87.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST", "RIOB33_X43Y87.IOB_Y0.PULLTYPE.PULLDOWN", + "RIOB33_X43Y87.IOB_Y1.IN_TERM.NONE", "RIOB33_X43Y87.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW", "RIOB33_X43Y87.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16", "RIOB33_X43Y87.IOB_Y1.PULLTYPE.NONE", diff --git a/artix7/mask_lioi3.db b/artix7/mask_lioi3.db index 56dab26..9c59cd4 100644 --- a/artix7/mask_lioi3.db +++ b/artix7/mask_lioi3.db @@ -7,6 +7,7 @@ bit 25_31 bit 25_32 bit 25_34 bit 25_35 +bit 25_39 bit 25_47 bit 25_48 bit 25_51 diff --git a/artix7/mask_lioi3_tbytesrc.db b/artix7/mask_lioi3_tbytesrc.db index 56dab26..9c59cd4 100644 --- a/artix7/mask_lioi3_tbytesrc.db +++ b/artix7/mask_lioi3_tbytesrc.db @@ -7,6 +7,7 @@ bit 25_31 bit 25_32 bit 25_34 bit 25_35 +bit 25_39 bit 25_47 bit 25_48 bit 25_51 diff --git a/artix7/mask_lioi3_tbyteterm.db b/artix7/mask_lioi3_tbyteterm.db index 56dab26..9c59cd4 100644 --- a/artix7/mask_lioi3_tbyteterm.db +++ b/artix7/mask_lioi3_tbyteterm.db @@ -7,6 +7,7 @@ bit 25_31 bit 25_32 bit 25_34 bit 25_35 +bit 25_39 bit 25_47 bit 25_48 bit 25_51 diff --git a/artix7/mask_rioi3.db b/artix7/mask_rioi3.db index 56dab26..9c59cd4 100644 --- a/artix7/mask_rioi3.db +++ b/artix7/mask_rioi3.db @@ -7,6 +7,7 @@ bit 25_31 bit 25_32 bit 25_34 bit 25_35 +bit 25_39 bit 25_47 bit 25_48 bit 25_51 diff --git a/artix7/mask_rioi3_tbytesrc.db b/artix7/mask_rioi3_tbytesrc.db index 56dab26..9c59cd4 100644 --- a/artix7/mask_rioi3_tbytesrc.db +++ b/artix7/mask_rioi3_tbytesrc.db @@ -7,6 +7,7 @@ bit 25_31 bit 25_32 bit 25_34 bit 25_35 +bit 25_39 bit 25_47 bit 25_48 bit 25_51 diff --git a/artix7/mask_rioi3_tbyteterm.db b/artix7/mask_rioi3_tbyteterm.db index 56dab26..9c59cd4 100644 --- a/artix7/mask_rioi3_tbyteterm.db +++ b/artix7/mask_rioi3_tbyteterm.db @@ -7,6 +7,7 @@ bit 25_31 bit 25_32 bit 25_34 bit 25_35 +bit 25_39 bit 25_47 bit 25_48 bit 25_51 diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db index e68f810..d035b4c 100644 --- a/artix7/segbits_int_l.origin_info.db +++ b/artix7/segbits_int_l.origin_info.db @@ -170,7 +170,7 @@ INT_L.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63 -INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63 +INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63 @@ -1897,7 +1897,7 @@ INT_L.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27 -INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27 +INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27 INT_L.EE4BEG2.LOGIC_OUTS_L2 origin:050-pip-seed 02_41 04_42 INT_L.EE4BEG2.LOGIC_OUTS_L6 origin:050-pip-seed 02_41 07_41 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41 @@ -2253,7 +2253,7 @@ INT_L.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36 INT_L.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39 INT_L.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36 INT_L.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37 -INT_L.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36 +INT_L.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36 INT_L.NE6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_53 04_54 INT_L.NE6BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_53 07_53 INT_L.NE6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_52 07_53 @@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 +INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17 @@ -2471,7 +2471,7 @@ INT_L.NN6BEG2.NN6END2 origin:050-pip-seed 02_38 07_39 INT_L.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36 INT_L.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39 INT_L.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38 -INT_L.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39 +INT_L.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39 INT_L.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36 INT_L.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39 INT_L.NN6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 03_54 06_54 @@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55 INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 +INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07 @@ -2887,7 +2887,7 @@ INT_L.SE6BEG3.LH0 origin:056-pip-rem 04_59 06_58 INT_L.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56 INT_L.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59 INT_L.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56 -INT_L.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59 +INT_L.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59 INT_L.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58 INT_L.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59 INT_L.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58 @@ -3302,7 +3302,7 @@ INT_L.SW6BEG1.LOGIC_OUTS_L19 origin:050-pip-seed 06_28 07_29 INT_L.SW6BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 04_30 06_28 INT_L.SW6BEG1.LV_L9 origin:056-pip-rem 04_30 05_28 INT_L.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29 -INT_L.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28 +INT_L.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28 INT_L.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29 INT_L.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31 INT_L.SW6BEG1.NW6END2 origin:050-pip-seed 05_31 06_28 @@ -3345,7 +3345,7 @@ INT_L.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63 INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 -INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60 +INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60 @@ -3583,7 +3583,7 @@ INT_L.WW4BEG1.LOGIC_OUTS_L23 origin:050-pip-seed 06_16 07_17 INT_L.WW4BEG1.LV_L9 origin:056-pip-rem 04_18 05_16 INT_L.WW4BEG1.LH6 origin:056-pip-rem 05_16 07_17 INT_L.WW4BEG1.NE2END1 origin:050-pip-seed 02_17 05_19 -INT_L.WW4BEG1.NE6END1 origin:056-pip-rem 05_16 05_19 +INT_L.WW4BEG1.NE6END1 origin:050-pip-seed 05_16 05_19 INT_L.WW4BEG1.NN2END1 origin:050-pip-seed 03_16 05_19 INT_L.WW4BEG1.NN6END1 origin:050-pip-seed 05_19 06_16 INT_L.WW4BEG1.NW2END1 origin:050-pip-seed 02_17 03_17 diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db index 0464c02..218c521 100644 --- a/artix7/segbits_int_r.origin_info.db +++ b/artix7/segbits_int_r.origin_info.db @@ -725,7 +725,7 @@ INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 +INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21 @@ -3301,7 +3301,7 @@ INT_R.SW6BEG1.LOGIC_OUTS13 origin:050-pip-seed 03_28 04_30 INT_R.SW6BEG1.LOGIC_OUTS19 origin:050-pip-seed 06_28 07_29 INT_R.SW6BEG1.LOGIC_OUTS23 origin:050-pip-seed 04_30 06_28 INT_R.SW6BEG1.EE2END1 origin:050-pip-seed 03_28 04_29 -INT_R.SW6BEG1.EE4END1 origin:050-pip-seed 04_29 05_28 +INT_R.SW6BEG1.EE4END1 origin:056-pip-rem 04_29 05_28 INT_R.SW6BEG1.LH6 origin:056-pip-rem 05_28 07_29 INT_R.SW6BEG1.LV9 origin:056-pip-rem 04_30 05_28 INT_R.SW6BEG1.NW2END2 origin:050-pip-seed 02_29 05_31 @@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 -INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 +INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 @@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63 INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61 -INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60 +INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61 diff --git a/artix7/segbits_liob33.db b/artix7/segbits_liob33.db index 4c8276c..37effb8 100644 --- a/artix7/segbits_liob33.db +++ b/artix7/segbits_liob33.db @@ -1,7 +1,8 @@ LIOB33.IOB_Y0.IBUFDISABLE.I 38_82 +LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123 LIOB33.IOB_Y0.INTERMDISABLE.I 39_89 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93 @@ -36,9 +37,10 @@ LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87 LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87 LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45 +LIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 39_07 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 !38_06 39_05 39_07 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 !38_06 !39_05 39_07 LIOB33.IOB_Y1.INTERMDISABLE.I 38_38 LIOB33.IOB_Y1.LVTTL.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_62 39_01 !39_09 !39_15 39_63 LIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35 diff --git a/artix7/segbits_liob33.origin_info.db b/artix7/segbits_liob33.origin_info.db index 9524d43..1b3e6f7 100644 --- a/artix7/segbits_liob33.origin_info.db +++ b/artix7/segbits_liob33.origin_info.db @@ -1,7 +1,8 @@ LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82 +LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123 LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65 LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94 @@ -36,9 +37,10 @@ LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87 LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87 LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07 +LIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !38_6 38_4 39_5 39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_6 !39_5 38_4 39_7 LIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38 LIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63 LIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35 diff --git a/artix7/segbits_riob33.db b/artix7/segbits_riob33.db index 7e6f8b1..88ceb7d 100644 --- a/artix7/segbits_riob33.db +++ b/artix7/segbits_riob33.db @@ -1,7 +1,8 @@ RIOB33.IOB_Y0.IBUFDISABLE.I 38_82 +RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123 RIOB33.IOB_Y0.INTERMDISABLE.I 39_89 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93 @@ -36,9 +37,10 @@ RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87 RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87 RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45 +RIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 39_07 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 !38_06 39_05 39_07 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 !38_06 !39_05 39_07 RIOB33.IOB_Y1.INTERMDISABLE.I 38_38 RIOB33.IOB_Y1.LVTTL.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_62 39_01 !39_09 !39_15 39_63 RIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35 diff --git a/artix7/segbits_riob33.origin_info.db b/artix7/segbits_riob33.origin_info.db index 3fcdddd..a87b92b 100644 --- a/artix7/segbits_riob33.origin_info.db +++ b/artix7/segbits_riob33.origin_info.db @@ -1,7 +1,8 @@ RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82 +RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123 RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65 RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94 @@ -36,9 +37,10 @@ RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87 RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87 RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07 +RIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !38_6 38_4 39_5 39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_6 !39_5 38_4 39_7 RIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38 RIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63 RIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35 diff --git a/artix7/tile_type_BRKH_INT.json b/artix7/tile_type_BRKH_INT.json index 3d8016a..6336b9a 100644 --- a/artix7/tile_type_BRKH_INT.json +++ b/artix7/tile_type_BRKH_INT.json @@ -4,8 +4,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -18,8 +18,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -32,8 +32,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -46,8 +46,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -60,8 +60,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -74,8 +74,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -88,8 +88,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -102,8 +102,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -116,8 +116,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -130,8 +130,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -144,8 +144,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -158,8 +158,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -172,8 +172,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -186,8 +186,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -200,8 +200,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -214,8 +214,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -228,8 +228,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -242,8 +242,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -256,8 +256,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -270,8 +270,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -284,8 +284,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -298,8 +298,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -312,8 +312,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -326,8 +326,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -340,8 +340,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -354,8 +354,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -368,8 +368,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -382,8 +382,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], diff --git a/artix7/tile_type_CFG_CENTER_MID.json b/artix7/tile_type_CFG_CENTER_MID.json index b470d11..f9d9f49 100644 --- a/artix7/tile_type_CFG_CENTER_MID.json +++ b/artix7/tile_type_CFG_CENTER_MID.json @@ -5315,9 +5315,9 @@ "site_pins": { "CRCERROR": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5325,9 +5325,9 @@ }, "ECCERROR": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5335,9 +5335,9 @@ }, "ECCERRORSINGLE": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5345,9 +5345,9 @@ }, "FAR0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5355,9 +5355,9 @@ }, "FAR1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5365,9 +5365,9 @@ }, "FAR2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5375,9 +5375,9 @@ }, "FAR3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5385,9 +5385,9 @@ }, "FAR4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5395,9 +5395,9 @@ }, "FAR5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5405,9 +5405,9 @@ }, "FAR6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5415,9 +5415,9 @@ }, "FAR7": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5425,9 +5425,9 @@ }, "FAR8": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5435,9 +5435,9 @@ }, "FAR9": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5445,9 +5445,9 @@ }, "FAR10": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5455,9 +5455,9 @@ }, "FAR11": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5465,9 +5465,9 @@ }, "FAR12": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5475,9 +5475,9 @@ }, "FAR13": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5485,9 +5485,9 @@ }, "FAR14": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5495,9 +5495,9 @@ }, "FAR15": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5505,9 +5505,9 @@ }, "FAR16": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5515,9 +5515,9 @@ }, "FAR17": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5525,9 +5525,9 @@ }, "FAR18": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5535,9 +5535,9 @@ }, "FAR19": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5545,9 +5545,9 @@ }, "FAR20": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5555,9 +5555,9 @@ }, "FAR21": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5565,9 +5565,9 @@ }, "FAR22": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5575,9 +5575,9 @@ }, "FAR23": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5585,9 +5585,9 @@ }, "FAR24": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5595,9 +5595,9 @@ }, "FAR25": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5605,9 +5605,9 @@ }, "SYNBIT0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5615,9 +5615,9 @@ }, "SYNBIT1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5625,9 +5625,9 @@ }, "SYNBIT2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5635,9 +5635,9 @@ }, "SYNBIT3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5645,9 +5645,9 @@ }, "SYNBIT4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5655,9 +5655,9 @@ }, "SYNDROME0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5665,9 +5665,9 @@ }, "SYNDROME1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5675,9 +5675,9 @@ }, "SYNDROME2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5685,9 +5685,9 @@ }, "SYNDROME3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5695,9 +5695,9 @@ }, "SYNDROME4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5705,9 +5705,9 @@ }, "SYNDROME5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5715,9 +5715,9 @@ }, "SYNDROME6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5725,9 +5725,9 @@ }, "SYNDROME7": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5735,9 +5735,9 @@ }, "SYNDROME8": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5745,9 +5745,9 @@ }, "SYNDROME9": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5755,9 +5755,9 @@ }, "SYNDROME10": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5765,9 +5765,9 @@ }, "SYNDROME11": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5775,9 +5775,9 @@ }, "SYNDROME12": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5785,9 +5785,9 @@ }, "SYNDROMEVALID": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5795,9 +5795,9 @@ }, "SYNWORD0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5805,9 +5805,9 @@ }, "SYNWORD1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5815,9 +5815,9 @@ }, "SYNWORD2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5825,9 +5825,9 @@ }, "SYNWORD3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5835,9 +5835,9 @@ }, "SYNWORD4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5845,9 +5845,9 @@ }, "SYNWORD5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5855,9 +5855,9 @@ }, "SYNWORD6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", diff --git a/artix7/tile_type_CFG_CENTER_TOP.json b/artix7/tile_type_CFG_CENTER_TOP.json index 960339a..0d3ab92 100644 --- a/artix7/tile_type_CFG_CENTER_TOP.json +++ b/artix7/tile_type_CFG_CENTER_TOP.json @@ -769,6 +769,86 @@ "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR1" }, + "EFUSEUSR2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR2" + }, + "EFUSEUSR3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR3" + }, + "EFUSEUSR4": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR4" + }, + "EFUSEUSR5": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR5" + }, + "EFUSEUSR6": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR6" + }, + "EFUSEUSR7": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR7" + }, + "EFUSEUSR8": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR8" + }, + "EFUSEUSR9": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR9" + }, "EFUSEUSR10": { "delay": [ "0.000", @@ -869,16 +949,6 @@ "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR19" }, - "EFUSEUSR2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR2" - }, "EFUSEUSR20": { "delay": [ "0.000", @@ -979,16 +1049,6 @@ "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR29" }, - "EFUSEUSR3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR3" - }, "EFUSEUSR30": { "delay": [ "0.000", @@ -1008,66 +1068,6 @@ ], "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR31" - }, - "EFUSEUSR4": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR4" - }, - "EFUSEUSR5": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR5" - }, - "EFUSEUSR6": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR6" - }, - "EFUSEUSR7": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR7" - }, - "EFUSEUSR8": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR8" - }, - "EFUSEUSR9": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR9" } }, "type": "EFUSE_USR", diff --git a/artix7/tile_type_CLBLL_L.json b/artix7/tile_type_CLBLL_L.json index de172a4..ff5974d 100644 --- a/artix7/tile_type_CLBLL_L.json +++ b/artix7/tile_type_CLBLL_L.json @@ -3210,465 +3210,6 @@ } }, "sites": [ - { - "name": "X1Y0", - "prefix": "SLICE", - "site_pins": { - "A": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1326.1875", - "wire": "CLBLL_L_A" - }, - "A1": { - "cap": "0.000", - "delay": [ - "0.172", - "0.214", - "0.416", - "0.516" - ], - "wire": "CLBLL_L_A1" - }, - "A2": { - "cap": "0.000", - "delay": [ - "0.170", - "0.212", - "0.409", - "0.507" - ], - "wire": "CLBLL_L_A2" - }, - "A3": { - "cap": "0.000", - "delay": [ - "0.107", - "0.133", - "0.278", - "0.344" - ], - "wire": "CLBLL_L_A3" - }, - "A4": { - "cap": "0.000", - "delay": [ - "0.086", - "0.107", - "0.229", - "0.284" - ], - "wire": "CLBLL_L_A4" - }, - "A5": { - "cap": "0.000", - "delay": [ - "0.033", - "0.042", - "0.091", - "0.112" - ], - "wire": "CLBLL_L_A5" - }, - "A6": { - "cap": "0.000", - "delay": [ - "0.002", - "0.002", - "0.004", - "0.005" - ], - "wire": "CLBLL_L_A6" - }, - "AMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1852.976125", - "wire": "CLBLL_L_AMUX" - }, - "AQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_AQ" - }, - "AX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_AX" - }, - "B": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1404.5625", - "wire": "CLBLL_L_B" - }, - "B1": { - "cap": "0.000", - "delay": [ - "0.171", - "0.213", - "0.417", - "0.518" - ], - "wire": "CLBLL_L_B1" - }, - "B2": { - "cap": "0.000", - "delay": [ - "0.170", - "0.212", - "0.408", - "0.506" - ], - "wire": "CLBLL_L_B2" - }, - "B3": { - "cap": "0.000", - "delay": [ - "0.109", - "0.136", - "0.281", - "0.349" - ], - "wire": "CLBLL_L_B3" - }, - "B4": { - "cap": "0.000", - "delay": [ - "0.086", - "0.107", - "0.228", - "0.282" - ], - "wire": "CLBLL_L_B4" - }, - "B5": { - "cap": "0.000", - "delay": [ - "0.034", - "0.043", - "0.093", - "0.116" - ], - "wire": "CLBLL_L_B5" - }, - "B6": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.002", - "0.002" - ], - "wire": "CLBLL_L_B6" - }, - "BMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1869.3455", - "wire": "CLBLL_L_BMUX" - }, - "BQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_BQ" - }, - "BX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_BX" - }, - "C": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1453.375", - "wire": "CLBLL_L_C" - }, - "C1": { - "cap": "0.000", - "delay": [ - "0.173", - "0.215", - "0.417", - "0.517" - ], - "wire": "CLBLL_L_C1" - }, - "C2": { - "cap": "0.000", - "delay": [ - "0.171", - "0.213", - "0.409", - "0.507" - ], - "wire": "CLBLL_L_C2" - }, - "C3": { - "cap": "0.000", - "delay": [ - "0.110", - "0.137", - "0.283", - "0.351" - ], - "wire": "CLBLL_L_C3" - }, - "C4": { - "cap": "0.000", - "delay": [ - "0.087", - "0.108", - "0.227", - "0.281" - ], - "wire": "CLBLL_L_C4" - }, - "C5": { - "cap": "0.000", - "delay": [ - "0.033", - "0.042", - "0.092", - "0.114" - ], - "wire": "CLBLL_L_C5" - }, - "C6": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_C6" - }, - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CE" - }, - "CIN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CIN" - }, - "CLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CLK" - }, - "CMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1826.7858125", - "wire": "CLBLL_L_CMUX" - }, - "COUT": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "687.5", - "wire": "CLBLL_L_COUT" - }, - "CQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_CQ" - }, - "CX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CX" - }, - "D": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1408.0", - "wire": "CLBLL_L_D" - }, - "D1": { - "cap": "0.000", - "delay": [ - "0.174", - "0.216", - "0.421", - "0.522" - ], - "wire": "CLBLL_L_D1" - }, - "D2": { - "cap": "0.000", - "delay": [ - "0.171", - "0.213", - "0.410", - "0.509" - ], - "wire": "CLBLL_L_D2" - }, - "D3": { - "cap": "0.000", - "delay": [ - "0.109", - "0.136", - "0.279", - "0.346" - ], - "wire": "CLBLL_L_D3" - }, - "D4": { - "cap": "0.000", - "delay": [ - "0.088", - "0.109", - "0.229", - "0.284" - ], - "wire": "CLBLL_L_D4" - }, - "D5": { - "cap": "0.000", - "delay": [ - "0.033", - "0.042", - "0.091", - "0.113" - ], - "wire": "CLBLL_L_D5" - }, - "D6": { - "cap": "0.000", - "delay": [ - "0.003", - "0.003", - "0.004", - "0.005" - ], - "wire": "CLBLL_L_D6" - }, - "DMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1826.7858125", - "wire": "CLBLL_L_DMUX" - }, - "DQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_DQ" - }, - "DX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_DX" - }, - "SR": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_SR" - } - }, - "type": "SLICEL", - "x_coord": 1, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "SLICE", @@ -4127,6 +3668,465 @@ "type": "SLICEL", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X1Y0", + "prefix": "SLICE", + "site_pins": { + "A": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1326.1875", + "wire": "CLBLL_L_A" + }, + "A1": { + "cap": "0.000", + "delay": [ + "0.172", + "0.214", + "0.416", + "0.516" + ], + "wire": "CLBLL_L_A1" + }, + "A2": { + "cap": "0.000", + "delay": [ + "0.170", + "0.212", + "0.409", + "0.507" + ], + "wire": "CLBLL_L_A2" + }, + "A3": { + "cap": "0.000", + "delay": [ + "0.107", + "0.133", + "0.278", + "0.344" + ], + "wire": "CLBLL_L_A3" + }, + "A4": { + "cap": "0.000", + "delay": [ + "0.086", + "0.107", + "0.229", + "0.284" + ], + "wire": "CLBLL_L_A4" + }, + "A5": { + "cap": "0.000", + "delay": [ + "0.033", + "0.042", + "0.091", + "0.112" + ], + "wire": "CLBLL_L_A5" + }, + "A6": { + "cap": "0.000", + "delay": [ + "0.002", + "0.002", + "0.004", + "0.005" + ], + "wire": "CLBLL_L_A6" + }, + "AMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1852.976125", + "wire": "CLBLL_L_AMUX" + }, + "AQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_AQ" + }, + "AX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_AX" + }, + "B": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1404.5625", + "wire": "CLBLL_L_B" + }, + "B1": { + "cap": "0.000", + "delay": [ + "0.171", + "0.213", + "0.417", + "0.518" + ], + "wire": "CLBLL_L_B1" + }, + "B2": { + "cap": "0.000", + "delay": [ + "0.170", + "0.212", + "0.408", + "0.506" + ], + "wire": "CLBLL_L_B2" + }, + "B3": { + "cap": "0.000", + "delay": [ + "0.109", + "0.136", + "0.281", + "0.349" + ], + "wire": "CLBLL_L_B3" + }, + "B4": { + "cap": "0.000", + "delay": [ + "0.086", + "0.107", + "0.228", + "0.282" + ], + "wire": "CLBLL_L_B4" + }, + "B5": { + "cap": "0.000", + "delay": [ + "0.034", + "0.043", + "0.093", + "0.116" + ], + "wire": "CLBLL_L_B5" + }, + "B6": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.002", + "0.002" + ], + "wire": "CLBLL_L_B6" + }, + "BMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1869.3455", + "wire": "CLBLL_L_BMUX" + }, + "BQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_BQ" + }, + "BX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_BX" + }, + "C": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1453.375", + "wire": "CLBLL_L_C" + }, + "C1": { + "cap": "0.000", + "delay": [ + "0.173", + "0.215", + "0.417", + "0.517" + ], + "wire": "CLBLL_L_C1" + }, + "C2": { + "cap": "0.000", + "delay": [ + "0.171", + "0.213", + "0.409", + "0.507" + ], + "wire": "CLBLL_L_C2" + }, + "C3": { + "cap": "0.000", + "delay": [ + "0.110", + "0.137", + "0.283", + "0.351" + ], + "wire": "CLBLL_L_C3" + }, + "C4": { + "cap": "0.000", + "delay": [ + "0.087", + "0.108", + "0.227", + "0.281" + ], + "wire": "CLBLL_L_C4" + }, + "C5": { + "cap": "0.000", + "delay": [ + "0.033", + "0.042", + "0.092", + "0.114" + ], + "wire": "CLBLL_L_C5" + }, + "C6": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_C6" + }, + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CE" + }, + "CIN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CIN" + }, + "CLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CLK" + }, + "CMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1826.7858125", + "wire": "CLBLL_L_CMUX" + }, + "COUT": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "687.5", + "wire": "CLBLL_L_COUT" + }, + "CQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_CQ" + }, + "CX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CX" + }, + "D": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1408.0", + "wire": "CLBLL_L_D" + }, + "D1": { + "cap": "0.000", + "delay": [ + "0.174", + "0.216", + "0.421", + "0.522" + ], + "wire": "CLBLL_L_D1" + }, + "D2": { + "cap": "0.000", + "delay": [ + "0.171", + "0.213", + "0.410", + "0.509" + ], + "wire": "CLBLL_L_D2" + }, + "D3": { + "cap": "0.000", + "delay": [ + "0.109", + "0.136", + "0.279", + "0.346" + ], + "wire": "CLBLL_L_D3" + }, + "D4": { + "cap": "0.000", + "delay": [ + "0.088", + "0.109", + "0.229", + "0.284" + ], + "wire": "CLBLL_L_D4" + }, + "D5": { + "cap": "0.000", + "delay": [ + "0.033", + "0.042", + "0.091", + "0.113" + ], + "wire": "CLBLL_L_D5" + }, + "D6": { + "cap": "0.000", + "delay": [ + "0.003", + "0.003", + "0.004", + "0.005" + ], + "wire": "CLBLL_L_D6" + }, + "DMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1826.7858125", + "wire": "CLBLL_L_DMUX" + }, + "DQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_DQ" + }, + "DX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_DX" + }, + "SR": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_SR" + } + }, + "type": "SLICEL", + "x_coord": 1, + "y_coord": 0 } ], "tile_type": "CLBLL_L", diff --git a/artix7/tile_type_CLBLM_L.json b/artix7/tile_type_CLBLM_L.json index b74a4f5..3e3c0ca 100644 --- a/artix7/tile_type_CLBLM_L.json +++ b/artix7/tile_type_CLBLM_L.json @@ -3300,6 +3300,515 @@ } }, "sites": [ + { + "name": "X0Y0", + "prefix": "SLICE", + "site_pins": { + "A": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1463.6875", + "wire": "CLBLM_M_A" + }, + "A1": { + "cap": "0.000", + "delay": [ + "0.180", + "0.225", + "0.428", + "0.531" + ], + "wire": "CLBLM_M_A1" + }, + "A2": { + "cap": "0.000", + "delay": [ + "0.174", + "0.216", + "0.413", + "0.512" + ], + "wire": "CLBLM_M_A2" + }, + "A3": { + "cap": "0.000", + "delay": [ + "0.114", + "0.141", + "0.300", + "0.372" + ], + "wire": "CLBLM_M_A3" + }, + "A4": { + "cap": "0.000", + "delay": [ + "0.091", + "0.113", + "0.244", + "0.303" + ], + "wire": "CLBLM_M_A4" + }, + "A5": { + "cap": "0.000", + "delay": [ + "0.038", + "0.048", + "0.102", + "0.126" + ], + "wire": "CLBLM_M_A5" + }, + "A6": { + "cap": "0.000", + "delay": [ + "0.007", + "0.008", + "0.013", + "0.016" + ], + "wire": "CLBLM_M_A6" + }, + "AI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_AI" + }, + "AMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1833.3335625", + "wire": "CLBLM_M_AMUX" + }, + "AQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_AQ" + }, + "AX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_AX" + }, + "B": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1408.0", + "wire": "CLBLM_M_B" + }, + "B1": { + "cap": "0.000", + "delay": [ + "0.175", + "0.218", + "0.420", + "0.521" + ], + "wire": "CLBLM_M_B1" + }, + "B2": { + "cap": "0.000", + "delay": [ + "0.172", + "0.214", + "0.406", + "0.504" + ], + "wire": "CLBLM_M_B2" + }, + "B3": { + "cap": "0.000", + "delay": [ + "0.114", + "0.141", + "0.298", + "0.370" + ], + "wire": "CLBLM_M_B3" + }, + "B4": { + "cap": "0.000", + "delay": [ + "0.090", + "0.112", + "0.242", + "0.300" + ], + "wire": "CLBLM_M_B4" + }, + "B5": { + "cap": "0.000", + "delay": [ + "0.042", + "0.052", + "0.111", + "0.137" + ], + "wire": "CLBLM_M_B5" + }, + "B6": { + "cap": "0.000", + "delay": [ + "0.005", + "0.006", + "0.011", + "0.013" + ], + "wire": "CLBLM_M_B6" + }, + "BI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_BI" + }, + "BMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1898.8096875", + "wire": "CLBLM_M_BMUX" + }, + "BQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_BQ" + }, + "BX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_BX" + }, + "C": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1401.125", + "wire": "CLBLM_M_C" + }, + "C1": { + "cap": "0.000", + "delay": [ + "0.176", + "0.219", + "0.420", + "0.521" + ], + "wire": "CLBLM_M_C1" + }, + "C2": { + "cap": "0.000", + "delay": [ + "0.172", + "0.214", + "0.408", + "0.506" + ], + "wire": "CLBLM_M_C2" + }, + "C3": { + "cap": "0.000", + "delay": [ + "0.113", + "0.140", + "0.297", + "0.368" + ], + "wire": "CLBLM_M_C3" + }, + "C4": { + "cap": "0.000", + "delay": [ + "0.089", + "0.111", + "0.242", + "0.300" + ], + "wire": "CLBLM_M_C4" + }, + "C5": { + "cap": "0.000", + "delay": [ + "0.040", + "0.050", + "0.107", + "0.133" + ], + "wire": "CLBLM_M_C5" + }, + "C6": { + "cap": "0.000", + "delay": [ + "0.005", + "0.006", + "0.010", + "0.012" + ], + "wire": "CLBLM_M_C6" + }, + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CE" + }, + "CI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CI" + }, + "CIN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CIN" + }, + "CLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CLK" + }, + "CMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1833.3335625", + "wire": "CLBLM_M_CMUX" + }, + "COUT": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "687.5", + "wire": "CLBLM_M_COUT" + }, + "CQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_CQ" + }, + "CX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CX" + }, + "D": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1417.625", + "wire": "CLBLM_M_D" + }, + "D1": { + "cap": "0.000", + "delay": [ + "0.145", + "0.226", + "0.305", + "0.540" + ], + "wire": "CLBLM_M_D1" + }, + "D2": { + "cap": "0.000", + "delay": [ + "0.141", + "0.219", + "0.293", + "0.520" + ], + "wire": "CLBLM_M_D2" + }, + "D3": { + "cap": "0.000", + "delay": [ + "0.088", + "0.144", + "0.209", + "0.377" + ], + "wire": "CLBLM_M_D3" + }, + "D4": { + "cap": "0.000", + "delay": [ + "0.073", + "0.118", + "0.176", + "0.317" + ], + "wire": "CLBLM_M_D4" + }, + "D5": { + "cap": "0.000", + "delay": [ + "0.031", + "0.052", + "0.072", + "0.137" + ], + "wire": "CLBLM_M_D5" + }, + "D6": { + "cap": "0.000", + "delay": [ + "0.003", + "0.010", + "0.007", + "0.022" + ], + "wire": "CLBLM_M_D6" + }, + "DI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_DI" + }, + "DMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1859.523875", + "wire": "CLBLM_M_DMUX" + }, + "DQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_DQ" + }, + "DX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_DX" + }, + "SR": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_SR" + }, + "WE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_WE" + } + }, + "type": "SLICEM", + "x_coord": 0, + "y_coord": 0 + }, { "name": "X1Y0", "prefix": "SLICE", @@ -3758,515 +4267,6 @@ "type": "SLICEL", "x_coord": 1, "y_coord": 0 - }, - { - "name": "X0Y0", - "prefix": "SLICE", - "site_pins": { - "A": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1463.6875", - "wire": "CLBLM_M_A" - }, - "A1": { - "cap": "0.000", - "delay": [ - "0.180", - "0.225", - "0.428", - "0.531" - ], - "wire": "CLBLM_M_A1" - }, - "A2": { - "cap": "0.000", - "delay": [ - "0.174", - "0.216", - "0.413", - "0.512" - ], - "wire": "CLBLM_M_A2" - }, - "A3": { - "cap": "0.000", - "delay": [ - "0.114", - "0.141", - "0.300", - "0.372" - ], - "wire": "CLBLM_M_A3" - }, - "A4": { - "cap": "0.000", - "delay": [ - "0.091", - "0.113", - "0.244", - "0.303" - ], - "wire": "CLBLM_M_A4" - }, - "A5": { - "cap": "0.000", - "delay": [ - "0.038", - "0.048", - "0.102", - "0.126" - ], - "wire": "CLBLM_M_A5" - }, - "A6": { - "cap": "0.000", - "delay": [ - "0.007", - "0.008", - "0.013", - "0.016" - ], - "wire": "CLBLM_M_A6" - }, - "AI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_AI" - }, - "AMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1833.3335625", - "wire": "CLBLM_M_AMUX" - }, - "AQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_AQ" - }, - "AX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_AX" - }, - "B": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1408.0", - "wire": "CLBLM_M_B" - }, - "B1": { - "cap": "0.000", - "delay": [ - "0.175", - "0.218", - "0.420", - "0.521" - ], - "wire": "CLBLM_M_B1" - }, - "B2": { - "cap": "0.000", - "delay": [ - "0.172", - "0.214", - "0.406", - "0.504" - ], - "wire": "CLBLM_M_B2" - }, - "B3": { - "cap": "0.000", - "delay": [ - "0.114", - "0.141", - "0.298", - "0.370" - ], - "wire": "CLBLM_M_B3" - }, - "B4": { - "cap": "0.000", - "delay": [ - "0.090", - "0.112", - "0.242", - "0.300" - ], - "wire": "CLBLM_M_B4" - }, - "B5": { - "cap": "0.000", - "delay": [ - "0.042", - "0.052", - "0.111", - "0.137" - ], - "wire": "CLBLM_M_B5" - }, - "B6": { - "cap": "0.000", - "delay": [ - "0.005", - "0.006", - "0.011", - "0.013" - ], - "wire": "CLBLM_M_B6" - }, - "BI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_BI" - }, - "BMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1898.8096875", - "wire": "CLBLM_M_BMUX" - }, - "BQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_BQ" - }, - "BX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_BX" - }, - "C": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1401.125", - "wire": "CLBLM_M_C" - }, - "C1": { - "cap": "0.000", - "delay": [ - "0.176", - "0.219", - "0.420", - "0.521" - ], - "wire": "CLBLM_M_C1" - }, - "C2": { - "cap": "0.000", - "delay": [ - "0.172", - "0.214", - "0.408", - "0.506" - ], - "wire": "CLBLM_M_C2" - }, - "C3": { - "cap": "0.000", - "delay": [ - "0.113", - "0.140", - "0.297", - "0.368" - ], - "wire": "CLBLM_M_C3" - }, - "C4": { - "cap": "0.000", - "delay": [ - "0.089", - "0.111", - "0.242", - "0.300" - ], - "wire": "CLBLM_M_C4" - }, - "C5": { - "cap": "0.000", - "delay": [ - "0.040", - "0.050", - "0.107", - "0.133" - ], - "wire": "CLBLM_M_C5" - }, - "C6": { - "cap": "0.000", - "delay": [ - "0.005", - "0.006", - "0.010", - "0.012" - ], - "wire": "CLBLM_M_C6" - }, - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CE" - }, - "CI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CI" - }, - "CIN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CIN" - }, - "CLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CLK" - }, - "CMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1833.3335625", - "wire": "CLBLM_M_CMUX" - }, - "COUT": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "687.5", - "wire": "CLBLM_M_COUT" - }, - "CQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_CQ" - }, - "CX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CX" - }, - "D": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1417.625", - "wire": "CLBLM_M_D" - }, - "D1": { - "cap": "0.000", - "delay": [ - "0.145", - "0.226", - "0.305", - "0.540" - ], - "wire": "CLBLM_M_D1" - }, - "D2": { - "cap": "0.000", - "delay": [ - "0.141", - "0.219", - "0.293", - "0.520" - ], - "wire": "CLBLM_M_D2" - }, - "D3": { - "cap": "0.000", - "delay": [ - "0.088", - "0.144", - "0.209", - "0.377" - ], - "wire": "CLBLM_M_D3" - }, - "D4": { - "cap": "0.000", - "delay": [ - "0.073", - "0.118", - "0.176", - "0.317" - ], - "wire": "CLBLM_M_D4" - }, - "D5": { - "cap": "0.000", - "delay": [ - "0.031", - "0.052", - "0.072", - "0.137" - ], - "wire": "CLBLM_M_D5" - }, - "D6": { - "cap": "0.000", - "delay": [ - "0.003", - "0.007", - "0.010", - "0.022" - ], - "wire": "CLBLM_M_D6" - }, - "DI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_DI" - }, - "DMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1859.523875", - "wire": "CLBLM_M_DMUX" - }, - "DQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_DQ" - }, - "DX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_DX" - }, - "SR": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_SR" - }, - "WE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_WE" - } - }, - "type": "SLICEM", - "x_coord": 0, - "y_coord": 0 } ], "tile_type": "CLBLM_L", diff --git a/artix7/tile_type_CLBLM_R.json b/artix7/tile_type_CLBLM_R.json index 81bd1b0..a1cc5a2 100644 --- a/artix7/tile_type_CLBLM_R.json +++ b/artix7/tile_type_CLBLM_R.json @@ -3738,8 +3738,8 @@ "cap": "0.000", "delay": [ "0.003", - "0.007", "0.010", + "0.007", "0.022" ], "wire": "CLBLM_M_D6" diff --git a/artix7/tile_type_CLK_HROW_BOT_R.json b/artix7/tile_type_CLK_HROW_BOT_R.json index 7ed59af..2ea6776 100644 --- a/artix7/tile_type_CLK_HROW_BOT_R.json +++ b/artix7/tile_type_CLK_HROW_BOT_R.json @@ -9893,9 +9893,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9907,9 +9907,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9921,9 +9921,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9935,9 +9935,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9949,9 +9949,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9963,9 +9963,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9977,9 +9977,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9991,9 +9991,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10005,9 +10005,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10019,9 +10019,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10033,9 +10033,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10047,9 +10047,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10061,9 +10061,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10075,9 +10075,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10089,9 +10089,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10103,9 +10103,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10117,9 +10117,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10131,9 +10131,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10145,9 +10145,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10159,9 +10159,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10173,9 +10173,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10187,9 +10187,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10201,9 +10201,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10215,9 +10215,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10229,9 +10229,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10243,9 +10243,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10257,9 +10257,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10271,9 +10271,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10285,9 +10285,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10299,9 +10299,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10313,9 +10313,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10327,9 +10327,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10341,9 +10341,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10355,9 +10355,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10369,9 +10369,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10383,9 +10383,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10397,9 +10397,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10411,9 +10411,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10425,9 +10425,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10439,9 +10439,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10453,9 +10453,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10467,9 +10467,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10481,9 +10481,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10495,9 +10495,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10509,9 +10509,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10523,9 +10523,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10537,9 +10537,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10551,9 +10551,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null diff --git a/artix7/tile_type_CLK_HROW_TOP_R.json b/artix7/tile_type_CLK_HROW_TOP_R.json index 0655958..3150a53 100644 --- a/artix7/tile_type_CLK_HROW_TOP_R.json +++ b/artix7/tile_type_CLK_HROW_TOP_R.json @@ -8997,9 +8997,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9011,9 +9011,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9025,9 +9025,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9039,9 +9039,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9053,9 +9053,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9067,9 +9067,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9081,9 +9081,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9095,9 +9095,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9109,9 +9109,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9123,9 +9123,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9137,9 +9137,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9151,9 +9151,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9165,9 +9165,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9179,9 +9179,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9193,9 +9193,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9207,9 +9207,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9221,9 +9221,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9235,9 +9235,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9249,9 +9249,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9263,9 +9263,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9277,9 +9277,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9291,9 +9291,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9305,9 +9305,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9319,9 +9319,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9333,9 +9333,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9347,9 +9347,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9361,9 +9361,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9375,9 +9375,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9389,9 +9389,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9403,9 +9403,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9417,9 +9417,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9431,9 +9431,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9445,9 +9445,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9459,9 +9459,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9473,9 +9473,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9487,9 +9487,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9501,9 +9501,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9515,9 +9515,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9529,9 +9529,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9543,9 +9543,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9557,9 +9557,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9571,9 +9571,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9585,9 +9585,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9599,9 +9599,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9613,9 +9613,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9627,9 +9627,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9641,9 +9641,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9655,9 +9655,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null diff --git a/artix7/tile_type_CMT_FIFO_L.json b/artix7/tile_type_CMT_FIFO_L.json index ec102b5..eca44fc 100644 --- a/artix7/tile_type_CMT_FIFO_L.json +++ b/artix7/tile_type_CMT_FIFO_L.json @@ -5006,1505 +5006,6 @@ } }, "sites": [ - { - "name": "X0Y0", - "prefix": "OUT_FIFO", - "site_pins": { - "ALMOSTEMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" - }, - "ALMOSTFULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTFULL" - }, - "D00": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D00" - }, - "D01": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D01" - }, - "D02": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D02" - }, - "D03": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D03" - }, - "D04": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D04" - }, - "D05": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D05" - }, - "D06": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D06" - }, - "D07": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D07" - }, - "D10": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D10" - }, - "D11": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D11" - }, - "D12": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D12" - }, - "D13": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D13" - }, - "D14": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D14" - }, - "D15": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D15" - }, - "D16": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D16" - }, - "D17": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D17" - }, - "D20": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D20" - }, - "D21": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D21" - }, - "D22": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D22" - }, - "D23": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D23" - }, - "D24": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D24" - }, - "D25": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D25" - }, - "D26": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D26" - }, - "D27": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D27" - }, - "D30": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D30" - }, - "D31": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D31" - }, - "D32": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D32" - }, - "D33": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D33" - }, - "D34": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D34" - }, - "D35": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D35" - }, - "D36": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D36" - }, - "D37": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D37" - }, - "D40": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D40" - }, - "D41": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D41" - }, - "D42": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D42" - }, - "D43": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D43" - }, - "D44": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D44" - }, - "D45": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D45" - }, - "D46": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D46" - }, - "D47": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D47" - }, - "D50": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D50" - }, - "D51": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D51" - }, - "D52": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D52" - }, - "D53": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D53" - }, - "D54": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D54" - }, - "D55": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D55" - }, - "D56": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D56" - }, - "D57": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D57" - }, - "D60": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D60" - }, - "D61": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D61" - }, - "D62": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D62" - }, - "D63": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D63" - }, - "D64": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D64" - }, - "D65": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D65" - }, - "D66": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D66" - }, - "D67": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D67" - }, - "D70": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D70" - }, - "D71": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D71" - }, - "D72": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D72" - }, - "D73": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D73" - }, - "D74": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D74" - }, - "D75": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D75" - }, - "D76": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D76" - }, - "D77": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D77" - }, - "D80": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D80" - }, - "D81": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D81" - }, - "D82": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D82" - }, - "D83": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D83" - }, - "D84": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D84" - }, - "D85": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D85" - }, - "D86": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D86" - }, - "D87": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D87" - }, - "D90": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D90" - }, - "D91": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D91" - }, - "D92": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D92" - }, - "D93": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D93" - }, - "D94": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D94" - }, - "D95": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D95" - }, - "D96": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D96" - }, - "D97": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D97" - }, - "EMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_EMPTY" - }, - "FULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_FULL" - }, - "Q00": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q00" - }, - "Q01": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q01" - }, - "Q02": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q02" - }, - "Q03": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q03" - }, - "Q10": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q10" - }, - "Q11": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q11" - }, - "Q12": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q12" - }, - "Q13": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q13" - }, - "Q20": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q20" - }, - "Q21": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q21" - }, - "Q22": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q22" - }, - "Q23": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q23" - }, - "Q30": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q30" - }, - "Q31": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q31" - }, - "Q32": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q32" - }, - "Q33": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q33" - }, - "Q40": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q40" - }, - "Q41": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q41" - }, - "Q42": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q42" - }, - "Q43": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q43" - }, - "Q50": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q50" - }, - "Q51": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q51" - }, - "Q52": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q52" - }, - "Q53": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q53" - }, - "Q54": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q54" - }, - "Q55": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q55" - }, - "Q56": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q56" - }, - "Q57": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q57" - }, - "Q60": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q60" - }, - "Q61": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q61" - }, - "Q62": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q62" - }, - "Q63": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q63" - }, - "Q64": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q64" - }, - "Q65": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q65" - }, - "Q66": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q66" - }, - "Q67": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q67" - }, - "Q70": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q70" - }, - "Q71": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q71" - }, - "Q72": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q72" - }, - "Q73": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q73" - }, - "Q80": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q80" - }, - "Q81": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q81" - }, - "Q82": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q82" - }, - "Q83": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q83" - }, - "Q90": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q90" - }, - "Q91": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q91" - }, - "Q92": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q92" - }, - "Q93": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q93" - }, - "RDCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDCLK" - }, - "RDEN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDEN" - }, - "RESET": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RESET" - }, - "SCANENB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANENB" - }, - "SCANIN0": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN0" - }, - "SCANIN1": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN1" - }, - "SCANIN2": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN2" - }, - "SCANIN3": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN3" - }, - "SCANOUT0": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT0" - }, - "SCANOUT1": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT1" - }, - "SCANOUT2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT2" - }, - "SCANOUT3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT3" - }, - "TESTMODEB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTMODEB" - }, - "TESTREADDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTREADDISB" - }, - "TESTWRITEDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTWRITEDISB" - }, - "WRCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WRCLK" - }, - "WREN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WREN" - } - }, - "type": "OUT_FIFO", - "x_coord": 0, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "IN_FIFO", @@ -8003,6 +6504,1505 @@ "type": "IN_FIFO", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y0", + "prefix": "OUT_FIFO", + "site_pins": { + "ALMOSTEMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" + }, + "ALMOSTFULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTFULL" + }, + "D00": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D00" + }, + "D01": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D01" + }, + "D02": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D02" + }, + "D03": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D03" + }, + "D04": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D04" + }, + "D05": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D05" + }, + "D06": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D06" + }, + "D07": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D07" + }, + "D10": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D10" + }, + "D11": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D11" + }, + "D12": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D12" + }, + "D13": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D13" + }, + "D14": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D14" + }, + "D15": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D15" + }, + "D16": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D16" + }, + "D17": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D17" + }, + "D20": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D20" + }, + "D21": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D21" + }, + "D22": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D22" + }, + "D23": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D23" + }, + "D24": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D24" + }, + "D25": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D25" + }, + "D26": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D26" + }, + "D27": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D27" + }, + "D30": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D30" + }, + "D31": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D31" + }, + "D32": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D32" + }, + "D33": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D33" + }, + "D34": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D34" + }, + "D35": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D35" + }, + "D36": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D36" + }, + "D37": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D37" + }, + "D40": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D40" + }, + "D41": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D41" + }, + "D42": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D42" + }, + "D43": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D43" + }, + "D44": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D44" + }, + "D45": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D45" + }, + "D46": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D46" + }, + "D47": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D47" + }, + "D50": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D50" + }, + "D51": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D51" + }, + "D52": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D52" + }, + "D53": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D53" + }, + "D54": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D54" + }, + "D55": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D55" + }, + "D56": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D56" + }, + "D57": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D57" + }, + "D60": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D60" + }, + "D61": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D61" + }, + "D62": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D62" + }, + "D63": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D63" + }, + "D64": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D64" + }, + "D65": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D65" + }, + "D66": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D66" + }, + "D67": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D67" + }, + "D70": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D70" + }, + "D71": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D71" + }, + "D72": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D72" + }, + "D73": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D73" + }, + "D74": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D74" + }, + "D75": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D75" + }, + "D76": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D76" + }, + "D77": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D77" + }, + "D80": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D80" + }, + "D81": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D81" + }, + "D82": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D82" + }, + "D83": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D83" + }, + "D84": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D84" + }, + "D85": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D85" + }, + "D86": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D86" + }, + "D87": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D87" + }, + "D90": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D90" + }, + "D91": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D91" + }, + "D92": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D92" + }, + "D93": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D93" + }, + "D94": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D94" + }, + "D95": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D95" + }, + "D96": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D96" + }, + "D97": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D97" + }, + "EMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_EMPTY" + }, + "FULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_FULL" + }, + "Q00": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q00" + }, + "Q01": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q01" + }, + "Q02": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q02" + }, + "Q03": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q03" + }, + "Q10": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q10" + }, + "Q11": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q11" + }, + "Q12": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q12" + }, + "Q13": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q13" + }, + "Q20": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q20" + }, + "Q21": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q21" + }, + "Q22": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q22" + }, + "Q23": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q23" + }, + "Q30": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q30" + }, + "Q31": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q31" + }, + "Q32": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q32" + }, + "Q33": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q33" + }, + "Q40": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q40" + }, + "Q41": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q41" + }, + "Q42": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q42" + }, + "Q43": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q43" + }, + "Q50": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q50" + }, + "Q51": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q51" + }, + "Q52": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q52" + }, + "Q53": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q53" + }, + "Q54": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q54" + }, + "Q55": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q55" + }, + "Q56": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q56" + }, + "Q57": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q57" + }, + "Q60": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q60" + }, + "Q61": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q61" + }, + "Q62": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q62" + }, + "Q63": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q63" + }, + "Q64": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q64" + }, + "Q65": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q65" + }, + "Q66": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q66" + }, + "Q67": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q67" + }, + "Q70": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q70" + }, + "Q71": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q71" + }, + "Q72": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q72" + }, + "Q73": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q73" + }, + "Q80": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q80" + }, + "Q81": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q81" + }, + "Q82": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q82" + }, + "Q83": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q83" + }, + "Q90": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q90" + }, + "Q91": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q91" + }, + "Q92": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q92" + }, + "Q93": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q93" + }, + "RDCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDCLK" + }, + "RDEN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDEN" + }, + "RESET": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RESET" + }, + "SCANENB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANENB" + }, + "SCANIN0": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN0" + }, + "SCANIN1": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN1" + }, + "SCANIN2": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN2" + }, + "SCANIN3": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN3" + }, + "SCANOUT0": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT0" + }, + "SCANOUT1": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT1" + }, + "SCANOUT2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT2" + }, + "SCANOUT3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT3" + }, + "TESTMODEB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTMODEB" + }, + "TESTREADDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTREADDISB" + }, + "TESTWRITEDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTWRITEDISB" + }, + "WRCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WRCLK" + }, + "WREN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WREN" + } + }, + "type": "OUT_FIFO", + "x_coord": 0, + "y_coord": 0 } ], "tile_type": "CMT_FIFO_L", diff --git a/artix7/tile_type_CMT_FIFO_R.json b/artix7/tile_type_CMT_FIFO_R.json index b289e0f..a85edd2 100644 --- a/artix7/tile_type_CMT_FIFO_R.json +++ b/artix7/tile_type_CMT_FIFO_R.json @@ -5006,1505 +5006,6 @@ } }, "sites": [ - { - "name": "X0Y0", - "prefix": "OUT_FIFO", - "site_pins": { - "ALMOSTEMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" - }, - "ALMOSTFULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTFULL" - }, - "D00": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D00" - }, - "D01": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D01" - }, - "D02": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D02" - }, - "D03": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D03" - }, - "D04": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D04" - }, - "D05": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D05" - }, - "D06": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D06" - }, - "D07": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D07" - }, - "D10": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D10" - }, - "D11": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D11" - }, - "D12": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D12" - }, - "D13": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D13" - }, - "D14": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D14" - }, - "D15": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D15" - }, - "D16": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D16" - }, - "D17": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D17" - }, - "D20": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D20" - }, - "D21": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D21" - }, - "D22": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D22" - }, - "D23": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D23" - }, - "D24": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D24" - }, - "D25": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D25" - }, - "D26": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D26" - }, - "D27": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D27" - }, - "D30": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D30" - }, - "D31": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D31" - }, - "D32": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D32" - }, - "D33": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D33" - }, - "D34": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D34" - }, - "D35": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D35" - }, - "D36": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D36" - }, - "D37": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D37" - }, - "D40": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D40" - }, - "D41": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D41" - }, - "D42": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D42" - }, - "D43": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D43" - }, - "D44": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D44" - }, - "D45": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D45" - }, - "D46": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D46" - }, - "D47": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D47" - }, - "D50": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D50" - }, - "D51": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D51" - }, - "D52": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D52" - }, - "D53": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D53" - }, - "D54": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D54" - }, - "D55": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D55" - }, - "D56": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D56" - }, - "D57": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D57" - }, - "D60": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D60" - }, - "D61": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D61" - }, - "D62": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D62" - }, - "D63": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D63" - }, - "D64": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D64" - }, - "D65": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D65" - }, - "D66": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D66" - }, - "D67": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D67" - }, - "D70": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D70" - }, - "D71": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D71" - }, - "D72": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D72" - }, - "D73": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D73" - }, - "D74": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D74" - }, - "D75": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D75" - }, - "D76": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D76" - }, - "D77": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D77" - }, - "D80": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D80" - }, - "D81": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D81" - }, - "D82": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D82" - }, - "D83": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D83" - }, - "D84": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D84" - }, - "D85": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D85" - }, - "D86": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D86" - }, - "D87": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D87" - }, - "D90": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D90" - }, - "D91": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D91" - }, - "D92": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D92" - }, - "D93": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D93" - }, - "D94": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D94" - }, - "D95": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D95" - }, - "D96": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D96" - }, - "D97": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D97" - }, - "EMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_EMPTY" - }, - "FULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_FULL" - }, - "Q00": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q00" - }, - "Q01": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q01" - }, - "Q02": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q02" - }, - "Q03": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q03" - }, - "Q10": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q10" - }, - "Q11": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q11" - }, - "Q12": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q12" - }, - "Q13": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q13" - }, - "Q20": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q20" - }, - "Q21": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q21" - }, - "Q22": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q22" - }, - "Q23": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q23" - }, - "Q30": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q30" - }, - "Q31": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q31" - }, - "Q32": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q32" - }, - "Q33": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q33" - }, - "Q40": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q40" - }, - "Q41": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q41" - }, - "Q42": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q42" - }, - "Q43": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q43" - }, - "Q50": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q50" - }, - "Q51": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q51" - }, - "Q52": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q52" - }, - "Q53": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q53" - }, - "Q54": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q54" - }, - "Q55": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q55" - }, - "Q56": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q56" - }, - "Q57": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q57" - }, - "Q60": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q60" - }, - "Q61": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q61" - }, - "Q62": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q62" - }, - "Q63": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q63" - }, - "Q64": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q64" - }, - "Q65": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q65" - }, - "Q66": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q66" - }, - "Q67": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q67" - }, - "Q70": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q70" - }, - "Q71": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q71" - }, - "Q72": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q72" - }, - "Q73": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q73" - }, - "Q80": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q80" - }, - "Q81": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q81" - }, - "Q82": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q82" - }, - "Q83": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q83" - }, - "Q90": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q90" - }, - "Q91": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q91" - }, - "Q92": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q92" - }, - "Q93": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q93" - }, - "RDCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDCLK" - }, - "RDEN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDEN" - }, - "RESET": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RESET" - }, - "SCANENB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANENB" - }, - "SCANIN0": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN0" - }, - "SCANIN1": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN1" - }, - "SCANIN2": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN2" - }, - "SCANIN3": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN3" - }, - "SCANOUT0": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT0" - }, - "SCANOUT1": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT1" - }, - "SCANOUT2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT2" - }, - "SCANOUT3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT3" - }, - "TESTMODEB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTMODEB" - }, - "TESTREADDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTREADDISB" - }, - "TESTWRITEDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTWRITEDISB" - }, - "WRCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WRCLK" - }, - "WREN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WREN" - } - }, - "type": "OUT_FIFO", - "x_coord": 0, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "IN_FIFO", @@ -8003,6 +6504,1505 @@ "type": "IN_FIFO", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y0", + "prefix": "OUT_FIFO", + "site_pins": { + "ALMOSTEMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" + }, + "ALMOSTFULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTFULL" + }, + "D00": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D00" + }, + "D01": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D01" + }, + "D02": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D02" + }, + "D03": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D03" + }, + "D04": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D04" + }, + "D05": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D05" + }, + "D06": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D06" + }, + "D07": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D07" + }, + "D10": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D10" + }, + "D11": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D11" + }, + "D12": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D12" + }, + "D13": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D13" + }, + "D14": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D14" + }, + "D15": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D15" + }, + "D16": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D16" + }, + "D17": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D17" + }, + "D20": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D20" + }, + "D21": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D21" + }, + "D22": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D22" + }, + "D23": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D23" + }, + "D24": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D24" + }, + "D25": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D25" + }, + "D26": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D26" + }, + "D27": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D27" + }, + "D30": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D30" + }, + "D31": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D31" + }, + "D32": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D32" + }, + "D33": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D33" + }, + "D34": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D34" + }, + "D35": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D35" + }, + "D36": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D36" + }, + "D37": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D37" + }, + "D40": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D40" + }, + "D41": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D41" + }, + "D42": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D42" + }, + "D43": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D43" + }, + "D44": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D44" + }, + "D45": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D45" + }, + "D46": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D46" + }, + "D47": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D47" + }, + "D50": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D50" + }, + "D51": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D51" + }, + "D52": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D52" + }, + "D53": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D53" + }, + "D54": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D54" + }, + "D55": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D55" + }, + "D56": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D56" + }, + "D57": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D57" + }, + "D60": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D60" + }, + "D61": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D61" + }, + "D62": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D62" + }, + "D63": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D63" + }, + "D64": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D64" + }, + "D65": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D65" + }, + "D66": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D66" + }, + "D67": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D67" + }, + "D70": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D70" + }, + "D71": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D71" + }, + "D72": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D72" + }, + "D73": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D73" + }, + "D74": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D74" + }, + "D75": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D75" + }, + "D76": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D76" + }, + "D77": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D77" + }, + "D80": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D80" + }, + "D81": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D81" + }, + "D82": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D82" + }, + "D83": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D83" + }, + "D84": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D84" + }, + "D85": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D85" + }, + "D86": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D86" + }, + "D87": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D87" + }, + "D90": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D90" + }, + "D91": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D91" + }, + "D92": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D92" + }, + "D93": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D93" + }, + "D94": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D94" + }, + "D95": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D95" + }, + "D96": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D96" + }, + "D97": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D97" + }, + "EMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_EMPTY" + }, + "FULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_FULL" + }, + "Q00": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q00" + }, + "Q01": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q01" + }, + "Q02": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q02" + }, + "Q03": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q03" + }, + "Q10": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q10" + }, + "Q11": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q11" + }, + "Q12": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q12" + }, + "Q13": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q13" + }, + "Q20": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q20" + }, + "Q21": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q21" + }, + "Q22": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q22" + }, + "Q23": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q23" + }, + "Q30": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q30" + }, + "Q31": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q31" + }, + "Q32": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q32" + }, + "Q33": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q33" + }, + "Q40": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q40" + }, + "Q41": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q41" + }, + "Q42": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q42" + }, + "Q43": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q43" + }, + "Q50": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q50" + }, + "Q51": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q51" + }, + "Q52": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q52" + }, + "Q53": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q53" + }, + "Q54": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q54" + }, + "Q55": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q55" + }, + "Q56": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q56" + }, + "Q57": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q57" + }, + "Q60": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q60" + }, + "Q61": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q61" + }, + "Q62": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q62" + }, + "Q63": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q63" + }, + "Q64": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q64" + }, + "Q65": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q65" + }, + "Q66": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q66" + }, + "Q67": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q67" + }, + "Q70": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q70" + }, + "Q71": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q71" + }, + "Q72": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q72" + }, + "Q73": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q73" + }, + "Q80": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q80" + }, + "Q81": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q81" + }, + "Q82": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q82" + }, + "Q83": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q83" + }, + "Q90": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q90" + }, + "Q91": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q91" + }, + "Q92": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q92" + }, + "Q93": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q93" + }, + "RDCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDCLK" + }, + "RDEN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDEN" + }, + "RESET": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RESET" + }, + "SCANENB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANENB" + }, + "SCANIN0": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN0" + }, + "SCANIN1": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN1" + }, + "SCANIN2": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN2" + }, + "SCANIN3": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN3" + }, + "SCANOUT0": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT0" + }, + "SCANOUT1": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT1" + }, + "SCANOUT2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT2" + }, + "SCANOUT3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT3" + }, + "TESTMODEB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTMODEB" + }, + "TESTREADDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTREADDISB" + }, + "TESTWRITEDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTWRITEDISB" + }, + "WRCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WRCLK" + }, + "WREN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WREN" + } + }, + "type": "OUT_FIFO", + "x_coord": 0, + "y_coord": 0 } ], "tile_type": "CMT_FIFO_R", diff --git a/artix7/tile_type_HCLK_CMT.json b/artix7/tile_type_HCLK_CMT.json index 7a8cebe..b15dbb1 100644 --- a/artix7/tile_type_HCLK_CMT.json +++ b/artix7/tile_type_HCLK_CMT.json @@ -27478,45 +27478,6 @@ } }, "sites": [ - { - "name": "X0Y1", - "prefix": "BUFMRCE", - "site_pins": { - "CE": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMRCE_CEINP1" - }, - "I": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMR_INP1" - }, - "O": { - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "res": "0.0", - "wire": "HCLK_CMT_BUFMRCE_O1" - } - }, - "type": "BUFMRCE", - "x_coord": 0, - "y_coord": 1 - }, { "name": "X0Y0", "prefix": "BUFMRCE", @@ -27555,6 +27516,45 @@ "type": "BUFMRCE", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y1", + "prefix": "BUFMRCE", + "site_pins": { + "CE": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMRCE_CEINP1" + }, + "I": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMR_INP1" + }, + "O": { + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "res": "0.0", + "wire": "HCLK_CMT_BUFMRCE_O1" + } + }, + "type": "BUFMRCE", + "x_coord": 0, + "y_coord": 1 } ], "tile_type": "HCLK_CMT", diff --git a/artix7/tile_type_HCLK_CMT_L.json b/artix7/tile_type_HCLK_CMT_L.json index 0ae0434..1f1a99c 100644 --- a/artix7/tile_type_HCLK_CMT_L.json +++ b/artix7/tile_type_HCLK_CMT_L.json @@ -27478,45 +27478,6 @@ } }, "sites": [ - { - "name": "X0Y1", - "prefix": "BUFMRCE", - "site_pins": { - "CE": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMRCE_CEINP1" - }, - "I": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMR_INP1" - }, - "O": { - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "res": "0.0", - "wire": "HCLK_CMT_BUFMRCE_O1" - } - }, - "type": "BUFMRCE", - "x_coord": 0, - "y_coord": 1 - }, { "name": "X0Y0", "prefix": "BUFMRCE", @@ -27555,6 +27516,45 @@ "type": "BUFMRCE", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y1", + "prefix": "BUFMRCE", + "site_pins": { + "CE": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMRCE_CEINP1" + }, + "I": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMR_INP1" + }, + "O": { + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "res": "0.0", + "wire": "HCLK_CMT_BUFMRCE_O1" + } + }, + "type": "BUFMRCE", + "x_coord": 0, + "y_coord": 1 } ], "tile_type": "HCLK_CMT_L", diff --git a/artix7/tile_type_INT_L.json b/artix7/tile_type_INT_L.json index 8f5cc59..68e74cf 100644 --- a/artix7/tile_type_INT_L.json +++ b/artix7/tile_type_INT_L.json @@ -12856,13 +12856,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -12870,13 +12870,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -12884,13 +12884,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -12898,13 +12898,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -23048,13 +23048,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23062,13 +23062,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23076,13 +23076,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23090,13 +23090,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23356,13 +23356,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23370,13 +23370,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23384,13 +23384,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23398,13 +23398,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23412,13 +23412,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -23426,13 +23426,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23440,13 +23440,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -23454,13 +23454,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23692,13 +23692,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23706,13 +23706,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -23720,13 +23720,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23734,13 +23734,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -45672,13 +45672,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "0", @@ -45686,13 +45686,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LVB_L0" }, @@ -45952,13 +45952,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -45966,13 +45966,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L0" }, @@ -45980,13 +45980,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -45994,13 +45994,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L0" }, @@ -46204,13 +46204,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46232,13 +46232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -46260,13 +46260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "0", @@ -46274,13 +46274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L0" }, @@ -46596,13 +46596,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -46610,13 +46610,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L18" }, @@ -46624,13 +46624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -46638,13 +46638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L18" }, @@ -46848,13 +46848,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46876,13 +46876,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -49116,13 +49116,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -49130,13 +49130,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -49144,13 +49144,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -49158,13 +49158,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -58860,13 +58860,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -58874,13 +58874,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -58888,13 +58888,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -58902,13 +58902,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -60260,13 +60260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -60274,13 +60274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -60288,13 +60288,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -60302,13 +60302,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -61240,13 +61240,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -61254,13 +61254,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -61268,13 +61268,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -61282,13 +61282,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -63424,13 +63424,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -63438,13 +63438,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -63452,13 +63452,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -63466,13 +63466,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -65524,13 +65524,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -65538,13 +65538,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -65552,13 +65552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -65566,13 +65566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -67372,13 +67372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -67386,13 +67386,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -67400,13 +67400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -67414,13 +67414,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -68660,13 +68660,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -68674,13 +68674,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -68688,13 +68688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -68702,13 +68702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -72552,13 +72552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -72566,13 +72566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -72580,13 +72580,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -72594,13 +72594,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -74456,13 +74456,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -74470,13 +74470,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -74484,13 +74484,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -74498,13 +74498,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -78012,13 +78012,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -78026,13 +78026,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -78040,13 +78040,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -78054,13 +78054,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -88232,13 +88232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -88246,13 +88246,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -88260,13 +88260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -88274,13 +88274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -89072,13 +89072,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -89086,13 +89086,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89100,13 +89100,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -89114,13 +89114,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89688,13 +89688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -89702,13 +89702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -89716,13 +89716,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -89730,13 +89730,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -90696,13 +90696,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -90710,13 +90710,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -90724,13 +90724,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -90738,13 +90738,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -96464,13 +96464,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -96478,13 +96478,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -96492,13 +96492,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -96506,13 +96506,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -98536,13 +98536,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -98550,13 +98550,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -98564,13 +98564,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -98578,13 +98578,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -102624,13 +102624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -102638,13 +102638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -102652,13 +102652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -102666,13 +102666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -103940,13 +103940,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -103954,13 +103954,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, @@ -103968,13 +103968,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -103982,13 +103982,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, diff --git a/artix7/tile_type_INT_R.json b/artix7/tile_type_INT_R.json index f2ba91a..0c043be 100644 --- a/artix7/tile_type_INT_R.json +++ b/artix7/tile_type_INT_R.json @@ -12856,13 +12856,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -12870,13 +12870,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -12884,13 +12884,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -12898,13 +12898,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -23048,13 +23048,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23062,13 +23062,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23076,13 +23076,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23090,13 +23090,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23356,13 +23356,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -23370,13 +23370,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23384,13 +23384,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -23398,13 +23398,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23412,13 +23412,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23426,13 +23426,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23440,13 +23440,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23454,13 +23454,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23692,13 +23692,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23706,13 +23706,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -23720,13 +23720,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23734,13 +23734,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -45476,13 +45476,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -45490,13 +45490,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV0" }, @@ -45504,13 +45504,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -45518,13 +45518,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV0" }, @@ -45728,13 +45728,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -45756,13 +45756,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -45784,13 +45784,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "0", @@ -45798,13 +45798,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV0" }, @@ -46120,13 +46120,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -46134,13 +46134,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV18" }, @@ -46148,13 +46148,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -46162,13 +46162,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV18" }, @@ -46372,13 +46372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46400,13 +46400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -46652,13 +46652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "0", @@ -46666,13 +46666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LVB0" }, @@ -49116,13 +49116,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -49130,13 +49130,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -49144,13 +49144,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -49158,13 +49158,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -58860,13 +58860,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -58874,13 +58874,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -58888,13 +58888,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -58902,13 +58902,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -60260,13 +60260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -60274,13 +60274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -60288,13 +60288,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -60302,13 +60302,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -61240,13 +61240,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -61254,13 +61254,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -61268,13 +61268,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -61282,13 +61282,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -63424,13 +63424,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -63438,13 +63438,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -63452,13 +63452,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -63466,13 +63466,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -65524,13 +65524,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -65538,13 +65538,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -65552,13 +65552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -65566,13 +65566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -67372,13 +67372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -67386,13 +67386,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -67400,13 +67400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -67414,13 +67414,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -68660,13 +68660,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -68674,13 +68674,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -68688,13 +68688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -68702,13 +68702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -72552,13 +72552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -72566,13 +72566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -72580,13 +72580,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -72594,13 +72594,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -74456,13 +74456,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -74470,13 +74470,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -74484,13 +74484,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -74498,13 +74498,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -78012,13 +78012,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -78026,13 +78026,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -78040,13 +78040,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -78054,13 +78054,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -88232,13 +88232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -88246,13 +88246,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -88260,13 +88260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -88274,13 +88274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -89072,13 +89072,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -89086,13 +89086,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89100,13 +89100,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -89114,13 +89114,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89688,13 +89688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -89702,13 +89702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -89716,13 +89716,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -89730,13 +89730,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -90696,13 +90696,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -90710,13 +90710,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -90724,13 +90724,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -90738,13 +90738,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -96464,13 +96464,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -96478,13 +96478,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -96492,13 +96492,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -96506,13 +96506,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -98536,13 +98536,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -98550,13 +98550,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -98564,13 +98564,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -98578,13 +98578,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -102624,13 +102624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -102638,13 +102638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -102652,13 +102652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -102666,13 +102666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -103940,13 +103940,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -103954,13 +103954,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, @@ -103968,13 +103968,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -103982,13 +103982,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, diff --git a/artix7/timings/DSP_L.sdf b/artix7/timings/DSP_L.sdf new file mode 100644 index 0000000..4eb87d8 --- /dev/null +++ b/artix7/timings/DSP_L.sdf @@ -0,0 +1,1865 @@ + +(DELAYFILE + (SDFVERSION "3.0") + (TIMESCALE 1ns) + + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN ACOUT (0.132::0.185)(0.317::0.521)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A ACOUT (0.219::0.303)(0.473::0.723)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_1_AREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_2_AREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::2.181)(0.753::5.329)) + (IOPATH ACIN CARRYOUT (0.313::2.046)(0.743::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.324::2.053)(0.731::4.958)) + (IOPATH ACIN P (0.320::2.055)(0.754::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PATTERNDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PCOUT (0.341::2.139)(0.797::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.565::2.181)(1.328::5.329)) + (IOPATH ACIN CARRYOUT (0.550::2.046)(1.317::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.562::2.053)(1.307::4.958)) + (IOPATH ACIN P (0.556::2.055)(1.329::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PATTERNDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PCOUT (0.579::2.139)(1.372::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.977)) + (SETUP ACIN (posedge CLK) (0.977::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-1.047)) + (SETUP ACIN (posedge CLK) (1.047::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::2.298)(0.908::5.531)) + (IOPATH A CARRYOUT (0.397::2.162)(0.900::5.177)) + (IOPATH A MULTSIGNOUT (0.410::2.170)(0.887::5.159)) + (IOPATH A P (0.404::2.173)(0.911::5.201)) + (IOPATH A PATTERNBDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PATTERNDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PCOUT (0.426::2.256)(0.952::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.653::2.298)(1.484::5.531)) + (IOPATH A CARRYOUT (0.637::2.162)(1.474::5.177)) + (IOPATH A MULTSIGNOUT (0.649::2.170)(1.462::5.159)) + (IOPATH A P (0.643::2.173)(1.485::5.201)) + (IOPATH A PATTERNBDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PATTERNDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PCOUT (0.666::2.256)(1.528::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-0.558)) + (SETUP A (posedge CLK) (0.558::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-0.627)) + (SETUP A (posedge CLK) (0.627::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-1.134)) + (SETUP A (posedge CLK) (1.134::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-1.203)) + (SETUP A (posedge CLK) (1.203::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEAD (posedge CLK) (-0.426::-0.038)) + (SETUP CEAD (posedge CLK) (0.038::0.426)) + (HOLD RSTD (posedge CLK) (-0.589::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.589)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.555::-0.034)) + (SETUP ACIN (posedge CLK) (0.034::1.555)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.756::-0.191)) + (SETUP A (posedge CLK) (0.191::1.756)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_DREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-1.626::-0.051)) + (SETUP D (posedge CLK) (0.051::1.626)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_INMODEREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.089::-0.036)) + (SETUP INMODE (posedge CLK) (0.036::2.089)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ALUMODE CARRYCASCOUT (0.417::1.051)(0.917::2.427)) + (IOPATH ALUMODE CARRYOUT (0.401::0.916)(0.907::2.074)) + (IOPATH ALUMODE MULTSIGNOUT (0.413::0.925)(0.895::2.055)) + (IOPATH ALUMODE P (0.407::0.927)(0.918::2.098)) + (IOPATH ALUMODE PATTERNBDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PATTERNDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PCOUT (0.429::1.010)(0.961::2.292)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-1.978::-0.566)) + (SETUP ALUMODE (posedge CLK) (0.566::1.978)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-2.369::-0.635)) + (SETUP ALUMODE (posedge CLK) (0.635::2.369)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-0.246::0.208)) + (SETUP ALUMODE (posedge CLK) (-0.208::0.246)) + (HOLD CEALUMODE (posedge CLK) (-0.411::0.121)) + (SETUP CEALUMODE (posedge CLK) (-0.121::0.411)) + (HOLD RSTALUMODE (posedge CLK) (-0.411::0.074)) + (SETUP RSTALUMODE (posedge CLK) (-0.074::0.411)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.062)(1.036::2.385)) + (IOPATH CLK CARRYOUT (0.458::0.926)(1.025::2.031)) + (IOPATH CLK MULTSIGNOUT (0.470::0.934)(1.014::2.013)) + (IOPATH CLK P (0.465::0.935)(1.037::2.054)) + (IOPATH CLK PATTERNBDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PATTERNDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PCOUT (0.486::1.018)(1.080::2.251)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::1.650)(0.753::3.969)) + (IOPATH ACIN CARRYOUT (0.313::1.514)(0.743::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.324::1.523)(0.731::3.598)) + (IOPATH ACIN P (0.320::1.526)(0.754::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PATTERNDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PCOUT (0.341::1.608)(0.797::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.531::1.650)(1.233::3.969)) + (IOPATH ACIN CARRYOUT (0.516::1.514)(1.223::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.527::1.523)(1.212::3.598)) + (IOPATH ACIN P (0.521::1.526)(1.235::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PATTERNDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PCOUT (0.543::1.608)(1.278::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.883)) + (SETUP ACIN (posedge CLK) (0.883::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.952)) + (SETUP ACIN (posedge CLK) (0.952::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::0.881)(0.753::2.205)) + (IOPATH ACIN CARRYOUT (0.313::0.745)(0.743::1.852)) + (IOPATH ACIN MULTSIGNOUT (0.324::0.754)(0.731::1.834)) + (IOPATH ACIN P (0.320::0.756)(0.754::1.874)) + (IOPATH ACIN PATTERNBDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PATTERNDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PCOUT (0.341::0.838)(0.797::2.071)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.755::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::1.755)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-2.148::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::2.148)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::1.767)(0.908::4.171)) + (IOPATH A CARRYOUT (0.397::1.632)(0.900::3.818)) + (IOPATH A MULTSIGNOUT (0.410::1.639)(0.887::3.799)) + (IOPATH A P (0.404::1.642)(0.911::3.841)) + (IOPATH A PATTERNBDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PATTERNDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PCOUT (0.426::1.725)(0.952::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.618::1.767)(1.389::4.171)) + (IOPATH A CARRYOUT (0.603::1.632)(1.380::3.818)) + (IOPATH A MULTSIGNOUT (0.614::1.639)(1.368::3.799)) + (IOPATH A P (0.609::1.642)(1.391::3.841)) + (IOPATH A PATTERNBDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PATTERNDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PCOUT (0.631::1.725)(1.434::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-0.558)) + (SETUP A (posedge CLK) (0.558::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-0.627)) + (SETUP A (posedge CLK) (0.627::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-1.040)) + (SETUP A (posedge CLK) (1.040::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-1.109)) + (SETUP A (posedge CLK) (1.109::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::0.997)(0.908::2.407)) + (IOPATH A CARRYOUT (0.397::0.863)(0.900::2.053)) + (IOPATH A MULTSIGNOUT (0.410::0.870)(0.887::2.036)) + (IOPATH A P (0.404::0.873)(0.911::2.077)) + (IOPATH A PATTERNBDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PATTERNDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PCOUT (0.426::0.956)(0.952::2.271)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.958::-0.558)) + (SETUP A (posedge CLK) (0.558::1.958)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-2.349::-0.627)) + (SETUP A (posedge CLK) (0.627::2.349)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN BCOUT (0.146::0.180)(0.348::0.490)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B BCOUT (0.235::0.308)(0.515::0.735)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_1_BREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_2_BREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::1.572)(0.749::3.741)) + (IOPATH BCIN CARRYOUT (0.309::1.436)(0.738::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.322::1.445)(0.728::3.369)) + (IOPATH BCIN P (0.316::1.447)(0.750::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PATTERNDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PCOUT (0.339::1.529)(0.793::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.491::1.572)(1.143::3.741)) + (IOPATH BCIN CARRYOUT (0.476::1.436)(1.134::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.487::1.445)(1.122::3.369)) + (IOPATH BCIN P (0.481::1.447)(1.145::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PATTERNDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PCOUT (0.504::1.529)(1.188::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.794)) + (SETUP BCIN (posedge CLK) (0.794::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.863)) + (SETUP BCIN (posedge CLK) (0.863::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::0.864)(0.749::2.141)) + (IOPATH BCIN CARRYOUT (0.309::0.728)(0.738::1.788)) + (IOPATH BCIN MULTSIGNOUT (0.322::0.736)(0.728::1.771)) + (IOPATH BCIN P (0.316::0.737)(0.750::1.812)) + (IOPATH BCIN PATTERNBDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PATTERNDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PCOUT (0.339::0.821)(0.793::2.006)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.692::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::1.692)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-2.085::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::2.085)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::1.699)(0.914::3.986)) + (IOPATH B CARRYOUT (0.400::1.564)(0.904::3.633)) + (IOPATH B MULTSIGNOUT (0.411::1.572)(0.893::3.615)) + (IOPATH B P (0.405::1.575)(0.915::3.656)) + (IOPATH B PATTERNBDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PATTERNDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PCOUT (0.428::1.658)(0.958::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.580::1.699)(1.309::3.986)) + (IOPATH B CARRYOUT (0.565::1.564)(1.299::3.633)) + (IOPATH B MULTSIGNOUT (0.577::1.572)(1.288::3.615)) + (IOPATH B P (0.571::1.575)(1.310::3.656)) + (IOPATH B PATTERNBDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PATTERNDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PCOUT (0.593::1.658)(1.354::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.564)) + (SETUP B (posedge CLK) (0.564::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-0.633)) + (SETUP B (posedge CLK) (0.633::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.959)) + (SETUP B (posedge CLK) (0.959::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-1.028)) + (SETUP B (posedge CLK) (1.028::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::0.991)(0.914::2.387)) + (IOPATH B CARRYOUT (0.400::0.855)(0.904::2.033)) + (IOPATH B MULTSIGNOUT (0.411::0.864)(0.893::2.017)) + (IOPATH B P (0.405::0.865)(0.915::2.057)) + (IOPATH B PATTERNBDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PATTERNDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PCOUT (0.428::0.948)(0.958::2.252)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.938::-0.564)) + (SETUP B (posedge CLK) (0.564::1.938)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-2.331::-0.633)) + (SETUP B (posedge CLK) (0.633::2.331)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYIN CARRYCASCOUT (0.361::0.723)(0.830::1.746)) + (IOPATH CARRYIN CARRYOUT (0.346::0.587)(0.820::1.393)) + (IOPATH CARRYIN MULTSIGNOUT (0.358::0.595)(0.809::1.376)) + (IOPATH CARRYIN P (0.352::0.596)(0.831::1.416)) + (IOPATH CARRYIN PATTERNBDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PATTERNDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PCOUT (0.375::0.680)(0.875::1.613)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.298::-0.480)) + (SETUP CARRYIN (posedge CLK) (0.480::1.298)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.690::-0.549)) + (SETUP CARRYIN (posedge CLK) (0.549::1.690)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-0.299::0.151)) + (SETUP CARRYIN (posedge CLK) (-0.151::0.299)) + (HOLD CECARRYIN (posedge CLK) (-0.665::-0.049)) + (SETUP CECARRYIN (posedge CLK) (0.049::0.665)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.284::0.123)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.123::0.284)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.461::0.885)(1.032::2.094)) + (IOPATH CLK CARRYOUT (0.445::0.749)(1.023::1.740)) + (IOPATH CLK MULTSIGNOUT (0.458::0.757)(1.012::1.723)) + (IOPATH CLK P (0.452::0.758)(1.034::1.764)) + (IOPATH CLK PATTERNBDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PATTERNDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PCOUT (0.473::0.841)(1.077::1.958)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYINSEL CARRYCASCOUT (0.384::0.919)(0.856::2.241)) + (IOPATH CARRYINSEL CARRYOUT (0.369::0.784)(0.846::1.888)) + (IOPATH CARRYINSEL MULTSIGNOUT (0.379::0.791)(0.835::1.870)) + (IOPATH CARRYINSEL P (0.375::0.794)(0.857::1.910)) + (IOPATH CARRYINSEL PATTERNBDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PATTERNDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PCOUT (0.396::0.878)(0.900::2.106)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-1.793::-0.506)) + (SETUP CARRYINSEL (posedge CLK) (0.506::1.793)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-2.184::-0.575)) + (SETUP CARRYINSEL (posedge CLK) (0.575::2.184)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-0.208::0.174)) + (SETUP CARRYINSEL (posedge CLK) (-0.174::0.208)) + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.455::0.981)(1.012::2.257)) + (IOPATH CLK CARRYOUT (0.440::0.844)(1.002::1.903)) + (IOPATH CLK MULTSIGNOUT (0.452::0.853)(0.991::1.884)) + (IOPATH CLK P (0.446::0.854)(1.014::1.927)) + (IOPATH CLK PATTERNBDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PATTERNDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PCOUT (0.468::0.938)(1.057::2.122)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH C CARRYCASCOUT (0.317::0.868)(0.705::2.150)) + (IOPATH C CARRYOUT (0.302::0.732)(0.696::1.797)) + (IOPATH C MULTSIGNOUT (0.314::0.742)(0.684::1.779)) + (IOPATH C P (0.308::0.743)(0.707::1.820)) + (IOPATH C PATTERNBDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PATTERNDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PCOUT (0.331::0.826)(0.750::2.016)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-1.701::-0.355)) + (SETUP C (posedge CLK) (0.355::1.701)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-2.093::-0.424)) + (SETUP C (posedge CLK) (0.424::2.093)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-0.233::0.210)) + (SETUP C (posedge CLK) (-0.210::0.233)) + (HOLD CEC (posedge CLK) (-0.414::0.124)) + (SETUP CEC (posedge CLK) (-0.124::0.414)) + (HOLD RSTC (posedge CLK) (-0.084::0.119)) + (SETUP RSTC (posedge CLK) (-0.119::0.084)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.487::1.077)(1.080::2.621)) + (IOPATH CLK CARRYOUT (0.472::0.941)(1.070::2.268)) + (IOPATH CLK MULTSIGNOUT (0.484::0.950)(1.059::2.251)) + (IOPATH CLK P (0.478::0.953)(1.082::2.291)) + (IOPATH CLK PATTERNBDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PATTERNDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PCOUT (0.501::1.035)(1.125::2.488)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_DREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CED (posedge CLK) (-0.513::-0.054)) + (SETUP CED (posedge CLK) (0.054::0.513)) + (HOLD D (posedge CLK) (-0.413::0.265)) + (SETUP D (posedge CLK) (-0.265::0.413)) + (HOLD RSTD (posedge CLK) (-0.587::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.587)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEINMODE (posedge CLK) (-0.603::0.205)) + (SETUP CEINMODE (posedge CLK) (-0.205::0.603)) + (HOLD INMODE (posedge CLK) (-0.449::0.186)) + (SETUP INMODE (posedge CLK) (-0.186::0.449)) + (HOLD RSTINMODE (posedge CLK) (-0.686::0.074)) + (SETUP RSTINMODE (posedge CLK) (-0.074::0.686)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEM (posedge CLK) (-0.266::0.224)) + (SETUP CEM (posedge CLK) (-0.224::0.266)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.287::0.120)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.120::0.287)) + (HOLD RSTM (posedge CLK) (-0.270::0.274)) + (SETUP RSTM (posedge CLK) (-0.274::0.270)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.045)(1.051::2.634)) + (IOPATH CLK CARRYOUT (0.458::0.909)(1.043::2.282)) + (IOPATH CLK MULTSIGNOUT (0.470::0.918)(1.030::2.263)) + (IOPATH CLK P (0.465::0.919)(1.053::2.305)) + (IOPATH CLK PATTERNBDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PATTERNDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PCOUT (0.486::1.003)(1.095::2.500)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH OPMODE CARRYCASCOUT (0.446::1.127)(0.991::2.657)) + (IOPATH OPMODE CARRYOUT (0.432::0.993)(0.981::2.304)) + (IOPATH OPMODE MULTSIGNOUT (0.443::1.000)(0.970::2.286)) + (IOPATH OPMODE P (0.437::1.003)(0.993::2.326)) + (IOPATH OPMODE PATTERNBDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PATTERNDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PCOUT (0.460::1.086)(1.036::2.522)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.209::-0.640)) + (SETUP OPMODE (posedge CLK) (0.640::2.209)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.600::-0.710)) + (SETUP OPMODE (posedge CLK) (0.710::2.600)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD OPMODE (posedge CLK) (-0.449::0.223)) + (SETUP OPMODE (posedge CLK) (-0.223::0.449)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.492::1.127)(1.093::2.562)) + (IOPATH CLK CARRYOUT (0.477::0.991)(1.084::2.208)) + (IOPATH CLK MULTSIGNOUT (0.489::1.000)(1.071::2.189)) + (IOPATH CLK P (0.483::1.002)(1.095::2.231)) + (IOPATH CLK PATTERNBDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PATTERNDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PCOUT (0.505::1.085)(1.139::2.426)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYCASCIN CARRYCASCOUT (0.271::0.615)(0.605::1.478)) + (IOPATH CARRYCASCIN CARRYOUT (0.255::0.479)(0.596::1.124)) + (IOPATH CARRYCASCIN MULTSIGNOUT (0.267::0.487)(0.585::1.106)) + (IOPATH CARRYCASCIN P (0.262::0.490)(0.607::1.147)) + (IOPATH CARRYCASCIN PATTERNBDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PATTERNDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PCOUT (0.283::0.573)(0.650::1.343)) + (IOPATH MULTSIGNIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH MULTSIGNIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH MULTSIGNIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH MULTSIGNIN P (0.246::0.633)(0.567::1.518)) + (IOPATH MULTSIGNIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PCOUT (0.267::0.716)(0.611::1.713)) + (IOPATH PCIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH PCIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH PCIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH PCIN P (0.246::0.633)(0.567::1.518)) + (IOPATH PCIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PCOUT (0.267::0.716)(0.611::1.713)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.383::0.457)(0.437::0.688)) + (IOPATH CLK CARRYOUT (0.126::0.182)(0.308::0.415)) + (IOPATH CLK MULTSIGNOUT (0.356::0.434)(0.386::0.478)) + (IOPATH CLK OVERFLOW (0.144::0.318)(0.319::0.700)) + (IOPATH CLK P (0.126::0.192)(0.304::0.434)) + (IOPATH CLK PATTERNBDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PATTERNDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PCOUT (0.400::0.434)(0.426::0.478)) + (IOPATH CLK UNDERFLOW (0.136::0.233)(0.302::0.525)) + ) + ) + (TIMINGCHECK + (HOLD CEP (posedge CLK) (-0.524::0.005)) + (SETUP CEP (posedge CLK) (-0.005::0.524)) + (HOLD RSTP (posedge CLK) (-0.347::0.006)) + (SETUP RSTP (posedge CLK) (-0.006::0.347)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.028::-0.256)) + (SETUP CARRYCASCIN (posedge CLK) (0.256::1.028)) + (HOLD MULTSIGNIN (posedge CLK) (-1.400::-0.215)) + (SETUP MULTSIGNIN (posedge CLK) (0.215::1.400)) + (HOLD PCIN (posedge CLK) (-1.400::-0.215)) + (SETUP PCIN (posedge CLK) (0.215::1.400)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.420::-0.325)) + (SETUP CARRYCASCIN (posedge CLK) (0.325::1.420)) + (HOLD MULTSIGNIN (posedge CLK) (-1.792::-0.285)) + (SETUP MULTSIGNIN (posedge CLK) (0.285::1.792)) + (HOLD PCIN (posedge CLK) (-1.792::-0.285)) + (SETUP PCIN (posedge CLK) (0.285::1.792)) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) +) \ No newline at end of file diff --git a/artix7/timings/DSP_R.sdf b/artix7/timings/DSP_R.sdf new file mode 100644 index 0000000..4eb87d8 --- /dev/null +++ b/artix7/timings/DSP_R.sdf @@ -0,0 +1,1865 @@ + +(DELAYFILE + (SDFVERSION "3.0") + (TIMESCALE 1ns) + + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN ACOUT (0.132::0.185)(0.317::0.521)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A ACOUT (0.219::0.303)(0.473::0.723)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_1_AREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_2_AREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::2.181)(0.753::5.329)) + (IOPATH ACIN CARRYOUT (0.313::2.046)(0.743::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.324::2.053)(0.731::4.958)) + (IOPATH ACIN P (0.320::2.055)(0.754::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PATTERNDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PCOUT (0.341::2.139)(0.797::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.565::2.181)(1.328::5.329)) + (IOPATH ACIN CARRYOUT (0.550::2.046)(1.317::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.562::2.053)(1.307::4.958)) + (IOPATH ACIN P (0.556::2.055)(1.329::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PATTERNDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PCOUT (0.579::2.139)(1.372::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.977)) + (SETUP ACIN (posedge CLK) (0.977::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-1.047)) + (SETUP ACIN (posedge CLK) (1.047::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::2.298)(0.908::5.531)) + (IOPATH A CARRYOUT (0.397::2.162)(0.900::5.177)) + (IOPATH A MULTSIGNOUT (0.410::2.170)(0.887::5.159)) + (IOPATH A P (0.404::2.173)(0.911::5.201)) + (IOPATH A PATTERNBDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PATTERNDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PCOUT (0.426::2.256)(0.952::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.653::2.298)(1.484::5.531)) + (IOPATH A CARRYOUT (0.637::2.162)(1.474::5.177)) + (IOPATH A MULTSIGNOUT (0.649::2.170)(1.462::5.159)) + (IOPATH A P (0.643::2.173)(1.485::5.201)) + (IOPATH A PATTERNBDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PATTERNDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PCOUT (0.666::2.256)(1.528::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-0.558)) + (SETUP A (posedge CLK) (0.558::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-0.627)) + (SETUP A (posedge CLK) (0.627::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-1.134)) + (SETUP A (posedge CLK) (1.134::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-1.203)) + (SETUP A (posedge CLK) (1.203::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH D P (0.587::2.142)(1.346::5.070)) + (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH D PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-4.951::-0.994)) + (SETUP D (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-5.342::-1.063)) + (SETUP D (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-3.158::-0.249)) + (SETUP D (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEAD (posedge CLK) (-0.426::-0.038)) + (SETUP CEAD (posedge CLK) (0.038::0.426)) + (HOLD RSTD (posedge CLK) (-0.589::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.589)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.555::-0.034)) + (SETUP ACIN (posedge CLK) (0.034::1.555)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.756::-0.191)) + (SETUP A (posedge CLK) (0.191::1.756)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_DREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-1.626::-0.051)) + (SETUP D (posedge CLK) (0.051::1.626)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_INMODEREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.089::-0.036)) + (SETUP INMODE (posedge CLK) (0.036::2.089)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ALUMODE CARRYCASCOUT (0.417::1.051)(0.917::2.427)) + (IOPATH ALUMODE CARRYOUT (0.401::0.916)(0.907::2.074)) + (IOPATH ALUMODE MULTSIGNOUT (0.413::0.925)(0.895::2.055)) + (IOPATH ALUMODE P (0.407::0.927)(0.918::2.098)) + (IOPATH ALUMODE PATTERNBDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PATTERNDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PCOUT (0.429::1.010)(0.961::2.292)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-1.978::-0.566)) + (SETUP ALUMODE (posedge CLK) (0.566::1.978)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-2.369::-0.635)) + (SETUP ALUMODE (posedge CLK) (0.635::2.369)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-0.246::0.208)) + (SETUP ALUMODE (posedge CLK) (-0.208::0.246)) + (HOLD CEALUMODE (posedge CLK) (-0.411::0.121)) + (SETUP CEALUMODE (posedge CLK) (-0.121::0.411)) + (HOLD RSTALUMODE (posedge CLK) (-0.411::0.074)) + (SETUP RSTALUMODE (posedge CLK) (-0.074::0.411)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.062)(1.036::2.385)) + (IOPATH CLK CARRYOUT (0.458::0.926)(1.025::2.031)) + (IOPATH CLK MULTSIGNOUT (0.470::0.934)(1.014::2.013)) + (IOPATH CLK P (0.465::0.935)(1.037::2.054)) + (IOPATH CLK PATTERNBDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PATTERNDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PCOUT (0.486::1.018)(1.080::2.251)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::1.650)(0.753::3.969)) + (IOPATH ACIN CARRYOUT (0.313::1.514)(0.743::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.324::1.523)(0.731::3.598)) + (IOPATH ACIN P (0.320::1.526)(0.754::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PATTERNDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PCOUT (0.341::1.608)(0.797::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.531::1.650)(1.233::3.969)) + (IOPATH ACIN CARRYOUT (0.516::1.514)(1.223::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.527::1.523)(1.212::3.598)) + (IOPATH ACIN P (0.521::1.526)(1.235::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PATTERNDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PCOUT (0.543::1.608)(1.278::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.883)) + (SETUP ACIN (posedge CLK) (0.883::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.952)) + (SETUP ACIN (posedge CLK) (0.952::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::0.881)(0.753::2.205)) + (IOPATH ACIN CARRYOUT (0.313::0.745)(0.743::1.852)) + (IOPATH ACIN MULTSIGNOUT (0.324::0.754)(0.731::1.834)) + (IOPATH ACIN P (0.320::0.756)(0.754::1.874)) + (IOPATH ACIN PATTERNBDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PATTERNDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PCOUT (0.341::0.838)(0.797::2.071)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.755::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::1.755)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-2.148::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::2.148)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::1.767)(0.908::4.171)) + (IOPATH A CARRYOUT (0.397::1.632)(0.900::3.818)) + (IOPATH A MULTSIGNOUT (0.410::1.639)(0.887::3.799)) + (IOPATH A P (0.404::1.642)(0.911::3.841)) + (IOPATH A PATTERNBDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PATTERNDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PCOUT (0.426::1.725)(0.952::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.618::1.767)(1.389::4.171)) + (IOPATH A CARRYOUT (0.603::1.632)(1.380::3.818)) + (IOPATH A MULTSIGNOUT (0.614::1.639)(1.368::3.799)) + (IOPATH A P (0.609::1.642)(1.391::3.841)) + (IOPATH A PATTERNBDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PATTERNDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PCOUT (0.631::1.725)(1.434::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-0.558)) + (SETUP A (posedge CLK) (0.558::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-0.627)) + (SETUP A (posedge CLK) (0.627::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-1.040)) + (SETUP A (posedge CLK) (1.040::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-1.109)) + (SETUP A (posedge CLK) (1.109::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::0.997)(0.908::2.407)) + (IOPATH A CARRYOUT (0.397::0.863)(0.900::2.053)) + (IOPATH A MULTSIGNOUT (0.410::0.870)(0.887::2.036)) + (IOPATH A P (0.404::0.873)(0.911::2.077)) + (IOPATH A PATTERNBDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PATTERNDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PCOUT (0.426::0.956)(0.952::2.271)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.958::-0.558)) + (SETUP A (posedge CLK) (0.558::1.958)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-2.349::-0.627)) + (SETUP A (posedge CLK) (0.627::2.349)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN BCOUT (0.146::0.180)(0.348::0.490)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B BCOUT (0.235::0.308)(0.515::0.735)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_1_BREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_2_BREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::1.572)(0.749::3.741)) + (IOPATH BCIN CARRYOUT (0.309::1.436)(0.738::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.322::1.445)(0.728::3.369)) + (IOPATH BCIN P (0.316::1.447)(0.750::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PATTERNDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PCOUT (0.339::1.529)(0.793::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.491::1.572)(1.143::3.741)) + (IOPATH BCIN CARRYOUT (0.476::1.436)(1.134::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.487::1.445)(1.122::3.369)) + (IOPATH BCIN P (0.481::1.447)(1.145::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PATTERNDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PCOUT (0.504::1.529)(1.188::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.794)) + (SETUP BCIN (posedge CLK) (0.794::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.863)) + (SETUP BCIN (posedge CLK) (0.863::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::0.864)(0.749::2.141)) + (IOPATH BCIN CARRYOUT (0.309::0.728)(0.738::1.788)) + (IOPATH BCIN MULTSIGNOUT (0.322::0.736)(0.728::1.771)) + (IOPATH BCIN P (0.316::0.737)(0.750::1.812)) + (IOPATH BCIN PATTERNBDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PATTERNDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PCOUT (0.339::0.821)(0.793::2.006)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.692::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::1.692)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-2.085::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::2.085)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::1.699)(0.914::3.986)) + (IOPATH B CARRYOUT (0.400::1.564)(0.904::3.633)) + (IOPATH B MULTSIGNOUT (0.411::1.572)(0.893::3.615)) + (IOPATH B P (0.405::1.575)(0.915::3.656)) + (IOPATH B PATTERNBDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PATTERNDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PCOUT (0.428::1.658)(0.958::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.580::1.699)(1.309::3.986)) + (IOPATH B CARRYOUT (0.565::1.564)(1.299::3.633)) + (IOPATH B MULTSIGNOUT (0.577::1.572)(1.288::3.615)) + (IOPATH B P (0.571::1.575)(1.310::3.656)) + (IOPATH B PATTERNBDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PATTERNDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PCOUT (0.593::1.658)(1.354::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.564)) + (SETUP B (posedge CLK) (0.564::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-0.633)) + (SETUP B (posedge CLK) (0.633::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.959)) + (SETUP B (posedge CLK) (0.959::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-1.028)) + (SETUP B (posedge CLK) (1.028::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::0.991)(0.914::2.387)) + (IOPATH B CARRYOUT (0.400::0.855)(0.904::2.033)) + (IOPATH B MULTSIGNOUT (0.411::0.864)(0.893::2.017)) + (IOPATH B P (0.405::0.865)(0.915::2.057)) + (IOPATH B PATTERNBDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PATTERNDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PCOUT (0.428::0.948)(0.958::2.252)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.938::-0.564)) + (SETUP B (posedge CLK) (0.564::1.938)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-2.331::-0.633)) + (SETUP B (posedge CLK) (0.633::2.331)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYIN CARRYCASCOUT (0.361::0.723)(0.830::1.746)) + (IOPATH CARRYIN CARRYOUT (0.346::0.587)(0.820::1.393)) + (IOPATH CARRYIN MULTSIGNOUT (0.358::0.595)(0.809::1.376)) + (IOPATH CARRYIN P (0.352::0.596)(0.831::1.416)) + (IOPATH CARRYIN PATTERNBDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PATTERNDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PCOUT (0.375::0.680)(0.875::1.613)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.298::-0.480)) + (SETUP CARRYIN (posedge CLK) (0.480::1.298)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.690::-0.549)) + (SETUP CARRYIN (posedge CLK) (0.549::1.690)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-0.299::0.151)) + (SETUP CARRYIN (posedge CLK) (-0.151::0.299)) + (HOLD CECARRYIN (posedge CLK) (-0.665::-0.049)) + (SETUP CECARRYIN (posedge CLK) (0.049::0.665)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.284::0.123)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.123::0.284)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.461::0.885)(1.032::2.094)) + (IOPATH CLK CARRYOUT (0.445::0.749)(1.023::1.740)) + (IOPATH CLK MULTSIGNOUT (0.458::0.757)(1.012::1.723)) + (IOPATH CLK P (0.452::0.758)(1.034::1.764)) + (IOPATH CLK PATTERNBDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PATTERNDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PCOUT (0.473::0.841)(1.077::1.958)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYINSEL CARRYCASCOUT (0.384::0.919)(0.856::2.241)) + (IOPATH CARRYINSEL CARRYOUT (0.369::0.784)(0.846::1.888)) + (IOPATH CARRYINSEL MULTSIGNOUT (0.379::0.791)(0.835::1.870)) + (IOPATH CARRYINSEL P (0.375::0.794)(0.857::1.910)) + (IOPATH CARRYINSEL PATTERNBDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PATTERNDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PCOUT (0.396::0.878)(0.900::2.106)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-1.793::-0.506)) + (SETUP CARRYINSEL (posedge CLK) (0.506::1.793)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-2.184::-0.575)) + (SETUP CARRYINSEL (posedge CLK) (0.575::2.184)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-0.208::0.174)) + (SETUP CARRYINSEL (posedge CLK) (-0.174::0.208)) + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.455::0.981)(1.012::2.257)) + (IOPATH CLK CARRYOUT (0.440::0.844)(1.002::1.903)) + (IOPATH CLK MULTSIGNOUT (0.452::0.853)(0.991::1.884)) + (IOPATH CLK P (0.446::0.854)(1.014::1.927)) + (IOPATH CLK PATTERNBDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PATTERNDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PCOUT (0.468::0.938)(1.057::2.122)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH C CARRYCASCOUT (0.317::0.868)(0.705::2.150)) + (IOPATH C CARRYOUT (0.302::0.732)(0.696::1.797)) + (IOPATH C MULTSIGNOUT (0.314::0.742)(0.684::1.779)) + (IOPATH C P (0.308::0.743)(0.707::1.820)) + (IOPATH C PATTERNBDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PATTERNDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PCOUT (0.331::0.826)(0.750::2.016)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-1.701::-0.355)) + (SETUP C (posedge CLK) (0.355::1.701)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-2.093::-0.424)) + (SETUP C (posedge CLK) (0.424::2.093)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-0.233::0.210)) + (SETUP C (posedge CLK) (-0.210::0.233)) + (HOLD CEC (posedge CLK) (-0.414::0.124)) + (SETUP CEC (posedge CLK) (-0.124::0.414)) + (HOLD RSTC (posedge CLK) (-0.084::0.119)) + (SETUP RSTC (posedge CLK) (-0.119::0.084)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.487::1.077)(1.080::2.621)) + (IOPATH CLK CARRYOUT (0.472::0.941)(1.070::2.268)) + (IOPATH CLK MULTSIGNOUT (0.484::0.950)(1.059::2.251)) + (IOPATH CLK P (0.478::0.953)(1.082::2.291)) + (IOPATH CLK PATTERNBDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PATTERNDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PCOUT (0.501::1.035)(1.125::2.488)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_DREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CED (posedge CLK) (-0.513::-0.054)) + (SETUP CED (posedge CLK) (0.054::0.513)) + (HOLD D (posedge CLK) (-0.413::0.265)) + (SETUP D (posedge CLK) (-0.265::0.413)) + (HOLD RSTD (posedge CLK) (-0.587::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.587)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEINMODE (posedge CLK) (-0.603::0.205)) + (SETUP CEINMODE (posedge CLK) (-0.205::0.603)) + (HOLD INMODE (posedge CLK) (-0.449::0.186)) + (SETUP INMODE (posedge CLK) (-0.186::0.449)) + (HOLD RSTINMODE (posedge CLK) (-0.686::0.074)) + (SETUP RSTINMODE (posedge CLK) (-0.074::0.686)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEM (posedge CLK) (-0.266::0.224)) + (SETUP CEM (posedge CLK) (-0.224::0.266)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.287::0.120)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.120::0.287)) + (HOLD RSTM (posedge CLK) (-0.270::0.274)) + (SETUP RSTM (posedge CLK) (-0.274::0.270)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.045)(1.051::2.634)) + (IOPATH CLK CARRYOUT (0.458::0.909)(1.043::2.282)) + (IOPATH CLK MULTSIGNOUT (0.470::0.918)(1.030::2.263)) + (IOPATH CLK P (0.465::0.919)(1.053::2.305)) + (IOPATH CLK PATTERNBDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PATTERNDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PCOUT (0.486::1.003)(1.095::2.500)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH OPMODE CARRYCASCOUT (0.446::1.127)(0.991::2.657)) + (IOPATH OPMODE CARRYOUT (0.432::0.993)(0.981::2.304)) + (IOPATH OPMODE MULTSIGNOUT (0.443::1.000)(0.970::2.286)) + (IOPATH OPMODE P (0.437::1.003)(0.993::2.326)) + (IOPATH OPMODE PATTERNBDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PATTERNDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PCOUT (0.460::1.086)(1.036::2.522)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.209::-0.640)) + (SETUP OPMODE (posedge CLK) (0.640::2.209)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.600::-0.710)) + (SETUP OPMODE (posedge CLK) (0.710::2.600)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD OPMODE (posedge CLK) (-0.449::0.223)) + (SETUP OPMODE (posedge CLK) (-0.223::0.449)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.492::1.127)(1.093::2.562)) + (IOPATH CLK CARRYOUT (0.477::0.991)(1.084::2.208)) + (IOPATH CLK MULTSIGNOUT (0.489::1.000)(1.071::2.189)) + (IOPATH CLK P (0.483::1.002)(1.095::2.231)) + (IOPATH CLK PATTERNBDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PATTERNDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PCOUT (0.505::1.085)(1.139::2.426)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYCASCIN CARRYCASCOUT (0.271::0.615)(0.605::1.478)) + (IOPATH CARRYCASCIN CARRYOUT (0.255::0.479)(0.596::1.124)) + (IOPATH CARRYCASCIN MULTSIGNOUT (0.267::0.487)(0.585::1.106)) + (IOPATH CARRYCASCIN P (0.262::0.490)(0.607::1.147)) + (IOPATH CARRYCASCIN PATTERNBDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PATTERNDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PCOUT (0.283::0.573)(0.650::1.343)) + (IOPATH MULTSIGNIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH MULTSIGNIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH MULTSIGNIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH MULTSIGNIN P (0.246::0.633)(0.567::1.518)) + (IOPATH MULTSIGNIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PCOUT (0.267::0.716)(0.611::1.713)) + (IOPATH PCIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH PCIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH PCIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH PCIN P (0.246::0.633)(0.567::1.518)) + (IOPATH PCIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PCOUT (0.267::0.716)(0.611::1.713)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.383::0.457)(0.437::0.688)) + (IOPATH CLK CARRYOUT (0.126::0.182)(0.308::0.415)) + (IOPATH CLK MULTSIGNOUT (0.356::0.434)(0.386::0.478)) + (IOPATH CLK OVERFLOW (0.144::0.318)(0.319::0.700)) + (IOPATH CLK P (0.126::0.192)(0.304::0.434)) + (IOPATH CLK PATTERNBDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PATTERNDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PCOUT (0.400::0.434)(0.426::0.478)) + (IOPATH CLK UNDERFLOW (0.136::0.233)(0.302::0.525)) + ) + ) + (TIMINGCHECK + (HOLD CEP (posedge CLK) (-0.524::0.005)) + (SETUP CEP (posedge CLK) (-0.005::0.524)) + (HOLD RSTP (posedge CLK) (-0.347::0.006)) + (SETUP RSTP (posedge CLK) (-0.006::0.347)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.028::-0.256)) + (SETUP CARRYCASCIN (posedge CLK) (0.256::1.028)) + (HOLD MULTSIGNIN (posedge CLK) (-1.400::-0.215)) + (SETUP MULTSIGNIN (posedge CLK) (0.215::1.400)) + (HOLD PCIN (posedge CLK) (-1.400::-0.215)) + (SETUP PCIN (posedge CLK) (0.215::1.400)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.420::-0.325)) + (SETUP CARRYCASCIN (posedge CLK) (0.325::1.420)) + (HOLD MULTSIGNIN (posedge CLK) (-1.792::-0.285)) + (SETUP MULTSIGNIN (posedge CLK) (0.285::1.792)) + (HOLD PCIN (posedge CLK) (-1.792::-0.285)) + (SETUP PCIN (posedge CLK) (0.285::1.792)) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) +) \ No newline at end of file diff --git a/artix7/timings/LIOI3_SING.sdf b/artix7/timings/LIOI3_SING.sdf index 6bcce62..5e0c802 100644 --- a/artix7/timings/LIOI3_SING.sdf +++ b/artix7/timings/LIOI3_SING.sdf @@ -172,6 +172,232 @@ (RECOVERY SR (posedge CK) (0.518::0.596)) ) ) + (CELL + (CELLTYPE "ISERDESE2") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLKDIV Q1 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q2 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q3 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q4 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q5 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q6 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q7 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q8 (0.177::0.204)(0.568::0.653)) + (IOPATH OFB O (0.125::0.144)(0.327::0.376)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD OFB (posedge CLK) (-0.064::-0.072)) + (SETUP OFB (posedge CLK) (0.177::0.203)) + (HOLD OFB (posedge CLKB) (-0.064::-0.072)) + (SETUP OFB (posedge CLKB) (0.177::0.203)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_BOTH") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + (HOLD DDLY (posedge CLKB) (0.142::0.165)) + (SETUP DDLY (posedge CLKB) (-0.029::-0.034)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_IBUF") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + (HOLD D (posedge CLKB) (0.143::0.166)) + (SETUP D (posedge CLKB) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_IFD") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + (HOLD DDLY (posedge CLKB) (0.142::0.165)) + (SETUP DDLY (posedge CLKB) (0.142::0.165)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_NONE") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + (HOLD D (posedge CLKB) (0.143::0.166)) + (SETUP D (posedge CLKB) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD OFB (posedge CLK) (-0.064::-0.072)) + (SETUP OFB (posedge CLK) (0.177::0.203)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_BOTH") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_IBUF") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_IFD") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_NONE") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_INTERFACE_TYPE_NETWORKING") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD BITSLIP (posedge CLKDIV) (0.147::0.169)) + (SETUP BITSLIP (posedge CLKDIV) (0.017::0.019)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_INTERFACE_TYPE_OVERSAMPLE") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLK Q1 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q2 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q3 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q4 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q5 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q6 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q7 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q8 (0.187::0.215)(0.498::0.573)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_BOTH") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH DDLY O (0.047::0.055)(0.120::0.138)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_IBUF") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH DDLY O (0.047::0.055)(0.120::0.138)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_IFD") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH D O (0.047::0.054)(0.112::0.129)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_NONE") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH D O (0.047::0.054)(0.112::0.129)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_NUM_CE_1") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD CE1 (posedge CLK) (-0.065::-0.053)) + (SETUP CE1 (posedge CLK) (0.419::0.713)) + (HOLD CE1 (posedge CLKB) (-0.065::-0.053)) + (SETUP CE1 (posedge CLKB) (0.419::0.713)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_NUM_CE_2") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD CE1 (posedge CLKDIV) (0.295::0.340)) + (SETUP CE1 (posedge CLKDIV) (-0.101::-0.088)) + (HOLD CE1 (posedge CLKDIVP) (0.115::0.132)) + (SETUP CE1 (posedge CLKDIVP) (0.047::0.054)) + (HOLD CE2 (posedge CLKDIV) (0.346::0.398)) + (SETUP CE2 (posedge CLKDIV) (-0.128::-0.112)) + (HOLD CE2 (posedge CLKDIVP) (0.128::0.147)) + (SETUP CE2 (posedge CLKDIVP) (0.016::0.018)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_SRTYPE_SYNC") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD RST (posedge CLKDIV) (-0.174::-0.152)) + (SETUP RST (posedge CLKDIV) (0.450::0.517)) + (HOLD RST (posedge CLKDIVP) (-0.272::-0.237)) + (SETUP RST (posedge CLKDIVP) (0.667::0.767)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_TFB_USED_TRUE") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH TFB O (0.142::0.164)(0.398::0.457)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2DDR3_INTERFACE_TYPE_MEMORY") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLKDIVP Q1 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q2 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q3 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q4 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q5 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q6 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q7 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q8 (0.130::0.150)(0.370::0.425)) + ) + ) + ) (CELL (CELLTYPE "SELMUX2_1") (INSTANCE ILOGICE3) @@ -361,4 +587,126 @@ ) ) ) + (CELL + (CELLTYPE "OSERDESE2") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLK OFB (0.177::0.204)(0.449::0.472)) + (IOPATH CLK OQ (0.177::0.204)(0.449::0.472)) + (IOPATH CLK TFB (0.192::0.221)(0.480::0.552)) + (IOPATH CLK TQ (0.192::0.221)(0.480::0.552)) + ) + ) + (TIMINGCHECK + (HOLD D1 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D1 (posedge CLKDIV) (0.511::0.625)) + (HOLD D2 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D2 (posedge CLKDIV) (0.511::0.625)) + (HOLD D3 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D3 (posedge CLKDIV) (0.511::0.625)) + (HOLD D4 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D4 (posedge CLKDIV) (0.511::0.625)) + (HOLD D5 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D5 (posedge CLKDIV) (0.511::0.625)) + (HOLD D6 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D6 (posedge CLKDIV) (0.511::0.625)) + (HOLD D7 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D7 (posedge CLKDIV) (0.511::0.625)) + (HOLD D8 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D8 (posedge CLKDIV) (0.511::0.625)) + (HOLD OCE (posedge CLK) (-0.059::-0.051)) + (SETUP OCE (posedge CLK) (0.380::0.504)) + (HOLD TCE (posedge CLK) (-0.068::-0.060)) + (SETUP TCE (posedge CLK) (0.389::0.505)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_BUF") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH T1 TQ (0.350::0.403)(0.958::1.102)) + ) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_DDR_TRISTATE_WIDTH_1") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLK) (-0.302::-0.264)) + (SETUP T1 (posedge CLK) (0.697::0.873)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_DDR_TRISTATE_WIDTH_4") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T1 (posedge CLKDIV) (0.334::0.385)) + (HOLD T2 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T2 (posedge CLKDIV) (0.334::0.385)) + (HOLD T3 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T3 (posedge CLKDIV) (0.334::0.385)) + (HOLD T4 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T4 (posedge CLKDIV) (0.334::0.385)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_SDR_TRISTATE_WIDTH_1") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLK) (-0.302::-0.264)) + (SETUP T1 (posedge CLK) (0.697::0.873)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_SDR_TRISTATE_WIDTH_4") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T1 (posedge CLKDIV) (0.334::0.385)) + (HOLD T2 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T2 (posedge CLKDIV) (0.334::0.385)) + (HOLD T3 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T3 (posedge CLKDIV) (0.334::0.385)) + (HOLD T4 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T4 (posedge CLKDIV) (0.334::0.385)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_SELFHEAL_TRUE") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLKDIV IOCLKGLITCH (0.196::0.226)(0.493::0.567)) + ) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_SRTYPE_SYNC") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD RST (posedge CLKDIV) (-0.004::-0.004)) + (SETUP RST (posedge CLKDIV) (0.703::0.849)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_TBYTE_CTL_TRUE") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH TBYTEIN TQ (0.000::0.000)(0.000::0.000)) + ) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_TBYTE_SRC_TRUE") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH T1 TBYTEOUT (0.000::0.000)(0.000::0.000)) + ) + ) + ) ) \ No newline at end of file diff --git a/artix7/xc7a35tftg256-1/package_pins.csv b/artix7/xc7a35tftg256-1/package_pins.csv new file mode 100644 index 0000000..4a93b60 --- /dev/null +++ b/artix7/xc7a35tftg256-1/package_pins.csv @@ -0,0 +1,173 @@ +pin,bank,site,tile,pin_function +A2,35,IOB_X1Y83,RIOB33_X43Y83,IO_L8N_T1_AD14N_35 +A3,35,IOB_X1Y91,RIOB33_X43Y91,IO_L4N_T0_35 +A4,35,IOB_X1Y93,RIOB33_X43Y93,IO_L3N_T0_DQS_AD5N_35 +A5,35,IOB_X1Y94,RIOB33_X43Y93,IO_L3P_T0_DQS_AD5P_35 +A7,35,IOB_X1Y97,RIOB33_X43Y97,IO_L1N_T0_AD4N_35 +A8,15,IOB_X0Y96,LIOB33_X0Y95,IO_L2P_T0_AD8P_15 +A9,15,IOB_X0Y95,LIOB33_X0Y95,IO_L2N_T0_AD8N_15 +A10,15,IOB_X0Y93,LIOB33_X0Y93,IO_L3N_T0_DQS_AD1N_15 +A12,15,IOB_X0Y89,LIOB33_X0Y89,IO_L5N_T0_AD9N_15 +A13,15,IOB_X0Y86,LIOB33_X0Y85,IO_L7P_T1_AD2P_15 +A14,15,IOB_X0Y85,LIOB33_X0Y85,IO_L7N_T1_AD2N_15 +A15,15,IOB_X0Y81,LIOB33_X0Y81,IO_L9N_T1_DQS_AD3N_15 +B1,35,IOB_X1Y81,RIOB33_X43Y81,IO_L9N_T1_DQS_AD7N_35 +B2,35,IOB_X1Y84,RIOB33_X43Y83,IO_L8P_T1_AD14P_35 +B4,35,IOB_X1Y92,RIOB33_X43Y91,IO_L4P_T0_35 +B5,35,IOB_X1Y95,RIOB33_X43Y95,IO_L2N_T0_AD12N_35 +B6,35,IOB_X1Y96,RIOB33_X43Y95,IO_L2P_T0_AD12P_35 +B7,35,IOB_X1Y98,RIOB33_X43Y97,IO_L1P_T0_AD4P_35 +B9,15,IOB_X0Y94,LIOB33_X0Y93,IO_L3P_T0_DQS_AD1P_15 +B10,15,IOB_X0Y92,LIOB33_X0Y91,IO_L4P_T0_15 +B11,15,IOB_X0Y91,LIOB33_X0Y91,IO_L4N_T0_15 +B12,15,IOB_X0Y90,LIOB33_X0Y89,IO_L5P_T0_AD9P_15 +B14,15,IOB_X0Y83,LIOB33_X0Y83,IO_L8N_T1_AD10N_15 +B15,15,IOB_X0Y82,LIOB33_X0Y81,IO_L9P_T1_DQS_AD3P_15 +B16,15,IOB_X0Y79,LIOB33_X0Y79,IO_L10N_T1_AD11N_15 +C1,35,IOB_X1Y82,RIOB33_X43Y81,IO_L9P_T1_DQS_AD7P_35 +C2,35,IOB_X1Y85,RIOB33_X43Y85,IO_L7N_T1_AD6N_35 +C3,35,IOB_X1Y86,RIOB33_X43Y85,IO_L7P_T1_AD6P_35 +C4,35,IOB_X1Y75,RIOB33_X43Y75,IO_L12N_T1_MRCC_35 +C6,35,IOB_X1Y89,RIOB33_X43Y89,IO_L5N_T0_AD13N_35 +C7,35,IOB_X1Y90,RIOB33_X43Y89,IO_L5P_T0_AD13P_35 +C8,15,IOB_X0Y98,LIOB33_X0Y97,IO_L1P_T0_AD0P_15 +C9,15,IOB_X0Y97,LIOB33_X0Y97,IO_L1N_T0_AD0N_15 +C11,15,IOB_X0Y78,LIOB33_X0Y77,IO_L11P_T1_SRCC_15 +C12,15,IOB_X0Y77,LIOB33_X0Y77,IO_L11N_T1_SRCC_15 +C13,15,IOB_X0Y75,LIOB33_X0Y75,IO_L12N_T1_MRCC_15 +C14,15,IOB_X0Y84,LIOB33_X0Y83,IO_L8P_T1_AD10P_15 +C16,15,IOB_X0Y80,LIOB33_X0Y79,IO_L10P_T1_AD11P_15 +D1,35,IOB_X1Y79,RIOB33_X43Y79,IO_L10N_T1_AD15N_35 +D3,35,IOB_X1Y77,RIOB33_X43Y77,IO_L11N_T1_SRCC_35 +D4,35,IOB_X1Y76,RIOB33_X43Y75,IO_L12P_T1_MRCC_35 +D5,35,IOB_X1Y87,RIOB33_X43Y87,IO_L6N_T0_VREF_35 +D6,35,IOB_X1Y88,RIOB33_X43Y87,IO_L6P_T0_35 +D8,15,IOB_X0Y88,LIOB33_X0Y87,IO_L6P_T0_15 +D9,15,IOB_X0Y87,LIOB33_X0Y87,IO_L6N_T0_VREF_15 +D10,15,IOB_X0Y99,LIOB33_SING_X0Y99,IO_0_15 +D11,15,IOB_X0Y71,LIOB33_X0Y71,IO_L14N_T2_SRCC_15 +D13,15,IOB_X0Y76,LIOB33_X0Y75,IO_L12P_T1_MRCC_15 +D14,15,IOB_X0Y70,LIOB33_X0Y69,IO_L15P_T2_DQS_15 +D15,15,IOB_X0Y69,LIOB33_X0Y69,IO_L15N_T2_DQS_ADV_B_15 +D16,15,IOB_X0Y65,LIOB33_X0Y65,IO_L17N_T2_A25_15 +E1,35,IOB_X1Y69,RIOB33_X43Y69,IO_L15N_T2_DQS_35 +E2,35,IOB_X1Y80,RIOB33_X43Y79,IO_L10P_T1_AD15P_35 +E3,35,IOB_X1Y78,RIOB33_X43Y77,IO_L11P_T1_SRCC_35 +E5,35,IOB_X1Y73,RIOB33_X43Y73,IO_L13N_T2_MRCC_35 +E6,35,IOB_X1Y99,RIOB33_SING_X43Y99,IO_0_35 +E11,15,IOB_X0Y72,LIOB33_X0Y71,IO_L14P_T2_SRCC_15 +E12,15,IOB_X0Y74,LIOB33_X0Y73,IO_L13P_T2_MRCC_15 +E13,15,IOB_X0Y73,LIOB33_X0Y73,IO_L13N_T2_MRCC_15 +E15,15,IOB_X0Y63,LIOB33_X0Y63,IO_L18N_T2_A23_15 +E16,15,IOB_X0Y66,LIOB33_X0Y65,IO_L17P_T2_A26_15 +F2,35,IOB_X1Y70,RIOB33_X43Y69,IO_L15P_T2_DQS_35 +F3,35,IOB_X1Y71,RIOB33_X43Y71,IO_L14N_T2_SRCC_35 +F4,35,IOB_X1Y72,RIOB33_X43Y71,IO_L14P_T2_SRCC_35 +F5,35,IOB_X1Y74,RIOB33_X43Y73,IO_L13P_T2_MRCC_35 +F12,15,IOB_X0Y68,LIOB33_X0Y67,IO_L16P_T2_A28_15 +F13,15,IOB_X0Y67,LIOB33_X0Y67,IO_L16N_T2_A27_15 +F14,15,IOB_X0Y57,LIOB33_X0Y57,IO_L21N_T3_DQS_A18_15 +F15,15,IOB_X0Y64,LIOB33_X0Y63,IO_L18P_T2_A24_15 +G1,35,IOB_X1Y65,RIOB33_X43Y65,IO_L17N_T2_35 +G2,35,IOB_X1Y66,RIOB33_X43Y65,IO_L17P_T2_35 +G4,35,IOB_X1Y67,RIOB33_X43Y67,IO_L16N_T2_35 +G5,35,IOB_X1Y68,RIOB33_X43Y67,IO_L16P_T2_35 +G11,15,IOB_X0Y50,LIOB33_SING_X0Y50,IO_25_15 +G12,15,IOB_X0Y61,LIOB33_X0Y61,IO_L19N_T3_A21_VREF_15 +G14,15,IOB_X0Y58,LIOB33_X0Y57,IO_L21P_T3_DQS_15 +G15,15,IOB_X0Y51,LIOB33_X0Y51,IO_L24N_T3_RS0_15 +G16,15,IOB_X0Y55,LIOB33_X0Y55,IO_L22N_T3_A16_15 +H1,35,IOB_X1Y59,RIOB33_X43Y59,IO_L20N_T3_35 +H2,35,IOB_X1Y60,RIOB33_X43Y59,IO_L20P_T3_35 +H3,35,IOB_X1Y57,RIOB33_X43Y57,IO_L21N_T3_DQS_35 +H4,35,IOB_X1Y63,RIOB33_X43Y63,IO_L18N_T2_35 +H5,35,IOB_X1Y64,RIOB33_X43Y63,IO_L18P_T2_35 +H8,0,IPAD_X0Y0,MONITOR_BOT_X46Y79,VP_0 +H11,15,IOB_X0Y62,LIOB33_X0Y61,IO_L19P_T3_A22_15 +H12,15,IOB_X0Y60,LIOB33_X0Y59,IO_L20P_T3_A20_15 +H13,15,IOB_X0Y59,LIOB33_X0Y59,IO_L20N_T3_A19_15 +H14,15,IOB_X0Y52,LIOB33_X0Y51,IO_L24P_T3_RS1_15 +H16,15,IOB_X0Y56,LIOB33_X0Y55,IO_L22P_T3_A17_15 +J1,35,IOB_X1Y55,RIOB33_X43Y55,IO_L22N_T3_35 +J3,35,IOB_X1Y58,RIOB33_X43Y57,IO_L21P_T3_DQS_35 +J4,35,IOB_X1Y61,RIOB33_X43Y61,IO_L19N_T3_VREF_35 +J5,35,IOB_X1Y62,RIOB33_X43Y61,IO_L19P_T3_35 +J7,0,IPAD_X0Y1,MONITOR_BOT_X46Y79,VN_0 +J13,14,IOB_X0Y48,LIOB33_X0Y47,IO_L1P_T0_D00_MOSI_14 +J14,14,IOB_X0Y47,LIOB33_X0Y47,IO_L1N_T0_D01_DIN_14 +J15,15,IOB_X0Y54,LIOB33_X0Y53,IO_L23P_T3_FOE_B_15 +J16,15,IOB_X0Y53,LIOB33_X0Y53,IO_L23N_T3_FWE_B_15 +K1,35,IOB_X1Y56,RIOB33_X43Y55,IO_L22P_T3_35 +K2,35,IOB_X1Y51,RIOB33_X43Y51,IO_L24N_T3_35 +K3,35,IOB_X1Y52,RIOB33_X43Y51,IO_L24P_T3_35 +K5,35,IOB_X1Y50,RIOB33_SING_X43Y50,IO_25_35 +K12,14,IOB_X0Y49,LIOB33_SING_X0Y49,IO_0_14 +K13,14,IOB_X0Y40,LIOB33_X0Y39,IO_L5P_T0_D06_14 +K15,14,IOB_X0Y46,LIOB33_X0Y45,IO_L2P_T0_D02_14 +K16,14,IOB_X0Y45,LIOB33_X0Y45,IO_L2N_T0_D03_14 +L2,35,IOB_X1Y53,RIOB33_X43Y53,IO_L23N_T3_35 +L3,35,IOB_X1Y54,RIOB33_X43Y53,IO_L23P_T3_35 +L4,34,IOB_X1Y48,RIOB33_X43Y47,IO_L1P_T0_34 +L5,34,IOB_X1Y49,RIOB33_SING_X43Y49,IO_0_34 +L12,14,IOB_X0Y38,LIOB33_X0Y37,IO_L6P_T0_FCS_B_14 +L13,14,IOB_X0Y39,LIOB33_X0Y39,IO_L5N_T0_D07_14 +L14,14,IOB_X0Y42,LIOB33_X0Y41,IO_L4P_T0_D04_14 +L15,14,IOB_X0Y44,LIOB33_X0Y43,IO_L3P_T0_DQS_PUDC_B_14 +M1,34,IOB_X1Y45,RIOB33_X43Y45,IO_L2N_T0_34 +M2,34,IOB_X1Y46,RIOB33_X43Y45,IO_L2P_T0_34 +M4,34,IOB_X1Y47,RIOB33_X43Y47,IO_L1N_T0_34 +M5,34,IOB_X1Y38,RIOB33_X43Y37,IO_L6P_T0_34 +M6,14,IOB_X0Y12,LIOB33_X0Y11,IO_L19P_T3_A10_D26_14 +M12,14,IOB_X0Y37,LIOB33_X0Y37,IO_L6N_T0_D08_VREF_14 +M14,14,IOB_X0Y41,LIOB33_X0Y41,IO_L4N_T0_D05_14 +M15,14,IOB_X0Y43,LIOB33_X0Y43,IO_L3N_T0_DQS_EMCCLK_14 +M16,14,IOB_X0Y36,LIOB33_X0Y35,IO_L7P_T1_D09_14 +N1,34,IOB_X1Y42,RIOB33_X43Y41,IO_L4P_T0_34 +N2,34,IOB_X1Y43,RIOB33_X43Y43,IO_L3N_T0_DQS_34 +N3,34,IOB_X1Y44,RIOB33_X43Y43,IO_L3P_T0_DQS_34 +N4,34,IOB_X1Y37,RIOB33_X43Y37,IO_L6N_T0_VREF_34 +N6,14,IOB_X0Y11,LIOB33_X0Y11,IO_L19N_T3_A09_D25_VREF_14 +N9,14,IOB_X0Y14,LIOB33_X0Y13,IO_L18P_T2_A12_D28_14 +N11,14,IOB_X0Y24,LIOB33_X0Y23,IO_L13P_T2_MRCC_14 +N12,14,IOB_X0Y23,LIOB33_X0Y23,IO_L13N_T2_MRCC_14 +N13,14,IOB_X0Y28,LIOB33_X0Y27,IO_L11P_T1_SRCC_14 +N14,14,IOB_X0Y26,LIOB33_X0Y25,IO_L12P_T1_MRCC_14 +N16,14,IOB_X0Y35,LIOB33_X0Y35,IO_L7N_T1_D10_14 +P1,34,IOB_X1Y41,RIOB33_X43Y41,IO_L4N_T0_34 +P3,34,IOB_X1Y39,RIOB33_X43Y39,IO_L5N_T0_34 +P4,34,IOB_X1Y40,RIOB33_X43Y39,IO_L5P_T0_34 +P5,34,IOB_X1Y30,RIOB33_X43Y29,IO_L10P_T1_34 +P6,14,IOB_X0Y0,LIOB33_SING_X0Y0,IO_25_14 +P8,14,IOB_X0Y10,LIOB33_X0Y9,IO_L20P_T3_A08_D24_14 +P9,14,IOB_X0Y13,LIOB33_X0Y13,IO_L18N_T2_A11_D27_14 +P10,14,IOB_X0Y22,LIOB33_X0Y21,IO_L14P_T2_SRCC_14 +P11,14,IOB_X0Y21,LIOB33_X0Y21,IO_L14N_T2_SRCC_14 +P13,14,IOB_X0Y27,LIOB33_X0Y27,IO_L11N_T1_SRCC_14 +P14,14,IOB_X0Y25,LIOB33_X0Y25,IO_L12N_T1_MRCC_14 +P15,14,IOB_X0Y34,LIOB33_X0Y33,IO_L8P_T1_D11_14 +P16,14,IOB_X0Y33,LIOB33_X0Y33,IO_L8N_T1_D12_14 +R1,34,IOB_X1Y35,RIOB33_X43Y35,IO_L7N_T1_34 +R2,34,IOB_X1Y36,RIOB33_X43Y35,IO_L7P_T1_34 +R3,34,IOB_X1Y34,RIOB33_X43Y33,IO_L8P_T1_34 +R5,14,IOB_X0Y4,LIOB33_X0Y3,IO_L23P_T3_A03_D19_14 +R6,14,IOB_X0Y2,LIOB33_X0Y1,IO_L24P_T3_A01_D17_14 +R7,14,IOB_X0Y1,LIOB33_X0Y1,IO_L24N_T3_A00_D16_14 +R8,14,IOB_X0Y9,LIOB33_X0Y9,IO_L20N_T3_A07_D23_14 +R10,14,IOB_X0Y16,LIOB33_X0Y15,IO_L17P_T2_A14_D30_14 +R11,14,IOB_X0Y15,LIOB33_X0Y15,IO_L17N_T2_A13_D29_14 +R12,14,IOB_X0Y20,LIOB33_X0Y19,IO_L15P_T2_DQS_RDWR_B_14 +R13,14,IOB_X0Y18,LIOB33_X0Y17,IO_L16P_T2_CSI_B_14 +R15,14,IOB_X0Y32,LIOB33_X0Y31,IO_L9P_T1_DQS_14 +R16,14,IOB_X0Y31,LIOB33_X0Y31,IO_L9N_T1_DQS_D13_14 +T2,34,IOB_X1Y33,RIOB33_X43Y33,IO_L8N_T1_34 +T3,34,IOB_X1Y31,RIOB33_X43Y31,IO_L9N_T1_DQS_34 +T4,34,IOB_X1Y32,RIOB33_X43Y31,IO_L9P_T1_DQS_34 +T5,14,IOB_X0Y3,LIOB33_X0Y3,IO_L23N_T3_A02_D18_14 +T7,14,IOB_X0Y8,LIOB33_X0Y7,IO_L21P_T3_DQS_14 +T8,14,IOB_X0Y7,LIOB33_X0Y7,IO_L21N_T3_DQS_A06_D22_14 +T9,14,IOB_X0Y6,LIOB33_X0Y5,IO_L22P_T3_A05_D21_14 +T10,14,IOB_X0Y5,LIOB33_X0Y5,IO_L22N_T3_A04_D20_14 +T12,14,IOB_X0Y19,LIOB33_X0Y19,IO_L15N_T2_DQS_DOUT_CSO_B_14 +T13,14,IOB_X0Y17,LIOB33_X0Y17,IO_L16N_T2_A15_D31_14 +T14,14,IOB_X0Y30,LIOB33_X0Y29,IO_L10P_T1_D14_14 +T15,14,IOB_X0Y29,LIOB33_X0Y29,IO_L10N_T1_D15_14 diff --git a/artix7/xc7a35tftg256-1/part.json b/artix7/xc7a35tftg256-1/part.json new file mode 100644 index 0000000..f1a2510 --- /dev/null +++ b/artix7/xc7a35tftg256-1/part.json @@ -0,0 +1,458 @@ +{ + "global_clock_regions": { + "bottom": { + "rows": { + "0": { + "configuration_buses": { + "BLOCK_RAM": { + "configuration_columns": { + "0": { + "frame_count": 128 + }, + "1": { + "frame_count": 128 + }, + "2": { + "frame_count": 128 + } + } + }, + "CLB_IO_CLK": { + "configuration_columns": { + "0": { + "frame_count": 42 + }, + "1": { + "frame_count": 30 + }, + "2": { + "frame_count": 36 + }, + "3": { + "frame_count": 36 + }, + "4": { + "frame_count": 36 + }, + "5": { + "frame_count": 36 + }, + "6": { + "frame_count": 28 + }, + "7": { + "frame_count": 36 + }, + "8": { + "frame_count": 36 + }, + "9": { + "frame_count": 28 + }, + "10": { + "frame_count": 36 + }, + "11": { + "frame_count": 36 + }, + "12": { + "frame_count": 36 + }, + "13": { + "frame_count": 36 + }, + "14": { + "frame_count": 36 + }, + "15": { + "frame_count": 36 + }, + "16": { + "frame_count": 36 + }, + "17": { + "frame_count": 36 + }, + "18": { + "frame_count": 30 + }, + "19": { + "frame_count": 36 + }, + "20": { + "frame_count": 36 + }, + "21": { + "frame_count": 36 + }, + "22": { + "frame_count": 36 + }, + "23": { + "frame_count": 30 + }, + "24": { + "frame_count": 36 + }, + "25": { + "frame_count": 36 + }, + "26": { + "frame_count": 36 + }, + "27": { + "frame_count": 36 + }, + "28": { + "frame_count": 36 + }, + "29": { + "frame_count": 36 + }, + "30": { + "frame_count": 28 + }, + "31": { + "frame_count": 36 + }, + "32": { + "frame_count": 36 + }, + "33": { + "frame_count": 36 + }, + "34": { + "frame_count": 28 + }, + "35": { + "frame_count": 36 + }, + "36": { + "frame_count": 36 + }, + "37": { + "frame_count": 28 + }, + "38": { + "frame_count": 36 + }, + "39": { + "frame_count": 36 + }, + "40": { + "frame_count": 36 + }, + "41": { + "frame_count": 36 + }, + "42": { + "frame_count": 30 + }, + "43": { + "frame_count": 42 + } + } + } + } + } + } + }, + "top": { + "rows": { + "0": { + "configuration_buses": { + "BLOCK_RAM": { + "configuration_columns": { + "0": { + "frame_count": 128 + }, + "1": { + "frame_count": 128 + }, + "2": { + "frame_count": 128 + } + } + }, + "CLB_IO_CLK": { + "configuration_columns": { + "0": { + "frame_count": 42 + }, + "1": { + "frame_count": 30 + }, + "2": { + "frame_count": 36 + }, + "3": { + "frame_count": 36 + }, + "4": { + "frame_count": 36 + }, + "5": { + "frame_count": 36 + }, + "6": { + "frame_count": 28 + }, + "7": { + "frame_count": 36 + }, + "8": { + "frame_count": 36 + }, + "9": { + "frame_count": 28 + }, + "10": { + "frame_count": 36 + }, + "11": { + "frame_count": 36 + }, + "12": { + "frame_count": 36 + }, + "13": { + "frame_count": 36 + }, + "14": { + "frame_count": 36 + }, + "15": { + "frame_count": 36 + }, + "16": { + "frame_count": 36 + }, + "17": { + "frame_count": 36 + }, + "18": { + "frame_count": 30 + }, + "19": { + "frame_count": 36 + }, + "20": { + "frame_count": 36 + }, + "21": { + "frame_count": 36 + }, + "22": { + "frame_count": 36 + }, + "23": { + "frame_count": 30 + }, + "24": { + "frame_count": 36 + }, + "25": { + "frame_count": 36 + }, + "26": { + "frame_count": 36 + }, + "27": { + "frame_count": 36 + }, + "28": { + "frame_count": 36 + }, + "29": { + "frame_count": 36 + }, + "30": { + "frame_count": 28 + }, + "31": { + "frame_count": 36 + }, + "32": { + "frame_count": 36 + }, + "33": { + "frame_count": 36 + }, + "34": { + "frame_count": 28 + }, + "35": { + "frame_count": 36 + }, + "36": { + "frame_count": 36 + }, + "37": { + "frame_count": 28 + }, + "38": { + "frame_count": 36 + }, + "39": { + "frame_count": 36 + }, + "40": { + "frame_count": 36 + }, + "41": { + "frame_count": 36 + }, + "42": { + "frame_count": 30 + }, + "43": { + "frame_count": 42 + } + } + } + } + }, + "1": { + "configuration_buses": { + "BLOCK_RAM": { + "configuration_columns": { + "0": { + "frame_count": 128 + }, + "1": { + "frame_count": 128 + } + } + }, + "CLB_IO_CLK": { + "configuration_columns": { + "0": { + "frame_count": 42 + }, + "1": { + "frame_count": 30 + }, + "2": { + "frame_count": 36 + }, + "3": { + "frame_count": 36 + }, + "4": { + "frame_count": 36 + }, + "5": { + "frame_count": 36 + }, + "6": { + "frame_count": 28 + }, + "7": { + "frame_count": 36 + }, + "8": { + "frame_count": 36 + }, + "9": { + "frame_count": 28 + }, + "10": { + "frame_count": 36 + }, + "11": { + "frame_count": 36 + }, + "12": { + "frame_count": 36 + }, + "13": { + "frame_count": 36 + }, + "14": { + "frame_count": 36 + }, + "15": { + "frame_count": 36 + }, + "16": { + "frame_count": 36 + }, + "17": { + "frame_count": 36 + }, + "18": { + "frame_count": 30 + }, + "19": { + "frame_count": 36 + }, + "20": { + "frame_count": 36 + }, + "21": { + "frame_count": 36 + }, + "22": { + "frame_count": 36 + }, + "23": { + "frame_count": 30 + }, + "24": { + "frame_count": 36 + }, + "25": { + "frame_count": 36 + }, + "26": { + "frame_count": 36 + }, + "27": { + "frame_count": 36 + }, + "28": { + "frame_count": 36 + }, + "29": { + "frame_count": 36 + }, + "30": { + "frame_count": 28 + }, + "31": { + "frame_count": 36 + }, + "32": { + "frame_count": 36 + }, + "33": { + "frame_count": 36 + }, + "34": { + "frame_count": 28 + }, + "35": { + "frame_count": 36 + }, + "36": { + "frame_count": 36 + }, + "37": { + "frame_count": 32 + } + } + } + } + } + } + } + }, + "idcode": 56807571, + "iobanks": { + "0": "X1Y78", + "14": "X1Y26", + "15": "X1Y78", + "34": "X113Y26", + "35": "X113Y78" + } +} diff --git a/artix7/xc7a35tftg256-1/part.yaml b/artix7/xc7a35tftg256-1/part.yaml new file mode 100644 index 0000000..ad2e0ba --- /dev/null +++ b/artix7/xc7a35tftg256-1/part.yaml @@ -0,0 +1,293 @@ +! +idcode: 0x362d093 +global_clock_regions: + top: ! + rows: + 0: ! + configuration_buses: + CLB_IO_CLK: ! + configuration_columns: + 0: ! + frame_count: 42 + 1: ! + frame_count: 30 + 2: ! + frame_count: 36 + 3: ! + frame_count: 36 + 4: ! + frame_count: 36 + 5: ! + frame_count: 36 + 6: ! + frame_count: 28 + 7: ! + frame_count: 36 + 8: ! + frame_count: 36 + 9: ! + frame_count: 28 + 10: ! + frame_count: 36 + 11: ! + frame_count: 36 + 12: ! + frame_count: 36 + 13: ! + frame_count: 36 + 14: ! + frame_count: 36 + 15: ! + frame_count: 36 + 16: ! + frame_count: 36 + 17: ! + frame_count: 36 + 18: ! + frame_count: 30 + 19: ! + frame_count: 36 + 20: ! + frame_count: 36 + 21: ! + frame_count: 36 + 22: ! + frame_count: 36 + 23: ! + frame_count: 30 + 24: ! + frame_count: 36 + 25: ! + frame_count: 36 + 26: ! + frame_count: 36 + 27: ! + frame_count: 36 + 28: ! + frame_count: 36 + 29: ! + frame_count: 36 + 30: ! + frame_count: 28 + 31: ! + frame_count: 36 + 32: ! + frame_count: 36 + 33: ! + frame_count: 36 + 34: ! + frame_count: 28 + 35: ! + frame_count: 36 + 36: ! + frame_count: 36 + 37: ! + frame_count: 28 + 38: ! + frame_count: 36 + 39: ! + frame_count: 36 + 40: ! + frame_count: 36 + 41: ! + frame_count: 36 + 42: ! + frame_count: 30 + 43: ! + frame_count: 42 + BLOCK_RAM: ! + configuration_columns: + 0: ! + frame_count: 128 + 1: ! + frame_count: 128 + 2: ! + frame_count: 128 + 1: ! + configuration_buses: + CLB_IO_CLK: ! + configuration_columns: + 0: ! + frame_count: 42 + 1: ! + frame_count: 30 + 2: ! + frame_count: 36 + 3: ! + frame_count: 36 + 4: ! + frame_count: 36 + 5: ! + frame_count: 36 + 6: ! + frame_count: 28 + 7: ! + frame_count: 36 + 8: ! + frame_count: 36 + 9: ! + frame_count: 28 + 10: ! + frame_count: 36 + 11: ! + frame_count: 36 + 12: ! + frame_count: 36 + 13: ! + frame_count: 36 + 14: ! + frame_count: 36 + 15: ! + frame_count: 36 + 16: ! + frame_count: 36 + 17: ! + frame_count: 36 + 18: ! + frame_count: 30 + 19: ! + frame_count: 36 + 20: ! + frame_count: 36 + 21: ! + frame_count: 36 + 22: ! + frame_count: 36 + 23: ! + frame_count: 30 + 24: ! + frame_count: 36 + 25: ! + frame_count: 36 + 26: ! + frame_count: 36 + 27: ! + frame_count: 36 + 28: ! + frame_count: 36 + 29: ! + frame_count: 36 + 30: ! + frame_count: 28 + 31: ! + frame_count: 36 + 32: ! + frame_count: 36 + 33: ! + frame_count: 36 + 34: ! + frame_count: 28 + 35: ! + frame_count: 36 + 36: ! + frame_count: 36 + 37: ! + frame_count: 32 + BLOCK_RAM: ! + configuration_columns: + 0: ! + frame_count: 128 + 1: ! + frame_count: 128 + bottom: ! + rows: + 0: ! + configuration_buses: + CLB_IO_CLK: ! + configuration_columns: + 0: ! + frame_count: 42 + 1: ! + frame_count: 30 + 2: ! + frame_count: 36 + 3: ! + frame_count: 36 + 4: ! + frame_count: 36 + 5: ! + frame_count: 36 + 6: ! + frame_count: 28 + 7: ! + frame_count: 36 + 8: ! + frame_count: 36 + 9: ! + frame_count: 28 + 10: ! + frame_count: 36 + 11: ! + frame_count: 36 + 12: ! + frame_count: 36 + 13: ! + frame_count: 36 + 14: ! + frame_count: 36 + 15: ! + frame_count: 36 + 16: ! + frame_count: 36 + 17: ! + frame_count: 36 + 18: ! + frame_count: 30 + 19: ! + frame_count: 36 + 20: ! + frame_count: 36 + 21: ! + frame_count: 36 + 22: ! + frame_count: 36 + 23: ! + frame_count: 30 + 24: ! + frame_count: 36 + 25: ! + frame_count: 36 + 26: ! + frame_count: 36 + 27: ! + frame_count: 36 + 28: ! + frame_count: 36 + 29: ! + frame_count: 36 + 30: ! + frame_count: 28 + 31: ! + frame_count: 36 + 32: ! + frame_count: 36 + 33: ! + frame_count: 36 + 34: ! + frame_count: 28 + 35: ! + frame_count: 36 + 36: ! + frame_count: 36 + 37: ! + frame_count: 28 + 38: ! + frame_count: 36 + 39: ! + frame_count: 36 + 40: ! + frame_count: 36 + 41: ! + frame_count: 36 + 42: ! + frame_count: 30 + 43: ! + frame_count: 42 + BLOCK_RAM: ! + configuration_columns: + 0: ! + frame_count: 128 + 1: ! + frame_count: 128 + 2: ! + frame_count: 128 diff --git a/artix7/xc7a35tftg256-1/tileconn.json b/artix7/xc7a35tftg256-1/tileconn.json new file mode 100644 index 0000000..c7febdf --- /dev/null +++ b/artix7/xc7a35tftg256-1/tileconn.json @@ -0,0 +1,474006 @@ +[ + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX0", + "BRAM_IMUX0_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX1", + "BRAM_IMUX1_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX2", + "BRAM_IMUX2_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX3", + "BRAM_IMUX3_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX4", + "BRAM_IMUX4_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX5", + "BRAM_IMUX5_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX6", + "BRAM_IMUX6_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX7", + "BRAM_IMUX7_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX8", + "BRAM_IMUX8_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX9", + "BRAM_IMUX9_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX10", + "BRAM_IMUX10_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX11", + "BRAM_IMUX11_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX12", + "BRAM_IMUX12_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX13", + "BRAM_IMUX13_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX14", + "BRAM_IMUX14_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX15", + "BRAM_IMUX15_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX16", + "BRAM_IMUX16_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX17", + "BRAM_IMUX17_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX18", + "BRAM_IMUX18_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX19", + "BRAM_IMUX19_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX20", + "BRAM_IMUX20_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX21", + "BRAM_IMUX21_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX22", + "BRAM_IMUX22_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX23", + "BRAM_IMUX23_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX24", + "BRAM_IMUX24_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX25", + "BRAM_IMUX25_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX26", + "BRAM_IMUX26_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX27", + "BRAM_IMUX27_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX28", + "BRAM_IMUX28_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX29", + "BRAM_IMUX29_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX30", + "BRAM_IMUX30_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX31", + "BRAM_IMUX31_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX32", + "BRAM_IMUX32_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX33", + "BRAM_IMUX33_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX34", + "BRAM_IMUX34_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX35", + "BRAM_IMUX35_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX36", + "BRAM_IMUX36_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX37", + "BRAM_IMUX37_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX38", + "BRAM_IMUX38_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX39", + "BRAM_IMUX39_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX40", + "BRAM_IMUX40_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX41", + "BRAM_IMUX41_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX42", + "BRAM_IMUX42_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX43", + "BRAM_IMUX43_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX44", + "BRAM_IMUX44_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX45", + "BRAM_IMUX45_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX46", + "BRAM_IMUX46_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX47", + "BRAM_IMUX47_UTURN_0" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_0" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_0" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_0" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_0" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_0" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_0" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_0" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_0" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_0" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_0" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_0" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_0" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_0" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_0" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_0" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_0" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_0" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_0" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_0" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_0" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_0" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_0" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_0" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_0" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_0" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_0" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_0" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_0" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_0" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_0" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_0" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_0" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_0" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_0" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_0" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_0" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_0" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_0" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_0" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_0" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_0" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_0" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_0" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_0" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_0" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_0" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_0" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_0" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_0" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_0" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_0" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_0" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_0" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_0" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_0" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_0" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_0" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_0" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_0" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "BRAM_LOGIC_OUTS_B0_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "BRAM_LOGIC_OUTS_B1_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "BRAM_LOGIC_OUTS_B2_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "BRAM_LOGIC_OUTS_B3_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "BRAM_LOGIC_OUTS_B4_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "BRAM_LOGIC_OUTS_B5_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "BRAM_LOGIC_OUTS_B6_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "BRAM_LOGIC_OUTS_B7_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "BRAM_LOGIC_OUTS_B8_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "BRAM_LOGIC_OUTS_B9_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "BRAM_LOGIC_OUTS_B10_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "BRAM_LOGIC_OUTS_B11_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "BRAM_LOGIC_OUTS_B12_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "BRAM_LOGIC_OUTS_B13_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "BRAM_LOGIC_OUTS_B14_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "BRAM_LOGIC_OUTS_B15_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "BRAM_LOGIC_OUTS_B16_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "BRAM_LOGIC_OUTS_B17_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "BRAM_LOGIC_OUTS_B18_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "BRAM_LOGIC_OUTS_B19_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "BRAM_LOGIC_OUTS_B20_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "BRAM_LOGIC_OUTS_B21_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "BRAM_LOGIC_OUTS_B22_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "BRAM_LOGIC_OUTS_B23_0" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_0" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_0" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_0" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_0" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_0" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_0" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_0" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_0" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_0" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_0" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_0" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_0" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_0" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_0" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_0" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_0" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_0" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_0" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_0" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_0" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_0" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_0" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_0" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_0" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_0" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_0" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_0" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_0" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_0" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_0" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_0" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_0" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_0" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_0" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_0" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_0" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_0" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_0" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_0" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_0" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_0" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_0" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_0" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_0" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_0" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_0" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_0" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_0" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_0" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_0" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_0" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_0" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_0" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_0" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_0" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_0" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_0" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_0" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_0" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_0" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_0" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_0" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_0" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_0" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_0" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_0" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_0" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_0" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_0" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_0" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_0" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_0" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_0" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_0" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_0" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_0" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_0" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_0" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_0" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_0" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX0", + "BRAM_IMUX0_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX1", + "BRAM_IMUX1_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX2", + "BRAM_IMUX2_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX3", + "BRAM_IMUX3_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX4", + "BRAM_IMUX4_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX5", + "BRAM_IMUX5_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX6", + "BRAM_IMUX6_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX7", + "BRAM_IMUX7_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX8", + "BRAM_IMUX8_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX9", + "BRAM_IMUX9_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX10", + "BRAM_IMUX10_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX11", + "BRAM_IMUX11_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX12", + "BRAM_IMUX12_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX13", + "BRAM_IMUX13_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX14", + "BRAM_IMUX14_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX15", + "BRAM_IMUX15_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX16", + "BRAM_IMUX16_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX17", + "BRAM_IMUX17_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX18", + "BRAM_IMUX18_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX19", + "BRAM_IMUX19_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX20", + "BRAM_IMUX20_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX21", + "BRAM_IMUX21_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX22", + "BRAM_IMUX22_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX23", + "BRAM_IMUX23_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX24", + "BRAM_IMUX24_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX25", + "BRAM_IMUX25_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX26", + "BRAM_IMUX26_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX27", + "BRAM_IMUX27_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX28", + "BRAM_IMUX28_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX29", + "BRAM_IMUX29_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX30", + "BRAM_IMUX30_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX31", + "BRAM_IMUX31_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX32", + "BRAM_IMUX32_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX33", + "BRAM_IMUX33_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX34", + "BRAM_IMUX34_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX35", + "BRAM_IMUX35_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX36", + "BRAM_IMUX36_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX37", + "BRAM_IMUX37_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX38", + "BRAM_IMUX38_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX39", + "BRAM_IMUX39_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX40", + "BRAM_IMUX40_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX41", + "BRAM_IMUX41_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX42", + "BRAM_IMUX42_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX43", + "BRAM_IMUX43_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX44", + "BRAM_IMUX44_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX45", + "BRAM_IMUX45_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX46", + "BRAM_IMUX46_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX47", + "BRAM_IMUX47_UTURN_1" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_1" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_1" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_1" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_1" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_1" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_1" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_1" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_1" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_1" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_1" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_1" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_1" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_1" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_1" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_1" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_1" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_1" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_1" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_1" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_1" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_1" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_1" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_1" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_1" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_1" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_1" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_1" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_1" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_1" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_1" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_1" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_1" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_1" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_1" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_1" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_1" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_1" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_1" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_1" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_1" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_1" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_1" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_1" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_1" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_1" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_1" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_1" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_1" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_1" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_1" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_1" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_1" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_1" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_1" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_1" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_1" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_1" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_1" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_1" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "BRAM_LOGIC_OUTS_B0_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "BRAM_LOGIC_OUTS_B1_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "BRAM_LOGIC_OUTS_B2_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "BRAM_LOGIC_OUTS_B3_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "BRAM_LOGIC_OUTS_B4_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "BRAM_LOGIC_OUTS_B5_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "BRAM_LOGIC_OUTS_B6_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "BRAM_LOGIC_OUTS_B7_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "BRAM_LOGIC_OUTS_B8_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "BRAM_LOGIC_OUTS_B9_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "BRAM_LOGIC_OUTS_B10_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "BRAM_LOGIC_OUTS_B11_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "BRAM_LOGIC_OUTS_B12_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "BRAM_LOGIC_OUTS_B13_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "BRAM_LOGIC_OUTS_B14_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "BRAM_LOGIC_OUTS_B15_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "BRAM_LOGIC_OUTS_B16_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "BRAM_LOGIC_OUTS_B17_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "BRAM_LOGIC_OUTS_B18_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "BRAM_LOGIC_OUTS_B19_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "BRAM_LOGIC_OUTS_B20_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "BRAM_LOGIC_OUTS_B21_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "BRAM_LOGIC_OUTS_B22_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "BRAM_LOGIC_OUTS_B23_1" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_1" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_1" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_1" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_1" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_1" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_1" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_1" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_1" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_1" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_1" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_1" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_1" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_1" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_1" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_1" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_1" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_1" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_1" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_1" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_1" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_1" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_1" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_1" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_1" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_1" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_1" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_1" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_1" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_1" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_1" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_1" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_1" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_1" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_1" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_1" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_1" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_1" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_1" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_1" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_1" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_1" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_1" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_1" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_1" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_1" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_1" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_1" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_1" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_1" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_1" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_1" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_1" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_1" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_1" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_1" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_1" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_1" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_1" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_1" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_1" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_1" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_1" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_1" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_1" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_1" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_1" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_1" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_1" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_1" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_1" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_1" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_1" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_1" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_1" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_1" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_1" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_1" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_1" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_1" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_1" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX0", + "BRAM_IMUX0_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX1", + "BRAM_IMUX1_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX2", + "BRAM_IMUX2_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX3", + "BRAM_IMUX3_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX4", + "BRAM_IMUX4_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX5", + "BRAM_IMUX5_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX6", + "BRAM_IMUX6_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX7", + "BRAM_IMUX7_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX8", + "BRAM_IMUX8_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX9", + "BRAM_IMUX9_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX10", + "BRAM_IMUX10_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX11", + "BRAM_IMUX11_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX12", + "BRAM_IMUX12_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX13", + "BRAM_IMUX13_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX14", + "BRAM_IMUX14_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX15", + "BRAM_IMUX15_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX16", + "BRAM_IMUX16_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX17", + "BRAM_IMUX17_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX18", + "BRAM_IMUX18_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX19", + "BRAM_IMUX19_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX20", + "BRAM_IMUX20_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX21", + "BRAM_IMUX21_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX22", + "BRAM_IMUX22_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX23", + "BRAM_IMUX23_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX24", + "BRAM_IMUX24_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX25", + "BRAM_IMUX25_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX26", + "BRAM_IMUX26_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX27", + "BRAM_IMUX27_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX28", + "BRAM_IMUX28_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX29", + "BRAM_IMUX29_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX30", + "BRAM_IMUX30_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX31", + "BRAM_IMUX31_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX32", + "BRAM_IMUX32_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX33", + "BRAM_IMUX33_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX34", + "BRAM_IMUX34_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX35", + "BRAM_IMUX35_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX36", + "BRAM_IMUX36_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX37", + "BRAM_IMUX37_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX38", + "BRAM_IMUX38_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX39", + "BRAM_IMUX39_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX40", + "BRAM_IMUX40_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX41", + "BRAM_IMUX41_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX42", + "BRAM_IMUX42_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX43", + "BRAM_IMUX43_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX44", + "BRAM_IMUX44_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX45", + "BRAM_IMUX45_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX46", + "BRAM_IMUX46_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX47", + "BRAM_IMUX47_UTURN_2" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_2" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_2" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_2" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_2" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_2" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_2" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_2" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_2" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_2" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_2" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_2" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_2" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_2" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_2" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_2" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_2" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_2" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_2" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_2" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_2" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_2" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_2" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_2" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_2" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_2" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_2" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_2" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_2" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_2" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_2" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_2" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_2" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_2" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_2" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_2" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_2" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_2" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_2" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_2" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_2" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_2" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_2" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_2" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_2" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_2" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_2" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_2" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_2" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_2" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_2" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_2" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_2" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_2" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_2" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_2" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_2" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_2" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_2" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_2" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "BRAM_LOGIC_OUTS_B0_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "BRAM_LOGIC_OUTS_B1_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "BRAM_LOGIC_OUTS_B2_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "BRAM_LOGIC_OUTS_B3_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "BRAM_LOGIC_OUTS_B4_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "BRAM_LOGIC_OUTS_B5_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "BRAM_LOGIC_OUTS_B6_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "BRAM_LOGIC_OUTS_B7_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "BRAM_LOGIC_OUTS_B8_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "BRAM_LOGIC_OUTS_B9_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "BRAM_LOGIC_OUTS_B10_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "BRAM_LOGIC_OUTS_B11_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "BRAM_LOGIC_OUTS_B12_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "BRAM_LOGIC_OUTS_B13_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "BRAM_LOGIC_OUTS_B14_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "BRAM_LOGIC_OUTS_B15_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "BRAM_LOGIC_OUTS_B16_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "BRAM_LOGIC_OUTS_B17_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "BRAM_LOGIC_OUTS_B18_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "BRAM_LOGIC_OUTS_B19_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "BRAM_LOGIC_OUTS_B20_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "BRAM_LOGIC_OUTS_B21_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "BRAM_LOGIC_OUTS_B22_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "BRAM_LOGIC_OUTS_B23_2" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_2" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_2" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_2" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_2" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_2" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_2" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_2" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_2" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_2" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_2" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_2" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_2" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_2" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_2" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_2" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_2" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_2" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_2" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_2" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_2" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_2" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_2" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_2" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_2" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_2" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_2" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_2" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_2" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_2" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_2" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_2" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_2" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_2" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_2" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_2" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_2" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_2" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_2" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_2" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_2" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_2" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_2" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_2" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_2" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_2" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_2" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_2" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_2" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_2" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_2" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_2" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_2" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_2" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_2" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_2" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_2" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_2" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_2" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_2" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_2" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_2" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_2" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_2" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_2" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_2" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_2" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_2" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_2" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_2" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_2" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_2" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_2" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_2" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_2" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_2" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_2" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_2" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_2" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_2" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_2" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX0", + "BRAM_IMUX0_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX1", + "BRAM_IMUX1_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX2", + "BRAM_IMUX2_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX3", + "BRAM_IMUX3_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX4", + "BRAM_IMUX4_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX5", + "BRAM_IMUX5_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX6", + "BRAM_IMUX6_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX7", + "BRAM_IMUX7_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX8", + "BRAM_IMUX8_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX9", + "BRAM_IMUX9_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX10", + "BRAM_IMUX10_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX11", + "BRAM_IMUX11_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX12", + "BRAM_IMUX12_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX13", + "BRAM_IMUX13_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX14", + "BRAM_IMUX14_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX15", + "BRAM_IMUX15_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX16", + "BRAM_IMUX16_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX17", + "BRAM_IMUX17_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX18", + "BRAM_IMUX18_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX19", + "BRAM_IMUX19_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX20", + "BRAM_IMUX20_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX21", + "BRAM_IMUX21_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX22", + "BRAM_IMUX22_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX23", + "BRAM_IMUX23_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX24", + "BRAM_IMUX24_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX25", + "BRAM_IMUX25_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX26", + "BRAM_IMUX26_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX27", + "BRAM_IMUX27_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX28", + "BRAM_IMUX28_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX29", + "BRAM_IMUX29_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX30", + "BRAM_IMUX30_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX31", + "BRAM_IMUX31_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX32", + "BRAM_IMUX32_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX33", + "BRAM_IMUX33_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX34", + "BRAM_IMUX34_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX35", + "BRAM_IMUX35_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX36", + "BRAM_IMUX36_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX37", + "BRAM_IMUX37_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX38", + "BRAM_IMUX38_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX39", + "BRAM_IMUX39_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX40", + "BRAM_IMUX40_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX41", + "BRAM_IMUX41_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX42", + "BRAM_IMUX42_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX43", + "BRAM_IMUX43_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX44", + "BRAM_IMUX44_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX45", + "BRAM_IMUX45_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX46", + "BRAM_IMUX46_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX47", + "BRAM_IMUX47_UTURN_3" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_3" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_3" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_3" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_3" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_3" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_3" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_3" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_3" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_3" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_3" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_3" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_3" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_3" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_3" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_3" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_3" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_3" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_3" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_3" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_3" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_3" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_3" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_3" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_3" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_3" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_3" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_3" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_3" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_3" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_3" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_3" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_3" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_3" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_3" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_3" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_3" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_3" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_3" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_3" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_3" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_3" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_3" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_3" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_3" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_3" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_3" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_3" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_3" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_3" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_3" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_3" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_3" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_3" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_3" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_3" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_3" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_3" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_3" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_3" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "BRAM_LOGIC_OUTS_B0_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "BRAM_LOGIC_OUTS_B1_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "BRAM_LOGIC_OUTS_B2_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "BRAM_LOGIC_OUTS_B3_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "BRAM_LOGIC_OUTS_B4_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "BRAM_LOGIC_OUTS_B5_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "BRAM_LOGIC_OUTS_B6_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "BRAM_LOGIC_OUTS_B7_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "BRAM_LOGIC_OUTS_B8_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "BRAM_LOGIC_OUTS_B9_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "BRAM_LOGIC_OUTS_B10_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "BRAM_LOGIC_OUTS_B11_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "BRAM_LOGIC_OUTS_B12_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "BRAM_LOGIC_OUTS_B13_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "BRAM_LOGIC_OUTS_B14_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "BRAM_LOGIC_OUTS_B15_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "BRAM_LOGIC_OUTS_B16_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "BRAM_LOGIC_OUTS_B17_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "BRAM_LOGIC_OUTS_B18_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "BRAM_LOGIC_OUTS_B19_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "BRAM_LOGIC_OUTS_B20_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "BRAM_LOGIC_OUTS_B21_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "BRAM_LOGIC_OUTS_B22_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "BRAM_LOGIC_OUTS_B23_3" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_3" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_3" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_3" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_3" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_3" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_3" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_3" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_3" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_3" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_3" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_3" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_3" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_3" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_3" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_3" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_3" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_3" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_3" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_3" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_3" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_3" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_3" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_3" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_3" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_3" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_3" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_3" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_3" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_3" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_3" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_3" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_3" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_3" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_3" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_3" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_3" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_3" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_3" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_3" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_3" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_3" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_3" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_3" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_3" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_3" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_3" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_3" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_3" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_3" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_3" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_3" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_3" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_3" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_3" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_3" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_3" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_3" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_3" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_3" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_3" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_3" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_3" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_3" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_3" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_3" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_3" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_3" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_3" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_3" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_3" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_3" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_3" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_3" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_3" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_3" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_3" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_3" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_3" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_3" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX0", + "BRAM_IMUX0_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX1", + "BRAM_IMUX1_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX2", + "BRAM_IMUX2_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX3", + "BRAM_IMUX3_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX4", + "BRAM_IMUX4_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX5", + "BRAM_IMUX5_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX6", + "BRAM_IMUX6_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX7", + "BRAM_IMUX7_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX8", + "BRAM_IMUX8_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX9", + "BRAM_IMUX9_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX10", + "BRAM_IMUX10_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX11", + "BRAM_IMUX11_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX12", + "BRAM_IMUX12_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX13", + "BRAM_IMUX13_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX14", + "BRAM_IMUX14_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX15", + "BRAM_IMUX15_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX16", + "BRAM_IMUX16_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX17", + "BRAM_IMUX17_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX18", + "BRAM_IMUX18_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX19", + "BRAM_IMUX19_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX20", + "BRAM_IMUX20_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX21", + "BRAM_IMUX21_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX22", + "BRAM_IMUX22_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX23", + "BRAM_IMUX23_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX24", + "BRAM_IMUX24_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX25", + "BRAM_IMUX25_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX26", + "BRAM_IMUX26_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX27", + "BRAM_IMUX27_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX28", + "BRAM_IMUX28_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX29", + "BRAM_IMUX29_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX30", + "BRAM_IMUX30_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX31", + "BRAM_IMUX31_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX32", + "BRAM_IMUX32_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX33", + "BRAM_IMUX33_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX34", + "BRAM_IMUX34_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX35", + "BRAM_IMUX35_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX36", + "BRAM_IMUX36_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX37", + "BRAM_IMUX37_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX38", + "BRAM_IMUX38_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX39", + "BRAM_IMUX39_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX40", + "BRAM_IMUX40_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX41", + "BRAM_IMUX41_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX42", + "BRAM_IMUX42_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX43", + "BRAM_IMUX43_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX44", + "BRAM_IMUX44_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX45", + "BRAM_IMUX45_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX46", + "BRAM_IMUX46_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_IMUX47", + "BRAM_IMUX47_UTURN_4" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_4" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_4" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_4" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_4" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_4" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_4" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_4" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_4" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_4" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_4" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_4" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_4" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_4" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_4" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_4" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_4" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_4" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_4" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_4" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_4" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_4" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_4" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_4" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_4" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_4" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_4" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_4" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_4" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_4" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_4" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_4" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_4" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_4" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_4" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_4" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_4" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_4" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_4" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_4" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_4" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_4" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_4" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_4" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_4" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_4" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_4" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_4" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_4" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_4" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_4" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_4" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_4" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_4" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_4" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_4" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_4" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_4" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_4" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_4" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_4" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_4" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_4" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_4" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "BRAM_LOGIC_OUTS_B0_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "BRAM_LOGIC_OUTS_B1_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "BRAM_LOGIC_OUTS_B2_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "BRAM_LOGIC_OUTS_B3_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "BRAM_LOGIC_OUTS_B4_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "BRAM_LOGIC_OUTS_B5_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "BRAM_LOGIC_OUTS_B6_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "BRAM_LOGIC_OUTS_B7_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "BRAM_LOGIC_OUTS_B8_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "BRAM_LOGIC_OUTS_B9_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "BRAM_LOGIC_OUTS_B10_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "BRAM_LOGIC_OUTS_B11_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "BRAM_LOGIC_OUTS_B12_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "BRAM_LOGIC_OUTS_B13_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "BRAM_LOGIC_OUTS_B14_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "BRAM_LOGIC_OUTS_B15_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "BRAM_LOGIC_OUTS_B16_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "BRAM_LOGIC_OUTS_B17_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "BRAM_LOGIC_OUTS_B18_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "BRAM_LOGIC_OUTS_B19_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "BRAM_LOGIC_OUTS_B20_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "BRAM_LOGIC_OUTS_B21_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "BRAM_LOGIC_OUTS_B22_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "BRAM_LOGIC_OUTS_B23_4" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_4" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_4" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_4" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_4" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_4" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_4" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_4" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_4" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_4" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_4" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_4" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_4" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_4" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_4" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_4" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_4" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_4" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_4" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_4" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_4" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_4" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_4" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_4" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_4" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_4" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_4" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_4" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_4" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_4" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_4" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_4" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_4" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_4" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_4" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_4" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_4" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_4" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_4" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_4" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_4" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_4" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_4" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_4" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_4" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_4" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_4" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_4" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_4" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_4" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_4" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_4" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_4" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_4" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_4" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_4" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_4" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_4" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_4" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_4" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_4" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_4" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_4" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_4" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_4" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_4" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_4" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_4" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_4" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_4" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_4" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_4" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_4" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_4" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_4" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_4" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_4" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_4" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_4" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_4" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_4" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_4" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_4" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_L", + "INT_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "IMUX_L0" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "IMUX_L1" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "IMUX_L2" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "IMUX_L3" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "IMUX_L4" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "IMUX_L5" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "IMUX_L6" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "IMUX_L7" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "IMUX_L8" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "IMUX_L9" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "IMUX_L10" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "IMUX_L11" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "IMUX_L12" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "IMUX_L13" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "IMUX_L14" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "IMUX_L15" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "IMUX_L16" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "IMUX_L17" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "IMUX_L18" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "IMUX_L19" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "IMUX_L20" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "IMUX_L21" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "IMUX_L22" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "IMUX_L23" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "IMUX_L24" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "IMUX_L25" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "IMUX_L26" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "IMUX_L27" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "IMUX_L28" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "IMUX_L29" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "IMUX_L30" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "IMUX_L31" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "IMUX_L32" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "IMUX_L33" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "IMUX_L34" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "IMUX_L35" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "IMUX_L36" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "IMUX_L37" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "IMUX_L38" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "IMUX_L39" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "IMUX_L40" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "IMUX_L41" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "IMUX_L42" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "IMUX_L43" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "IMUX_L44" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "IMUX_L45" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "IMUX_L46" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "IMUX_L47" + ], + [ + "INT_INTERFACE_BYP0", + "BYP_L0" + ], + [ + "INT_INTERFACE_BYP1", + "BYP_L1" + ], + [ + "INT_INTERFACE_BYP2", + "BYP_L2" + ], + [ + "INT_INTERFACE_BYP3", + "BYP_L3" + ], + [ + "INT_INTERFACE_BYP4", + "BYP_L4" + ], + [ + "INT_INTERFACE_BYP5", + "BYP_L5" + ], + [ + "INT_INTERFACE_BYP6", + "BYP_L6" + ], + [ + "INT_INTERFACE_BYP7", + "BYP_L7" + ], + [ + "INT_INTERFACE_CLK0", + "CLK_L0" + ], + [ + "INT_INTERFACE_CLK1", + "CLK_L1" + ], + [ + "INT_INTERFACE_CTRL0", + "CTRL_L0" + ], + [ + "INT_INTERFACE_CTRL1", + "CTRL_L1" + ], + [ + "INT_INTERFACE_EE2A0", + "EE2END0" + ], + [ + "INT_INTERFACE_EE2A1", + "EE2END1" + ], + [ + "INT_INTERFACE_EE2A2", + "EE2END2" + ], + [ + "INT_INTERFACE_EE2A3", + "EE2END3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "EE2A0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "EE2A1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "EE2A2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "EE2A3" + ], + [ + "INT_INTERFACE_EE4A0", + "EE4B0" + ], + [ + "INT_INTERFACE_EE4A1", + "EE4B1" + ], + [ + "INT_INTERFACE_EE4A2", + "EE4B2" + ], + [ + "INT_INTERFACE_EE4A3", + "EE4B3" + ], + [ + "INT_INTERFACE_EE4B0", + "EE4C0" + ], + [ + "INT_INTERFACE_EE4B1", + "EE4C1" + ], + [ + "INT_INTERFACE_EE4B2", + "EE4C2" + ], + [ + "INT_INTERFACE_EE4B3", + "EE4C3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "EE4A0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "EE4A1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "EE4A2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "EE4A3" + ], + [ + "INT_INTERFACE_EE4C0", + "EE4END0" + ], + [ + "INT_INTERFACE_EE4C1", + "EE4END1" + ], + [ + "INT_INTERFACE_EE4C2", + "EE4END2" + ], + [ + "INT_INTERFACE_EE4C3", + "EE4END3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "EL1END0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "EL1END1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "EL1END2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "EL1END3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "ER1END0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "ER1END1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "ER1END2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "ER1END3" + ], + [ + "INT_INTERFACE_FAN0", + "FAN_L0" + ], + [ + "INT_INTERFACE_FAN1", + "FAN_L1" + ], + [ + "INT_INTERFACE_FAN2", + "FAN_L2" + ], + [ + "INT_INTERFACE_FAN3", + "FAN_L3" + ], + [ + "INT_INTERFACE_FAN4", + "FAN_L4" + ], + [ + "INT_INTERFACE_FAN5", + "FAN_L5" + ], + [ + "INT_INTERFACE_FAN6", + "FAN_L6" + ], + [ + "INT_INTERFACE_FAN7", + "FAN_L7" + ], + [ + "INT_INTERFACE_LH1", + "LH0" + ], + [ + "INT_INTERFACE_LH2", + "LH1" + ], + [ + "INT_INTERFACE_LH3", + "LH2" + ], + [ + "INT_INTERFACE_LH4", + "LH3" + ], + [ + "INT_INTERFACE_LH5", + "LH4" + ], + [ + "INT_INTERFACE_LH6", + "LH5" + ], + [ + "INT_INTERFACE_LH7", + "LH6" + ], + [ + "INT_INTERFACE_LH8", + "LH7" + ], + [ + "INT_INTERFACE_LH9", + "LH8" + ], + [ + "INT_INTERFACE_LH10", + "LH9" + ], + [ + "INT_INTERFACE_LH11", + "LH10" + ], + [ + "INT_INTERFACE_LH12", + "LH11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L0", + "LOGIC_OUTS_L0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L1", + "LOGIC_OUTS_L1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L2", + "LOGIC_OUTS_L2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L3", + "LOGIC_OUTS_L3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L4", + "LOGIC_OUTS_L4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L5", + "LOGIC_OUTS_L5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L6", + "LOGIC_OUTS_L6" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L7", + "LOGIC_OUTS_L7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L8", + "LOGIC_OUTS_L8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L9", + "LOGIC_OUTS_L9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L10", + "LOGIC_OUTS_L10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L11", + "LOGIC_OUTS_L11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L12", + "LOGIC_OUTS_L12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L13", + "LOGIC_OUTS_L13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L14", + "LOGIC_OUTS_L14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L15", + "LOGIC_OUTS_L15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L16", + "LOGIC_OUTS_L16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L17", + "LOGIC_OUTS_L17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L18", + "LOGIC_OUTS_L18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L19", + "LOGIC_OUTS_L19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L20", + "LOGIC_OUTS_L20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L21", + "LOGIC_OUTS_L21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L22", + "LOGIC_OUTS_L22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L23", + "LOGIC_OUTS_L23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "NE2END0" + ], + [ + "INT_INTERFACE_NE2A1", + "NE2END1" + ], + [ + "INT_INTERFACE_NE2A2", + "NE2END2" + ], + [ + "INT_INTERFACE_NE2A3", + "NE2END3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "NE6A0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "NE6A1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "NE6A2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "NE6A3" + ], + [ + "INT_INTERFACE_NE4C0", + "NE6END0" + ], + [ + "INT_INTERFACE_NE4C1", + "NE6END1" + ], + [ + "INT_INTERFACE_NE4C2", + "NE6END2" + ], + [ + "INT_INTERFACE_NE4C3", + "NE6END3" + ], + [ + "INT_INTERFACE_NW2A0", + "NW2A0" + ], + [ + "INT_INTERFACE_NW2A1", + "NW2A1" + ], + [ + "INT_INTERFACE_NW2A2", + "NW2A2" + ], + [ + "INT_INTERFACE_NW2A3", + "NW2A3" + ], + [ + "INT_INTERFACE_NW4A0", + "NW6BEG0" + ], + [ + "INT_INTERFACE_NW4A1", + "NW6BEG1" + ], + [ + "INT_INTERFACE_NW4A2", + "NW6BEG2" + ], + [ + "INT_INTERFACE_NW4A3", + "NW6BEG3" + ], + [ + "INT_INTERFACE_NW4END0", + "NW6E0" + ], + [ + "INT_INTERFACE_NW4END1", + "NW6E1" + ], + [ + "INT_INTERFACE_NW4END2", + "NW6E2" + ], + [ + "INT_INTERFACE_NW4END3", + "NW6E3" + ], + [ + "INT_INTERFACE_SE2A0", + "SE2END0" + ], + [ + "INT_INTERFACE_SE2A1", + "SE2END1" + ], + [ + "INT_INTERFACE_SE2A2", + "SE2END2" + ], + [ + "INT_INTERFACE_SE2A3", + "SE2END3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "SE6A0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "SE6A1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "SE6A2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "SE6A3" + ], + [ + "INT_INTERFACE_SE4C0", + "SE6END0" + ], + [ + "INT_INTERFACE_SE4C1", + "SE6END1" + ], + [ + "INT_INTERFACE_SE4C2", + "SE6END2" + ], + [ + "INT_INTERFACE_SE4C3", + "SE6END3" + ], + [ + "INT_INTERFACE_SW2A0", + "SW2A0" + ], + [ + "INT_INTERFACE_SW2A1", + "SW2A1" + ], + [ + "INT_INTERFACE_SW2A2", + "SW2A2" + ], + [ + "INT_INTERFACE_SW2A3", + "SW2A3" + ], + [ + "INT_INTERFACE_SW4A0", + "SW6BEG0" + ], + [ + "INT_INTERFACE_SW4A1", + "SW6BEG1" + ], + [ + "INT_INTERFACE_SW4A2", + "SW6BEG2" + ], + [ + "INT_INTERFACE_SW4A3", + "SW6BEG3" + ], + [ + "INT_INTERFACE_SW4END0", + "SW6E0" + ], + [ + "INT_INTERFACE_SW4END1", + "SW6E1" + ], + [ + "INT_INTERFACE_SW4END2", + "SW6E2" + ], + [ + "INT_INTERFACE_SW4END3", + "SW6E3" + ], + [ + "INT_INTERFACE_WL1END0", + "WL1BEG0" + ], + [ + "INT_INTERFACE_WL1END1", + "WL1BEG1" + ], + [ + "INT_INTERFACE_WL1END2", + "WL1BEG2" + ], + [ + "INT_INTERFACE_WL1END3", + "WL1BEG3" + ], + [ + "INT_INTERFACE_WR1END0", + "WR1BEG0" + ], + [ + "INT_INTERFACE_WR1END1", + "WR1BEG1" + ], + [ + "INT_INTERFACE_WR1END2", + "WR1BEG2" + ], + [ + "INT_INTERFACE_WR1END3", + "WR1BEG3" + ], + [ + "INT_INTERFACE_WW2A0", + "WW2BEG0" + ], + [ + "INT_INTERFACE_WW2A1", + "WW2BEG1" + ], + [ + "INT_INTERFACE_WW2A2", + "WW2BEG2" + ], + [ + "INT_INTERFACE_WW2A3", + "WW2BEG3" + ], + [ + "INT_INTERFACE_WW2END0", + "WW2A0" + ], + [ + "INT_INTERFACE_WW2END1", + "WW2A1" + ], + [ + "INT_INTERFACE_WW2END2", + "WW2A2" + ], + [ + "INT_INTERFACE_WW2END3", + "WW2A3" + ], + [ + "INT_INTERFACE_WW4A0", + "WW4BEG0" + ], + [ + "INT_INTERFACE_WW4A1", + "WW4BEG1" + ], + [ + "INT_INTERFACE_WW4A2", + "WW4BEG2" + ], + [ + "INT_INTERFACE_WW4A3", + "WW4BEG3" + ], + [ + "INT_INTERFACE_WW4B0", + "WW4A0" + ], + [ + "INT_INTERFACE_WW4B1", + "WW4A1" + ], + [ + "INT_INTERFACE_WW4B2", + "WW4A2" + ], + [ + "INT_INTERFACE_WW4B3", + "WW4A3" + ], + [ + "INT_INTERFACE_WW4C0", + "WW4B0" + ], + [ + "INT_INTERFACE_WW4C1", + "WW4B1" + ], + [ + "INT_INTERFACE_WW4C2", + "WW4B2" + ], + [ + "INT_INTERFACE_WW4C3", + "WW4B3" + ], + [ + "INT_INTERFACE_WW4END0", + "WW4C0" + ], + [ + "INT_INTERFACE_WW4END1", + "WW4C1" + ], + [ + "INT_INTERFACE_WW4END2", + "WW4C2" + ], + [ + "INT_INTERFACE_WW4END3", + "WW4C3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_0" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX0", + "BRAM_IMUX0_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX1", + "BRAM_IMUX1_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX2", + "BRAM_IMUX2_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX3", + "BRAM_IMUX3_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX4", + "BRAM_IMUX4_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX5", + "BRAM_IMUX5_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX6", + "BRAM_IMUX6_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX7", + "BRAM_IMUX7_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX8", + "BRAM_IMUX8_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX9", + "BRAM_IMUX9_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX10", + "BRAM_IMUX10_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX11", + "BRAM_IMUX11_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX12", + "BRAM_IMUX12_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX13", + "BRAM_IMUX13_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX14", + "BRAM_IMUX14_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX15", + "BRAM_IMUX15_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX16", + "BRAM_IMUX16_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX17", + "BRAM_IMUX17_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX18", + "BRAM_IMUX18_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX19", + "BRAM_IMUX19_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX20", + "BRAM_IMUX20_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX21", + "BRAM_IMUX21_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX22", + "BRAM_IMUX22_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX23", + "BRAM_IMUX23_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX24", + "BRAM_IMUX24_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX25", + "BRAM_IMUX25_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX26", + "BRAM_IMUX26_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX27", + "BRAM_IMUX27_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX28", + "BRAM_IMUX28_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX29", + "BRAM_IMUX29_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX30", + "BRAM_IMUX30_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX31", + "BRAM_IMUX31_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX32", + "BRAM_IMUX32_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX33", + "BRAM_IMUX33_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX34", + "BRAM_IMUX34_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX35", + "BRAM_IMUX35_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX36", + "BRAM_IMUX36_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX37", + "BRAM_IMUX37_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX38", + "BRAM_IMUX38_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX39", + "BRAM_IMUX39_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX40", + "BRAM_IMUX40_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX41", + "BRAM_IMUX41_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX42", + "BRAM_IMUX42_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX43", + "BRAM_IMUX43_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX44", + "BRAM_IMUX44_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX45", + "BRAM_IMUX45_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX46", + "BRAM_IMUX46_UTURN_0" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX47", + "BRAM_IMUX47_UTURN_0" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_0" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_0" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_0" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_0" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_0" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_0" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_0" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_0" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_0" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_0" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_0" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_0" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_0" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_0" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_0" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_0" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_0" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_0" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_0" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_0" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_0" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_0" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_0" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_0" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_0" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_0" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_0" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_0" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_0" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_0" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_0" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_0" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_0" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_0" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_0" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_0" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_0" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_0" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_0" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_0" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_0" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_0" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_0" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_0" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_0" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_0" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_0" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_0" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_0" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_0" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_0" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_0" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_0" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_0" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_0" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_0" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_0" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_0" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_0" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "BRAM_LOGIC_OUTS_B0_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "BRAM_LOGIC_OUTS_B1_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "BRAM_LOGIC_OUTS_B2_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "BRAM_LOGIC_OUTS_B3_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "BRAM_LOGIC_OUTS_B4_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "BRAM_LOGIC_OUTS_B5_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "BRAM_LOGIC_OUTS_B6_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "BRAM_LOGIC_OUTS_B7_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "BRAM_LOGIC_OUTS_B8_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "BRAM_LOGIC_OUTS_B9_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "BRAM_LOGIC_OUTS_B10_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "BRAM_LOGIC_OUTS_B11_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "BRAM_LOGIC_OUTS_B12_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "BRAM_LOGIC_OUTS_B13_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "BRAM_LOGIC_OUTS_B14_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "BRAM_LOGIC_OUTS_B15_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "BRAM_LOGIC_OUTS_B16_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "BRAM_LOGIC_OUTS_B17_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "BRAM_LOGIC_OUTS_B18_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "BRAM_LOGIC_OUTS_B19_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "BRAM_LOGIC_OUTS_B20_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "BRAM_LOGIC_OUTS_B21_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "BRAM_LOGIC_OUTS_B22_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "BRAM_LOGIC_OUTS_B23_0" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_0" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_0" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_0" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_0" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_0" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_0" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_0" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_0" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_0" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_0" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_0" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_0" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_0" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_0" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_0" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_0" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_0" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_0" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_0" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_0" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_0" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_0" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_0" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_0" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_0" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_0" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_0" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_0" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_0" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_0" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_0" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_0" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_0" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_0" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_0" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_0" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_0" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_0" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_0" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_0" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_0" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_0" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_0" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_0" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_0" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_0" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_0" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_0" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_0" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_0" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_0" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_0" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_0" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_0" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_0" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_0" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_0" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_0" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_0" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_0" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_0" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_0" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_0" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_0" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_0" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_0" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_0" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_0" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_0" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_0" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_0" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_0" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_0" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_0" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_0" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_0" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_0" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_0" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_0" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_1" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX0", + "BRAM_IMUX0_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX1", + "BRAM_IMUX1_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX2", + "BRAM_IMUX2_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX3", + "BRAM_IMUX3_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX4", + "BRAM_IMUX4_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX5", + "BRAM_IMUX5_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX6", + "BRAM_IMUX6_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX7", + "BRAM_IMUX7_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX8", + "BRAM_IMUX8_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX9", + "BRAM_IMUX9_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX10", + "BRAM_IMUX10_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX11", + "BRAM_IMUX11_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX12", + "BRAM_IMUX12_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX13", + "BRAM_IMUX13_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX14", + "BRAM_IMUX14_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX15", + "BRAM_IMUX15_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX16", + "BRAM_IMUX16_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX17", + "BRAM_IMUX17_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX18", + "BRAM_IMUX18_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX19", + "BRAM_IMUX19_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX20", + "BRAM_IMUX20_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX21", + "BRAM_IMUX21_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX22", + "BRAM_IMUX22_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX23", + "BRAM_IMUX23_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX24", + "BRAM_IMUX24_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX25", + "BRAM_IMUX25_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX26", + "BRAM_IMUX26_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX27", + "BRAM_IMUX27_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX28", + "BRAM_IMUX28_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX29", + "BRAM_IMUX29_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX30", + "BRAM_IMUX30_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX31", + "BRAM_IMUX31_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX32", + "BRAM_IMUX32_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX33", + "BRAM_IMUX33_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX34", + "BRAM_IMUX34_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX35", + "BRAM_IMUX35_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX36", + "BRAM_IMUX36_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX37", + "BRAM_IMUX37_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX38", + "BRAM_IMUX38_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX39", + "BRAM_IMUX39_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX40", + "BRAM_IMUX40_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX41", + "BRAM_IMUX41_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX42", + "BRAM_IMUX42_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX43", + "BRAM_IMUX43_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX44", + "BRAM_IMUX44_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX45", + "BRAM_IMUX45_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX46", + "BRAM_IMUX46_UTURN_1" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX47", + "BRAM_IMUX47_UTURN_1" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_1" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_1" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_1" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_1" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_1" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_1" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_1" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_1" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_1" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_1" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_1" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_1" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_1" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_1" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_1" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_1" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_1" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_1" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_1" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_1" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_1" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_1" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_1" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_1" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_1" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_1" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_1" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_1" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_1" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_1" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_1" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_1" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_1" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_1" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_1" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_1" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_1" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_1" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_1" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_1" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_1" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_1" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_1" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_1" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_1" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_1" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_1" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_1" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_1" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_1" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_1" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_1" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_1" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_1" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_1" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_1" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_1" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_1" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_1" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "BRAM_LOGIC_OUTS_B0_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "BRAM_LOGIC_OUTS_B1_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "BRAM_LOGIC_OUTS_B2_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "BRAM_LOGIC_OUTS_B3_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "BRAM_LOGIC_OUTS_B4_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "BRAM_LOGIC_OUTS_B5_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "BRAM_LOGIC_OUTS_B6_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "BRAM_LOGIC_OUTS_B7_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "BRAM_LOGIC_OUTS_B8_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "BRAM_LOGIC_OUTS_B9_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "BRAM_LOGIC_OUTS_B10_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "BRAM_LOGIC_OUTS_B11_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "BRAM_LOGIC_OUTS_B12_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "BRAM_LOGIC_OUTS_B13_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "BRAM_LOGIC_OUTS_B14_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "BRAM_LOGIC_OUTS_B15_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "BRAM_LOGIC_OUTS_B16_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "BRAM_LOGIC_OUTS_B17_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "BRAM_LOGIC_OUTS_B18_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "BRAM_LOGIC_OUTS_B19_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "BRAM_LOGIC_OUTS_B20_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "BRAM_LOGIC_OUTS_B21_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "BRAM_LOGIC_OUTS_B22_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "BRAM_LOGIC_OUTS_B23_1" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_1" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_1" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_1" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_1" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_1" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_1" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_1" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_1" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_1" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_1" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_1" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_1" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_1" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_1" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_1" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_1" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_1" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_1" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_1" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_1" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_1" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_1" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_1" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_1" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_1" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_1" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_1" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_1" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_1" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_1" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_1" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_1" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_1" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_1" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_1" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_1" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_1" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_1" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_1" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_1" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_1" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_1" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_1" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_1" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_1" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_1" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_1" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_1" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_1" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_1" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_1" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_1" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_1" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_1" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_1" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_1" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_1" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_1" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_1" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_1" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_1" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_1" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_1" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_1" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_1" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_1" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_1" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_1" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_1" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_1" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_1" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_1" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_1" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_1" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_1" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_1" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_1" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_1" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_1" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_1" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_2" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX0", + "BRAM_IMUX0_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX1", + "BRAM_IMUX1_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX2", + "BRAM_IMUX2_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX3", + "BRAM_IMUX3_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX4", + "BRAM_IMUX4_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX5", + "BRAM_IMUX5_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX6", + "BRAM_IMUX6_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX7", + "BRAM_IMUX7_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX8", + "BRAM_IMUX8_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX9", + "BRAM_IMUX9_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX10", + "BRAM_IMUX10_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX11", + "BRAM_IMUX11_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX12", + "BRAM_IMUX12_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX13", + "BRAM_IMUX13_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX14", + "BRAM_IMUX14_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX15", + "BRAM_IMUX15_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX16", + "BRAM_IMUX16_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX17", + "BRAM_IMUX17_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX18", + "BRAM_IMUX18_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX19", + "BRAM_IMUX19_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX20", + "BRAM_IMUX20_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX21", + "BRAM_IMUX21_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX22", + "BRAM_IMUX22_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX23", + "BRAM_IMUX23_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX24", + "BRAM_IMUX24_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX25", + "BRAM_IMUX25_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX26", + "BRAM_IMUX26_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX27", + "BRAM_IMUX27_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX28", + "BRAM_IMUX28_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX29", + "BRAM_IMUX29_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX30", + "BRAM_IMUX30_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX31", + "BRAM_IMUX31_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX32", + "BRAM_IMUX32_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX33", + "BRAM_IMUX33_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX34", + "BRAM_IMUX34_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX35", + "BRAM_IMUX35_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX36", + "BRAM_IMUX36_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX37", + "BRAM_IMUX37_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX38", + "BRAM_IMUX38_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX39", + "BRAM_IMUX39_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX40", + "BRAM_IMUX40_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX41", + "BRAM_IMUX41_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX42", + "BRAM_IMUX42_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX43", + "BRAM_IMUX43_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX44", + "BRAM_IMUX44_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX45", + "BRAM_IMUX45_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX46", + "BRAM_IMUX46_UTURN_2" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX47", + "BRAM_IMUX47_UTURN_2" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_2" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_2" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_2" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_2" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_2" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_2" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_2" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_2" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_2" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_2" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_2" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_2" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_2" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_2" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_2" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_2" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_2" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_2" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_2" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_2" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_2" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_2" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_2" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_2" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_2" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_2" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_2" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_2" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_2" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_2" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_2" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_2" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_2" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_2" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_2" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_2" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_2" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_2" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_2" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_2" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_2" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_2" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_2" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_2" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_2" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_2" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_2" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_2" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_2" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_2" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_2" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_2" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_2" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_2" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_2" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_2" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_2" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_2" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_2" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "BRAM_LOGIC_OUTS_B0_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "BRAM_LOGIC_OUTS_B1_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "BRAM_LOGIC_OUTS_B2_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "BRAM_LOGIC_OUTS_B3_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "BRAM_LOGIC_OUTS_B4_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "BRAM_LOGIC_OUTS_B5_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "BRAM_LOGIC_OUTS_B6_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "BRAM_LOGIC_OUTS_B7_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "BRAM_LOGIC_OUTS_B8_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "BRAM_LOGIC_OUTS_B9_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "BRAM_LOGIC_OUTS_B10_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "BRAM_LOGIC_OUTS_B11_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "BRAM_LOGIC_OUTS_B12_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "BRAM_LOGIC_OUTS_B13_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "BRAM_LOGIC_OUTS_B14_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "BRAM_LOGIC_OUTS_B15_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "BRAM_LOGIC_OUTS_B16_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "BRAM_LOGIC_OUTS_B17_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "BRAM_LOGIC_OUTS_B18_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "BRAM_LOGIC_OUTS_B19_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "BRAM_LOGIC_OUTS_B20_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "BRAM_LOGIC_OUTS_B21_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "BRAM_LOGIC_OUTS_B22_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "BRAM_LOGIC_OUTS_B23_2" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_2" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_2" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_2" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_2" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_2" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_2" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_2" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_2" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_2" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_2" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_2" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_2" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_2" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_2" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_2" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_2" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_2" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_2" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_2" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_2" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_2" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_2" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_2" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_2" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_2" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_2" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_2" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_2" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_2" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_2" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_2" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_2" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_2" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_2" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_2" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_2" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_2" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_2" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_2" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_2" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_2" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_2" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_2" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_2" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_2" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_2" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_2" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_2" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_2" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_2" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_2" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_2" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_2" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_2" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_2" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_2" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_2" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_2" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_2" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_2" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_2" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_2" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_2" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_2" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_2" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_2" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_2" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_2" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_2" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_2" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_2" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_2" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_2" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_2" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_2" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_2" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_2" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_2" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_2" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_2" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_3" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX0", + "BRAM_IMUX0_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX1", + "BRAM_IMUX1_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX2", + "BRAM_IMUX2_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX3", + "BRAM_IMUX3_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX4", + "BRAM_IMUX4_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX5", + "BRAM_IMUX5_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX6", + "BRAM_IMUX6_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX7", + "BRAM_IMUX7_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX8", + "BRAM_IMUX8_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX9", + "BRAM_IMUX9_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX10", + "BRAM_IMUX10_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX11", + "BRAM_IMUX11_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX12", + "BRAM_IMUX12_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX13", + "BRAM_IMUX13_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX14", + "BRAM_IMUX14_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX15", + "BRAM_IMUX15_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX16", + "BRAM_IMUX16_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX17", + "BRAM_IMUX17_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX18", + "BRAM_IMUX18_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX19", + "BRAM_IMUX19_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX20", + "BRAM_IMUX20_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX21", + "BRAM_IMUX21_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX22", + "BRAM_IMUX22_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX23", + "BRAM_IMUX23_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX24", + "BRAM_IMUX24_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX25", + "BRAM_IMUX25_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX26", + "BRAM_IMUX26_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX27", + "BRAM_IMUX27_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX28", + "BRAM_IMUX28_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX29", + "BRAM_IMUX29_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX30", + "BRAM_IMUX30_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX31", + "BRAM_IMUX31_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX32", + "BRAM_IMUX32_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX33", + "BRAM_IMUX33_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX34", + "BRAM_IMUX34_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX35", + "BRAM_IMUX35_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX36", + "BRAM_IMUX36_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX37", + "BRAM_IMUX37_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX38", + "BRAM_IMUX38_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX39", + "BRAM_IMUX39_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX40", + "BRAM_IMUX40_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX41", + "BRAM_IMUX41_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX42", + "BRAM_IMUX42_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX43", + "BRAM_IMUX43_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX44", + "BRAM_IMUX44_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX45", + "BRAM_IMUX45_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX46", + "BRAM_IMUX46_UTURN_3" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX47", + "BRAM_IMUX47_UTURN_3" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_3" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_3" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_3" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_3" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_3" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_3" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_3" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_3" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_3" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_3" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_3" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_3" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_3" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_3" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_3" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_3" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_3" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_3" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_3" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_3" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_3" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_3" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_3" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_3" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_3" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_3" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_3" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_3" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_3" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_3" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_3" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_3" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_3" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_3" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_3" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_3" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_3" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_3" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_3" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_3" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_3" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_3" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_3" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_3" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_3" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_3" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_3" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_3" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_3" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_3" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_3" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_3" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_3" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_3" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_3" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_3" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_3" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_3" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_3" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "BRAM_LOGIC_OUTS_B0_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "BRAM_LOGIC_OUTS_B1_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "BRAM_LOGIC_OUTS_B2_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "BRAM_LOGIC_OUTS_B3_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "BRAM_LOGIC_OUTS_B4_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "BRAM_LOGIC_OUTS_B5_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "BRAM_LOGIC_OUTS_B6_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "BRAM_LOGIC_OUTS_B7_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "BRAM_LOGIC_OUTS_B8_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "BRAM_LOGIC_OUTS_B9_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "BRAM_LOGIC_OUTS_B10_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "BRAM_LOGIC_OUTS_B11_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "BRAM_LOGIC_OUTS_B12_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "BRAM_LOGIC_OUTS_B13_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "BRAM_LOGIC_OUTS_B14_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "BRAM_LOGIC_OUTS_B15_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "BRAM_LOGIC_OUTS_B16_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "BRAM_LOGIC_OUTS_B17_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "BRAM_LOGIC_OUTS_B18_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "BRAM_LOGIC_OUTS_B19_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "BRAM_LOGIC_OUTS_B20_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "BRAM_LOGIC_OUTS_B21_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "BRAM_LOGIC_OUTS_B22_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "BRAM_LOGIC_OUTS_B23_3" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_3" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_3" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_3" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_3" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_3" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_3" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_3" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_3" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_3" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_3" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_3" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_3" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_3" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_3" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_3" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_3" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_3" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_3" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_3" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_3" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_3" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_3" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_3" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_3" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_3" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_3" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_3" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_3" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_3" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_3" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_3" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_3" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_3" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_3" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_3" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_3" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_3" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_3" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_3" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_3" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_3" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_3" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_3" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_3" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_3" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_3" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_3" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_3" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_3" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_3" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_3" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_3" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_3" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_3" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_3" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_3" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_3" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_3" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_3" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_3" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_3" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_3" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_3" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_3" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_3" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_3" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_3" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_3" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_3" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_3" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_3" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_3" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_3" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_3" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_3" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_3" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_3" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_3" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_3" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "BRAM_IMUX0_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "BRAM_IMUX1_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "BRAM_IMUX2_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "BRAM_IMUX3_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "BRAM_IMUX4_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "BRAM_IMUX5_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "BRAM_IMUX6_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "BRAM_IMUX7_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "BRAM_IMUX8_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "BRAM_IMUX9_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "BRAM_IMUX10_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "BRAM_IMUX11_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "BRAM_IMUX12_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "BRAM_IMUX13_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "BRAM_IMUX14_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "BRAM_IMUX15_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "BRAM_IMUX16_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "BRAM_IMUX17_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "BRAM_IMUX18_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "BRAM_IMUX19_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "BRAM_IMUX20_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "BRAM_IMUX21_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "BRAM_IMUX22_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "BRAM_IMUX23_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "BRAM_IMUX24_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "BRAM_IMUX25_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "BRAM_IMUX26_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "BRAM_IMUX27_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "BRAM_IMUX28_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "BRAM_IMUX29_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "BRAM_IMUX30_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "BRAM_IMUX31_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "BRAM_IMUX32_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "BRAM_IMUX33_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "BRAM_IMUX34_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "BRAM_IMUX35_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "BRAM_IMUX36_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "BRAM_IMUX37_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "BRAM_IMUX38_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "BRAM_IMUX39_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "BRAM_IMUX40_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "BRAM_IMUX41_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "BRAM_IMUX42_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "BRAM_IMUX43_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "BRAM_IMUX44_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "BRAM_IMUX45_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "BRAM_IMUX46_4" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "BRAM_IMUX47_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX0", + "BRAM_IMUX0_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX1", + "BRAM_IMUX1_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX2", + "BRAM_IMUX2_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX3", + "BRAM_IMUX3_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX4", + "BRAM_IMUX4_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX5", + "BRAM_IMUX5_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX6", + "BRAM_IMUX6_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX7", + "BRAM_IMUX7_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX8", + "BRAM_IMUX8_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX9", + "BRAM_IMUX9_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX10", + "BRAM_IMUX10_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX11", + "BRAM_IMUX11_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX12", + "BRAM_IMUX12_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX13", + "BRAM_IMUX13_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX14", + "BRAM_IMUX14_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX15", + "BRAM_IMUX15_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX16", + "BRAM_IMUX16_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX17", + "BRAM_IMUX17_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX18", + "BRAM_IMUX18_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX19", + "BRAM_IMUX19_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX20", + "BRAM_IMUX20_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX21", + "BRAM_IMUX21_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX22", + "BRAM_IMUX22_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX23", + "BRAM_IMUX23_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX24", + "BRAM_IMUX24_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX25", + "BRAM_IMUX25_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX26", + "BRAM_IMUX26_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX27", + "BRAM_IMUX27_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX28", + "BRAM_IMUX28_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX29", + "BRAM_IMUX29_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX30", + "BRAM_IMUX30_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX31", + "BRAM_IMUX31_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX32", + "BRAM_IMUX32_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX33", + "BRAM_IMUX33_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX34", + "BRAM_IMUX34_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX35", + "BRAM_IMUX35_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX36", + "BRAM_IMUX36_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX37", + "BRAM_IMUX37_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX38", + "BRAM_IMUX38_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX39", + "BRAM_IMUX39_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX40", + "BRAM_IMUX40_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX41", + "BRAM_IMUX41_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX42", + "BRAM_IMUX42_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX43", + "BRAM_IMUX43_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX44", + "BRAM_IMUX44_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX45", + "BRAM_IMUX45_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX46", + "BRAM_IMUX46_UTURN_4" + ], + [ + "INT_INTERFACE_BRAM_UTURN_R_IMUX47", + "BRAM_IMUX47_UTURN_4" + ], + [ + "INT_INTERFACE_BYP0", + "BRAM_BYP0_4" + ], + [ + "INT_INTERFACE_BYP1", + "BRAM_BYP1_4" + ], + [ + "INT_INTERFACE_BYP2", + "BRAM_BYP2_4" + ], + [ + "INT_INTERFACE_BYP3", + "BRAM_BYP3_4" + ], + [ + "INT_INTERFACE_BYP4", + "BRAM_BYP4_4" + ], + [ + "INT_INTERFACE_BYP5", + "BRAM_BYP5_4" + ], + [ + "INT_INTERFACE_BYP6", + "BRAM_BYP6_4" + ], + [ + "INT_INTERFACE_BYP7", + "BRAM_BYP7_4" + ], + [ + "INT_INTERFACE_CLK0", + "BRAM_CLK0_4" + ], + [ + "INT_INTERFACE_CLK1", + "BRAM_CLK1_4" + ], + [ + "INT_INTERFACE_CTRL0", + "BRAM_CTRL0_4" + ], + [ + "INT_INTERFACE_CTRL1", + "BRAM_CTRL1_4" + ], + [ + "INT_INTERFACE_EE2A0", + "BRAM_EE2A0_4" + ], + [ + "INT_INTERFACE_EE2A1", + "BRAM_EE2A1_4" + ], + [ + "INT_INTERFACE_EE2A2", + "BRAM_EE2A2_4" + ], + [ + "INT_INTERFACE_EE2A3", + "BRAM_EE2A3_4" + ], + [ + "INT_INTERFACE_EE2BEG0", + "BRAM_EE2BEG0_4" + ], + [ + "INT_INTERFACE_EE2BEG1", + "BRAM_EE2BEG1_4" + ], + [ + "INT_INTERFACE_EE2BEG2", + "BRAM_EE2BEG2_4" + ], + [ + "INT_INTERFACE_EE2BEG3", + "BRAM_EE2BEG3_4" + ], + [ + "INT_INTERFACE_EE4A0", + "BRAM_EE4A0_4" + ], + [ + "INT_INTERFACE_EE4A1", + "BRAM_EE4A1_4" + ], + [ + "INT_INTERFACE_EE4A2", + "BRAM_EE4A2_4" + ], + [ + "INT_INTERFACE_EE4A3", + "BRAM_EE4A3_4" + ], + [ + "INT_INTERFACE_EE4B0", + "BRAM_EE4B0_4" + ], + [ + "INT_INTERFACE_EE4B1", + "BRAM_EE4B1_4" + ], + [ + "INT_INTERFACE_EE4B2", + "BRAM_EE4B2_4" + ], + [ + "INT_INTERFACE_EE4B3", + "BRAM_EE4B3_4" + ], + [ + "INT_INTERFACE_EE4BEG0", + "BRAM_EE4BEG0_4" + ], + [ + "INT_INTERFACE_EE4BEG1", + "BRAM_EE4BEG1_4" + ], + [ + "INT_INTERFACE_EE4BEG2", + "BRAM_EE4BEG2_4" + ], + [ + "INT_INTERFACE_EE4BEG3", + "BRAM_EE4BEG3_4" + ], + [ + "INT_INTERFACE_EE4C0", + "BRAM_EE4C0_4" + ], + [ + "INT_INTERFACE_EE4C1", + "BRAM_EE4C1_4" + ], + [ + "INT_INTERFACE_EE4C2", + "BRAM_EE4C2_4" + ], + [ + "INT_INTERFACE_EE4C3", + "BRAM_EE4C3_4" + ], + [ + "INT_INTERFACE_EL1BEG0", + "BRAM_EL1BEG0_4" + ], + [ + "INT_INTERFACE_EL1BEG1", + "BRAM_EL1BEG1_4" + ], + [ + "INT_INTERFACE_EL1BEG2", + "BRAM_EL1BEG2_4" + ], + [ + "INT_INTERFACE_EL1BEG3", + "BRAM_EL1BEG3_4" + ], + [ + "INT_INTERFACE_ER1BEG0", + "BRAM_ER1BEG0_4" + ], + [ + "INT_INTERFACE_ER1BEG1", + "BRAM_ER1BEG1_4" + ], + [ + "INT_INTERFACE_ER1BEG2", + "BRAM_ER1BEG2_4" + ], + [ + "INT_INTERFACE_ER1BEG3", + "BRAM_ER1BEG3_4" + ], + [ + "INT_INTERFACE_FAN0", + "BRAM_FAN0_4" + ], + [ + "INT_INTERFACE_FAN1", + "BRAM_FAN1_4" + ], + [ + "INT_INTERFACE_FAN2", + "BRAM_FAN2_4" + ], + [ + "INT_INTERFACE_FAN3", + "BRAM_FAN3_4" + ], + [ + "INT_INTERFACE_FAN4", + "BRAM_FAN4_4" + ], + [ + "INT_INTERFACE_FAN5", + "BRAM_FAN5_4" + ], + [ + "INT_INTERFACE_FAN6", + "BRAM_FAN6_4" + ], + [ + "INT_INTERFACE_FAN7", + "BRAM_FAN7_4" + ], + [ + "INT_INTERFACE_LH1", + "BRAM_LH1_4" + ], + [ + "INT_INTERFACE_LH2", + "BRAM_LH2_4" + ], + [ + "INT_INTERFACE_LH3", + "BRAM_LH3_4" + ], + [ + "INT_INTERFACE_LH4", + "BRAM_LH4_4" + ], + [ + "INT_INTERFACE_LH5", + "BRAM_LH5_4" + ], + [ + "INT_INTERFACE_LH6", + "BRAM_LH6_4" + ], + [ + "INT_INTERFACE_LH7", + "BRAM_LH7_4" + ], + [ + "INT_INTERFACE_LH8", + "BRAM_LH8_4" + ], + [ + "INT_INTERFACE_LH9", + "BRAM_LH9_4" + ], + [ + "INT_INTERFACE_LH10", + "BRAM_LH10_4" + ], + [ + "INT_INTERFACE_LH11", + "BRAM_LH11_4" + ], + [ + "INT_INTERFACE_LH12", + "BRAM_LH12_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "BRAM_LOGIC_OUTS_B0_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "BRAM_LOGIC_OUTS_B1_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "BRAM_LOGIC_OUTS_B2_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "BRAM_LOGIC_OUTS_B3_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "BRAM_LOGIC_OUTS_B4_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "BRAM_LOGIC_OUTS_B5_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "BRAM_LOGIC_OUTS_B6_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "BRAM_LOGIC_OUTS_B7_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "BRAM_LOGIC_OUTS_B8_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "BRAM_LOGIC_OUTS_B9_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "BRAM_LOGIC_OUTS_B10_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "BRAM_LOGIC_OUTS_B11_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "BRAM_LOGIC_OUTS_B12_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "BRAM_LOGIC_OUTS_B13_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "BRAM_LOGIC_OUTS_B14_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "BRAM_LOGIC_OUTS_B15_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "BRAM_LOGIC_OUTS_B16_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "BRAM_LOGIC_OUTS_B17_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "BRAM_LOGIC_OUTS_B18_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "BRAM_LOGIC_OUTS_B19_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "BRAM_LOGIC_OUTS_B20_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "BRAM_LOGIC_OUTS_B21_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "BRAM_LOGIC_OUTS_B22_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "BRAM_LOGIC_OUTS_B23_4" + ], + [ + "INT_INTERFACE_MONITOR_N", + "BRAM_MONITOR_N_4" + ], + [ + "INT_INTERFACE_MONITOR_P", + "BRAM_MONITOR_P_4" + ], + [ + "INT_INTERFACE_NE2A0", + "BRAM_NE2A0_4" + ], + [ + "INT_INTERFACE_NE2A1", + "BRAM_NE2A1_4" + ], + [ + "INT_INTERFACE_NE2A2", + "BRAM_NE2A2_4" + ], + [ + "INT_INTERFACE_NE2A3", + "BRAM_NE2A3_4" + ], + [ + "INT_INTERFACE_NE4BEG0", + "BRAM_NE4BEG0_4" + ], + [ + "INT_INTERFACE_NE4BEG1", + "BRAM_NE4BEG1_4" + ], + [ + "INT_INTERFACE_NE4BEG2", + "BRAM_NE4BEG2_4" + ], + [ + "INT_INTERFACE_NE4BEG3", + "BRAM_NE4BEG3_4" + ], + [ + "INT_INTERFACE_NE4C0", + "BRAM_NE4C0_4" + ], + [ + "INT_INTERFACE_NE4C1", + "BRAM_NE4C1_4" + ], + [ + "INT_INTERFACE_NE4C2", + "BRAM_NE4C2_4" + ], + [ + "INT_INTERFACE_NE4C3", + "BRAM_NE4C3_4" + ], + [ + "INT_INTERFACE_NW2A0", + "BRAM_NW2A0_4" + ], + [ + "INT_INTERFACE_NW2A1", + "BRAM_NW2A1_4" + ], + [ + "INT_INTERFACE_NW2A2", + "BRAM_NW2A2_4" + ], + [ + "INT_INTERFACE_NW2A3", + "BRAM_NW2A3_4" + ], + [ + "INT_INTERFACE_NW4A0", + "BRAM_NW4A0_4" + ], + [ + "INT_INTERFACE_NW4A1", + "BRAM_NW4A1_4" + ], + [ + "INT_INTERFACE_NW4A2", + "BRAM_NW4A2_4" + ], + [ + "INT_INTERFACE_NW4A3", + "BRAM_NW4A3_4" + ], + [ + "INT_INTERFACE_NW4END0", + "BRAM_NW4END0_4" + ], + [ + "INT_INTERFACE_NW4END1", + "BRAM_NW4END1_4" + ], + [ + "INT_INTERFACE_NW4END2", + "BRAM_NW4END2_4" + ], + [ + "INT_INTERFACE_NW4END3", + "BRAM_NW4END3_4" + ], + [ + "INT_INTERFACE_SE2A0", + "BRAM_SE2A0_4" + ], + [ + "INT_INTERFACE_SE2A1", + "BRAM_SE2A1_4" + ], + [ + "INT_INTERFACE_SE2A2", + "BRAM_SE2A2_4" + ], + [ + "INT_INTERFACE_SE2A3", + "BRAM_SE2A3_4" + ], + [ + "INT_INTERFACE_SE4BEG0", + "BRAM_SE4BEG0_4" + ], + [ + "INT_INTERFACE_SE4BEG1", + "BRAM_SE4BEG1_4" + ], + [ + "INT_INTERFACE_SE4BEG2", + "BRAM_SE4BEG2_4" + ], + [ + "INT_INTERFACE_SE4BEG3", + "BRAM_SE4BEG3_4" + ], + [ + "INT_INTERFACE_SE4C0", + "BRAM_SE4C0_4" + ], + [ + "INT_INTERFACE_SE4C1", + "BRAM_SE4C1_4" + ], + [ + "INT_INTERFACE_SE4C2", + "BRAM_SE4C2_4" + ], + [ + "INT_INTERFACE_SE4C3", + "BRAM_SE4C3_4" + ], + [ + "INT_INTERFACE_SW2A0", + "BRAM_SW2A0_4" + ], + [ + "INT_INTERFACE_SW2A1", + "BRAM_SW2A1_4" + ], + [ + "INT_INTERFACE_SW2A2", + "BRAM_SW2A2_4" + ], + [ + "INT_INTERFACE_SW2A3", + "BRAM_SW2A3_4" + ], + [ + "INT_INTERFACE_SW4A0", + "BRAM_SW4A0_4" + ], + [ + "INT_INTERFACE_SW4A1", + "BRAM_SW4A1_4" + ], + [ + "INT_INTERFACE_SW4A2", + "BRAM_SW4A2_4" + ], + [ + "INT_INTERFACE_SW4A3", + "BRAM_SW4A3_4" + ], + [ + "INT_INTERFACE_SW4END0", + "BRAM_SW4END0_4" + ], + [ + "INT_INTERFACE_SW4END1", + "BRAM_SW4END1_4" + ], + [ + "INT_INTERFACE_SW4END2", + "BRAM_SW4END2_4" + ], + [ + "INT_INTERFACE_SW4END3", + "BRAM_SW4END3_4" + ], + [ + "INT_INTERFACE_WL1END0", + "BRAM_WL1END0_4" + ], + [ + "INT_INTERFACE_WL1END1", + "BRAM_WL1END1_4" + ], + [ + "INT_INTERFACE_WL1END2", + "BRAM_WL1END2_4" + ], + [ + "INT_INTERFACE_WL1END3", + "BRAM_WL1END3_4" + ], + [ + "INT_INTERFACE_WR1END0", + "BRAM_WR1END0_4" + ], + [ + "INT_INTERFACE_WR1END1", + "BRAM_WR1END1_4" + ], + [ + "INT_INTERFACE_WR1END2", + "BRAM_WR1END2_4" + ], + [ + "INT_INTERFACE_WR1END3", + "BRAM_WR1END3_4" + ], + [ + "INT_INTERFACE_WW2A0", + "BRAM_WW2A0_4" + ], + [ + "INT_INTERFACE_WW2A1", + "BRAM_WW2A1_4" + ], + [ + "INT_INTERFACE_WW2A2", + "BRAM_WW2A2_4" + ], + [ + "INT_INTERFACE_WW2A3", + "BRAM_WW2A3_4" + ], + [ + "INT_INTERFACE_WW2END0", + "BRAM_WW2END0_4" + ], + [ + "INT_INTERFACE_WW2END1", + "BRAM_WW2END1_4" + ], + [ + "INT_INTERFACE_WW2END2", + "BRAM_WW2END2_4" + ], + [ + "INT_INTERFACE_WW2END3", + "BRAM_WW2END3_4" + ], + [ + "INT_INTERFACE_WW4A0", + "BRAM_WW4A0_4" + ], + [ + "INT_INTERFACE_WW4A1", + "BRAM_WW4A1_4" + ], + [ + "INT_INTERFACE_WW4A2", + "BRAM_WW4A2_4" + ], + [ + "INT_INTERFACE_WW4A3", + "BRAM_WW4A3_4" + ], + [ + "INT_INTERFACE_WW4B0", + "BRAM_WW4B0_4" + ], + [ + "INT_INTERFACE_WW4B1", + "BRAM_WW4B1_4" + ], + [ + "INT_INTERFACE_WW4B2", + "BRAM_WW4B2_4" + ], + [ + "INT_INTERFACE_WW4B3", + "BRAM_WW4B3_4" + ], + [ + "INT_INTERFACE_WW4C0", + "BRAM_WW4C0_4" + ], + [ + "INT_INTERFACE_WW4C1", + "BRAM_WW4C1_4" + ], + [ + "INT_INTERFACE_WW4C2", + "BRAM_WW4C2_4" + ], + [ + "INT_INTERFACE_WW4C3", + "BRAM_WW4C3_4" + ], + [ + "INT_INTERFACE_WW4END0", + "BRAM_WW4END0_4" + ], + [ + "INT_INTERFACE_WW4END1", + "BRAM_WW4END1_4" + ], + [ + "INT_INTERFACE_WW4END2", + "BRAM_WW4END2_4" + ], + [ + "INT_INTERFACE_WW4END3", + "BRAM_WW4END3_4" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "BRAM_INT_INTERFACE_R", + "INT_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BRAM_IMUX0", + "IMUX0" + ], + [ + "INT_INTERFACE_BRAM_IMUX1", + "IMUX1" + ], + [ + "INT_INTERFACE_BRAM_IMUX2", + "IMUX2" + ], + [ + "INT_INTERFACE_BRAM_IMUX3", + "IMUX3" + ], + [ + "INT_INTERFACE_BRAM_IMUX4", + "IMUX4" + ], + [ + "INT_INTERFACE_BRAM_IMUX5", + "IMUX5" + ], + [ + "INT_INTERFACE_BRAM_IMUX6", + "IMUX6" + ], + [ + "INT_INTERFACE_BRAM_IMUX7", + "IMUX7" + ], + [ + "INT_INTERFACE_BRAM_IMUX8", + "IMUX8" + ], + [ + "INT_INTERFACE_BRAM_IMUX9", + "IMUX9" + ], + [ + "INT_INTERFACE_BRAM_IMUX10", + "IMUX10" + ], + [ + "INT_INTERFACE_BRAM_IMUX11", + "IMUX11" + ], + [ + "INT_INTERFACE_BRAM_IMUX12", + "IMUX12" + ], + [ + "INT_INTERFACE_BRAM_IMUX13", + "IMUX13" + ], + [ + "INT_INTERFACE_BRAM_IMUX14", + "IMUX14" + ], + [ + "INT_INTERFACE_BRAM_IMUX15", + "IMUX15" + ], + [ + "INT_INTERFACE_BRAM_IMUX16", + "IMUX16" + ], + [ + "INT_INTERFACE_BRAM_IMUX17", + "IMUX17" + ], + [ + "INT_INTERFACE_BRAM_IMUX18", + "IMUX18" + ], + [ + "INT_INTERFACE_BRAM_IMUX19", + "IMUX19" + ], + [ + "INT_INTERFACE_BRAM_IMUX20", + "IMUX20" + ], + [ + "INT_INTERFACE_BRAM_IMUX21", + "IMUX21" + ], + [ + "INT_INTERFACE_BRAM_IMUX22", + "IMUX22" + ], + [ + "INT_INTERFACE_BRAM_IMUX23", + "IMUX23" + ], + [ + "INT_INTERFACE_BRAM_IMUX24", + "IMUX24" + ], + [ + "INT_INTERFACE_BRAM_IMUX25", + "IMUX25" + ], + [ + "INT_INTERFACE_BRAM_IMUX26", + "IMUX26" + ], + [ + "INT_INTERFACE_BRAM_IMUX27", + "IMUX27" + ], + [ + "INT_INTERFACE_BRAM_IMUX28", + "IMUX28" + ], + [ + "INT_INTERFACE_BRAM_IMUX29", + "IMUX29" + ], + [ + "INT_INTERFACE_BRAM_IMUX30", + "IMUX30" + ], + [ + "INT_INTERFACE_BRAM_IMUX31", + "IMUX31" + ], + [ + "INT_INTERFACE_BRAM_IMUX32", + "IMUX32" + ], + [ + "INT_INTERFACE_BRAM_IMUX33", + "IMUX33" + ], + [ + "INT_INTERFACE_BRAM_IMUX34", + "IMUX34" + ], + [ + "INT_INTERFACE_BRAM_IMUX35", + "IMUX35" + ], + [ + "INT_INTERFACE_BRAM_IMUX36", + "IMUX36" + ], + [ + "INT_INTERFACE_BRAM_IMUX37", + "IMUX37" + ], + [ + "INT_INTERFACE_BRAM_IMUX38", + "IMUX38" + ], + [ + "INT_INTERFACE_BRAM_IMUX39", + "IMUX39" + ], + [ + "INT_INTERFACE_BRAM_IMUX40", + "IMUX40" + ], + [ + "INT_INTERFACE_BRAM_IMUX41", + "IMUX41" + ], + [ + "INT_INTERFACE_BRAM_IMUX42", + "IMUX42" + ], + [ + "INT_INTERFACE_BRAM_IMUX43", + "IMUX43" + ], + [ + "INT_INTERFACE_BRAM_IMUX44", + "IMUX44" + ], + [ + "INT_INTERFACE_BRAM_IMUX45", + "IMUX45" + ], + [ + "INT_INTERFACE_BRAM_IMUX46", + "IMUX46" + ], + [ + "INT_INTERFACE_BRAM_IMUX47", + "IMUX47" + ], + [ + "INT_INTERFACE_BYP0", + "BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "EE2A0" + ], + [ + "INT_INTERFACE_EE2A1", + "EE2A1" + ], + [ + "INT_INTERFACE_EE2A2", + "EE2A2" + ], + [ + "INT_INTERFACE_EE2A3", + "EE2A3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "EE2BEG0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "EE2BEG1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "EE2BEG2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "EE2BEG3" + ], + [ + "INT_INTERFACE_EE4A0", + "EE4A0" + ], + [ + "INT_INTERFACE_EE4A1", + "EE4A1" + ], + [ + "INT_INTERFACE_EE4A2", + "EE4A2" + ], + [ + "INT_INTERFACE_EE4A3", + "EE4A3" + ], + [ + "INT_INTERFACE_EE4B0", + "EE4B0" + ], + [ + "INT_INTERFACE_EE4B1", + "EE4B1" + ], + [ + "INT_INTERFACE_EE4B2", + "EE4B2" + ], + [ + "INT_INTERFACE_EE4B3", + "EE4B3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "EE4BEG0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "EE4BEG1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "EE4BEG2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "EE4BEG3" + ], + [ + "INT_INTERFACE_EE4C0", + "EE4C0" + ], + [ + "INT_INTERFACE_EE4C1", + "EE4C1" + ], + [ + "INT_INTERFACE_EE4C2", + "EE4C2" + ], + [ + "INT_INTERFACE_EE4C3", + "EE4C3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "EL1BEG0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "EL1BEG1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "EL1BEG2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "EL1BEG3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "ER1BEG0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "ER1BEG1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "ER1BEG2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "ER1BEG3" + ], + [ + "INT_INTERFACE_FAN0", + "FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "FAN7" + ], + [ + "INT_INTERFACE_LH1", + "LH1" + ], + [ + "INT_INTERFACE_LH2", + "LH2" + ], + [ + "INT_INTERFACE_LH3", + "LH3" + ], + [ + "INT_INTERFACE_LH4", + "LH4" + ], + [ + "INT_INTERFACE_LH5", + "LH5" + ], + [ + "INT_INTERFACE_LH6", + "LH6" + ], + [ + "INT_INTERFACE_LH7", + "LH7" + ], + [ + "INT_INTERFACE_LH8", + "LH8" + ], + [ + "INT_INTERFACE_LH9", + "LH9" + ], + [ + "INT_INTERFACE_LH10", + "LH10" + ], + [ + "INT_INTERFACE_LH11", + "LH11" + ], + [ + "INT_INTERFACE_LH12", + "LH12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS0", + "LOGIC_OUTS0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS1", + "LOGIC_OUTS1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS2", + "LOGIC_OUTS2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS3", + "LOGIC_OUTS3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS4", + "LOGIC_OUTS4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS5", + "LOGIC_OUTS5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS6", + "LOGIC_OUTS6" + ], + [ + "INT_INTERFACE_LOGIC_OUTS7", + "LOGIC_OUTS7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS8", + "LOGIC_OUTS8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS9", + "LOGIC_OUTS9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS10", + "LOGIC_OUTS10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS11", + "LOGIC_OUTS11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS12", + "LOGIC_OUTS12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS13", + "LOGIC_OUTS13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS14", + "LOGIC_OUTS14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS15", + "LOGIC_OUTS15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS16", + "LOGIC_OUTS16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS17", + "LOGIC_OUTS17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS18", + "LOGIC_OUTS18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS19", + "LOGIC_OUTS19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS20", + "LOGIC_OUTS20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS21", + "LOGIC_OUTS21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS22", + "LOGIC_OUTS22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS23", + "LOGIC_OUTS23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "NE2A0" + ], + [ + "INT_INTERFACE_NE2A1", + "NE2A1" + ], + [ + "INT_INTERFACE_NE2A2", + "NE2A2" + ], + [ + "INT_INTERFACE_NE2A3", + "NE2A3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "NE6BEG0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "NE6BEG1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "NE6BEG2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "NE6BEG3" + ], + [ + "INT_INTERFACE_NE4C0", + "NE6E0" + ], + [ + "INT_INTERFACE_NE4C1", + "NE6E1" + ], + [ + "INT_INTERFACE_NE4C2", + "NE6E2" + ], + [ + "INT_INTERFACE_NE4C3", + "NE6E3" + ], + [ + "INT_INTERFACE_NW2A0", + "NW2END0" + ], + [ + "INT_INTERFACE_NW2A1", + "NW2END1" + ], + [ + "INT_INTERFACE_NW2A2", + "NW2END2" + ], + [ + "INT_INTERFACE_NW2A3", + "NW2END3" + ], + [ + "INT_INTERFACE_NW4A0", + "NW6A0" + ], + [ + "INT_INTERFACE_NW4A1", + "NW6A1" + ], + [ + "INT_INTERFACE_NW4A2", + "NW6A2" + ], + [ + "INT_INTERFACE_NW4A3", + "NW6A3" + ], + [ + "INT_INTERFACE_NW4END0", + "NW6END0" + ], + [ + "INT_INTERFACE_NW4END1", + "NW6END1" + ], + [ + "INT_INTERFACE_NW4END2", + "NW6END2" + ], + [ + "INT_INTERFACE_NW4END3", + "NW6END3" + ], + [ + "INT_INTERFACE_SE2A0", + "SE2A0" + ], + [ + "INT_INTERFACE_SE2A1", + "SE2A1" + ], + [ + "INT_INTERFACE_SE2A2", + "SE2A2" + ], + [ + "INT_INTERFACE_SE2A3", + "SE2A3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "SE6BEG0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "SE6BEG1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "SE6BEG2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "SE6BEG3" + ], + [ + "INT_INTERFACE_SE4C0", + "SE6E0" + ], + [ + "INT_INTERFACE_SE4C1", + "SE6E1" + ], + [ + "INT_INTERFACE_SE4C2", + "SE6E2" + ], + [ + "INT_INTERFACE_SE4C3", + "SE6E3" + ], + [ + "INT_INTERFACE_SW2A0", + "SW2END0" + ], + [ + "INT_INTERFACE_SW2A1", + "SW2END1" + ], + [ + "INT_INTERFACE_SW2A2", + "SW2END2" + ], + [ + "INT_INTERFACE_SW2A3", + "SW2END3" + ], + [ + "INT_INTERFACE_SW4A0", + "SW6A0" + ], + [ + "INT_INTERFACE_SW4A1", + "SW6A1" + ], + [ + "INT_INTERFACE_SW4A2", + "SW6A2" + ], + [ + "INT_INTERFACE_SW4A3", + "SW6A3" + ], + [ + "INT_INTERFACE_SW4END0", + "SW6END0" + ], + [ + "INT_INTERFACE_SW4END1", + "SW6END1" + ], + [ + "INT_INTERFACE_SW4END2", + "SW6END2" + ], + [ + "INT_INTERFACE_SW4END3", + "SW6END3" + ], + [ + "INT_INTERFACE_WL1END0", + "WL1END0" + ], + [ + "INT_INTERFACE_WL1END1", + "WL1END1" + ], + [ + "INT_INTERFACE_WL1END2", + "WL1END2" + ], + [ + "INT_INTERFACE_WL1END3", + "WL1END3" + ], + [ + "INT_INTERFACE_WR1END0", + "WR1END0" + ], + [ + "INT_INTERFACE_WR1END1", + "WR1END1" + ], + [ + "INT_INTERFACE_WR1END2", + "WR1END2" + ], + [ + "INT_INTERFACE_WR1END3", + "WR1END3" + ], + [ + "INT_INTERFACE_WW2A0", + "WW2A0" + ], + [ + "INT_INTERFACE_WW2A1", + "WW2A1" + ], + [ + "INT_INTERFACE_WW2A2", + "WW2A2" + ], + [ + "INT_INTERFACE_WW2A3", + "WW2A3" + ], + [ + "INT_INTERFACE_WW2END0", + "WW2END0" + ], + [ + "INT_INTERFACE_WW2END1", + "WW2END1" + ], + [ + "INT_INTERFACE_WW2END2", + "WW2END2" + ], + [ + "INT_INTERFACE_WW2END3", + "WW2END3" + ], + [ + "INT_INTERFACE_WW4A0", + "WW4A0" + ], + [ + "INT_INTERFACE_WW4A1", + "WW4A1" + ], + [ + "INT_INTERFACE_WW4A2", + "WW4A2" + ], + [ + "INT_INTERFACE_WW4A3", + "WW4A3" + ], + [ + "INT_INTERFACE_WW4B0", + "WW4B0" + ], + [ + "INT_INTERFACE_WW4B1", + "WW4B1" + ], + [ + "INT_INTERFACE_WW4B2", + "WW4B2" + ], + [ + "INT_INTERFACE_WW4B3", + "WW4B3" + ], + [ + "INT_INTERFACE_WW4C0", + "WW4C0" + ], + [ + "INT_INTERFACE_WW4C1", + "WW4C1" + ], + [ + "INT_INTERFACE_WW4C2", + "WW4C2" + ], + [ + "INT_INTERFACE_WW4C3", + "WW4C3" + ], + [ + "INT_INTERFACE_WW4END0", + "WW4END0" + ], + [ + "INT_INTERFACE_WW4END1", + "WW4END1" + ], + [ + "INT_INTERFACE_WW4END2", + "WW4END2" + ], + [ + "INT_INTERFACE_WW4END3", + "WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "BRAM_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "BRAM_CASCINTOP_ADDRARDADDRU0", + "BRAM_CASCOUT_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU1", + "BRAM_CASCOUT_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU2", + "BRAM_CASCOUT_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU3", + "BRAM_CASCOUT_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU4", + "BRAM_CASCOUT_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU5", + "BRAM_CASCOUT_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU6", + "BRAM_CASCOUT_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU7", + "BRAM_CASCOUT_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU8", + "BRAM_CASCOUT_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU9", + "BRAM_CASCOUT_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU10", + "BRAM_CASCOUT_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU11", + "BRAM_CASCOUT_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU12", + "BRAM_CASCOUT_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU13", + "BRAM_CASCOUT_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU14", + "BRAM_CASCOUT_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU0", + "BRAM_CASCOUT_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU1", + "BRAM_CASCOUT_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU2", + "BRAM_CASCOUT_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU3", + "BRAM_CASCOUT_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU4", + "BRAM_CASCOUT_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU5", + "BRAM_CASCOUT_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU6", + "BRAM_CASCOUT_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU7", + "BRAM_CASCOUT_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU8", + "BRAM_CASCOUT_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU9", + "BRAM_CASCOUT_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU10", + "BRAM_CASCOUT_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU11", + "BRAM_CASCOUT_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU12", + "BRAM_CASCOUT_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU13", + "BRAM_CASCOUT_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU14", + "BRAM_CASCOUT_ADDRBWRADDRU14" + ], + [ + "BRAM_PMVBRAM_O", + "BRAM_PMVBRAM_O_1" + ], + [ + "BRAM_PMVBRAM_ODIV2", + "BRAM_PMVBRAM_ODIV2_1" + ], + [ + "BRAM_PMVBRAM_O_1", + "BRAM_PMVBRAM_O_2" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "BRAM_L", + "BRAM_L" + ], + "wire_pairs": [ + [ + "BRAM_CASCINBOT_ADDRARDADDRU0", + "BRAM_CASCOUT_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU1", + "BRAM_CASCOUT_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU2", + "BRAM_CASCOUT_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU3", + "BRAM_CASCOUT_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU4", + "BRAM_CASCOUT_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU5", + "BRAM_CASCOUT_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU6", + "BRAM_CASCOUT_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU7", + "BRAM_CASCOUT_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU8", + "BRAM_CASCOUT_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU9", + "BRAM_CASCOUT_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU10", + "BRAM_CASCOUT_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU11", + "BRAM_CASCOUT_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU12", + "BRAM_CASCOUT_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU13", + "BRAM_CASCOUT_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU14", + "BRAM_CASCOUT_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU0", + "BRAM_CASCOUT_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU1", + "BRAM_CASCOUT_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU2", + "BRAM_CASCOUT_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU3", + "BRAM_CASCOUT_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU4", + "BRAM_CASCOUT_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU5", + "BRAM_CASCOUT_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU6", + "BRAM_CASCOUT_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU7", + "BRAM_CASCOUT_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU8", + "BRAM_CASCOUT_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU9", + "BRAM_CASCOUT_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU10", + "BRAM_CASCOUT_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU11", + "BRAM_CASCOUT_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU12", + "BRAM_CASCOUT_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU13", + "BRAM_CASCOUT_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU14", + "BRAM_CASCOUT_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEINA", + "BRAM_FIFO36_CASCADEOUTA_1" + ], + [ + "BRAM_FIFO36_CASCADEINB", + "BRAM_FIFO36_CASCADEOUTB_1" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "BRAM_L", + "BRKH_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINTOP_ADDRARDADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEOUTA_1", + "BRKH_BRAM_CASCADEA_L" + ], + [ + "BRAM_FIFO36_CASCADEOUTB_1", + "BRKH_BRAM_CASCADEB_L" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRAM_L", + "BRKH_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINBOT_ADDRARDADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEINA", + "BRKH_BRAM_CASCADEA_L" + ], + [ + "BRAM_FIFO36_CASCADEINB", + "BRKH_BRAM_CASCADEB_L" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "BRAM_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_4", + "CLBLM_EE2A0" + ], + [ + "BRAM_EE2A1_4", + "CLBLM_EE2A1" + ], + [ + "BRAM_EE2A2_4", + "CLBLM_EE2A2" + ], + [ + "BRAM_EE2A3_4", + "CLBLM_EE2A3" + ], + [ + "BRAM_EE2BEG0_4", + "CLBLM_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_4", + "CLBLM_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_4", + "CLBLM_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_4", + "CLBLM_EE2BEG3" + ], + [ + "BRAM_EE4A0_4", + "CLBLM_EE4A0" + ], + [ + "BRAM_EE4A1_4", + "CLBLM_EE4A1" + ], + [ + "BRAM_EE4A2_4", + "CLBLM_EE4A2" + ], + [ + "BRAM_EE4A3_4", + "CLBLM_EE4A3" + ], + [ + "BRAM_EE4B0_4", + "CLBLM_EE4B0" + ], + [ + "BRAM_EE4B1_4", + "CLBLM_EE4B1" + ], + [ + "BRAM_EE4B2_4", + "CLBLM_EE4B2" + ], + [ + "BRAM_EE4B3_4", + "CLBLM_EE4B3" + ], + [ + "BRAM_EE4BEG0_4", + "CLBLM_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_4", + "CLBLM_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_4", + "CLBLM_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_4", + "CLBLM_EE4BEG3" + ], + [ + "BRAM_EE4C0_4", + "CLBLM_EE4C0" + ], + [ + "BRAM_EE4C1_4", + "CLBLM_EE4C1" + ], + [ + "BRAM_EE4C2_4", + "CLBLM_EE4C2" + ], + [ + "BRAM_EE4C3_4", + "CLBLM_EE4C3" + ], + [ + "BRAM_EL1BEG0_4", + "CLBLM_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_4", + "CLBLM_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_4", + "CLBLM_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_4", + "CLBLM_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_4", + "CLBLM_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_4", + "CLBLM_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_4", + "CLBLM_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_4", + "CLBLM_ER1BEG3" + ], + [ + "BRAM_LH1_4", + "CLBLM_LH1" + ], + [ + "BRAM_LH2_4", + "CLBLM_LH2" + ], + [ + "BRAM_LH3_4", + "CLBLM_LH3" + ], + [ + "BRAM_LH4_4", + "CLBLM_LH4" + ], + [ + "BRAM_LH5_4", + "CLBLM_LH5" + ], + [ + "BRAM_LH6_4", + "CLBLM_LH6" + ], + [ + "BRAM_LH7_4", + "CLBLM_LH7" + ], + [ + "BRAM_LH8_4", + "CLBLM_LH8" + ], + [ + "BRAM_LH9_4", + "CLBLM_LH9" + ], + [ + "BRAM_LH10_4", + "CLBLM_LH10" + ], + [ + "BRAM_LH11_4", + "CLBLM_LH11" + ], + [ + "BRAM_LH12_4", + "CLBLM_LH12" + ], + [ + "BRAM_MONITOR_N_4", + "CLBLM_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_4", + "CLBLM_MONITOR_P" + ], + [ + "BRAM_NE2A0_4", + "CLBLM_NE2A0" + ], + [ + "BRAM_NE2A1_4", + "CLBLM_NE2A1" + ], + [ + "BRAM_NE2A2_4", + "CLBLM_NE2A2" + ], + [ + "BRAM_NE2A3_4", + "CLBLM_NE2A3" + ], + [ + "BRAM_NE4BEG0_4", + "CLBLM_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_4", + "CLBLM_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_4", + "CLBLM_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_4", + "CLBLM_NE4BEG3" + ], + [ + "BRAM_NE4C0_4", + "CLBLM_NE4C0" + ], + [ + "BRAM_NE4C1_4", + "CLBLM_NE4C1" + ], + [ + "BRAM_NE4C2_4", + "CLBLM_NE4C2" + ], + [ + "BRAM_NE4C3_4", + "CLBLM_NE4C3" + ], + [ + "BRAM_NW2A0_4", + "CLBLM_NW2A0" + ], + [ + "BRAM_NW2A1_4", + "CLBLM_NW2A1" + ], + [ + "BRAM_NW2A2_4", + "CLBLM_NW2A2" + ], + [ + "BRAM_NW2A3_4", + "CLBLM_NW2A3" + ], + [ + "BRAM_NW4A0_4", + "CLBLM_NW4A0" + ], + [ + "BRAM_NW4A1_4", + "CLBLM_NW4A1" + ], + [ + "BRAM_NW4A2_4", + "CLBLM_NW4A2" + ], + [ + "BRAM_NW4A3_4", + "CLBLM_NW4A3" + ], + [ + "BRAM_NW4END0_4", + "CLBLM_NW4END0" + ], + [ + "BRAM_NW4END1_4", + "CLBLM_NW4END1" + ], + [ + "BRAM_NW4END2_4", + "CLBLM_NW4END2" + ], + [ + "BRAM_NW4END3_4", + "CLBLM_NW4END3" + ], + [ + "BRAM_SE2A0_4", + "CLBLM_SE2A0" + ], + [ + "BRAM_SE2A1_4", + "CLBLM_SE2A1" + ], + [ + "BRAM_SE2A2_4", + "CLBLM_SE2A2" + ], + [ + "BRAM_SE2A3_4", + "CLBLM_SE2A3" + ], + [ + "BRAM_SE4BEG0_4", + "CLBLM_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_4", + "CLBLM_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_4", + "CLBLM_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_4", + "CLBLM_SE4BEG3" + ], + [ + "BRAM_SE4C0_4", + "CLBLM_SE4C0" + ], + [ + "BRAM_SE4C1_4", + "CLBLM_SE4C1" + ], + [ + "BRAM_SE4C2_4", + "CLBLM_SE4C2" + ], + [ + "BRAM_SE4C3_4", + "CLBLM_SE4C3" + ], + [ + "BRAM_SW2A0_4", + "CLBLM_SW2A0" + ], + [ + "BRAM_SW2A1_4", + "CLBLM_SW2A1" + ], + [ + "BRAM_SW2A2_4", + "CLBLM_SW2A2" + ], + [ + "BRAM_SW2A3_4", + "CLBLM_SW2A3" + ], + [ + "BRAM_SW4A0_4", + "CLBLM_SW4A0" + ], + [ + "BRAM_SW4A1_4", + "CLBLM_SW4A1" + ], + [ + "BRAM_SW4A2_4", + "CLBLM_SW4A2" + ], + [ + "BRAM_SW4A3_4", + "CLBLM_SW4A3" + ], + [ + "BRAM_SW4END0_4", + "CLBLM_SW4END0" + ], + [ + "BRAM_SW4END1_4", + "CLBLM_SW4END1" + ], + [ + "BRAM_SW4END2_4", + "CLBLM_SW4END2" + ], + [ + "BRAM_SW4END3_4", + "CLBLM_SW4END3" + ], + [ + "BRAM_WL1END0_4", + "CLBLM_WL1END0" + ], + [ + "BRAM_WL1END1_4", + "CLBLM_WL1END1" + ], + [ + "BRAM_WL1END2_4", + "CLBLM_WL1END2" + ], + [ + "BRAM_WL1END3_4", + "CLBLM_WL1END3" + ], + [ + "BRAM_WR1END0_4", + "CLBLM_WR1END0" + ], + [ + "BRAM_WR1END1_4", + "CLBLM_WR1END1" + ], + [ + "BRAM_WR1END2_4", + "CLBLM_WR1END2" + ], + [ + "BRAM_WR1END3_4", + "CLBLM_WR1END3" + ], + [ + "BRAM_WW2A0_4", + "CLBLM_WW2A0" + ], + [ + "BRAM_WW2A1_4", + "CLBLM_WW2A1" + ], + [ + "BRAM_WW2A2_4", + "CLBLM_WW2A2" + ], + [ + "BRAM_WW2A3_4", + "CLBLM_WW2A3" + ], + [ + "BRAM_WW2END0_4", + "CLBLM_WW2END0" + ], + [ + "BRAM_WW2END1_4", + "CLBLM_WW2END1" + ], + [ + "BRAM_WW2END2_4", + "CLBLM_WW2END2" + ], + [ + "BRAM_WW2END3_4", + "CLBLM_WW2END3" + ], + [ + "BRAM_WW4A0_4", + "CLBLM_WW4A0" + ], + [ + "BRAM_WW4A1_4", + "CLBLM_WW4A1" + ], + [ + "BRAM_WW4A2_4", + "CLBLM_WW4A2" + ], + [ + "BRAM_WW4A3_4", + "CLBLM_WW4A3" + ], + [ + "BRAM_WW4B0_4", + "CLBLM_WW4B0" + ], + [ + "BRAM_WW4B1_4", + "CLBLM_WW4B1" + ], + [ + "BRAM_WW4B2_4", + "CLBLM_WW4B2" + ], + [ + "BRAM_WW4B3_4", + "CLBLM_WW4B3" + ], + [ + "BRAM_WW4C0_4", + "CLBLM_WW4C0" + ], + [ + "BRAM_WW4C1_4", + "CLBLM_WW4C1" + ], + [ + "BRAM_WW4C2_4", + "CLBLM_WW4C2" + ], + [ + "BRAM_WW4C3_4", + "CLBLM_WW4C3" + ], + [ + "BRAM_WW4END0_4", + "CLBLM_WW4END0" + ], + [ + "BRAM_WW4END1_4", + "CLBLM_WW4END1" + ], + [ + "BRAM_WW4END2_4", + "CLBLM_WW4END2" + ], + [ + "BRAM_WW4END3_4", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "BRAM_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_3", + "CLBLM_EE2A0" + ], + [ + "BRAM_EE2A1_3", + "CLBLM_EE2A1" + ], + [ + "BRAM_EE2A2_3", + "CLBLM_EE2A2" + ], + [ + "BRAM_EE2A3_3", + "CLBLM_EE2A3" + ], + [ + "BRAM_EE2BEG0_3", + "CLBLM_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_3", + "CLBLM_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_3", + "CLBLM_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_3", + "CLBLM_EE2BEG3" + ], + [ + "BRAM_EE4A0_3", + "CLBLM_EE4A0" + ], + [ + "BRAM_EE4A1_3", + "CLBLM_EE4A1" + ], + [ + "BRAM_EE4A2_3", + "CLBLM_EE4A2" + ], + [ + "BRAM_EE4A3_3", + "CLBLM_EE4A3" + ], + [ + "BRAM_EE4B0_3", + "CLBLM_EE4B0" + ], + [ + "BRAM_EE4B1_3", + "CLBLM_EE4B1" + ], + [ + "BRAM_EE4B2_3", + "CLBLM_EE4B2" + ], + [ + "BRAM_EE4B3_3", + "CLBLM_EE4B3" + ], + [ + "BRAM_EE4BEG0_3", + "CLBLM_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_3", + "CLBLM_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_3", + "CLBLM_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_3", + "CLBLM_EE4BEG3" + ], + [ + "BRAM_EE4C0_3", + "CLBLM_EE4C0" + ], + [ + "BRAM_EE4C1_3", + "CLBLM_EE4C1" + ], + [ + "BRAM_EE4C2_3", + "CLBLM_EE4C2" + ], + [ + "BRAM_EE4C3_3", + "CLBLM_EE4C3" + ], + [ + "BRAM_EL1BEG0_3", + "CLBLM_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_3", + "CLBLM_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_3", + "CLBLM_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_3", + "CLBLM_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_3", + "CLBLM_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_3", + "CLBLM_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_3", + "CLBLM_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_3", + "CLBLM_ER1BEG3" + ], + [ + "BRAM_LH1_3", + "CLBLM_LH1" + ], + [ + "BRAM_LH2_3", + "CLBLM_LH2" + ], + [ + "BRAM_LH3_3", + "CLBLM_LH3" + ], + [ + "BRAM_LH4_3", + "CLBLM_LH4" + ], + [ + "BRAM_LH5_3", + "CLBLM_LH5" + ], + [ + "BRAM_LH6_3", + "CLBLM_LH6" + ], + [ + "BRAM_LH7_3", + "CLBLM_LH7" + ], + [ + "BRAM_LH8_3", + "CLBLM_LH8" + ], + [ + "BRAM_LH9_3", + "CLBLM_LH9" + ], + [ + "BRAM_LH10_3", + "CLBLM_LH10" + ], + [ + "BRAM_LH11_3", + "CLBLM_LH11" + ], + [ + "BRAM_LH12_3", + "CLBLM_LH12" + ], + [ + "BRAM_MONITOR_N_3", + "CLBLM_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_3", + "CLBLM_MONITOR_P" + ], + [ + "BRAM_NE2A0_3", + "CLBLM_NE2A0" + ], + [ + "BRAM_NE2A1_3", + "CLBLM_NE2A1" + ], + [ + "BRAM_NE2A2_3", + "CLBLM_NE2A2" + ], + [ + "BRAM_NE2A3_3", + "CLBLM_NE2A3" + ], + [ + "BRAM_NE4BEG0_3", + "CLBLM_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_3", + "CLBLM_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_3", + "CLBLM_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_3", + "CLBLM_NE4BEG3" + ], + [ + "BRAM_NE4C0_3", + "CLBLM_NE4C0" + ], + [ + "BRAM_NE4C1_3", + "CLBLM_NE4C1" + ], + [ + "BRAM_NE4C2_3", + "CLBLM_NE4C2" + ], + [ + "BRAM_NE4C3_3", + "CLBLM_NE4C3" + ], + [ + "BRAM_NW2A0_3", + "CLBLM_NW2A0" + ], + [ + "BRAM_NW2A1_3", + "CLBLM_NW2A1" + ], + [ + "BRAM_NW2A2_3", + "CLBLM_NW2A2" + ], + [ + "BRAM_NW2A3_3", + "CLBLM_NW2A3" + ], + [ + "BRAM_NW4A0_3", + "CLBLM_NW4A0" + ], + [ + "BRAM_NW4A1_3", + "CLBLM_NW4A1" + ], + [ + "BRAM_NW4A2_3", + "CLBLM_NW4A2" + ], + [ + "BRAM_NW4A3_3", + "CLBLM_NW4A3" + ], + [ + "BRAM_NW4END0_3", + "CLBLM_NW4END0" + ], + [ + "BRAM_NW4END1_3", + "CLBLM_NW4END1" + ], + [ + "BRAM_NW4END2_3", + "CLBLM_NW4END2" + ], + [ + "BRAM_NW4END3_3", + "CLBLM_NW4END3" + ], + [ + "BRAM_SE2A0_3", + "CLBLM_SE2A0" + ], + [ + "BRAM_SE2A1_3", + "CLBLM_SE2A1" + ], + [ + "BRAM_SE2A2_3", + "CLBLM_SE2A2" + ], + [ + "BRAM_SE2A3_3", + "CLBLM_SE2A3" + ], + [ + "BRAM_SE4BEG0_3", + "CLBLM_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_3", + "CLBLM_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_3", + "CLBLM_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_3", + "CLBLM_SE4BEG3" + ], + [ + "BRAM_SE4C0_3", + "CLBLM_SE4C0" + ], + [ + "BRAM_SE4C1_3", + "CLBLM_SE4C1" + ], + [ + "BRAM_SE4C2_3", + "CLBLM_SE4C2" + ], + [ + "BRAM_SE4C3_3", + "CLBLM_SE4C3" + ], + [ + "BRAM_SW2A0_3", + "CLBLM_SW2A0" + ], + [ + "BRAM_SW2A1_3", + "CLBLM_SW2A1" + ], + [ + "BRAM_SW2A2_3", + "CLBLM_SW2A2" + ], + [ + "BRAM_SW2A3_3", + "CLBLM_SW2A3" + ], + [ + "BRAM_SW4A0_3", + "CLBLM_SW4A0" + ], + [ + "BRAM_SW4A1_3", + "CLBLM_SW4A1" + ], + [ + "BRAM_SW4A2_3", + "CLBLM_SW4A2" + ], + [ + "BRAM_SW4A3_3", + "CLBLM_SW4A3" + ], + [ + "BRAM_SW4END0_3", + "CLBLM_SW4END0" + ], + [ + "BRAM_SW4END1_3", + "CLBLM_SW4END1" + ], + [ + "BRAM_SW4END2_3", + "CLBLM_SW4END2" + ], + [ + "BRAM_SW4END3_3", + "CLBLM_SW4END3" + ], + [ + "BRAM_WL1END0_3", + "CLBLM_WL1END0" + ], + [ + "BRAM_WL1END1_3", + "CLBLM_WL1END1" + ], + [ + "BRAM_WL1END2_3", + "CLBLM_WL1END2" + ], + [ + "BRAM_WL1END3_3", + "CLBLM_WL1END3" + ], + [ + "BRAM_WR1END0_3", + "CLBLM_WR1END0" + ], + [ + "BRAM_WR1END1_3", + "CLBLM_WR1END1" + ], + [ + "BRAM_WR1END2_3", + "CLBLM_WR1END2" + ], + [ + "BRAM_WR1END3_3", + "CLBLM_WR1END3" + ], + [ + "BRAM_WW2A0_3", + "CLBLM_WW2A0" + ], + [ + "BRAM_WW2A1_3", + "CLBLM_WW2A1" + ], + [ + "BRAM_WW2A2_3", + "CLBLM_WW2A2" + ], + [ + "BRAM_WW2A3_3", + "CLBLM_WW2A3" + ], + [ + "BRAM_WW2END0_3", + "CLBLM_WW2END0" + ], + [ + "BRAM_WW2END1_3", + "CLBLM_WW2END1" + ], + [ + "BRAM_WW2END2_3", + "CLBLM_WW2END2" + ], + [ + "BRAM_WW2END3_3", + "CLBLM_WW2END3" + ], + [ + "BRAM_WW4A0_3", + "CLBLM_WW4A0" + ], + [ + "BRAM_WW4A1_3", + "CLBLM_WW4A1" + ], + [ + "BRAM_WW4A2_3", + "CLBLM_WW4A2" + ], + [ + "BRAM_WW4A3_3", + "CLBLM_WW4A3" + ], + [ + "BRAM_WW4B0_3", + "CLBLM_WW4B0" + ], + [ + "BRAM_WW4B1_3", + "CLBLM_WW4B1" + ], + [ + "BRAM_WW4B2_3", + "CLBLM_WW4B2" + ], + [ + "BRAM_WW4B3_3", + "CLBLM_WW4B3" + ], + [ + "BRAM_WW4C0_3", + "CLBLM_WW4C0" + ], + [ + "BRAM_WW4C1_3", + "CLBLM_WW4C1" + ], + [ + "BRAM_WW4C2_3", + "CLBLM_WW4C2" + ], + [ + "BRAM_WW4C3_3", + "CLBLM_WW4C3" + ], + [ + "BRAM_WW4END0_3", + "CLBLM_WW4END0" + ], + [ + "BRAM_WW4END1_3", + "CLBLM_WW4END1" + ], + [ + "BRAM_WW4END2_3", + "CLBLM_WW4END2" + ], + [ + "BRAM_WW4END3_3", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "BRAM_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_2", + "CLBLM_EE2A0" + ], + [ + "BRAM_EE2A1_2", + "CLBLM_EE2A1" + ], + [ + "BRAM_EE2A2_2", + "CLBLM_EE2A2" + ], + [ + "BRAM_EE2A3_2", + "CLBLM_EE2A3" + ], + [ + "BRAM_EE2BEG0_2", + "CLBLM_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_2", + "CLBLM_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_2", + "CLBLM_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_2", + "CLBLM_EE2BEG3" + ], + [ + "BRAM_EE4A0_2", + "CLBLM_EE4A0" + ], + [ + "BRAM_EE4A1_2", + "CLBLM_EE4A1" + ], + [ + "BRAM_EE4A2_2", + "CLBLM_EE4A2" + ], + [ + "BRAM_EE4A3_2", + "CLBLM_EE4A3" + ], + [ + "BRAM_EE4B0_2", + "CLBLM_EE4B0" + ], + [ + "BRAM_EE4B1_2", + "CLBLM_EE4B1" + ], + [ + "BRAM_EE4B2_2", + "CLBLM_EE4B2" + ], + [ + "BRAM_EE4B3_2", + "CLBLM_EE4B3" + ], + [ + "BRAM_EE4BEG0_2", + "CLBLM_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_2", + "CLBLM_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_2", + "CLBLM_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_2", + "CLBLM_EE4BEG3" + ], + [ + "BRAM_EE4C0_2", + "CLBLM_EE4C0" + ], + [ + "BRAM_EE4C1_2", + "CLBLM_EE4C1" + ], + [ + "BRAM_EE4C2_2", + "CLBLM_EE4C2" + ], + [ + "BRAM_EE4C3_2", + "CLBLM_EE4C3" + ], + [ + "BRAM_EL1BEG0_2", + "CLBLM_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_2", + "CLBLM_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_2", + "CLBLM_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_2", + "CLBLM_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_2", + "CLBLM_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_2", + "CLBLM_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_2", + "CLBLM_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_2", + "CLBLM_ER1BEG3" + ], + [ + "BRAM_LH1_2", + "CLBLM_LH1" + ], + [ + "BRAM_LH2_2", + "CLBLM_LH2" + ], + [ + "BRAM_LH3_2", + "CLBLM_LH3" + ], + [ + "BRAM_LH4_2", + "CLBLM_LH4" + ], + [ + "BRAM_LH5_2", + "CLBLM_LH5" + ], + [ + "BRAM_LH6_2", + "CLBLM_LH6" + ], + [ + "BRAM_LH7_2", + "CLBLM_LH7" + ], + [ + "BRAM_LH8_2", + "CLBLM_LH8" + ], + [ + "BRAM_LH9_2", + "CLBLM_LH9" + ], + [ + "BRAM_LH10_2", + "CLBLM_LH10" + ], + [ + "BRAM_LH11_2", + "CLBLM_LH11" + ], + [ + "BRAM_LH12_2", + "CLBLM_LH12" + ], + [ + "BRAM_MONITOR_N_2", + "CLBLM_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_2", + "CLBLM_MONITOR_P" + ], + [ + "BRAM_NE2A0_2", + "CLBLM_NE2A0" + ], + [ + "BRAM_NE2A1_2", + "CLBLM_NE2A1" + ], + [ + "BRAM_NE2A2_2", + "CLBLM_NE2A2" + ], + [ + "BRAM_NE2A3_2", + "CLBLM_NE2A3" + ], + [ + "BRAM_NE4BEG0_2", + "CLBLM_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_2", + "CLBLM_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_2", + "CLBLM_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_2", + "CLBLM_NE4BEG3" + ], + [ + "BRAM_NE4C0_2", + "CLBLM_NE4C0" + ], + [ + "BRAM_NE4C1_2", + "CLBLM_NE4C1" + ], + [ + "BRAM_NE4C2_2", + "CLBLM_NE4C2" + ], + [ + "BRAM_NE4C3_2", + "CLBLM_NE4C3" + ], + [ + "BRAM_NW2A0_2", + "CLBLM_NW2A0" + ], + [ + "BRAM_NW2A1_2", + "CLBLM_NW2A1" + ], + [ + "BRAM_NW2A2_2", + "CLBLM_NW2A2" + ], + [ + "BRAM_NW2A3_2", + "CLBLM_NW2A3" + ], + [ + "BRAM_NW4A0_2", + "CLBLM_NW4A0" + ], + [ + "BRAM_NW4A1_2", + "CLBLM_NW4A1" + ], + [ + "BRAM_NW4A2_2", + "CLBLM_NW4A2" + ], + [ + "BRAM_NW4A3_2", + "CLBLM_NW4A3" + ], + [ + "BRAM_NW4END0_2", + "CLBLM_NW4END0" + ], + [ + "BRAM_NW4END1_2", + "CLBLM_NW4END1" + ], + [ + "BRAM_NW4END2_2", + "CLBLM_NW4END2" + ], + [ + "BRAM_NW4END3_2", + "CLBLM_NW4END3" + ], + [ + "BRAM_SE2A0_2", + "CLBLM_SE2A0" + ], + [ + "BRAM_SE2A1_2", + "CLBLM_SE2A1" + ], + [ + "BRAM_SE2A2_2", + "CLBLM_SE2A2" + ], + [ + "BRAM_SE2A3_2", + "CLBLM_SE2A3" + ], + [ + "BRAM_SE4BEG0_2", + "CLBLM_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_2", + "CLBLM_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_2", + "CLBLM_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_2", + "CLBLM_SE4BEG3" + ], + [ + "BRAM_SE4C0_2", + "CLBLM_SE4C0" + ], + [ + "BRAM_SE4C1_2", + "CLBLM_SE4C1" + ], + [ + "BRAM_SE4C2_2", + "CLBLM_SE4C2" + ], + [ + "BRAM_SE4C3_2", + "CLBLM_SE4C3" + ], + [ + "BRAM_SW2A0_2", + "CLBLM_SW2A0" + ], + [ + "BRAM_SW2A1_2", + "CLBLM_SW2A1" + ], + [ + "BRAM_SW2A2_2", + "CLBLM_SW2A2" + ], + [ + "BRAM_SW2A3_2", + "CLBLM_SW2A3" + ], + [ + "BRAM_SW4A0_2", + "CLBLM_SW4A0" + ], + [ + "BRAM_SW4A1_2", + "CLBLM_SW4A1" + ], + [ + "BRAM_SW4A2_2", + "CLBLM_SW4A2" + ], + [ + "BRAM_SW4A3_2", + "CLBLM_SW4A3" + ], + [ + "BRAM_SW4END0_2", + "CLBLM_SW4END0" + ], + [ + "BRAM_SW4END1_2", + "CLBLM_SW4END1" + ], + [ + "BRAM_SW4END2_2", + "CLBLM_SW4END2" + ], + [ + "BRAM_SW4END3_2", + "CLBLM_SW4END3" + ], + [ + "BRAM_WL1END0_2", + "CLBLM_WL1END0" + ], + [ + "BRAM_WL1END1_2", + "CLBLM_WL1END1" + ], + [ + "BRAM_WL1END2_2", + "CLBLM_WL1END2" + ], + [ + "BRAM_WL1END3_2", + "CLBLM_WL1END3" + ], + [ + "BRAM_WR1END0_2", + "CLBLM_WR1END0" + ], + [ + "BRAM_WR1END1_2", + "CLBLM_WR1END1" + ], + [ + "BRAM_WR1END2_2", + "CLBLM_WR1END2" + ], + [ + "BRAM_WR1END3_2", + "CLBLM_WR1END3" + ], + [ + "BRAM_WW2A0_2", + "CLBLM_WW2A0" + ], + [ + "BRAM_WW2A1_2", + "CLBLM_WW2A1" + ], + [ + "BRAM_WW2A2_2", + "CLBLM_WW2A2" + ], + [ + "BRAM_WW2A3_2", + "CLBLM_WW2A3" + ], + [ + "BRAM_WW2END0_2", + "CLBLM_WW2END0" + ], + [ + "BRAM_WW2END1_2", + "CLBLM_WW2END1" + ], + [ + "BRAM_WW2END2_2", + "CLBLM_WW2END2" + ], + [ + "BRAM_WW2END3_2", + "CLBLM_WW2END3" + ], + [ + "BRAM_WW4A0_2", + "CLBLM_WW4A0" + ], + [ + "BRAM_WW4A1_2", + "CLBLM_WW4A1" + ], + [ + "BRAM_WW4A2_2", + "CLBLM_WW4A2" + ], + [ + "BRAM_WW4A3_2", + "CLBLM_WW4A3" + ], + [ + "BRAM_WW4B0_2", + "CLBLM_WW4B0" + ], + [ + "BRAM_WW4B1_2", + "CLBLM_WW4B1" + ], + [ + "BRAM_WW4B2_2", + "CLBLM_WW4B2" + ], + [ + "BRAM_WW4B3_2", + "CLBLM_WW4B3" + ], + [ + "BRAM_WW4C0_2", + "CLBLM_WW4C0" + ], + [ + "BRAM_WW4C1_2", + "CLBLM_WW4C1" + ], + [ + "BRAM_WW4C2_2", + "CLBLM_WW4C2" + ], + [ + "BRAM_WW4C3_2", + "CLBLM_WW4C3" + ], + [ + "BRAM_WW4END0_2", + "CLBLM_WW4END0" + ], + [ + "BRAM_WW4END1_2", + "CLBLM_WW4END1" + ], + [ + "BRAM_WW4END2_2", + "CLBLM_WW4END2" + ], + [ + "BRAM_WW4END3_2", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "BRAM_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_1", + "CLBLM_EE2A0" + ], + [ + "BRAM_EE2A1_1", + "CLBLM_EE2A1" + ], + [ + "BRAM_EE2A2_1", + "CLBLM_EE2A2" + ], + [ + "BRAM_EE2A3_1", + "CLBLM_EE2A3" + ], + [ + "BRAM_EE2BEG0_1", + "CLBLM_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_1", + "CLBLM_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_1", + "CLBLM_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_1", + "CLBLM_EE2BEG3" + ], + [ + "BRAM_EE4A0_1", + "CLBLM_EE4A0" + ], + [ + "BRAM_EE4A1_1", + "CLBLM_EE4A1" + ], + [ + "BRAM_EE4A2_1", + "CLBLM_EE4A2" + ], + [ + "BRAM_EE4A3_1", + "CLBLM_EE4A3" + ], + [ + "BRAM_EE4B0_1", + "CLBLM_EE4B0" + ], + [ + "BRAM_EE4B1_1", + "CLBLM_EE4B1" + ], + [ + "BRAM_EE4B2_1", + "CLBLM_EE4B2" + ], + [ + "BRAM_EE4B3_1", + "CLBLM_EE4B3" + ], + [ + "BRAM_EE4BEG0_1", + "CLBLM_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_1", + "CLBLM_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_1", + "CLBLM_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_1", + "CLBLM_EE4BEG3" + ], + [ + "BRAM_EE4C0_1", + "CLBLM_EE4C0" + ], + [ + "BRAM_EE4C1_1", + "CLBLM_EE4C1" + ], + [ + "BRAM_EE4C2_1", + "CLBLM_EE4C2" + ], + [ + "BRAM_EE4C3_1", + "CLBLM_EE4C3" + ], + [ + "BRAM_EL1BEG0_1", + "CLBLM_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_1", + "CLBLM_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_1", + "CLBLM_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_1", + "CLBLM_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_1", + "CLBLM_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_1", + "CLBLM_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_1", + "CLBLM_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_1", + "CLBLM_ER1BEG3" + ], + [ + "BRAM_LH1_1", + "CLBLM_LH1" + ], + [ + "BRAM_LH2_1", + "CLBLM_LH2" + ], + [ + "BRAM_LH3_1", + "CLBLM_LH3" + ], + [ + "BRAM_LH4_1", + "CLBLM_LH4" + ], + [ + "BRAM_LH5_1", + "CLBLM_LH5" + ], + [ + "BRAM_LH6_1", + "CLBLM_LH6" + ], + [ + "BRAM_LH7_1", + "CLBLM_LH7" + ], + [ + "BRAM_LH8_1", + "CLBLM_LH8" + ], + [ + "BRAM_LH9_1", + "CLBLM_LH9" + ], + [ + "BRAM_LH10_1", + "CLBLM_LH10" + ], + [ + "BRAM_LH11_1", + "CLBLM_LH11" + ], + [ + "BRAM_LH12_1", + "CLBLM_LH12" + ], + [ + "BRAM_MONITOR_N_1", + "CLBLM_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_1", + "CLBLM_MONITOR_P" + ], + [ + "BRAM_NE2A0_1", + "CLBLM_NE2A0" + ], + [ + "BRAM_NE2A1_1", + "CLBLM_NE2A1" + ], + [ + "BRAM_NE2A2_1", + "CLBLM_NE2A2" + ], + [ + "BRAM_NE2A3_1", + "CLBLM_NE2A3" + ], + [ + "BRAM_NE4BEG0_1", + "CLBLM_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_1", + "CLBLM_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_1", + "CLBLM_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_1", + "CLBLM_NE4BEG3" + ], + [ + "BRAM_NE4C0_1", + "CLBLM_NE4C0" + ], + [ + "BRAM_NE4C1_1", + "CLBLM_NE4C1" + ], + [ + "BRAM_NE4C2_1", + "CLBLM_NE4C2" + ], + [ + "BRAM_NE4C3_1", + "CLBLM_NE4C3" + ], + [ + "BRAM_NW2A0_1", + "CLBLM_NW2A0" + ], + [ + "BRAM_NW2A1_1", + "CLBLM_NW2A1" + ], + [ + "BRAM_NW2A2_1", + "CLBLM_NW2A2" + ], + [ + "BRAM_NW2A3_1", + "CLBLM_NW2A3" + ], + [ + "BRAM_NW4A0_1", + "CLBLM_NW4A0" + ], + [ + "BRAM_NW4A1_1", + "CLBLM_NW4A1" + ], + [ + "BRAM_NW4A2_1", + "CLBLM_NW4A2" + ], + [ + "BRAM_NW4A3_1", + "CLBLM_NW4A3" + ], + [ + "BRAM_NW4END0_1", + "CLBLM_NW4END0" + ], + [ + "BRAM_NW4END1_1", + "CLBLM_NW4END1" + ], + [ + "BRAM_NW4END2_1", + "CLBLM_NW4END2" + ], + [ + "BRAM_NW4END3_1", + "CLBLM_NW4END3" + ], + [ + "BRAM_SE2A0_1", + "CLBLM_SE2A0" + ], + [ + "BRAM_SE2A1_1", + "CLBLM_SE2A1" + ], + [ + "BRAM_SE2A2_1", + "CLBLM_SE2A2" + ], + [ + "BRAM_SE2A3_1", + "CLBLM_SE2A3" + ], + [ + "BRAM_SE4BEG0_1", + "CLBLM_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_1", + "CLBLM_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_1", + "CLBLM_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_1", + "CLBLM_SE4BEG3" + ], + [ + "BRAM_SE4C0_1", + "CLBLM_SE4C0" + ], + [ + "BRAM_SE4C1_1", + "CLBLM_SE4C1" + ], + [ + "BRAM_SE4C2_1", + "CLBLM_SE4C2" + ], + [ + "BRAM_SE4C3_1", + "CLBLM_SE4C3" + ], + [ + "BRAM_SW2A0_1", + "CLBLM_SW2A0" + ], + [ + "BRAM_SW2A1_1", + "CLBLM_SW2A1" + ], + [ + "BRAM_SW2A2_1", + "CLBLM_SW2A2" + ], + [ + "BRAM_SW2A3_1", + "CLBLM_SW2A3" + ], + [ + "BRAM_SW4A0_1", + "CLBLM_SW4A0" + ], + [ + "BRAM_SW4A1_1", + "CLBLM_SW4A1" + ], + [ + "BRAM_SW4A2_1", + "CLBLM_SW4A2" + ], + [ + "BRAM_SW4A3_1", + "CLBLM_SW4A3" + ], + [ + "BRAM_SW4END0_1", + "CLBLM_SW4END0" + ], + [ + "BRAM_SW4END1_1", + "CLBLM_SW4END1" + ], + [ + "BRAM_SW4END2_1", + "CLBLM_SW4END2" + ], + [ + "BRAM_SW4END3_1", + "CLBLM_SW4END3" + ], + [ + "BRAM_WL1END0_1", + "CLBLM_WL1END0" + ], + [ + "BRAM_WL1END1_1", + "CLBLM_WL1END1" + ], + [ + "BRAM_WL1END2_1", + "CLBLM_WL1END2" + ], + [ + "BRAM_WL1END3_1", + "CLBLM_WL1END3" + ], + [ + "BRAM_WR1END0_1", + "CLBLM_WR1END0" + ], + [ + "BRAM_WR1END1_1", + "CLBLM_WR1END1" + ], + [ + "BRAM_WR1END2_1", + "CLBLM_WR1END2" + ], + [ + "BRAM_WR1END3_1", + "CLBLM_WR1END3" + ], + [ + "BRAM_WW2A0_1", + "CLBLM_WW2A0" + ], + [ + "BRAM_WW2A1_1", + "CLBLM_WW2A1" + ], + [ + "BRAM_WW2A2_1", + "CLBLM_WW2A2" + ], + [ + "BRAM_WW2A3_1", + "CLBLM_WW2A3" + ], + [ + "BRAM_WW2END0_1", + "CLBLM_WW2END0" + ], + [ + "BRAM_WW2END1_1", + "CLBLM_WW2END1" + ], + [ + "BRAM_WW2END2_1", + "CLBLM_WW2END2" + ], + [ + "BRAM_WW2END3_1", + "CLBLM_WW2END3" + ], + [ + "BRAM_WW4A0_1", + "CLBLM_WW4A0" + ], + [ + "BRAM_WW4A1_1", + "CLBLM_WW4A1" + ], + [ + "BRAM_WW4A2_1", + "CLBLM_WW4A2" + ], + [ + "BRAM_WW4A3_1", + "CLBLM_WW4A3" + ], + [ + "BRAM_WW4B0_1", + "CLBLM_WW4B0" + ], + [ + "BRAM_WW4B1_1", + "CLBLM_WW4B1" + ], + [ + "BRAM_WW4B2_1", + "CLBLM_WW4B2" + ], + [ + "BRAM_WW4B3_1", + "CLBLM_WW4B3" + ], + [ + "BRAM_WW4C0_1", + "CLBLM_WW4C0" + ], + [ + "BRAM_WW4C1_1", + "CLBLM_WW4C1" + ], + [ + "BRAM_WW4C2_1", + "CLBLM_WW4C2" + ], + [ + "BRAM_WW4C3_1", + "CLBLM_WW4C3" + ], + [ + "BRAM_WW4END0_1", + "CLBLM_WW4END0" + ], + [ + "BRAM_WW4END1_1", + "CLBLM_WW4END1" + ], + [ + "BRAM_WW4END2_1", + "CLBLM_WW4END2" + ], + [ + "BRAM_WW4END3_1", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "BRAM_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_0", + "CLBLM_EE2A0" + ], + [ + "BRAM_EE2A1_0", + "CLBLM_EE2A1" + ], + [ + "BRAM_EE2A2_0", + "CLBLM_EE2A2" + ], + [ + "BRAM_EE2A3_0", + "CLBLM_EE2A3" + ], + [ + "BRAM_EE2BEG0_0", + "CLBLM_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_0", + "CLBLM_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_0", + "CLBLM_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_0", + "CLBLM_EE2BEG3" + ], + [ + "BRAM_EE4A0_0", + "CLBLM_EE4A0" + ], + [ + "BRAM_EE4A1_0", + "CLBLM_EE4A1" + ], + [ + "BRAM_EE4A2_0", + "CLBLM_EE4A2" + ], + [ + "BRAM_EE4A3_0", + "CLBLM_EE4A3" + ], + [ + "BRAM_EE4B0_0", + "CLBLM_EE4B0" + ], + [ + "BRAM_EE4B1_0", + "CLBLM_EE4B1" + ], + [ + "BRAM_EE4B2_0", + "CLBLM_EE4B2" + ], + [ + "BRAM_EE4B3_0", + "CLBLM_EE4B3" + ], + [ + "BRAM_EE4BEG0_0", + "CLBLM_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_0", + "CLBLM_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_0", + "CLBLM_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_0", + "CLBLM_EE4BEG3" + ], + [ + "BRAM_EE4C0_0", + "CLBLM_EE4C0" + ], + [ + "BRAM_EE4C1_0", + "CLBLM_EE4C1" + ], + [ + "BRAM_EE4C2_0", + "CLBLM_EE4C2" + ], + [ + "BRAM_EE4C3_0", + "CLBLM_EE4C3" + ], + [ + "BRAM_EL1BEG0_0", + "CLBLM_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_0", + "CLBLM_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_0", + "CLBLM_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_0", + "CLBLM_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_0", + "CLBLM_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_0", + "CLBLM_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_0", + "CLBLM_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_0", + "CLBLM_ER1BEG3" + ], + [ + "BRAM_LH1_0", + "CLBLM_LH1" + ], + [ + "BRAM_LH2_0", + "CLBLM_LH2" + ], + [ + "BRAM_LH3_0", + "CLBLM_LH3" + ], + [ + "BRAM_LH4_0", + "CLBLM_LH4" + ], + [ + "BRAM_LH5_0", + "CLBLM_LH5" + ], + [ + "BRAM_LH6_0", + "CLBLM_LH6" + ], + [ + "BRAM_LH7_0", + "CLBLM_LH7" + ], + [ + "BRAM_LH8_0", + "CLBLM_LH8" + ], + [ + "BRAM_LH9_0", + "CLBLM_LH9" + ], + [ + "BRAM_LH10_0", + "CLBLM_LH10" + ], + [ + "BRAM_LH11_0", + "CLBLM_LH11" + ], + [ + "BRAM_LH12_0", + "CLBLM_LH12" + ], + [ + "BRAM_MONITOR_N_0", + "CLBLM_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_0", + "CLBLM_MONITOR_P" + ], + [ + "BRAM_NE2A0_0", + "CLBLM_NE2A0" + ], + [ + "BRAM_NE2A1_0", + "CLBLM_NE2A1" + ], + [ + "BRAM_NE2A2_0", + "CLBLM_NE2A2" + ], + [ + "BRAM_NE2A3_0", + "CLBLM_NE2A3" + ], + [ + "BRAM_NE4BEG0_0", + "CLBLM_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_0", + "CLBLM_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_0", + "CLBLM_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_0", + "CLBLM_NE4BEG3" + ], + [ + "BRAM_NE4C0_0", + "CLBLM_NE4C0" + ], + [ + "BRAM_NE4C1_0", + "CLBLM_NE4C1" + ], + [ + "BRAM_NE4C2_0", + "CLBLM_NE4C2" + ], + [ + "BRAM_NE4C3_0", + "CLBLM_NE4C3" + ], + [ + "BRAM_NW2A0_0", + "CLBLM_NW2A0" + ], + [ + "BRAM_NW2A1_0", + "CLBLM_NW2A1" + ], + [ + "BRAM_NW2A2_0", + "CLBLM_NW2A2" + ], + [ + "BRAM_NW2A3_0", + "CLBLM_NW2A3" + ], + [ + "BRAM_NW4A0_0", + "CLBLM_NW4A0" + ], + [ + "BRAM_NW4A1_0", + "CLBLM_NW4A1" + ], + [ + "BRAM_NW4A2_0", + "CLBLM_NW4A2" + ], + [ + "BRAM_NW4A3_0", + "CLBLM_NW4A3" + ], + [ + "BRAM_NW4END0_0", + "CLBLM_NW4END0" + ], + [ + "BRAM_NW4END1_0", + "CLBLM_NW4END1" + ], + [ + "BRAM_NW4END2_0", + "CLBLM_NW4END2" + ], + [ + "BRAM_NW4END3_0", + "CLBLM_NW4END3" + ], + [ + "BRAM_SE2A0_0", + "CLBLM_SE2A0" + ], + [ + "BRAM_SE2A1_0", + "CLBLM_SE2A1" + ], + [ + "BRAM_SE2A2_0", + "CLBLM_SE2A2" + ], + [ + "BRAM_SE2A3_0", + "CLBLM_SE2A3" + ], + [ + "BRAM_SE4BEG0_0", + "CLBLM_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_0", + "CLBLM_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_0", + "CLBLM_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_0", + "CLBLM_SE4BEG3" + ], + [ + "BRAM_SE4C0_0", + "CLBLM_SE4C0" + ], + [ + "BRAM_SE4C1_0", + "CLBLM_SE4C1" + ], + [ + "BRAM_SE4C2_0", + "CLBLM_SE4C2" + ], + [ + "BRAM_SE4C3_0", + "CLBLM_SE4C3" + ], + [ + "BRAM_SW2A0_0", + "CLBLM_SW2A0" + ], + [ + "BRAM_SW2A1_0", + "CLBLM_SW2A1" + ], + [ + "BRAM_SW2A2_0", + "CLBLM_SW2A2" + ], + [ + "BRAM_SW2A3_0", + "CLBLM_SW2A3" + ], + [ + "BRAM_SW4A0_0", + "CLBLM_SW4A0" + ], + [ + "BRAM_SW4A1_0", + "CLBLM_SW4A1" + ], + [ + "BRAM_SW4A2_0", + "CLBLM_SW4A2" + ], + [ + "BRAM_SW4A3_0", + "CLBLM_SW4A3" + ], + [ + "BRAM_SW4END0_0", + "CLBLM_SW4END0" + ], + [ + "BRAM_SW4END1_0", + "CLBLM_SW4END1" + ], + [ + "BRAM_SW4END2_0", + "CLBLM_SW4END2" + ], + [ + "BRAM_SW4END3_0", + "CLBLM_SW4END3" + ], + [ + "BRAM_WL1END0_0", + "CLBLM_WL1END0" + ], + [ + "BRAM_WL1END1_0", + "CLBLM_WL1END1" + ], + [ + "BRAM_WL1END2_0", + "CLBLM_WL1END2" + ], + [ + "BRAM_WL1END3_0", + "CLBLM_WL1END3" + ], + [ + "BRAM_WR1END0_0", + "CLBLM_WR1END0" + ], + [ + "BRAM_WR1END1_0", + "CLBLM_WR1END1" + ], + [ + "BRAM_WR1END2_0", + "CLBLM_WR1END2" + ], + [ + "BRAM_WR1END3_0", + "CLBLM_WR1END3" + ], + [ + "BRAM_WW2A0_0", + "CLBLM_WW2A0" + ], + [ + "BRAM_WW2A1_0", + "CLBLM_WW2A1" + ], + [ + "BRAM_WW2A2_0", + "CLBLM_WW2A2" + ], + [ + "BRAM_WW2A3_0", + "CLBLM_WW2A3" + ], + [ + "BRAM_WW2END0_0", + "CLBLM_WW2END0" + ], + [ + "BRAM_WW2END1_0", + "CLBLM_WW2END1" + ], + [ + "BRAM_WW2END2_0", + "CLBLM_WW2END2" + ], + [ + "BRAM_WW2END3_0", + "CLBLM_WW2END3" + ], + [ + "BRAM_WW4A0_0", + "CLBLM_WW4A0" + ], + [ + "BRAM_WW4A1_0", + "CLBLM_WW4A1" + ], + [ + "BRAM_WW4A2_0", + "CLBLM_WW4A2" + ], + [ + "BRAM_WW4A3_0", + "CLBLM_WW4A3" + ], + [ + "BRAM_WW4B0_0", + "CLBLM_WW4B0" + ], + [ + "BRAM_WW4B1_0", + "CLBLM_WW4B1" + ], + [ + "BRAM_WW4B2_0", + "CLBLM_WW4B2" + ], + [ + "BRAM_WW4B3_0", + "CLBLM_WW4B3" + ], + [ + "BRAM_WW4C0_0", + "CLBLM_WW4C0" + ], + [ + "BRAM_WW4C1_0", + "CLBLM_WW4C1" + ], + [ + "BRAM_WW4C2_0", + "CLBLM_WW4C2" + ], + [ + "BRAM_WW4C3_0", + "CLBLM_WW4C3" + ], + [ + "BRAM_WW4END0_0", + "CLBLM_WW4END0" + ], + [ + "BRAM_WW4END1_0", + "CLBLM_WW4END1" + ], + [ + "BRAM_WW4END2_0", + "CLBLM_WW4END2" + ], + [ + "BRAM_WW4END3_0", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "BRAM_L", + "HCLK_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINTOP_ADDRARDADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEOUTA_1", + "HCLK_BRAM_CASCADEA_L" + ], + [ + "BRAM_FIFO36_CASCADEOUTB_1", + "HCLK_BRAM_CASCADEB_L" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRAM_L", + "HCLK_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINBOT_ADDRARDADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEINA", + "HCLK_BRAM_CASCADEA_L" + ], + [ + "BRAM_FIFO36_CASCADEINB", + "HCLK_BRAM_CASCADEB_L" + ], + [ + "BRAM_PMVBRAM_O", + "HCLK_BRAM_PMVBRAM_O" + ], + [ + "BRAM_PMVBRAM_ODIV2", + "HCLK_BRAM_PMVBRAM_ODIV2" + ], + [ + "BRAM_PMVBRAM_ODIV4", + "HCLK_BRAM_PMVBRAM_ODIV4" + ], + [ + "BRAM_PMVBRAM_SELECT1", + "HCLK_BRAM_PMVBRAM_SELECT1" + ], + [ + "BRAM_PMVBRAM_SELECT2", + "HCLK_BRAM_PMVBRAM_SELECT2" + ], + [ + "BRAM_PMVBRAM_SELECT3", + "HCLK_BRAM_PMVBRAM_SELECT3" + ], + [ + "BRAM_PMVBRAM_SELECT4", + "HCLK_BRAM_PMVBRAM_SELECT4" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "BRAM_L", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_4", + "VBRK_LH1" + ], + [ + "BRAM_LH2_4", + "VBRK_LH2" + ], + [ + "BRAM_LH3_4", + "VBRK_LH3" + ], + [ + "BRAM_LH4_4", + "VBRK_LH4" + ], + [ + "BRAM_LH5_4", + "VBRK_LH5" + ], + [ + "BRAM_LH6_4", + "VBRK_LH6" + ], + [ + "BRAM_LH7_4", + "VBRK_LH7" + ], + [ + "BRAM_LH8_4", + "VBRK_LH8" + ], + [ + "BRAM_LH9_4", + "VBRK_LH9" + ], + [ + "BRAM_LH10_4", + "VBRK_LH10" + ], + [ + "BRAM_LH11_4", + "VBRK_LH11" + ], + [ + "BRAM_LH12_4", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "BRAM_L", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_3", + "VBRK_LH1" + ], + [ + "BRAM_LH2_3", + "VBRK_LH2" + ], + [ + "BRAM_LH3_3", + "VBRK_LH3" + ], + [ + "BRAM_LH4_3", + "VBRK_LH4" + ], + [ + "BRAM_LH5_3", + "VBRK_LH5" + ], + [ + "BRAM_LH6_3", + "VBRK_LH6" + ], + [ + "BRAM_LH7_3", + "VBRK_LH7" + ], + [ + "BRAM_LH8_3", + "VBRK_LH8" + ], + [ + "BRAM_LH9_3", + "VBRK_LH9" + ], + [ + "BRAM_LH10_3", + "VBRK_LH10" + ], + [ + "BRAM_LH11_3", + "VBRK_LH11" + ], + [ + "BRAM_LH12_3", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "BRAM_L", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_2", + "VBRK_LH1" + ], + [ + "BRAM_LH2_2", + "VBRK_LH2" + ], + [ + "BRAM_LH3_2", + "VBRK_LH3" + ], + [ + "BRAM_LH4_2", + "VBRK_LH4" + ], + [ + "BRAM_LH5_2", + "VBRK_LH5" + ], + [ + "BRAM_LH6_2", + "VBRK_LH6" + ], + [ + "BRAM_LH7_2", + "VBRK_LH7" + ], + [ + "BRAM_LH8_2", + "VBRK_LH8" + ], + [ + "BRAM_LH9_2", + "VBRK_LH9" + ], + [ + "BRAM_LH10_2", + "VBRK_LH10" + ], + [ + "BRAM_LH11_2", + "VBRK_LH11" + ], + [ + "BRAM_LH12_2", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "BRAM_L", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_1", + "VBRK_LH1" + ], + [ + "BRAM_LH2_1", + "VBRK_LH2" + ], + [ + "BRAM_LH3_1", + "VBRK_LH3" + ], + [ + "BRAM_LH4_1", + "VBRK_LH4" + ], + [ + "BRAM_LH5_1", + "VBRK_LH5" + ], + [ + "BRAM_LH6_1", + "VBRK_LH6" + ], + [ + "BRAM_LH7_1", + "VBRK_LH7" + ], + [ + "BRAM_LH8_1", + "VBRK_LH8" + ], + [ + "BRAM_LH9_1", + "VBRK_LH9" + ], + [ + "BRAM_LH10_1", + "VBRK_LH10" + ], + [ + "BRAM_LH11_1", + "VBRK_LH11" + ], + [ + "BRAM_LH12_1", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "BRAM_L", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_0", + "VBRK_LH1" + ], + [ + "BRAM_LH2_0", + "VBRK_LH2" + ], + [ + "BRAM_LH3_0", + "VBRK_LH3" + ], + [ + "BRAM_LH4_0", + "VBRK_LH4" + ], + [ + "BRAM_LH5_0", + "VBRK_LH5" + ], + [ + "BRAM_LH6_0", + "VBRK_LH6" + ], + [ + "BRAM_LH7_0", + "VBRK_LH7" + ], + [ + "BRAM_LH8_0", + "VBRK_LH8" + ], + [ + "BRAM_LH9_0", + "VBRK_LH9" + ], + [ + "BRAM_LH10_0", + "VBRK_LH10" + ], + [ + "BRAM_LH11_0", + "VBRK_LH11" + ], + [ + "BRAM_LH12_0", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "BRAM_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "BRAM_CASCINTOP_ADDRARDADDRU0", + "BRAM_CASCOUT_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU1", + "BRAM_CASCOUT_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU2", + "BRAM_CASCOUT_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU3", + "BRAM_CASCOUT_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU4", + "BRAM_CASCOUT_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU5", + "BRAM_CASCOUT_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU6", + "BRAM_CASCOUT_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU7", + "BRAM_CASCOUT_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU8", + "BRAM_CASCOUT_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU9", + "BRAM_CASCOUT_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU10", + "BRAM_CASCOUT_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU11", + "BRAM_CASCOUT_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU12", + "BRAM_CASCOUT_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU13", + "BRAM_CASCOUT_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU14", + "BRAM_CASCOUT_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU0", + "BRAM_CASCOUT_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU1", + "BRAM_CASCOUT_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU2", + "BRAM_CASCOUT_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU3", + "BRAM_CASCOUT_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU4", + "BRAM_CASCOUT_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU5", + "BRAM_CASCOUT_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU6", + "BRAM_CASCOUT_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU7", + "BRAM_CASCOUT_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU8", + "BRAM_CASCOUT_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU9", + "BRAM_CASCOUT_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU10", + "BRAM_CASCOUT_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU11", + "BRAM_CASCOUT_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU12", + "BRAM_CASCOUT_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU13", + "BRAM_CASCOUT_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU14", + "BRAM_CASCOUT_ADDRBWRADDRU14" + ], + [ + "BRAM_PMVBRAM_O", + "BRAM_PMVBRAM_O_1" + ], + [ + "BRAM_PMVBRAM_ODIV2", + "BRAM_PMVBRAM_ODIV2_1" + ], + [ + "BRAM_PMVBRAM_O_1", + "BRAM_PMVBRAM_O_2" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "BRAM_R", + "BRAM_R" + ], + "wire_pairs": [ + [ + "BRAM_CASCINBOT_ADDRARDADDRU0", + "BRAM_CASCOUT_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU1", + "BRAM_CASCOUT_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU2", + "BRAM_CASCOUT_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU3", + "BRAM_CASCOUT_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU4", + "BRAM_CASCOUT_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU5", + "BRAM_CASCOUT_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU6", + "BRAM_CASCOUT_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU7", + "BRAM_CASCOUT_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU8", + "BRAM_CASCOUT_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU9", + "BRAM_CASCOUT_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU10", + "BRAM_CASCOUT_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU11", + "BRAM_CASCOUT_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU12", + "BRAM_CASCOUT_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU13", + "BRAM_CASCOUT_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU14", + "BRAM_CASCOUT_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU0", + "BRAM_CASCOUT_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU1", + "BRAM_CASCOUT_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU2", + "BRAM_CASCOUT_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU3", + "BRAM_CASCOUT_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU4", + "BRAM_CASCOUT_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU5", + "BRAM_CASCOUT_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU6", + "BRAM_CASCOUT_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU7", + "BRAM_CASCOUT_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU8", + "BRAM_CASCOUT_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU9", + "BRAM_CASCOUT_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU10", + "BRAM_CASCOUT_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU11", + "BRAM_CASCOUT_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU12", + "BRAM_CASCOUT_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU13", + "BRAM_CASCOUT_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU14", + "BRAM_CASCOUT_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEINA", + "BRAM_FIFO36_CASCADEOUTA_1" + ], + [ + "BRAM_FIFO36_CASCADEINB", + "BRAM_FIFO36_CASCADEOUTB_1" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "BRAM_R", + "BRKH_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINTOP_ADDRARDADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEOUTA_1", + "BRKH_BRAM_CASCADEA_R" + ], + [ + "BRAM_FIFO36_CASCADEOUTB_1", + "BRKH_BRAM_CASCADEB_R" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRAM_R", + "BRKH_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINBOT_ADDRARDADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU0", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU1", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU2", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU3", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU4", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU5", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU6", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU7", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU8", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU9", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU10", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU11", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU12", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU13", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU14", + "BRKH_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "BRKH_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEINA", + "BRKH_BRAM_CASCADEA_R" + ], + [ + "BRAM_FIFO36_CASCADEINB", + "BRKH_BRAM_CASCADEB_R" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "BRAM_R", + "HCLK_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINTOP_ADDRARDADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRARDADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINTOP_ADDRBWRADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEOUTA_1", + "HCLK_BRAM_CASCADEA_R" + ], + [ + "BRAM_FIFO36_CASCADEOUTB_1", + "HCLK_BRAM_CASCADEB_R" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRAM_R", + "HCLK_BRAM" + ], + "wire_pairs": [ + [ + "BRAM_CASCINBOT_ADDRARDADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRARDADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU0", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU1", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU2", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU3", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU4", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU5", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU6", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU7", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU8", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU9", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU10", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU11", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU12", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU13", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCINBOT_ADDRBWRADDRU14", + "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRARDADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRARDADDRU14" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU0", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU1", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU2", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU3", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU4", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU5", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU6", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU7", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU8", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU9", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU10", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU11", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU12", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU13", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13" + ], + [ + "BRAM_CASCOUT_ADDRBWRADDRU14", + "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14" + ], + [ + "BRAM_FIFO36_CASCADEINA", + "HCLK_BRAM_CASCADEA_R" + ], + [ + "BRAM_FIFO36_CASCADEINB", + "HCLK_BRAM_CASCADEB_R" + ], + [ + "BRAM_PMVBRAM_O", + "HCLK_BRAM_PMVBRAM_O" + ], + [ + "BRAM_PMVBRAM_ODIV2", + "HCLK_BRAM_PMVBRAM_ODIV2" + ], + [ + "BRAM_PMVBRAM_ODIV4", + "HCLK_BRAM_PMVBRAM_ODIV4" + ], + [ + "BRAM_PMVBRAM_SELECT1", + "HCLK_BRAM_PMVBRAM_SELECT1" + ], + [ + "BRAM_PMVBRAM_SELECT2", + "HCLK_BRAM_PMVBRAM_SELECT2" + ], + [ + "BRAM_PMVBRAM_SELECT3", + "HCLK_BRAM_PMVBRAM_SELECT3" + ], + [ + "BRAM_PMVBRAM_SELECT4", + "HCLK_BRAM_PMVBRAM_SELECT4" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "BRAM_R", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_4", + "VBRK_LH1" + ], + [ + "BRAM_LH2_4", + "VBRK_LH2" + ], + [ + "BRAM_LH3_4", + "VBRK_LH3" + ], + [ + "BRAM_LH4_4", + "VBRK_LH4" + ], + [ + "BRAM_LH5_4", + "VBRK_LH5" + ], + [ + "BRAM_LH6_4", + "VBRK_LH6" + ], + [ + "BRAM_LH7_4", + "VBRK_LH7" + ], + [ + "BRAM_LH8_4", + "VBRK_LH8" + ], + [ + "BRAM_LH9_4", + "VBRK_LH9" + ], + [ + "BRAM_LH10_4", + "VBRK_LH10" + ], + [ + "BRAM_LH11_4", + "VBRK_LH11" + ], + [ + "BRAM_LH12_4", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "BRAM_R", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_3", + "VBRK_LH1" + ], + [ + "BRAM_LH2_3", + "VBRK_LH2" + ], + [ + "BRAM_LH3_3", + "VBRK_LH3" + ], + [ + "BRAM_LH4_3", + "VBRK_LH4" + ], + [ + "BRAM_LH5_3", + "VBRK_LH5" + ], + [ + "BRAM_LH6_3", + "VBRK_LH6" + ], + [ + "BRAM_LH7_3", + "VBRK_LH7" + ], + [ + "BRAM_LH8_3", + "VBRK_LH8" + ], + [ + "BRAM_LH9_3", + "VBRK_LH9" + ], + [ + "BRAM_LH10_3", + "VBRK_LH10" + ], + [ + "BRAM_LH11_3", + "VBRK_LH11" + ], + [ + "BRAM_LH12_3", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "BRAM_R", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_2", + "VBRK_LH1" + ], + [ + "BRAM_LH2_2", + "VBRK_LH2" + ], + [ + "BRAM_LH3_2", + "VBRK_LH3" + ], + [ + "BRAM_LH4_2", + "VBRK_LH4" + ], + [ + "BRAM_LH5_2", + "VBRK_LH5" + ], + [ + "BRAM_LH6_2", + "VBRK_LH6" + ], + [ + "BRAM_LH7_2", + "VBRK_LH7" + ], + [ + "BRAM_LH8_2", + "VBRK_LH8" + ], + [ + "BRAM_LH9_2", + "VBRK_LH9" + ], + [ + "BRAM_LH10_2", + "VBRK_LH10" + ], + [ + "BRAM_LH11_2", + "VBRK_LH11" + ], + [ + "BRAM_LH12_2", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "BRAM_R", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_1", + "VBRK_LH1" + ], + [ + "BRAM_LH2_1", + "VBRK_LH2" + ], + [ + "BRAM_LH3_1", + "VBRK_LH3" + ], + [ + "BRAM_LH4_1", + "VBRK_LH4" + ], + [ + "BRAM_LH5_1", + "VBRK_LH5" + ], + [ + "BRAM_LH6_1", + "VBRK_LH6" + ], + [ + "BRAM_LH7_1", + "VBRK_LH7" + ], + [ + "BRAM_LH8_1", + "VBRK_LH8" + ], + [ + "BRAM_LH9_1", + "VBRK_LH9" + ], + [ + "BRAM_LH10_1", + "VBRK_LH10" + ], + [ + "BRAM_LH11_1", + "VBRK_LH11" + ], + [ + "BRAM_LH12_1", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "BRAM_R", + "VBRK" + ], + "wire_pairs": [ + [ + "BRAM_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "BRAM_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "BRAM_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "BRAM_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "BRAM_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "BRAM_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "BRAM_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "BRAM_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "BRAM_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "BRAM_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "BRAM_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "BRAM_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "BRAM_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "BRAM_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "BRAM_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "BRAM_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "BRAM_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "BRAM_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "BRAM_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "BRAM_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "BRAM_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "BRAM_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "BRAM_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "BRAM_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "BRAM_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "BRAM_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "BRAM_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "BRAM_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "BRAM_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "BRAM_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "BRAM_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "BRAM_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "BRAM_LH1_0", + "VBRK_LH1" + ], + [ + "BRAM_LH2_0", + "VBRK_LH2" + ], + [ + "BRAM_LH3_0", + "VBRK_LH3" + ], + [ + "BRAM_LH4_0", + "VBRK_LH4" + ], + [ + "BRAM_LH5_0", + "VBRK_LH5" + ], + [ + "BRAM_LH6_0", + "VBRK_LH6" + ], + [ + "BRAM_LH7_0", + "VBRK_LH7" + ], + [ + "BRAM_LH8_0", + "VBRK_LH8" + ], + [ + "BRAM_LH9_0", + "VBRK_LH9" + ], + [ + "BRAM_LH10_0", + "VBRK_LH10" + ], + [ + "BRAM_LH11_0", + "VBRK_LH11" + ], + [ + "BRAM_LH12_0", + "VBRK_LH12" + ], + [ + "BRAM_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "BRAM_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "BRAM_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "BRAM_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "BRAM_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "BRAM_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "BRAM_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "BRAM_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "BRAM_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "BRAM_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "BRAM_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "BRAM_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "BRAM_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "BRAM_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "BRAM_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "BRAM_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "BRAM_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "BRAM_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "BRAM_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "BRAM_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "BRAM_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "BRAM_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "BRAM_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "BRAM_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "BRAM_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "BRAM_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "BRAM_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "BRAM_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "BRAM_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "BRAM_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "BRAM_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "BRAM_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "BRAM_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "BRAM_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "BRAM_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "BRAM_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "BRAM_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "BRAM_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "BRAM_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "BRAM_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "BRAM_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "BRAM_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "BRAM_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "BRAM_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "BRAM_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "BRAM_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "BRAM_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "BRAM_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "BRAM_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "BRAM_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "BRAM_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "BRAM_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "BRAM_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "BRAM_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "BRAM_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "BRAM_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "BRAM_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "BRAM_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "BRAM_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "BRAM_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "BRAM_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "BRAM_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "BRAM_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "BRAM_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "BRAM_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "BRAM_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "BRAM_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "BRAM_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "BRAM_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "BRAM_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "BRAM_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "BRAM_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "BRAM_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "BRAM_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "BRAM_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "BRAM_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "BRAM_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "BRAM_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "BRAM_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "BRAM_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "BRAM_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "BRAM_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_B_TERM_INT", + "INT_L" + ], + "wire_pairs": [ + [ + "B_TERM_UTURN_INT_ER1BEG0", + "EL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_ER1BEG0", + "ER1BEG0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "EL1END0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "ER1END_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "BYP_BOUNCE_N3_7" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "FAN_BOUNCE0" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "BYP_BOUNCE_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "FAN_BOUNCE2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "BYP_BOUNCE_N3_6" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "FAN_BOUNCE4" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "BYP_BOUNCE_N3_2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "FAN_BOUNCE6" + ], + [ + "B_TERM_UTURN_INT_LVB_L0", + "LVB_L1" + ], + [ + "B_TERM_UTURN_INT_LVB_L0", + "LVB_L12" + ], + [ + "B_TERM_UTURN_INT_LVB_L1", + "LVB_L2" + ], + [ + "B_TERM_UTURN_INT_LVB_L1", + "LVB_L11" + ], + [ + "B_TERM_UTURN_INT_LVB_L2", + "LVB_L3" + ], + [ + "B_TERM_UTURN_INT_LVB_L2", + "LVB_L10" + ], + [ + "B_TERM_UTURN_INT_LVB_L3", + "LVB_L4" + ], + [ + "B_TERM_UTURN_INT_LVB_L3", + "LVB_L9" + ], + [ + "B_TERM_UTURN_INT_LVB_L4", + "LVB_L5" + ], + [ + "B_TERM_UTURN_INT_LVB_L4", + "LVB_L8" + ], + [ + "B_TERM_UTURN_INT_LVB_L5", + "LVB_L6" + ], + [ + "B_TERM_UTURN_INT_LVB_L5", + "LVB_L7" + ], + [ + "B_TERM_UTURN_INT_LV_L2", + "LV_L2" + ], + [ + "B_TERM_UTURN_INT_LV_L2", + "LV_L17" + ], + [ + "B_TERM_UTURN_INT_LV_L3", + "LV_L3" + ], + [ + "B_TERM_UTURN_INT_LV_L3", + "LV_L16" + ], + [ + "B_TERM_UTURN_INT_LV_L4", + "LV_L4" + ], + [ + "B_TERM_UTURN_INT_LV_L4", + "LV_L15" + ], + [ + "B_TERM_UTURN_INT_LV_L5", + "LV_L5" + ], + [ + "B_TERM_UTURN_INT_LV_L5", + "LV_L14" + ], + [ + "B_TERM_UTURN_INT_LV_L6", + "LV_L6" + ], + [ + "B_TERM_UTURN_INT_LV_L6", + "LV_L13" + ], + [ + "B_TERM_UTURN_INT_LV_L7", + "LV_L7" + ], + [ + "B_TERM_UTURN_INT_LV_L7", + "LV_L12" + ], + [ + "B_TERM_UTURN_INT_LV_L8", + "LV_L8" + ], + [ + "B_TERM_UTURN_INT_LV_L8", + "LV_L11" + ], + [ + "B_TERM_UTURN_INT_LV_L9", + "LV_L9" + ], + [ + "B_TERM_UTURN_INT_LV_L9", + "LV_L10" + ], + [ + "B_TERM_UTURN_INT_LV_L18", + "LV_L1" + ], + [ + "B_TERM_UTURN_INT_LV_L18", + "LV_L18" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "NE2A3" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "SE2BEG0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "NE2A2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "SE2BEG1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "NE2A1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "SE2BEG2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "NE2A0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "SE2BEG3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "NE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "SE6A0" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "NE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "SE6A1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "NE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "SE6A2" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "NE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "SE6A3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "NE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "NE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "NE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "NE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "NE6D3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "NE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "NE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "NE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "NE6E3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "NE6E2" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "NE6E1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "NE6E0" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "NR1END3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "SL1BEG0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "NR1END2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "SL1BEG1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "NR1END1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "SL1BEG2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "NR1END0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "SL1BEG3" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "NL1END2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "SR1BEG1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "NL1END1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "SR1BEG2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "NL1END0" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "SR1BEG3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "NN2END3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "NN2END2" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "NN2END1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "NN2END0" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "NN2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "SS2BEG0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "NN2A2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "SS2BEG1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "NN2A1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "SS2BEG2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "NN2A0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "SS2BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "NN6B3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "NN6B2" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "NN6B1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "NN6B0" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "NN6C3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "NN6C2" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "NN6C1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "NN6C0" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "NN6A3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "SS6BEG0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "NN6A2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "SS6BEG1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "NN6A1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "SS6BEG2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "NN6A0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "SS6BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "NN6D3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "NN6D2" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "NN6D1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "NN6D0" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "NN6E3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "NN6E2" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "NN6E1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "NN6E0" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "NN6END3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "NN6END2" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "NN6END1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "NN6END0" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "NW2A3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "SW2BEG0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "NW2A2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "SW2BEG1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "NW2A1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "SW2BEG2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "NW2A0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "SW2BEG3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "NW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "SW6A0" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "NW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "SW6A1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "NW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "SW6A2" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "NW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "SW6A3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "NW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "NW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "NW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "NW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "NW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "NW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "NW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "NW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "NW6E3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "NW6E2" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "NW6E1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "NW6E0" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "NW6END0" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "SW6END_N0_3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WR1BEG0" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WL1END_N1_3" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WR1END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_B_TERM_INT", + "INT_R" + ], + "wire_pairs": [ + [ + "B_TERM_UTURN_INT_ER1BEG0", + "EL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_ER1BEG0", + "ER1BEG0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "EL1END0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "ER1END_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "BYP_BOUNCE_N3_7" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "FAN_BOUNCE0" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "BYP_BOUNCE_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "FAN_BOUNCE2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "BYP_BOUNCE_N3_6" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "FAN_BOUNCE4" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "BYP_BOUNCE_N3_2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "FAN_BOUNCE6" + ], + [ + "B_TERM_UTURN_INT_LV2", + "LV2" + ], + [ + "B_TERM_UTURN_INT_LV2", + "LV17" + ], + [ + "B_TERM_UTURN_INT_LV3", + "LV3" + ], + [ + "B_TERM_UTURN_INT_LV3", + "LV16" + ], + [ + "B_TERM_UTURN_INT_LV4", + "LV4" + ], + [ + "B_TERM_UTURN_INT_LV4", + "LV15" + ], + [ + "B_TERM_UTURN_INT_LV5", + "LV5" + ], + [ + "B_TERM_UTURN_INT_LV5", + "LV14" + ], + [ + "B_TERM_UTURN_INT_LV6", + "LV6" + ], + [ + "B_TERM_UTURN_INT_LV6", + "LV13" + ], + [ + "B_TERM_UTURN_INT_LV7", + "LV7" + ], + [ + "B_TERM_UTURN_INT_LV7", + "LV12" + ], + [ + "B_TERM_UTURN_INT_LV8", + "LV8" + ], + [ + "B_TERM_UTURN_INT_LV8", + "LV11" + ], + [ + "B_TERM_UTURN_INT_LV9", + "LV9" + ], + [ + "B_TERM_UTURN_INT_LV9", + "LV10" + ], + [ + "B_TERM_UTURN_INT_LV18", + "LV1" + ], + [ + "B_TERM_UTURN_INT_LV18", + "LV18" + ], + [ + "B_TERM_UTURN_INT_LVB0", + "LVB1" + ], + [ + "B_TERM_UTURN_INT_LVB0", + "LVB12" + ], + [ + "B_TERM_UTURN_INT_LVB1", + "LVB2" + ], + [ + "B_TERM_UTURN_INT_LVB1", + "LVB11" + ], + [ + "B_TERM_UTURN_INT_LVB2", + "LVB3" + ], + [ + "B_TERM_UTURN_INT_LVB2", + "LVB10" + ], + [ + "B_TERM_UTURN_INT_LVB3", + "LVB4" + ], + [ + "B_TERM_UTURN_INT_LVB3", + "LVB9" + ], + [ + "B_TERM_UTURN_INT_LVB4", + "LVB5" + ], + [ + "B_TERM_UTURN_INT_LVB4", + "LVB8" + ], + [ + "B_TERM_UTURN_INT_LVB5", + "LVB6" + ], + [ + "B_TERM_UTURN_INT_LVB5", + "LVB7" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "NE2A3" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "SE2BEG0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "NE2A2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "SE2BEG1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "NE2A1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "SE2BEG2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "NE2A0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "SE2BEG3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "NE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "SE6A0" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "NE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "SE6A1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "NE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "SE6A2" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "NE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "SE6A3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "NE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "NE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "NE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "NE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "NE6D3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "NE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "NE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "NE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "NE6E3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "NE6E2" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "NE6E1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "NE6E0" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "NR1END3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "SL1BEG0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "NR1END2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "SL1BEG1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "NR1END1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "SL1BEG2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "NR1END0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "SL1BEG3" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "NL1END2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "SR1BEG1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "NL1END1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "SR1BEG2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "NL1END0" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "SR1BEG3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "NN2END3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "NN2END2" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "NN2END1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "NN2END0" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "NN2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "SS2BEG0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "NN2A2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "SS2BEG1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "NN2A1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "SS2BEG2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "NN2A0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "SS2BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "NN6B3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "NN6B2" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "NN6B1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "NN6B0" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "NN6C3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "NN6C2" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "NN6C1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "NN6C0" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "NN6A3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "SS6BEG0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "NN6A2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "SS6BEG1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "NN6A1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "SS6BEG2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "NN6A0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "SS6BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "NN6D3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "NN6D2" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "NN6D1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "NN6D0" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "NN6E3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "NN6E2" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "NN6E1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "NN6E0" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "NN6END3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "NN6END2" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "NN6END1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "NN6END0" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "NW2A3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "SW2BEG0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "NW2A2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "SW2BEG1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "NW2A1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "SW2BEG2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "NW2A0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "SW2BEG3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "NW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "SW6A0" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "NW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "SW6A1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "NW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "SW6A2" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "NW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "SW6A3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "NW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "NW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "NW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "NW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "NW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "NW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "NW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "NW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "NW6E3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "NW6E2" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "NW6E1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "NW6E0" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "NW6END0" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "SW6END_N0_3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WR1BEG0" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WL1END_N1_3" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WR1END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLL_L" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_L", + "CLBLL_LL_CIN" + ], + [ + "BRKH_CLB_COUT1_L", + "CLBLL_L_CIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLL_L" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_L", + "CLBLL_LL_COUT_N" + ], + [ + "BRKH_CLB_COUT1_L", + "CLBLL_L_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLL_R" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_R", + "CLBLL_L_CIN" + ], + [ + "BRKH_CLB_COUT1_R", + "CLBLL_LL_CIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLL_R" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_R", + "CLBLL_L_COUT_N" + ], + [ + "BRKH_CLB_COUT1_R", + "CLBLL_LL_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLM_L" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_L", + "CLBLM_M_CIN" + ], + [ + "BRKH_CLB_COUT1_L", + "CLBLM_L_CIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLM_L" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_L", + "CLBLM_M_COUT_N" + ], + [ + "BRKH_CLB_COUT1_L", + "CLBLM_L_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_R", + "CLBLM_L_CIN" + ], + [ + "BRKH_CLB_COUT1_R", + "CLBLM_M_CIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_CLB", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "BRKH_CLB_COUT0_R", + "CLBLM_L_COUT_N" + ], + [ + "BRKH_CLB_COUT1_R", + "CLBLM_M_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + 0, + 4 + ], + "tile_types": [ + "BRKH_CLK", + "CLK_BUFG_BOT_R" + ], + "wire_pairs": [ + [ + "BRKH_CLK_R_CK_GCLK0", + "CLK_BUFG_CK_GCLK0" + ], + [ + "BRKH_CLK_R_CK_GCLK1", + "CLK_BUFG_CK_GCLK1" + ], + [ + "BRKH_CLK_R_CK_GCLK2", + "CLK_BUFG_CK_GCLK2" + ], + [ + "BRKH_CLK_R_CK_GCLK3", + "CLK_BUFG_CK_GCLK3" + ], + [ + "BRKH_CLK_R_CK_GCLK4", + "CLK_BUFG_CK_GCLK4" + ], + [ + "BRKH_CLK_R_CK_GCLK5", + "CLK_BUFG_CK_GCLK5" + ], + [ + "BRKH_CLK_R_CK_GCLK6", + "CLK_BUFG_CK_GCLK6" + ], + [ + "BRKH_CLK_R_CK_GCLK7", + "CLK_BUFG_CK_GCLK7" + ], + [ + "BRKH_CLK_R_CK_GCLK8", + "CLK_BUFG_CK_GCLK8" + ], + [ + "BRKH_CLK_R_CK_GCLK9", + "CLK_BUFG_CK_GCLK9" + ], + [ + "BRKH_CLK_R_CK_GCLK10", + "CLK_BUFG_CK_GCLK10" + ], + [ + "BRKH_CLK_R_CK_GCLK11", + "CLK_BUFG_CK_GCLK11" + ], + [ + "BRKH_CLK_R_CK_GCLK12", + "CLK_BUFG_CK_GCLK12" + ], + [ + "BRKH_CLK_R_CK_GCLK13", + "CLK_BUFG_CK_GCLK13" + ], + [ + "BRKH_CLK_R_CK_GCLK14", + "CLK_BUFG_CK_GCLK14" + ], + [ + "BRKH_CLK_R_CK_GCLK15", + "CLK_BUFG_CK_GCLK15" + ], + [ + "BRKH_CLK_R_CK_GCLK16", + "CLK_BUFG_CK_GCLK16" + ], + [ + "BRKH_CLK_R_CK_GCLK17", + "CLK_BUFG_CK_GCLK17" + ], + [ + "BRKH_CLK_R_CK_GCLK18", + "CLK_BUFG_CK_GCLK18" + ], + [ + "BRKH_CLK_R_CK_GCLK19", + "CLK_BUFG_CK_GCLK19" + ], + [ + "BRKH_CLK_R_CK_GCLK20", + "CLK_BUFG_CK_GCLK20" + ], + [ + "BRKH_CLK_R_CK_GCLK21", + "CLK_BUFG_CK_GCLK21" + ], + [ + "BRKH_CLK_R_CK_GCLK22", + "CLK_BUFG_CK_GCLK22" + ], + [ + "BRKH_CLK_R_CK_GCLK23", + "CLK_BUFG_CK_GCLK23" + ], + [ + "BRKH_CLK_R_CK_GCLK24", + "CLK_BUFG_CK_GCLK24" + ], + [ + "BRKH_CLK_R_CK_GCLK25", + "CLK_BUFG_CK_GCLK25" + ], + [ + "BRKH_CLK_R_CK_GCLK26", + "CLK_BUFG_CK_GCLK26" + ], + [ + "BRKH_CLK_R_CK_GCLK27", + "CLK_BUFG_CK_GCLK27" + ], + [ + "BRKH_CLK_R_CK_GCLK28", + "CLK_BUFG_CK_GCLK28" + ], + [ + "BRKH_CLK_R_CK_GCLK29", + "CLK_BUFG_CK_GCLK29" + ], + [ + "BRKH_CLK_R_CK_GCLK30", + "CLK_BUFG_CK_GCLK30" + ], + [ + "BRKH_CLK_R_CK_GCLK31", + "CLK_BUFG_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_CLK", + "CLK_BUFG_TOP_R" + ], + "wire_pairs": [ + [ + "BRKH_CLK_R_CK_GCLK0", + "CLK_BUFG_CK_GCLK0" + ], + [ + "BRKH_CLK_R_CK_GCLK1", + "CLK_BUFG_CK_GCLK1" + ], + [ + "BRKH_CLK_R_CK_GCLK2", + "CLK_BUFG_CK_GCLK2" + ], + [ + "BRKH_CLK_R_CK_GCLK3", + "CLK_BUFG_CK_GCLK3" + ], + [ + "BRKH_CLK_R_CK_GCLK4", + "CLK_BUFG_CK_GCLK4" + ], + [ + "BRKH_CLK_R_CK_GCLK5", + "CLK_BUFG_CK_GCLK5" + ], + [ + "BRKH_CLK_R_CK_GCLK6", + "CLK_BUFG_CK_GCLK6" + ], + [ + "BRKH_CLK_R_CK_GCLK7", + "CLK_BUFG_CK_GCLK7" + ], + [ + "BRKH_CLK_R_CK_GCLK8", + "CLK_BUFG_CK_GCLK8" + ], + [ + "BRKH_CLK_R_CK_GCLK9", + "CLK_BUFG_CK_GCLK9" + ], + [ + "BRKH_CLK_R_CK_GCLK10", + "CLK_BUFG_CK_GCLK10" + ], + [ + "BRKH_CLK_R_CK_GCLK11", + "CLK_BUFG_CK_GCLK11" + ], + [ + "BRKH_CLK_R_CK_GCLK12", + "CLK_BUFG_CK_GCLK12" + ], + [ + "BRKH_CLK_R_CK_GCLK13", + "CLK_BUFG_CK_GCLK13" + ], + [ + "BRKH_CLK_R_CK_GCLK14", + "CLK_BUFG_CK_GCLK14" + ], + [ + "BRKH_CLK_R_CK_GCLK15", + "CLK_BUFG_CK_GCLK15" + ], + [ + "BRKH_CLK_R_CK_GCLK16", + "CLK_BUFG_CK_GCLK16" + ], + [ + "BRKH_CLK_R_CK_GCLK17", + "CLK_BUFG_CK_GCLK17" + ], + [ + "BRKH_CLK_R_CK_GCLK18", + "CLK_BUFG_CK_GCLK18" + ], + [ + "BRKH_CLK_R_CK_GCLK19", + "CLK_BUFG_CK_GCLK19" + ], + [ + "BRKH_CLK_R_CK_GCLK20", + "CLK_BUFG_CK_GCLK20" + ], + [ + "BRKH_CLK_R_CK_GCLK21", + "CLK_BUFG_CK_GCLK21" + ], + [ + "BRKH_CLK_R_CK_GCLK22", + "CLK_BUFG_CK_GCLK22" + ], + [ + "BRKH_CLK_R_CK_GCLK23", + "CLK_BUFG_CK_GCLK23" + ], + [ + "BRKH_CLK_R_CK_GCLK24", + "CLK_BUFG_CK_GCLK24" + ], + [ + "BRKH_CLK_R_CK_GCLK25", + "CLK_BUFG_CK_GCLK25" + ], + [ + "BRKH_CLK_R_CK_GCLK26", + "CLK_BUFG_CK_GCLK26" + ], + [ + "BRKH_CLK_R_CK_GCLK27", + "CLK_BUFG_CK_GCLK27" + ], + [ + "BRKH_CLK_R_CK_GCLK28", + "CLK_BUFG_CK_GCLK28" + ], + [ + "BRKH_CLK_R_CK_GCLK29", + "CLK_BUFG_CK_GCLK29" + ], + [ + "BRKH_CLK_R_CK_GCLK30", + "CLK_BUFG_CK_GCLK30" + ], + [ + "BRKH_CLK_R_CK_GCLK31", + "CLK_BUFG_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_CLK", + "CLK_FEED" + ], + "wire_pairs": [ + [ + "BRKH_CLK_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "BRKH_CLK_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "BRKH_CLK_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "BRKH_CLK_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "BRKH_CLK_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "BRKH_CLK_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "BRKH_CLK_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "BRKH_CLK_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "BRKH_CLK_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "BRKH_CLK_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "BRKH_CLK_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "BRKH_CLK_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "BRKH_CLK_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "BRKH_CLK_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "BRKH_CLK_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "BRKH_CLK_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "BRKH_CLK_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "BRKH_CLK_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "BRKH_CLK_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "BRKH_CLK_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "BRKH_CLK_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "BRKH_CLK_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "BRKH_CLK_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "BRKH_CLK_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "BRKH_CLK_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "BRKH_CLK_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "BRKH_CLK_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "BRKH_CLK_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "BRKH_CLK_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "BRKH_CLK_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "BRKH_CLK_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "BRKH_CLK_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "BRKH_CLK_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_CLK", + "CLK_FEED" + ], + "wire_pairs": [ + [ + "BRKH_CLK_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "BRKH_CLK_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "BRKH_CLK_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "BRKH_CLK_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "BRKH_CLK_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "BRKH_CLK_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "BRKH_CLK_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "BRKH_CLK_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "BRKH_CLK_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "BRKH_CLK_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "BRKH_CLK_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "BRKH_CLK_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "BRKH_CLK_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "BRKH_CLK_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "BRKH_CLK_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "BRKH_CLK_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "BRKH_CLK_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "BRKH_CLK_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "BRKH_CLK_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "BRKH_CLK_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "BRKH_CLK_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "BRKH_CLK_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "BRKH_CLK_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "BRKH_CLK_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "BRKH_CLK_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "BRKH_CLK_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "BRKH_CLK_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "BRKH_CLK_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "BRKH_CLK_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "BRKH_CLK_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "BRKH_CLK_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "BRKH_CLK_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "BRKH_CLK_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "BRKH_CLK_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -9 + ], + "tile_types": [ + "BRKH_CMT", + "CMT_TOP_L_LOWER_B" + ], + "wire_pairs": [ + [ + "BRKH_CMT_FREQ_REF_NS0", + "MMCM_CLK_FREQ_BB_REBUF0_NS" + ], + [ + "BRKH_CMT_FREQ_REF_NS1", + "MMCM_CLK_FREQ_BB_REBUF1_NS" + ], + [ + "BRKH_CMT_FREQ_REF_NS2", + "MMCM_CLK_FREQ_BB_REBUF2_NS" + ], + [ + "BRKH_CMT_FREQ_REF_NS3", + "MMCM_CLK_FREQ_BB_REBUF3_NS" + ], + [ + "BRKH_CMT_PHASEREF0", + "CMT_MMCM_PHASERREF0" + ], + [ + "BRKH_CMT_PHASEREF1", + "CMT_MMCM_PHASERREF1" + ], + [ + "BRKH_CMT_PHASEREF_BELOW0", + "CMT_MMCM_PHASERREF_BELOW0" + ], + [ + "BRKH_CMT_PHASEREF_BELOW1", + "CMT_MMCM_PHASERREF_BELOW1" + ], + [ + "BRKH_CMT_PHYCTRL_SYNC_BB", + "CMT_MMCM_PHYCTRL_SYNC_BB_DN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 8 + ], + "tile_types": [ + "BRKH_CMT", + "CMT_TOP_L_UPPER_T" + ], + "wire_pairs": [ + [ + "BRKH_CMT_FREQ_REF_NS0", + "PLL_CLK_FREQ_BB_BUFOUT_NS0" + ], + [ + "BRKH_CMT_FREQ_REF_NS1", + "PLL_CLK_FREQ_BB_BUFOUT_NS1" + ], + [ + "BRKH_CMT_FREQ_REF_NS2", + "PLL_CLK_FREQ_BB_BUFOUT_NS2" + ], + [ + "BRKH_CMT_FREQ_REF_NS3", + "PLL_CLK_FREQ_BB_BUFOUT_NS3" + ], + [ + "BRKH_CMT_PHASEREF0", + "CMT_PLL_PHASERREF_ABOVE0" + ], + [ + "BRKH_CMT_PHASEREF1", + "CMT_PLL_PHASERREF_ABOVE1" + ], + [ + "BRKH_CMT_PHASEREF_BELOW0", + "CMT_PLL_PHASERREF0" + ], + [ + "BRKH_CMT_PHASEREF_BELOW1", + "CMT_PLL_PHASERREF1" + ], + [ + "BRKH_CMT_PHYCTRL_SYNC_BB", + "CMT_PLL_PHYCTRL_SYNC_BB_UP" + ] + ] + }, + { + "grid_deltas": [ + 0, + -9 + ], + "tile_types": [ + "BRKH_CMT", + "CMT_TOP_R_LOWER_B" + ], + "wire_pairs": [ + [ + "BRKH_CMT_FREQ_REF_NS0", + "MMCM_CLK_FREQ_BB_REBUF0_NS" + ], + [ + "BRKH_CMT_FREQ_REF_NS1", + "MMCM_CLK_FREQ_BB_REBUF1_NS" + ], + [ + "BRKH_CMT_FREQ_REF_NS2", + "MMCM_CLK_FREQ_BB_REBUF2_NS" + ], + [ + "BRKH_CMT_FREQ_REF_NS3", + "MMCM_CLK_FREQ_BB_REBUF3_NS" + ], + [ + "BRKH_CMT_PHASEREF0", + "CMT_MMCM_PHASERREF0" + ], + [ + "BRKH_CMT_PHASEREF1", + "CMT_MMCM_PHASERREF1" + ], + [ + "BRKH_CMT_PHASEREF_BELOW0", + "CMT_MMCM_PHASERREF_BELOW0" + ], + [ + "BRKH_CMT_PHASEREF_BELOW1", + "CMT_MMCM_PHASERREF_BELOW1" + ], + [ + "BRKH_CMT_PHYCTRL_SYNC_BB", + "CMT_MMCM_PHYCTRL_SYNC_BB_DN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 8 + ], + "tile_types": [ + "BRKH_CMT", + "CMT_TOP_R_UPPER_T" + ], + "wire_pairs": [ + [ + "BRKH_CMT_FREQ_REF_NS0", + "PLL_CLK_FREQ_BB_BUFOUT_NS0" + ], + [ + "BRKH_CMT_FREQ_REF_NS1", + "PLL_CLK_FREQ_BB_BUFOUT_NS1" + ], + [ + "BRKH_CMT_FREQ_REF_NS2", + "PLL_CLK_FREQ_BB_BUFOUT_NS2" + ], + [ + "BRKH_CMT_FREQ_REF_NS3", + "PLL_CLK_FREQ_BB_BUFOUT_NS3" + ], + [ + "BRKH_CMT_PHASEREF0", + "CMT_PLL_PHASERREF_ABOVE0" + ], + [ + "BRKH_CMT_PHASEREF1", + "CMT_PLL_PHASERREF_ABOVE1" + ], + [ + "BRKH_CMT_PHASEREF_BELOW0", + "CMT_PLL_PHASERREF0" + ], + [ + "BRKH_CMT_PHASEREF_BELOW1", + "CMT_PLL_PHASERREF1" + ], + [ + "BRKH_CMT_PHYCTRL_SYNC_BB", + "CMT_PLL_PHYCTRL_SYNC_BB_UP" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_DSP_L", + "DSP_L" + ], + "wire_pairs": [ + [ + "BRKH_DSP_ACIN0", + "DSP_0_ACIN0" + ], + [ + "BRKH_DSP_ACIN1", + "DSP_0_ACIN1" + ], + [ + "BRKH_DSP_ACIN2", + "DSP_0_ACIN2" + ], + [ + "BRKH_DSP_ACIN3", + "DSP_0_ACIN3" + ], + [ + "BRKH_DSP_ACIN4", + "DSP_0_ACIN4" + ], + [ + "BRKH_DSP_ACIN5", + "DSP_0_ACIN5" + ], + [ + "BRKH_DSP_ACIN6", + "DSP_0_ACIN6" + ], + [ + "BRKH_DSP_ACIN7", + "DSP_0_ACIN7" + ], + [ + "BRKH_DSP_ACIN8", + "DSP_0_ACIN8" + ], + [ + "BRKH_DSP_ACIN9", + "DSP_0_ACIN9" + ], + [ + "BRKH_DSP_ACIN10", + "DSP_0_ACIN10" + ], + [ + "BRKH_DSP_ACIN11", + "DSP_0_ACIN11" + ], + [ + "BRKH_DSP_ACIN12", + "DSP_0_ACIN12" + ], + [ + "BRKH_DSP_ACIN13", + "DSP_0_ACIN13" + ], + [ + "BRKH_DSP_ACIN14", + "DSP_0_ACIN14" + ], + [ + "BRKH_DSP_ACIN15", + "DSP_0_ACIN15" + ], + [ + "BRKH_DSP_ACIN16", + "DSP_0_ACIN16" + ], + [ + "BRKH_DSP_ACIN17", + "DSP_0_ACIN17" + ], + [ + "BRKH_DSP_ACIN18", + "DSP_0_ACIN18" + ], + [ + "BRKH_DSP_ACIN19", + "DSP_0_ACIN19" + ], + [ + "BRKH_DSP_ACIN20", + "DSP_0_ACIN20" + ], + [ + "BRKH_DSP_ACIN21", + "DSP_0_ACIN21" + ], + [ + "BRKH_DSP_ACIN22", + "DSP_0_ACIN22" + ], + [ + "BRKH_DSP_ACIN23", + "DSP_0_ACIN23" + ], + [ + "BRKH_DSP_ACIN24", + "DSP_0_ACIN24" + ], + [ + "BRKH_DSP_ACIN25", + "DSP_0_ACIN25" + ], + [ + "BRKH_DSP_ACIN26", + "DSP_0_ACIN26" + ], + [ + "BRKH_DSP_ACIN27", + "DSP_0_ACIN27" + ], + [ + "BRKH_DSP_ACIN28", + "DSP_0_ACIN28" + ], + [ + "BRKH_DSP_ACIN29", + "DSP_0_ACIN29" + ], + [ + "BRKH_DSP_BCIN0", + "DSP_0_BCIN0" + ], + [ + "BRKH_DSP_BCIN1", + "DSP_0_BCIN1" + ], + [ + "BRKH_DSP_BCIN2", + "DSP_0_BCIN2" + ], + [ + "BRKH_DSP_BCIN3", + "DSP_0_BCIN3" + ], + [ + "BRKH_DSP_BCIN4", + "DSP_0_BCIN4" + ], + [ + "BRKH_DSP_BCIN5", + "DSP_0_BCIN5" + ], + [ + "BRKH_DSP_BCIN6", + "DSP_0_BCIN6" + ], + [ + "BRKH_DSP_BCIN7", + "DSP_0_BCIN7" + ], + [ + "BRKH_DSP_BCIN8", + "DSP_0_BCIN8" + ], + [ + "BRKH_DSP_BCIN9", + "DSP_0_BCIN9" + ], + [ + "BRKH_DSP_BCIN10", + "DSP_0_BCIN10" + ], + [ + "BRKH_DSP_BCIN11", + "DSP_0_BCIN11" + ], + [ + "BRKH_DSP_BCIN12", + "DSP_0_BCIN12" + ], + [ + "BRKH_DSP_BCIN13", + "DSP_0_BCIN13" + ], + [ + "BRKH_DSP_BCIN14", + "DSP_0_BCIN14" + ], + [ + "BRKH_DSP_BCIN15", + "DSP_0_BCIN15" + ], + [ + "BRKH_DSP_BCIN16", + "DSP_0_BCIN16" + ], + [ + "BRKH_DSP_BCIN17", + "DSP_0_BCIN17" + ], + [ + "BRKH_DSP_CARRYCASCIN", + "DSP_0_CARRYCASCIN" + ], + [ + "BRKH_DSP_MULTSIGNIN", + "DSP_0_MULTSIGNIN" + ], + [ + "BRKH_DSP_PCIN0", + "DSP_0_PCIN0" + ], + [ + "BRKH_DSP_PCIN1", + "DSP_0_PCIN1" + ], + [ + "BRKH_DSP_PCIN2", + "DSP_0_PCIN2" + ], + [ + "BRKH_DSP_PCIN3", + "DSP_0_PCIN3" + ], + [ + "BRKH_DSP_PCIN4", + "DSP_0_PCIN4" + ], + [ + "BRKH_DSP_PCIN5", + "DSP_0_PCIN5" + ], + [ + "BRKH_DSP_PCIN6", + "DSP_0_PCIN6" + ], + [ + "BRKH_DSP_PCIN7", + "DSP_0_PCIN7" + ], + [ + "BRKH_DSP_PCIN8", + "DSP_0_PCIN8" + ], + [ + "BRKH_DSP_PCIN9", + "DSP_0_PCIN9" + ], + [ + "BRKH_DSP_PCIN10", + "DSP_0_PCIN10" + ], + [ + "BRKH_DSP_PCIN11", + "DSP_0_PCIN11" + ], + [ + "BRKH_DSP_PCIN12", + "DSP_0_PCIN12" + ], + [ + "BRKH_DSP_PCIN13", + "DSP_0_PCIN13" + ], + [ + "BRKH_DSP_PCIN14", + "DSP_0_PCIN14" + ], + [ + "BRKH_DSP_PCIN15", + "DSP_0_PCIN15" + ], + [ + "BRKH_DSP_PCIN16", + "DSP_0_PCIN16" + ], + [ + "BRKH_DSP_PCIN17", + "DSP_0_PCIN17" + ], + [ + "BRKH_DSP_PCIN18", + "DSP_0_PCIN18" + ], + [ + "BRKH_DSP_PCIN19", + "DSP_0_PCIN19" + ], + [ + "BRKH_DSP_PCIN20", + "DSP_0_PCIN20" + ], + [ + "BRKH_DSP_PCIN21", + "DSP_0_PCIN21" + ], + [ + "BRKH_DSP_PCIN22", + "DSP_0_PCIN22" + ], + [ + "BRKH_DSP_PCIN23", + "DSP_0_PCIN23" + ], + [ + "BRKH_DSP_PCIN24", + "DSP_0_PCIN24" + ], + [ + "BRKH_DSP_PCIN25", + "DSP_0_PCIN25" + ], + [ + "BRKH_DSP_PCIN26", + "DSP_0_PCIN26" + ], + [ + "BRKH_DSP_PCIN27", + "DSP_0_PCIN27" + ], + [ + "BRKH_DSP_PCIN28", + "DSP_0_PCIN28" + ], + [ + "BRKH_DSP_PCIN29", + "DSP_0_PCIN29" + ], + [ + "BRKH_DSP_PCIN30", + "DSP_0_PCIN30" + ], + [ + "BRKH_DSP_PCIN31", + "DSP_0_PCIN31" + ], + [ + "BRKH_DSP_PCIN32", + "DSP_0_PCIN32" + ], + [ + "BRKH_DSP_PCIN33", + "DSP_0_PCIN33" + ], + [ + "BRKH_DSP_PCIN34", + "DSP_0_PCIN34" + ], + [ + "BRKH_DSP_PCIN35", + "DSP_0_PCIN35" + ], + [ + "BRKH_DSP_PCIN36", + "DSP_0_PCIN36" + ], + [ + "BRKH_DSP_PCIN37", + "DSP_0_PCIN37" + ], + [ + "BRKH_DSP_PCIN38", + "DSP_0_PCIN38" + ], + [ + "BRKH_DSP_PCIN39", + "DSP_0_PCIN39" + ], + [ + "BRKH_DSP_PCIN40", + "DSP_0_PCIN40" + ], + [ + "BRKH_DSP_PCIN41", + "DSP_0_PCIN41" + ], + [ + "BRKH_DSP_PCIN42", + "DSP_0_PCIN42" + ], + [ + "BRKH_DSP_PCIN43", + "DSP_0_PCIN43" + ], + [ + "BRKH_DSP_PCIN44", + "DSP_0_PCIN44" + ], + [ + "BRKH_DSP_PCIN45", + "DSP_0_PCIN45" + ], + [ + "BRKH_DSP_PCIN46", + "DSP_0_PCIN46" + ], + [ + "BRKH_DSP_PCIN47", + "DSP_0_PCIN47" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "BRKH_DSP_L", + "DSP_L" + ], + "wire_pairs": [ + [ + "BRKH_DSP_ACIN0", + "DSP_ACOUT0" + ], + [ + "BRKH_DSP_ACIN1", + "DSP_ACOUT1" + ], + [ + "BRKH_DSP_ACIN2", + "DSP_ACOUT2" + ], + [ + "BRKH_DSP_ACIN3", + "DSP_ACOUT3" + ], + [ + "BRKH_DSP_ACIN4", + "DSP_ACOUT4" + ], + [ + "BRKH_DSP_ACIN5", + "DSP_ACOUT5" + ], + [ + "BRKH_DSP_ACIN6", + "DSP_ACOUT6" + ], + [ + "BRKH_DSP_ACIN7", + "DSP_ACOUT7" + ], + [ + "BRKH_DSP_ACIN8", + "DSP_ACOUT8" + ], + [ + "BRKH_DSP_ACIN9", + "DSP_ACOUT9" + ], + [ + "BRKH_DSP_ACIN10", + "DSP_ACOUT10" + ], + [ + "BRKH_DSP_ACIN11", + "DSP_ACOUT11" + ], + [ + "BRKH_DSP_ACIN12", + "DSP_ACOUT12" + ], + [ + "BRKH_DSP_ACIN13", + "DSP_ACOUT13" + ], + [ + "BRKH_DSP_ACIN14", + "DSP_ACOUT14" + ], + [ + "BRKH_DSP_ACIN15", + "DSP_ACOUT15" + ], + [ + "BRKH_DSP_ACIN16", + "DSP_ACOUT16" + ], + [ + "BRKH_DSP_ACIN17", + "DSP_ACOUT17" + ], + [ + "BRKH_DSP_ACIN18", + "DSP_ACOUT18" + ], + [ + "BRKH_DSP_ACIN19", + "DSP_ACOUT19" + ], + [ + "BRKH_DSP_ACIN20", + "DSP_ACOUT20" + ], + [ + "BRKH_DSP_ACIN21", + "DSP_ACOUT21" + ], + [ + "BRKH_DSP_ACIN22", + "DSP_ACOUT22" + ], + [ + "BRKH_DSP_ACIN23", + "DSP_ACOUT23" + ], + [ + "BRKH_DSP_ACIN24", + "DSP_ACOUT24" + ], + [ + "BRKH_DSP_ACIN25", + "DSP_ACOUT25" + ], + [ + "BRKH_DSP_ACIN26", + "DSP_ACOUT26" + ], + [ + "BRKH_DSP_ACIN27", + "DSP_ACOUT27" + ], + [ + "BRKH_DSP_ACIN28", + "DSP_ACOUT28" + ], + [ + "BRKH_DSP_ACIN29", + "DSP_ACOUT29" + ], + [ + "BRKH_DSP_BCIN0", + "DSP_BCOUT0" + ], + [ + "BRKH_DSP_BCIN1", + "DSP_BCOUT1" + ], + [ + "BRKH_DSP_BCIN2", + "DSP_BCOUT2" + ], + [ + "BRKH_DSP_BCIN3", + "DSP_BCOUT3" + ], + [ + "BRKH_DSP_BCIN4", + "DSP_BCOUT4" + ], + [ + "BRKH_DSP_BCIN5", + "DSP_BCOUT5" + ], + [ + "BRKH_DSP_BCIN6", + "DSP_BCOUT6" + ], + [ + "BRKH_DSP_BCIN7", + "DSP_BCOUT7" + ], + [ + "BRKH_DSP_BCIN8", + "DSP_BCOUT8" + ], + [ + "BRKH_DSP_BCIN9", + "DSP_BCOUT9" + ], + [ + "BRKH_DSP_BCIN10", + "DSP_BCOUT10" + ], + [ + "BRKH_DSP_BCIN11", + "DSP_BCOUT11" + ], + [ + "BRKH_DSP_BCIN12", + "DSP_BCOUT12" + ], + [ + "BRKH_DSP_BCIN13", + "DSP_BCOUT13" + ], + [ + "BRKH_DSP_BCIN14", + "DSP_BCOUT14" + ], + [ + "BRKH_DSP_BCIN15", + "DSP_BCOUT15" + ], + [ + "BRKH_DSP_BCIN16", + "DSP_BCOUT16" + ], + [ + "BRKH_DSP_BCIN17", + "DSP_BCOUT17" + ], + [ + "BRKH_DSP_CARRYCASCIN", + "DSP_CARRYCASCOUT" + ], + [ + "BRKH_DSP_MULTSIGNIN", + "DSP_MULTSIGNOUT" + ], + [ + "BRKH_DSP_PCIN0", + "DSP_PCOUT0" + ], + [ + "BRKH_DSP_PCIN1", + "DSP_PCOUT1" + ], + [ + "BRKH_DSP_PCIN2", + "DSP_PCOUT2" + ], + [ + "BRKH_DSP_PCIN3", + "DSP_PCOUT3" + ], + [ + "BRKH_DSP_PCIN4", + "DSP_PCOUT4" + ], + [ + "BRKH_DSP_PCIN5", + "DSP_PCOUT5" + ], + [ + "BRKH_DSP_PCIN6", + "DSP_PCOUT6" + ], + [ + "BRKH_DSP_PCIN7", + "DSP_PCOUT7" + ], + [ + "BRKH_DSP_PCIN8", + "DSP_PCOUT8" + ], + [ + "BRKH_DSP_PCIN9", + "DSP_PCOUT9" + ], + [ + "BRKH_DSP_PCIN10", + "DSP_PCOUT10" + ], + [ + "BRKH_DSP_PCIN11", + "DSP_PCOUT11" + ], + [ + "BRKH_DSP_PCIN12", + "DSP_PCOUT12" + ], + [ + "BRKH_DSP_PCIN13", + "DSP_PCOUT13" + ], + [ + "BRKH_DSP_PCIN14", + "DSP_PCOUT14" + ], + [ + "BRKH_DSP_PCIN15", + "DSP_PCOUT15" + ], + [ + "BRKH_DSP_PCIN16", + "DSP_PCOUT16" + ], + [ + "BRKH_DSP_PCIN17", + "DSP_PCOUT17" + ], + [ + "BRKH_DSP_PCIN18", + "DSP_PCOUT18" + ], + [ + "BRKH_DSP_PCIN19", + "DSP_PCOUT19" + ], + [ + "BRKH_DSP_PCIN20", + "DSP_PCOUT20" + ], + [ + "BRKH_DSP_PCIN21", + "DSP_PCOUT21" + ], + [ + "BRKH_DSP_PCIN22", + "DSP_PCOUT22" + ], + [ + "BRKH_DSP_PCIN23", + "DSP_PCOUT23" + ], + [ + "BRKH_DSP_PCIN24", + "DSP_PCOUT24" + ], + [ + "BRKH_DSP_PCIN25", + "DSP_PCOUT25" + ], + [ + "BRKH_DSP_PCIN26", + "DSP_PCOUT26" + ], + [ + "BRKH_DSP_PCIN27", + "DSP_PCOUT27" + ], + [ + "BRKH_DSP_PCIN28", + "DSP_PCOUT28" + ], + [ + "BRKH_DSP_PCIN29", + "DSP_PCOUT29" + ], + [ + "BRKH_DSP_PCIN30", + "DSP_PCOUT30" + ], + [ + "BRKH_DSP_PCIN31", + "DSP_PCOUT31" + ], + [ + "BRKH_DSP_PCIN32", + "DSP_PCOUT32" + ], + [ + "BRKH_DSP_PCIN33", + "DSP_PCOUT33" + ], + [ + "BRKH_DSP_PCIN34", + "DSP_PCOUT34" + ], + [ + "BRKH_DSP_PCIN35", + "DSP_PCOUT35" + ], + [ + "BRKH_DSP_PCIN36", + "DSP_PCOUT36" + ], + [ + "BRKH_DSP_PCIN37", + "DSP_PCOUT37" + ], + [ + "BRKH_DSP_PCIN38", + "DSP_PCOUT38" + ], + [ + "BRKH_DSP_PCIN39", + "DSP_PCOUT39" + ], + [ + "BRKH_DSP_PCIN40", + "DSP_PCOUT40" + ], + [ + "BRKH_DSP_PCIN41", + "DSP_PCOUT41" + ], + [ + "BRKH_DSP_PCIN42", + "DSP_PCOUT42" + ], + [ + "BRKH_DSP_PCIN43", + "DSP_PCOUT43" + ], + [ + "BRKH_DSP_PCIN44", + "DSP_PCOUT44" + ], + [ + "BRKH_DSP_PCIN45", + "DSP_PCOUT45" + ], + [ + "BRKH_DSP_PCIN46", + "DSP_PCOUT46" + ], + [ + "BRKH_DSP_PCIN47", + "DSP_PCOUT47" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_DSP_R", + "DSP_R" + ], + "wire_pairs": [ + [ + "BRKH_DSP_ACIN0", + "DSP_0_ACIN0" + ], + [ + "BRKH_DSP_ACIN1", + "DSP_0_ACIN1" + ], + [ + "BRKH_DSP_ACIN2", + "DSP_0_ACIN2" + ], + [ + "BRKH_DSP_ACIN3", + "DSP_0_ACIN3" + ], + [ + "BRKH_DSP_ACIN4", + "DSP_0_ACIN4" + ], + [ + "BRKH_DSP_ACIN5", + "DSP_0_ACIN5" + ], + [ + "BRKH_DSP_ACIN6", + "DSP_0_ACIN6" + ], + [ + "BRKH_DSP_ACIN7", + "DSP_0_ACIN7" + ], + [ + "BRKH_DSP_ACIN8", + "DSP_0_ACIN8" + ], + [ + "BRKH_DSP_ACIN9", + "DSP_0_ACIN9" + ], + [ + "BRKH_DSP_ACIN10", + "DSP_0_ACIN10" + ], + [ + "BRKH_DSP_ACIN11", + "DSP_0_ACIN11" + ], + [ + "BRKH_DSP_ACIN12", + "DSP_0_ACIN12" + ], + [ + "BRKH_DSP_ACIN13", + "DSP_0_ACIN13" + ], + [ + "BRKH_DSP_ACIN14", + "DSP_0_ACIN14" + ], + [ + "BRKH_DSP_ACIN15", + "DSP_0_ACIN15" + ], + [ + "BRKH_DSP_ACIN16", + "DSP_0_ACIN16" + ], + [ + "BRKH_DSP_ACIN17", + "DSP_0_ACIN17" + ], + [ + "BRKH_DSP_ACIN18", + "DSP_0_ACIN18" + ], + [ + "BRKH_DSP_ACIN19", + "DSP_0_ACIN19" + ], + [ + "BRKH_DSP_ACIN20", + "DSP_0_ACIN20" + ], + [ + "BRKH_DSP_ACIN21", + "DSP_0_ACIN21" + ], + [ + "BRKH_DSP_ACIN22", + "DSP_0_ACIN22" + ], + [ + "BRKH_DSP_ACIN23", + "DSP_0_ACIN23" + ], + [ + "BRKH_DSP_ACIN24", + "DSP_0_ACIN24" + ], + [ + "BRKH_DSP_ACIN25", + "DSP_0_ACIN25" + ], + [ + "BRKH_DSP_ACIN26", + "DSP_0_ACIN26" + ], + [ + "BRKH_DSP_ACIN27", + "DSP_0_ACIN27" + ], + [ + "BRKH_DSP_ACIN28", + "DSP_0_ACIN28" + ], + [ + "BRKH_DSP_ACIN29", + "DSP_0_ACIN29" + ], + [ + "BRKH_DSP_BCIN0", + "DSP_0_BCIN0" + ], + [ + "BRKH_DSP_BCIN1", + "DSP_0_BCIN1" + ], + [ + "BRKH_DSP_BCIN2", + "DSP_0_BCIN2" + ], + [ + "BRKH_DSP_BCIN3", + "DSP_0_BCIN3" + ], + [ + "BRKH_DSP_BCIN4", + "DSP_0_BCIN4" + ], + [ + "BRKH_DSP_BCIN5", + "DSP_0_BCIN5" + ], + [ + "BRKH_DSP_BCIN6", + "DSP_0_BCIN6" + ], + [ + "BRKH_DSP_BCIN7", + "DSP_0_BCIN7" + ], + [ + "BRKH_DSP_BCIN8", + "DSP_0_BCIN8" + ], + [ + "BRKH_DSP_BCIN9", + "DSP_0_BCIN9" + ], + [ + "BRKH_DSP_BCIN10", + "DSP_0_BCIN10" + ], + [ + "BRKH_DSP_BCIN11", + "DSP_0_BCIN11" + ], + [ + "BRKH_DSP_BCIN12", + "DSP_0_BCIN12" + ], + [ + "BRKH_DSP_BCIN13", + "DSP_0_BCIN13" + ], + [ + "BRKH_DSP_BCIN14", + "DSP_0_BCIN14" + ], + [ + "BRKH_DSP_BCIN15", + "DSP_0_BCIN15" + ], + [ + "BRKH_DSP_BCIN16", + "DSP_0_BCIN16" + ], + [ + "BRKH_DSP_BCIN17", + "DSP_0_BCIN17" + ], + [ + "BRKH_DSP_CARRYCASCIN", + "DSP_0_CARRYCASCIN" + ], + [ + "BRKH_DSP_MULTSIGNIN", + "DSP_0_MULTSIGNIN" + ], + [ + "BRKH_DSP_PCIN0", + "DSP_0_PCIN0" + ], + [ + "BRKH_DSP_PCIN1", + "DSP_0_PCIN1" + ], + [ + "BRKH_DSP_PCIN2", + "DSP_0_PCIN2" + ], + [ + "BRKH_DSP_PCIN3", + "DSP_0_PCIN3" + ], + [ + "BRKH_DSP_PCIN4", + "DSP_0_PCIN4" + ], + [ + "BRKH_DSP_PCIN5", + "DSP_0_PCIN5" + ], + [ + "BRKH_DSP_PCIN6", + "DSP_0_PCIN6" + ], + [ + "BRKH_DSP_PCIN7", + "DSP_0_PCIN7" + ], + [ + "BRKH_DSP_PCIN8", + "DSP_0_PCIN8" + ], + [ + "BRKH_DSP_PCIN9", + "DSP_0_PCIN9" + ], + [ + "BRKH_DSP_PCIN10", + "DSP_0_PCIN10" + ], + [ + "BRKH_DSP_PCIN11", + "DSP_0_PCIN11" + ], + [ + "BRKH_DSP_PCIN12", + "DSP_0_PCIN12" + ], + [ + "BRKH_DSP_PCIN13", + "DSP_0_PCIN13" + ], + [ + "BRKH_DSP_PCIN14", + "DSP_0_PCIN14" + ], + [ + "BRKH_DSP_PCIN15", + "DSP_0_PCIN15" + ], + [ + "BRKH_DSP_PCIN16", + "DSP_0_PCIN16" + ], + [ + "BRKH_DSP_PCIN17", + "DSP_0_PCIN17" + ], + [ + "BRKH_DSP_PCIN18", + "DSP_0_PCIN18" + ], + [ + "BRKH_DSP_PCIN19", + "DSP_0_PCIN19" + ], + [ + "BRKH_DSP_PCIN20", + "DSP_0_PCIN20" + ], + [ + "BRKH_DSP_PCIN21", + "DSP_0_PCIN21" + ], + [ + "BRKH_DSP_PCIN22", + "DSP_0_PCIN22" + ], + [ + "BRKH_DSP_PCIN23", + "DSP_0_PCIN23" + ], + [ + "BRKH_DSP_PCIN24", + "DSP_0_PCIN24" + ], + [ + "BRKH_DSP_PCIN25", + "DSP_0_PCIN25" + ], + [ + "BRKH_DSP_PCIN26", + "DSP_0_PCIN26" + ], + [ + "BRKH_DSP_PCIN27", + "DSP_0_PCIN27" + ], + [ + "BRKH_DSP_PCIN28", + "DSP_0_PCIN28" + ], + [ + "BRKH_DSP_PCIN29", + "DSP_0_PCIN29" + ], + [ + "BRKH_DSP_PCIN30", + "DSP_0_PCIN30" + ], + [ + "BRKH_DSP_PCIN31", + "DSP_0_PCIN31" + ], + [ + "BRKH_DSP_PCIN32", + "DSP_0_PCIN32" + ], + [ + "BRKH_DSP_PCIN33", + "DSP_0_PCIN33" + ], + [ + "BRKH_DSP_PCIN34", + "DSP_0_PCIN34" + ], + [ + "BRKH_DSP_PCIN35", + "DSP_0_PCIN35" + ], + [ + "BRKH_DSP_PCIN36", + "DSP_0_PCIN36" + ], + [ + "BRKH_DSP_PCIN37", + "DSP_0_PCIN37" + ], + [ + "BRKH_DSP_PCIN38", + "DSP_0_PCIN38" + ], + [ + "BRKH_DSP_PCIN39", + "DSP_0_PCIN39" + ], + [ + "BRKH_DSP_PCIN40", + "DSP_0_PCIN40" + ], + [ + "BRKH_DSP_PCIN41", + "DSP_0_PCIN41" + ], + [ + "BRKH_DSP_PCIN42", + "DSP_0_PCIN42" + ], + [ + "BRKH_DSP_PCIN43", + "DSP_0_PCIN43" + ], + [ + "BRKH_DSP_PCIN44", + "DSP_0_PCIN44" + ], + [ + "BRKH_DSP_PCIN45", + "DSP_0_PCIN45" + ], + [ + "BRKH_DSP_PCIN46", + "DSP_0_PCIN46" + ], + [ + "BRKH_DSP_PCIN47", + "DSP_0_PCIN47" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "BRKH_DSP_R", + "DSP_R" + ], + "wire_pairs": [ + [ + "BRKH_DSP_ACIN0", + "DSP_ACOUT0" + ], + [ + "BRKH_DSP_ACIN1", + "DSP_ACOUT1" + ], + [ + "BRKH_DSP_ACIN2", + "DSP_ACOUT2" + ], + [ + "BRKH_DSP_ACIN3", + "DSP_ACOUT3" + ], + [ + "BRKH_DSP_ACIN4", + "DSP_ACOUT4" + ], + [ + "BRKH_DSP_ACIN5", + "DSP_ACOUT5" + ], + [ + "BRKH_DSP_ACIN6", + "DSP_ACOUT6" + ], + [ + "BRKH_DSP_ACIN7", + "DSP_ACOUT7" + ], + [ + "BRKH_DSP_ACIN8", + "DSP_ACOUT8" + ], + [ + "BRKH_DSP_ACIN9", + "DSP_ACOUT9" + ], + [ + "BRKH_DSP_ACIN10", + "DSP_ACOUT10" + ], + [ + "BRKH_DSP_ACIN11", + "DSP_ACOUT11" + ], + [ + "BRKH_DSP_ACIN12", + "DSP_ACOUT12" + ], + [ + "BRKH_DSP_ACIN13", + "DSP_ACOUT13" + ], + [ + "BRKH_DSP_ACIN14", + "DSP_ACOUT14" + ], + [ + "BRKH_DSP_ACIN15", + "DSP_ACOUT15" + ], + [ + "BRKH_DSP_ACIN16", + "DSP_ACOUT16" + ], + [ + "BRKH_DSP_ACIN17", + "DSP_ACOUT17" + ], + [ + "BRKH_DSP_ACIN18", + "DSP_ACOUT18" + ], + [ + "BRKH_DSP_ACIN19", + "DSP_ACOUT19" + ], + [ + "BRKH_DSP_ACIN20", + "DSP_ACOUT20" + ], + [ + "BRKH_DSP_ACIN21", + "DSP_ACOUT21" + ], + [ + "BRKH_DSP_ACIN22", + "DSP_ACOUT22" + ], + [ + "BRKH_DSP_ACIN23", + "DSP_ACOUT23" + ], + [ + "BRKH_DSP_ACIN24", + "DSP_ACOUT24" + ], + [ + "BRKH_DSP_ACIN25", + "DSP_ACOUT25" + ], + [ + "BRKH_DSP_ACIN26", + "DSP_ACOUT26" + ], + [ + "BRKH_DSP_ACIN27", + "DSP_ACOUT27" + ], + [ + "BRKH_DSP_ACIN28", + "DSP_ACOUT28" + ], + [ + "BRKH_DSP_ACIN29", + "DSP_ACOUT29" + ], + [ + "BRKH_DSP_BCIN0", + "DSP_BCOUT0" + ], + [ + "BRKH_DSP_BCIN1", + "DSP_BCOUT1" + ], + [ + "BRKH_DSP_BCIN2", + "DSP_BCOUT2" + ], + [ + "BRKH_DSP_BCIN3", + "DSP_BCOUT3" + ], + [ + "BRKH_DSP_BCIN4", + "DSP_BCOUT4" + ], + [ + "BRKH_DSP_BCIN5", + "DSP_BCOUT5" + ], + [ + "BRKH_DSP_BCIN6", + "DSP_BCOUT6" + ], + [ + "BRKH_DSP_BCIN7", + "DSP_BCOUT7" + ], + [ + "BRKH_DSP_BCIN8", + "DSP_BCOUT8" + ], + [ + "BRKH_DSP_BCIN9", + "DSP_BCOUT9" + ], + [ + "BRKH_DSP_BCIN10", + "DSP_BCOUT10" + ], + [ + "BRKH_DSP_BCIN11", + "DSP_BCOUT11" + ], + [ + "BRKH_DSP_BCIN12", + "DSP_BCOUT12" + ], + [ + "BRKH_DSP_BCIN13", + "DSP_BCOUT13" + ], + [ + "BRKH_DSP_BCIN14", + "DSP_BCOUT14" + ], + [ + "BRKH_DSP_BCIN15", + "DSP_BCOUT15" + ], + [ + "BRKH_DSP_BCIN16", + "DSP_BCOUT16" + ], + [ + "BRKH_DSP_BCIN17", + "DSP_BCOUT17" + ], + [ + "BRKH_DSP_CARRYCASCIN", + "DSP_CARRYCASCOUT" + ], + [ + "BRKH_DSP_MULTSIGNIN", + "DSP_MULTSIGNOUT" + ], + [ + "BRKH_DSP_PCIN0", + "DSP_PCOUT0" + ], + [ + "BRKH_DSP_PCIN1", + "DSP_PCOUT1" + ], + [ + "BRKH_DSP_PCIN2", + "DSP_PCOUT2" + ], + [ + "BRKH_DSP_PCIN3", + "DSP_PCOUT3" + ], + [ + "BRKH_DSP_PCIN4", + "DSP_PCOUT4" + ], + [ + "BRKH_DSP_PCIN5", + "DSP_PCOUT5" + ], + [ + "BRKH_DSP_PCIN6", + "DSP_PCOUT6" + ], + [ + "BRKH_DSP_PCIN7", + "DSP_PCOUT7" + ], + [ + "BRKH_DSP_PCIN8", + "DSP_PCOUT8" + ], + [ + "BRKH_DSP_PCIN9", + "DSP_PCOUT9" + ], + [ + "BRKH_DSP_PCIN10", + "DSP_PCOUT10" + ], + [ + "BRKH_DSP_PCIN11", + "DSP_PCOUT11" + ], + [ + "BRKH_DSP_PCIN12", + "DSP_PCOUT12" + ], + [ + "BRKH_DSP_PCIN13", + "DSP_PCOUT13" + ], + [ + "BRKH_DSP_PCIN14", + "DSP_PCOUT14" + ], + [ + "BRKH_DSP_PCIN15", + "DSP_PCOUT15" + ], + [ + "BRKH_DSP_PCIN16", + "DSP_PCOUT16" + ], + [ + "BRKH_DSP_PCIN17", + "DSP_PCOUT17" + ], + [ + "BRKH_DSP_PCIN18", + "DSP_PCOUT18" + ], + [ + "BRKH_DSP_PCIN19", + "DSP_PCOUT19" + ], + [ + "BRKH_DSP_PCIN20", + "DSP_PCOUT20" + ], + [ + "BRKH_DSP_PCIN21", + "DSP_PCOUT21" + ], + [ + "BRKH_DSP_PCIN22", + "DSP_PCOUT22" + ], + [ + "BRKH_DSP_PCIN23", + "DSP_PCOUT23" + ], + [ + "BRKH_DSP_PCIN24", + "DSP_PCOUT24" + ], + [ + "BRKH_DSP_PCIN25", + "DSP_PCOUT25" + ], + [ + "BRKH_DSP_PCIN26", + "DSP_PCOUT26" + ], + [ + "BRKH_DSP_PCIN27", + "DSP_PCOUT27" + ], + [ + "BRKH_DSP_PCIN28", + "DSP_PCOUT28" + ], + [ + "BRKH_DSP_PCIN29", + "DSP_PCOUT29" + ], + [ + "BRKH_DSP_PCIN30", + "DSP_PCOUT30" + ], + [ + "BRKH_DSP_PCIN31", + "DSP_PCOUT31" + ], + [ + "BRKH_DSP_PCIN32", + "DSP_PCOUT32" + ], + [ + "BRKH_DSP_PCIN33", + "DSP_PCOUT33" + ], + [ + "BRKH_DSP_PCIN34", + "DSP_PCOUT34" + ], + [ + "BRKH_DSP_PCIN35", + "DSP_PCOUT35" + ], + [ + "BRKH_DSP_PCIN36", + "DSP_PCOUT36" + ], + [ + "BRKH_DSP_PCIN37", + "DSP_PCOUT37" + ], + [ + "BRKH_DSP_PCIN38", + "DSP_PCOUT38" + ], + [ + "BRKH_DSP_PCIN39", + "DSP_PCOUT39" + ], + [ + "BRKH_DSP_PCIN40", + "DSP_PCOUT40" + ], + [ + "BRKH_DSP_PCIN41", + "DSP_PCOUT41" + ], + [ + "BRKH_DSP_PCIN42", + "DSP_PCOUT42" + ], + [ + "BRKH_DSP_PCIN43", + "DSP_PCOUT43" + ], + [ + "BRKH_DSP_PCIN44", + "DSP_PCOUT44" + ], + [ + "BRKH_DSP_PCIN45", + "DSP_PCOUT45" + ], + [ + "BRKH_DSP_PCIN46", + "DSP_PCOUT46" + ], + [ + "BRKH_DSP_PCIN47", + "DSP_PCOUT47" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_INT", + "INT_L" + ], + "wire_pairs": [ + [ + "BRKH_INT_BYP_BOUNCE2", + "BYP_BOUNCE_N3_2" + ], + [ + "BRKH_INT_BYP_BOUNCE3", + "BYP_BOUNCE_N3_3" + ], + [ + "BRKH_INT_BYP_BOUNCE6", + "BYP_BOUNCE_N3_6" + ], + [ + "BRKH_INT_BYP_BOUNCE7", + "BYP_BOUNCE_N3_7" + ], + [ + "BRKH_INT_EL1BEG3", + "EL1BEG_N3" + ], + [ + "BRKH_INT_EL1END_S3_0", + "EL1END0" + ], + [ + "BRKH_INT_ER1BEG_S0", + "ER1BEG0" + ], + [ + "BRKH_INT_ER1END3", + "ER1END_N3_3" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_0", + "FAN_BOUNCE0" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_2", + "FAN_BOUNCE2" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_4", + "FAN_BOUNCE4" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_6", + "FAN_BOUNCE6" + ], + [ + "BRKH_INT_LVB_L1", + "LVB_L1" + ], + [ + "BRKH_INT_LVB_L2", + "LVB_L2" + ], + [ + "BRKH_INT_LVB_L3", + "LVB_L3" + ], + [ + "BRKH_INT_LVB_L4", + "LVB_L4" + ], + [ + "BRKH_INT_LVB_L5", + "LVB_L5" + ], + [ + "BRKH_INT_LVB_L6", + "LVB_L6" + ], + [ + "BRKH_INT_LVB_L7", + "LVB_L7" + ], + [ + "BRKH_INT_LVB_L8", + "LVB_L8" + ], + [ + "BRKH_INT_LVB_L9", + "LVB_L9" + ], + [ + "BRKH_INT_LVB_L10", + "LVB_L10" + ], + [ + "BRKH_INT_LVB_L11", + "LVB_L11" + ], + [ + "BRKH_INT_LVB_L12", + "LVB_L12" + ], + [ + "BRKH_INT_L_LV0", + "LV_L1" + ], + [ + "BRKH_INT_L_LV1", + "LV_L2" + ], + [ + "BRKH_INT_L_LV2", + "LV_L3" + ], + [ + "BRKH_INT_L_LV3", + "LV_L4" + ], + [ + "BRKH_INT_L_LV4", + "LV_L5" + ], + [ + "BRKH_INT_L_LV5", + "LV_L6" + ], + [ + "BRKH_INT_L_LV6", + "LV_L7" + ], + [ + "BRKH_INT_L_LV7", + "LV_L8" + ], + [ + "BRKH_INT_L_LV8", + "LV_L9" + ], + [ + "BRKH_INT_L_LV9", + "LV_L10" + ], + [ + "BRKH_INT_L_LV10", + "LV_L11" + ], + [ + "BRKH_INT_L_LV11", + "LV_L12" + ], + [ + "BRKH_INT_L_LV12", + "LV_L13" + ], + [ + "BRKH_INT_L_LV13", + "LV_L14" + ], + [ + "BRKH_INT_L_LV14", + "LV_L15" + ], + [ + "BRKH_INT_L_LV15", + "LV_L16" + ], + [ + "BRKH_INT_L_LV16", + "LV_L17" + ], + [ + "BRKH_INT_L_LV17", + "LV_L18" + ], + [ + "BRKH_INT_NE2BEG0", + "NE2A0" + ], + [ + "BRKH_INT_NE2BEG1", + "NE2A1" + ], + [ + "BRKH_INT_NE2BEG2", + "NE2A2" + ], + [ + "BRKH_INT_NE2BEG3", + "NE2A3" + ], + [ + "BRKH_INT_NE2END_S3_0", + "NE2END0" + ], + [ + "BRKH_INT_NE6A0", + "NE6B0" + ], + [ + "BRKH_INT_NE6A1", + "NE6B1" + ], + [ + "BRKH_INT_NE6A2", + "NE6B2" + ], + [ + "BRKH_INT_NE6A3", + "NE6B3" + ], + [ + "BRKH_INT_NE6B0", + "NE6C0" + ], + [ + "BRKH_INT_NE6B1", + "NE6C1" + ], + [ + "BRKH_INT_NE6B2", + "NE6C2" + ], + [ + "BRKH_INT_NE6B3", + "NE6C3" + ], + [ + "BRKH_INT_NE6C0", + "NE6D0" + ], + [ + "BRKH_INT_NE6C1", + "NE6D1" + ], + [ + "BRKH_INT_NE6C2", + "NE6D2" + ], + [ + "BRKH_INT_NE6C3", + "NE6D3" + ], + [ + "BRKH_INT_NE6D0", + "NE6E0" + ], + [ + "BRKH_INT_NE6D1", + "NE6E1" + ], + [ + "BRKH_INT_NE6D2", + "NE6E2" + ], + [ + "BRKH_INT_NE6D3", + "NE6E3" + ], + [ + "BRKH_INT_NL1BEG0_SLOW", + "NL1END0" + ], + [ + "BRKH_INT_NL1BEG1_SLOW", + "NL1END1" + ], + [ + "BRKH_INT_NL1BEG2_SLOW", + "NL1END2" + ], + [ + "BRKH_INT_NL1END_S3_0", + "NL1END0" + ], + [ + "BRKH_INT_NN2A0", + "NN2END0" + ], + [ + "BRKH_INT_NN2A1", + "NN2END1" + ], + [ + "BRKH_INT_NN2A2", + "NN2END2" + ], + [ + "BRKH_INT_NN2A3", + "NN2END3" + ], + [ + "BRKH_INT_NN2BEG0", + "NN2A0" + ], + [ + "BRKH_INT_NN2BEG1", + "NN2A1" + ], + [ + "BRKH_INT_NN2BEG2", + "NN2A2" + ], + [ + "BRKH_INT_NN2BEG3", + "NN2A3" + ], + [ + "BRKH_INT_NN2END_S2_0", + "NN2END0" + ], + [ + "BRKH_INT_NN6A0", + "NN6B0" + ], + [ + "BRKH_INT_NN6A1", + "NN6B1" + ], + [ + "BRKH_INT_NN6A2", + "NN6B2" + ], + [ + "BRKH_INT_NN6A3", + "NN6B3" + ], + [ + "BRKH_INT_NN6B0", + "NN6C0" + ], + [ + "BRKH_INT_NN6B1", + "NN6C1" + ], + [ + "BRKH_INT_NN6B2", + "NN6C2" + ], + [ + "BRKH_INT_NN6B3", + "NN6C3" + ], + [ + "BRKH_INT_NN6BEG0", + "NN6A0" + ], + [ + "BRKH_INT_NN6BEG1", + "NN6A1" + ], + [ + "BRKH_INT_NN6BEG2", + "NN6A2" + ], + [ + "BRKH_INT_NN6BEG3", + "NN6A3" + ], + [ + "BRKH_INT_NN6C0", + "NN6D0" + ], + [ + "BRKH_INT_NN6C1", + "NN6D1" + ], + [ + "BRKH_INT_NN6C2", + "NN6D2" + ], + [ + "BRKH_INT_NN6C3", + "NN6D3" + ], + [ + "BRKH_INT_NN6D0", + "NN6E0" + ], + [ + "BRKH_INT_NN6D1", + "NN6E1" + ], + [ + "BRKH_INT_NN6D2", + "NN6E2" + ], + [ + "BRKH_INT_NN6D3", + "NN6E3" + ], + [ + "BRKH_INT_NN6E0", + "NN6END0" + ], + [ + "BRKH_INT_NN6E1", + "NN6END1" + ], + [ + "BRKH_INT_NN6E2", + "NN6END2" + ], + [ + "BRKH_INT_NN6E3", + "NN6END3" + ], + [ + "BRKH_INT_NN6END_S1_0", + "NN6END0" + ], + [ + "BRKH_INT_NR1BEG0_SLOW", + "NR1END0" + ], + [ + "BRKH_INT_NR1BEG1_SLOW", + "NR1END1" + ], + [ + "BRKH_INT_NR1BEG2_SLOW", + "NR1END2" + ], + [ + "BRKH_INT_NR1BEG3_SLOW", + "NR1END3" + ], + [ + "BRKH_INT_NW2BEG0", + "NW2A0" + ], + [ + "BRKH_INT_NW2BEG1", + "NW2A1" + ], + [ + "BRKH_INT_NW2BEG2", + "NW2A2" + ], + [ + "BRKH_INT_NW2BEG3", + "NW2A3" + ], + [ + "BRKH_INT_NW2END_S0_0", + "NW2END0" + ], + [ + "BRKH_INT_NW6A0", + "NW6B0" + ], + [ + "BRKH_INT_NW6A1", + "NW6B1" + ], + [ + "BRKH_INT_NW6A2", + "NW6B2" + ], + [ + "BRKH_INT_NW6A3", + "NW6B3" + ], + [ + "BRKH_INT_NW6B0", + "NW6C0" + ], + [ + "BRKH_INT_NW6B1", + "NW6C1" + ], + [ + "BRKH_INT_NW6B2", + "NW6C2" + ], + [ + "BRKH_INT_NW6B3", + "NW6C3" + ], + [ + "BRKH_INT_NW6C0", + "NW6D0" + ], + [ + "BRKH_INT_NW6C1", + "NW6D1" + ], + [ + "BRKH_INT_NW6C2", + "NW6D2" + ], + [ + "BRKH_INT_NW6C3", + "NW6D3" + ], + [ + "BRKH_INT_NW6D0", + "NW6E0" + ], + [ + "BRKH_INT_NW6D1", + "NW6E1" + ], + [ + "BRKH_INT_NW6D2", + "NW6E2" + ], + [ + "BRKH_INT_NW6D3", + "NW6E3" + ], + [ + "BRKH_INT_NW6END_S0_0", + "NW6END0" + ], + [ + "BRKH_INT_SE2A0", + "SE2BEG0" + ], + [ + "BRKH_INT_SE2A1", + "SE2BEG1" + ], + [ + "BRKH_INT_SE2A2", + "SE2BEG2" + ], + [ + "BRKH_INT_SE2A3", + "SE2BEG3" + ], + [ + "BRKH_INT_SE6B0", + "SE6A0" + ], + [ + "BRKH_INT_SE6B1", + "SE6A1" + ], + [ + "BRKH_INT_SE6B2", + "SE6A2" + ], + [ + "BRKH_INT_SE6B3", + "SE6A3" + ], + [ + "BRKH_INT_SE6C0", + "SE6B0" + ], + [ + "BRKH_INT_SE6C1", + "SE6B1" + ], + [ + "BRKH_INT_SE6C2", + "SE6B2" + ], + [ + "BRKH_INT_SE6C3", + "SE6B3" + ], + [ + "BRKH_INT_SE6D0", + "SE6C0" + ], + [ + "BRKH_INT_SE6D1", + "SE6C1" + ], + [ + "BRKH_INT_SE6D2", + "SE6C2" + ], + [ + "BRKH_INT_SE6D3", + "SE6C3" + ], + [ + "BRKH_INT_SE6E0", + "SE6D0" + ], + [ + "BRKH_INT_SE6E1", + "SE6D1" + ], + [ + "BRKH_INT_SE6E2", + "SE6D2" + ], + [ + "BRKH_INT_SE6E3", + "SE6D3" + ], + [ + "BRKH_INT_SL1END0_SLOW", + "SL1BEG0" + ], + [ + "BRKH_INT_SL1END1_SLOW", + "SL1BEG1" + ], + [ + "BRKH_INT_SL1END2_SLOW", + "SL1BEG2" + ], + [ + "BRKH_INT_SL1END3_SLOW", + "SL1BEG3" + ], + [ + "BRKH_INT_SR1END1_SLOW", + "SR1BEG1" + ], + [ + "BRKH_INT_SR1END2_SLOW", + "SR1BEG2" + ], + [ + "BRKH_INT_SR1END3_SLOW", + "SR1BEG3" + ], + [ + "BRKH_INT_SR1END_N3_3", + "SR1END_N3_3" + ], + [ + "BRKH_INT_SS2A0", + "SS2BEG0" + ], + [ + "BRKH_INT_SS2A1", + "SS2BEG1" + ], + [ + "BRKH_INT_SS2A2", + "SS2BEG2" + ], + [ + "BRKH_INT_SS2A3", + "SS2BEG3" + ], + [ + "BRKH_INT_SS2END0", + "SS2A0" + ], + [ + "BRKH_INT_SS2END1", + "SS2A1" + ], + [ + "BRKH_INT_SS2END2", + "SS2A2" + ], + [ + "BRKH_INT_SS2END3", + "SS2A3" + ], + [ + "BRKH_INT_SS2END_N0_3", + "SS2END_N0_3" + ], + [ + "BRKH_INT_SS6A0", + "SS6BEG0" + ], + [ + "BRKH_INT_SS6A1", + "SS6BEG1" + ], + [ + "BRKH_INT_SS6A2", + "SS6BEG2" + ], + [ + "BRKH_INT_SS6A3", + "SS6BEG3" + ], + [ + "BRKH_INT_SS6B0", + "SS6A0" + ], + [ + "BRKH_INT_SS6B1", + "SS6A1" + ], + [ + "BRKH_INT_SS6B2", + "SS6A2" + ], + [ + "BRKH_INT_SS6B3", + "SS6A3" + ], + [ + "BRKH_INT_SS6C0", + "SS6B0" + ], + [ + "BRKH_INT_SS6C1", + "SS6B1" + ], + [ + "BRKH_INT_SS6C2", + "SS6B2" + ], + [ + "BRKH_INT_SS6C3", + "SS6B3" + ], + [ + "BRKH_INT_SS6D0", + "SS6C0" + ], + [ + "BRKH_INT_SS6D1", + "SS6C1" + ], + [ + "BRKH_INT_SS6D2", + "SS6C2" + ], + [ + "BRKH_INT_SS6D3", + "SS6C3" + ], + [ + "BRKH_INT_SS6E0", + "SS6D0" + ], + [ + "BRKH_INT_SS6E1", + "SS6D1" + ], + [ + "BRKH_INT_SS6E2", + "SS6D2" + ], + [ + "BRKH_INT_SS6E3", + "SS6D3" + ], + [ + "BRKH_INT_SS6END0", + "SS6E0" + ], + [ + "BRKH_INT_SS6END1", + "SS6E1" + ], + [ + "BRKH_INT_SS6END2", + "SS6E2" + ], + [ + "BRKH_INT_SS6END3", + "SS6E3" + ], + [ + "BRKH_INT_SS6END_N0_3", + "SS6END_N0_3" + ], + [ + "BRKH_INT_SW2A0", + "SW2BEG0" + ], + [ + "BRKH_INT_SW2A1", + "SW2BEG1" + ], + [ + "BRKH_INT_SW2A2", + "SW2BEG2" + ], + [ + "BRKH_INT_SW2A3", + "SW2BEG3" + ], + [ + "BRKH_INT_SW2END3", + "SW2END_N0_3" + ], + [ + "BRKH_INT_SW6B0", + "SW6A0" + ], + [ + "BRKH_INT_SW6B1", + "SW6A1" + ], + [ + "BRKH_INT_SW6B2", + "SW6A2" + ], + [ + "BRKH_INT_SW6B3", + "SW6A3" + ], + [ + "BRKH_INT_SW6C0", + "SW6B0" + ], + [ + "BRKH_INT_SW6C1", + "SW6B1" + ], + [ + "BRKH_INT_SW6C2", + "SW6B2" + ], + [ + "BRKH_INT_SW6C3", + "SW6B3" + ], + [ + "BRKH_INT_SW6D0", + "SW6C0" + ], + [ + "BRKH_INT_SW6D1", + "SW6C1" + ], + [ + "BRKH_INT_SW6D2", + "SW6C2" + ], + [ + "BRKH_INT_SW6D3", + "SW6C3" + ], + [ + "BRKH_INT_SW6E0", + "SW6D0" + ], + [ + "BRKH_INT_SW6E1", + "SW6D1" + ], + [ + "BRKH_INT_SW6E2", + "SW6D2" + ], + [ + "BRKH_INT_SW6E3", + "SW6D3" + ], + [ + "BRKH_INT_SW6END3", + "SW6END_N0_3" + ], + [ + "BRKH_INT_WL1BEG3", + "WL1BEG_N3" + ], + [ + "BRKH_INT_WL1END3", + "WL1END_N1_3" + ], + [ + "BRKH_INT_WR1BEG_S0", + "WR1BEG0" + ], + [ + "BRKH_INT_WR1END_S1_0", + "WR1END0" + ], + [ + "BRKH_INT_WW2END3", + "WW2END_N0_3" + ], + [ + "BRKH_INT_WW4END_S0_0", + "WW4END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_INT", + "INT_L" + ], + "wire_pairs": [ + [ + "BRKH_INT_BYP_BOUNCE2", + "BYP_BOUNCE2" + ], + [ + "BRKH_INT_BYP_BOUNCE3", + "BYP_BOUNCE3" + ], + [ + "BRKH_INT_BYP_BOUNCE6", + "BYP_BOUNCE6" + ], + [ + "BRKH_INT_BYP_BOUNCE7", + "BYP_BOUNCE7" + ], + [ + "BRKH_INT_EL1BEG3", + "EL1BEG3" + ], + [ + "BRKH_INT_EL1END_S3_0", + "EL1END_S3_0" + ], + [ + "BRKH_INT_ER1BEG_S0", + "ER1BEG_S0" + ], + [ + "BRKH_INT_ER1END3", + "ER1END3" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_0", + "FAN_BOUNCE_S3_0" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_2", + "FAN_BOUNCE_S3_2" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_4", + "FAN_BOUNCE_S3_4" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_6", + "FAN_BOUNCE_S3_6" + ], + [ + "BRKH_INT_LVB_L1", + "LVB_L0" + ], + [ + "BRKH_INT_LVB_L2", + "LVB_L1" + ], + [ + "BRKH_INT_LVB_L3", + "LVB_L2" + ], + [ + "BRKH_INT_LVB_L4", + "LVB_L3" + ], + [ + "BRKH_INT_LVB_L5", + "LVB_L4" + ], + [ + "BRKH_INT_LVB_L6", + "LVB_L5" + ], + [ + "BRKH_INT_LVB_L7", + "LVB_L6" + ], + [ + "BRKH_INT_LVB_L8", + "LVB_L7" + ], + [ + "BRKH_INT_LVB_L9", + "LVB_L8" + ], + [ + "BRKH_INT_LVB_L10", + "LVB_L9" + ], + [ + "BRKH_INT_LVB_L11", + "LVB_L10" + ], + [ + "BRKH_INT_LVB_L12", + "LVB_L11" + ], + [ + "BRKH_INT_L_LV0", + "LV_L0" + ], + [ + "BRKH_INT_L_LV1", + "LV_L1" + ], + [ + "BRKH_INT_L_LV2", + "LV_L2" + ], + [ + "BRKH_INT_L_LV3", + "LV_L3" + ], + [ + "BRKH_INT_L_LV4", + "LV_L4" + ], + [ + "BRKH_INT_L_LV5", + "LV_L5" + ], + [ + "BRKH_INT_L_LV6", + "LV_L6" + ], + [ + "BRKH_INT_L_LV7", + "LV_L7" + ], + [ + "BRKH_INT_L_LV8", + "LV_L8" + ], + [ + "BRKH_INT_L_LV9", + "LV_L9" + ], + [ + "BRKH_INT_L_LV10", + "LV_L10" + ], + [ + "BRKH_INT_L_LV11", + "LV_L11" + ], + [ + "BRKH_INT_L_LV12", + "LV_L12" + ], + [ + "BRKH_INT_L_LV13", + "LV_L13" + ], + [ + "BRKH_INT_L_LV14", + "LV_L14" + ], + [ + "BRKH_INT_L_LV15", + "LV_L15" + ], + [ + "BRKH_INT_L_LV16", + "LV_L16" + ], + [ + "BRKH_INT_L_LV17", + "LV_L17" + ], + [ + "BRKH_INT_NE2BEG0", + "NE2BEG0" + ], + [ + "BRKH_INT_NE2BEG1", + "NE2BEG1" + ], + [ + "BRKH_INT_NE2BEG2", + "NE2BEG2" + ], + [ + "BRKH_INT_NE2BEG3", + "NE2BEG3" + ], + [ + "BRKH_INT_NE2END_S3_0", + "NE2END_S3_0" + ], + [ + "BRKH_INT_NE6A0", + "NE6A0" + ], + [ + "BRKH_INT_NE6A1", + "NE6A1" + ], + [ + "BRKH_INT_NE6A2", + "NE6A2" + ], + [ + "BRKH_INT_NE6A3", + "NE6A3" + ], + [ + "BRKH_INT_NE6B0", + "NE6B0" + ], + [ + "BRKH_INT_NE6B1", + "NE6B1" + ], + [ + "BRKH_INT_NE6B2", + "NE6B2" + ], + [ + "BRKH_INT_NE6B3", + "NE6B3" + ], + [ + "BRKH_INT_NE6C0", + "NE6C0" + ], + [ + "BRKH_INT_NE6C1", + "NE6C1" + ], + [ + "BRKH_INT_NE6C2", + "NE6C2" + ], + [ + "BRKH_INT_NE6C3", + "NE6C3" + ], + [ + "BRKH_INT_NE6D0", + "NE6D0" + ], + [ + "BRKH_INT_NE6D1", + "NE6D1" + ], + [ + "BRKH_INT_NE6D2", + "NE6D2" + ], + [ + "BRKH_INT_NE6D3", + "NE6D3" + ], + [ + "BRKH_INT_NL1BEG0", + "NL1BEG0" + ], + [ + "BRKH_INT_NL1BEG1", + "NL1BEG1" + ], + [ + "BRKH_INT_NL1BEG2", + "NL1BEG2" + ], + [ + "BRKH_INT_NL1END_S3_0", + "NL1END_S3_0" + ], + [ + "BRKH_INT_NN2A0", + "NN2A0" + ], + [ + "BRKH_INT_NN2A1", + "NN2A1" + ], + [ + "BRKH_INT_NN2A2", + "NN2A2" + ], + [ + "BRKH_INT_NN2A3", + "NN2A3" + ], + [ + "BRKH_INT_NN2BEG0", + "NN2BEG0" + ], + [ + "BRKH_INT_NN2BEG1", + "NN2BEG1" + ], + [ + "BRKH_INT_NN2BEG2", + "NN2BEG2" + ], + [ + "BRKH_INT_NN2BEG3", + "NN2BEG3" + ], + [ + "BRKH_INT_NN2END_S2_0", + "NN2END_S2_0" + ], + [ + "BRKH_INT_NN6A0", + "NN6A0" + ], + [ + "BRKH_INT_NN6A1", + "NN6A1" + ], + [ + "BRKH_INT_NN6A2", + "NN6A2" + ], + [ + "BRKH_INT_NN6A3", + "NN6A3" + ], + [ + "BRKH_INT_NN6B0", + "NN6B0" + ], + [ + "BRKH_INT_NN6B1", + "NN6B1" + ], + [ + "BRKH_INT_NN6B2", + "NN6B2" + ], + [ + "BRKH_INT_NN6B3", + "NN6B3" + ], + [ + "BRKH_INT_NN6BEG0", + "NN6BEG0" + ], + [ + "BRKH_INT_NN6BEG1", + "NN6BEG1" + ], + [ + "BRKH_INT_NN6BEG2", + "NN6BEG2" + ], + [ + "BRKH_INT_NN6BEG3", + "NN6BEG3" + ], + [ + "BRKH_INT_NN6C0", + "NN6C0" + ], + [ + "BRKH_INT_NN6C1", + "NN6C1" + ], + [ + "BRKH_INT_NN6C2", + "NN6C2" + ], + [ + "BRKH_INT_NN6C3", + "NN6C3" + ], + [ + "BRKH_INT_NN6D0", + "NN6D0" + ], + [ + "BRKH_INT_NN6D1", + "NN6D1" + ], + [ + "BRKH_INT_NN6D2", + "NN6D2" + ], + [ + "BRKH_INT_NN6D3", + "NN6D3" + ], + [ + "BRKH_INT_NN6E0", + "NN6E0" + ], + [ + "BRKH_INT_NN6E1", + "NN6E1" + ], + [ + "BRKH_INT_NN6E2", + "NN6E2" + ], + [ + "BRKH_INT_NN6E3", + "NN6E3" + ], + [ + "BRKH_INT_NN6END_S1_0", + "NN6END_S1_0" + ], + [ + "BRKH_INT_NR1BEG0", + "NR1BEG0" + ], + [ + "BRKH_INT_NR1BEG1", + "NR1BEG1" + ], + [ + "BRKH_INT_NR1BEG2", + "NR1BEG2" + ], + [ + "BRKH_INT_NR1BEG3", + "NR1BEG3" + ], + [ + "BRKH_INT_NW2BEG0", + "NW2BEG0" + ], + [ + "BRKH_INT_NW2BEG1", + "NW2BEG1" + ], + [ + "BRKH_INT_NW2BEG2", + "NW2BEG2" + ], + [ + "BRKH_INT_NW2BEG3", + "NW2BEG3" + ], + [ + "BRKH_INT_NW2END_S0_0", + "NW2END_S0_0" + ], + [ + "BRKH_INT_NW6A0", + "NW6A0" + ], + [ + "BRKH_INT_NW6A1", + "NW6A1" + ], + [ + "BRKH_INT_NW6A2", + "NW6A2" + ], + [ + "BRKH_INT_NW6A3", + "NW6A3" + ], + [ + "BRKH_INT_NW6B0", + "NW6B0" + ], + [ + "BRKH_INT_NW6B1", + "NW6B1" + ], + [ + "BRKH_INT_NW6B2", + "NW6B2" + ], + [ + "BRKH_INT_NW6B3", + "NW6B3" + ], + [ + "BRKH_INT_NW6C0", + "NW6C0" + ], + [ + "BRKH_INT_NW6C1", + "NW6C1" + ], + [ + "BRKH_INT_NW6C2", + "NW6C2" + ], + [ + "BRKH_INT_NW6C3", + "NW6C3" + ], + [ + "BRKH_INT_NW6D0", + "NW6D0" + ], + [ + "BRKH_INT_NW6D1", + "NW6D1" + ], + [ + "BRKH_INT_NW6D2", + "NW6D2" + ], + [ + "BRKH_INT_NW6D3", + "NW6D3" + ], + [ + "BRKH_INT_NW6END_S0_0", + "NW6END_S0_0" + ], + [ + "BRKH_INT_SE2A0", + "SE2A0" + ], + [ + "BRKH_INT_SE2A1", + "SE2A1" + ], + [ + "BRKH_INT_SE2A2", + "SE2A2" + ], + [ + "BRKH_INT_SE2A3", + "SE2A3" + ], + [ + "BRKH_INT_SE6B0", + "SE6B0" + ], + [ + "BRKH_INT_SE6B1", + "SE6B1" + ], + [ + "BRKH_INT_SE6B2", + "SE6B2" + ], + [ + "BRKH_INT_SE6B3", + "SE6B3" + ], + [ + "BRKH_INT_SE6C0", + "SE6C0" + ], + [ + "BRKH_INT_SE6C1", + "SE6C1" + ], + [ + "BRKH_INT_SE6C2", + "SE6C2" + ], + [ + "BRKH_INT_SE6C3", + "SE6C3" + ], + [ + "BRKH_INT_SE6D0", + "SE6D0" + ], + [ + "BRKH_INT_SE6D1", + "SE6D1" + ], + [ + "BRKH_INT_SE6D2", + "SE6D2" + ], + [ + "BRKH_INT_SE6D3", + "SE6D3" + ], + [ + "BRKH_INT_SE6E0", + "SE6E0" + ], + [ + "BRKH_INT_SE6E1", + "SE6E1" + ], + [ + "BRKH_INT_SE6E2", + "SE6E2" + ], + [ + "BRKH_INT_SE6E3", + "SE6E3" + ], + [ + "BRKH_INT_SL1END0", + "SL1END0" + ], + [ + "BRKH_INT_SL1END1", + "SL1END1" + ], + [ + "BRKH_INT_SL1END2", + "SL1END2" + ], + [ + "BRKH_INT_SL1END3", + "SL1END3" + ], + [ + "BRKH_INT_SR1END1", + "SR1END1" + ], + [ + "BRKH_INT_SR1END2", + "SR1END2" + ], + [ + "BRKH_INT_SR1END3", + "SR1END3" + ], + [ + "BRKH_INT_SR1END_N3_3", + "SR1END3" + ], + [ + "BRKH_INT_SS2A0", + "SS2A0" + ], + [ + "BRKH_INT_SS2A1", + "SS2A1" + ], + [ + "BRKH_INT_SS2A2", + "SS2A2" + ], + [ + "BRKH_INT_SS2A3", + "SS2A3" + ], + [ + "BRKH_INT_SS2END0", + "SS2END0" + ], + [ + "BRKH_INT_SS2END1", + "SS2END1" + ], + [ + "BRKH_INT_SS2END2", + "SS2END2" + ], + [ + "BRKH_INT_SS2END3", + "SS2END3" + ], + [ + "BRKH_INT_SS2END_N0_3", + "SS2END3" + ], + [ + "BRKH_INT_SS6A0", + "SS6A0" + ], + [ + "BRKH_INT_SS6A1", + "SS6A1" + ], + [ + "BRKH_INT_SS6A2", + "SS6A2" + ], + [ + "BRKH_INT_SS6A3", + "SS6A3" + ], + [ + "BRKH_INT_SS6B0", + "SS6B0" + ], + [ + "BRKH_INT_SS6B1", + "SS6B1" + ], + [ + "BRKH_INT_SS6B2", + "SS6B2" + ], + [ + "BRKH_INT_SS6B3", + "SS6B3" + ], + [ + "BRKH_INT_SS6C0", + "SS6C0" + ], + [ + "BRKH_INT_SS6C1", + "SS6C1" + ], + [ + "BRKH_INT_SS6C2", + "SS6C2" + ], + [ + "BRKH_INT_SS6C3", + "SS6C3" + ], + [ + "BRKH_INT_SS6D0", + "SS6D0" + ], + [ + "BRKH_INT_SS6D1", + "SS6D1" + ], + [ + "BRKH_INT_SS6D2", + "SS6D2" + ], + [ + "BRKH_INT_SS6D3", + "SS6D3" + ], + [ + "BRKH_INT_SS6E0", + "SS6E0" + ], + [ + "BRKH_INT_SS6E1", + "SS6E1" + ], + [ + "BRKH_INT_SS6E2", + "SS6E2" + ], + [ + "BRKH_INT_SS6E3", + "SS6E3" + ], + [ + "BRKH_INT_SS6END0", + "SS6END0" + ], + [ + "BRKH_INT_SS6END1", + "SS6END1" + ], + [ + "BRKH_INT_SS6END2", + "SS6END2" + ], + [ + "BRKH_INT_SS6END3", + "SS6END3" + ], + [ + "BRKH_INT_SS6END_N0_3", + "SS6END3" + ], + [ + "BRKH_INT_SW2A0", + "SW2A0" + ], + [ + "BRKH_INT_SW2A1", + "SW2A1" + ], + [ + "BRKH_INT_SW2A2", + "SW2A2" + ], + [ + "BRKH_INT_SW2A3", + "SW2A3" + ], + [ + "BRKH_INT_SW2END3", + "SW2END3" + ], + [ + "BRKH_INT_SW6B0", + "SW6B0" + ], + [ + "BRKH_INT_SW6B1", + "SW6B1" + ], + [ + "BRKH_INT_SW6B2", + "SW6B2" + ], + [ + "BRKH_INT_SW6B3", + "SW6B3" + ], + [ + "BRKH_INT_SW6C0", + "SW6C0" + ], + [ + "BRKH_INT_SW6C1", + "SW6C1" + ], + [ + "BRKH_INT_SW6C2", + "SW6C2" + ], + [ + "BRKH_INT_SW6C3", + "SW6C3" + ], + [ + "BRKH_INT_SW6D0", + "SW6D0" + ], + [ + "BRKH_INT_SW6D1", + "SW6D1" + ], + [ + "BRKH_INT_SW6D2", + "SW6D2" + ], + [ + "BRKH_INT_SW6D3", + "SW6D3" + ], + [ + "BRKH_INT_SW6E0", + "SW6E0" + ], + [ + "BRKH_INT_SW6E1", + "SW6E1" + ], + [ + "BRKH_INT_SW6E2", + "SW6E2" + ], + [ + "BRKH_INT_SW6E3", + "SW6E3" + ], + [ + "BRKH_INT_SW6END3", + "SW6END3" + ], + [ + "BRKH_INT_WL1BEG3", + "WL1BEG3" + ], + [ + "BRKH_INT_WL1END3", + "WL1END3" + ], + [ + "BRKH_INT_WR1BEG_S0", + "WR1BEG_S0" + ], + [ + "BRKH_INT_WR1END_S1_0", + "WR1END_S1_0" + ], + [ + "BRKH_INT_WW2END3", + "WW2END3" + ], + [ + "BRKH_INT_WW4END_S0_0", + "WW4END_S0_0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "BRKH_INT", + "INT_R" + ], + "wire_pairs": [ + [ + "BRKH_INT_BYP_BOUNCE2", + "BYP_BOUNCE_N3_2" + ], + [ + "BRKH_INT_BYP_BOUNCE3", + "BYP_BOUNCE_N3_3" + ], + [ + "BRKH_INT_BYP_BOUNCE6", + "BYP_BOUNCE_N3_6" + ], + [ + "BRKH_INT_BYP_BOUNCE7", + "BYP_BOUNCE_N3_7" + ], + [ + "BRKH_INT_EL1BEG3", + "EL1BEG_N3" + ], + [ + "BRKH_INT_EL1END_S3_0", + "EL1END0" + ], + [ + "BRKH_INT_ER1BEG_S0", + "ER1BEG0" + ], + [ + "BRKH_INT_ER1END3", + "ER1END_N3_3" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_0", + "FAN_BOUNCE0" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_2", + "FAN_BOUNCE2" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_4", + "FAN_BOUNCE4" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_6", + "FAN_BOUNCE6" + ], + [ + "BRKH_INT_LV0", + "LV1" + ], + [ + "BRKH_INT_LV1", + "LV2" + ], + [ + "BRKH_INT_LV2", + "LV3" + ], + [ + "BRKH_INT_LV3", + "LV4" + ], + [ + "BRKH_INT_LV4", + "LV5" + ], + [ + "BRKH_INT_LV5", + "LV6" + ], + [ + "BRKH_INT_LV6", + "LV7" + ], + [ + "BRKH_INT_LV7", + "LV8" + ], + [ + "BRKH_INT_LV8", + "LV9" + ], + [ + "BRKH_INT_LV9", + "LV10" + ], + [ + "BRKH_INT_LV10", + "LV11" + ], + [ + "BRKH_INT_LV11", + "LV12" + ], + [ + "BRKH_INT_LV12", + "LV13" + ], + [ + "BRKH_INT_LV13", + "LV14" + ], + [ + "BRKH_INT_LV14", + "LV15" + ], + [ + "BRKH_INT_LV15", + "LV16" + ], + [ + "BRKH_INT_LV16", + "LV17" + ], + [ + "BRKH_INT_LV17", + "LV18" + ], + [ + "BRKH_INT_LVB1", + "LVB1" + ], + [ + "BRKH_INT_LVB2", + "LVB2" + ], + [ + "BRKH_INT_LVB3", + "LVB3" + ], + [ + "BRKH_INT_LVB4", + "LVB4" + ], + [ + "BRKH_INT_LVB5", + "LVB5" + ], + [ + "BRKH_INT_LVB6", + "LVB6" + ], + [ + "BRKH_INT_LVB7", + "LVB7" + ], + [ + "BRKH_INT_LVB8", + "LVB8" + ], + [ + "BRKH_INT_LVB9", + "LVB9" + ], + [ + "BRKH_INT_LVB10", + "LVB10" + ], + [ + "BRKH_INT_LVB11", + "LVB11" + ], + [ + "BRKH_INT_LVB12", + "LVB12" + ], + [ + "BRKH_INT_NE2BEG0", + "NE2A0" + ], + [ + "BRKH_INT_NE2BEG1", + "NE2A1" + ], + [ + "BRKH_INT_NE2BEG2", + "NE2A2" + ], + [ + "BRKH_INT_NE2BEG3", + "NE2A3" + ], + [ + "BRKH_INT_NE2END_S3_0", + "NE2END0" + ], + [ + "BRKH_INT_NE6A0", + "NE6B0" + ], + [ + "BRKH_INT_NE6A1", + "NE6B1" + ], + [ + "BRKH_INT_NE6A2", + "NE6B2" + ], + [ + "BRKH_INT_NE6A3", + "NE6B3" + ], + [ + "BRKH_INT_NE6B0", + "NE6C0" + ], + [ + "BRKH_INT_NE6B1", + "NE6C1" + ], + [ + "BRKH_INT_NE6B2", + "NE6C2" + ], + [ + "BRKH_INT_NE6B3", + "NE6C3" + ], + [ + "BRKH_INT_NE6C0", + "NE6D0" + ], + [ + "BRKH_INT_NE6C1", + "NE6D1" + ], + [ + "BRKH_INT_NE6C2", + "NE6D2" + ], + [ + "BRKH_INT_NE6C3", + "NE6D3" + ], + [ + "BRKH_INT_NE6D0", + "NE6E0" + ], + [ + "BRKH_INT_NE6D1", + "NE6E1" + ], + [ + "BRKH_INT_NE6D2", + "NE6E2" + ], + [ + "BRKH_INT_NE6D3", + "NE6E3" + ], + [ + "BRKH_INT_NL1BEG0_SLOW", + "NL1END0" + ], + [ + "BRKH_INT_NL1BEG1_SLOW", + "NL1END1" + ], + [ + "BRKH_INT_NL1BEG2_SLOW", + "NL1END2" + ], + [ + "BRKH_INT_NL1END_S3_0", + "NL1END0" + ], + [ + "BRKH_INT_NN2A0", + "NN2END0" + ], + [ + "BRKH_INT_NN2A1", + "NN2END1" + ], + [ + "BRKH_INT_NN2A2", + "NN2END2" + ], + [ + "BRKH_INT_NN2A3", + "NN2END3" + ], + [ + "BRKH_INT_NN2BEG0", + "NN2A0" + ], + [ + "BRKH_INT_NN2BEG1", + "NN2A1" + ], + [ + "BRKH_INT_NN2BEG2", + "NN2A2" + ], + [ + "BRKH_INT_NN2BEG3", + "NN2A3" + ], + [ + "BRKH_INT_NN2END_S2_0", + "NN2END0" + ], + [ + "BRKH_INT_NN6A0", + "NN6B0" + ], + [ + "BRKH_INT_NN6A1", + "NN6B1" + ], + [ + "BRKH_INT_NN6A2", + "NN6B2" + ], + [ + "BRKH_INT_NN6A3", + "NN6B3" + ], + [ + "BRKH_INT_NN6B0", + "NN6C0" + ], + [ + "BRKH_INT_NN6B1", + "NN6C1" + ], + [ + "BRKH_INT_NN6B2", + "NN6C2" + ], + [ + "BRKH_INT_NN6B3", + "NN6C3" + ], + [ + "BRKH_INT_NN6BEG0", + "NN6A0" + ], + [ + "BRKH_INT_NN6BEG1", + "NN6A1" + ], + [ + "BRKH_INT_NN6BEG2", + "NN6A2" + ], + [ + "BRKH_INT_NN6BEG3", + "NN6A3" + ], + [ + "BRKH_INT_NN6C0", + "NN6D0" + ], + [ + "BRKH_INT_NN6C1", + "NN6D1" + ], + [ + "BRKH_INT_NN6C2", + "NN6D2" + ], + [ + "BRKH_INT_NN6C3", + "NN6D3" + ], + [ + "BRKH_INT_NN6D0", + "NN6E0" + ], + [ + "BRKH_INT_NN6D1", + "NN6E1" + ], + [ + "BRKH_INT_NN6D2", + "NN6E2" + ], + [ + "BRKH_INT_NN6D3", + "NN6E3" + ], + [ + "BRKH_INT_NN6E0", + "NN6END0" + ], + [ + "BRKH_INT_NN6E1", + "NN6END1" + ], + [ + "BRKH_INT_NN6E2", + "NN6END2" + ], + [ + "BRKH_INT_NN6E3", + "NN6END3" + ], + [ + "BRKH_INT_NN6END_S1_0", + "NN6END0" + ], + [ + "BRKH_INT_NR1BEG0_SLOW", + "NR1END0" + ], + [ + "BRKH_INT_NR1BEG1_SLOW", + "NR1END1" + ], + [ + "BRKH_INT_NR1BEG2_SLOW", + "NR1END2" + ], + [ + "BRKH_INT_NR1BEG3_SLOW", + "NR1END3" + ], + [ + "BRKH_INT_NW2BEG0", + "NW2A0" + ], + [ + "BRKH_INT_NW2BEG1", + "NW2A1" + ], + [ + "BRKH_INT_NW2BEG2", + "NW2A2" + ], + [ + "BRKH_INT_NW2BEG3", + "NW2A3" + ], + [ + "BRKH_INT_NW2END_S0_0", + "NW2END0" + ], + [ + "BRKH_INT_NW6A0", + "NW6B0" + ], + [ + "BRKH_INT_NW6A1", + "NW6B1" + ], + [ + "BRKH_INT_NW6A2", + "NW6B2" + ], + [ + "BRKH_INT_NW6A3", + "NW6B3" + ], + [ + "BRKH_INT_NW6B0", + "NW6C0" + ], + [ + "BRKH_INT_NW6B1", + "NW6C1" + ], + [ + "BRKH_INT_NW6B2", + "NW6C2" + ], + [ + "BRKH_INT_NW6B3", + "NW6C3" + ], + [ + "BRKH_INT_NW6C0", + "NW6D0" + ], + [ + "BRKH_INT_NW6C1", + "NW6D1" + ], + [ + "BRKH_INT_NW6C2", + "NW6D2" + ], + [ + "BRKH_INT_NW6C3", + "NW6D3" + ], + [ + "BRKH_INT_NW6D0", + "NW6E0" + ], + [ + "BRKH_INT_NW6D1", + "NW6E1" + ], + [ + "BRKH_INT_NW6D2", + "NW6E2" + ], + [ + "BRKH_INT_NW6D3", + "NW6E3" + ], + [ + "BRKH_INT_NW6END_S0_0", + "NW6END0" + ], + [ + "BRKH_INT_SE2A0", + "SE2BEG0" + ], + [ + "BRKH_INT_SE2A1", + "SE2BEG1" + ], + [ + "BRKH_INT_SE2A2", + "SE2BEG2" + ], + [ + "BRKH_INT_SE2A3", + "SE2BEG3" + ], + [ + "BRKH_INT_SE6B0", + "SE6A0" + ], + [ + "BRKH_INT_SE6B1", + "SE6A1" + ], + [ + "BRKH_INT_SE6B2", + "SE6A2" + ], + [ + "BRKH_INT_SE6B3", + "SE6A3" + ], + [ + "BRKH_INT_SE6C0", + "SE6B0" + ], + [ + "BRKH_INT_SE6C1", + "SE6B1" + ], + [ + "BRKH_INT_SE6C2", + "SE6B2" + ], + [ + "BRKH_INT_SE6C3", + "SE6B3" + ], + [ + "BRKH_INT_SE6D0", + "SE6C0" + ], + [ + "BRKH_INT_SE6D1", + "SE6C1" + ], + [ + "BRKH_INT_SE6D2", + "SE6C2" + ], + [ + "BRKH_INT_SE6D3", + "SE6C3" + ], + [ + "BRKH_INT_SE6E0", + "SE6D0" + ], + [ + "BRKH_INT_SE6E1", + "SE6D1" + ], + [ + "BRKH_INT_SE6E2", + "SE6D2" + ], + [ + "BRKH_INT_SE6E3", + "SE6D3" + ], + [ + "BRKH_INT_SL1END0_SLOW", + "SL1BEG0" + ], + [ + "BRKH_INT_SL1END1_SLOW", + "SL1BEG1" + ], + [ + "BRKH_INT_SL1END2_SLOW", + "SL1BEG2" + ], + [ + "BRKH_INT_SL1END3_SLOW", + "SL1BEG3" + ], + [ + "BRKH_INT_SR1END1_SLOW", + "SR1BEG1" + ], + [ + "BRKH_INT_SR1END2_SLOW", + "SR1BEG2" + ], + [ + "BRKH_INT_SR1END3_SLOW", + "SR1BEG3" + ], + [ + "BRKH_INT_SR1END_N3_3", + "SR1END_N3_3" + ], + [ + "BRKH_INT_SS2A0", + "SS2BEG0" + ], + [ + "BRKH_INT_SS2A1", + "SS2BEG1" + ], + [ + "BRKH_INT_SS2A2", + "SS2BEG2" + ], + [ + "BRKH_INT_SS2A3", + "SS2BEG3" + ], + [ + "BRKH_INT_SS2END0", + "SS2A0" + ], + [ + "BRKH_INT_SS2END1", + "SS2A1" + ], + [ + "BRKH_INT_SS2END2", + "SS2A2" + ], + [ + "BRKH_INT_SS2END3", + "SS2A3" + ], + [ + "BRKH_INT_SS2END_N0_3", + "SS2END_N0_3" + ], + [ + "BRKH_INT_SS6A0", + "SS6BEG0" + ], + [ + "BRKH_INT_SS6A1", + "SS6BEG1" + ], + [ + "BRKH_INT_SS6A2", + "SS6BEG2" + ], + [ + "BRKH_INT_SS6A3", + "SS6BEG3" + ], + [ + "BRKH_INT_SS6B0", + "SS6A0" + ], + [ + "BRKH_INT_SS6B1", + "SS6A1" + ], + [ + "BRKH_INT_SS6B2", + "SS6A2" + ], + [ + "BRKH_INT_SS6B3", + "SS6A3" + ], + [ + "BRKH_INT_SS6C0", + "SS6B0" + ], + [ + "BRKH_INT_SS6C1", + "SS6B1" + ], + [ + "BRKH_INT_SS6C2", + "SS6B2" + ], + [ + "BRKH_INT_SS6C3", + "SS6B3" + ], + [ + "BRKH_INT_SS6D0", + "SS6C0" + ], + [ + "BRKH_INT_SS6D1", + "SS6C1" + ], + [ + "BRKH_INT_SS6D2", + "SS6C2" + ], + [ + "BRKH_INT_SS6D3", + "SS6C3" + ], + [ + "BRKH_INT_SS6E0", + "SS6D0" + ], + [ + "BRKH_INT_SS6E1", + "SS6D1" + ], + [ + "BRKH_INT_SS6E2", + "SS6D2" + ], + [ + "BRKH_INT_SS6E3", + "SS6D3" + ], + [ + "BRKH_INT_SS6END0", + "SS6E0" + ], + [ + "BRKH_INT_SS6END1", + "SS6E1" + ], + [ + "BRKH_INT_SS6END2", + "SS6E2" + ], + [ + "BRKH_INT_SS6END3", + "SS6E3" + ], + [ + "BRKH_INT_SS6END_N0_3", + "SS6END_N0_3" + ], + [ + "BRKH_INT_SW2A0", + "SW2BEG0" + ], + [ + "BRKH_INT_SW2A1", + "SW2BEG1" + ], + [ + "BRKH_INT_SW2A2", + "SW2BEG2" + ], + [ + "BRKH_INT_SW2A3", + "SW2BEG3" + ], + [ + "BRKH_INT_SW2END3", + "SW2END_N0_3" + ], + [ + "BRKH_INT_SW6B0", + "SW6A0" + ], + [ + "BRKH_INT_SW6B1", + "SW6A1" + ], + [ + "BRKH_INT_SW6B2", + "SW6A2" + ], + [ + "BRKH_INT_SW6B3", + "SW6A3" + ], + [ + "BRKH_INT_SW6C0", + "SW6B0" + ], + [ + "BRKH_INT_SW6C1", + "SW6B1" + ], + [ + "BRKH_INT_SW6C2", + "SW6B2" + ], + [ + "BRKH_INT_SW6C3", + "SW6B3" + ], + [ + "BRKH_INT_SW6D0", + "SW6C0" + ], + [ + "BRKH_INT_SW6D1", + "SW6C1" + ], + [ + "BRKH_INT_SW6D2", + "SW6C2" + ], + [ + "BRKH_INT_SW6D3", + "SW6C3" + ], + [ + "BRKH_INT_SW6E0", + "SW6D0" + ], + [ + "BRKH_INT_SW6E1", + "SW6D1" + ], + [ + "BRKH_INT_SW6E2", + "SW6D2" + ], + [ + "BRKH_INT_SW6E3", + "SW6D3" + ], + [ + "BRKH_INT_SW6END3", + "SW6END_N0_3" + ], + [ + "BRKH_INT_WL1BEG3", + "WL1BEG_N3" + ], + [ + "BRKH_INT_WL1END3", + "WL1END_N1_3" + ], + [ + "BRKH_INT_WR1BEG_S0", + "WR1BEG0" + ], + [ + "BRKH_INT_WR1END_S1_0", + "WR1END0" + ], + [ + "BRKH_INT_WW2END3", + "WW2END_N0_3" + ], + [ + "BRKH_INT_WW4END_S0_0", + "WW4END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_INT", + "INT_R" + ], + "wire_pairs": [ + [ + "BRKH_INT_BYP_BOUNCE2", + "BYP_BOUNCE2" + ], + [ + "BRKH_INT_BYP_BOUNCE3", + "BYP_BOUNCE3" + ], + [ + "BRKH_INT_BYP_BOUNCE6", + "BYP_BOUNCE6" + ], + [ + "BRKH_INT_BYP_BOUNCE7", + "BYP_BOUNCE7" + ], + [ + "BRKH_INT_EL1BEG3", + "EL1BEG3" + ], + [ + "BRKH_INT_EL1END_S3_0", + "EL1END_S3_0" + ], + [ + "BRKH_INT_ER1BEG_S0", + "ER1BEG_S0" + ], + [ + "BRKH_INT_ER1END3", + "ER1END3" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_0", + "FAN_BOUNCE_S3_0" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_2", + "FAN_BOUNCE_S3_2" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_4", + "FAN_BOUNCE_S3_4" + ], + [ + "BRKH_INT_FAN_BOUNCE_S3_6", + "FAN_BOUNCE_S3_6" + ], + [ + "BRKH_INT_LV0", + "LV0" + ], + [ + "BRKH_INT_LV1", + "LV1" + ], + [ + "BRKH_INT_LV2", + "LV2" + ], + [ + "BRKH_INT_LV3", + "LV3" + ], + [ + "BRKH_INT_LV4", + "LV4" + ], + [ + "BRKH_INT_LV5", + "LV5" + ], + [ + "BRKH_INT_LV6", + "LV6" + ], + [ + "BRKH_INT_LV7", + "LV7" + ], + [ + "BRKH_INT_LV8", + "LV8" + ], + [ + "BRKH_INT_LV9", + "LV9" + ], + [ + "BRKH_INT_LV10", + "LV10" + ], + [ + "BRKH_INT_LV11", + "LV11" + ], + [ + "BRKH_INT_LV12", + "LV12" + ], + [ + "BRKH_INT_LV13", + "LV13" + ], + [ + "BRKH_INT_LV14", + "LV14" + ], + [ + "BRKH_INT_LV15", + "LV15" + ], + [ + "BRKH_INT_LV16", + "LV16" + ], + [ + "BRKH_INT_LV17", + "LV17" + ], + [ + "BRKH_INT_LVB1", + "LVB0" + ], + [ + "BRKH_INT_LVB2", + "LVB1" + ], + [ + "BRKH_INT_LVB3", + "LVB2" + ], + [ + "BRKH_INT_LVB4", + "LVB3" + ], + [ + "BRKH_INT_LVB5", + "LVB4" + ], + [ + "BRKH_INT_LVB6", + "LVB5" + ], + [ + "BRKH_INT_LVB7", + "LVB6" + ], + [ + "BRKH_INT_LVB8", + "LVB7" + ], + [ + "BRKH_INT_LVB9", + "LVB8" + ], + [ + "BRKH_INT_LVB10", + "LVB9" + ], + [ + "BRKH_INT_LVB11", + "LVB10" + ], + [ + "BRKH_INT_LVB12", + "LVB11" + ], + [ + "BRKH_INT_NE2BEG0", + "NE2BEG0" + ], + [ + "BRKH_INT_NE2BEG1", + "NE2BEG1" + ], + [ + "BRKH_INT_NE2BEG2", + "NE2BEG2" + ], + [ + "BRKH_INT_NE2BEG3", + "NE2BEG3" + ], + [ + "BRKH_INT_NE2END_S3_0", + "NE2END_S3_0" + ], + [ + "BRKH_INT_NE6A0", + "NE6A0" + ], + [ + "BRKH_INT_NE6A1", + "NE6A1" + ], + [ + "BRKH_INT_NE6A2", + "NE6A2" + ], + [ + "BRKH_INT_NE6A3", + "NE6A3" + ], + [ + "BRKH_INT_NE6B0", + "NE6B0" + ], + [ + "BRKH_INT_NE6B1", + "NE6B1" + ], + [ + "BRKH_INT_NE6B2", + "NE6B2" + ], + [ + "BRKH_INT_NE6B3", + "NE6B3" + ], + [ + "BRKH_INT_NE6C0", + "NE6C0" + ], + [ + "BRKH_INT_NE6C1", + "NE6C1" + ], + [ + "BRKH_INT_NE6C2", + "NE6C2" + ], + [ + "BRKH_INT_NE6C3", + "NE6C3" + ], + [ + "BRKH_INT_NE6D0", + "NE6D0" + ], + [ + "BRKH_INT_NE6D1", + "NE6D1" + ], + [ + "BRKH_INT_NE6D2", + "NE6D2" + ], + [ + "BRKH_INT_NE6D3", + "NE6D3" + ], + [ + "BRKH_INT_NL1BEG0", + "NL1BEG0" + ], + [ + "BRKH_INT_NL1BEG1", + "NL1BEG1" + ], + [ + "BRKH_INT_NL1BEG2", + "NL1BEG2" + ], + [ + "BRKH_INT_NL1END_S3_0", + "NL1END_S3_0" + ], + [ + "BRKH_INT_NN2A0", + "NN2A0" + ], + [ + "BRKH_INT_NN2A1", + "NN2A1" + ], + [ + "BRKH_INT_NN2A2", + "NN2A2" + ], + [ + "BRKH_INT_NN2A3", + "NN2A3" + ], + [ + "BRKH_INT_NN2BEG0", + "NN2BEG0" + ], + [ + "BRKH_INT_NN2BEG1", + "NN2BEG1" + ], + [ + "BRKH_INT_NN2BEG2", + "NN2BEG2" + ], + [ + "BRKH_INT_NN2BEG3", + "NN2BEG3" + ], + [ + "BRKH_INT_NN2END_S2_0", + "NN2END_S2_0" + ], + [ + "BRKH_INT_NN6A0", + "NN6A0" + ], + [ + "BRKH_INT_NN6A1", + "NN6A1" + ], + [ + "BRKH_INT_NN6A2", + "NN6A2" + ], + [ + "BRKH_INT_NN6A3", + "NN6A3" + ], + [ + "BRKH_INT_NN6B0", + "NN6B0" + ], + [ + "BRKH_INT_NN6B1", + "NN6B1" + ], + [ + "BRKH_INT_NN6B2", + "NN6B2" + ], + [ + "BRKH_INT_NN6B3", + "NN6B3" + ], + [ + "BRKH_INT_NN6BEG0", + "NN6BEG0" + ], + [ + "BRKH_INT_NN6BEG1", + "NN6BEG1" + ], + [ + "BRKH_INT_NN6BEG2", + "NN6BEG2" + ], + [ + "BRKH_INT_NN6BEG3", + "NN6BEG3" + ], + [ + "BRKH_INT_NN6C0", + "NN6C0" + ], + [ + "BRKH_INT_NN6C1", + "NN6C1" + ], + [ + "BRKH_INT_NN6C2", + "NN6C2" + ], + [ + "BRKH_INT_NN6C3", + "NN6C3" + ], + [ + "BRKH_INT_NN6D0", + "NN6D0" + ], + [ + "BRKH_INT_NN6D1", + "NN6D1" + ], + [ + "BRKH_INT_NN6D2", + "NN6D2" + ], + [ + "BRKH_INT_NN6D3", + "NN6D3" + ], + [ + "BRKH_INT_NN6E0", + "NN6E0" + ], + [ + "BRKH_INT_NN6E1", + "NN6E1" + ], + [ + "BRKH_INT_NN6E2", + "NN6E2" + ], + [ + "BRKH_INT_NN6E3", + "NN6E3" + ], + [ + "BRKH_INT_NN6END_S1_0", + "NN6END_S1_0" + ], + [ + "BRKH_INT_NR1BEG0", + "NR1BEG0" + ], + [ + "BRKH_INT_NR1BEG1", + "NR1BEG1" + ], + [ + "BRKH_INT_NR1BEG2", + "NR1BEG2" + ], + [ + "BRKH_INT_NR1BEG3", + "NR1BEG3" + ], + [ + "BRKH_INT_NW2BEG0", + "NW2BEG0" + ], + [ + "BRKH_INT_NW2BEG1", + "NW2BEG1" + ], + [ + "BRKH_INT_NW2BEG2", + "NW2BEG2" + ], + [ + "BRKH_INT_NW2BEG3", + "NW2BEG3" + ], + [ + "BRKH_INT_NW2END_S0_0", + "NW2END_S0_0" + ], + [ + "BRKH_INT_NW6A0", + "NW6A0" + ], + [ + "BRKH_INT_NW6A1", + "NW6A1" + ], + [ + "BRKH_INT_NW6A2", + "NW6A2" + ], + [ + "BRKH_INT_NW6A3", + "NW6A3" + ], + [ + "BRKH_INT_NW6B0", + "NW6B0" + ], + [ + "BRKH_INT_NW6B1", + "NW6B1" + ], + [ + "BRKH_INT_NW6B2", + "NW6B2" + ], + [ + "BRKH_INT_NW6B3", + "NW6B3" + ], + [ + "BRKH_INT_NW6C0", + "NW6C0" + ], + [ + "BRKH_INT_NW6C1", + "NW6C1" + ], + [ + "BRKH_INT_NW6C2", + "NW6C2" + ], + [ + "BRKH_INT_NW6C3", + "NW6C3" + ], + [ + "BRKH_INT_NW6D0", + "NW6D0" + ], + [ + "BRKH_INT_NW6D1", + "NW6D1" + ], + [ + "BRKH_INT_NW6D2", + "NW6D2" + ], + [ + "BRKH_INT_NW6D3", + "NW6D3" + ], + [ + "BRKH_INT_NW6END_S0_0", + "NW6END_S0_0" + ], + [ + "BRKH_INT_SE2A0", + "SE2A0" + ], + [ + "BRKH_INT_SE2A1", + "SE2A1" + ], + [ + "BRKH_INT_SE2A2", + "SE2A2" + ], + [ + "BRKH_INT_SE2A3", + "SE2A3" + ], + [ + "BRKH_INT_SE6B0", + "SE6B0" + ], + [ + "BRKH_INT_SE6B1", + "SE6B1" + ], + [ + "BRKH_INT_SE6B2", + "SE6B2" + ], + [ + "BRKH_INT_SE6B3", + "SE6B3" + ], + [ + "BRKH_INT_SE6C0", + "SE6C0" + ], + [ + "BRKH_INT_SE6C1", + "SE6C1" + ], + [ + "BRKH_INT_SE6C2", + "SE6C2" + ], + [ + "BRKH_INT_SE6C3", + "SE6C3" + ], + [ + "BRKH_INT_SE6D0", + "SE6D0" + ], + [ + "BRKH_INT_SE6D1", + "SE6D1" + ], + [ + "BRKH_INT_SE6D2", + "SE6D2" + ], + [ + "BRKH_INT_SE6D3", + "SE6D3" + ], + [ + "BRKH_INT_SE6E0", + "SE6E0" + ], + [ + "BRKH_INT_SE6E1", + "SE6E1" + ], + [ + "BRKH_INT_SE6E2", + "SE6E2" + ], + [ + "BRKH_INT_SE6E3", + "SE6E3" + ], + [ + "BRKH_INT_SL1END0", + "SL1END0" + ], + [ + "BRKH_INT_SL1END1", + "SL1END1" + ], + [ + "BRKH_INT_SL1END2", + "SL1END2" + ], + [ + "BRKH_INT_SL1END3", + "SL1END3" + ], + [ + "BRKH_INT_SR1END1", + "SR1END1" + ], + [ + "BRKH_INT_SR1END2", + "SR1END2" + ], + [ + "BRKH_INT_SR1END3", + "SR1END3" + ], + [ + "BRKH_INT_SR1END_N3_3", + "SR1END3" + ], + [ + "BRKH_INT_SS2A0", + "SS2A0" + ], + [ + "BRKH_INT_SS2A1", + "SS2A1" + ], + [ + "BRKH_INT_SS2A2", + "SS2A2" + ], + [ + "BRKH_INT_SS2A3", + "SS2A3" + ], + [ + "BRKH_INT_SS2END0", + "SS2END0" + ], + [ + "BRKH_INT_SS2END1", + "SS2END1" + ], + [ + "BRKH_INT_SS2END2", + "SS2END2" + ], + [ + "BRKH_INT_SS2END3", + "SS2END3" + ], + [ + "BRKH_INT_SS2END_N0_3", + "SS2END3" + ], + [ + "BRKH_INT_SS6A0", + "SS6A0" + ], + [ + "BRKH_INT_SS6A1", + "SS6A1" + ], + [ + "BRKH_INT_SS6A2", + "SS6A2" + ], + [ + "BRKH_INT_SS6A3", + "SS6A3" + ], + [ + "BRKH_INT_SS6B0", + "SS6B0" + ], + [ + "BRKH_INT_SS6B1", + "SS6B1" + ], + [ + "BRKH_INT_SS6B2", + "SS6B2" + ], + [ + "BRKH_INT_SS6B3", + "SS6B3" + ], + [ + "BRKH_INT_SS6C0", + "SS6C0" + ], + [ + "BRKH_INT_SS6C1", + "SS6C1" + ], + [ + "BRKH_INT_SS6C2", + "SS6C2" + ], + [ + "BRKH_INT_SS6C3", + "SS6C3" + ], + [ + "BRKH_INT_SS6D0", + "SS6D0" + ], + [ + "BRKH_INT_SS6D1", + "SS6D1" + ], + [ + "BRKH_INT_SS6D2", + "SS6D2" + ], + [ + "BRKH_INT_SS6D3", + "SS6D3" + ], + [ + "BRKH_INT_SS6E0", + "SS6E0" + ], + [ + "BRKH_INT_SS6E1", + "SS6E1" + ], + [ + "BRKH_INT_SS6E2", + "SS6E2" + ], + [ + "BRKH_INT_SS6E3", + "SS6E3" + ], + [ + "BRKH_INT_SS6END0", + "SS6END0" + ], + [ + "BRKH_INT_SS6END1", + "SS6END1" + ], + [ + "BRKH_INT_SS6END2", + "SS6END2" + ], + [ + "BRKH_INT_SS6END3", + "SS6END3" + ], + [ + "BRKH_INT_SS6END_N0_3", + "SS6END3" + ], + [ + "BRKH_INT_SW2A0", + "SW2A0" + ], + [ + "BRKH_INT_SW2A1", + "SW2A1" + ], + [ + "BRKH_INT_SW2A2", + "SW2A2" + ], + [ + "BRKH_INT_SW2A3", + "SW2A3" + ], + [ + "BRKH_INT_SW2END3", + "SW2END3" + ], + [ + "BRKH_INT_SW6B0", + "SW6B0" + ], + [ + "BRKH_INT_SW6B1", + "SW6B1" + ], + [ + "BRKH_INT_SW6B2", + "SW6B2" + ], + [ + "BRKH_INT_SW6B3", + "SW6B3" + ], + [ + "BRKH_INT_SW6C0", + "SW6C0" + ], + [ + "BRKH_INT_SW6C1", + "SW6C1" + ], + [ + "BRKH_INT_SW6C2", + "SW6C2" + ], + [ + "BRKH_INT_SW6C3", + "SW6C3" + ], + [ + "BRKH_INT_SW6D0", + "SW6D0" + ], + [ + "BRKH_INT_SW6D1", + "SW6D1" + ], + [ + "BRKH_INT_SW6D2", + "SW6D2" + ], + [ + "BRKH_INT_SW6D3", + "SW6D3" + ], + [ + "BRKH_INT_SW6E0", + "SW6E0" + ], + [ + "BRKH_INT_SW6E1", + "SW6E1" + ], + [ + "BRKH_INT_SW6E2", + "SW6E2" + ], + [ + "BRKH_INT_SW6E3", + "SW6E3" + ], + [ + "BRKH_INT_SW6END3", + "SW6END3" + ], + [ + "BRKH_INT_WL1BEG3", + "WL1BEG3" + ], + [ + "BRKH_INT_WL1END3", + "WL1END3" + ], + [ + "BRKH_INT_WR1BEG_S0", + "WR1BEG_S0" + ], + [ + "BRKH_INT_WR1END_S1_0", + "WR1END_S1_0" + ], + [ + "BRKH_INT_WW2END3", + "WW2END3" + ], + [ + "BRKH_INT_WW4END_S0_0", + "WW4END_S0_0" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_TERM_INT", + "INT_L" + ], + "wire_pairs": [ + [ + "T_TERM_UTURN_INT_ER1BEG_S0", + "EL1BEG3" + ], + [ + "T_TERM_UTURN_INT_ER1BEG_S0", + "ER1BEG_S0" + ], + [ + "T_TERM_UTURN_INT_ER1END3", + "EL1END_S3_0" + ], + [ + "T_TERM_UTURN_INT_ER1END3", + "ER1END3" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0", + "BYP_BOUNCE7" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0", + "FAN_BOUNCE_S3_0" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2", + "BYP_BOUNCE3" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2", + "FAN_BOUNCE_S3_2" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4", + "BYP_BOUNCE6" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4", + "FAN_BOUNCE_S3_4" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6", + "BYP_BOUNCE2" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6", + "FAN_BOUNCE_S3_6" + ], + [ + "T_TERM_UTURN_INT_LVB_L0", + "LVB_L0" + ], + [ + "T_TERM_UTURN_INT_LVB_L0", + "LVB_L11" + ], + [ + "T_TERM_UTURN_INT_LVB_L1", + "LVB_L1" + ], + [ + "T_TERM_UTURN_INT_LVB_L1", + "LVB_L10" + ], + [ + "T_TERM_UTURN_INT_LVB_L2", + "LVB_L2" + ], + [ + "T_TERM_UTURN_INT_LVB_L2", + "LVB_L9" + ], + [ + "T_TERM_UTURN_INT_LVB_L3", + "LVB_L3" + ], + [ + "T_TERM_UTURN_INT_LVB_L3", + "LVB_L8" + ], + [ + "T_TERM_UTURN_INT_LVB_L4", + "LVB_L4" + ], + [ + "T_TERM_UTURN_INT_LVB_L4", + "LVB_L7" + ], + [ + "T_TERM_UTURN_INT_LVB_L5", + "LVB_L5" + ], + [ + "T_TERM_UTURN_INT_LVB_L5", + "LVB_L6" + ], + [ + "T_TERM_UTURN_INT_LV_L2", + "LV_L2" + ], + [ + "T_TERM_UTURN_INT_LV_L2", + "LV_L15" + ], + [ + "T_TERM_UTURN_INT_LV_L3", + "LV_L3" + ], + [ + "T_TERM_UTURN_INT_LV_L3", + "LV_L14" + ], + [ + "T_TERM_UTURN_INT_LV_L4", + "LV_L4" + ], + [ + "T_TERM_UTURN_INT_LV_L4", + "LV_L13" + ], + [ + "T_TERM_UTURN_INT_LV_L5", + "LV_L5" + ], + [ + "T_TERM_UTURN_INT_LV_L5", + "LV_L12" + ], + [ + "T_TERM_UTURN_INT_LV_L6", + "LV_L6" + ], + [ + "T_TERM_UTURN_INT_LV_L6", + "LV_L11" + ], + [ + "T_TERM_UTURN_INT_LV_L7", + "LV_L7" + ], + [ + "T_TERM_UTURN_INT_LV_L7", + "LV_L10" + ], + [ + "T_TERM_UTURN_INT_LV_L9", + "LV_L8" + ], + [ + "T_TERM_UTURN_INT_LV_L9", + "LV_L9" + ], + [ + "T_TERM_UTURN_INT_LV_L16", + "LV_L1" + ], + [ + "T_TERM_UTURN_INT_LV_L16", + "LV_L16" + ], + [ + "T_TERM_UTURN_INT_LV_L17", + "LV_L0" + ], + [ + "T_TERM_UTURN_INT_LV_L17", + "LV_L17" + ], + [ + "T_TERM_UTURN_INT_SE2A0", + "NE2BEG3" + ], + [ + "T_TERM_UTURN_INT_SE2A0", + "SE2A0" + ], + [ + "T_TERM_UTURN_INT_SE2A1", + "NE2BEG2" + ], + [ + "T_TERM_UTURN_INT_SE2A1", + "SE2A1" + ], + [ + "T_TERM_UTURN_INT_SE2A2", + "NE2BEG1" + ], + [ + "T_TERM_UTURN_INT_SE2A2", + "SE2A2" + ], + [ + "T_TERM_UTURN_INT_SE2A3", + "NE2BEG0" + ], + [ + "T_TERM_UTURN_INT_SE2A3", + "SE2A3" + ], + [ + "T_TERM_UTURN_INT_SE6B0", + "NE6A3" + ], + [ + "T_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "T_TERM_UTURN_INT_SE6B1", + "NE6A2" + ], + [ + "T_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "T_TERM_UTURN_INT_SE6B2", + "NE6A1" + ], + [ + "T_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "T_TERM_UTURN_INT_SE6B3", + "NE6A0" + ], + [ + "T_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "T_TERM_UTURN_INT_SE6C0", + "NE6B3" + ], + [ + "T_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "T_TERM_UTURN_INT_SE6C1", + "NE6B2" + ], + [ + "T_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "T_TERM_UTURN_INT_SE6C2", + "NE6B1" + ], + [ + "T_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "T_TERM_UTURN_INT_SE6C3", + "NE6B0" + ], + [ + "T_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "T_TERM_UTURN_INT_SE6D0", + "NE6C3" + ], + [ + "T_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "T_TERM_UTURN_INT_SE6D1", + "NE6C2" + ], + [ + "T_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "T_TERM_UTURN_INT_SE6D2", + "NE6C1" + ], + [ + "T_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "T_TERM_UTURN_INT_SE6D3", + "NE6C0" + ], + [ + "T_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "T_TERM_UTURN_INT_SE6E0", + "NE6D3" + ], + [ + "T_TERM_UTURN_INT_SE6E0", + "SE6E0" + ], + [ + "T_TERM_UTURN_INT_SE6E1", + "NE6D2" + ], + [ + "T_TERM_UTURN_INT_SE6E1", + "SE6E1" + ], + [ + "T_TERM_UTURN_INT_SE6E2", + "NE6D1" + ], + [ + "T_TERM_UTURN_INT_SE6E2", + "SE6E2" + ], + [ + "T_TERM_UTURN_INT_SE6E3", + "NE6D0" + ], + [ + "T_TERM_UTURN_INT_SE6E3", + "SE6E3" + ], + [ + "T_TERM_UTURN_INT_SL1END0_SLOW", + "NR1BEG3" + ], + [ + "T_TERM_UTURN_INT_SL1END0_SLOW", + "SL1END0" + ], + [ + "T_TERM_UTURN_INT_SL1END1_SLOW", + "NR1BEG2" + ], + [ + "T_TERM_UTURN_INT_SL1END1_SLOW", + "SL1END1" + ], + [ + "T_TERM_UTURN_INT_SL1END2_SLOW", + "NR1BEG1" + ], + [ + "T_TERM_UTURN_INT_SL1END2_SLOW", + "SL1END2" + ], + [ + "T_TERM_UTURN_INT_SL1END3_SLOW", + "NR1BEG0" + ], + [ + "T_TERM_UTURN_INT_SL1END3_SLOW", + "SL1END3" + ], + [ + "T_TERM_UTURN_INT_SR1END1_SLOW", + "NL1BEG2" + ], + [ + "T_TERM_UTURN_INT_SR1END1_SLOW", + "SR1END1" + ], + [ + "T_TERM_UTURN_INT_SR1END2_SLOW", + "NL1BEG1" + ], + [ + "T_TERM_UTURN_INT_SR1END2_SLOW", + "SR1END2" + ], + [ + "T_TERM_UTURN_INT_SR1END3_SLOW", + "NL1BEG0" + ], + [ + "T_TERM_UTURN_INT_SR1END3_SLOW", + "SR1END3" + ], + [ + "T_TERM_UTURN_INT_SS2A0", + "NN2BEG3" + ], + [ + "T_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "T_TERM_UTURN_INT_SS2A1", + "NN2BEG2" + ], + [ + "T_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "T_TERM_UTURN_INT_SS2A2", + "NN2BEG1" + ], + [ + "T_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "T_TERM_UTURN_INT_SS2A3", + "NN2BEG0" + ], + [ + "T_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "T_TERM_UTURN_INT_SS2END0", + "NN2A3" + ], + [ + "T_TERM_UTURN_INT_SS2END0", + "SS2END0" + ], + [ + "T_TERM_UTURN_INT_SS2END1", + "NN2A2" + ], + [ + "T_TERM_UTURN_INT_SS2END1", + "SS2END1" + ], + [ + "T_TERM_UTURN_INT_SS2END2", + "NN2A1" + ], + [ + "T_TERM_UTURN_INT_SS2END2", + "SS2END2" + ], + [ + "T_TERM_UTURN_INT_SS2END3", + "NN2A0" + ], + [ + "T_TERM_UTURN_INT_SS2END3", + "SS2END3" + ], + [ + "T_TERM_UTURN_INT_SS6A0", + "NN6BEG3" + ], + [ + "T_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "T_TERM_UTURN_INT_SS6A1", + "NN6BEG2" + ], + [ + "T_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "T_TERM_UTURN_INT_SS6A2", + "NN6BEG1" + ], + [ + "T_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "T_TERM_UTURN_INT_SS6A3", + "NN6BEG0" + ], + [ + "T_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "T_TERM_UTURN_INT_SS6B0", + "NN6A3" + ], + [ + "T_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "T_TERM_UTURN_INT_SS6B1", + "NN6A2" + ], + [ + "T_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "T_TERM_UTURN_INT_SS6B2", + "NN6A1" + ], + [ + "T_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "T_TERM_UTURN_INT_SS6B3", + "NN6A0" + ], + [ + "T_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "T_TERM_UTURN_INT_SS6C0", + "NN6B3" + ], + [ + "T_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "T_TERM_UTURN_INT_SS6C1", + "NN6B2" + ], + [ + "T_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "T_TERM_UTURN_INT_SS6C2", + "NN6B1" + ], + [ + "T_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "T_TERM_UTURN_INT_SS6C3", + "NN6B0" + ], + [ + "T_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "T_TERM_UTURN_INT_SS6D0", + "NN6C3" + ], + [ + "T_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "T_TERM_UTURN_INT_SS6D1", + "NN6C2" + ], + [ + "T_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "T_TERM_UTURN_INT_SS6D2", + "NN6C1" + ], + [ + "T_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "T_TERM_UTURN_INT_SS6D3", + "NN6C0" + ], + [ + "T_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "T_TERM_UTURN_INT_SS6E0", + "NN6D3" + ], + [ + "T_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "T_TERM_UTURN_INT_SS6E1", + "NN6D2" + ], + [ + "T_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "T_TERM_UTURN_INT_SS6E2", + "NN6D1" + ], + [ + "T_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "T_TERM_UTURN_INT_SS6E3", + "NN6D0" + ], + [ + "T_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "T_TERM_UTURN_INT_SS6END0", + "NN6E3" + ], + [ + "T_TERM_UTURN_INT_SS6END0", + "SS6END0" + ], + [ + "T_TERM_UTURN_INT_SS6END1", + "NN6E2" + ], + [ + "T_TERM_UTURN_INT_SS6END1", + "SS6END1" + ], + [ + "T_TERM_UTURN_INT_SS6END2", + "NN6E1" + ], + [ + "T_TERM_UTURN_INT_SS6END2", + "SS6END2" + ], + [ + "T_TERM_UTURN_INT_SS6END3", + "NN6E0" + ], + [ + "T_TERM_UTURN_INT_SS6END3", + "SS6END3" + ], + [ + "T_TERM_UTURN_INT_SW2A0", + "NW2BEG3" + ], + [ + "T_TERM_UTURN_INT_SW2A0", + "SW2A0" + ], + [ + "T_TERM_UTURN_INT_SW2A1", + "NW2BEG2" + ], + [ + "T_TERM_UTURN_INT_SW2A1", + "SW2A1" + ], + [ + "T_TERM_UTURN_INT_SW2A2", + "NW2BEG1" + ], + [ + "T_TERM_UTURN_INT_SW2A2", + "SW2A2" + ], + [ + "T_TERM_UTURN_INT_SW2A3", + "NW2BEG0" + ], + [ + "T_TERM_UTURN_INT_SW2A3", + "SW2A3" + ], + [ + "T_TERM_UTURN_INT_SW6B0", + "NW6A3" + ], + [ + "T_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "T_TERM_UTURN_INT_SW6B1", + "NW6A2" + ], + [ + "T_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "T_TERM_UTURN_INT_SW6B2", + "NW6A1" + ], + [ + "T_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "T_TERM_UTURN_INT_SW6B3", + "NW6A0" + ], + [ + "T_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "T_TERM_UTURN_INT_SW6C0", + "NW6B3" + ], + [ + "T_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "T_TERM_UTURN_INT_SW6C1", + "NW6B2" + ], + [ + "T_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "T_TERM_UTURN_INT_SW6C2", + "NW6B1" + ], + [ + "T_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "T_TERM_UTURN_INT_SW6C3", + "NW6B0" + ], + [ + "T_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "T_TERM_UTURN_INT_SW6D0", + "NW6C3" + ], + [ + "T_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "T_TERM_UTURN_INT_SW6D1", + "NW6C2" + ], + [ + "T_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "T_TERM_UTURN_INT_SW6D2", + "NW6C1" + ], + [ + "T_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "T_TERM_UTURN_INT_SW6D3", + "NW6C0" + ], + [ + "T_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "T_TERM_UTURN_INT_SW6E0", + "NW6D3" + ], + [ + "T_TERM_UTURN_INT_SW6E0", + "SW6E0" + ], + [ + "T_TERM_UTURN_INT_SW6E1", + "NW6D2" + ], + [ + "T_TERM_UTURN_INT_SW6E1", + "SW6E1" + ], + [ + "T_TERM_UTURN_INT_SW6E2", + "NW6D1" + ], + [ + "T_TERM_UTURN_INT_SW6E2", + "SW6E2" + ], + [ + "T_TERM_UTURN_INT_SW6E3", + "NW6D0" + ], + [ + "T_TERM_UTURN_INT_SW6E3", + "SW6E3" + ], + [ + "T_TERM_UTURN_INT_WR1BEG_S0", + "WL1BEG3" + ], + [ + "T_TERM_UTURN_INT_WR1BEG_S0", + "WR1BEG_S0" + ], + [ + "T_TERM_UTURN_INT_WR1END_S1_0", + "WL1END3" + ], + [ + "T_TERM_UTURN_INT_WR1END_S1_0", + "WR1END_S1_0" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "BRKH_TERM_INT", + "INT_R" + ], + "wire_pairs": [ + [ + "T_TERM_INT_UTURN_LV_R2", + "LV2" + ], + [ + "T_TERM_INT_UTURN_LV_R2", + "LV15" + ], + [ + "T_TERM_INT_UTURN_LV_R3", + "LV3" + ], + [ + "T_TERM_INT_UTURN_LV_R3", + "LV14" + ], + [ + "T_TERM_INT_UTURN_LV_R4", + "LV4" + ], + [ + "T_TERM_INT_UTURN_LV_R4", + "LV13" + ], + [ + "T_TERM_INT_UTURN_LV_R5", + "LV5" + ], + [ + "T_TERM_INT_UTURN_LV_R5", + "LV12" + ], + [ + "T_TERM_INT_UTURN_LV_R6", + "LV6" + ], + [ + "T_TERM_INT_UTURN_LV_R6", + "LV11" + ], + [ + "T_TERM_INT_UTURN_LV_R7", + "LV7" + ], + [ + "T_TERM_INT_UTURN_LV_R7", + "LV10" + ], + [ + "T_TERM_INT_UTURN_LV_R9", + "LV8" + ], + [ + "T_TERM_INT_UTURN_LV_R9", + "LV9" + ], + [ + "T_TERM_INT_UTURN_LV_R16", + "LV1" + ], + [ + "T_TERM_INT_UTURN_LV_R16", + "LV16" + ], + [ + "T_TERM_INT_UTURN_LV_R17", + "LV0" + ], + [ + "T_TERM_INT_UTURN_LV_R17", + "LV17" + ], + [ + "T_TERM_UTURN_INT_ER1BEG_S0", + "EL1BEG3" + ], + [ + "T_TERM_UTURN_INT_ER1BEG_S0", + "ER1BEG_S0" + ], + [ + "T_TERM_UTURN_INT_ER1END3", + "EL1END_S3_0" + ], + [ + "T_TERM_UTURN_INT_ER1END3", + "ER1END3" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0", + "BYP_BOUNCE7" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0", + "FAN_BOUNCE_S3_0" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2", + "BYP_BOUNCE3" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2", + "FAN_BOUNCE_S3_2" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4", + "BYP_BOUNCE6" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4", + "FAN_BOUNCE_S3_4" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6", + "BYP_BOUNCE2" + ], + [ + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6", + "FAN_BOUNCE_S3_6" + ], + [ + "T_TERM_UTURN_INT_LVB0", + "LVB0" + ], + [ + "T_TERM_UTURN_INT_LVB0", + "LVB11" + ], + [ + "T_TERM_UTURN_INT_LVB1", + "LVB1" + ], + [ + "T_TERM_UTURN_INT_LVB1", + "LVB10" + ], + [ + "T_TERM_UTURN_INT_LVB2", + "LVB2" + ], + [ + "T_TERM_UTURN_INT_LVB2", + "LVB9" + ], + [ + "T_TERM_UTURN_INT_LVB3", + "LVB3" + ], + [ + "T_TERM_UTURN_INT_LVB3", + "LVB8" + ], + [ + "T_TERM_UTURN_INT_LVB4", + "LVB4" + ], + [ + "T_TERM_UTURN_INT_LVB4", + "LVB7" + ], + [ + "T_TERM_UTURN_INT_LVB5", + "LVB5" + ], + [ + "T_TERM_UTURN_INT_LVB5", + "LVB6" + ], + [ + "T_TERM_UTURN_INT_SE2A0", + "NE2BEG3" + ], + [ + "T_TERM_UTURN_INT_SE2A0", + "SE2A0" + ], + [ + "T_TERM_UTURN_INT_SE2A1", + "NE2BEG2" + ], + [ + "T_TERM_UTURN_INT_SE2A1", + "SE2A1" + ], + [ + "T_TERM_UTURN_INT_SE2A2", + "NE2BEG1" + ], + [ + "T_TERM_UTURN_INT_SE2A2", + "SE2A2" + ], + [ + "T_TERM_UTURN_INT_SE2A3", + "NE2BEG0" + ], + [ + "T_TERM_UTURN_INT_SE2A3", + "SE2A3" + ], + [ + "T_TERM_UTURN_INT_SE6B0", + "NE6A3" + ], + [ + "T_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "T_TERM_UTURN_INT_SE6B1", + "NE6A2" + ], + [ + "T_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "T_TERM_UTURN_INT_SE6B2", + "NE6A1" + ], + [ + "T_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "T_TERM_UTURN_INT_SE6B3", + "NE6A0" + ], + [ + "T_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "T_TERM_UTURN_INT_SE6C0", + "NE6B3" + ], + [ + "T_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "T_TERM_UTURN_INT_SE6C1", + "NE6B2" + ], + [ + "T_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "T_TERM_UTURN_INT_SE6C2", + "NE6B1" + ], + [ + "T_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "T_TERM_UTURN_INT_SE6C3", + "NE6B0" + ], + [ + "T_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "T_TERM_UTURN_INT_SE6D0", + "NE6C3" + ], + [ + "T_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "T_TERM_UTURN_INT_SE6D1", + "NE6C2" + ], + [ + "T_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "T_TERM_UTURN_INT_SE6D2", + "NE6C1" + ], + [ + "T_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "T_TERM_UTURN_INT_SE6D3", + "NE6C0" + ], + [ + "T_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "T_TERM_UTURN_INT_SE6E0", + "NE6D3" + ], + [ + "T_TERM_UTURN_INT_SE6E0", + "SE6E0" + ], + [ + "T_TERM_UTURN_INT_SE6E1", + "NE6D2" + ], + [ + "T_TERM_UTURN_INT_SE6E1", + "SE6E1" + ], + [ + "T_TERM_UTURN_INT_SE6E2", + "NE6D1" + ], + [ + "T_TERM_UTURN_INT_SE6E2", + "SE6E2" + ], + [ + "T_TERM_UTURN_INT_SE6E3", + "NE6D0" + ], + [ + "T_TERM_UTURN_INT_SE6E3", + "SE6E3" + ], + [ + "T_TERM_UTURN_INT_SL1END0_SLOW", + "NR1BEG3" + ], + [ + "T_TERM_UTURN_INT_SL1END0_SLOW", + "SL1END0" + ], + [ + "T_TERM_UTURN_INT_SL1END1_SLOW", + "NR1BEG2" + ], + [ + "T_TERM_UTURN_INT_SL1END1_SLOW", + "SL1END1" + ], + [ + "T_TERM_UTURN_INT_SL1END2_SLOW", + "NR1BEG1" + ], + [ + "T_TERM_UTURN_INT_SL1END2_SLOW", + "SL1END2" + ], + [ + "T_TERM_UTURN_INT_SL1END3_SLOW", + "NR1BEG0" + ], + [ + "T_TERM_UTURN_INT_SL1END3_SLOW", + "SL1END3" + ], + [ + "T_TERM_UTURN_INT_SR1END1_SLOW", + "NL1BEG2" + ], + [ + "T_TERM_UTURN_INT_SR1END1_SLOW", + "SR1END1" + ], + [ + "T_TERM_UTURN_INT_SR1END2_SLOW", + "NL1BEG1" + ], + [ + "T_TERM_UTURN_INT_SR1END2_SLOW", + "SR1END2" + ], + [ + "T_TERM_UTURN_INT_SR1END3_SLOW", + "NL1BEG0" + ], + [ + "T_TERM_UTURN_INT_SR1END3_SLOW", + "SR1END3" + ], + [ + "T_TERM_UTURN_INT_SS2A0", + "NN2BEG3" + ], + [ + "T_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "T_TERM_UTURN_INT_SS2A1", + "NN2BEG2" + ], + [ + "T_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "T_TERM_UTURN_INT_SS2A2", + "NN2BEG1" + ], + [ + "T_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "T_TERM_UTURN_INT_SS2A3", + "NN2BEG0" + ], + [ + "T_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "T_TERM_UTURN_INT_SS2END0", + "NN2A3" + ], + [ + "T_TERM_UTURN_INT_SS2END0", + "SS2END0" + ], + [ + "T_TERM_UTURN_INT_SS2END1", + "NN2A2" + ], + [ + "T_TERM_UTURN_INT_SS2END1", + "SS2END1" + ], + [ + "T_TERM_UTURN_INT_SS2END2", + "NN2A1" + ], + [ + "T_TERM_UTURN_INT_SS2END2", + "SS2END2" + ], + [ + "T_TERM_UTURN_INT_SS2END3", + "NN2A0" + ], + [ + "T_TERM_UTURN_INT_SS2END3", + "SS2END3" + ], + [ + "T_TERM_UTURN_INT_SS6A0", + "NN6BEG3" + ], + [ + "T_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "T_TERM_UTURN_INT_SS6A1", + "NN6BEG2" + ], + [ + "T_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "T_TERM_UTURN_INT_SS6A2", + "NN6BEG1" + ], + [ + "T_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "T_TERM_UTURN_INT_SS6A3", + "NN6BEG0" + ], + [ + "T_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "T_TERM_UTURN_INT_SS6B0", + "NN6A3" + ], + [ + "T_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "T_TERM_UTURN_INT_SS6B1", + "NN6A2" + ], + [ + "T_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "T_TERM_UTURN_INT_SS6B2", + "NN6A1" + ], + [ + "T_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "T_TERM_UTURN_INT_SS6B3", + "NN6A0" + ], + [ + "T_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "T_TERM_UTURN_INT_SS6C0", + "NN6B3" + ], + [ + "T_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "T_TERM_UTURN_INT_SS6C1", + "NN6B2" + ], + [ + "T_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "T_TERM_UTURN_INT_SS6C2", + "NN6B1" + ], + [ + "T_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "T_TERM_UTURN_INT_SS6C3", + "NN6B0" + ], + [ + "T_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "T_TERM_UTURN_INT_SS6D0", + "NN6C3" + ], + [ + "T_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "T_TERM_UTURN_INT_SS6D1", + "NN6C2" + ], + [ + "T_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "T_TERM_UTURN_INT_SS6D2", + "NN6C1" + ], + [ + "T_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "T_TERM_UTURN_INT_SS6D3", + "NN6C0" + ], + [ + "T_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "T_TERM_UTURN_INT_SS6E0", + "NN6D3" + ], + [ + "T_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "T_TERM_UTURN_INT_SS6E1", + "NN6D2" + ], + [ + "T_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "T_TERM_UTURN_INT_SS6E2", + "NN6D1" + ], + [ + "T_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "T_TERM_UTURN_INT_SS6E3", + "NN6D0" + ], + [ + "T_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "T_TERM_UTURN_INT_SS6END0", + "NN6E3" + ], + [ + "T_TERM_UTURN_INT_SS6END0", + "SS6END0" + ], + [ + "T_TERM_UTURN_INT_SS6END1", + "NN6E2" + ], + [ + "T_TERM_UTURN_INT_SS6END1", + "SS6END1" + ], + [ + "T_TERM_UTURN_INT_SS6END2", + "NN6E1" + ], + [ + "T_TERM_UTURN_INT_SS6END2", + "SS6END2" + ], + [ + "T_TERM_UTURN_INT_SS6END3", + "NN6E0" + ], + [ + "T_TERM_UTURN_INT_SS6END3", + "SS6END3" + ], + [ + "T_TERM_UTURN_INT_SW2A0", + "NW2BEG3" + ], + [ + "T_TERM_UTURN_INT_SW2A0", + "SW2A0" + ], + [ + "T_TERM_UTURN_INT_SW2A1", + "NW2BEG2" + ], + [ + "T_TERM_UTURN_INT_SW2A1", + "SW2A1" + ], + [ + "T_TERM_UTURN_INT_SW2A2", + "NW2BEG1" + ], + [ + "T_TERM_UTURN_INT_SW2A2", + "SW2A2" + ], + [ + "T_TERM_UTURN_INT_SW2A3", + "NW2BEG0" + ], + [ + "T_TERM_UTURN_INT_SW2A3", + "SW2A3" + ], + [ + "T_TERM_UTURN_INT_SW6B0", + "NW6A3" + ], + [ + "T_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "T_TERM_UTURN_INT_SW6B1", + "NW6A2" + ], + [ + "T_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "T_TERM_UTURN_INT_SW6B2", + "NW6A1" + ], + [ + "T_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "T_TERM_UTURN_INT_SW6B3", + "NW6A0" + ], + [ + "T_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "T_TERM_UTURN_INT_SW6C0", + "NW6B3" + ], + [ + "T_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "T_TERM_UTURN_INT_SW6C1", + "NW6B2" + ], + [ + "T_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "T_TERM_UTURN_INT_SW6C2", + "NW6B1" + ], + [ + "T_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "T_TERM_UTURN_INT_SW6C3", + "NW6B0" + ], + [ + "T_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "T_TERM_UTURN_INT_SW6D0", + "NW6C3" + ], + [ + "T_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "T_TERM_UTURN_INT_SW6D1", + "NW6C2" + ], + [ + "T_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "T_TERM_UTURN_INT_SW6D2", + "NW6C1" + ], + [ + "T_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "T_TERM_UTURN_INT_SW6D3", + "NW6C0" + ], + [ + "T_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "T_TERM_UTURN_INT_SW6E0", + "NW6D3" + ], + [ + "T_TERM_UTURN_INT_SW6E0", + "SW6E0" + ], + [ + "T_TERM_UTURN_INT_SW6E1", + "NW6D2" + ], + [ + "T_TERM_UTURN_INT_SW6E1", + "SW6E1" + ], + [ + "T_TERM_UTURN_INT_SW6E2", + "NW6D1" + ], + [ + "T_TERM_UTURN_INT_SW6E2", + "SW6E2" + ], + [ + "T_TERM_UTURN_INT_SW6E3", + "NW6D0" + ], + [ + "T_TERM_UTURN_INT_SW6E3", + "SW6E3" + ], + [ + "T_TERM_UTURN_INT_WR1BEG_S0", + "WL1BEG3" + ], + [ + "T_TERM_UTURN_INT_WR1BEG_S0", + "WR1BEG_S0" + ], + [ + "T_TERM_UTURN_INT_WR1END_S1_0", + "WL1END3" + ], + [ + "T_TERM_UTURN_INT_WR1END_S1_0", + "WR1END_S1_0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "B_TERM_INT", + "INT_L" + ], + "wire_pairs": [ + [ + "B_TERM_UTURN_INT_ER1BEG0", + "EL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_ER1BEG0", + "ER1BEG0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "EL1END0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "ER1END_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "BYP_BOUNCE_N3_7" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "FAN_BOUNCE0" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "BYP_BOUNCE_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "FAN_BOUNCE2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "BYP_BOUNCE_N3_6" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "FAN_BOUNCE4" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "BYP_BOUNCE_N3_2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "FAN_BOUNCE6" + ], + [ + "B_TERM_UTURN_INT_LVB_L0", + "LVB_L1" + ], + [ + "B_TERM_UTURN_INT_LVB_L0", + "LVB_L12" + ], + [ + "B_TERM_UTURN_INT_LVB_L1", + "LVB_L2" + ], + [ + "B_TERM_UTURN_INT_LVB_L1", + "LVB_L11" + ], + [ + "B_TERM_UTURN_INT_LVB_L2", + "LVB_L3" + ], + [ + "B_TERM_UTURN_INT_LVB_L2", + "LVB_L10" + ], + [ + "B_TERM_UTURN_INT_LVB_L3", + "LVB_L4" + ], + [ + "B_TERM_UTURN_INT_LVB_L3", + "LVB_L9" + ], + [ + "B_TERM_UTURN_INT_LVB_L4", + "LVB_L5" + ], + [ + "B_TERM_UTURN_INT_LVB_L4", + "LVB_L8" + ], + [ + "B_TERM_UTURN_INT_LVB_L5", + "LVB_L6" + ], + [ + "B_TERM_UTURN_INT_LVB_L5", + "LVB_L7" + ], + [ + "B_TERM_UTURN_INT_LV_L2", + "LV_L2" + ], + [ + "B_TERM_UTURN_INT_LV_L2", + "LV_L17" + ], + [ + "B_TERM_UTURN_INT_LV_L3", + "LV_L3" + ], + [ + "B_TERM_UTURN_INT_LV_L3", + "LV_L16" + ], + [ + "B_TERM_UTURN_INT_LV_L4", + "LV_L4" + ], + [ + "B_TERM_UTURN_INT_LV_L4", + "LV_L15" + ], + [ + "B_TERM_UTURN_INT_LV_L5", + "LV_L5" + ], + [ + "B_TERM_UTURN_INT_LV_L5", + "LV_L14" + ], + [ + "B_TERM_UTURN_INT_LV_L6", + "LV_L6" + ], + [ + "B_TERM_UTURN_INT_LV_L6", + "LV_L13" + ], + [ + "B_TERM_UTURN_INT_LV_L7", + "LV_L7" + ], + [ + "B_TERM_UTURN_INT_LV_L7", + "LV_L12" + ], + [ + "B_TERM_UTURN_INT_LV_L8", + "LV_L8" + ], + [ + "B_TERM_UTURN_INT_LV_L8", + "LV_L11" + ], + [ + "B_TERM_UTURN_INT_LV_L9", + "LV_L9" + ], + [ + "B_TERM_UTURN_INT_LV_L9", + "LV_L10" + ], + [ + "B_TERM_UTURN_INT_LV_L18", + "LV_L1" + ], + [ + "B_TERM_UTURN_INT_LV_L18", + "LV_L18" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "NE2A3" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "SE2BEG0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "NE2A2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "SE2BEG1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "NE2A1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "SE2BEG2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "NE2A0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "SE2BEG3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "NE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "SE6A0" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "NE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "SE6A1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "NE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "SE6A2" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "NE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "SE6A3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "NE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "NE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "NE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "NE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "NE6D3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "NE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "NE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "NE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "NE6E3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "NE6E2" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "NE6E1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "NE6E0" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "NR1END3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "SL1BEG0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "NR1END2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "SL1BEG1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "NR1END1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "SL1BEG2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "NR1END0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "SL1BEG3" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "NL1END2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "SR1BEG1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "NL1END1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "SR1BEG2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "NL1END0" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "SR1BEG3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "NN2END3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "NN2END2" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "NN2END1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "NN2END0" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "NN2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "SS2BEG0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "NN2A2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "SS2BEG1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "NN2A1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "SS2BEG2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "NN2A0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "SS2BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "NN6B3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "NN6B2" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "NN6B1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "NN6B0" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "NN6C3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "NN6C2" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "NN6C1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "NN6C0" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "NN6A3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "SS6BEG0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "NN6A2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "SS6BEG1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "NN6A1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "SS6BEG2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "NN6A0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "SS6BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "NN6D3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "NN6D2" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "NN6D1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "NN6D0" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "NN6E3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "NN6E2" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "NN6E1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "NN6E0" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "NN6END3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "NN6END2" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "NN6END1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "NN6END0" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "NW2A3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "SW2BEG0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "NW2A2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "SW2BEG1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "NW2A1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "SW2BEG2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "NW2A0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "SW2BEG3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "NW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "SW6A0" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "NW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "SW6A1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "NW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "SW6A2" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "NW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "SW6A3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "NW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "NW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "NW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "NW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "NW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "NW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "NW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "NW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "NW6E3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "NW6E2" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "NW6E1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "NW6E0" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "NW6END0" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "SW6END_N0_3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WR1BEG0" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WL1END_N1_3" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WR1END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "B_TERM_INT", + "INT_R" + ], + "wire_pairs": [ + [ + "B_TERM_UTURN_INT_ER1BEG0", + "EL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_ER1BEG0", + "ER1BEG0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "EL1END0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "ER1END_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "BYP_BOUNCE_N3_7" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "FAN_BOUNCE0" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "BYP_BOUNCE_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "FAN_BOUNCE2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "BYP_BOUNCE_N3_6" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "FAN_BOUNCE4" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "BYP_BOUNCE_N3_2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "FAN_BOUNCE6" + ], + [ + "B_TERM_UTURN_INT_LV2", + "LV2" + ], + [ + "B_TERM_UTURN_INT_LV2", + "LV17" + ], + [ + "B_TERM_UTURN_INT_LV3", + "LV3" + ], + [ + "B_TERM_UTURN_INT_LV3", + "LV16" + ], + [ + "B_TERM_UTURN_INT_LV4", + "LV4" + ], + [ + "B_TERM_UTURN_INT_LV4", + "LV15" + ], + [ + "B_TERM_UTURN_INT_LV5", + "LV5" + ], + [ + "B_TERM_UTURN_INT_LV5", + "LV14" + ], + [ + "B_TERM_UTURN_INT_LV6", + "LV6" + ], + [ + "B_TERM_UTURN_INT_LV6", + "LV13" + ], + [ + "B_TERM_UTURN_INT_LV7", + "LV7" + ], + [ + "B_TERM_UTURN_INT_LV7", + "LV12" + ], + [ + "B_TERM_UTURN_INT_LV8", + "LV8" + ], + [ + "B_TERM_UTURN_INT_LV8", + "LV11" + ], + [ + "B_TERM_UTURN_INT_LV9", + "LV9" + ], + [ + "B_TERM_UTURN_INT_LV9", + "LV10" + ], + [ + "B_TERM_UTURN_INT_LV18", + "LV1" + ], + [ + "B_TERM_UTURN_INT_LV18", + "LV18" + ], + [ + "B_TERM_UTURN_INT_LVB0", + "LVB1" + ], + [ + "B_TERM_UTURN_INT_LVB0", + "LVB12" + ], + [ + "B_TERM_UTURN_INT_LVB1", + "LVB2" + ], + [ + "B_TERM_UTURN_INT_LVB1", + "LVB11" + ], + [ + "B_TERM_UTURN_INT_LVB2", + "LVB3" + ], + [ + "B_TERM_UTURN_INT_LVB2", + "LVB10" + ], + [ + "B_TERM_UTURN_INT_LVB3", + "LVB4" + ], + [ + "B_TERM_UTURN_INT_LVB3", + "LVB9" + ], + [ + "B_TERM_UTURN_INT_LVB4", + "LVB5" + ], + [ + "B_TERM_UTURN_INT_LVB4", + "LVB8" + ], + [ + "B_TERM_UTURN_INT_LVB5", + "LVB6" + ], + [ + "B_TERM_UTURN_INT_LVB5", + "LVB7" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "NE2A3" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "SE2BEG0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "NE2A2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "SE2BEG1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "NE2A1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "SE2BEG2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "NE2A0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "SE2BEG3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "NE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "SE6A0" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "NE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "SE6A1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "NE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "SE6A2" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "NE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "SE6A3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "NE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "NE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "NE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "NE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "NE6D3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "NE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "NE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "NE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "NE6E3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "NE6E2" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "NE6E1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "NE6E0" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "NR1END3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "SL1BEG0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "NR1END2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "SL1BEG1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "NR1END1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "SL1BEG2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "NR1END0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "SL1BEG3" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "NL1END2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "SR1BEG1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "NL1END1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "SR1BEG2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "NL1END0" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "SR1BEG3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "NN2END3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "NN2END2" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "NN2END1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "NN2END0" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "NN2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "SS2BEG0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "NN2A2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "SS2BEG1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "NN2A1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "SS2BEG2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "NN2A0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "SS2BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "NN6B3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "NN6B2" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "NN6B1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "NN6B0" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "NN6C3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "NN6C2" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "NN6C1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "NN6C0" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "NN6A3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "SS6BEG0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "NN6A2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "SS6BEG1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "NN6A1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "SS6BEG2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "NN6A0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "SS6BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "NN6D3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "NN6D2" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "NN6D1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "NN6D0" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "NN6E3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "NN6E2" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "NN6E1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "NN6E0" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "NN6END3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "NN6END2" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "NN6END1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "NN6END0" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "NW2A3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "SW2BEG0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "NW2A2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "SW2BEG1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "NW2A1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "SW2BEG2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "NW2A0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "SW2BEG3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "NW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "SW6A0" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "NW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "SW6A1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "NW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "SW6A2" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "NW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "SW6A3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "NW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "NW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "NW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "NW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "NW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "NW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "NW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "NW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "NW6E3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "NW6E2" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "NW6E1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "NW6E0" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "NW6END0" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "SW6END_N0_3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WR1BEG0" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WL1END_N1_3" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WR1END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -21 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "CFG_CENTER_MID" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BOT_CFG_IO_ACCESS_VGGCOMPOUT", + "CFG_CENTER_MID_CFG_IO_ACCESS_VGGCOMPOUT" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA2", + "CFG_CENTER_MID_USR_ACCESS_DATA2" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA3", + "CFG_CENTER_MID_USR_ACCESS_DATA3" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA4", + "CFG_CENTER_MID_USR_ACCESS_DATA4" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA5", + "CFG_CENTER_MID_USR_ACCESS_DATA5" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA6", + "CFG_CENTER_MID_USR_ACCESS_DATA6" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA7", + "CFG_CENTER_MID_USR_ACCESS_DATA7" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA8", + "CFG_CENTER_MID_USR_ACCESS_DATA8" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA9", + "CFG_CENTER_MID_USR_ACCESS_DATA9" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA10", + "CFG_CENTER_MID_USR_ACCESS_DATA10" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA11", + "CFG_CENTER_MID_USR_ACCESS_DATA11" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA12", + "CFG_CENTER_MID_USR_ACCESS_DATA12" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA13", + "CFG_CENTER_MID_USR_ACCESS_DATA13" + ], + [ + "CFG_CENTER_BOT_USR_ACCESS_DATA14", + "CFG_CENTER_MID_USR_ACCESS_DATA14" + ] + ] + }, + { + "grid_deltas": [ + -1, + -9 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_19", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_19", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_19", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_19", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_19", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_19", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_19", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_19", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_19", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_19", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_19", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_19", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_19", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_19", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_19", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_19", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_19", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_19", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_19", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_19", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_19", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_19", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_19", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_19", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_19", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_19", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_19", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_19", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_19", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_19", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_19", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_19", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_19", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_19", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_19", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_19", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_19", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_19", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_19", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_19", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_19", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_19", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_19", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_19", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_19", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_19", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_19", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_19", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_19", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_19", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_19", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_19", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_19", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_19", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_19", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_19", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_19", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_19", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_19", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_19", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_19", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_19", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_19", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_19", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_19", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_19", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_19", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_19", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_19", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_19", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_19", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_19", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_19", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_19", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_19", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_19", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_19", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_19", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_19", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_19", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_19", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_19", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_19", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_19", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_19", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_19", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_19", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_19", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_19", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_19", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_19", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_19", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_19", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_19", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_19", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_19", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_19", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_19", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_19", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_19", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_19", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_19", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_19", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_19", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_19", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_19", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_19", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_19", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_19", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_19", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_19", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_19", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_19", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_19", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_19", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_19", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_19", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_19", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_19", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_19", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_19", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_19", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_19", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_19", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -8 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_18", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_18", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_18", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_18", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_18", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_18", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_18", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_18", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_18", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_18", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_18", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_18", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_18", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_18", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_18", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_18", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_18", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_18", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_18", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_18", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_18", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_18", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_18", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_18", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_18", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_18", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_18", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_18", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_18", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_18", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_18", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_18", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_18", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_18", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_18", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_18", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_18", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_18", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_18", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_18", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_18", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_18", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_18", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_18", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_18", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_18", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_18", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_18", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_18", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_18", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_18", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_18", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_18", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_18", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_18", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_18", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_18", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_18", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_18", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_18", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_18", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_18", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_18", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_18", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_18", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_18", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_18", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_18", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_18", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_18", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_18", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_18", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_18", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_18", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_18", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_18", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_18", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_18", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_18", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_18", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_18", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_18", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_18", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_18", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_18", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_18", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_18", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_18", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_18", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_18", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_18", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_18", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_18", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_18", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_18", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_18", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_18", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_18", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_18", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_18", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_18", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_18", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_18", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_18", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_18", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_18", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_18", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_18", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_18", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_18", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_18", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_18", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_18", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_18", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_18", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_18", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_18", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_18", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_18", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_18", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_18", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_18", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_18", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_18", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_17", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_17", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_17", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_17", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_17", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_17", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_17", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_17", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_17", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_17", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_17", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_17", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_17", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_17", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_17", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_17", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_17", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_17", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_17", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_17", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_17", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_17", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_17", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_17", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_17", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_17", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_17", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_17", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_17", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_17", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_17", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_17", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_17", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_17", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_17", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_17", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_17", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_17", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_17", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_17", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_17", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_17", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_17", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_17", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_17", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_17", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_17", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_17", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_17", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_17", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_17", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_17", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_17", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_17", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_17", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_17", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_17", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_17", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_17", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_17", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_17", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_17", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_17", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_17", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_17", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_17", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_17", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_17", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_17", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_17", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_17", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_17", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_17", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_17", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_17", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_17", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_17", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_17", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_17", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_17", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_17", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_17", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_17", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_17", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_17", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_17", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_17", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_17", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_17", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_17", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_17", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_17", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_17", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_17", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_17", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_17", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_17", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_17", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_17", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_17", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_17", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_17", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_17", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_17", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_17", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_17", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_17", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_17", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_17", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_17", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_17", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_17", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_17", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_17", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_17", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_17", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_17", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_17", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_17", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_17", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_17", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_17", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_17", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_17", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_16", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_16", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_16", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_16", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_16", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_16", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_16", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_16", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_16", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_16", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_16", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_16", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_16", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_16", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_16", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_16", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_16", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_16", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_16", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_16", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_16", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_16", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_16", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_16", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_16", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_16", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_16", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_16", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_16", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_16", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_16", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_16", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_16", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_16", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_16", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_16", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_16", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_16", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_16", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_16", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_16", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_16", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_16", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_16", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_16", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_16", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_16", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_16", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_16", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_16", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_16", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_16", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_16", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_16", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_16", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_16", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_16", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_16", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_16", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_16", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_16", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_16", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_16", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_16", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_16", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_16", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_16", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_16", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_16", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_16", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_16", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_16", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_16", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_16", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_16", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_16", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_16", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_16", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_16", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_16", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_16", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_16", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_16", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_16", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_16", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_16", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_16", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_16", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_16", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_16", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_16", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_16", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_16", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_16", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_16", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_16", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_16", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_16", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_16", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_16", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_16", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_16", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_16", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_16", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_16", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_16", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_16", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_16", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_16", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_16", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_16", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_16", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_16", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_16", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_16", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_16", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_16", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_16", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_16", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_16", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_16", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_16", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_16", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_16", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_15", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_15", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_15", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_15", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_15", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_15", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_15", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_15", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_15", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_15", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_15", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_15", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_15", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_15", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_15", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_15", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_15", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_15", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_15", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_15", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_15", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_15", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_15", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_15", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_15", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_15", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_15", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_15", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_15", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_15", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_15", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_15", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_15", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_15", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_15", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_15", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_15", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_15", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_15", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_15", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_15", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_15", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_15", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_15", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_15", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_15", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_15", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_15", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_15", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_15", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_15", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_15", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_15", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_15", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_15", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_15", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_15", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_15", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_15", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_15", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_15", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_15", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_15", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_15", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_15", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_15", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_15", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_15", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_15", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_15", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_15", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_15", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_15", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_15", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_15", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_15", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_15", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_15", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_15", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_15", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_15", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_15", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_15", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_15", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_15", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_15", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_15", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_15", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_15", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_15", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_15", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_15", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_15", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_15", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_15", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_15", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_15", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_15", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_15", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_15", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_15", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_15", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_15", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_15", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_15", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_15", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_15", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_15", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_15", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_15", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_15", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_15", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_15", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_15", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_15", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_15", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_15", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_15", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_15", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_15", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_15", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_15", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_15", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_15", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_14", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_14", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_14", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_14", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_14", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_14", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_14", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_14", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_14", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_14", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_14", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_14", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_14", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_14", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_14", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_14", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_14", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_14", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_14", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_14", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_14", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_14", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_14", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_14", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_14", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_14", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_14", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_14", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_14", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_14", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_14", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_14", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_14", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_14", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_14", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_14", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_14", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_14", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_14", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_14", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_14", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_14", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_14", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_14", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_14", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_14", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_14", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_14", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_14", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_14", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_14", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_14", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_14", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_14", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_14", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_14", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_14", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_14", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_14", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_14", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_14", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_14", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_14", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_14", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_14", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_14", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_14", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_14", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_14", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_14", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_14", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_14", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_14", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_14", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_14", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_14", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_14", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_14", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_14", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_14", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_14", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_14", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_14", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_14", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_14", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_14", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_14", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_14", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_14", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_14", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_14", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_14", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_14", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_14", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_14", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_14", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_14", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_14", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_14", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_14", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_14", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_14", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_14", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_14", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_14", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_14", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_14", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_14", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_14", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_14", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_14", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_14", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_14", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_14", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_14", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_14", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_14", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_14", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_14", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_14", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_14", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_14", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_14", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_14", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_13", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_13", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_13", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_13", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_13", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_13", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_13", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_13", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_13", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_13", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_13", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_13", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_13", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_13", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_13", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_13", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_13", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_13", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_13", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_13", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_13", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_13", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_13", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_13", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_13", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_13", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_13", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_13", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_13", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_13", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_13", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_13", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_13", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_13", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_13", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_13", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_13", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_13", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_13", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_13", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_13", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_13", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_13", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_13", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_13", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_13", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_13", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_13", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_13", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_13", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_13", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_13", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_13", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_13", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_13", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_13", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_13", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_13", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_13", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_13", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_13", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_13", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_13", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_13", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_13", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_13", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_13", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_13", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_13", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_13", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_13", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_13", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_13", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_13", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_13", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_13", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_13", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_13", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_13", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_13", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_13", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_13", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_13", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_13", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_13", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_13", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_13", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_13", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_13", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_13", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_13", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_13", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_13", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_13", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_13", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_13", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_13", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_13", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_13", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_13", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_13", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_13", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_13", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_13", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_13", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_13", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_13", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_13", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_13", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_13", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_13", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_13", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_13", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_13", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_13", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_13", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_13", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_13", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_13", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_13", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_13", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_13", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_13", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_13", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_12", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_12", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_12", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_12", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_12", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_12", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_12", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_12", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_12", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_12", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_12", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_12", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_12", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_12", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_12", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_12", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_12", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_12", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_12", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_12", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_12", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_12", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_12", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_12", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_12", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_12", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_12", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_12", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_12", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_12", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_12", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_12", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_12", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_12", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_12", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_12", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_12", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_12", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_12", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_12", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_12", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_12", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_12", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_12", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_12", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_12", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_12", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_12", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_12", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_12", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_12", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_12", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_12", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_12", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_12", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_12", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_12", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_12", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_12", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_12", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_12", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_12", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_12", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_12", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_12", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_12", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_12", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_12", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_12", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_12", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_12", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_12", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_12", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_12", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_12", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_12", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_12", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_12", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_12", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_12", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_12", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_12", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_12", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_12", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_12", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_12", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_12", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_12", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_12", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_12", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_12", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_12", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_12", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_12", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_12", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_12", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_12", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_12", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_12", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_12", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_12", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_12", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_12", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_12", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_12", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_12", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_12", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_12", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_12", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_12", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_12", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_12", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_12", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_12", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_12", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_12", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_12", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_12", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_12", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_12", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_12", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_12", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_12", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_12", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_11", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_11", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_11", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_11", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_11", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_11", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_11", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_11", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_11", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_11", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_11", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_11", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_11", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_11", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_11", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_11", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_11", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_11", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_11", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_11", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_11", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_11", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_11", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_11", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_11", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_11", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_11", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_11", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_11", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_11", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_11", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_11", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_11", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_11", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_11", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_11", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_11", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_11", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_11", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_11", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_11", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_11", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_11", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_11", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_11", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_11", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_11", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_11", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_11", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_11", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_11", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_11", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_11", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_11", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_11", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_11", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_11", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_11", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_11", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_11", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_11", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_11", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_11", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_11", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_11", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_11", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_11", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_11", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_11", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_11", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_11", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_11", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_11", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_11", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_11", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_11", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_11", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_11", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_11", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_11", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_11", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_11", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_11", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_11", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_11", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_11", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_11", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_11", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_11", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_11", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_11", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_11", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_11", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_11", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_11", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_11", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_11", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_11", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_11", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_11", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_11", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_11", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_11", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_11", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_11", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_11", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_11", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_11", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_11", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_11", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_11", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_11", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_11", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_11", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_11", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_11", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_11", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_11", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_11", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_11", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_11", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_11", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_11", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_11", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_10", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_10", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_10", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_10", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_10", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_10", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_10", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_10", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_10", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_10", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_10", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_10", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_10", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_10", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_10", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_10", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_10", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_10", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_10", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_10", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_10", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_10", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_10", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_10", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_10", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_10", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_10", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_10", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_10", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_10", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_10", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_10", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_10", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_10", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_10", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_10", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_10", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_10", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_10", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_10", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_10", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_10", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_10", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_10", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_10", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_10", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_10", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_10", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_10", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_10", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_10", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_10", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_10", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_10", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_10", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_10", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_10", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_10", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_10", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_10", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_10", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_10", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_10", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_10", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_10", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_10", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_10", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_10", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_10", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_10", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_10", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_10", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_10", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_10", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_10", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_10", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_10", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_10", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_10", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_10", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_10", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_10", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_10", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_10", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_10", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_10", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_10", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_10", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_10", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_10", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_10", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_10", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_10", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_10", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_10", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_10", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_10", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_10", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_10", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_10", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_10", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_10", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_10", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_10", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_10", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_10", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_10", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_10", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_10", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_10", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_10", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_10", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_10", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_10", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_10", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_10", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_10", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_10", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_10", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_10", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_10", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_10", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_10", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_10", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_9", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_9", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_9", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_9", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_9", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_9", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_9", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_9", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_9", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_9", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_9", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_9", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_9", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_9", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_9", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_9", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_9", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_9", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_9", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_9", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_9", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_9", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_9", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_9", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_9", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_9", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_9", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_9", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_9", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_9", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_9", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_9", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_9", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_9", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_9", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_9", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_9", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_9", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_9", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_9", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_9", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_9", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_9", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_9", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_9", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_9", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_9", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_9", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_9", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_9", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_9", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_9", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_9", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_9", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_9", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_9", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_9", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_9", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_9", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_9", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_9", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_9", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_9", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_9", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_9", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_9", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_9", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_9", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_9", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_9", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_9", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_9", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_9", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_9", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_9", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_9", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_9", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_9", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_9", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_9", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_9", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_9", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_9", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_9", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_9", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_9", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_9", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_9", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_9", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_9", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_9", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_9", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_9", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_9", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_9", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_9", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_9", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_9", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_9", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_9", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_9", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_9", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_9", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_9", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_9", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_9", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_9", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_9", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_9", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_9", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_9", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_9", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_9", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_9", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_9", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_9", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_9", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_9", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_9", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_9", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_9", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_9", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_9", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_9", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_8", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_8", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_8", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_8", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_8", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_8", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_8", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_8", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_8", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_8", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_8", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_8", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_8", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_8", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_8", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_8", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_8", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_8", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_8", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_8", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_8", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_8", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_8", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_8", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_8", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_8", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_8", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_8", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_8", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_8", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_8", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_8", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_8", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_8", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_8", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_8", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_8", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_8", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_8", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_8", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_8", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_8", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_8", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_8", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_8", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_8", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_8", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_8", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_8", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_8", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_8", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_8", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_8", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_8", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_8", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_8", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_8", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_8", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_8", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_8", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_8", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_8", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_8", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_8", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_8", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_8", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_8", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_8", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_8", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_8", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_8", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_8", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_8", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_8", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_8", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_8", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_8", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_8", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_8", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_8", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_8", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_8", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_8", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_8", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_8", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_8", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_8", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_8", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_8", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_8", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_8", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_8", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_8", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_8", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_8", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_8", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_8", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_8", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_8", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_8", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_8", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_8", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_8", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_8", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_8", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_8", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_8", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_8", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_8", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_8", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_8", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_8", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_8", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_8", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_8", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_8", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_8", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_8", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_8", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_8", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_8", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_8", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_8", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_8", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_7", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_7", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_7", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_7", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_7", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_7", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_7", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_7", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_7", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_7", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_7", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_7", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_7", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_7", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_7", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_7", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_7", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_7", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_7", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_7", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_7", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_7", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_7", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_7", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_7", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_7", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_7", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_7", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_7", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_7", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_7", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_7", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_7", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_7", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_7", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_7", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_7", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_7", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_7", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_7", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_7", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_7", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_7", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_7", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_7", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_7", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_7", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_7", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_7", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_7", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_7", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_7", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_7", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_7", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_7", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_7", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_7", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_7", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_7", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_7", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_7", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_7", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_7", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_7", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_7", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_7", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_7", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_7", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_7", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_7", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_7", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_7", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_7", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_7", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_7", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_7", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_7", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_7", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_7", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_7", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_7", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_7", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_7", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_7", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_7", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_7", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_7", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_7", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_7", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_7", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_7", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_7", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_7", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_7", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_7", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_7", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_7", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_7", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_7", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_7", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_7", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_7", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_7", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_7", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_7", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_7", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_7", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_7", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_7", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_7", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_7", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_7", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_7", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_7", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_7", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_7", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_7", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_7", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_7", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_7", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_7", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_7", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_7", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_7", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_6", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_6", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_6", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_6", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_6", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_6", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_6", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_6", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_6", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_6", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_6", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_6", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_6", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_6", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_6", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_6", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_6", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_6", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_6", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_6", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_6", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_6", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_6", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_6", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_6", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_6", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_6", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_6", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_6", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_6", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_6", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_6", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_6", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_6", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_6", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_6", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_6", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_6", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_6", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_6", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_6", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_6", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_6", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_6", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_6", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_6", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_6", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_6", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_6", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_6", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_6", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_6", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_6", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_6", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_6", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_6", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_6", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_6", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_6", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_6", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_6", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_6", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_6", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_6", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_6", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_6", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_6", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_6", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_6", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_6", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_6", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_6", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_6", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_6", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_6", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_6", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_6", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_6", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_6", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_6", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_6", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_6", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_6", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_6", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_6", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_6", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_6", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_6", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_6", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_6", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_6", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_6", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_6", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_6", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_6", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_6", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_6", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_6", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_6", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_6", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_6", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_6", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_6", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_6", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_6", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_6", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_6", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_6", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_6", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_6", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_6", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_6", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_6", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_6", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_6", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_6", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_6", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_6", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_6", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_6", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_6", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_6", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_6", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_6", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_5", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_5", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_5", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_5", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_5", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_5", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_5", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_5", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_5", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_5", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_5", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_5", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_5", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_5", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_5", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_5", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_5", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_5", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_5", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_5", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_5", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_5", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_5", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_5", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_5", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_5", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_5", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_5", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_5", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_5", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_5", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_5", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_5", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_5", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_5", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_5", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_5", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_5", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_5", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_5", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_5", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_5", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_5", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_5", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_5", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_5", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_5", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_5", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_5", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_5", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_5", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_5", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_5", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_5", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_5", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_5", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_5", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_5", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_5", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_5", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_5", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_5", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_5", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_5", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_5", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_5", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_5", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_5", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_5", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_5", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_5", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_5", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_5", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_5", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_5", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_5", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_5", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_5", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_5", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_5", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_5", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_5", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_5", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_5", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_5", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_5", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_5", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_5", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_5", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_5", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_5", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_5", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_5", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_5", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_5", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_5", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_5", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_5", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_5", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_5", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_5", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_5", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_5", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_5", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_5", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_5", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_5", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_5", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_5", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_5", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_5", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_5", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_5", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_5", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_5", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_5", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_5", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_5", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_5", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_5", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_5", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_5", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_5", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_5", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 6 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_4", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_4", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_4", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_4", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_4", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_4", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_4", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_4", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_4", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_4", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_4", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_4", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_4", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_4", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_4", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_4", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_4", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_4", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_4", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_4", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_4", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_4", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_4", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_4", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_4", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_4", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_4", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_4", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_4", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_4", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_4", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_4", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_4", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_4", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_4", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_4", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_4", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_4", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_4", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_4", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_4", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_4", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_4", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_4", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_4", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_4", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_4", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_4", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_4", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_4", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_4", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_4", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_4", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_4", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_4", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_4", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_4", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_4", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_4", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_4", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_4", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_4", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_4", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_4", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_4", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_4", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_4", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_4", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_4", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_4", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_4", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_4", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_4", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_4", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_4", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_4", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_4", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_4", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_4", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_4", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_4", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_4", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_4", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_4", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_4", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_4", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_4", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_4", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_4", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_4", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_4", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_4", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_4", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_4", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_4", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_4", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_4", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_4", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_4", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_4", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_4", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_4", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_4", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_4", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_4", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_4", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_4", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_4", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_4", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_4", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_4", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_4", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_4", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_4", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_4", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_4", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_4", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_4", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_4", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_4", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_4", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_4", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_4", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_4", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 7 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_3", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_3", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_3", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_3", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_3", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_3", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_3", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_3", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_3", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_3", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_3", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_3", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_3", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_3", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_3", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_3", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_3", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_3", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_3", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_3", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_3", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_3", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_3", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_3", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_3", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_3", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_3", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_3", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_3", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_3", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_3", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_3", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_3", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_3", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_3", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_3", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_3", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_3", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_3", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_3", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_3", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_3", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_3", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_3", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_3", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_3", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_3", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_3", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_3", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_3", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_3", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_3", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_3", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_3", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_3", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_3", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_3", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_3", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_3", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_3", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_3", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_3", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_3", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_3", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_3", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_3", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_3", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_3", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_3", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_3", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_3", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_3", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_3", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_3", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_3", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_3", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_3", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_3", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_3", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_3", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_3", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_3", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_3", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_3", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_3", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_3", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_3", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_3", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_3", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_3", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_3", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_3", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_3", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_3", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_3", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_3", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_3", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_3", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_3", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_3", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_3", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_3", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_3", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_3", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_3", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_3", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_3", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_3", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_3", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_3", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_3", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_3", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_3", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_3", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_3", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_3", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_3", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_3", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_3", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_3", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_3", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_3", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_3", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_3", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 8 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_2", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_2", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_2", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_2", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_2", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_2", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_2", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_2", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_2", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_2", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_2", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_2", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_2", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_2", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_2", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_2", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_2", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_2", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_2", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_2", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_2", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_2", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_2", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_2", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_2", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_2", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_2", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_2", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_2", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_2", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_2", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_2", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_2", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_2", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_2", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_2", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_2", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_2", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_2", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_2", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_2", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_2", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_2", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_2", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_2", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_2", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_2", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_2", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_2", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_2", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_2", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_2", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_2", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_2", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_2", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_2", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_2", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_2", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_2", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_2", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_2", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_2", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_2", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_2", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_2", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_2", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_2", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_2", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_2", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_2", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_2", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_2", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_2", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_2", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_2", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_2", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_2", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_2", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_2", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_2", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_2", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_2", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_2", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_2", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_2", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_2", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_2", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_2", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_2", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_2", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_2", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_2", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_2", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_2", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_2", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_2", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_2", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_2", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_2", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_2", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_2", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_2", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_2", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_2", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_2", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_2", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_2", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_2", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_2", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_2", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_2", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_2", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_2", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_2", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_2", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_2", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_2", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_2", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_2", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_2", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_2", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_2", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_2", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_2", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 9 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_1", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_1", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_1", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_1", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_1", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_1", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_1", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_1", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_1", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_1", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_1", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_1", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_1", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_1", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_1", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_1", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_1", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_1", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_1", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_1", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_1", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_1", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_1", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_1", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_1", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_1", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_1", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_1", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_1", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_1", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_1", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_1", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_1", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_1", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_1", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_1", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_1", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_1", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_1", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_1", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_1", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_1", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_1", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_1", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_1", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_1", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_1", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_1", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_1", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_1", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_1", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_1", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_1", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_1", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_1", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_1", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_1", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_1", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_1", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_1", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_1", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_1", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_1", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_1", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_1", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_1", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_1", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_1", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_1", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_1", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_1", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_1", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_1", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_1", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_1", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_1", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_1", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_1", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_1", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_1", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_1", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_1", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_1", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_1", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_1", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_1", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_1", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_1", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_1", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_1", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_1", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_1", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_1", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_1", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_1", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_1", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_1", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_1", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_1", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_1", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_1", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_1", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_1", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_1", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_1", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_1", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_1", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_1", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_1", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_1", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_1", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_1", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_1", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_1", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_1", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_1", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_1", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_1", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_1", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_1", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_1", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_1", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_1", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_1", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 10 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_0", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_0", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_0", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_0", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_0", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_0", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_0", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_0", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_0", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_0", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_0", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_0", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_0", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_0", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_0", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_0", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_0", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_0", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_0", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_0", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_0", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_0", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_0", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_0", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_0", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_0", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_0", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_0", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_0", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_0", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_0", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_0", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_0", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_0", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_0", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_0", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_0", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_0", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_0", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_0", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_0", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_0", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_0", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_0", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_0", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_0", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_0", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_0", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_0", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_0", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_0", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_0", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_0", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_0", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_0", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_0", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_0", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_0", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_0", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_0", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_0", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_0", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_0", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_0", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_0", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_0", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_0", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_0", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_0", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_0", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_0", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_0", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_0", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_0", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_0", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_0", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_0", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_0", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_0", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_0", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_0", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_0", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_0", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_0", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_0", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_0", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_0", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_0", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_0", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_0", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_0", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_0", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_0", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_0", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_0", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_0", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_0", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_0", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_0", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_0", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_0", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_0", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_0", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_0", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_0", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_0", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_0", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_0", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_0", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_0", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_0", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_0", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_0", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_0", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_0", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_0", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_0", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_0", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_0", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_0", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_0", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_0", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_0", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_0", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -9 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_19", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_19", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_19", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_19", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_19", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_19", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_19", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_19", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_19", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_19", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_19", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_19", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_19", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_19", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_19", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_19", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_19", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_19", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_19", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_19", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_19", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_19", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_19", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_19", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_19", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_19", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_19", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_19", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_19", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_19", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_19", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_19", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_19", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_19", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_19", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_19", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_19", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_19", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_19", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_19", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_19", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_19", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_19", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_19", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_19", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_19", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_19", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_19", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_19", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_19", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_19", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_19", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_19", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_19", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_19", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_19", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_19", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_19", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_19", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_19", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_19", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_19", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_19", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_19", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_19", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_19", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_19", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_19", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_19", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_19", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_19", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_19", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_19", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_19", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_19", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_19", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_19", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_19", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_19", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_19", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_19", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_19", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_19", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_19", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_19", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_19", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_19", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_19", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_19", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_19", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_19", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_19", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_19", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_19", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_19", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_19", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_19", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_19", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_19", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_19", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_19", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_19", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_19", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_19", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_19", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_19", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_19", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_19", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_19", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_19", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_19", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_19", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_19", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_19", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_19", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_19", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_19", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_19", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_19", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_19", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_19", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_19", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_19", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_19", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_19", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_19", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_19", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_19", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_19", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_19", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_19", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_19", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_19", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_19", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_19", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_19", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_19", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_19", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_19", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_19", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_19", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_19", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_19", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_19", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_19", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_19", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_19", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_19", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_19", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_19", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_19", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_19", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_19", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_19", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_19", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_19", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_19", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_19", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_19", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_19", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_19", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_19", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_19", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_19", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_19", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_19", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_19", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_19", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_19", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_19", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_19", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_19", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_19", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_19", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_19", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_19", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_19", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_19", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_19", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_19", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_19", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_19", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_19", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_19", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_19", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_19", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_19", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_19", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_19", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_19", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_19", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_19", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_19", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_19", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_19", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_19", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_19", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_19", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_19", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_19", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_19", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_19", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_19", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_19", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_19", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_19", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -8 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_18", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_18", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_18", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_18", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_18", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_18", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_18", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_18", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_18", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_18", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_18", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_18", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_18", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_18", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_18", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_18", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_18", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_18", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_18", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_18", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_18", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_18", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_18", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_18", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_18", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_18", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_18", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_18", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_18", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_18", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_18", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_18", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_18", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_18", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_18", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_18", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_18", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_18", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_18", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_18", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_18", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_18", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_18", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_18", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_18", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_18", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_18", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_18", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_18", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_18", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_18", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_18", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_18", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_18", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_18", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_18", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_18", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_18", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_18", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_18", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_18", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_18", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_18", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_18", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_18", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_18", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_18", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_18", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_18", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_18", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_18", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_18", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_18", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_18", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_18", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_18", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_18", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_18", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_18", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_18", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_18", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_18", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_18", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_18", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_18", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_18", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_18", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_18", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_18", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_18", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_18", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_18", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_18", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_18", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_18", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_18", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_18", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_18", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_18", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_18", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_18", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_18", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_18", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_18", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_18", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_18", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_18", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_18", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_18", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_18", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_18", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_18", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_18", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_18", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_18", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_18", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_18", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_18", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_18", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_18", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_18", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_18", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_18", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_18", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_18", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_18", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_18", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_18", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_18", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_18", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_18", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_18", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_18", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_18", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_18", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_18", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_18", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_18", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_18", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_18", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_18", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_18", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_18", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_18", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_18", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_18", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_18", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_18", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_18", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_18", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_18", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_18", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_18", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_18", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_18", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_18", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_18", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_18", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_18", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_18", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_18", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_18", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_18", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_18", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_18", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_18", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_18", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_18", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_18", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_18", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_18", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_18", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_18", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_18", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_18", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_18", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_18", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_18", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_18", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_18", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_18", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_18", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_18", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_18", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_18", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_18", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_18", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_18", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_18", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_18", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_18", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_18", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_17", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_17", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_17", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_17", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_17", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_17", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_17", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_17", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_17", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_17", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_17", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_17", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_17", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_17", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_17", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_17", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_17", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_17", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_17", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_17", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_17", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_17", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_17", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_17", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_17", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_17", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_17", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_17", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_17", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_17", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_17", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_17", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_17", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_17", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_17", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_17", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_17", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_17", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_17", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_17", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_17", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_17", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_17", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_17", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_17", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_17", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_17", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_17", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_17", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_17", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_17", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_17", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_17", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_17", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_17", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_17", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_17", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_17", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_17", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_17", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_17", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_17", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_17", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_17", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_17", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_17", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_17", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_17", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_17", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_17", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_17", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_17", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_17", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_17", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_17", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_17", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_17", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_17", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_17", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_17", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_17", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_17", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_17", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_17", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_17", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_17", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_17", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_17", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_17", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_17", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_17", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_17", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_17", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_17", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_17", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_17", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_17", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_17", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_17", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_17", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_17", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_17", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_17", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_17", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_17", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_17", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_17", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_17", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_17", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_17", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_17", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_17", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_17", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_17", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_17", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_17", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_17", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_17", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_17", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_17", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_17", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_17", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_17", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_17", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_17", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_17", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_17", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_17", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_17", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_17", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_17", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_17", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_17", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_17", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_17", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_17", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_17", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_17", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_17", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_17", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_17", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_17", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_17", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_17", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_17", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_17", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_17", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_17", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_17", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_17", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_17", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_17", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_17", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_17", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_17", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_17", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_17", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_17", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_17", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_17", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_17", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_17", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_17", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_17", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_17", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_17", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_17", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_17", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_17", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_17", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_17", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_17", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_17", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_17", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_17", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_17", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_17", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_17", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_17", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_17", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_17", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_17", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_17", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_17", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_17", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_17", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_17", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_17", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_17", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_17", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_17", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_17", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_16", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_16", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_16", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_16", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_16", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_16", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_16", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_16", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_16", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_16", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_16", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_16", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_16", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_16", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_16", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_16", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_16", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_16", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_16", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_16", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_16", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_16", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_16", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_16", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_16", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_16", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_16", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_16", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_16", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_16", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_16", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_16", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_16", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_16", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_16", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_16", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_16", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_16", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_16", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_16", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_16", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_16", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_16", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_16", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_16", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_16", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_16", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_16", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_16", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_16", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_16", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_16", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_16", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_16", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_16", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_16", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_16", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_16", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_16", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_16", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_16", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_16", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_16", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_16", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_16", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_16", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_16", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_16", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_16", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_16", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_16", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_16", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_16", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_16", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_16", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_16", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_16", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_16", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_16", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_16", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_16", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_16", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_16", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_16", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_16", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_16", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_16", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_16", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_16", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_16", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_16", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_16", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_16", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_16", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_16", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_16", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_16", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_16", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_16", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_16", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_16", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_16", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_16", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_16", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_16", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_16", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_16", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_16", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_16", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_16", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_16", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_16", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_16", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_16", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_16", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_16", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_16", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_16", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_16", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_16", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_16", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_16", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_16", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_16", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_16", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_16", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_16", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_16", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_16", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_16", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_16", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_16", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_16", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_16", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_16", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_16", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_16", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_16", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_16", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_16", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_16", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_16", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_16", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_16", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_16", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_16", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_16", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_16", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_16", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_16", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_16", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_16", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_16", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_16", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_16", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_16", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_16", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_16", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_16", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_16", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_16", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_16", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_16", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_16", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_16", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_16", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_16", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_16", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_16", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_16", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_16", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_16", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_16", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_16", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_16", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_16", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_16", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_16", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_16", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_16", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_16", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_16", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_16", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_16", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_16", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_16", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_16", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_16", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_16", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_16", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_16", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_16", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_15", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_15", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_15", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_15", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_15", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_15", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_15", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_15", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_15", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_15", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_15", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_15", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_15", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_15", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_15", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_15", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_15", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_15", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_15", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_15", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_15", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_15", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_15", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_15", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_15", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_15", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_15", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_15", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_15", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_15", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_15", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_15", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_15", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_15", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_15", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_15", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_15", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_15", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_15", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_15", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_15", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_15", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_15", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_15", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_15", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_15", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_15", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_15", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_15", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_15", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_15", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_15", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_15", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_15", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_15", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_15", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_15", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_15", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_15", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_15", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_15", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_15", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_15", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_15", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_15", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_15", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_15", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_15", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_15", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_15", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_15", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_15", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_15", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_15", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_15", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_15", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_15", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_15", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_15", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_15", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_15", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_15", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_15", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_15", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_15", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_15", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_15", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_15", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_15", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_15", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_15", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_15", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_15", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_15", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_15", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_15", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_15", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_15", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_15", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_15", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_15", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_15", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_15", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_15", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_15", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_15", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_15", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_15", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_15", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_15", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_15", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_15", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_15", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_15", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_15", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_15", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_15", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_15", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_15", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_15", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_15", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_15", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_15", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_15", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_15", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_15", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_15", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_15", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_15", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_15", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_15", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_15", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_15", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_15", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_15", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_15", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_15", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_15", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_15", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_15", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_15", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_15", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_15", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_15", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_15", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_15", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_15", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_15", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_15", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_15", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_15", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_15", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_15", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_15", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_15", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_15", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_15", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_15", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_15", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_15", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_15", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_15", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_15", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_15", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_15", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_15", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_15", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_15", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_15", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_15", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_15", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_15", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_15", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_15", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_15", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_15", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_15", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_15", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_15", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_15", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_15", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_15", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_15", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_15", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_15", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_15", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_15", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_15", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_15", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_15", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_15", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_15", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_14", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_14", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_14", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_14", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_14", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_14", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_14", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_14", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_14", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_14", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_14", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_14", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_14", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_14", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_14", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_14", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_14", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_14", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_14", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_14", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_14", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_14", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_14", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_14", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_14", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_14", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_14", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_14", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_14", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_14", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_14", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_14", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_14", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_14", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_14", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_14", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_14", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_14", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_14", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_14", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_14", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_14", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_14", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_14", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_14", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_14", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_14", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_14", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_14", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_14", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_14", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_14", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_14", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_14", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_14", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_14", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_14", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_14", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_14", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_14", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_14", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_14", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_14", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_14", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_14", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_14", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_14", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_14", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_14", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_14", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_14", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_14", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_14", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_14", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_14", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_14", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_14", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_14", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_14", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_14", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_14", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_14", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_14", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_14", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_14", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_14", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_14", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_14", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_14", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_14", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_14", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_14", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_14", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_14", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_14", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_14", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_14", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_14", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_14", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_14", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_14", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_14", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_14", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_14", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_14", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_14", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_14", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_14", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_14", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_14", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_14", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_14", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_14", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_14", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_14", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_14", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_14", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_14", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_14", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_14", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_14", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_14", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_14", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_14", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_14", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_14", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_14", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_14", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_14", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_14", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_14", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_14", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_14", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_14", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_14", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_14", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_14", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_14", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_14", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_14", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_14", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_14", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_14", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_14", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_14", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_14", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_14", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_14", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_14", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_14", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_14", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_14", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_14", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_14", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_14", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_14", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_14", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_14", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_14", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_14", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_14", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_14", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_14", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_14", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_14", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_14", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_14", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_14", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_14", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_14", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_14", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_14", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_14", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_14", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_14", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_14", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_14", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_14", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_14", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_14", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_14", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_14", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_14", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_14", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_14", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_14", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_14", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_14", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_14", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_14", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_14", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_14", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_13", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_13", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_13", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_13", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_13", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_13", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_13", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_13", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_13", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_13", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_13", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_13", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_13", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_13", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_13", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_13", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_13", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_13", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_13", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_13", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_13", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_13", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_13", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_13", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_13", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_13", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_13", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_13", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_13", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_13", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_13", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_13", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_13", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_13", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_13", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_13", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_13", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_13", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_13", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_13", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_13", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_13", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_13", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_13", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_13", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_13", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_13", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_13", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_13", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_13", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_13", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_13", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_13", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_13", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_13", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_13", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_13", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_13", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_13", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_13", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_13", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_13", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_13", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_13", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_13", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_13", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_13", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_13", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_13", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_13", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_13", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_13", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_13", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_13", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_13", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_13", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_13", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_13", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_13", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_13", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_13", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_13", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_13", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_13", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_13", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_13", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_13", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_13", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_13", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_13", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_13", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_13", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_13", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_13", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_13", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_13", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_13", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_13", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_13", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_13", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_13", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_13", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_13", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_13", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_13", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_13", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_13", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_13", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_13", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_13", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_13", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_13", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_13", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_13", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_13", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_13", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_13", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_13", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_13", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_13", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_13", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_13", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_13", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_13", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_13", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_13", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_13", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_13", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_13", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_13", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_13", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_13", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_13", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_13", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_13", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_13", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_13", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_13", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_13", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_13", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_13", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_13", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_13", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_13", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_13", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_13", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_13", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_13", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_13", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_13", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_13", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_13", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_13", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_13", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_13", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_13", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_13", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_13", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_13", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_13", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_13", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_13", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_13", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_13", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_13", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_13", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_13", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_13", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_13", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_13", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_13", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_13", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_13", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_13", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_13", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_13", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_13", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_13", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_13", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_13", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_13", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_13", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_13", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_13", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_13", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_13", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_13", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_13", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_13", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_13", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_13", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_13", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_12", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_12", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_12", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_12", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_12", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_12", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_12", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_12", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_12", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_12", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_12", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_12", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_12", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_12", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_12", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_12", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_12", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_12", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_12", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_12", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_12", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_12", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_12", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_12", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_12", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_12", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_12", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_12", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_12", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_12", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_12", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_12", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_12", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_12", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_12", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_12", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_12", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_12", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_12", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_12", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_12", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_12", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_12", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_12", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_12", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_12", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_12", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_12", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_12", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_12", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_12", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_12", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_12", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_12", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_12", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_12", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_12", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_12", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_12", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_12", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_12", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_12", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_12", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_12", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_12", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_12", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_12", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_12", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_12", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_12", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_12", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_12", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_12", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_12", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_12", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_12", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_12", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_12", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_12", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_12", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_12", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_12", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_12", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_12", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_12", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_12", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_12", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_12", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_12", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_12", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_12", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_12", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_12", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_12", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_12", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_12", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_12", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_12", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_12", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_12", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_12", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_12", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_12", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_12", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_12", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_12", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_12", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_12", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_12", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_12", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_12", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_12", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_12", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_12", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_12", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_12", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_12", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_12", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_12", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_12", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_12", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_12", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_12", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_12", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_12", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_12", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_12", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_12", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_12", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_12", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_12", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_12", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_12", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_12", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_12", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_12", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_12", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_12", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_12", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_12", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_12", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_12", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_12", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_12", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_12", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_12", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_12", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_12", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_12", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_12", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_12", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_12", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_12", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_12", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_12", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_12", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_12", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_12", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_12", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_12", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_12", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_12", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_12", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_12", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_12", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_12", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_12", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_12", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_12", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_12", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_12", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_12", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_12", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_12", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_12", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_12", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_12", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_12", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_12", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_12", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_12", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_12", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_12", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_12", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_12", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_12", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_12", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_12", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_12", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_12", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_12", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_12", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_11", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_11", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_11", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_11", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_11", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_11", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_11", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_11", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_11", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_11", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_11", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_11", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_11", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_11", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_11", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_11", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_11", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_11", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_11", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_11", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_11", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_11", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_11", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_11", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_11", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_11", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_11", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_11", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_11", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_11", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_11", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_11", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_11", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_11", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_11", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_11", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_11", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_11", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_11", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_11", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_11", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_11", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_11", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_11", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_11", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_11", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_11", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_11", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_11", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_11", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_11", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_11", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_11", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_11", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_11", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_11", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_11", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_11", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_11", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_11", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_11", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_11", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_11", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_11", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_11", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_11", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_11", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_11", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_11", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_11", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_11", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_11", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_11", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_11", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_11", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_11", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_11", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_11", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_11", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_11", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_11", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_11", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_11", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_11", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_11", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_11", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_11", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_11", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_11", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_11", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_11", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_11", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_11", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_11", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_11", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_11", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_11", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_11", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_11", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_11", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_11", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_11", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_11", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_11", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_11", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_11", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_11", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_11", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_11", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_11", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_11", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_11", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_11", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_11", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_11", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_11", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_11", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_11", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_11", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_11", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_11", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_11", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_11", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_11", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_11", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_11", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_11", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_11", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_11", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_11", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_11", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_11", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_11", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_11", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_11", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_11", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_11", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_11", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_11", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_11", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_11", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_11", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_11", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_11", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_11", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_11", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_11", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_11", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_11", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_11", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_11", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_11", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_11", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_11", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_11", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_11", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_11", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_11", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_11", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_11", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_11", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_11", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_11", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_11", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_11", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_11", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_11", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_11", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_11", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_11", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_11", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_11", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_11", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_11", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_11", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_11", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_11", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_11", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_11", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_11", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_11", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_11", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_11", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_11", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_11", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_11", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_11", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_11", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_11", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_11", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_11", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_11", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_10", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_10", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_10", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_10", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_10", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_10", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_10", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_10", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_10", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_10", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_10", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_10", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_10", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_10", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_10", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_10", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_10", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_10", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_10", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_10", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_10", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_10", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_10", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_10", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_10", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_10", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_10", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_10", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_10", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_10", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_10", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_10", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_10", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_10", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_10", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_10", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_10", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_10", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_10", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_10", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_10", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_10", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_10", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_10", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_10", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_10", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_10", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_10", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_10", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_10", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_10", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_10", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_10", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_10", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_10", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_10", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_10", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_10", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_10", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_10", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_10", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_10", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_10", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_10", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_10", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_10", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_10", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_10", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_10", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_10", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_10", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_10", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_10", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_10", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_10", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_10", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_10", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_10", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_10", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_10", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_10", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_10", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_10", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_10", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_10", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_10", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_10", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_10", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_10", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_10", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_10", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_10", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_10", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_10", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_10", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_10", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_10", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_10", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_10", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_10", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_10", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_10", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_10", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_10", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_10", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_10", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_10", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_10", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_10", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_10", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_10", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_10", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_10", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_10", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_10", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_10", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_10", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_10", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_10", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_10", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_10", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_10", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_10", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_10", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_10", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_10", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_10", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_10", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_10", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_10", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_10", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_10", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_10", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_10", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_10", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_10", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_10", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_10", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_10", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_10", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_10", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_10", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_10", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_10", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_10", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_10", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_10", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_10", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_10", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_10", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_10", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_10", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_10", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_10", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_10", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_10", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_10", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_10", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_10", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_10", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_10", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_10", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_10", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_10", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_10", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_10", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_10", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_10", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_10", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_10", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_10", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_10", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_10", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_10", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_10", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_10", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_10", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_10", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_10", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_10", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_10", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_10", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_10", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_10", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_10", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_10", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_10", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_10", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_10", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_10", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_10", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_10", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_9", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_9", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_9", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_9", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_9", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_9", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_9", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_9", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_9", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_9", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_9", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_9", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_9", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_9", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_9", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_9", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_9", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_9", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_9", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_9", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_9", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_9", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_9", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_9", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_9", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_9", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_9", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_9", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_9", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_9", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_9", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_9", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_9", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_9", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_9", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_9", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_9", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_9", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_9", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_9", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_9", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_9", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_9", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_9", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_9", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_9", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_9", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_9", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_9", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_9", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_9", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_9", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_9", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_9", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_9", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_9", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_9", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_9", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_9", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_9", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_9", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_9", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_9", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_9", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_9", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_9", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_9", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_9", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_9", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_9", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_9", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_9", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_9", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_9", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_9", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_9", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_9", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_9", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_9", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_9", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_9", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_9", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_9", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_9", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_9", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_9", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_9", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_9", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_9", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_9", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_9", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_9", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_9", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_9", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_9", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_9", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_9", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_9", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_9", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_9", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_9", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_9", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_9", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_9", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_9", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_9", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_9", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_9", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_9", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_9", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_9", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_9", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_9", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_9", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_9", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_9", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_9", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_9", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_9", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_9", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_9", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_9", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_9", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_9", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_9", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_9", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_9", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_9", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_9", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_9", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_9", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_9", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_9", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_9", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_9", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_9", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_9", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_9", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_9", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_9", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_9", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_9", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_9", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_9", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_9", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_9", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_9", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_9", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_9", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_9", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_9", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_9", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_9", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_9", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_9", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_9", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_9", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_9", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_9", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_9", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_9", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_9", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_9", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_9", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_9", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_9", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_9", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_9", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_9", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_9", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_9", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_9", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_9", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_9", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_9", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_9", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_9", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_9", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_9", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_9", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_9", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_9", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_9", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_9", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_9", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_9", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_9", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_9", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_9", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_9", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_9", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_9", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_8", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_8", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_8", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_8", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_8", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_8", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_8", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_8", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_8", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_8", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_8", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_8", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_8", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_8", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_8", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_8", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_8", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_8", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_8", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_8", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_8", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_8", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_8", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_8", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_8", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_8", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_8", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_8", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_8", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_8", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_8", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_8", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_8", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_8", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_8", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_8", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_8", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_8", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_8", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_8", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_8", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_8", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_8", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_8", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_8", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_8", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_8", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_8", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_8", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_8", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_8", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_8", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_8", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_8", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_8", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_8", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_8", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_8", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_8", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_8", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_8", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_8", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_8", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_8", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_8", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_8", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_8", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_8", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_8", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_8", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_8", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_8", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_8", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_8", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_8", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_8", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_8", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_8", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_8", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_8", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_8", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_8", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_8", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_8", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_8", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_8", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_8", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_8", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_8", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_8", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_8", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_8", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_8", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_8", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_8", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_8", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_8", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_8", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_8", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_8", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_8", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_8", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_8", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_8", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_8", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_8", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_8", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_8", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_8", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_8", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_8", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_8", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_8", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_8", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_8", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_8", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_8", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_8", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_8", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_8", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_8", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_8", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_8", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_8", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_8", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_8", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_8", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_8", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_8", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_8", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_8", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_8", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_8", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_8", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_8", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_8", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_8", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_8", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_8", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_8", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_8", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_8", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_8", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_8", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_8", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_8", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_8", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_8", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_8", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_8", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_8", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_8", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_8", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_8", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_8", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_8", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_8", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_8", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_8", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_8", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_8", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_8", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_8", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_8", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_8", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_8", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_8", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_8", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_8", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_8", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_8", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_8", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_8", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_8", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_8", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_8", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_8", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_8", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_8", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_8", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_8", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_8", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_8", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_8", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_8", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_8", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_8", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_8", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_8", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_8", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_8", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_8", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_7", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_7", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_7", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_7", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_7", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_7", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_7", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_7", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_7", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_7", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_7", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_7", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_7", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_7", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_7", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_7", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_7", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_7", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_7", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_7", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_7", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_7", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_7", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_7", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_7", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_7", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_7", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_7", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_7", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_7", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_7", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_7", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_7", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_7", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_7", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_7", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_7", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_7", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_7", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_7", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_7", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_7", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_7", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_7", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_7", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_7", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_7", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_7", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_7", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_7", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_7", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_7", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_7", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_7", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_7", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_7", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_7", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_7", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_7", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_7", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_7", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_7", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_7", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_7", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_7", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_7", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_7", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_7", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_7", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_7", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_7", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_7", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_7", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_7", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_7", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_7", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_7", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_7", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_7", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_7", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_7", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_7", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_7", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_7", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_7", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_7", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_7", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_7", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_7", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_7", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_7", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_7", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_7", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_7", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_7", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_7", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_7", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_7", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_7", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_7", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_7", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_7", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_7", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_7", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_7", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_7", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_7", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_7", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_7", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_7", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_7", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_7", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_7", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_7", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_7", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_7", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_7", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_7", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_7", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_7", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_7", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_7", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_7", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_7", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_7", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_7", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_7", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_7", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_7", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_7", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_7", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_7", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_7", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_7", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_7", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_7", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_7", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_7", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_7", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_7", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_7", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_7", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_7", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_7", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_7", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_7", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_7", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_7", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_7", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_7", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_7", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_7", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_7", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_7", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_7", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_7", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_7", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_7", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_7", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_7", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_7", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_7", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_7", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_7", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_7", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_7", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_7", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_7", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_7", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_7", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_7", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_7", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_7", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_7", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_7", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_7", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_7", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_7", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_7", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_7", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_7", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_7", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_7", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_7", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_7", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_7", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_7", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_7", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_7", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_7", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_7", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_7", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_6", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_6", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_6", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_6", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_6", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_6", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_6", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_6", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_6", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_6", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_6", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_6", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_6", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_6", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_6", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_6", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_6", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_6", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_6", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_6", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_6", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_6", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_6", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_6", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_6", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_6", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_6", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_6", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_6", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_6", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_6", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_6", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_6", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_6", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_6", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_6", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_6", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_6", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_6", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_6", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_6", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_6", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_6", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_6", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_6", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_6", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_6", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_6", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_6", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_6", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_6", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_6", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_6", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_6", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_6", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_6", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_6", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_6", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_6", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_6", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_6", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_6", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_6", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_6", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_6", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_6", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_6", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_6", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_6", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_6", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_6", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_6", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_6", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_6", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_6", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_6", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_6", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_6", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_6", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_6", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_6", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_6", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_6", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_6", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_6", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_6", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_6", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_6", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_6", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_6", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_6", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_6", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_6", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_6", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_6", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_6", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_6", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_6", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_6", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_6", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_6", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_6", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_6", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_6", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_6", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_6", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_6", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_6", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_6", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_6", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_6", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_6", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_6", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_6", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_6", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_6", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_6", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_6", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_6", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_6", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_6", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_6", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_6", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_6", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_6", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_6", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_6", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_6", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_6", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_6", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_6", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_6", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_6", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_6", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_6", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_6", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_6", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_6", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_6", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_6", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_6", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_6", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_6", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_6", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_6", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_6", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_6", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_6", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_6", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_6", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_6", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_6", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_6", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_6", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_6", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_6", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_6", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_6", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_6", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_6", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_6", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_6", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_6", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_6", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_6", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_6", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_6", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_6", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_6", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_6", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_6", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_6", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_6", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_6", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_6", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_6", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_6", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_6", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_6", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_6", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_6", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_6", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_6", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_6", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_6", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_6", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_6", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_6", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_6", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_6", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_6", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_6", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_5", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_5", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_5", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_5", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_5", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_5", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_5", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_5", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_5", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_5", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_5", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_5", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_5", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_5", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_5", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_5", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_5", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_5", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_5", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_5", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_5", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_5", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_5", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_5", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_5", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_5", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_5", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_5", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_5", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_5", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_5", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_5", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_5", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_5", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_5", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_5", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_5", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_5", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_5", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_5", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_5", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_5", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_5", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_5", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_5", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_5", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_5", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_5", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_5", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_5", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_5", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_5", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_5", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_5", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_5", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_5", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_5", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_5", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_5", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_5", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_5", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_5", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_5", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_5", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_5", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_5", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_5", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_5", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_5", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_5", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_5", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_5", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_5", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_5", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_5", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_5", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_5", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_5", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_5", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_5", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_5", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_5", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_5", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_5", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_5", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_5", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_5", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_5", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_5", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_5", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_5", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_5", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_5", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_5", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_5", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_5", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_5", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_5", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_5", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_5", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_5", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_5", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_5", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_5", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_5", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_5", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_5", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_5", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_5", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_5", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_5", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_5", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_5", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_5", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_5", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_5", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_5", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_5", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_5", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_5", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_5", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_5", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_5", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_5", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_5", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_5", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_5", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_5", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_5", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_5", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_5", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_5", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_5", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_5", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_5", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_5", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_5", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_5", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_5", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_5", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_5", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_5", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_5", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_5", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_5", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_5", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_5", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_5", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_5", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_5", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_5", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_5", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_5", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_5", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_5", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_5", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_5", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_5", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_5", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_5", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_5", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_5", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_5", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_5", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_5", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_5", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_5", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_5", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_5", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_5", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_5", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_5", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_5", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_5", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_5", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_5", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_5", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_5", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_5", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_5", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_5", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_5", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_5", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_5", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_5", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_5", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_5", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_5", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_5", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_5", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_5", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_5", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 6 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_4", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_4", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_4", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_4", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_4", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_4", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_4", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_4", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_4", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_4", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_4", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_4", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_4", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_4", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_4", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_4", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_4", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_4", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_4", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_4", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_4", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_4", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_4", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_4", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_4", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_4", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_4", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_4", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_4", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_4", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_4", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_4", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_4", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_4", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_4", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_4", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_4", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_4", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_4", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_4", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_4", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_4", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_4", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_4", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_4", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_4", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_4", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_4", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_4", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_4", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_4", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_4", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_4", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_4", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_4", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_4", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_4", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_4", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_4", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_4", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_4", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_4", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_4", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_4", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_4", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_4", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_4", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_4", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_4", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_4", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_4", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_4", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_4", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_4", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_4", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_4", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_4", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_4", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_4", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_4", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_4", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_4", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_4", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_4", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_4", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_4", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_4", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_4", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_4", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_4", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_4", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_4", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_4", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_4", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_4", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_4", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_4", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_4", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_4", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_4", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_4", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_4", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_4", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_4", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_4", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_4", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_4", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_4", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_4", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_4", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_4", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_4", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_4", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_4", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_4", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_4", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_4", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_4", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_4", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_4", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_4", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_4", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_4", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_4", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_4", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_4", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_4", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_4", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_4", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_4", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_4", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_4", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_4", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_4", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_4", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_4", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_4", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_4", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_4", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_4", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_4", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_4", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_4", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_4", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_4", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_4", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_4", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_4", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_4", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_4", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_4", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_4", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_4", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_4", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_4", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_4", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_4", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_4", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_4", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_4", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_4", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_4", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_4", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_4", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_4", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_4", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_4", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_4", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_4", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_4", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_4", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_4", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_4", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_4", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_4", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_4", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_4", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_4", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_4", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_4", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_4", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_4", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_4", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_4", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_4", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_4", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_4", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_4", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_4", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_4", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_4", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_4", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 7 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_3", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_3", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_3", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_3", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_3", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_3", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_3", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_3", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_3", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_3", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_3", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_3", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_3", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_3", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_3", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_3", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_3", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_3", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_3", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_3", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_3", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_3", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_3", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_3", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_3", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_3", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_3", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_3", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_3", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_3", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_3", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_3", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_3", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_3", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_3", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_3", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_3", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_3", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_3", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_3", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_3", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_3", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_3", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_3", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_3", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_3", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_3", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_3", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_3", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_3", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_3", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_3", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_3", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_3", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_3", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_3", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_3", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_3", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_3", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_3", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_3", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_3", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_3", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_3", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_3", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_3", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_3", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_3", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_3", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_3", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_3", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_3", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_3", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_3", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_3", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_3", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_3", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_3", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_3", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_3", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_3", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_3", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_3", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_3", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_3", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_3", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_3", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_3", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_3", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_3", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_3", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_3", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_3", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_3", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_3", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_3", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_3", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_3", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_3", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_3", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_3", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_3", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_3", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_3", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_3", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_3", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_3", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_3", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_3", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_3", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_3", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_3", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_3", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_3", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_3", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_3", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_3", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_3", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_3", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_3", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_3", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_3", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_3", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_3", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_3", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_3", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_3", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_3", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_3", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_3", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_3", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_3", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_3", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_3", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_3", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_3", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_3", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_3", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_3", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_3", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_3", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_3", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_3", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_3", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_3", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_3", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_3", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_3", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_3", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_3", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_3", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_3", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_3", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_3", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_3", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_3", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_3", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_3", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_3", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_3", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_3", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_3", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_3", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_3", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_3", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_3", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_3", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_3", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_3", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_3", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_3", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_3", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_3", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_3", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_3", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_3", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_3", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_3", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_3", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_3", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_3", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_3", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_3", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_3", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_3", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_3", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_3", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_3", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_3", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_3", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_3", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 8 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_2", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_2", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_2", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_2", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_2", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_2", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_2", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_2", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_2", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_2", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_2", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_2", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_2", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_2", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_2", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_2", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_2", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_2", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_2", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_2", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_2", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_2", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_2", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_2", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_2", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_2", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_2", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_2", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_2", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_2", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_2", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_2", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_2", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_2", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_2", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_2", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_2", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_2", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_2", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_2", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_2", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_2", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_2", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_2", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_2", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_2", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_2", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_2", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_2", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_2", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_2", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_2", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_2", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_2", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_2", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_2", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_2", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_2", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_2", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_2", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_2", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_2", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_2", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_2", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_2", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_2", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_2", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_2", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_2", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_2", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_2", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_2", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_2", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_2", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_2", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_2", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_2", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_2", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_2", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_2", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_2", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_2", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_2", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_2", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_2", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_2", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_2", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_2", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_2", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_2", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_2", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_2", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_2", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_2", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_2", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_2", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_2", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_2", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_2", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_2", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_2", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_2", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_2", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_2", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_2", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_2", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_2", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_2", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_2", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_2", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_2", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_2", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_2", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_2", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_2", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_2", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_2", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_2", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_2", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_2", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_2", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_2", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_2", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_2", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_2", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_2", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_2", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_2", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_2", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_2", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_2", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_2", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_2", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_2", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_2", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_2", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_2", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_2", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_2", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_2", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_2", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_2", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_2", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_2", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_2", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_2", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_2", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_2", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_2", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_2", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_2", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_2", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_2", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_2", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_2", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_2", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_2", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_2", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_2", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_2", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_2", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_2", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_2", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_2", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_2", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_2", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_2", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_2", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_2", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_2", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_2", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_2", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_2", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_2", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_2", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_2", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_2", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_2", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_2", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_2", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_2", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_2", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_2", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_2", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_2", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_2", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_2", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_2", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_2", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_2", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_2", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_2", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 9 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_1", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_1", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_1", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_1", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_1", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_1", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_1", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_1", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_1", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_1", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_1", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_1", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_1", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_1", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_1", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_1", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_1", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_1", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_1", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_1", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_1", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_1", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_1", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_1", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_1", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_1", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_1", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_1", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_1", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_1", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_1", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_1", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_1", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_1", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_1", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_1", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_1", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_1", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_1", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_1", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_1", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_1", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_1", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_1", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_1", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_1", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_1", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_1", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_1", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_1", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_1", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_1", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_1", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_1", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_1", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_1", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_1", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_1", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_1", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_1", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_1", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_1", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_1", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_1", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_1", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_1", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_1", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_1", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_1", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_1", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_1", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_1", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_1", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_1", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_1", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_1", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_1", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_1", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_1", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_1", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_1", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_1", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_1", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_1", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_1", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_1", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_1", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_1", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_1", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_1", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_1", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_1", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_1", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_1", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_1", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_1", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_1", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_1", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_1", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_1", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_1", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_1", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_1", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_1", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_1", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_1", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_1", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_1", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_1", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_1", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_1", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_1", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_1", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_1", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_1", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_1", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_1", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_1", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_1", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_1", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_1", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_1", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_1", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_1", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_1", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_1", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_1", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_1", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_1", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_1", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_1", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_1", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_1", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_1", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_1", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_1", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_1", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_1", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_1", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_1", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_1", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_1", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_1", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_1", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_1", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_1", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_1", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_1", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_1", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_1", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_1", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_1", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_1", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_1", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_1", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_1", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_1", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_1", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_1", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_1", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_1", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_1", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_1", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_1", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_1", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_1", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_1", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_1", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_1", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_1", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_1", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_1", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_1", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_1", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_1", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_1", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_1", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_1", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_1", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_1", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_1", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_1", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_1", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_1", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_1", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_1", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_1", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_1", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_1", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_1", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_1", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_1", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 10 + ], + "tile_types": [ + "CFG_CENTER_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_0", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_0", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_0", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_0", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_0", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_0", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_0", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_0", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_0", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_0", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_0", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_0", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_0", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_0", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_0", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_0", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_0", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_0", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_0", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_0", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_0", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_0", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_0", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_0", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_0", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_0", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_0", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_0", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_0", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_0", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_0", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_0", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_0", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_0", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_0", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_0", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_0", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_0", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_0", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_0", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_0", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_0", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_0", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_0", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_0", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_0", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_0", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_0", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_0", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_0", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_0", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_0", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_0", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_0", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_0", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_0", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_0", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_0", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_0", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_0", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_0", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_0", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_0", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_0", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_0", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_0", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_0", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_0", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_0", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_0", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_0", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_0", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_0", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_0", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_0", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_0", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_0", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_0", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_0", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_0", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_0", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_0", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_0", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_0", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_0", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_0", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_0", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_0", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_0", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_0", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_0", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_0", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_0", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_0", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_0", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_0", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_0", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_0", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_0", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_0", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_0", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_0", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_0", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_0", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_0", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_0", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_0", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_0", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_0", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_0", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_0", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_0", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_0", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_0", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_0", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_0", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_0", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_0", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_0", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_0", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_0", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_0", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_0", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_0", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_0", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_0", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_0", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_0", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_0", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_0", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_0", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_0", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_0", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_0", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_0", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_0", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_0", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_0", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_0", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_0", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_0", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_0", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_0", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_0", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_0", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_0", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_0", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_0", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_0", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_0", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_0", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_0", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_0", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_0", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_0", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_0", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_0", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_0", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_0", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_0", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_0", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_0", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_0", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_0", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_0", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_0", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_0", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_0", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_0", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_0", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_0", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_0", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_0", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_0", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_0", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_0", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_0", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_0", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_0", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_0", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_0", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_0", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_0", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_0", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_0", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_0", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_0", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_0", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_0", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_0", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_0", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_0", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -10 + ], + "tile_types": [ + "CFG_CENTER_MID", + "CFG_CENTER_TOP" + ], + "wire_pairs": [ + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA11", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA11" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA12", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA12" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA13", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA13" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA14", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA14" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA15", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA15" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA16", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA16" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA17", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA17" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA18", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA18" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA19", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA19" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA20", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA20" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA21", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA21" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA22", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA22" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA23", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA23" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA24", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA24" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA25", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA25" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA26", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA26" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA27", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA27" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA28", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA28" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA29", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA29" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA30", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA30" + ], + [ + "CFG_CENTER_MID_CFG_IO_ACCESS_CFGDATA31", + "CFG_CENTER_TOP_CFG_IO_ACCESS_CFGDATA31" + ], + [ + "CFG_CENTER_MID_DNA_PORT_CLK", + "CFG_CENTER_TOP_DNA_PORT_CLK" + ], + [ + "CFG_CENTER_MID_ICAP1_CLK", + "CFG_CENTER_TOP_ICAP1_CLK" + ] + ] + }, + { + "grid_deltas": [ + -1, + 6 + ], + "tile_types": [ + "CFG_CENTER_MID", + "HCLK_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_CK_BUFHCLK0", + "HCLK_FEEDTHRU_2_CK_BUFHCLK0" + ], + [ + "CFG_CENTER_CK_BUFHCLK1", + "HCLK_FEEDTHRU_2_CK_BUFHCLK1" + ], + [ + "CFG_CENTER_CK_BUFHCLK2", + "HCLK_FEEDTHRU_2_CK_BUFHCLK2" + ], + [ + "CFG_CENTER_CK_BUFHCLK3", + "HCLK_FEEDTHRU_2_CK_BUFHCLK3" + ], + [ + "CFG_CENTER_CK_BUFHCLK4", + "HCLK_FEEDTHRU_2_CK_BUFHCLK4" + ], + [ + "CFG_CENTER_CK_BUFHCLK5", + "HCLK_FEEDTHRU_2_CK_BUFHCLK5" + ], + [ + "CFG_CENTER_CK_BUFHCLK6", + "HCLK_FEEDTHRU_2_CK_BUFHCLK6" + ], + [ + "CFG_CENTER_CK_BUFHCLK7", + "HCLK_FEEDTHRU_2_CK_BUFHCLK7" + ], + [ + "CFG_CENTER_CK_BUFHCLK8", + "HCLK_FEEDTHRU_2_CK_BUFHCLK8" + ], + [ + "CFG_CENTER_CK_BUFHCLK9", + "HCLK_FEEDTHRU_2_CK_BUFHCLK9" + ], + [ + "CFG_CENTER_CK_BUFHCLK10", + "HCLK_FEEDTHRU_2_CK_BUFHCLK10" + ], + [ + "CFG_CENTER_CK_BUFHCLK11", + "HCLK_FEEDTHRU_2_CK_BUFHCLK11" + ], + [ + "CFG_CENTER_CK_BUFRCLK0", + "HCLK_FEEDTHRU_2_CK_BUFRCLK0" + ], + [ + "CFG_CENTER_CK_BUFRCLK1", + "HCLK_FEEDTHRU_2_CK_BUFRCLK1" + ], + [ + "CFG_CENTER_CK_BUFRCLK2", + "HCLK_FEEDTHRU_2_CK_BUFRCLK2" + ], + [ + "CFG_CENTER_CK_BUFRCLK3", + "HCLK_FEEDTHRU_2_CK_BUFRCLK3" + ], + [ + "CFG_CENTER_CK_IN0", + "HCLK_FEEDTHRU_2_CK_IN0" + ], + [ + "CFG_CENTER_CK_IN1", + "HCLK_FEEDTHRU_2_CK_IN1" + ], + [ + "CFG_CENTER_CK_IN2", + "HCLK_FEEDTHRU_2_CK_IN2" + ], + [ + "CFG_CENTER_CK_IN3", + "HCLK_FEEDTHRU_2_CK_IN3" + ], + [ + "CFG_CENTER_CK_IN4", + "HCLK_FEEDTHRU_2_CK_IN4" + ], + [ + "CFG_CENTER_CK_IN5", + "HCLK_FEEDTHRU_2_CK_IN5" + ], + [ + "CFG_CENTER_CK_IN6", + "HCLK_FEEDTHRU_2_CK_IN6" + ], + [ + "CFG_CENTER_CK_IN7", + "HCLK_FEEDTHRU_2_CK_IN7" + ], + [ + "CFG_CENTER_CK_IN8", + "HCLK_FEEDTHRU_2_CK_IN8" + ], + [ + "CFG_CENTER_CK_IN9", + "HCLK_FEEDTHRU_2_CK_IN9" + ], + [ + "CFG_CENTER_CK_IN10", + "HCLK_FEEDTHRU_2_CK_IN10" + ], + [ + "CFG_CENTER_CK_IN11", + "HCLK_FEEDTHRU_2_CK_IN11" + ], + [ + "CFG_CENTER_CK_IN12", + "HCLK_FEEDTHRU_2_CK_IN12" + ], + [ + "CFG_CENTER_CK_IN13", + "HCLK_FEEDTHRU_2_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 6 + ], + "tile_types": [ + "CFG_CENTER_MID", + "HCLK_VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_CK_BUFHCLK0", + "HCLK_VFRAME_CK_BUFHCLK0" + ], + [ + "CFG_CENTER_CK_BUFHCLK1", + "HCLK_VFRAME_CK_BUFHCLK1" + ], + [ + "CFG_CENTER_CK_BUFHCLK2", + "HCLK_VFRAME_CK_BUFHCLK2" + ], + [ + "CFG_CENTER_CK_BUFHCLK3", + "HCLK_VFRAME_CK_BUFHCLK3" + ], + [ + "CFG_CENTER_CK_BUFHCLK4", + "HCLK_VFRAME_CK_BUFHCLK4" + ], + [ + "CFG_CENTER_CK_BUFHCLK5", + "HCLK_VFRAME_CK_BUFHCLK5" + ], + [ + "CFG_CENTER_CK_BUFHCLK6", + "HCLK_VFRAME_CK_BUFHCLK6" + ], + [ + "CFG_CENTER_CK_BUFHCLK7", + "HCLK_VFRAME_CK_BUFHCLK7" + ], + [ + "CFG_CENTER_CK_BUFHCLK8", + "HCLK_VFRAME_CK_BUFHCLK8" + ], + [ + "CFG_CENTER_CK_BUFHCLK9", + "HCLK_VFRAME_CK_BUFHCLK9" + ], + [ + "CFG_CENTER_CK_BUFHCLK10", + "HCLK_VFRAME_CK_BUFHCLK10" + ], + [ + "CFG_CENTER_CK_BUFHCLK11", + "HCLK_VFRAME_CK_BUFHCLK11" + ], + [ + "CFG_CENTER_CK_BUFRCLK0", + "HCLK_VFRAME_CK_BUFRCLK0" + ], + [ + "CFG_CENTER_CK_BUFRCLK1", + "HCLK_VFRAME_CK_BUFRCLK1" + ], + [ + "CFG_CENTER_CK_BUFRCLK2", + "HCLK_VFRAME_CK_BUFRCLK2" + ], + [ + "CFG_CENTER_CK_BUFRCLK3", + "HCLK_VFRAME_CK_BUFRCLK3" + ], + [ + "CFG_CENTER_CK_IN0", + "HCLK_VFRAME_CK_IN0" + ], + [ + "CFG_CENTER_CK_IN1", + "HCLK_VFRAME_CK_IN1" + ], + [ + "CFG_CENTER_CK_IN2", + "HCLK_VFRAME_CK_IN2" + ], + [ + "CFG_CENTER_CK_IN3", + "HCLK_VFRAME_CK_IN3" + ], + [ + "CFG_CENTER_CK_IN4", + "HCLK_VFRAME_CK_IN4" + ], + [ + "CFG_CENTER_CK_IN5", + "HCLK_VFRAME_CK_IN5" + ], + [ + "CFG_CENTER_CK_IN6", + "HCLK_VFRAME_CK_IN6" + ], + [ + "CFG_CENTER_CK_IN7", + "HCLK_VFRAME_CK_IN7" + ], + [ + "CFG_CENTER_CK_IN8", + "HCLK_VFRAME_CK_IN8" + ], + [ + "CFG_CENTER_CK_IN9", + "HCLK_VFRAME_CK_IN9" + ], + [ + "CFG_CENTER_CK_IN10", + "HCLK_VFRAME_CK_IN10" + ], + [ + "CFG_CENTER_CK_IN11", + "HCLK_VFRAME_CK_IN11" + ], + [ + "CFG_CENTER_CK_IN12", + "HCLK_VFRAME_CK_IN12" + ], + [ + "CFG_CENTER_CK_IN13", + "HCLK_VFRAME_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + -9 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_19", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_19", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_19", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_19", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_19", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_19", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_19", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_19", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_19", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_19", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_19", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_19", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_19", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_19", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_19", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_19", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_19", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_19", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_19", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_19", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_19", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_19", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_19", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_19", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_19", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_19", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_19", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_19", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_19", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_19", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_19", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_19", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_19", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_19", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_19", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_19", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_19", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_19", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_19", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_19", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_19", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_19", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_19", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_19", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_19", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_19", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_19", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_19", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_19", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_19", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_19", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_19", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_19", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_19", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_19", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_19", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_19", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_19", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_19", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_19", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_19", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_19", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_19", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_19", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_19", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_19", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_19", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_19", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_19", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_19", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_19", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_19", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_19", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_19", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_19", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_19", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_19", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_19", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_19", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_19", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_19", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_19", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_19", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_19", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_19", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_19", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_19", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_19", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_19", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_19", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_19", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_19", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_19", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_19", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_19", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_19", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_19", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_19", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_19", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_19", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_19", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_19", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_19", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_19", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_19", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_19", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_19", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_19", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_19", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_19", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_19", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_19", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_19", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_19", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_19", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_19", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_19", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_19", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_19", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_19", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_19", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_19", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_19", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_19", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -8 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_18", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_18", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_18", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_18", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_18", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_18", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_18", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_18", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_18", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_18", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_18", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_18", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_18", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_18", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_18", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_18", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_18", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_18", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_18", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_18", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_18", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_18", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_18", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_18", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_18", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_18", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_18", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_18", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_18", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_18", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_18", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_18", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_18", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_18", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_18", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_18", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_18", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_18", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_18", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_18", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_18", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_18", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_18", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_18", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_18", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_18", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_18", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_18", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_18", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_18", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_18", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_18", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_18", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_18", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_18", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_18", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_18", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_18", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_18", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_18", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_18", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_18", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_18", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_18", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_18", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_18", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_18", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_18", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_18", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_18", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_18", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_18", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_18", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_18", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_18", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_18", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_18", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_18", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_18", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_18", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_18", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_18", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_18", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_18", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_18", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_18", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_18", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_18", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_18", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_18", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_18", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_18", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_18", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_18", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_18", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_18", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_18", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_18", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_18", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_18", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_18", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_18", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_18", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_18", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_18", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_18", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_18", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_18", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_18", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_18", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_18", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_18", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_18", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_18", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_18", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_18", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_18", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_18", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_18", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_18", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_18", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_18", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_18", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_18", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_17", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_17", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_17", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_17", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_17", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_17", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_17", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_17", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_17", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_17", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_17", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_17", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_17", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_17", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_17", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_17", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_17", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_17", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_17", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_17", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_17", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_17", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_17", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_17", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_17", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_17", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_17", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_17", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_17", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_17", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_17", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_17", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_17", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_17", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_17", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_17", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_17", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_17", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_17", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_17", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_17", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_17", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_17", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_17", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_17", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_17", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_17", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_17", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_17", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_17", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_17", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_17", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_17", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_17", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_17", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_17", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_17", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_17", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_17", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_17", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_17", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_17", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_17", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_17", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_17", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_17", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_17", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_17", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_17", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_17", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_17", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_17", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_17", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_17", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_17", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_17", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_17", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_17", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_17", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_17", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_17", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_17", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_17", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_17", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_17", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_17", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_17", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_17", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_17", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_17", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_17", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_17", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_17", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_17", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_17", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_17", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_17", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_17", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_17", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_17", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_17", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_17", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_17", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_17", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_17", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_17", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_17", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_17", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_17", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_17", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_17", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_17", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_17", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_17", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_17", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_17", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_17", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_17", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_17", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_17", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_17", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_17", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_17", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_17", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_16", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_16", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_16", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_16", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_16", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_16", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_16", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_16", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_16", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_16", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_16", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_16", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_16", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_16", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_16", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_16", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_16", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_16", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_16", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_16", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_16", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_16", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_16", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_16", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_16", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_16", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_16", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_16", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_16", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_16", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_16", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_16", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_16", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_16", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_16", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_16", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_16", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_16", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_16", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_16", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_16", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_16", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_16", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_16", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_16", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_16", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_16", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_16", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_16", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_16", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_16", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_16", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_16", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_16", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_16", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_16", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_16", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_16", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_16", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_16", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_16", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_16", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_16", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_16", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_16", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_16", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_16", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_16", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_16", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_16", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_16", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_16", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_16", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_16", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_16", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_16", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_16", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_16", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_16", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_16", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_16", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_16", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_16", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_16", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_16", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_16", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_16", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_16", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_16", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_16", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_16", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_16", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_16", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_16", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_16", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_16", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_16", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_16", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_16", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_16", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_16", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_16", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_16", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_16", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_16", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_16", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_16", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_16", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_16", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_16", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_16", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_16", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_16", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_16", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_16", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_16", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_16", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_16", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_16", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_16", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_16", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_16", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_16", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_16", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_15", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_15", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_15", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_15", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_15", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_15", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_15", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_15", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_15", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_15", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_15", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_15", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_15", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_15", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_15", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_15", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_15", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_15", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_15", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_15", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_15", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_15", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_15", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_15", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_15", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_15", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_15", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_15", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_15", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_15", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_15", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_15", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_15", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_15", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_15", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_15", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_15", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_15", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_15", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_15", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_15", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_15", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_15", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_15", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_15", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_15", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_15", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_15", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_15", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_15", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_15", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_15", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_15", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_15", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_15", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_15", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_15", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_15", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_15", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_15", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_15", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_15", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_15", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_15", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_15", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_15", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_15", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_15", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_15", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_15", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_15", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_15", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_15", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_15", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_15", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_15", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_15", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_15", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_15", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_15", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_15", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_15", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_15", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_15", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_15", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_15", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_15", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_15", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_15", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_15", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_15", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_15", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_15", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_15", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_15", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_15", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_15", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_15", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_15", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_15", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_15", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_15", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_15", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_15", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_15", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_15", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_15", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_15", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_15", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_15", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_15", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_15", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_15", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_15", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_15", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_15", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_15", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_15", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_15", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_15", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_15", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_15", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_15", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_15", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_14", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_14", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_14", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_14", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_14", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_14", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_14", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_14", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_14", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_14", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_14", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_14", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_14", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_14", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_14", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_14", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_14", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_14", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_14", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_14", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_14", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_14", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_14", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_14", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_14", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_14", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_14", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_14", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_14", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_14", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_14", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_14", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_14", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_14", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_14", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_14", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_14", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_14", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_14", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_14", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_14", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_14", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_14", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_14", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_14", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_14", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_14", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_14", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_14", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_14", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_14", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_14", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_14", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_14", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_14", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_14", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_14", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_14", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_14", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_14", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_14", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_14", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_14", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_14", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_14", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_14", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_14", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_14", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_14", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_14", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_14", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_14", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_14", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_14", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_14", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_14", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_14", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_14", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_14", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_14", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_14", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_14", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_14", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_14", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_14", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_14", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_14", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_14", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_14", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_14", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_14", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_14", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_14", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_14", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_14", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_14", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_14", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_14", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_14", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_14", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_14", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_14", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_14", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_14", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_14", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_14", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_14", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_14", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_14", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_14", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_14", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_14", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_14", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_14", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_14", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_14", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_14", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_14", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_14", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_14", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_14", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_14", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_14", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_14", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_13", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_13", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_13", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_13", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_13", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_13", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_13", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_13", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_13", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_13", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_13", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_13", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_13", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_13", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_13", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_13", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_13", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_13", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_13", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_13", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_13", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_13", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_13", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_13", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_13", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_13", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_13", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_13", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_13", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_13", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_13", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_13", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_13", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_13", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_13", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_13", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_13", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_13", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_13", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_13", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_13", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_13", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_13", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_13", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_13", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_13", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_13", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_13", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_13", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_13", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_13", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_13", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_13", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_13", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_13", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_13", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_13", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_13", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_13", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_13", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_13", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_13", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_13", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_13", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_13", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_13", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_13", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_13", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_13", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_13", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_13", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_13", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_13", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_13", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_13", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_13", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_13", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_13", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_13", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_13", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_13", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_13", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_13", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_13", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_13", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_13", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_13", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_13", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_13", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_13", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_13", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_13", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_13", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_13", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_13", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_13", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_13", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_13", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_13", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_13", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_13", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_13", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_13", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_13", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_13", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_13", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_13", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_13", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_13", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_13", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_13", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_13", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_13", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_13", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_13", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_13", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_13", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_13", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_13", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_13", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_13", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_13", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_13", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_13", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_12", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_12", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_12", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_12", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_12", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_12", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_12", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_12", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_12", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_12", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_12", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_12", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_12", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_12", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_12", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_12", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_12", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_12", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_12", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_12", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_12", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_12", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_12", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_12", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_12", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_12", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_12", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_12", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_12", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_12", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_12", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_12", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_12", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_12", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_12", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_12", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_12", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_12", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_12", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_12", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_12", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_12", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_12", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_12", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_12", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_12", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_12", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_12", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_12", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_12", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_12", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_12", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_12", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_12", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_12", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_12", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_12", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_12", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_12", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_12", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_12", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_12", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_12", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_12", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_12", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_12", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_12", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_12", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_12", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_12", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_12", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_12", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_12", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_12", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_12", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_12", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_12", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_12", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_12", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_12", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_12", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_12", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_12", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_12", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_12", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_12", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_12", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_12", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_12", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_12", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_12", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_12", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_12", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_12", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_12", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_12", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_12", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_12", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_12", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_12", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_12", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_12", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_12", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_12", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_12", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_12", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_12", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_12", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_12", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_12", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_12", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_12", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_12", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_12", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_12", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_12", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_12", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_12", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_12", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_12", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_12", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_12", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_12", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_12", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_11", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_11", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_11", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_11", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_11", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_11", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_11", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_11", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_11", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_11", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_11", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_11", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_11", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_11", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_11", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_11", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_11", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_11", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_11", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_11", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_11", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_11", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_11", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_11", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_11", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_11", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_11", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_11", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_11", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_11", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_11", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_11", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_11", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_11", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_11", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_11", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_11", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_11", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_11", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_11", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_11", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_11", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_11", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_11", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_11", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_11", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_11", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_11", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_11", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_11", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_11", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_11", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_11", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_11", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_11", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_11", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_11", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_11", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_11", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_11", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_11", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_11", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_11", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_11", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_11", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_11", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_11", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_11", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_11", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_11", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_11", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_11", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_11", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_11", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_11", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_11", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_11", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_11", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_11", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_11", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_11", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_11", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_11", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_11", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_11", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_11", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_11", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_11", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_11", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_11", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_11", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_11", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_11", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_11", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_11", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_11", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_11", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_11", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_11", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_11", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_11", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_11", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_11", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_11", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_11", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_11", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_11", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_11", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_11", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_11", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_11", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_11", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_11", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_11", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_11", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_11", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_11", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_11", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_11", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_11", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_11", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_11", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_11", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_11", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_10", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_10", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_10", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_10", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_10", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_10", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_10", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_10", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_10", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_10", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_10", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_10", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_10", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_10", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_10", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_10", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_10", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_10", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_10", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_10", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_10", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_10", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_10", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_10", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_10", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_10", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_10", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_10", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_10", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_10", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_10", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_10", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_10", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_10", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_10", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_10", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_10", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_10", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_10", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_10", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_10", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_10", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_10", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_10", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_10", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_10", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_10", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_10", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_10", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_10", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_10", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_10", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_10", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_10", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_10", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_10", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_10", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_10", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_10", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_10", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_10", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_10", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_10", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_10", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_10", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_10", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_10", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_10", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_10", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_10", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_10", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_10", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_10", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_10", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_10", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_10", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_10", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_10", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_10", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_10", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_10", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_10", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_10", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_10", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_10", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_10", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_10", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_10", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_10", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_10", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_10", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_10", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_10", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_10", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_10", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_10", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_10", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_10", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_10", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_10", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_10", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_10", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_10", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_10", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_10", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_10", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_10", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_10", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_10", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_10", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_10", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_10", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_10", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_10", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_10", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_10", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_10", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_10", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_10", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_10", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_10", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_10", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_10", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_10", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_9", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_9", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_9", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_9", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_9", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_9", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_9", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_9", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_9", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_9", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_9", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_9", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_9", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_9", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_9", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_9", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_9", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_9", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_9", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_9", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_9", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_9", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_9", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_9", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_9", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_9", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_9", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_9", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_9", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_9", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_9", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_9", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_9", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_9", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_9", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_9", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_9", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_9", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_9", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_9", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_9", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_9", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_9", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_9", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_9", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_9", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_9", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_9", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_9", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_9", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_9", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_9", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_9", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_9", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_9", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_9", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_9", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_9", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_9", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_9", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_9", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_9", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_9", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_9", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_9", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_9", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_9", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_9", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_9", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_9", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_9", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_9", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_9", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_9", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_9", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_9", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_9", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_9", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_9", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_9", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_9", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_9", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_9", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_9", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_9", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_9", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_9", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_9", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_9", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_9", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_9", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_9", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_9", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_9", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_9", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_9", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_9", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_9", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_9", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_9", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_9", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_9", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_9", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_9", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_9", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_9", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_9", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_9", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_9", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_9", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_9", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_9", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_9", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_9", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_9", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_9", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_9", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_9", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_9", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_9", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_9", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_9", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_9", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_9", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_8", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_8", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_8", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_8", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_8", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_8", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_8", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_8", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_8", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_8", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_8", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_8", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_8", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_8", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_8", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_8", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_8", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_8", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_8", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_8", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_8", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_8", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_8", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_8", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_8", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_8", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_8", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_8", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_8", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_8", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_8", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_8", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_8", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_8", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_8", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_8", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_8", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_8", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_8", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_8", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_8", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_8", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_8", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_8", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_8", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_8", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_8", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_8", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_8", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_8", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_8", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_8", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_8", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_8", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_8", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_8", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_8", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_8", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_8", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_8", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_8", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_8", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_8", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_8", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_8", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_8", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_8", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_8", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_8", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_8", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_8", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_8", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_8", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_8", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_8", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_8", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_8", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_8", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_8", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_8", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_8", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_8", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_8", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_8", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_8", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_8", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_8", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_8", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_8", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_8", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_8", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_8", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_8", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_8", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_8", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_8", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_8", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_8", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_8", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_8", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_8", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_8", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_8", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_8", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_8", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_8", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_8", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_8", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_8", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_8", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_8", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_8", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_8", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_8", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_8", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_8", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_8", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_8", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_8", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_8", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_8", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_8", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_8", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_8", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_7", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_7", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_7", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_7", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_7", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_7", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_7", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_7", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_7", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_7", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_7", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_7", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_7", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_7", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_7", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_7", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_7", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_7", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_7", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_7", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_7", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_7", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_7", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_7", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_7", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_7", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_7", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_7", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_7", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_7", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_7", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_7", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_7", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_7", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_7", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_7", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_7", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_7", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_7", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_7", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_7", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_7", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_7", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_7", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_7", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_7", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_7", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_7", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_7", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_7", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_7", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_7", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_7", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_7", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_7", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_7", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_7", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_7", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_7", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_7", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_7", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_7", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_7", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_7", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_7", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_7", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_7", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_7", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_7", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_7", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_7", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_7", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_7", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_7", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_7", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_7", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_7", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_7", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_7", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_7", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_7", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_7", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_7", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_7", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_7", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_7", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_7", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_7", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_7", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_7", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_7", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_7", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_7", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_7", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_7", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_7", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_7", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_7", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_7", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_7", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_7", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_7", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_7", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_7", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_7", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_7", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_7", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_7", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_7", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_7", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_7", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_7", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_7", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_7", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_7", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_7", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_7", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_7", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_7", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_7", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_7", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_7", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_7", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_7", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_6", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_6", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_6", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_6", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_6", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_6", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_6", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_6", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_6", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_6", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_6", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_6", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_6", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_6", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_6", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_6", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_6", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_6", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_6", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_6", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_6", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_6", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_6", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_6", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_6", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_6", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_6", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_6", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_6", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_6", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_6", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_6", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_6", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_6", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_6", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_6", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_6", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_6", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_6", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_6", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_6", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_6", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_6", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_6", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_6", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_6", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_6", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_6", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_6", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_6", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_6", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_6", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_6", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_6", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_6", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_6", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_6", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_6", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_6", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_6", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_6", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_6", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_6", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_6", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_6", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_6", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_6", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_6", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_6", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_6", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_6", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_6", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_6", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_6", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_6", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_6", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_6", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_6", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_6", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_6", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_6", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_6", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_6", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_6", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_6", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_6", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_6", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_6", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_6", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_6", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_6", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_6", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_6", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_6", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_6", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_6", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_6", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_6", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_6", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_6", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_6", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_6", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_6", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_6", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_6", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_6", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_6", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_6", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_6", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_6", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_6", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_6", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_6", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_6", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_6", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_6", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_6", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_6", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_6", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_6", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_6", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_6", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_6", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_6", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_5", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_5", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_5", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_5", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_5", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_5", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_5", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_5", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_5", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_5", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_5", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_5", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_5", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_5", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_5", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_5", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_5", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_5", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_5", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_5", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_5", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_5", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_5", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_5", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_5", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_5", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_5", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_5", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_5", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_5", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_5", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_5", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_5", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_5", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_5", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_5", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_5", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_5", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_5", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_5", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_5", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_5", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_5", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_5", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_5", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_5", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_5", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_5", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_5", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_5", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_5", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_5", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_5", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_5", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_5", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_5", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_5", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_5", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_5", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_5", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_5", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_5", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_5", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_5", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_5", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_5", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_5", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_5", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_5", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_5", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_5", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_5", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_5", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_5", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_5", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_5", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_5", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_5", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_5", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_5", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_5", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_5", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_5", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_5", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_5", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_5", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_5", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_5", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_5", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_5", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_5", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_5", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_5", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_5", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_5", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_5", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_5", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_5", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_5", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_5", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_5", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_5", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_5", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_5", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_5", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_5", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_5", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_5", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_5", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_5", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_5", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_5", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_5", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_5", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_5", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_5", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_5", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_5", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_5", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_5", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_5", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_5", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_5", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_5", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 7 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_4", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_4", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_4", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_4", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_4", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_4", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_4", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_4", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_4", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_4", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_4", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_4", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_4", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_4", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_4", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_4", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_4", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_4", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_4", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_4", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_4", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_4", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_4", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_4", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_4", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_4", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_4", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_4", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_4", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_4", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_4", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_4", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_4", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_4", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_4", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_4", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_4", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_4", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_4", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_4", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_4", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_4", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_4", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_4", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_4", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_4", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_4", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_4", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_4", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_4", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_4", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_4", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_4", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_4", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_4", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_4", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_4", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_4", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_4", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_4", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_4", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_4", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_4", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_4", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_4", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_4", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_4", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_4", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_4", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_4", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_4", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_4", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_4", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_4", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_4", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_4", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_4", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_4", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_4", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_4", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_4", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_4", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_4", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_4", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_4", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_4", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_4", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_4", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_4", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_4", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_4", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_4", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_4", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_4", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_4", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_4", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_4", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_4", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_4", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_4", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_4", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_4", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_4", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_4", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_4", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_4", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_4", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_4", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_4", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_4", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_4", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_4", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_4", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_4", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_4", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_4", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_4", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_4", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_4", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_4", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_4", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_4", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_4", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_4", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 8 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_3", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_3", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_3", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_3", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_3", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_3", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_3", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_3", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_3", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_3", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_3", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_3", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_3", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_3", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_3", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_3", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_3", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_3", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_3", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_3", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_3", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_3", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_3", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_3", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_3", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_3", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_3", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_3", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_3", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_3", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_3", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_3", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_3", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_3", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_3", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_3", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_3", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_3", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_3", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_3", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_3", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_3", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_3", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_3", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_3", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_3", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_3", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_3", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_3", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_3", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_3", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_3", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_3", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_3", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_3", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_3", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_3", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_3", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_3", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_3", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_3", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_3", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_3", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_3", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_3", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_3", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_3", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_3", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_3", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_3", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_3", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_3", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_3", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_3", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_3", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_3", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_3", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_3", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_3", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_3", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_3", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_3", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_3", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_3", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_3", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_3", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_3", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_3", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_3", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_3", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_3", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_3", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_3", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_3", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_3", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_3", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_3", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_3", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_3", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_3", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_3", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_3", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_3", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_3", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_3", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_3", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_3", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_3", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_3", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_3", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_3", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_3", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_3", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_3", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_3", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_3", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_3", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_3", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_3", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_3", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_3", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_3", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_3", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_3", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 9 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_2", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_2", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_2", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_2", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_2", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_2", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_2", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_2", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_2", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_2", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_2", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_2", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_2", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_2", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_2", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_2", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_2", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_2", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_2", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_2", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_2", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_2", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_2", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_2", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_2", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_2", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_2", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_2", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_2", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_2", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_2", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_2", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_2", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_2", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_2", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_2", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_2", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_2", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_2", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_2", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_2", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_2", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_2", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_2", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_2", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_2", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_2", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_2", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_2", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_2", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_2", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_2", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_2", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_2", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_2", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_2", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_2", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_2", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_2", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_2", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_2", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_2", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_2", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_2", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_2", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_2", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_2", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_2", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_2", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_2", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_2", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_2", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_2", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_2", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_2", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_2", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_2", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_2", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_2", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_2", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_2", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_2", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_2", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_2", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_2", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_2", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_2", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_2", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_2", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_2", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_2", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_2", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_2", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_2", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_2", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_2", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_2", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_2", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_2", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_2", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_2", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_2", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_2", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_2", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_2", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_2", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_2", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_2", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_2", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_2", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_2", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_2", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_2", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_2", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_2", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_2", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_2", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_2", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_2", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_2", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_2", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_2", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_2", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_2", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 10 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_1", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_1", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_1", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_1", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_1", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_1", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_1", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_1", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_1", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_1", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_1", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_1", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_1", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_1", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_1", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_1", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_1", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_1", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_1", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_1", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_1", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_1", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_1", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_1", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_1", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_1", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_1", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_1", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_1", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_1", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_1", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_1", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_1", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_1", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_1", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_1", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_1", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_1", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_1", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_1", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_1", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_1", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_1", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_1", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_1", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_1", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_1", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_1", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_1", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_1", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_1", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_1", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_1", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_1", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_1", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_1", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_1", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_1", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_1", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_1", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_1", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_1", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_1", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_1", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_1", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_1", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_1", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_1", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_1", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_1", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_1", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_1", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_1", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_1", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_1", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_1", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_1", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_1", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_1", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_1", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_1", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_1", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_1", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_1", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_1", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_1", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_1", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_1", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_1", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_1", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_1", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_1", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_1", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_1", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_1", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_1", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_1", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_1", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_1", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_1", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_1", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_1", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_1", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_1", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_1", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_1", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_1", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_1", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_1", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_1", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_1", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_1", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_1", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_1", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_1", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_1", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_1", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_1", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_1", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_1", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_1", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_1", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_1", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_1", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 11 + ], + "tile_types": [ + "CFG_CENTER_MID", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_0", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_0", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_0", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_0", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_0", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_0", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_0", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_0", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_0", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_0", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_0", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_0", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_0", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_0", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_0", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_0", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_0", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_0", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_0", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_0", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_0", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_0", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_0", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_0", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_0", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_0", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_0", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_0", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_0", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_0", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_0", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_0", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_0", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_0", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_0", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_0", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_0", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_0", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_0", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_0", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_0", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_0", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_0", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_0", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_0", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_0", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_0", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_0", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_0", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_0", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_0", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_0", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_0", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_0", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_0", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_0", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_0", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_0", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_0", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_0", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_0", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_0", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_0", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_0", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_0", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_0", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_0", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_0", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_0", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_0", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_0", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_0", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_0", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_0", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_0", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_0", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_0", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_0", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_0", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_0", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_0", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_0", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_0", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_0", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_0", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_0", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_0", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_0", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_0", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_0", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_0", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_0", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_0", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_0", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_0", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_0", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_0", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_0", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_0", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_0", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_0", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_0", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_0", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_0", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_0", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_0", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_0", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_0", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_0", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_0", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_0", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_0", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_0", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_0", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_0", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_0", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_0", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_0", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_0", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_0", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_0", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_0", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_0", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_0", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -9 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_19", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_19", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_19", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_19", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_19", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_19", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_19", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_19", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_19", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_19", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_19", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_19", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_19", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_19", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_19", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_19", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_19", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_19", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_19", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_19", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_19", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_19", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_19", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_19", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_19", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_19", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_19", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_19", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_19", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_19", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_19", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_19", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_19", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_19", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_19", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_19", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_19", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_19", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_19", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_19", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_19", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_19", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_19", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_19", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_19", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_19", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_19", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_19", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_19", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_19", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_19", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_19", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_19", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_19", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_19", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_19", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_19", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_19", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_19", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_19", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_19", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_19", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_19", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_19", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_19", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_19", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_19", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_19", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_19", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_19", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_19", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_19", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_19", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_19", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_19", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_19", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_19", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_19", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_19", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_19", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_19", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_19", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_19", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_19", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_19", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_19", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_19", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_19", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_19", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_19", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_19", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_19", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_19", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_19", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_19", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_19", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_19", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_19", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_19", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_19", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_19", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_19", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_19", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_19", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_19", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_19", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_19", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_19", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_19", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_19", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_19", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_19", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_19", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_19", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_19", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_19", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_19", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_19", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_19", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_19", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_19", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_19", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_19", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_19", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_19", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_19", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_19", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_19", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_19", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_19", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_19", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_19", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_19", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_19", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_19", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_19", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_19", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_19", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_19", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_19", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_19", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_19", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_19", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_19", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_19", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_19", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_19", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_19", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_19", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_19", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_19", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_19", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_19", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_19", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_19", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_19", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_19", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_19", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_19", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_19", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_19", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_19", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_19", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_19", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_19", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_19", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_19", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_19", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_19", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_19", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_19", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_19", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_19", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_19", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_19", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_19", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_19", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_19", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_19", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_19", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_19", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_19", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_19", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_19", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_19", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_19", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_19", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_19", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_19", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_19", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_19", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_19", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -8 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_18", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_18", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_18", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_18", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_18", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_18", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_18", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_18", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_18", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_18", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_18", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_18", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_18", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_18", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_18", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_18", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_18", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_18", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_18", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_18", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_18", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_18", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_18", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_18", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_18", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_18", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_18", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_18", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_18", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_18", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_18", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_18", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_18", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_18", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_18", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_18", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_18", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_18", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_18", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_18", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_18", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_18", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_18", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_18", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_18", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_18", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_18", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_18", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_18", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_18", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_18", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_18", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_18", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_18", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_18", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_18", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_18", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_18", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_18", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_18", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_18", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_18", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_18", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_18", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_18", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_18", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_18", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_18", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_18", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_18", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_18", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_18", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_18", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_18", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_18", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_18", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_18", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_18", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_18", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_18", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_18", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_18", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_18", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_18", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_18", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_18", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_18", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_18", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_18", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_18", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_18", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_18", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_18", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_18", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_18", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_18", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_18", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_18", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_18", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_18", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_18", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_18", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_18", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_18", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_18", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_18", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_18", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_18", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_18", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_18", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_18", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_18", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_18", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_18", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_18", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_18", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_18", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_18", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_18", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_18", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_18", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_18", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_18", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_18", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_18", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_18", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_18", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_18", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_18", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_18", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_18", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_18", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_18", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_18", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_18", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_18", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_18", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_18", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_18", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_18", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_18", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_18", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_18", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_18", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_18", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_18", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_18", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_18", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_18", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_18", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_18", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_18", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_18", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_18", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_18", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_18", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_18", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_18", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_18", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_18", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_18", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_18", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_18", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_18", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_18", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_18", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_18", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_18", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_18", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_18", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_18", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_18", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_18", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_18", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_18", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_18", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_18", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_18", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_18", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_18", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_18", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_18", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_18", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_18", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_18", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_18", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_18", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_18", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_18", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_18", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_18", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_18", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_17", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_17", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_17", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_17", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_17", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_17", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_17", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_17", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_17", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_17", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_17", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_17", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_17", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_17", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_17", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_17", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_17", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_17", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_17", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_17", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_17", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_17", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_17", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_17", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_17", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_17", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_17", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_17", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_17", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_17", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_17", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_17", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_17", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_17", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_17", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_17", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_17", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_17", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_17", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_17", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_17", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_17", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_17", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_17", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_17", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_17", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_17", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_17", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_17", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_17", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_17", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_17", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_17", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_17", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_17", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_17", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_17", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_17", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_17", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_17", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_17", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_17", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_17", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_17", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_17", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_17", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_17", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_17", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_17", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_17", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_17", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_17", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_17", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_17", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_17", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_17", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_17", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_17", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_17", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_17", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_17", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_17", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_17", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_17", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_17", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_17", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_17", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_17", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_17", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_17", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_17", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_17", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_17", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_17", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_17", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_17", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_17", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_17", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_17", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_17", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_17", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_17", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_17", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_17", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_17", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_17", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_17", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_17", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_17", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_17", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_17", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_17", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_17", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_17", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_17", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_17", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_17", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_17", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_17", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_17", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_17", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_17", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_17", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_17", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_17", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_17", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_17", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_17", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_17", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_17", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_17", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_17", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_17", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_17", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_17", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_17", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_17", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_17", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_17", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_17", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_17", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_17", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_17", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_17", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_17", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_17", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_17", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_17", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_17", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_17", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_17", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_17", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_17", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_17", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_17", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_17", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_17", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_17", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_17", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_17", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_17", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_17", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_17", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_17", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_17", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_17", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_17", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_17", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_17", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_17", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_17", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_17", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_17", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_17", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_17", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_17", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_17", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_17", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_17", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_17", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_17", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_17", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_17", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_17", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_17", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_17", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_17", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_17", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_17", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_17", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_17", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_17", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_16", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_16", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_16", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_16", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_16", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_16", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_16", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_16", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_16", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_16", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_16", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_16", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_16", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_16", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_16", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_16", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_16", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_16", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_16", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_16", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_16", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_16", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_16", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_16", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_16", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_16", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_16", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_16", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_16", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_16", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_16", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_16", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_16", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_16", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_16", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_16", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_16", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_16", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_16", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_16", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_16", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_16", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_16", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_16", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_16", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_16", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_16", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_16", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_16", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_16", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_16", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_16", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_16", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_16", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_16", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_16", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_16", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_16", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_16", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_16", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_16", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_16", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_16", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_16", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_16", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_16", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_16", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_16", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_16", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_16", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_16", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_16", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_16", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_16", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_16", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_16", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_16", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_16", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_16", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_16", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_16", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_16", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_16", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_16", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_16", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_16", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_16", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_16", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_16", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_16", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_16", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_16", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_16", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_16", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_16", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_16", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_16", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_16", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_16", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_16", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_16", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_16", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_16", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_16", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_16", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_16", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_16", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_16", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_16", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_16", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_16", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_16", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_16", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_16", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_16", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_16", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_16", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_16", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_16", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_16", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_16", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_16", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_16", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_16", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_16", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_16", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_16", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_16", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_16", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_16", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_16", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_16", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_16", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_16", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_16", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_16", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_16", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_16", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_16", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_16", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_16", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_16", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_16", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_16", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_16", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_16", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_16", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_16", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_16", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_16", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_16", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_16", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_16", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_16", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_16", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_16", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_16", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_16", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_16", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_16", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_16", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_16", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_16", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_16", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_16", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_16", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_16", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_16", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_16", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_16", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_16", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_16", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_16", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_16", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_16", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_16", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_16", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_16", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_16", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_16", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_16", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_16", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_16", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_16", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_16", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_16", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_16", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_16", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_16", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_16", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_16", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_16", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_15", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_15", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_15", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_15", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_15", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_15", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_15", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_15", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_15", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_15", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_15", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_15", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_15", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_15", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_15", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_15", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_15", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_15", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_15", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_15", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_15", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_15", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_15", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_15", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_15", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_15", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_15", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_15", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_15", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_15", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_15", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_15", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_15", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_15", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_15", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_15", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_15", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_15", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_15", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_15", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_15", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_15", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_15", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_15", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_15", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_15", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_15", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_15", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_15", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_15", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_15", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_15", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_15", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_15", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_15", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_15", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_15", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_15", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_15", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_15", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_15", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_15", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_15", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_15", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_15", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_15", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_15", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_15", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_15", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_15", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_15", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_15", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_15", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_15", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_15", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_15", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_15", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_15", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_15", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_15", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_15", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_15", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_15", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_15", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_15", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_15", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_15", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_15", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_15", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_15", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_15", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_15", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_15", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_15", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_15", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_15", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_15", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_15", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_15", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_15", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_15", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_15", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_15", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_15", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_15", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_15", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_15", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_15", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_15", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_15", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_15", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_15", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_15", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_15", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_15", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_15", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_15", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_15", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_15", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_15", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_15", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_15", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_15", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_15", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_15", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_15", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_15", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_15", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_15", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_15", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_15", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_15", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_15", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_15", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_15", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_15", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_15", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_15", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_15", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_15", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_15", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_15", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_15", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_15", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_15", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_15", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_15", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_15", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_15", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_15", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_15", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_15", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_15", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_15", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_15", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_15", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_15", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_15", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_15", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_15", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_15", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_15", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_15", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_15", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_15", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_15", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_15", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_15", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_15", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_15", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_15", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_15", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_15", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_15", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_15", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_15", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_15", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_15", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_15", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_15", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_15", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_15", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_15", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_15", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_15", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_15", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_15", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_15", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_15", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_15", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_15", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_15", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_15", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_15", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_15", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_15", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_15", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_15", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_15", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_15", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_15", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_15", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_15", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_15", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_14", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_14", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_14", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_14", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_14", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_14", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_14", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_14", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_14", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_14", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_14", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_14", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_14", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_14", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_14", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_14", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_14", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_14", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_14", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_14", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_14", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_14", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_14", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_14", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_14", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_14", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_14", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_14", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_14", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_14", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_14", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_14", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_14", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_14", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_14", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_14", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_14", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_14", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_14", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_14", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_14", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_14", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_14", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_14", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_14", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_14", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_14", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_14", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_14", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_14", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_14", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_14", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_14", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_14", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_14", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_14", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_14", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_14", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_14", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_14", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_14", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_14", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_14", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_14", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_14", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_14", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_14", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_14", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_14", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_14", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_14", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_14", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_14", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_14", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_14", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_14", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_14", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_14", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_14", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_14", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_14", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_14", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_14", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_14", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_14", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_14", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_14", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_14", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_14", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_14", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_14", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_14", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_14", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_14", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_14", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_14", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_14", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_14", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_14", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_14", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_14", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_14", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_14", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_14", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_14", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_14", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_14", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_14", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_14", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_14", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_14", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_14", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_14", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_14", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_14", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_14", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_14", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_14", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_14", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_14", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_14", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_14", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_14", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_14", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_14", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_14", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_14", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_14", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_14", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_14", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_14", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_14", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_14", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_14", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_14", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_14", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_14", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_14", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_14", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_14", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_14", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_14", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_14", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_14", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_14", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_14", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_14", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_14", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_14", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_14", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_14", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_14", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_14", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_14", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_14", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_14", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_14", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_14", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_14", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_14", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_14", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_14", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_14", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_14", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_14", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_14", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_14", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_14", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_14", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_14", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_14", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_14", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_14", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_14", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_14", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_14", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_14", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_14", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_14", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_14", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_14", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_14", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_14", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_14", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_14", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_14", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_14", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_14", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_14", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_14", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_14", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_14", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_14", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_14", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_14", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_14", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_14", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_14", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_14", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_14", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_14", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_14", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_14", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_14", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_14", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_14", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_13", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_13", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_13", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_13", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_13", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_13", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_13", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_13", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_13", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_13", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_13", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_13", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_13", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_13", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_13", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_13", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_13", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_13", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_13", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_13", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_13", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_13", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_13", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_13", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_13", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_13", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_13", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_13", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_13", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_13", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_13", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_13", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_13", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_13", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_13", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_13", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_13", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_13", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_13", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_13", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_13", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_13", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_13", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_13", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_13", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_13", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_13", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_13", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_13", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_13", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_13", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_13", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_13", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_13", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_13", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_13", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_13", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_13", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_13", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_13", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_13", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_13", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_13", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_13", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_13", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_13", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_13", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_13", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_13", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_13", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_13", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_13", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_13", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_13", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_13", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_13", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_13", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_13", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_13", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_13", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_13", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_13", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_13", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_13", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_13", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_13", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_13", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_13", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_13", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_13", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_13", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_13", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_13", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_13", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_13", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_13", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_13", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_13", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_13", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_13", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_13", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_13", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_13", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_13", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_13", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_13", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_13", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_13", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_13", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_13", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_13", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_13", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_13", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_13", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_13", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_13", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_13", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_13", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_13", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_13", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_13", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_13", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_13", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_13", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_13", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_13", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_13", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_13", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_13", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_13", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_13", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_13", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_13", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_13", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_13", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_13", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_13", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_13", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_13", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_13", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_13", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_13", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_13", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_13", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_13", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_13", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_13", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_13", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_13", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_13", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_13", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_13", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_13", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_13", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_13", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_13", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_13", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_13", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_13", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_13", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_13", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_13", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_13", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_13", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_13", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_13", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_13", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_13", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_13", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_13", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_13", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_13", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_13", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_13", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_13", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_13", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_13", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_13", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_13", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_13", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_13", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_13", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_13", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_13", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_13", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_13", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_13", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_13", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_13", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_13", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_13", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_13", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_13", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_13", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_13", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_13", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_13", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_13", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_13", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_13", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_13", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_13", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_13", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_13", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_12", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_12", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_12", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_12", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_12", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_12", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_12", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_12", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_12", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_12", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_12", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_12", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_12", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_12", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_12", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_12", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_12", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_12", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_12", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_12", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_12", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_12", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_12", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_12", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_12", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_12", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_12", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_12", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_12", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_12", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_12", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_12", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_12", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_12", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_12", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_12", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_12", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_12", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_12", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_12", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_12", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_12", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_12", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_12", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_12", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_12", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_12", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_12", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_12", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_12", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_12", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_12", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_12", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_12", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_12", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_12", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_12", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_12", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_12", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_12", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_12", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_12", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_12", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_12", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_12", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_12", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_12", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_12", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_12", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_12", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_12", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_12", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_12", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_12", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_12", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_12", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_12", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_12", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_12", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_12", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_12", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_12", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_12", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_12", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_12", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_12", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_12", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_12", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_12", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_12", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_12", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_12", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_12", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_12", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_12", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_12", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_12", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_12", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_12", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_12", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_12", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_12", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_12", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_12", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_12", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_12", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_12", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_12", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_12", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_12", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_12", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_12", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_12", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_12", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_12", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_12", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_12", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_12", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_12", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_12", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_12", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_12", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_12", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_12", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_12", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_12", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_12", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_12", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_12", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_12", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_12", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_12", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_12", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_12", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_12", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_12", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_12", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_12", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_12", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_12", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_12", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_12", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_12", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_12", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_12", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_12", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_12", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_12", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_12", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_12", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_12", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_12", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_12", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_12", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_12", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_12", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_12", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_12", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_12", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_12", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_12", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_12", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_12", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_12", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_12", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_12", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_12", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_12", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_12", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_12", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_12", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_12", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_12", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_12", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_12", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_12", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_12", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_12", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_12", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_12", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_12", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_12", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_12", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_12", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_12", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_12", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_12", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_12", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_12", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_12", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_12", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_12", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_12", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_12", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_12", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_12", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_12", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_12", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_12", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_12", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_12", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_12", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_12", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_12", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_11", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_11", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_11", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_11", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_11", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_11", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_11", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_11", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_11", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_11", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_11", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_11", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_11", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_11", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_11", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_11", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_11", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_11", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_11", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_11", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_11", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_11", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_11", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_11", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_11", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_11", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_11", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_11", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_11", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_11", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_11", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_11", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_11", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_11", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_11", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_11", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_11", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_11", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_11", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_11", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_11", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_11", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_11", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_11", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_11", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_11", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_11", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_11", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_11", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_11", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_11", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_11", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_11", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_11", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_11", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_11", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_11", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_11", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_11", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_11", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_11", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_11", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_11", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_11", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_11", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_11", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_11", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_11", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_11", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_11", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_11", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_11", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_11", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_11", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_11", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_11", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_11", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_11", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_11", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_11", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_11", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_11", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_11", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_11", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_11", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_11", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_11", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_11", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_11", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_11", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_11", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_11", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_11", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_11", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_11", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_11", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_11", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_11", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_11", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_11", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_11", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_11", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_11", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_11", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_11", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_11", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_11", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_11", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_11", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_11", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_11", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_11", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_11", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_11", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_11", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_11", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_11", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_11", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_11", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_11", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_11", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_11", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_11", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_11", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_11", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_11", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_11", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_11", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_11", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_11", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_11", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_11", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_11", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_11", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_11", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_11", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_11", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_11", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_11", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_11", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_11", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_11", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_11", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_11", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_11", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_11", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_11", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_11", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_11", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_11", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_11", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_11", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_11", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_11", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_11", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_11", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_11", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_11", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_11", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_11", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_11", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_11", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_11", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_11", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_11", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_11", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_11", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_11", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_11", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_11", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_11", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_11", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_11", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_11", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_11", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_11", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_11", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_11", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_11", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_11", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_11", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_11", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_11", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_11", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_11", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_11", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_11", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_11", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_11", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_11", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_11", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_11", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_11", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_11", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_11", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_11", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_11", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_11", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_11", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_11", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_11", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_11", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_11", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_11", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_11", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_10", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_10", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_10", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_10", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_10", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_10", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_10", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_10", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_10", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_10", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_10", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_10", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_10", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_10", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_10", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_10", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_10", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_10", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_10", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_10", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_10", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_10", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_10", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_10", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_10", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_10", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_10", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_10", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_10", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_10", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_10", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_10", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_10", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_10", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_10", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_10", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_10", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_10", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_10", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_10", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_10", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_10", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_10", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_10", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_10", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_10", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_10", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_10", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_10", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_10", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_10", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_10", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_10", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_10", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_10", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_10", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_10", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_10", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_10", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_10", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_10", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_10", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_10", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_10", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_10", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_10", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_10", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_10", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_10", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_10", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_10", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_10", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_10", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_10", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_10", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_10", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_10", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_10", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_10", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_10", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_10", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_10", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_10", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_10", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_10", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_10", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_10", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_10", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_10", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_10", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_10", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_10", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_10", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_10", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_10", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_10", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_10", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_10", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_10", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_10", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_10", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_10", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_10", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_10", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_10", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_10", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_10", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_10", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_10", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_10", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_10", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_10", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_10", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_10", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_10", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_10", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_10", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_10", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_10", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_10", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_10", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_10", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_10", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_10", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_10", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_10", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_10", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_10", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_10", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_10", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_10", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_10", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_10", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_10", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_10", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_10", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_10", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_10", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_10", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_10", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_10", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_10", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_10", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_10", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_10", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_10", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_10", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_10", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_10", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_10", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_10", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_10", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_10", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_10", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_10", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_10", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_10", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_10", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_10", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_10", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_10", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_10", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_10", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_10", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_10", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_10", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_10", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_10", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_10", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_10", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_10", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_10", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_10", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_10", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_10", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_10", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_10", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_10", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_10", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_10", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_10", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_10", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_10", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_10", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_10", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_10", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_10", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_10", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_10", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_10", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_10", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_10", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_10", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_10", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_10", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_10", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_10", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_10", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_10", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_10", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_10", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_10", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_9", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_9", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_9", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_9", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_9", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_9", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_9", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_9", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_9", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_9", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_9", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_9", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_9", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_9", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_9", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_9", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_9", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_9", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_9", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_9", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_9", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_9", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_9", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_9", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_9", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_9", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_9", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_9", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_9", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_9", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_9", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_9", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_9", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_9", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_9", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_9", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_9", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_9", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_9", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_9", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_9", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_9", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_9", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_9", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_9", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_9", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_9", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_9", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_9", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_9", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_9", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_9", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_9", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_9", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_9", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_9", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_9", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_9", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_9", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_9", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_9", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_9", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_9", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_9", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_9", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_9", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_9", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_9", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_9", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_9", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_9", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_9", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_9", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_9", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_9", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_9", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_9", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_9", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_9", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_9", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_9", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_9", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_9", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_9", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_9", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_9", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_9", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_9", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_9", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_9", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_9", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_9", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_9", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_9", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_9", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_9", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_9", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_9", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_9", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_9", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_9", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_9", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_9", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_9", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_9", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_9", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_9", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_9", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_9", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_9", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_9", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_9", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_9", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_9", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_9", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_9", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_9", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_9", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_9", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_9", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_9", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_9", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_9", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_9", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_9", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_9", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_9", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_9", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_9", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_9", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_9", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_9", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_9", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_9", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_9", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_9", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_9", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_9", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_9", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_9", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_9", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_9", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_9", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_9", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_9", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_9", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_9", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_9", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_9", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_9", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_9", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_9", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_9", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_9", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_9", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_9", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_9", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_9", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_9", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_9", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_9", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_9", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_9", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_9", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_9", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_9", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_9", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_9", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_9", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_9", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_9", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_9", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_9", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_9", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_9", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_9", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_9", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_9", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_9", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_9", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_9", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_9", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_9", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_9", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_9", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_9", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_9", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_9", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_9", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_9", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_9", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_9", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_9", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_9", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_9", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_9", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_8", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_8", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_8", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_8", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_8", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_8", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_8", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_8", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_8", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_8", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_8", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_8", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_8", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_8", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_8", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_8", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_8", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_8", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_8", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_8", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_8", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_8", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_8", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_8", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_8", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_8", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_8", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_8", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_8", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_8", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_8", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_8", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_8", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_8", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_8", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_8", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_8", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_8", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_8", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_8", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_8", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_8", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_8", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_8", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_8", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_8", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_8", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_8", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_8", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_8", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_8", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_8", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_8", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_8", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_8", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_8", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_8", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_8", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_8", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_8", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_8", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_8", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_8", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_8", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_8", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_8", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_8", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_8", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_8", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_8", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_8", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_8", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_8", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_8", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_8", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_8", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_8", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_8", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_8", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_8", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_8", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_8", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_8", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_8", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_8", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_8", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_8", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_8", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_8", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_8", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_8", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_8", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_8", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_8", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_8", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_8", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_8", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_8", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_8", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_8", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_8", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_8", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_8", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_8", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_8", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_8", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_8", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_8", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_8", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_8", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_8", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_8", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_8", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_8", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_8", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_8", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_8", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_8", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_8", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_8", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_8", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_8", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_8", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_8", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_8", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_8", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_8", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_8", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_8", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_8", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_8", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_8", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_8", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_8", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_8", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_8", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_8", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_8", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_8", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_8", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_8", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_8", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_8", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_8", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_8", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_8", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_8", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_8", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_8", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_8", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_8", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_8", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_8", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_8", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_8", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_8", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_8", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_8", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_8", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_8", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_8", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_8", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_8", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_8", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_8", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_8", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_8", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_8", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_8", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_8", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_8", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_8", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_8", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_8", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_8", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_8", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_8", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_8", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_8", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_8", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_8", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_8", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_8", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_8", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_8", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_8", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_8", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_8", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_8", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_8", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_8", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_8", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_8", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_8", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_8", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_8", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_8", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_8", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_8", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_7", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_7", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_7", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_7", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_7", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_7", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_7", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_7", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_7", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_7", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_7", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_7", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_7", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_7", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_7", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_7", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_7", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_7", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_7", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_7", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_7", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_7", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_7", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_7", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_7", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_7", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_7", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_7", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_7", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_7", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_7", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_7", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_7", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_7", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_7", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_7", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_7", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_7", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_7", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_7", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_7", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_7", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_7", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_7", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_7", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_7", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_7", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_7", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_7", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_7", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_7", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_7", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_7", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_7", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_7", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_7", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_7", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_7", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_7", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_7", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_7", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_7", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_7", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_7", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_7", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_7", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_7", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_7", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_7", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_7", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_7", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_7", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_7", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_7", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_7", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_7", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_7", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_7", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_7", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_7", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_7", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_7", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_7", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_7", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_7", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_7", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_7", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_7", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_7", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_7", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_7", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_7", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_7", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_7", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_7", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_7", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_7", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_7", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_7", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_7", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_7", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_7", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_7", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_7", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_7", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_7", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_7", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_7", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_7", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_7", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_7", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_7", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B8_7", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_7", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_7", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_7", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_7", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_7", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_7", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_7", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_7", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_7", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_7", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_7", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_7", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_7", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_7", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_7", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_7", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_7", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_7", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_7", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_7", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_7", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_7", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_7", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_7", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_7", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_7", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_7", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_7", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_7", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_7", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_7", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_7", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_7", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_7", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_7", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_7", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_7", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_7", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_7", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_7", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_7", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_7", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_7", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_7", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_7", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_7", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_7", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_7", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_7", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_7", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_7", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_7", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_7", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_7", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_7", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_7", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_7", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_7", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_7", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_7", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_7", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_7", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_7", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_7", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_7", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_7", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_7", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_7", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_7", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_7", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_7", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_7", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_7", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_7", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_7", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_7", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_7", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_7", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_7", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_7", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_7", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_7", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_7", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_7", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_7", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_7", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_7", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_7", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_7", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_7", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_7", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_7", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_7", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_7", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_7", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_6", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_6", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_6", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_6", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_6", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_6", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_6", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_6", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_6", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_6", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_6", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_6", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_6", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_6", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_6", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_6", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_6", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_6", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_6", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_6", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_6", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_6", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_6", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_6", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_6", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_6", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_6", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_6", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_6", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_6", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_6", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_6", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_6", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_6", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_6", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_6", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_6", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_6", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_6", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_6", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_6", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_6", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_6", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_6", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_6", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_6", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_6", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_6", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_6", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_6", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_6", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_6", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_6", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_6", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_6", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_6", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_6", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_6", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_6", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_6", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_6", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_6", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_6", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_6", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_6", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_6", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_6", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_6", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_6", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_6", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_6", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_6", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_6", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_6", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_6", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_6", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_6", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_6", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_6", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_6", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_6", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_6", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_6", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_6", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_6", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_6", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_6", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_6", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_6", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_6", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_6", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_6", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_6", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_6", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_6", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_6", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_6", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_6", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_6", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_6", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_6", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_6", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_6", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_6", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_6", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_6", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_6", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_6", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_6", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_6", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_6", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_6", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B8_6", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_6", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_6", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_6", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_6", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_6", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_6", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_6", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_6", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_6", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_6", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_6", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_6", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_6", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_6", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_6", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_6", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_6", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_6", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_6", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_6", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_6", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_6", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_6", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_6", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_6", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_6", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_6", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_6", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_6", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_6", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_6", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_6", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_6", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_6", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_6", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_6", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_6", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_6", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_6", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_6", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_6", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_6", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_6", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_6", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_6", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_6", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_6", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_6", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_6", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_6", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_6", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_6", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_6", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_6", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_6", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_6", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_6", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_6", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_6", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_6", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_6", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_6", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_6", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_6", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_6", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_6", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_6", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_6", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_6", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_6", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_6", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_6", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_6", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_6", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_6", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_6", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_6", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_6", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_6", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_6", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_6", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_6", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_6", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_6", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_6", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_6", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_6", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_6", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_6", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_6", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_6", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_6", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_6", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_6", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_6", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_5", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_5", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_5", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_5", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_5", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_5", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_5", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_5", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_5", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_5", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_5", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_5", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_5", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_5", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_5", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_5", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_5", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_5", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_5", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_5", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_5", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_5", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_5", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_5", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_5", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_5", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_5", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_5", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_5", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_5", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_5", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_5", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_5", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_5", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_5", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_5", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_5", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_5", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_5", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_5", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_5", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_5", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_5", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_5", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_5", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_5", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_5", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_5", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_5", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_5", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_5", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_5", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_5", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_5", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_5", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_5", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_5", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_5", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_5", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_5", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_5", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_5", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_5", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_5", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_5", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_5", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_5", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_5", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_5", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_5", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_5", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_5", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_5", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_5", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_5", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_5", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_5", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_5", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_5", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_5", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_5", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_5", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_5", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_5", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_5", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_5", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_5", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_5", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_5", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_5", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_5", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_5", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_5", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_5", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_5", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_5", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_5", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_5", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_5", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_5", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_5", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_5", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_5", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_5", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_5", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_5", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_5", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_5", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_5", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_5", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_5", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_5", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_5", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_5", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_5", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_5", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_5", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_5", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_5", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_5", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_5", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_5", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_5", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_5", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_5", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_NE2A0_5", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_5", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_5", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_5", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_5", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_5", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_5", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_5", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_5", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_5", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_5", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_5", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_5", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_5", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_5", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_5", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_5", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_5", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_5", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_5", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_5", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_5", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_5", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_5", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_5", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_5", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_5", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_5", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_5", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_5", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_5", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_5", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_5", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_5", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_5", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_5", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_5", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_5", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_5", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_5", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_5", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_5", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_5", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_5", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_5", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_5", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_5", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_5", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_5", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_5", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_5", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_5", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_5", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_5", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_5", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_5", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_5", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_5", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_5", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_5", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_5", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_5", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_5", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_5", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_5", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_5", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_5", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_5", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_5", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_5", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_5", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_5", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_5", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_5", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_5", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_5", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_5", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_5", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_5", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_5", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 7 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_4", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_4", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_4", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_4", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_4", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_4", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_4", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_4", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_4", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_4", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_4", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_4", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_4", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_4", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_4", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_4", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_4", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_4", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_4", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_4", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_4", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_4", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_4", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_4", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_4", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_4", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_4", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_4", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_4", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_4", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_4", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_4", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_4", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_4", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_4", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_4", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_4", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_4", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_4", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_4", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_4", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_4", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_4", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_4", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_4", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_4", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_4", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_4", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_4", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_4", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_4", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_4", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_4", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_4", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_4", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_4", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_4", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_4", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_4", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_4", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_4", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_4", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_4", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_4", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_4", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_4", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_4", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_4", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_4", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_4", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_4", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_4", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_4", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_4", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_4", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_4", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_4", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_4", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_4", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_4", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_4", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_4", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_4", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_4", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_4", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_4", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_4", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_4", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_4", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_4", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_4", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_4", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_4", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_4", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_4", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_4", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_4", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_4", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_4", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_4", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_4", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_4", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_4", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_4", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_4", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_4", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_4", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_4", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_4", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_4", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_4", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_4", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B8_4", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_4", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_4", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_4", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_4", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_4", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_4", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_4", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_4", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_4", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_4", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_4", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_4", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_4", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_4", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_4", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_4", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_4", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_4", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_4", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_4", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_4", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_4", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_4", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_4", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_4", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_4", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_4", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_4", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_4", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_4", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_4", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_4", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_4", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_4", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_4", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_4", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_4", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_4", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_4", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_4", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_4", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_4", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_4", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_4", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_4", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_4", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_4", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_4", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_4", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_4", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_4", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_4", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_4", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_4", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_4", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_4", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_4", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_4", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_4", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_4", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_4", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_4", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_4", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_4", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_4", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_4", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_4", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_4", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_4", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_4", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_4", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_4", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_4", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_4", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_4", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_4", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_4", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_4", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_4", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_4", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_4", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_4", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_4", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_4", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_4", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_4", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_4", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_4", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_4", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_4", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_4", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_4", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_4", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_4", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_4", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 8 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_3", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_3", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_3", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_3", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_3", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_3", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_3", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_3", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_3", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_3", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_3", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_3", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_3", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_3", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_3", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_3", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_3", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_3", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_3", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_3", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_3", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_3", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_3", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_3", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_3", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_3", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_3", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_3", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_3", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_3", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_3", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_3", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_3", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_3", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_3", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_3", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_3", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_3", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_3", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_3", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_3", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_3", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_3", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_3", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_3", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_3", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_3", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_3", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_3", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_3", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_3", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_3", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_3", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_3", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_3", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_3", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_3", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_3", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_3", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_3", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_3", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_3", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_3", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_3", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_3", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_3", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_3", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_3", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_3", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_3", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_3", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_3", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_3", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_3", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_3", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_3", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_3", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_3", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_3", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_3", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_3", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_3", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_3", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_3", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_3", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_3", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_3", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_3", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_3", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_3", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_3", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_3", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_3", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_3", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_3", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_3", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_3", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_3", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_3", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_3", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_3", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_3", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_3", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_3", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_3", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_3", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_3", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_3", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_3", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_3", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_3", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_3", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B8_3", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_3", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_3", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_3", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_3", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_3", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_3", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_3", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_3", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_3", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_3", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_3", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_3", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_3", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_3", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_3", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_3", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_3", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_3", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_3", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_3", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_3", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_3", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_3", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_3", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_3", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_3", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_3", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_3", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_3", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_3", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_3", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_3", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_3", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_3", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_3", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_3", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_3", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_3", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_3", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_3", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_3", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_3", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_3", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_3", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_3", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_3", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_3", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_3", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_3", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_3", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_3", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_3", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_3", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_3", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_3", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_3", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_3", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_3", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_3", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_3", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_3", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_3", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_3", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_3", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_3", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_3", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_3", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_3", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_3", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_3", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_3", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_3", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_3", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_3", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_3", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_3", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_3", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_3", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_3", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_3", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_3", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_3", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_3", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_3", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_3", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_3", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_3", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_3", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_3", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_3", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_3", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_3", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_3", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_3", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 9 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_2", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_2", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_2", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_2", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_2", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_2", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_2", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_2", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_2", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_2", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_2", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_2", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_2", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_2", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_2", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_2", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_2", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_2", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_2", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_2", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_2", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_2", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_2", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_2", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_2", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_2", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_2", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_2", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_2", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_2", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_2", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_2", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_2", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_2", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_2", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_2", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_2", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_2", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_2", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_2", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_2", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_2", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_2", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_2", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_2", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_2", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_2", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_2", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_2", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_2", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_2", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_2", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_2", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_2", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_2", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_2", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_2", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_2", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_2", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_2", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_2", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_2", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_2", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_2", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_2", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_2", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_2", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_2", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_2", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_2", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_2", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_2", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_2", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_2", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_2", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_2", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_2", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_2", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_2", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_2", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_2", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_2", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_2", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_2", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_2", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_2", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_2", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_2", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_2", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_2", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_2", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_2", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_2", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_2", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_2", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_2", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_2", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_2", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_2", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_2", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_2", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_2", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_2", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_2", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_2", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_2", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_2", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_2", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_2", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_2", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_2", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_2", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B8_2", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_2", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_2", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_2", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_2", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_2", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_2", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_2", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_2", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_2", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_2", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_2", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_2", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_2", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_2", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_2", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_2", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_2", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_2", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_2", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_2", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_2", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_2", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_2", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_2", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_2", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_2", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_2", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_2", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_2", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_2", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_2", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_2", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_2", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_2", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_2", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_2", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_2", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_2", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_2", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_2", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_2", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_2", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_2", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_2", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_2", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_2", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_2", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_2", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_2", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_2", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_2", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_2", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_2", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_2", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_2", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_2", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_2", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_2", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_2", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_2", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_2", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_2", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_2", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_2", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_2", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_2", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_2", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_2", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_2", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_2", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_2", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_2", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_2", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_2", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_2", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_2", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_2", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_2", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_2", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_2", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_2", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_2", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_2", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_2", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_2", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_2", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_2", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_2", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_2", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_2", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_2", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_2", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_2", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_2", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_2", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 10 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_1", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_1", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_1", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_1", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_1", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_1", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_1", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_1", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_1", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_1", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_1", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_1", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_1", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_1", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_1", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_1", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_1", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_1", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_1", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_1", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_1", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_1", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_1", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_1", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_1", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_1", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_1", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_1", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_1", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_1", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_1", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_1", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_1", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_1", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_1", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_1", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_1", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_1", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_1", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_1", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_1", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_1", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_1", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_1", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_1", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_1", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_1", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_1", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_1", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_1", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_1", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_1", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_1", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_1", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_1", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_1", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_1", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_1", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_1", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_1", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_1", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_1", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_1", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_1", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_1", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_1", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_1", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_1", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_1", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_1", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_1", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_1", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_1", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_1", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_1", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_1", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_1", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_1", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_1", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_1", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_1", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_1", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_1", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_1", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_1", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_1", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_1", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_1", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_1", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_1", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_1", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_1", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_1", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_1", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_1", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_1", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_1", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_1", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_1", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_1", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_1", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_1", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_1", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_1", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_1", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_1", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_1", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_1", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_1", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_1", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_1", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_1", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_1", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_1", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_1", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_1", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_1", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_1", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_1", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_1", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_1", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_1", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_1", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_1", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_1", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_1", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_1", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_1", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_1", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_1", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_1", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_1", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_1", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_1", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_1", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_1", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_1", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_1", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_1", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_1", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_1", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_1", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_1", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_1", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_1", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_1", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_1", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_1", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_1", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_1", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_1", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_1", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_1", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_1", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_1", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_1", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_1", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_1", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_1", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_1", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_1", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_1", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_1", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_1", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_1", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_1", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_1", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_1", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_1", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_1", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_1", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_1", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_1", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_1", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_1", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_1", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_1", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_1", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_1", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_1", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_1", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_1", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_1", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_1", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_1", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_1", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_1", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_1", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_1", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_1", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_1", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_1", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_1", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_1", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_1", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_1", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_1", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_1", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_1", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_1", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_1", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_1", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_1", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_1", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_1", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_1", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 11 + ], + "tile_types": [ + "CFG_CENTER_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_0", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_0", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_0", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_0", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_0", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_0", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_0", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_0", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_0", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_0", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_0", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_0", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_0", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_0", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_0", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_0", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_0", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_0", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_0", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_0", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_0", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_0", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_0", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_0", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_0", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_0", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_0", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_0", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_0", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_0", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_0", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_0", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_0", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_0", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_0", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_0", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_0", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_0", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_0", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_0", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_0", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_0", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_0", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_0", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_0", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_0", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_0", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_0", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_0", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_0", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_0", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_0", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_0", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_0", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_0", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_0", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_0", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_0", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_0", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_0", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_0", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_0", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_0", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_0", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_0", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_0", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_0", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_0", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_0", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_0", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_0", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_0", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_0", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_0", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_0", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_0", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_0", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_0", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_0", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_0", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_0", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_0", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_0", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_0", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_0", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_0", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_0", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_0", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_0", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_0", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_0", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_0", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_0", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_0", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_0", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_0", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_0", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_0", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_0", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_0", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_0", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_0", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_0", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_0", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_0", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_0", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_0", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_0", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_0", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_0", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_0", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_0", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B8_0", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B9_0", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B10_0", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B11_0", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B12_0", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B13_0", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B14_0", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B15_0", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_0", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_0", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_0", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_0", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_0", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_0", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_0", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_0", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_0", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_0", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_0", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_0", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_0", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_0", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_0", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_0", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_0", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_0", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_0", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_0", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_0", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_0", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_0", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_0", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_0", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_0", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_0", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_0", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_0", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_0", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_0", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_0", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_0", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_0", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_0", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_0", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_0", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_0", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_0", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_0", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_0", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_0", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_0", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_0", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_0", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_0", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_0", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_0", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_0", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_0", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_0", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_0", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_0", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_0", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_0", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_0", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_0", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_0", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_0", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_0", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_0", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_0", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_0", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_0", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_0", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_0", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_0", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_0", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_0", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_0", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_0", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_0", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_0", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_0", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_0", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_0", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_0", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_0", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_0", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_0", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_0", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_0", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_0", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_0", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_0", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_0", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_0", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_0", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -9 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_9", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_9", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_9", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_9", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_9", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_9", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_9", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_9", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_9", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_9", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_9", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_9", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_9", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_9", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_9", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_9", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_9", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_9", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_9", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_9", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_9", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_9", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_9", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_9", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_9", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_9", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_9", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_9", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_9", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_9", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_9", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_9", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_9", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_9", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_9", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_9", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_9", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_9", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_9", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_9", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_9", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_9", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_9", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_9", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_9", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_9", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_9", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_9", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_9", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_9", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_9", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_9", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_9", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_9", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_9", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_9", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_9", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_9", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_9", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_9", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_9", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_9", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_9", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_9", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_9", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_9", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_9", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_9", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_9", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_9", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_9", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_9", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_9", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_9", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_9", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_9", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_9", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_9", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_9", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_9", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_9", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_9", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_9", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_9", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_9", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_9", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_9", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_9", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_9", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_9", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_9", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_9", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_9", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_9", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_9", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_9", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_9", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_9", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_9", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_9", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_9", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_9", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_9", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_9", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_9", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_9", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_9", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_9", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_9", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_9", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_9", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_9", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_9", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_9", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_9", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_9", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_9", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_9", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_9", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_9", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_9", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_9", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_9", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_9", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -8 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_8", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_8", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_8", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_8", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_8", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_8", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_8", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_8", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_8", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_8", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_8", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_8", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_8", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_8", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_8", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_8", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_8", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_8", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_8", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_8", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_8", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_8", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_8", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_8", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_8", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_8", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_8", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_8", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_8", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_8", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_8", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_8", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_8", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_8", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_8", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_8", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_8", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_8", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_8", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_8", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_8", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_8", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_8", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_8", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_8", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_8", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_8", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_8", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_8", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_8", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_8", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_8", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_8", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_8", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_8", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_8", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_8", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_8", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_8", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_8", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_8", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_8", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_8", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_8", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_8", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_8", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_8", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_8", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_8", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_8", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_8", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_8", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_8", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_8", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_8", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_8", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_8", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_8", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_8", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_8", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_8", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_8", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_8", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_8", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_8", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_8", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_8", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_8", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_8", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_8", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_8", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_8", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_8", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_8", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_8", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_8", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_8", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_8", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_8", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_8", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_8", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_8", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_8", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_8", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_8", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_8", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_8", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_8", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_8", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_8", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_8", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_8", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_8", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_8", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_8", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_8", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_8", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_8", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_8", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_8", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_8", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_8", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_8", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_8", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_7", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_7", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_7", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_7", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_7", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_7", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_7", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_7", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_7", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_7", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_7", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_7", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_7", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_7", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_7", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_7", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_7", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_7", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_7", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_7", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_7", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_7", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_7", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_7", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_7", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_7", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_7", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_7", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_7", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_7", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_7", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_7", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_7", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_7", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_7", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_7", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_7", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_7", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_7", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_7", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_7", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_7", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_7", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_7", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_7", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_7", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_7", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_7", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_7", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_7", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_7", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_7", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_7", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_7", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_7", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_7", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_7", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_7", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_7", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_7", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_7", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_7", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_7", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_7", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_7", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_7", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_7", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_7", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_7", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_7", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_7", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_7", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_7", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_7", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_7", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_7", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_7", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_7", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_7", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_7", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_7", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_7", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_7", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_7", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_7", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_7", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_7", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_7", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_7", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_7", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_7", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_7", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_7", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_7", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_7", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_7", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_7", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_7", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_7", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_7", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_7", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_7", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_7", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_7", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_7", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_7", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_7", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_7", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_7", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_7", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_7", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_7", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_7", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_7", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_7", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_7", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_7", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_7", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_7", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_7", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_7", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_7", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_7", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_7", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_6", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_6", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_6", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_6", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_6", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_6", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_6", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_6", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_6", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_6", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_6", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_6", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_6", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_6", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_6", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_6", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_6", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_6", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_6", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_6", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_6", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_6", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_6", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_6", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_6", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_6", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_6", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_6", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_6", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_6", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_6", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_6", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_6", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_6", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_6", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_6", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_6", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_6", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_6", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_6", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_6", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_6", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_6", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_6", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_6", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_6", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_6", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_6", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_6", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_6", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_6", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_6", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_6", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_6", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_6", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_6", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_6", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_6", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_6", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_6", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_6", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_6", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_6", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_6", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_6", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_6", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_6", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_6", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_6", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_6", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_6", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_6", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_6", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_6", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_6", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_6", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_6", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_6", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_6", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_6", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_6", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_6", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_6", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_6", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_6", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_6", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_6", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_6", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_6", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_6", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_6", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_6", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_6", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_6", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_6", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_6", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_6", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_6", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_6", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_6", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_6", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_6", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_6", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_6", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_6", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_6", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_6", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_6", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_6", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_6", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_6", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_6", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_6", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_6", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_6", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_6", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_6", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_6", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_6", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_6", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_6", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_6", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_6", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_6", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_5", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_5", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_5", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_5", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_5", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_5", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_5", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_5", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_5", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_5", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_5", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_5", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_5", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_5", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_5", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_5", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_5", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_5", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_5", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_5", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_5", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_5", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_5", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_5", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_5", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_5", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_5", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_5", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_5", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_5", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_5", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_5", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_5", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_5", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_5", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_5", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_5", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_5", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_5", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_5", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_5", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_5", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_5", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_5", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_5", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_5", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_5", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_5", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_5", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_5", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_5", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_5", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_5", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_5", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_5", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_5", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_5", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_5", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_5", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_5", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_5", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_5", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_5", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_5", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_5", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_5", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_5", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_5", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_5", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_5", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_5", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_5", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_5", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_5", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_5", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_5", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_5", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_5", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_5", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_5", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_5", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_5", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_5", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_5", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_5", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_5", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_5", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_5", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_5", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_5", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_5", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_5", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_5", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_5", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_5", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_5", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_5", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_5", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_5", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_5", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_5", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_5", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_5", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_5", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_5", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_5", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_5", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_5", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_5", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_5", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_5", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_5", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_5", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_5", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_5", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_5", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_5", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_5", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_5", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_5", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_5", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_5", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_5", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_5", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_4", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_4", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_4", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_4", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_4", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_4", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_4", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_4", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_4", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_4", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_4", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_4", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_4", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_4", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_4", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_4", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_4", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_4", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_4", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_4", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_4", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_4", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_4", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_4", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_4", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_4", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_4", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_4", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_4", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_4", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_4", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_4", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_4", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_4", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_4", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_4", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_4", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_4", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_4", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_4", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_4", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_4", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_4", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_4", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_4", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_4", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_4", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_4", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_4", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_4", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_4", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_4", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_4", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_4", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_4", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_4", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_4", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_4", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_4", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_4", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_4", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_4", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_4", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_4", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_4", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_4", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_4", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_4", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_4", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_4", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_4", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_4", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_4", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_4", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_4", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_4", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_4", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_4", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_4", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_4", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_4", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_4", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_4", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_4", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_4", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_4", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_4", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_4", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_4", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_4", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_4", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_4", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_4", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_4", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_4", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_4", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_4", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_4", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_4", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_4", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_4", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_4", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_4", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_4", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_4", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_4", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_4", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_4", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_4", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_4", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_4", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_4", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_4", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_4", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_4", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_4", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_4", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_4", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_4", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_4", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_4", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_4", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_4", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_4", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_3", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_3", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_3", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_3", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_3", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_3", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_3", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_3", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_3", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_3", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_3", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_3", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_3", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_3", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_3", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_3", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_3", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_3", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_3", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_3", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_3", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_3", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_3", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_3", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_3", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_3", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_3", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_3", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_3", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_3", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_3", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_3", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_3", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_3", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_3", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_3", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_3", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_3", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_3", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_3", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_3", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_3", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_3", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_3", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_3", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_3", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_3", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_3", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_3", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_3", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_3", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_3", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_3", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_3", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_3", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_3", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_3", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_3", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_3", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_3", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_3", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_3", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_3", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_3", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_3", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_3", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_3", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_3", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_3", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_3", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_3", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_3", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_3", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_3", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_3", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_3", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_3", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_3", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_3", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_3", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_3", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_3", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_3", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_3", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_3", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_3", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_3", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_3", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_3", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_3", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_3", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_3", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_3", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_3", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_3", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_3", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_3", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_3", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_3", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_3", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_3", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_3", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_3", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_3", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_3", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_3", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_3", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_3", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_3", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_3", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_3", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_3", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_3", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_3", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_3", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_3", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_3", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_3", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_3", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_3", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_3", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_3", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_3", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_3", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_2", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_2", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_2", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_2", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_2", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_2", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_2", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_2", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_2", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_2", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_2", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_2", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_2", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_2", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_2", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_2", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_2", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_2", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_2", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_2", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_2", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_2", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_2", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_2", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_2", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_2", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_2", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_2", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_2", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_2", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_2", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_2", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_2", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_2", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_2", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_2", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_2", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_2", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_2", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_2", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_2", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_2", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_2", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_2", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_2", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_2", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_2", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_2", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_2", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_2", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_2", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_2", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_2", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_2", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_2", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_2", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_2", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_2", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_2", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_2", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_2", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_2", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_2", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_2", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_2", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_2", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_2", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_2", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_2", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_2", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_2", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_2", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_2", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_2", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_2", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_2", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_2", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_2", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_2", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_2", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_2", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_2", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_2", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_2", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_2", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_2", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_2", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_2", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_2", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_2", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_2", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_2", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_2", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_2", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_2", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_2", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_2", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_2", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_2", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_2", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_2", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_2", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_2", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_2", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_2", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_2", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_2", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_2", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_2", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_2", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_2", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_2", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_2", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_2", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_2", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_2", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_2", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_2", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_2", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_2", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_2", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_2", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_2", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_2", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_1", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_1", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_1", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_1", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_1", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_1", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_1", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_1", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_1", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_1", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_1", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_1", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_1", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_1", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_1", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_1", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_1", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_1", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_1", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_1", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_1", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_1", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_1", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_1", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_1", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_1", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_1", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_1", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_1", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_1", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_1", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_1", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_1", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_1", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_1", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_1", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_1", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_1", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_1", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_1", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_1", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_1", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_1", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_1", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_1", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_1", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_1", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_1", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_1", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_1", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_1", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_1", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_1", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_1", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_1", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_1", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_1", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_1", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_1", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_1", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_1", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_1", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_1", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_1", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_1", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_1", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_1", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_1", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_1", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_1", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_1", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_1", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_1", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_1", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_1", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_1", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_1", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_1", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_1", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_1", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_1", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_1", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_1", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_1", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_1", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_1", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_1", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_1", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_1", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_1", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_1", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_1", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_1", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_1", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_1", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_1", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_1", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_1", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_1", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_1", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_1", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_1", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_1", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_1", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_1", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_1", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_1", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_1", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_1", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_1", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_1", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_1", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_1", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_1", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_1", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_1", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_1", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_1", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_1", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_1", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_1", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_1", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_1", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_1", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "CFG_CENTER_EE2A0_0", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_0", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_0", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_0", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_0", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_0", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_0", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_0", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_0", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_0", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_0", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_0", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_0", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_0", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_0", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_0", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_0", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_0", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_0", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_0", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_0", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_0", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_0", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_0", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_0", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_0", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_0", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_0", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_0", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_0", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_0", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_0", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "CFG_CENTER_LH1_0", + "INT_FEEDTHRU_2_LH1" + ], + [ + "CFG_CENTER_LH2_0", + "INT_FEEDTHRU_2_LH2" + ], + [ + "CFG_CENTER_LH3_0", + "INT_FEEDTHRU_2_LH3" + ], + [ + "CFG_CENTER_LH4_0", + "INT_FEEDTHRU_2_LH4" + ], + [ + "CFG_CENTER_LH5_0", + "INT_FEEDTHRU_2_LH5" + ], + [ + "CFG_CENTER_LH6_0", + "INT_FEEDTHRU_2_LH6" + ], + [ + "CFG_CENTER_LH7_0", + "INT_FEEDTHRU_2_LH7" + ], + [ + "CFG_CENTER_LH8_0", + "INT_FEEDTHRU_2_LH8" + ], + [ + "CFG_CENTER_LH9_0", + "INT_FEEDTHRU_2_LH9" + ], + [ + "CFG_CENTER_LH10_0", + "INT_FEEDTHRU_2_LH10" + ], + [ + "CFG_CENTER_LH11_0", + "INT_FEEDTHRU_2_LH11" + ], + [ + "CFG_CENTER_LH12_0", + "INT_FEEDTHRU_2_LH12" + ], + [ + "CFG_CENTER_NE2A0_0", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_0", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_0", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_0", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_0", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_0", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_0", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_0", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_0", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_0", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_0", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_0", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_0", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_0", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_0", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_0", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_0", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_0", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_0", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_0", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_0", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_0", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_0", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_0", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_0", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_0", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_0", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_0", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_0", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_0", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_0", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_0", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_0", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_0", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_0", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_0", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_0", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_0", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_0", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_0", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_0", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_0", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_0", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_0", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_0", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_0", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_0", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_0", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_0", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_0", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_0", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_0", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_0", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_0", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_0", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_0", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_0", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_0", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_0", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_0", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_0", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_0", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_0", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_0", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_0", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_0", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_0", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_0", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_0", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_0", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_0", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_0", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_0", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_0", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_0", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_0", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_0", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_0", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_0", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_0", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -9 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_9", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_9", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_9", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_9", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_9", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_9", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_9", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_9", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_9", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_9", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_9", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_9", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_9", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_9", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_9", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_9", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_9", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_9", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_9", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_9", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_9", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_9", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_9", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_9", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_9", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_9", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_9", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_9", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_9", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_9", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_9", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_9", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_9", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_9", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_9", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_9", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_9", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_9", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_9", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_9", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_9", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_9", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_9", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_9", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_9", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_9", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_9", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_9", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_9", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_9", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_9", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_9", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_9", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_9", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_9", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_9", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_9", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_9", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_9", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_9", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_9", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_9", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_9", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_9", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_9", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_9", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_9", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_9", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_9", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_9", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_9", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_9", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_9", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_9", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_9", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_9", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_9", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_9", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_9", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_9", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_9", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_9", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_9", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_9", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_9", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_9", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_9", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_9", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_9", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_9", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_9", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_9", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_9", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_9", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_9", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_9", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_9", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_9", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_9", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_9", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_9", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_9", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_9", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_9", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_9", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_9", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_9", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_9", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_9", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_9", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_9", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_9", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_9", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_9", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_9", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_9", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_9", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_9", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_9", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_9", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_9", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_9", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_9", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_9", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_9", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_9", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_9", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_9", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_9", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_9", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_9", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_9", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_9", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_9", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_9", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_9", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_9", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_9", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_9", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_9", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_9", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_9", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_9", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_9", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_9", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_9", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_9", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_9", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_9", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_9", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_9", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_9", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_9", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_9", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_9", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_9", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_9", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_9", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_9", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_9", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_9", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_9", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_9", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_9", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_9", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_9", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_9", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_9", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_9", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_9", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_9", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_9", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_9", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_9", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_9", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_9", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_9", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_9", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_9", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_9", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_9", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_9", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_9", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_9", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_9", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_9", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_9", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_9", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_9", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_9", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_9", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_9", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_9", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_9", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_9", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_9", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_9", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_9", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_9", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_9", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -8 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_8", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_8", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_8", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_8", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_8", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_8", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_8", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_8", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_8", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_8", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_8", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_8", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_8", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_8", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_8", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_8", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_8", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_8", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_8", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_8", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_8", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_8", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_8", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_8", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_8", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_8", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_8", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_8", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_8", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_8", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_8", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_8", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_8", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_8", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_8", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_8", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_8", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_8", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_8", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_8", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_8", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_8", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_8", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_8", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_8", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_8", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_8", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_8", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_8", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_8", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_8", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_8", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_8", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_8", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_8", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_8", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_8", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_8", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_8", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_8", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_8", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_8", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_8", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_8", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_8", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_8", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_8", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_8", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_8", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_8", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_8", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_8", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_8", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_8", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_8", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_8", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_8", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_8", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_8", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_8", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_8", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_8", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_8", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_8", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_8", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_8", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_8", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_8", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_8", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_8", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_8", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_8", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_8", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_8", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_8", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_8", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_8", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_8", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_8", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_8", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_8", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_8", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_8", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_8", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_8", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_8", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_8", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_8", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_8", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_8", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_8", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_8", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_8", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_8", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_8", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_8", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_8", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_8", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_8", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_8", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_8", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_8", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_8", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_8", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_8", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_8", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_8", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_8", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_8", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_8", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_8", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_8", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_8", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_8", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_8", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_8", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_8", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_8", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_8", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_8", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_8", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_8", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_8", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_8", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_8", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_8", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_8", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_8", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_8", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_8", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_8", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_8", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_8", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_8", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_8", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_8", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_8", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_8", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_8", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_8", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_8", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_8", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_8", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_8", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_8", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_8", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_8", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_8", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_8", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_8", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_8", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_8", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_8", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_8", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_8", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_8", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_8", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_8", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_8", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_8", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_8", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_8", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_8", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_8", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_8", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_8", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_8", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_8", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_8", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_8", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_8", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_8", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_8", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_8", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_8", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_8", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_8", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_8", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_8", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_8", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_7", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_7", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_7", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_7", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_7", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_7", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_7", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_7", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_7", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_7", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_7", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_7", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_7", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_7", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_7", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_7", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_7", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_7", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_7", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_7", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_7", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_7", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_7", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_7", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_7", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_7", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_7", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_7", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_7", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_7", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_7", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_7", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_7", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_7", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_7", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_7", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_7", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_7", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_7", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_7", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_7", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_7", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_7", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_7", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_7", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_7", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_7", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_7", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_7", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_7", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_7", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_7", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_7", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_7", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_7", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_7", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_7", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_7", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_7", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_7", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_7", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_7", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_7", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_7", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_7", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_7", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_7", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_7", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_7", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_7", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_7", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_7", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_7", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_7", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_7", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_7", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_7", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_7", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_7", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_7", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_7", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_7", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_7", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_7", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_7", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_7", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_7", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_7", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_7", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_7", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_7", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_7", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_7", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_7", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_7", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_7", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_7", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_7", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_7", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_7", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_7", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_7", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_7", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_7", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_7", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_7", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_7", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_7", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_7", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_7", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_7", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_7", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_7", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_7", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_7", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_7", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_7", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_7", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_7", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_7", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_7", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_7", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_7", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_7", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_7", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_7", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_7", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_7", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_7", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_7", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_7", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_7", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_7", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_7", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_7", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_7", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_7", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_7", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_7", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_7", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_7", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_7", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_7", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_7", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_7", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_7", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_7", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_7", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_7", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_7", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_7", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_7", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_7", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_7", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_7", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_7", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_7", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_7", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_7", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_7", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_7", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_7", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_7", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_7", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_7", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_7", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_7", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_7", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_7", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_7", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_7", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_7", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_7", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_7", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_7", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_7", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_7", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_7", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_7", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_7", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_7", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_7", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_7", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_7", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_7", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_7", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_7", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_7", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_7", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_7", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_7", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_7", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_7", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_7", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_7", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_7", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_7", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_7", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_7", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_7", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_6", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_6", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_6", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_6", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_6", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_6", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_6", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_6", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_6", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_6", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_6", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_6", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_6", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_6", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_6", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_6", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_6", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_6", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_6", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_6", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_6", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_6", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_6", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_6", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_6", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_6", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_6", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_6", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_6", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_6", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_6", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_6", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_6", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_6", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_6", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_6", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_6", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_6", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_6", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_6", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_6", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_6", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_6", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_6", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_6", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_6", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_6", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_6", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_6", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_6", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_6", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_6", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_6", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_6", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_6", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_6", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_6", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_6", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_6", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_6", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_6", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_6", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_6", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_6", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_6", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_6", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_6", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_6", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_6", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_6", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_6", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_6", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_6", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_6", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_6", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_6", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_6", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_6", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_6", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_6", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_6", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_6", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_6", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_6", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_6", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_6", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_6", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_6", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_6", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_6", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_6", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_6", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_6", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_6", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_6", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_6", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_6", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_6", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_6", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_6", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_6", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_6", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_6", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_6", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_6", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_6", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_6", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_6", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_6", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_6", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_6", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_6", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_6", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_6", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_6", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_6", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_6", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_6", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_6", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_6", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_6", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_6", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_6", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_6", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_6", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_6", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_6", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_6", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_6", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_6", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_6", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_6", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_6", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_6", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_6", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_6", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_6", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_6", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_6", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_6", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_6", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_6", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_6", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_6", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_6", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_6", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_6", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_6", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_6", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_6", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_6", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_6", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_6", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_6", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_6", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_6", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_6", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_6", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_6", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_6", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_6", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_6", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_6", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_6", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_6", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_6", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_6", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_6", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_6", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_6", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_6", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_6", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_6", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_6", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_6", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_6", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_6", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_6", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_6", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_6", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_6", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_6", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_6", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_6", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_6", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_6", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_6", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_6", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_6", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_6", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_6", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_6", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_6", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_6", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_6", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_6", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_6", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_6", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_6", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_6", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_5", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_5", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_5", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_5", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_5", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_5", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_5", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_5", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_5", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_5", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_5", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_5", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_5", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_5", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_5", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_5", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_5", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_5", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_5", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_5", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_5", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_5", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_5", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_5", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_5", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_5", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_5", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_5", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_5", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_5", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_5", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_5", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_5", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_5", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_5", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_5", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_5", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_5", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_5", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_5", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_5", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_5", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_5", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_5", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_5", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_5", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_5", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_5", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_5", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_5", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_5", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_5", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_5", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_5", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_5", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_5", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_5", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_5", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_5", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_5", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_5", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_5", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_5", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_5", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_5", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_5", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_5", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_5", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_5", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_5", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_5", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_5", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_5", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_5", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_5", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_5", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_5", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_5", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_5", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_5", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_5", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_5", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_5", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_5", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_5", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_5", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_5", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_5", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_5", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_5", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_5", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_5", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_5", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_5", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_5", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_5", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_5", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_5", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_5", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_5", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_5", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_5", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_5", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_5", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_5", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_5", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_5", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_5", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_5", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_5", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_5", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_5", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_5", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_5", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_5", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_5", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_5", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_5", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_5", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_5", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_5", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_5", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_5", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_5", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_5", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_5", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_5", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_5", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_5", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_5", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_5", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_5", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_5", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_5", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_5", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_5", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_5", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_5", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_5", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_5", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_5", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_5", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_5", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_5", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_5", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_5", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_5", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_5", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_5", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_5", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_5", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_5", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_5", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_5", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_5", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_5", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_5", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_5", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_5", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_5", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_5", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_5", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_5", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_5", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_5", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_5", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_5", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_5", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_5", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_5", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_5", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_5", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_5", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_5", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_5", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_5", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_5", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_5", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_5", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_5", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_5", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_5", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_5", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_5", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_5", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_5", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_5", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_5", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_5", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_5", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_5", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_5", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_5", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_5", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_5", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_5", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_5", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_5", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_5", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_5", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_4", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_4", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_4", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_4", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_4", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_4", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_4", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_4", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_4", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_4", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_4", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_4", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_4", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_4", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_4", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_4", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_4", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_4", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_4", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_4", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_4", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_4", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_4", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_4", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_4", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_4", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_4", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_4", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_4", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_4", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_4", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_4", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_4", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_4", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_4", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_4", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_4", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_4", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_4", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_4", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_4", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_4", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_4", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_4", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_4", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_4", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_4", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_4", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_4", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_4", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_4", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_4", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_4", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_4", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_4", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_4", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_4", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_4", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_4", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_4", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_4", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_4", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_4", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_4", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_4", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_4", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_4", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_4", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_4", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_4", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_4", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_4", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_4", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_4", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_4", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_4", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_4", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_4", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_4", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_4", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_4", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_4", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_4", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_4", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_4", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_4", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_4", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_4", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_4", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_4", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_4", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_4", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_4", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_4", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_4", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_4", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_4", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_4", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_4", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_4", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_4", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_4", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_4", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_4", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_4", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_4", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_4", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_4", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_4", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_4", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_4", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_4", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_4", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_4", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_4", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_4", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_4", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_4", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_4", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_4", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_4", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_4", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_4", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_4", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_4", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_4", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_4", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_4", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_4", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_4", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_4", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_4", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_4", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_4", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_4", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_4", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_4", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_4", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_4", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_4", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_4", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_4", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_4", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_4", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_4", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_4", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_4", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_4", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_4", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_4", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_4", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_4", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_4", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_4", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_4", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_4", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_4", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_4", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_4", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_4", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_4", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_4", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_4", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_4", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_4", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_4", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_4", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_4", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_4", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_4", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_4", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_4", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_4", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_4", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_4", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_4", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_4", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_4", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_4", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_4", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_4", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_4", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_4", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_4", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_4", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_4", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_4", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_4", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_4", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_4", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_4", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_4", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_4", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_4", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_3", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_3", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_3", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_3", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_3", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_3", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_3", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_3", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_3", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_3", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_3", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_3", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_3", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_3", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_3", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_3", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_3", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_3", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_3", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_3", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_3", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_3", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_3", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_3", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_3", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_3", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_3", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_3", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_3", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_3", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_3", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_3", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_3", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_3", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_3", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_3", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_3", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_3", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_3", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_3", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_3", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_3", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_3", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_3", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_3", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_3", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_3", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_3", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_3", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_3", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_3", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_3", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_3", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_3", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_3", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_3", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_3", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_3", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_3", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_3", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_3", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_3", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_3", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_3", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_3", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_3", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_3", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_3", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_3", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_3", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_3", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_3", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_3", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_3", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_3", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_3", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_3", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_3", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_3", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_3", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_3", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_3", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_3", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_3", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_3", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_3", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_3", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_3", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_3", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_3", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_3", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_3", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_3", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_3", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_3", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_3", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_3", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_3", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_3", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_3", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_3", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_3", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_3", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_3", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_3", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_3", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_3", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_3", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_3", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_3", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_3", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_3", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B16_3", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B17_3", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B18_3", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B19_3", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_3", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_3", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_3", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_3", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_3", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_3", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_3", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_3", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_3", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_3", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_3", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_3", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_3", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_3", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_3", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_3", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_3", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_3", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_3", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_3", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_3", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_3", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_3", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_3", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_3", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_3", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_3", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_3", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_3", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_3", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_3", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_3", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_3", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_3", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_3", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_3", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_3", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_3", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_3", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_3", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_3", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_3", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_3", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_3", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_3", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_3", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_3", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_3", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_3", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_3", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_3", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_3", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_3", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_3", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_3", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_3", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_3", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_3", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_3", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_3", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_3", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_3", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_3", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_3", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_3", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_3", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_3", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_3", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_3", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_3", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_3", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_3", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_3", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_3", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_3", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_3", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_3", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_3", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_3", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_3", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_3", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_3", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_3", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_2", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_2", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_2", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_2", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_2", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_2", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_2", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_2", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_2", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_2", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_2", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_2", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_2", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_2", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_2", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_2", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_2", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_2", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_2", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_2", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_2", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_2", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_2", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_2", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_2", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_2", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_2", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_2", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_2", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_2", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_2", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_2", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_2", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_2", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_2", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_2", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_2", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_2", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_2", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_2", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_2", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_2", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_2", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_2", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_2", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_2", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_2", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_2", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_2", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_2", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_2", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_2", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_2", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_2", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_2", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_2", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_2", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_2", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_2", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_2", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_2", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_2", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_2", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_2", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_2", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_2", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_2", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_2", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_2", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_2", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_2", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_2", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_2", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_2", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_2", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_2", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_2", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_2", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_2", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_2", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_2", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_2", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_2", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_2", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_2", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_2", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_2", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_2", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_2", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_2", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_2", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_2", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_2", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_2", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_2", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_2", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_2", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_2", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_2", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_2", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_2", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_2", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_2", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_2", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_2", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_2", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_2", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_2", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_2", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_2", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_2", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_2", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B20_2", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B21_2", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B22_2", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "CFG_CENTER_LOGIC_OUTS_B23_2", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "CFG_CENTER_NE2A0_2", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_2", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_2", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_2", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_2", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_2", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_2", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_2", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_2", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_2", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_2", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_2", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_2", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_2", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_2", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_2", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_2", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_2", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_2", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_2", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_2", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_2", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_2", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_2", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_2", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_2", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_2", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_2", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_2", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_2", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_2", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_2", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_2", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_2", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_2", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_2", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_2", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_2", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_2", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_2", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_2", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_2", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_2", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_2", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_2", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_2", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_2", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_2", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_2", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_2", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_2", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_2", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_2", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_2", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_2", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_2", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_2", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_2", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_2", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_2", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_2", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_2", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_2", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_2", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_2", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_2", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_2", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_2", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_2", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_2", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_2", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_2", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_2", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_2", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_2", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_2", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_2", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_2", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_2", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_2", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_1", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_1", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_1", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_1", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_1", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_1", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_1", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_1", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_1", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_1", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_1", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_1", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_1", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_1", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_1", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_1", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_1", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_1", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_1", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_1", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_1", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_1", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_1", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_1", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_1", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_1", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_1", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_1", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_1", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_1", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_1", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_1", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_1", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_1", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_1", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_1", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_1", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_1", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_1", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_1", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_1", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_1", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_1", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_1", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_1", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_1", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_1", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_1", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_1", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_1", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_1", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_1", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_1", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_1", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_1", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_1", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_1", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_1", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_1", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_1", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_1", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_1", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_1", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_1", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_1", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_1", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_1", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_1", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_1", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_1", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_1", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_1", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_1", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_1", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_1", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_1", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_1", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_1", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_1", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_1", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_1", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_1", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_1", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_1", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_1", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_1", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_1", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_1", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_1", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_1", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_1", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_1", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_1", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_1", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_1", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_1", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_1", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_1", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_1", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_1", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_1", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_1", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_1", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_1", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_1", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_1", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_1", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_1", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_1", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_1", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_1", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_1", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_1", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_1", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_1", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_1", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_1", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_1", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_1", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_1", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_1", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_1", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_1", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_1", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_1", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_1", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_1", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_1", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_1", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_1", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_1", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_1", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_1", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_1", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_1", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_1", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_1", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_1", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_1", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_1", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_1", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_1", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_1", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_1", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_1", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_1", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_1", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_1", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_1", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_1", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_1", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_1", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_1", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_1", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_1", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_1", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_1", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_1", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_1", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_1", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_1", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_1", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_1", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_1", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_1", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_1", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_1", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_1", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_1", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_1", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_1", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_1", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_1", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_1", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_1", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_1", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_1", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_1", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_1", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_1", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_1", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_1", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_1", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_1", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_1", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_1", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_1", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_1", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_1", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_1", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_1", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_1", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CFG_CENTER_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "CFG_CENTER_BYP0_0", + "VFRAME_BYP0" + ], + [ + "CFG_CENTER_BYP1_0", + "VFRAME_BYP1" + ], + [ + "CFG_CENTER_BYP2_0", + "VFRAME_BYP2" + ], + [ + "CFG_CENTER_BYP3_0", + "VFRAME_BYP3" + ], + [ + "CFG_CENTER_BYP4_0", + "VFRAME_BYP4" + ], + [ + "CFG_CENTER_BYP5_0", + "VFRAME_BYP5" + ], + [ + "CFG_CENTER_BYP6_0", + "VFRAME_BYP6" + ], + [ + "CFG_CENTER_BYP7_0", + "VFRAME_BYP7" + ], + [ + "CFG_CENTER_CLK0_0", + "VFRAME_CLK0" + ], + [ + "CFG_CENTER_CLK1_0", + "VFRAME_CLK1" + ], + [ + "CFG_CENTER_CTRL0_0", + "VFRAME_CTRL0" + ], + [ + "CFG_CENTER_CTRL1_0", + "VFRAME_CTRL1" + ], + [ + "CFG_CENTER_EE2A0_0", + "VFRAME_EE2A0" + ], + [ + "CFG_CENTER_EE2A1_0", + "VFRAME_EE2A1" + ], + [ + "CFG_CENTER_EE2A2_0", + "VFRAME_EE2A2" + ], + [ + "CFG_CENTER_EE2A3_0", + "VFRAME_EE2A3" + ], + [ + "CFG_CENTER_EE2BEG0_0", + "VFRAME_EE2BEG0" + ], + [ + "CFG_CENTER_EE2BEG1_0", + "VFRAME_EE2BEG1" + ], + [ + "CFG_CENTER_EE2BEG2_0", + "VFRAME_EE2BEG2" + ], + [ + "CFG_CENTER_EE2BEG3_0", + "VFRAME_EE2BEG3" + ], + [ + "CFG_CENTER_EE4A0_0", + "VFRAME_EE4A0" + ], + [ + "CFG_CENTER_EE4A1_0", + "VFRAME_EE4A1" + ], + [ + "CFG_CENTER_EE4A2_0", + "VFRAME_EE4A2" + ], + [ + "CFG_CENTER_EE4A3_0", + "VFRAME_EE4A3" + ], + [ + "CFG_CENTER_EE4B0_0", + "VFRAME_EE4B0" + ], + [ + "CFG_CENTER_EE4B1_0", + "VFRAME_EE4B1" + ], + [ + "CFG_CENTER_EE4B2_0", + "VFRAME_EE4B2" + ], + [ + "CFG_CENTER_EE4B3_0", + "VFRAME_EE4B3" + ], + [ + "CFG_CENTER_EE4BEG0_0", + "VFRAME_EE4BEG0" + ], + [ + "CFG_CENTER_EE4BEG1_0", + "VFRAME_EE4BEG1" + ], + [ + "CFG_CENTER_EE4BEG2_0", + "VFRAME_EE4BEG2" + ], + [ + "CFG_CENTER_EE4BEG3_0", + "VFRAME_EE4BEG3" + ], + [ + "CFG_CENTER_EE4C0_0", + "VFRAME_EE4C0" + ], + [ + "CFG_CENTER_EE4C1_0", + "VFRAME_EE4C1" + ], + [ + "CFG_CENTER_EE4C2_0", + "VFRAME_EE4C2" + ], + [ + "CFG_CENTER_EE4C3_0", + "VFRAME_EE4C3" + ], + [ + "CFG_CENTER_EL1BEG0_0", + "VFRAME_EL1BEG0" + ], + [ + "CFG_CENTER_EL1BEG1_0", + "VFRAME_EL1BEG1" + ], + [ + "CFG_CENTER_EL1BEG2_0", + "VFRAME_EL1BEG2" + ], + [ + "CFG_CENTER_EL1BEG3_0", + "VFRAME_EL1BEG3" + ], + [ + "CFG_CENTER_ER1BEG0_0", + "VFRAME_ER1BEG0" + ], + [ + "CFG_CENTER_ER1BEG1_0", + "VFRAME_ER1BEG1" + ], + [ + "CFG_CENTER_ER1BEG2_0", + "VFRAME_ER1BEG2" + ], + [ + "CFG_CENTER_ER1BEG3_0", + "VFRAME_ER1BEG3" + ], + [ + "CFG_CENTER_FAN0_0", + "VFRAME_FAN0" + ], + [ + "CFG_CENTER_FAN1_0", + "VFRAME_FAN1" + ], + [ + "CFG_CENTER_FAN2_0", + "VFRAME_FAN2" + ], + [ + "CFG_CENTER_FAN3_0", + "VFRAME_FAN3" + ], + [ + "CFG_CENTER_FAN4_0", + "VFRAME_FAN4" + ], + [ + "CFG_CENTER_FAN5_0", + "VFRAME_FAN5" + ], + [ + "CFG_CENTER_FAN6_0", + "VFRAME_FAN6" + ], + [ + "CFG_CENTER_FAN7_0", + "VFRAME_FAN7" + ], + [ + "CFG_CENTER_IMUX0_0", + "VFRAME_IMUX0" + ], + [ + "CFG_CENTER_IMUX1_0", + "VFRAME_IMUX1" + ], + [ + "CFG_CENTER_IMUX2_0", + "VFRAME_IMUX2" + ], + [ + "CFG_CENTER_IMUX3_0", + "VFRAME_IMUX3" + ], + [ + "CFG_CENTER_IMUX4_0", + "VFRAME_IMUX4" + ], + [ + "CFG_CENTER_IMUX5_0", + "VFRAME_IMUX5" + ], + [ + "CFG_CENTER_IMUX6_0", + "VFRAME_IMUX6" + ], + [ + "CFG_CENTER_IMUX7_0", + "VFRAME_IMUX7" + ], + [ + "CFG_CENTER_IMUX8_0", + "VFRAME_IMUX8" + ], + [ + "CFG_CENTER_IMUX9_0", + "VFRAME_IMUX9" + ], + [ + "CFG_CENTER_IMUX10_0", + "VFRAME_IMUX10" + ], + [ + "CFG_CENTER_IMUX11_0", + "VFRAME_IMUX11" + ], + [ + "CFG_CENTER_IMUX12_0", + "VFRAME_IMUX12" + ], + [ + "CFG_CENTER_IMUX13_0", + "VFRAME_IMUX13" + ], + [ + "CFG_CENTER_IMUX14_0", + "VFRAME_IMUX14" + ], + [ + "CFG_CENTER_IMUX15_0", + "VFRAME_IMUX15" + ], + [ + "CFG_CENTER_IMUX16_0", + "VFRAME_IMUX16" + ], + [ + "CFG_CENTER_IMUX17_0", + "VFRAME_IMUX17" + ], + [ + "CFG_CENTER_IMUX18_0", + "VFRAME_IMUX18" + ], + [ + "CFG_CENTER_IMUX19_0", + "VFRAME_IMUX19" + ], + [ + "CFG_CENTER_IMUX20_0", + "VFRAME_IMUX20" + ], + [ + "CFG_CENTER_IMUX21_0", + "VFRAME_IMUX21" + ], + [ + "CFG_CENTER_IMUX22_0", + "VFRAME_IMUX22" + ], + [ + "CFG_CENTER_IMUX23_0", + "VFRAME_IMUX23" + ], + [ + "CFG_CENTER_IMUX24_0", + "VFRAME_IMUX24" + ], + [ + "CFG_CENTER_IMUX25_0", + "VFRAME_IMUX25" + ], + [ + "CFG_CENTER_IMUX26_0", + "VFRAME_IMUX26" + ], + [ + "CFG_CENTER_IMUX27_0", + "VFRAME_IMUX27" + ], + [ + "CFG_CENTER_IMUX28_0", + "VFRAME_IMUX28" + ], + [ + "CFG_CENTER_IMUX29_0", + "VFRAME_IMUX29" + ], + [ + "CFG_CENTER_IMUX30_0", + "VFRAME_IMUX30" + ], + [ + "CFG_CENTER_IMUX31_0", + "VFRAME_IMUX31" + ], + [ + "CFG_CENTER_IMUX32_0", + "VFRAME_IMUX32" + ], + [ + "CFG_CENTER_IMUX33_0", + "VFRAME_IMUX33" + ], + [ + "CFG_CENTER_IMUX34_0", + "VFRAME_IMUX34" + ], + [ + "CFG_CENTER_IMUX35_0", + "VFRAME_IMUX35" + ], + [ + "CFG_CENTER_IMUX36_0", + "VFRAME_IMUX36" + ], + [ + "CFG_CENTER_IMUX37_0", + "VFRAME_IMUX37" + ], + [ + "CFG_CENTER_IMUX38_0", + "VFRAME_IMUX38" + ], + [ + "CFG_CENTER_IMUX39_0", + "VFRAME_IMUX39" + ], + [ + "CFG_CENTER_IMUX40_0", + "VFRAME_IMUX40" + ], + [ + "CFG_CENTER_IMUX41_0", + "VFRAME_IMUX41" + ], + [ + "CFG_CENTER_IMUX42_0", + "VFRAME_IMUX42" + ], + [ + "CFG_CENTER_IMUX43_0", + "VFRAME_IMUX43" + ], + [ + "CFG_CENTER_IMUX44_0", + "VFRAME_IMUX44" + ], + [ + "CFG_CENTER_IMUX45_0", + "VFRAME_IMUX45" + ], + [ + "CFG_CENTER_IMUX46_0", + "VFRAME_IMUX46" + ], + [ + "CFG_CENTER_IMUX47_0", + "VFRAME_IMUX47" + ], + [ + "CFG_CENTER_LH1_0", + "VFRAME_LH1" + ], + [ + "CFG_CENTER_LH2_0", + "VFRAME_LH2" + ], + [ + "CFG_CENTER_LH3_0", + "VFRAME_LH3" + ], + [ + "CFG_CENTER_LH4_0", + "VFRAME_LH4" + ], + [ + "CFG_CENTER_LH5_0", + "VFRAME_LH5" + ], + [ + "CFG_CENTER_LH6_0", + "VFRAME_LH6" + ], + [ + "CFG_CENTER_LH7_0", + "VFRAME_LH7" + ], + [ + "CFG_CENTER_LH8_0", + "VFRAME_LH8" + ], + [ + "CFG_CENTER_LH9_0", + "VFRAME_LH9" + ], + [ + "CFG_CENTER_LH10_0", + "VFRAME_LH10" + ], + [ + "CFG_CENTER_LH11_0", + "VFRAME_LH11" + ], + [ + "CFG_CENTER_LH12_0", + "VFRAME_LH12" + ], + [ + "CFG_CENTER_NE2A0_0", + "VFRAME_NE2A0" + ], + [ + "CFG_CENTER_NE2A1_0", + "VFRAME_NE2A1" + ], + [ + "CFG_CENTER_NE2A2_0", + "VFRAME_NE2A2" + ], + [ + "CFG_CENTER_NE2A3_0", + "VFRAME_NE2A3" + ], + [ + "CFG_CENTER_NE4BEG0_0", + "VFRAME_NE4BEG0" + ], + [ + "CFG_CENTER_NE4BEG1_0", + "VFRAME_NE4BEG1" + ], + [ + "CFG_CENTER_NE4BEG2_0", + "VFRAME_NE4BEG2" + ], + [ + "CFG_CENTER_NE4BEG3_0", + "VFRAME_NE4BEG3" + ], + [ + "CFG_CENTER_NE4C0_0", + "VFRAME_NE4C0" + ], + [ + "CFG_CENTER_NE4C1_0", + "VFRAME_NE4C1" + ], + [ + "CFG_CENTER_NE4C2_0", + "VFRAME_NE4C2" + ], + [ + "CFG_CENTER_NE4C3_0", + "VFRAME_NE4C3" + ], + [ + "CFG_CENTER_NW2A0_0", + "VFRAME_NW2A0" + ], + [ + "CFG_CENTER_NW2A1_0", + "VFRAME_NW2A1" + ], + [ + "CFG_CENTER_NW2A2_0", + "VFRAME_NW2A2" + ], + [ + "CFG_CENTER_NW2A3_0", + "VFRAME_NW2A3" + ], + [ + "CFG_CENTER_NW4A0_0", + "VFRAME_NW4A0" + ], + [ + "CFG_CENTER_NW4A1_0", + "VFRAME_NW4A1" + ], + [ + "CFG_CENTER_NW4A2_0", + "VFRAME_NW4A2" + ], + [ + "CFG_CENTER_NW4A3_0", + "VFRAME_NW4A3" + ], + [ + "CFG_CENTER_NW4END0_0", + "VFRAME_NW4END0" + ], + [ + "CFG_CENTER_NW4END1_0", + "VFRAME_NW4END1" + ], + [ + "CFG_CENTER_NW4END2_0", + "VFRAME_NW4END2" + ], + [ + "CFG_CENTER_NW4END3_0", + "VFRAME_NW4END3" + ], + [ + "CFG_CENTER_SE2A0_0", + "VFRAME_SE2A0" + ], + [ + "CFG_CENTER_SE2A1_0", + "VFRAME_SE2A1" + ], + [ + "CFG_CENTER_SE2A2_0", + "VFRAME_SE2A2" + ], + [ + "CFG_CENTER_SE2A3_0", + "VFRAME_SE2A3" + ], + [ + "CFG_CENTER_SE4BEG0_0", + "VFRAME_SE4BEG0" + ], + [ + "CFG_CENTER_SE4BEG1_0", + "VFRAME_SE4BEG1" + ], + [ + "CFG_CENTER_SE4BEG2_0", + "VFRAME_SE4BEG2" + ], + [ + "CFG_CENTER_SE4BEG3_0", + "VFRAME_SE4BEG3" + ], + [ + "CFG_CENTER_SE4C0_0", + "VFRAME_SE4C0" + ], + [ + "CFG_CENTER_SE4C1_0", + "VFRAME_SE4C1" + ], + [ + "CFG_CENTER_SE4C2_0", + "VFRAME_SE4C2" + ], + [ + "CFG_CENTER_SE4C3_0", + "VFRAME_SE4C3" + ], + [ + "CFG_CENTER_SW2A0_0", + "VFRAME_SW2A0" + ], + [ + "CFG_CENTER_SW2A1_0", + "VFRAME_SW2A1" + ], + [ + "CFG_CENTER_SW2A2_0", + "VFRAME_SW2A2" + ], + [ + "CFG_CENTER_SW2A3_0", + "VFRAME_SW2A3" + ], + [ + "CFG_CENTER_SW4A0_0", + "VFRAME_SW4A0" + ], + [ + "CFG_CENTER_SW4A1_0", + "VFRAME_SW4A1" + ], + [ + "CFG_CENTER_SW4A2_0", + "VFRAME_SW4A2" + ], + [ + "CFG_CENTER_SW4A3_0", + "VFRAME_SW4A3" + ], + [ + "CFG_CENTER_SW4END0_0", + "VFRAME_SW4END0" + ], + [ + "CFG_CENTER_SW4END1_0", + "VFRAME_SW4END1" + ], + [ + "CFG_CENTER_SW4END2_0", + "VFRAME_SW4END2" + ], + [ + "CFG_CENTER_SW4END3_0", + "VFRAME_SW4END3" + ], + [ + "CFG_CENTER_WL1END0_0", + "VFRAME_WL1END0" + ], + [ + "CFG_CENTER_WL1END1_0", + "VFRAME_WL1END1" + ], + [ + "CFG_CENTER_WL1END2_0", + "VFRAME_WL1END2" + ], + [ + "CFG_CENTER_WL1END3_0", + "VFRAME_WL1END3" + ], + [ + "CFG_CENTER_WR1END0_0", + "VFRAME_WR1END0" + ], + [ + "CFG_CENTER_WR1END1_0", + "VFRAME_WR1END1" + ], + [ + "CFG_CENTER_WR1END2_0", + "VFRAME_WR1END2" + ], + [ + "CFG_CENTER_WR1END3_0", + "VFRAME_WR1END3" + ], + [ + "CFG_CENTER_WW2A0_0", + "VFRAME_WW2A0" + ], + [ + "CFG_CENTER_WW2A1_0", + "VFRAME_WW2A1" + ], + [ + "CFG_CENTER_WW2A2_0", + "VFRAME_WW2A2" + ], + [ + "CFG_CENTER_WW2A3_0", + "VFRAME_WW2A3" + ], + [ + "CFG_CENTER_WW2END0_0", + "VFRAME_WW2END0" + ], + [ + "CFG_CENTER_WW2END1_0", + "VFRAME_WW2END1" + ], + [ + "CFG_CENTER_WW2END2_0", + "VFRAME_WW2END2" + ], + [ + "CFG_CENTER_WW2END3_0", + "VFRAME_WW2END3" + ], + [ + "CFG_CENTER_WW4A0_0", + "VFRAME_WW4A0" + ], + [ + "CFG_CENTER_WW4A1_0", + "VFRAME_WW4A1" + ], + [ + "CFG_CENTER_WW4A2_0", + "VFRAME_WW4A2" + ], + [ + "CFG_CENTER_WW4A3_0", + "VFRAME_WW4A3" + ], + [ + "CFG_CENTER_WW4B0_0", + "VFRAME_WW4B0" + ], + [ + "CFG_CENTER_WW4B1_0", + "VFRAME_WW4B1" + ], + [ + "CFG_CENTER_WW4B2_0", + "VFRAME_WW4B2" + ], + [ + "CFG_CENTER_WW4B3_0", + "VFRAME_WW4B3" + ], + [ + "CFG_CENTER_WW4C0_0", + "VFRAME_WW4C0" + ], + [ + "CFG_CENTER_WW4C1_0", + "VFRAME_WW4C1" + ], + [ + "CFG_CENTER_WW4C2_0", + "VFRAME_WW4C2" + ], + [ + "CFG_CENTER_WW4C3_0", + "VFRAME_WW4C3" + ], + [ + "CFG_CENTER_WW4END0_0", + "VFRAME_WW4END0" + ], + [ + "CFG_CENTER_WW4END1_0", + "VFRAME_WW4END1" + ], + [ + "CFG_CENTER_WW4END2_0", + "VFRAME_WW4END2" + ], + [ + "CFG_CENTER_WW4END3_0", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLL_L", + "CLBLL_L" + ], + "wire_pairs": [ + [ + "CLBLL_LL_CIN", + "CLBLL_LL_COUT_N" + ], + [ + "CLBLL_L_CIN", + "CLBLL_L_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLL_L", + "CLBLL_R" + ], + "wire_pairs": [ + [ + "CLBLL_EE2A0", + "CLBLL_EE2A0" + ], + [ + "CLBLL_EE2A1", + "CLBLL_EE2A1" + ], + [ + "CLBLL_EE2A2", + "CLBLL_EE2A2" + ], + [ + "CLBLL_EE2A3", + "CLBLL_EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "CLBLL_EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "CLBLL_EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "CLBLL_EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "CLBLL_EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "CLBLL_EE4A0" + ], + [ + "CLBLL_EE4A1", + "CLBLL_EE4A1" + ], + [ + "CLBLL_EE4A2", + "CLBLL_EE4A2" + ], + [ + "CLBLL_EE4A3", + "CLBLL_EE4A3" + ], + [ + "CLBLL_EE4B0", + "CLBLL_EE4B0" + ], + [ + "CLBLL_EE4B1", + "CLBLL_EE4B1" + ], + [ + "CLBLL_EE4B2", + "CLBLL_EE4B2" + ], + [ + "CLBLL_EE4B3", + "CLBLL_EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "CLBLL_EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "CLBLL_EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "CLBLL_EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "CLBLL_EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "CLBLL_EE4C0" + ], + [ + "CLBLL_EE4C1", + "CLBLL_EE4C1" + ], + [ + "CLBLL_EE4C2", + "CLBLL_EE4C2" + ], + [ + "CLBLL_EE4C3", + "CLBLL_EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "CLBLL_EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "CLBLL_EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "CLBLL_EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "CLBLL_EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "CLBLL_ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "CLBLL_ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "CLBLL_ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "CLBLL_ER1BEG3" + ], + [ + "CLBLL_LH1", + "CLBLL_LH1" + ], + [ + "CLBLL_LH2", + "CLBLL_LH2" + ], + [ + "CLBLL_LH3", + "CLBLL_LH3" + ], + [ + "CLBLL_LH4", + "CLBLL_LH4" + ], + [ + "CLBLL_LH5", + "CLBLL_LH5" + ], + [ + "CLBLL_LH6", + "CLBLL_LH6" + ], + [ + "CLBLL_LH7", + "CLBLL_LH7" + ], + [ + "CLBLL_LH8", + "CLBLL_LH8" + ], + [ + "CLBLL_LH9", + "CLBLL_LH9" + ], + [ + "CLBLL_LH10", + "CLBLL_LH10" + ], + [ + "CLBLL_LH11", + "CLBLL_LH11" + ], + [ + "CLBLL_LH12", + "CLBLL_LH12" + ], + [ + "CLBLL_MONITOR_N", + "CLBLL_MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "CLBLL_MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "CLBLL_NE2A0" + ], + [ + "CLBLL_NE2A1", + "CLBLL_NE2A1" + ], + [ + "CLBLL_NE2A2", + "CLBLL_NE2A2" + ], + [ + "CLBLL_NE2A3", + "CLBLL_NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "CLBLL_NE4BEG0" + ], + [ + "CLBLL_NE4BEG1", + "CLBLL_NE4BEG1" + ], + [ + "CLBLL_NE4BEG2", + "CLBLL_NE4BEG2" + ], + [ + "CLBLL_NE4BEG3", + "CLBLL_NE4BEG3" + ], + [ + "CLBLL_NE4C0", + "CLBLL_NE4C0" + ], + [ + "CLBLL_NE4C1", + "CLBLL_NE4C1" + ], + [ + "CLBLL_NE4C2", + "CLBLL_NE4C2" + ], + [ + "CLBLL_NE4C3", + "CLBLL_NE4C3" + ], + [ + "CLBLL_NW2A0", + "CLBLL_NW2A0" + ], + [ + "CLBLL_NW2A1", + "CLBLL_NW2A1" + ], + [ + "CLBLL_NW2A2", + "CLBLL_NW2A2" + ], + [ + "CLBLL_NW2A3", + "CLBLL_NW2A3" + ], + [ + "CLBLL_NW4A0", + "CLBLL_NW4A0" + ], + [ + "CLBLL_NW4A1", + "CLBLL_NW4A1" + ], + [ + "CLBLL_NW4A2", + "CLBLL_NW4A2" + ], + [ + "CLBLL_NW4A3", + "CLBLL_NW4A3" + ], + [ + "CLBLL_NW4END0", + "CLBLL_NW4END0" + ], + [ + "CLBLL_NW4END1", + "CLBLL_NW4END1" + ], + [ + "CLBLL_NW4END2", + "CLBLL_NW4END2" + ], + [ + "CLBLL_NW4END3", + "CLBLL_NW4END3" + ], + [ + "CLBLL_SE2A0", + "CLBLL_SE2A0" + ], + [ + "CLBLL_SE2A1", + "CLBLL_SE2A1" + ], + [ + "CLBLL_SE2A2", + "CLBLL_SE2A2" + ], + [ + "CLBLL_SE2A3", + "CLBLL_SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "CLBLL_SE4BEG0" + ], + [ + "CLBLL_SE4BEG1", + "CLBLL_SE4BEG1" + ], + [ + "CLBLL_SE4BEG2", + "CLBLL_SE4BEG2" + ], + [ + "CLBLL_SE4BEG3", + "CLBLL_SE4BEG3" + ], + [ + "CLBLL_SE4C0", + "CLBLL_SE4C0" + ], + [ + "CLBLL_SE4C1", + "CLBLL_SE4C1" + ], + [ + "CLBLL_SE4C2", + "CLBLL_SE4C2" + ], + [ + "CLBLL_SE4C3", + "CLBLL_SE4C3" + ], + [ + "CLBLL_SW2A0", + "CLBLL_SW2A0" + ], + [ + "CLBLL_SW2A1", + "CLBLL_SW2A1" + ], + [ + "CLBLL_SW2A2", + "CLBLL_SW2A2" + ], + [ + "CLBLL_SW2A3", + "CLBLL_SW2A3" + ], + [ + "CLBLL_SW4A0", + "CLBLL_SW4A0" + ], + [ + "CLBLL_SW4A1", + "CLBLL_SW4A1" + ], + [ + "CLBLL_SW4A2", + "CLBLL_SW4A2" + ], + [ + "CLBLL_SW4A3", + "CLBLL_SW4A3" + ], + [ + "CLBLL_SW4END0", + "CLBLL_SW4END0" + ], + [ + "CLBLL_SW4END1", + "CLBLL_SW4END1" + ], + [ + "CLBLL_SW4END2", + "CLBLL_SW4END2" + ], + [ + "CLBLL_SW4END3", + "CLBLL_SW4END3" + ], + [ + "CLBLL_WL1END0", + "CLBLL_WL1END0" + ], + [ + "CLBLL_WL1END1", + "CLBLL_WL1END1" + ], + [ + "CLBLL_WL1END2", + "CLBLL_WL1END2" + ], + [ + "CLBLL_WL1END3", + "CLBLL_WL1END3" + ], + [ + "CLBLL_WR1END0", + "CLBLL_WR1END0" + ], + [ + "CLBLL_WR1END1", + "CLBLL_WR1END1" + ], + [ + "CLBLL_WR1END2", + "CLBLL_WR1END2" + ], + [ + "CLBLL_WR1END3", + "CLBLL_WR1END3" + ], + [ + "CLBLL_WW2A0", + "CLBLL_WW2A0" + ], + [ + "CLBLL_WW2A1", + "CLBLL_WW2A1" + ], + [ + "CLBLL_WW2A2", + "CLBLL_WW2A2" + ], + [ + "CLBLL_WW2A3", + "CLBLL_WW2A3" + ], + [ + "CLBLL_WW2END0", + "CLBLL_WW2END0" + ], + [ + "CLBLL_WW2END1", + "CLBLL_WW2END1" + ], + [ + "CLBLL_WW2END2", + "CLBLL_WW2END2" + ], + [ + "CLBLL_WW2END3", + "CLBLL_WW2END3" + ], + [ + "CLBLL_WW4A0", + "CLBLL_WW4A0" + ], + [ + "CLBLL_WW4A1", + "CLBLL_WW4A1" + ], + [ + "CLBLL_WW4A2", + "CLBLL_WW4A2" + ], + [ + "CLBLL_WW4A3", + "CLBLL_WW4A3" + ], + [ + "CLBLL_WW4B0", + "CLBLL_WW4B0" + ], + [ + "CLBLL_WW4B1", + "CLBLL_WW4B1" + ], + [ + "CLBLL_WW4B2", + "CLBLL_WW4B2" + ], + [ + "CLBLL_WW4B3", + "CLBLL_WW4B3" + ], + [ + "CLBLL_WW4C0", + "CLBLL_WW4C0" + ], + [ + "CLBLL_WW4C1", + "CLBLL_WW4C1" + ], + [ + "CLBLL_WW4C2", + "CLBLL_WW4C2" + ], + [ + "CLBLL_WW4C3", + "CLBLL_WW4C3" + ], + [ + "CLBLL_WW4END0", + "CLBLL_WW4END0" + ], + [ + "CLBLL_WW4END1", + "CLBLL_WW4END1" + ], + [ + "CLBLL_WW4END2", + "CLBLL_WW4END2" + ], + [ + "CLBLL_WW4END3", + "CLBLL_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLL_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "CLBLL_EE2A0", + "CLBLM_EE2A0" + ], + [ + "CLBLL_EE2A1", + "CLBLM_EE2A1" + ], + [ + "CLBLL_EE2A2", + "CLBLM_EE2A2" + ], + [ + "CLBLL_EE2A3", + "CLBLM_EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "CLBLM_EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "CLBLM_EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "CLBLM_EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "CLBLM_EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "CLBLM_EE4A0" + ], + [ + "CLBLL_EE4A1", + "CLBLM_EE4A1" + ], + [ + "CLBLL_EE4A2", + "CLBLM_EE4A2" + ], + [ + "CLBLL_EE4A3", + "CLBLM_EE4A3" + ], + [ + "CLBLL_EE4B0", + "CLBLM_EE4B0" + ], + [ + "CLBLL_EE4B1", + "CLBLM_EE4B1" + ], + [ + "CLBLL_EE4B2", + "CLBLM_EE4B2" + ], + [ + "CLBLL_EE4B3", + "CLBLM_EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "CLBLM_EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "CLBLM_EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "CLBLM_EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "CLBLM_EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "CLBLM_EE4C0" + ], + [ + "CLBLL_EE4C1", + "CLBLM_EE4C1" + ], + [ + "CLBLL_EE4C2", + "CLBLM_EE4C2" + ], + [ + "CLBLL_EE4C3", + "CLBLM_EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "CLBLM_EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "CLBLM_EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "CLBLM_EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "CLBLM_EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "CLBLM_ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "CLBLM_ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "CLBLM_ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "CLBLM_ER1BEG3" + ], + [ + "CLBLL_LH1", + "CLBLM_LH1" + ], + [ + "CLBLL_LH2", + "CLBLM_LH2" + ], + [ + "CLBLL_LH3", + "CLBLM_LH3" + ], + [ + "CLBLL_LH4", + "CLBLM_LH4" + ], + [ + "CLBLL_LH5", + "CLBLM_LH5" + ], + [ + "CLBLL_LH6", + "CLBLM_LH6" + ], + [ + "CLBLL_LH7", + "CLBLM_LH7" + ], + [ + "CLBLL_LH8", + "CLBLM_LH8" + ], + [ + "CLBLL_LH9", + "CLBLM_LH9" + ], + [ + "CLBLL_LH10", + "CLBLM_LH10" + ], + [ + "CLBLL_LH11", + "CLBLM_LH11" + ], + [ + "CLBLL_LH12", + "CLBLM_LH12" + ], + [ + "CLBLL_MONITOR_N", + "CLBLM_MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "CLBLM_MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "CLBLM_NE2A0" + ], + [ + "CLBLL_NE2A1", + "CLBLM_NE2A1" + ], + [ + "CLBLL_NE2A2", + "CLBLM_NE2A2" + ], + [ + "CLBLL_NE2A3", + "CLBLM_NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "CLBLM_NE4BEG0" + ], + [ + "CLBLL_NE4BEG1", + "CLBLM_NE4BEG1" + ], + [ + "CLBLL_NE4BEG2", + "CLBLM_NE4BEG2" + ], + [ + "CLBLL_NE4BEG3", + "CLBLM_NE4BEG3" + ], + [ + "CLBLL_NE4C0", + "CLBLM_NE4C0" + ], + [ + "CLBLL_NE4C1", + "CLBLM_NE4C1" + ], + [ + "CLBLL_NE4C2", + "CLBLM_NE4C2" + ], + [ + "CLBLL_NE4C3", + "CLBLM_NE4C3" + ], + [ + "CLBLL_NW2A0", + "CLBLM_NW2A0" + ], + [ + "CLBLL_NW2A1", + "CLBLM_NW2A1" + ], + [ + "CLBLL_NW2A2", + "CLBLM_NW2A2" + ], + [ + "CLBLL_NW2A3", + "CLBLM_NW2A3" + ], + [ + "CLBLL_NW4A0", + "CLBLM_NW4A0" + ], + [ + "CLBLL_NW4A1", + "CLBLM_NW4A1" + ], + [ + "CLBLL_NW4A2", + "CLBLM_NW4A2" + ], + [ + "CLBLL_NW4A3", + "CLBLM_NW4A3" + ], + [ + "CLBLL_NW4END0", + "CLBLM_NW4END0" + ], + [ + "CLBLL_NW4END1", + "CLBLM_NW4END1" + ], + [ + "CLBLL_NW4END2", + "CLBLM_NW4END2" + ], + [ + "CLBLL_NW4END3", + "CLBLM_NW4END3" + ], + [ + "CLBLL_SE2A0", + "CLBLM_SE2A0" + ], + [ + "CLBLL_SE2A1", + "CLBLM_SE2A1" + ], + [ + "CLBLL_SE2A2", + "CLBLM_SE2A2" + ], + [ + "CLBLL_SE2A3", + "CLBLM_SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "CLBLM_SE4BEG0" + ], + [ + "CLBLL_SE4BEG1", + "CLBLM_SE4BEG1" + ], + [ + "CLBLL_SE4BEG2", + "CLBLM_SE4BEG2" + ], + [ + "CLBLL_SE4BEG3", + "CLBLM_SE4BEG3" + ], + [ + "CLBLL_SE4C0", + "CLBLM_SE4C0" + ], + [ + "CLBLL_SE4C1", + "CLBLM_SE4C1" + ], + [ + "CLBLL_SE4C2", + "CLBLM_SE4C2" + ], + [ + "CLBLL_SE4C3", + "CLBLM_SE4C3" + ], + [ + "CLBLL_SW2A0", + "CLBLM_SW2A0" + ], + [ + "CLBLL_SW2A1", + "CLBLM_SW2A1" + ], + [ + "CLBLL_SW2A2", + "CLBLM_SW2A2" + ], + [ + "CLBLL_SW2A3", + "CLBLM_SW2A3" + ], + [ + "CLBLL_SW4A0", + "CLBLM_SW4A0" + ], + [ + "CLBLL_SW4A1", + "CLBLM_SW4A1" + ], + [ + "CLBLL_SW4A2", + "CLBLM_SW4A2" + ], + [ + "CLBLL_SW4A3", + "CLBLM_SW4A3" + ], + [ + "CLBLL_SW4END0", + "CLBLM_SW4END0" + ], + [ + "CLBLL_SW4END1", + "CLBLM_SW4END1" + ], + [ + "CLBLL_SW4END2", + "CLBLM_SW4END2" + ], + [ + "CLBLL_SW4END3", + "CLBLM_SW4END3" + ], + [ + "CLBLL_WL1END0", + "CLBLM_WL1END0" + ], + [ + "CLBLL_WL1END1", + "CLBLM_WL1END1" + ], + [ + "CLBLL_WL1END2", + "CLBLM_WL1END2" + ], + [ + "CLBLL_WL1END3", + "CLBLM_WL1END3" + ], + [ + "CLBLL_WR1END0", + "CLBLM_WR1END0" + ], + [ + "CLBLL_WR1END1", + "CLBLM_WR1END1" + ], + [ + "CLBLL_WR1END2", + "CLBLM_WR1END2" + ], + [ + "CLBLL_WR1END3", + "CLBLM_WR1END3" + ], + [ + "CLBLL_WW2A0", + "CLBLM_WW2A0" + ], + [ + "CLBLL_WW2A1", + "CLBLM_WW2A1" + ], + [ + "CLBLL_WW2A2", + "CLBLM_WW2A2" + ], + [ + "CLBLL_WW2A3", + "CLBLM_WW2A3" + ], + [ + "CLBLL_WW2END0", + "CLBLM_WW2END0" + ], + [ + "CLBLL_WW2END1", + "CLBLM_WW2END1" + ], + [ + "CLBLL_WW2END2", + "CLBLM_WW2END2" + ], + [ + "CLBLL_WW2END3", + "CLBLM_WW2END3" + ], + [ + "CLBLL_WW4A0", + "CLBLM_WW4A0" + ], + [ + "CLBLL_WW4A1", + "CLBLM_WW4A1" + ], + [ + "CLBLL_WW4A2", + "CLBLM_WW4A2" + ], + [ + "CLBLL_WW4A3", + "CLBLM_WW4A3" + ], + [ + "CLBLL_WW4B0", + "CLBLM_WW4B0" + ], + [ + "CLBLL_WW4B1", + "CLBLM_WW4B1" + ], + [ + "CLBLL_WW4B2", + "CLBLM_WW4B2" + ], + [ + "CLBLL_WW4B3", + "CLBLM_WW4B3" + ], + [ + "CLBLL_WW4C0", + "CLBLM_WW4C0" + ], + [ + "CLBLL_WW4C1", + "CLBLM_WW4C1" + ], + [ + "CLBLL_WW4C2", + "CLBLM_WW4C2" + ], + [ + "CLBLL_WW4C3", + "CLBLM_WW4C3" + ], + [ + "CLBLL_WW4END0", + "CLBLM_WW4END0" + ], + [ + "CLBLL_WW4END1", + "CLBLM_WW4END1" + ], + [ + "CLBLL_WW4END2", + "CLBLM_WW4END2" + ], + [ + "CLBLL_WW4END3", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLBLL_L", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLL_LL_COUT_N", + "HCLK_CLB_COUT0_L" + ], + [ + "CLBLL_L_COUT_N", + "HCLK_CLB_COUT1_L" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLL_L", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLL_LL_CIN", + "HCLK_CLB_COUT0_L" + ], + [ + "CLBLL_L_CIN", + "HCLK_CLB_COUT1_L" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLBLL_L", + "INT_L" + ], + "wire_pairs": [ + [ + "CLBLL_BYP0", + "BYP_L0" + ], + [ + "CLBLL_BYP1", + "BYP_L1" + ], + [ + "CLBLL_BYP2", + "BYP_L2" + ], + [ + "CLBLL_BYP3", + "BYP_L3" + ], + [ + "CLBLL_BYP4", + "BYP_L4" + ], + [ + "CLBLL_BYP5", + "BYP_L5" + ], + [ + "CLBLL_BYP6", + "BYP_L6" + ], + [ + "CLBLL_BYP7", + "BYP_L7" + ], + [ + "CLBLL_CLK0", + "CLK_L0" + ], + [ + "CLBLL_CLK1", + "CLK_L1" + ], + [ + "CLBLL_CTRL0", + "CTRL_L0" + ], + [ + "CLBLL_CTRL1", + "CTRL_L1" + ], + [ + "CLBLL_EE2A0", + "EE2END0" + ], + [ + "CLBLL_EE2A1", + "EE2END1" + ], + [ + "CLBLL_EE2A2", + "EE2END2" + ], + [ + "CLBLL_EE2A3", + "EE2END3" + ], + [ + "CLBLL_EE2BEG0", + "EE2A0" + ], + [ + "CLBLL_EE2BEG1", + "EE2A1" + ], + [ + "CLBLL_EE2BEG2", + "EE2A2" + ], + [ + "CLBLL_EE2BEG3", + "EE2A3" + ], + [ + "CLBLL_EE4A0", + "EE4B0" + ], + [ + "CLBLL_EE4A1", + "EE4B1" + ], + [ + "CLBLL_EE4A2", + "EE4B2" + ], + [ + "CLBLL_EE4A3", + "EE4B3" + ], + [ + "CLBLL_EE4B0", + "EE4C0" + ], + [ + "CLBLL_EE4B1", + "EE4C1" + ], + [ + "CLBLL_EE4B2", + "EE4C2" + ], + [ + "CLBLL_EE4B3", + "EE4C3" + ], + [ + "CLBLL_EE4BEG0", + "EE4A0" + ], + [ + "CLBLL_EE4BEG1", + "EE4A1" + ], + [ + "CLBLL_EE4BEG2", + "EE4A2" + ], + [ + "CLBLL_EE4BEG3", + "EE4A3" + ], + [ + "CLBLL_EE4C0", + "EE4END0" + ], + [ + "CLBLL_EE4C1", + "EE4END1" + ], + [ + "CLBLL_EE4C2", + "EE4END2" + ], + [ + "CLBLL_EE4C3", + "EE4END3" + ], + [ + "CLBLL_EL1BEG0", + "EL1END0" + ], + [ + "CLBLL_EL1BEG1", + "EL1END1" + ], + [ + "CLBLL_EL1BEG2", + "EL1END2" + ], + [ + "CLBLL_EL1BEG3", + "EL1END3" + ], + [ + "CLBLL_ER1BEG0", + "ER1END0" + ], + [ + "CLBLL_ER1BEG1", + "ER1END1" + ], + [ + "CLBLL_ER1BEG2", + "ER1END2" + ], + [ + "CLBLL_ER1BEG3", + "ER1END3" + ], + [ + "CLBLL_FAN0", + "FAN_L0" + ], + [ + "CLBLL_FAN1", + "FAN_L1" + ], + [ + "CLBLL_FAN2", + "FAN_L2" + ], + [ + "CLBLL_FAN3", + "FAN_L3" + ], + [ + "CLBLL_FAN4", + "FAN_L4" + ], + [ + "CLBLL_FAN5", + "FAN_L5" + ], + [ + "CLBLL_FAN6", + "FAN_L6" + ], + [ + "CLBLL_FAN7", + "FAN_L7" + ], + [ + "CLBLL_IMUX0", + "IMUX_L0" + ], + [ + "CLBLL_IMUX1", + "IMUX_L1" + ], + [ + "CLBLL_IMUX2", + "IMUX_L2" + ], + [ + "CLBLL_IMUX3", + "IMUX_L3" + ], + [ + "CLBLL_IMUX4", + "IMUX_L4" + ], + [ + "CLBLL_IMUX5", + "IMUX_L5" + ], + [ + "CLBLL_IMUX6", + "IMUX_L6" + ], + [ + "CLBLL_IMUX7", + "IMUX_L7" + ], + [ + "CLBLL_IMUX8", + "IMUX_L8" + ], + [ + "CLBLL_IMUX9", + "IMUX_L9" + ], + [ + "CLBLL_IMUX10", + "IMUX_L10" + ], + [ + "CLBLL_IMUX11", + "IMUX_L11" + ], + [ + "CLBLL_IMUX12", + "IMUX_L12" + ], + [ + "CLBLL_IMUX13", + "IMUX_L13" + ], + [ + "CLBLL_IMUX14", + "IMUX_L14" + ], + [ + "CLBLL_IMUX15", + "IMUX_L15" + ], + [ + "CLBLL_IMUX16", + "IMUX_L16" + ], + [ + "CLBLL_IMUX17", + "IMUX_L17" + ], + [ + "CLBLL_IMUX18", + "IMUX_L18" + ], + [ + "CLBLL_IMUX19", + "IMUX_L19" + ], + [ + "CLBLL_IMUX20", + "IMUX_L20" + ], + [ + "CLBLL_IMUX21", + "IMUX_L21" + ], + [ + "CLBLL_IMUX22", + "IMUX_L22" + ], + [ + "CLBLL_IMUX23", + "IMUX_L23" + ], + [ + "CLBLL_IMUX24", + "IMUX_L24" + ], + [ + "CLBLL_IMUX25", + "IMUX_L25" + ], + [ + "CLBLL_IMUX26", + "IMUX_L26" + ], + [ + "CLBLL_IMUX27", + "IMUX_L27" + ], + [ + "CLBLL_IMUX28", + "IMUX_L28" + ], + [ + "CLBLL_IMUX29", + "IMUX_L29" + ], + [ + "CLBLL_IMUX30", + "IMUX_L30" + ], + [ + "CLBLL_IMUX31", + "IMUX_L31" + ], + [ + "CLBLL_IMUX32", + "IMUX_L32" + ], + [ + "CLBLL_IMUX33", + "IMUX_L33" + ], + [ + "CLBLL_IMUX34", + "IMUX_L34" + ], + [ + "CLBLL_IMUX35", + "IMUX_L35" + ], + [ + "CLBLL_IMUX36", + "IMUX_L36" + ], + [ + "CLBLL_IMUX37", + "IMUX_L37" + ], + [ + "CLBLL_IMUX38", + "IMUX_L38" + ], + [ + "CLBLL_IMUX39", + "IMUX_L39" + ], + [ + "CLBLL_IMUX40", + "IMUX_L40" + ], + [ + "CLBLL_IMUX41", + "IMUX_L41" + ], + [ + "CLBLL_IMUX42", + "IMUX_L42" + ], + [ + "CLBLL_IMUX43", + "IMUX_L43" + ], + [ + "CLBLL_IMUX44", + "IMUX_L44" + ], + [ + "CLBLL_IMUX45", + "IMUX_L45" + ], + [ + "CLBLL_IMUX46", + "IMUX_L46" + ], + [ + "CLBLL_IMUX47", + "IMUX_L47" + ], + [ + "CLBLL_LH1", + "LH0" + ], + [ + "CLBLL_LH2", + "LH1" + ], + [ + "CLBLL_LH3", + "LH2" + ], + [ + "CLBLL_LH4", + "LH3" + ], + [ + "CLBLL_LH5", + "LH4" + ], + [ + "CLBLL_LH6", + "LH5" + ], + [ + "CLBLL_LH7", + "LH6" + ], + [ + "CLBLL_LH8", + "LH7" + ], + [ + "CLBLL_LH9", + "LH8" + ], + [ + "CLBLL_LH10", + "LH9" + ], + [ + "CLBLL_LH11", + "LH10" + ], + [ + "CLBLL_LH12", + "LH11" + ], + [ + "CLBLL_LOGIC_OUTS0", + "LOGIC_OUTS_L0" + ], + [ + "CLBLL_LOGIC_OUTS1", + "LOGIC_OUTS_L1" + ], + [ + "CLBLL_LOGIC_OUTS2", + "LOGIC_OUTS_L2" + ], + [ + "CLBLL_LOGIC_OUTS3", + "LOGIC_OUTS_L3" + ], + [ + "CLBLL_LOGIC_OUTS4", + "LOGIC_OUTS_L4" + ], + [ + "CLBLL_LOGIC_OUTS5", + "LOGIC_OUTS_L5" + ], + [ + "CLBLL_LOGIC_OUTS6", + "LOGIC_OUTS_L6" + ], + [ + "CLBLL_LOGIC_OUTS7", + "LOGIC_OUTS_L7" + ], + [ + "CLBLL_LOGIC_OUTS8", + "LOGIC_OUTS_L8" + ], + [ + "CLBLL_LOGIC_OUTS9", + "LOGIC_OUTS_L9" + ], + [ + "CLBLL_LOGIC_OUTS10", + "LOGIC_OUTS_L10" + ], + [ + "CLBLL_LOGIC_OUTS11", + "LOGIC_OUTS_L11" + ], + [ + "CLBLL_LOGIC_OUTS12", + "LOGIC_OUTS_L12" + ], + [ + "CLBLL_LOGIC_OUTS13", + "LOGIC_OUTS_L13" + ], + [ + "CLBLL_LOGIC_OUTS14", + "LOGIC_OUTS_L14" + ], + [ + "CLBLL_LOGIC_OUTS15", + "LOGIC_OUTS_L15" + ], + [ + "CLBLL_LOGIC_OUTS16", + "LOGIC_OUTS_L16" + ], + [ + "CLBLL_LOGIC_OUTS17", + "LOGIC_OUTS_L17" + ], + [ + "CLBLL_LOGIC_OUTS18", + "LOGIC_OUTS_L18" + ], + [ + "CLBLL_LOGIC_OUTS19", + "LOGIC_OUTS_L19" + ], + [ + "CLBLL_LOGIC_OUTS20", + "LOGIC_OUTS_L20" + ], + [ + "CLBLL_LOGIC_OUTS21", + "LOGIC_OUTS_L21" + ], + [ + "CLBLL_LOGIC_OUTS22", + "LOGIC_OUTS_L22" + ], + [ + "CLBLL_LOGIC_OUTS23", + "LOGIC_OUTS_L23" + ], + [ + "CLBLL_MONITOR_N", + "MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "NE2END0" + ], + [ + "CLBLL_NE2A1", + "NE2END1" + ], + [ + "CLBLL_NE2A2", + "NE2END2" + ], + [ + "CLBLL_NE2A3", + "NE2END3" + ], + [ + "CLBLL_NE4BEG0", + "NE6A0" + ], + [ + "CLBLL_NE4BEG1", + "NE6A1" + ], + [ + "CLBLL_NE4BEG2", + "NE6A2" + ], + [ + "CLBLL_NE4BEG3", + "NE6A3" + ], + [ + "CLBLL_NE4C0", + "NE6END0" + ], + [ + "CLBLL_NE4C1", + "NE6END1" + ], + [ + "CLBLL_NE4C2", + "NE6END2" + ], + [ + "CLBLL_NE4C3", + "NE6END3" + ], + [ + "CLBLL_NW2A0", + "NW2A0" + ], + [ + "CLBLL_NW2A1", + "NW2A1" + ], + [ + "CLBLL_NW2A2", + "NW2A2" + ], + [ + "CLBLL_NW2A3", + "NW2A3" + ], + [ + "CLBLL_NW4A0", + "NW6BEG0" + ], + [ + "CLBLL_NW4A1", + "NW6BEG1" + ], + [ + "CLBLL_NW4A2", + "NW6BEG2" + ], + [ + "CLBLL_NW4A3", + "NW6BEG3" + ], + [ + "CLBLL_NW4END0", + "NW6E0" + ], + [ + "CLBLL_NW4END1", + "NW6E1" + ], + [ + "CLBLL_NW4END2", + "NW6E2" + ], + [ + "CLBLL_NW4END3", + "NW6E3" + ], + [ + "CLBLL_SE2A0", + "SE2END0" + ], + [ + "CLBLL_SE2A1", + "SE2END1" + ], + [ + "CLBLL_SE2A2", + "SE2END2" + ], + [ + "CLBLL_SE2A3", + "SE2END3" + ], + [ + "CLBLL_SE4BEG0", + "SE6A0" + ], + [ + "CLBLL_SE4BEG1", + "SE6A1" + ], + [ + "CLBLL_SE4BEG2", + "SE6A2" + ], + [ + "CLBLL_SE4BEG3", + "SE6A3" + ], + [ + "CLBLL_SE4C0", + "SE6END0" + ], + [ + "CLBLL_SE4C1", + "SE6END1" + ], + [ + "CLBLL_SE4C2", + "SE6END2" + ], + [ + "CLBLL_SE4C3", + "SE6END3" + ], + [ + "CLBLL_SW2A0", + "SW2A0" + ], + [ + "CLBLL_SW2A1", + "SW2A1" + ], + [ + "CLBLL_SW2A2", + "SW2A2" + ], + [ + "CLBLL_SW2A3", + "SW2A3" + ], + [ + "CLBLL_SW4A0", + "SW6BEG0" + ], + [ + "CLBLL_SW4A1", + "SW6BEG1" + ], + [ + "CLBLL_SW4A2", + "SW6BEG2" + ], + [ + "CLBLL_SW4A3", + "SW6BEG3" + ], + [ + "CLBLL_SW4END0", + "SW6E0" + ], + [ + "CLBLL_SW4END1", + "SW6E1" + ], + [ + "CLBLL_SW4END2", + "SW6E2" + ], + [ + "CLBLL_SW4END3", + "SW6E3" + ], + [ + "CLBLL_WL1END0", + "WL1BEG0" + ], + [ + "CLBLL_WL1END1", + "WL1BEG1" + ], + [ + "CLBLL_WL1END2", + "WL1BEG2" + ], + [ + "CLBLL_WL1END3", + "WL1BEG3" + ], + [ + "CLBLL_WR1END0", + "WR1BEG0" + ], + [ + "CLBLL_WR1END1", + "WR1BEG1" + ], + [ + "CLBLL_WR1END2", + "WR1BEG2" + ], + [ + "CLBLL_WR1END3", + "WR1BEG3" + ], + [ + "CLBLL_WW2A0", + "WW2BEG0" + ], + [ + "CLBLL_WW2A1", + "WW2BEG1" + ], + [ + "CLBLL_WW2A2", + "WW2BEG2" + ], + [ + "CLBLL_WW2A3", + "WW2BEG3" + ], + [ + "CLBLL_WW2END0", + "WW2A0" + ], + [ + "CLBLL_WW2END1", + "WW2A1" + ], + [ + "CLBLL_WW2END2", + "WW2A2" + ], + [ + "CLBLL_WW2END3", + "WW2A3" + ], + [ + "CLBLL_WW4A0", + "WW4BEG0" + ], + [ + "CLBLL_WW4A1", + "WW4BEG1" + ], + [ + "CLBLL_WW4A2", + "WW4BEG2" + ], + [ + "CLBLL_WW4A3", + "WW4BEG3" + ], + [ + "CLBLL_WW4B0", + "WW4A0" + ], + [ + "CLBLL_WW4B1", + "WW4A1" + ], + [ + "CLBLL_WW4B2", + "WW4A2" + ], + [ + "CLBLL_WW4B3", + "WW4A3" + ], + [ + "CLBLL_WW4C0", + "WW4B0" + ], + [ + "CLBLL_WW4C1", + "WW4B1" + ], + [ + "CLBLL_WW4C2", + "WW4B2" + ], + [ + "CLBLL_WW4C3", + "WW4B3" + ], + [ + "CLBLL_WW4END0", + "WW4C0" + ], + [ + "CLBLL_WW4END1", + "WW4C1" + ], + [ + "CLBLL_WW4END2", + "WW4C2" + ], + [ + "CLBLL_WW4END3", + "WW4C3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLL_L", + "VBRK" + ], + "wire_pairs": [ + [ + "CLBLL_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLBLL_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLBLL_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLBLL_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLBLL_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLBLL_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLBLL_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLBLL_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLBLL_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLBLL_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLBLL_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLBLL_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLBLL_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLBLL_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLBLL_LH1", + "VBRK_LH1" + ], + [ + "CLBLL_LH2", + "VBRK_LH2" + ], + [ + "CLBLL_LH3", + "VBRK_LH3" + ], + [ + "CLBLL_LH4", + "VBRK_LH4" + ], + [ + "CLBLL_LH5", + "VBRK_LH5" + ], + [ + "CLBLL_LH6", + "VBRK_LH6" + ], + [ + "CLBLL_LH7", + "VBRK_LH7" + ], + [ + "CLBLL_LH8", + "VBRK_LH8" + ], + [ + "CLBLL_LH9", + "VBRK_LH9" + ], + [ + "CLBLL_LH10", + "VBRK_LH10" + ], + [ + "CLBLL_LH11", + "VBRK_LH11" + ], + [ + "CLBLL_LH12", + "VBRK_LH12" + ], + [ + "CLBLL_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLBLL_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLBLL_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLBLL_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLBLL_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLBLL_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLBLL_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLBLL_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLBLL_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLBLL_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLBLL_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLBLL_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLBLL_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLBLL_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLBLL_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLBLL_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLBLL_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLBLL_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLBLL_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLBLL_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLBLL_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLBLL_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLBLL_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLBLL_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLBLL_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLBLL_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLBLL_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLBLL_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLBLL_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLBLL_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLBLL_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLBLL_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLBLL_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLBLL_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLBLL_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLBLL_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLBLL_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLBLL_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLBLL_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLBLL_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLBLL_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLBLL_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLBLL_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLBLL_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLBLL_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLBLL_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLBLL_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLBLL_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLBLL_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLBLL_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLBLL_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLBLL_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLBLL_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLBLL_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLBLL_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLBLL_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLBLL_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLBLL_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLBLL_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLBLL_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLBLL_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLBLL_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLBLL_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLBLL_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLBLL_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLBLL_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLBLL_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLBLL_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLBLL_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLBLL_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLBLL_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLBLL_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLBLL_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLBLL_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLBLL_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLBLL_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLBLL_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLBLL_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLL_R", + "CLBLL_R" + ], + "wire_pairs": [ + [ + "CLBLL_LL_CIN", + "CLBLL_LL_COUT_N" + ], + [ + "CLBLL_L_CIN", + "CLBLL_L_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLBLL_R", + "CLBLM_L" + ], + "wire_pairs": [ + [ + "CLBLL_EE2A0", + "CLBLM_EE2A0" + ], + [ + "CLBLL_EE2A1", + "CLBLM_EE2A1" + ], + [ + "CLBLL_EE2A2", + "CLBLM_EE2A2" + ], + [ + "CLBLL_EE2A3", + "CLBLM_EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "CLBLM_EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "CLBLM_EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "CLBLM_EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "CLBLM_EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "CLBLM_EE4A0" + ], + [ + "CLBLL_EE4A1", + "CLBLM_EE4A1" + ], + [ + "CLBLL_EE4A2", + "CLBLM_EE4A2" + ], + [ + "CLBLL_EE4A3", + "CLBLM_EE4A3" + ], + [ + "CLBLL_EE4B0", + "CLBLM_EE4B0" + ], + [ + "CLBLL_EE4B1", + "CLBLM_EE4B1" + ], + [ + "CLBLL_EE4B2", + "CLBLM_EE4B2" + ], + [ + "CLBLL_EE4B3", + "CLBLM_EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "CLBLM_EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "CLBLM_EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "CLBLM_EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "CLBLM_EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "CLBLM_EE4C0" + ], + [ + "CLBLL_EE4C1", + "CLBLM_EE4C1" + ], + [ + "CLBLL_EE4C2", + "CLBLM_EE4C2" + ], + [ + "CLBLL_EE4C3", + "CLBLM_EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "CLBLM_EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "CLBLM_EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "CLBLM_EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "CLBLM_EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "CLBLM_ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "CLBLM_ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "CLBLM_ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "CLBLM_ER1BEG3" + ], + [ + "CLBLL_LH1", + "CLBLM_LH1" + ], + [ + "CLBLL_LH2", + "CLBLM_LH2" + ], + [ + "CLBLL_LH3", + "CLBLM_LH3" + ], + [ + "CLBLL_LH4", + "CLBLM_LH4" + ], + [ + "CLBLL_LH5", + "CLBLM_LH5" + ], + [ + "CLBLL_LH6", + "CLBLM_LH6" + ], + [ + "CLBLL_LH7", + "CLBLM_LH7" + ], + [ + "CLBLL_LH8", + "CLBLM_LH8" + ], + [ + "CLBLL_LH9", + "CLBLM_LH9" + ], + [ + "CLBLL_LH10", + "CLBLM_LH10" + ], + [ + "CLBLL_LH11", + "CLBLM_LH11" + ], + [ + "CLBLL_LH12", + "CLBLM_LH12" + ], + [ + "CLBLL_MONITOR_N", + "CLBLM_MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "CLBLM_MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "CLBLM_NE2A0" + ], + [ + "CLBLL_NE2A1", + "CLBLM_NE2A1" + ], + [ + "CLBLL_NE2A2", + "CLBLM_NE2A2" + ], + [ + "CLBLL_NE2A3", + "CLBLM_NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "CLBLM_NE4BEG0" + ], + [ + "CLBLL_NE4BEG1", + "CLBLM_NE4BEG1" + ], + [ + "CLBLL_NE4BEG2", + "CLBLM_NE4BEG2" + ], + [ + "CLBLL_NE4BEG3", + "CLBLM_NE4BEG3" + ], + [ + "CLBLL_NE4C0", + "CLBLM_NE4C0" + ], + [ + "CLBLL_NE4C1", + "CLBLM_NE4C1" + ], + [ + "CLBLL_NE4C2", + "CLBLM_NE4C2" + ], + [ + "CLBLL_NE4C3", + "CLBLM_NE4C3" + ], + [ + "CLBLL_NW2A0", + "CLBLM_NW2A0" + ], + [ + "CLBLL_NW2A1", + "CLBLM_NW2A1" + ], + [ + "CLBLL_NW2A2", + "CLBLM_NW2A2" + ], + [ + "CLBLL_NW2A3", + "CLBLM_NW2A3" + ], + [ + "CLBLL_NW4A0", + "CLBLM_NW4A0" + ], + [ + "CLBLL_NW4A1", + "CLBLM_NW4A1" + ], + [ + "CLBLL_NW4A2", + "CLBLM_NW4A2" + ], + [ + "CLBLL_NW4A3", + "CLBLM_NW4A3" + ], + [ + "CLBLL_NW4END0", + "CLBLM_NW4END0" + ], + [ + "CLBLL_NW4END1", + "CLBLM_NW4END1" + ], + [ + "CLBLL_NW4END2", + "CLBLM_NW4END2" + ], + [ + "CLBLL_NW4END3", + "CLBLM_NW4END3" + ], + [ + "CLBLL_SE2A0", + "CLBLM_SE2A0" + ], + [ + "CLBLL_SE2A1", + "CLBLM_SE2A1" + ], + [ + "CLBLL_SE2A2", + "CLBLM_SE2A2" + ], + [ + "CLBLL_SE2A3", + "CLBLM_SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "CLBLM_SE4BEG0" + ], + [ + "CLBLL_SE4BEG1", + "CLBLM_SE4BEG1" + ], + [ + "CLBLL_SE4BEG2", + "CLBLM_SE4BEG2" + ], + [ + "CLBLL_SE4BEG3", + "CLBLM_SE4BEG3" + ], + [ + "CLBLL_SE4C0", + "CLBLM_SE4C0" + ], + [ + "CLBLL_SE4C1", + "CLBLM_SE4C1" + ], + [ + "CLBLL_SE4C2", + "CLBLM_SE4C2" + ], + [ + "CLBLL_SE4C3", + "CLBLM_SE4C3" + ], + [ + "CLBLL_SW2A0", + "CLBLM_SW2A0" + ], + [ + "CLBLL_SW2A1", + "CLBLM_SW2A1" + ], + [ + "CLBLL_SW2A2", + "CLBLM_SW2A2" + ], + [ + "CLBLL_SW2A3", + "CLBLM_SW2A3" + ], + [ + "CLBLL_SW4A0", + "CLBLM_SW4A0" + ], + [ + "CLBLL_SW4A1", + "CLBLM_SW4A1" + ], + [ + "CLBLL_SW4A2", + "CLBLM_SW4A2" + ], + [ + "CLBLL_SW4A3", + "CLBLM_SW4A3" + ], + [ + "CLBLL_SW4END0", + "CLBLM_SW4END0" + ], + [ + "CLBLL_SW4END1", + "CLBLM_SW4END1" + ], + [ + "CLBLL_SW4END2", + "CLBLM_SW4END2" + ], + [ + "CLBLL_SW4END3", + "CLBLM_SW4END3" + ], + [ + "CLBLL_WL1END0", + "CLBLM_WL1END0" + ], + [ + "CLBLL_WL1END1", + "CLBLM_WL1END1" + ], + [ + "CLBLL_WL1END2", + "CLBLM_WL1END2" + ], + [ + "CLBLL_WL1END3", + "CLBLM_WL1END3" + ], + [ + "CLBLL_WR1END0", + "CLBLM_WR1END0" + ], + [ + "CLBLL_WR1END1", + "CLBLM_WR1END1" + ], + [ + "CLBLL_WR1END2", + "CLBLM_WR1END2" + ], + [ + "CLBLL_WR1END3", + "CLBLM_WR1END3" + ], + [ + "CLBLL_WW2A0", + "CLBLM_WW2A0" + ], + [ + "CLBLL_WW2A1", + "CLBLM_WW2A1" + ], + [ + "CLBLL_WW2A2", + "CLBLM_WW2A2" + ], + [ + "CLBLL_WW2A3", + "CLBLM_WW2A3" + ], + [ + "CLBLL_WW2END0", + "CLBLM_WW2END0" + ], + [ + "CLBLL_WW2END1", + "CLBLM_WW2END1" + ], + [ + "CLBLL_WW2END2", + "CLBLM_WW2END2" + ], + [ + "CLBLL_WW2END3", + "CLBLM_WW2END3" + ], + [ + "CLBLL_WW4A0", + "CLBLM_WW4A0" + ], + [ + "CLBLL_WW4A1", + "CLBLM_WW4A1" + ], + [ + "CLBLL_WW4A2", + "CLBLM_WW4A2" + ], + [ + "CLBLL_WW4A3", + "CLBLM_WW4A3" + ], + [ + "CLBLL_WW4B0", + "CLBLM_WW4B0" + ], + [ + "CLBLL_WW4B1", + "CLBLM_WW4B1" + ], + [ + "CLBLL_WW4B2", + "CLBLM_WW4B2" + ], + [ + "CLBLL_WW4B3", + "CLBLM_WW4B3" + ], + [ + "CLBLL_WW4C0", + "CLBLM_WW4C0" + ], + [ + "CLBLL_WW4C1", + "CLBLM_WW4C1" + ], + [ + "CLBLL_WW4C2", + "CLBLM_WW4C2" + ], + [ + "CLBLL_WW4C3", + "CLBLM_WW4C3" + ], + [ + "CLBLL_WW4END0", + "CLBLM_WW4END0" + ], + [ + "CLBLL_WW4END1", + "CLBLM_WW4END1" + ], + [ + "CLBLL_WW4END2", + "CLBLM_WW4END2" + ], + [ + "CLBLL_WW4END3", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLBLL_R", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLL_LL_COUT_N", + "HCLK_CLB_COUT1_R" + ], + [ + "CLBLL_L_COUT_N", + "HCLK_CLB_COUT0_R" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLL_R", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLL_LL_CIN", + "HCLK_CLB_COUT1_R" + ], + [ + "CLBLL_L_CIN", + "HCLK_CLB_COUT0_R" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLL_R", + "INT_R" + ], + "wire_pairs": [ + [ + "CLBLL_BYP0", + "BYP0" + ], + [ + "CLBLL_BYP1", + "BYP1" + ], + [ + "CLBLL_BYP2", + "BYP2" + ], + [ + "CLBLL_BYP3", + "BYP3" + ], + [ + "CLBLL_BYP4", + "BYP4" + ], + [ + "CLBLL_BYP5", + "BYP5" + ], + [ + "CLBLL_BYP6", + "BYP6" + ], + [ + "CLBLL_BYP7", + "BYP7" + ], + [ + "CLBLL_CLK0", + "CLK0" + ], + [ + "CLBLL_CLK1", + "CLK1" + ], + [ + "CLBLL_CTRL0", + "CTRL0" + ], + [ + "CLBLL_CTRL1", + "CTRL1" + ], + [ + "CLBLL_EE2A0", + "EE2A0" + ], + [ + "CLBLL_EE2A1", + "EE2A1" + ], + [ + "CLBLL_EE2A2", + "EE2A2" + ], + [ + "CLBLL_EE2A3", + "EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "EE4A0" + ], + [ + "CLBLL_EE4A1", + "EE4A1" + ], + [ + "CLBLL_EE4A2", + "EE4A2" + ], + [ + "CLBLL_EE4A3", + "EE4A3" + ], + [ + "CLBLL_EE4B0", + "EE4B0" + ], + [ + "CLBLL_EE4B1", + "EE4B1" + ], + [ + "CLBLL_EE4B2", + "EE4B2" + ], + [ + "CLBLL_EE4B3", + "EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "EE4C0" + ], + [ + "CLBLL_EE4C1", + "EE4C1" + ], + [ + "CLBLL_EE4C2", + "EE4C2" + ], + [ + "CLBLL_EE4C3", + "EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "ER1BEG3" + ], + [ + "CLBLL_FAN0", + "FAN0" + ], + [ + "CLBLL_FAN1", + "FAN1" + ], + [ + "CLBLL_FAN2", + "FAN2" + ], + [ + "CLBLL_FAN3", + "FAN3" + ], + [ + "CLBLL_FAN4", + "FAN4" + ], + [ + "CLBLL_FAN5", + "FAN5" + ], + [ + "CLBLL_FAN6", + "FAN6" + ], + [ + "CLBLL_FAN7", + "FAN7" + ], + [ + "CLBLL_IMUX0", + "IMUX0" + ], + [ + "CLBLL_IMUX1", + "IMUX1" + ], + [ + "CLBLL_IMUX2", + "IMUX2" + ], + [ + "CLBLL_IMUX3", + "IMUX3" + ], + [ + "CLBLL_IMUX4", + "IMUX4" + ], + [ + "CLBLL_IMUX5", + "IMUX5" + ], + [ + "CLBLL_IMUX6", + "IMUX6" + ], + [ + "CLBLL_IMUX7", + "IMUX7" + ], + [ + "CLBLL_IMUX8", + "IMUX8" + ], + [ + "CLBLL_IMUX9", + "IMUX9" + ], + [ + "CLBLL_IMUX10", + "IMUX10" + ], + [ + "CLBLL_IMUX11", + "IMUX11" + ], + [ + "CLBLL_IMUX12", + "IMUX12" + ], + [ + "CLBLL_IMUX13", + "IMUX13" + ], + [ + "CLBLL_IMUX14", + "IMUX14" + ], + [ + "CLBLL_IMUX15", + "IMUX15" + ], + [ + "CLBLL_IMUX16", + "IMUX16" + ], + [ + "CLBLL_IMUX17", + "IMUX17" + ], + [ + "CLBLL_IMUX18", + "IMUX18" + ], + [ + "CLBLL_IMUX19", + "IMUX19" + ], + [ + "CLBLL_IMUX20", + "IMUX20" + ], + [ + "CLBLL_IMUX21", + "IMUX21" + ], + [ + "CLBLL_IMUX22", + "IMUX22" + ], + [ + "CLBLL_IMUX23", + "IMUX23" + ], + [ + "CLBLL_IMUX24", + "IMUX24" + ], + [ + "CLBLL_IMUX25", + "IMUX25" + ], + [ + "CLBLL_IMUX26", + "IMUX26" + ], + [ + "CLBLL_IMUX27", + "IMUX27" + ], + [ + "CLBLL_IMUX28", + "IMUX28" + ], + [ + "CLBLL_IMUX29", + "IMUX29" + ], + [ + "CLBLL_IMUX30", + "IMUX30" + ], + [ + "CLBLL_IMUX31", + "IMUX31" + ], + [ + "CLBLL_IMUX32", + "IMUX32" + ], + [ + "CLBLL_IMUX33", + "IMUX33" + ], + [ + "CLBLL_IMUX34", + "IMUX34" + ], + [ + "CLBLL_IMUX35", + "IMUX35" + ], + [ + "CLBLL_IMUX36", + "IMUX36" + ], + [ + "CLBLL_IMUX37", + "IMUX37" + ], + [ + "CLBLL_IMUX38", + "IMUX38" + ], + [ + "CLBLL_IMUX39", + "IMUX39" + ], + [ + "CLBLL_IMUX40", + "IMUX40" + ], + [ + "CLBLL_IMUX41", + "IMUX41" + ], + [ + "CLBLL_IMUX42", + "IMUX42" + ], + [ + "CLBLL_IMUX43", + "IMUX43" + ], + [ + "CLBLL_IMUX44", + "IMUX44" + ], + [ + "CLBLL_IMUX45", + "IMUX45" + ], + [ + "CLBLL_IMUX46", + "IMUX46" + ], + [ + "CLBLL_IMUX47", + "IMUX47" + ], + [ + "CLBLL_LH1", + "LH1" + ], + [ + "CLBLL_LH2", + "LH2" + ], + [ + "CLBLL_LH3", + "LH3" + ], + [ + "CLBLL_LH4", + "LH4" + ], + [ + "CLBLL_LH5", + "LH5" + ], + [ + "CLBLL_LH6", + "LH6" + ], + [ + "CLBLL_LH7", + "LH7" + ], + [ + "CLBLL_LH8", + "LH8" + ], + [ + "CLBLL_LH9", + "LH9" + ], + [ + "CLBLL_LH10", + "LH10" + ], + [ + "CLBLL_LH11", + "LH11" + ], + [ + "CLBLL_LH12", + "LH12" + ], + [ + "CLBLL_LOGIC_OUTS0", + "LOGIC_OUTS0" + ], + [ + "CLBLL_LOGIC_OUTS1", + "LOGIC_OUTS1" + ], + [ + "CLBLL_LOGIC_OUTS2", + "LOGIC_OUTS2" + ], + [ + "CLBLL_LOGIC_OUTS3", + "LOGIC_OUTS3" + ], + [ + "CLBLL_LOGIC_OUTS4", + "LOGIC_OUTS4" + ], + [ + "CLBLL_LOGIC_OUTS5", + "LOGIC_OUTS5" + ], + [ + "CLBLL_LOGIC_OUTS6", + "LOGIC_OUTS6" + ], + [ + "CLBLL_LOGIC_OUTS7", + "LOGIC_OUTS7" + ], + [ + "CLBLL_LOGIC_OUTS8", + "LOGIC_OUTS8" + ], + [ + "CLBLL_LOGIC_OUTS9", + "LOGIC_OUTS9" + ], + [ + "CLBLL_LOGIC_OUTS10", + "LOGIC_OUTS10" + ], + [ + "CLBLL_LOGIC_OUTS11", + "LOGIC_OUTS11" + ], + [ + "CLBLL_LOGIC_OUTS12", + "LOGIC_OUTS12" + ], + [ + "CLBLL_LOGIC_OUTS13", + "LOGIC_OUTS13" + ], + [ + "CLBLL_LOGIC_OUTS14", + "LOGIC_OUTS14" + ], + [ + "CLBLL_LOGIC_OUTS15", + "LOGIC_OUTS15" + ], + [ + "CLBLL_LOGIC_OUTS16", + "LOGIC_OUTS16" + ], + [ + "CLBLL_LOGIC_OUTS17", + "LOGIC_OUTS17" + ], + [ + "CLBLL_LOGIC_OUTS18", + "LOGIC_OUTS18" + ], + [ + "CLBLL_LOGIC_OUTS19", + "LOGIC_OUTS19" + ], + [ + "CLBLL_LOGIC_OUTS20", + "LOGIC_OUTS20" + ], + [ + "CLBLL_LOGIC_OUTS21", + "LOGIC_OUTS21" + ], + [ + "CLBLL_LOGIC_OUTS22", + "LOGIC_OUTS22" + ], + [ + "CLBLL_LOGIC_OUTS23", + "LOGIC_OUTS23" + ], + [ + "CLBLL_MONITOR_N", + "MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "NE2A0" + ], + [ + "CLBLL_NE2A1", + "NE2A1" + ], + [ + "CLBLL_NE2A2", + "NE2A2" + ], + [ + "CLBLL_NE2A3", + "NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "NE6BEG0" + ], + [ + "CLBLL_NE4BEG1", + "NE6BEG1" + ], + [ + "CLBLL_NE4BEG2", + "NE6BEG2" + ], + [ + "CLBLL_NE4BEG3", + "NE6BEG3" + ], + [ + "CLBLL_NE4C0", + "NE6E0" + ], + [ + "CLBLL_NE4C1", + "NE6E1" + ], + [ + "CLBLL_NE4C2", + "NE6E2" + ], + [ + "CLBLL_NE4C3", + "NE6E3" + ], + [ + "CLBLL_NW2A0", + "NW2END0" + ], + [ + "CLBLL_NW2A1", + "NW2END1" + ], + [ + "CLBLL_NW2A2", + "NW2END2" + ], + [ + "CLBLL_NW2A3", + "NW2END3" + ], + [ + "CLBLL_NW4A0", + "NW6A0" + ], + [ + "CLBLL_NW4A1", + "NW6A1" + ], + [ + "CLBLL_NW4A2", + "NW6A2" + ], + [ + "CLBLL_NW4A3", + "NW6A3" + ], + [ + "CLBLL_NW4END0", + "NW6END0" + ], + [ + "CLBLL_NW4END1", + "NW6END1" + ], + [ + "CLBLL_NW4END2", + "NW6END2" + ], + [ + "CLBLL_NW4END3", + "NW6END3" + ], + [ + "CLBLL_SE2A0", + "SE2A0" + ], + [ + "CLBLL_SE2A1", + "SE2A1" + ], + [ + "CLBLL_SE2A2", + "SE2A2" + ], + [ + "CLBLL_SE2A3", + "SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "SE6BEG0" + ], + [ + "CLBLL_SE4BEG1", + "SE6BEG1" + ], + [ + "CLBLL_SE4BEG2", + "SE6BEG2" + ], + [ + "CLBLL_SE4BEG3", + "SE6BEG3" + ], + [ + "CLBLL_SE4C0", + "SE6E0" + ], + [ + "CLBLL_SE4C1", + "SE6E1" + ], + [ + "CLBLL_SE4C2", + "SE6E2" + ], + [ + "CLBLL_SE4C3", + "SE6E3" + ], + [ + "CLBLL_SW2A0", + "SW2END0" + ], + [ + "CLBLL_SW2A1", + "SW2END1" + ], + [ + "CLBLL_SW2A2", + "SW2END2" + ], + [ + "CLBLL_SW2A3", + "SW2END3" + ], + [ + "CLBLL_SW4A0", + "SW6A0" + ], + [ + "CLBLL_SW4A1", + "SW6A1" + ], + [ + "CLBLL_SW4A2", + "SW6A2" + ], + [ + "CLBLL_SW4A3", + "SW6A3" + ], + [ + "CLBLL_SW4END0", + "SW6END0" + ], + [ + "CLBLL_SW4END1", + "SW6END1" + ], + [ + "CLBLL_SW4END2", + "SW6END2" + ], + [ + "CLBLL_SW4END3", + "SW6END3" + ], + [ + "CLBLL_WL1END0", + "WL1END0" + ], + [ + "CLBLL_WL1END1", + "WL1END1" + ], + [ + "CLBLL_WL1END2", + "WL1END2" + ], + [ + "CLBLL_WL1END3", + "WL1END3" + ], + [ + "CLBLL_WR1END0", + "WR1END0" + ], + [ + "CLBLL_WR1END1", + "WR1END1" + ], + [ + "CLBLL_WR1END2", + "WR1END2" + ], + [ + "CLBLL_WR1END3", + "WR1END3" + ], + [ + "CLBLL_WW2A0", + "WW2A0" + ], + [ + "CLBLL_WW2A1", + "WW2A1" + ], + [ + "CLBLL_WW2A2", + "WW2A2" + ], + [ + "CLBLL_WW2A3", + "WW2A3" + ], + [ + "CLBLL_WW2END0", + "WW2END0" + ], + [ + "CLBLL_WW2END1", + "WW2END1" + ], + [ + "CLBLL_WW2END2", + "WW2END2" + ], + [ + "CLBLL_WW2END3", + "WW2END3" + ], + [ + "CLBLL_WW4A0", + "WW4A0" + ], + [ + "CLBLL_WW4A1", + "WW4A1" + ], + [ + "CLBLL_WW4A2", + "WW4A2" + ], + [ + "CLBLL_WW4A3", + "WW4A3" + ], + [ + "CLBLL_WW4B0", + "WW4B0" + ], + [ + "CLBLL_WW4B1", + "WW4B1" + ], + [ + "CLBLL_WW4B2", + "WW4B2" + ], + [ + "CLBLL_WW4B3", + "WW4B3" + ], + [ + "CLBLL_WW4C0", + "WW4C0" + ], + [ + "CLBLL_WW4C1", + "WW4C1" + ], + [ + "CLBLL_WW4C2", + "WW4C2" + ], + [ + "CLBLL_WW4C3", + "WW4C3" + ], + [ + "CLBLL_WW4END0", + "WW4END0" + ], + [ + "CLBLL_WW4END1", + "WW4END1" + ], + [ + "CLBLL_WW4END2", + "WW4END2" + ], + [ + "CLBLL_WW4END3", + "WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLBLL_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLBLL_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLBLL_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLBLL_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLBLL_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLBLL_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLBLL_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLBLL_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLBLL_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLBLL_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLBLL_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLBLL_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLBLL_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLBLL_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLBLL_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLBLL_LH1", + "VBRK_LH1" + ], + [ + "CLBLL_LH2", + "VBRK_LH2" + ], + [ + "CLBLL_LH3", + "VBRK_LH3" + ], + [ + "CLBLL_LH4", + "VBRK_LH4" + ], + [ + "CLBLL_LH5", + "VBRK_LH5" + ], + [ + "CLBLL_LH6", + "VBRK_LH6" + ], + [ + "CLBLL_LH7", + "VBRK_LH7" + ], + [ + "CLBLL_LH8", + "VBRK_LH8" + ], + [ + "CLBLL_LH9", + "VBRK_LH9" + ], + [ + "CLBLL_LH10", + "VBRK_LH10" + ], + [ + "CLBLL_LH11", + "VBRK_LH11" + ], + [ + "CLBLL_LH12", + "VBRK_LH12" + ], + [ + "CLBLL_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLBLL_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLBLL_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLBLL_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLBLL_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLBLL_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLBLL_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLBLL_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLBLL_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLBLL_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLBLL_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLBLL_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLBLL_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLBLL_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLBLL_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLBLL_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLBLL_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLBLL_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLBLL_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLBLL_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLBLL_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLBLL_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLBLL_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLBLL_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLBLL_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLBLL_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLBLL_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLBLL_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLBLL_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLBLL_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLBLL_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLBLL_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLBLL_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLBLL_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLBLL_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLBLL_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLBLL_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLBLL_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLBLL_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLBLL_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLBLL_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLBLL_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLBLL_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLBLL_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLBLL_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLBLL_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLBLL_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLBLL_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLBLL_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLBLL_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLBLL_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLBLL_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLBLL_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLBLL_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLBLL_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLBLL_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLBLL_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLBLL_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLBLL_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLBLL_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLBLL_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLBLL_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLBLL_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLBLL_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLBLL_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLBLL_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLBLL_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLBLL_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLBLL_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLBLL_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLBLL_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLBLL_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLBLL_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLBLL_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLBLL_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLBLL_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLBLL_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLBLL_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLBLL_R", + "VFRAME" + ], + "wire_pairs": [ + [ + "CLBLL_EE2A0", + "VFRAME_EE2A0" + ], + [ + "CLBLL_EE2A1", + "VFRAME_EE2A1" + ], + [ + "CLBLL_EE2A2", + "VFRAME_EE2A2" + ], + [ + "CLBLL_EE2A3", + "VFRAME_EE2A3" + ], + [ + "CLBLL_EE2BEG0", + "VFRAME_EE2BEG0" + ], + [ + "CLBLL_EE2BEG1", + "VFRAME_EE2BEG1" + ], + [ + "CLBLL_EE2BEG2", + "VFRAME_EE2BEG2" + ], + [ + "CLBLL_EE2BEG3", + "VFRAME_EE2BEG3" + ], + [ + "CLBLL_EE4A0", + "VFRAME_EE4A0" + ], + [ + "CLBLL_EE4A1", + "VFRAME_EE4A1" + ], + [ + "CLBLL_EE4A2", + "VFRAME_EE4A2" + ], + [ + "CLBLL_EE4A3", + "VFRAME_EE4A3" + ], + [ + "CLBLL_EE4B0", + "VFRAME_EE4B0" + ], + [ + "CLBLL_EE4B1", + "VFRAME_EE4B1" + ], + [ + "CLBLL_EE4B2", + "VFRAME_EE4B2" + ], + [ + "CLBLL_EE4B3", + "VFRAME_EE4B3" + ], + [ + "CLBLL_EE4BEG0", + "VFRAME_EE4BEG0" + ], + [ + "CLBLL_EE4BEG1", + "VFRAME_EE4BEG1" + ], + [ + "CLBLL_EE4BEG2", + "VFRAME_EE4BEG2" + ], + [ + "CLBLL_EE4BEG3", + "VFRAME_EE4BEG3" + ], + [ + "CLBLL_EE4C0", + "VFRAME_EE4C0" + ], + [ + "CLBLL_EE4C1", + "VFRAME_EE4C1" + ], + [ + "CLBLL_EE4C2", + "VFRAME_EE4C2" + ], + [ + "CLBLL_EE4C3", + "VFRAME_EE4C3" + ], + [ + "CLBLL_EL1BEG0", + "VFRAME_EL1BEG0" + ], + [ + "CLBLL_EL1BEG1", + "VFRAME_EL1BEG1" + ], + [ + "CLBLL_EL1BEG2", + "VFRAME_EL1BEG2" + ], + [ + "CLBLL_EL1BEG3", + "VFRAME_EL1BEG3" + ], + [ + "CLBLL_ER1BEG0", + "VFRAME_ER1BEG0" + ], + [ + "CLBLL_ER1BEG1", + "VFRAME_ER1BEG1" + ], + [ + "CLBLL_ER1BEG2", + "VFRAME_ER1BEG2" + ], + [ + "CLBLL_ER1BEG3", + "VFRAME_ER1BEG3" + ], + [ + "CLBLL_LH1", + "VFRAME_LH1" + ], + [ + "CLBLL_LH2", + "VFRAME_LH2" + ], + [ + "CLBLL_LH3", + "VFRAME_LH3" + ], + [ + "CLBLL_LH4", + "VFRAME_LH4" + ], + [ + "CLBLL_LH5", + "VFRAME_LH5" + ], + [ + "CLBLL_LH6", + "VFRAME_LH6" + ], + [ + "CLBLL_LH7", + "VFRAME_LH7" + ], + [ + "CLBLL_LH8", + "VFRAME_LH8" + ], + [ + "CLBLL_LH9", + "VFRAME_LH9" + ], + [ + "CLBLL_LH10", + "VFRAME_LH10" + ], + [ + "CLBLL_LH11", + "VFRAME_LH11" + ], + [ + "CLBLL_LH12", + "VFRAME_LH12" + ], + [ + "CLBLL_MONITOR_N", + "VFRAME_MONITOR_N" + ], + [ + "CLBLL_MONITOR_P", + "VFRAME_MONITOR_P" + ], + [ + "CLBLL_NE2A0", + "VFRAME_NE2A0" + ], + [ + "CLBLL_NE2A1", + "VFRAME_NE2A1" + ], + [ + "CLBLL_NE2A2", + "VFRAME_NE2A2" + ], + [ + "CLBLL_NE2A3", + "VFRAME_NE2A3" + ], + [ + "CLBLL_NE4BEG0", + "VFRAME_NE4BEG0" + ], + [ + "CLBLL_NE4BEG1", + "VFRAME_NE4BEG1" + ], + [ + "CLBLL_NE4BEG2", + "VFRAME_NE4BEG2" + ], + [ + "CLBLL_NE4BEG3", + "VFRAME_NE4BEG3" + ], + [ + "CLBLL_NE4C0", + "VFRAME_NE4C0" + ], + [ + "CLBLL_NE4C1", + "VFRAME_NE4C1" + ], + [ + "CLBLL_NE4C2", + "VFRAME_NE4C2" + ], + [ + "CLBLL_NE4C3", + "VFRAME_NE4C3" + ], + [ + "CLBLL_NW2A0", + "VFRAME_NW2A0" + ], + [ + "CLBLL_NW2A1", + "VFRAME_NW2A1" + ], + [ + "CLBLL_NW2A2", + "VFRAME_NW2A2" + ], + [ + "CLBLL_NW2A3", + "VFRAME_NW2A3" + ], + [ + "CLBLL_NW4A0", + "VFRAME_NW4A0" + ], + [ + "CLBLL_NW4A1", + "VFRAME_NW4A1" + ], + [ + "CLBLL_NW4A2", + "VFRAME_NW4A2" + ], + [ + "CLBLL_NW4A3", + "VFRAME_NW4A3" + ], + [ + "CLBLL_NW4END0", + "VFRAME_NW4END0" + ], + [ + "CLBLL_NW4END1", + "VFRAME_NW4END1" + ], + [ + "CLBLL_NW4END2", + "VFRAME_NW4END2" + ], + [ + "CLBLL_NW4END3", + "VFRAME_NW4END3" + ], + [ + "CLBLL_SE2A0", + "VFRAME_SE2A0" + ], + [ + "CLBLL_SE2A1", + "VFRAME_SE2A1" + ], + [ + "CLBLL_SE2A2", + "VFRAME_SE2A2" + ], + [ + "CLBLL_SE2A3", + "VFRAME_SE2A3" + ], + [ + "CLBLL_SE4BEG0", + "VFRAME_SE4BEG0" + ], + [ + "CLBLL_SE4BEG1", + "VFRAME_SE4BEG1" + ], + [ + "CLBLL_SE4BEG2", + "VFRAME_SE4BEG2" + ], + [ + "CLBLL_SE4BEG3", + "VFRAME_SE4BEG3" + ], + [ + "CLBLL_SE4C0", + "VFRAME_SE4C0" + ], + [ + "CLBLL_SE4C1", + "VFRAME_SE4C1" + ], + [ + "CLBLL_SE4C2", + "VFRAME_SE4C2" + ], + [ + "CLBLL_SE4C3", + "VFRAME_SE4C3" + ], + [ + "CLBLL_SW2A0", + "VFRAME_SW2A0" + ], + [ + "CLBLL_SW2A1", + "VFRAME_SW2A1" + ], + [ + "CLBLL_SW2A2", + "VFRAME_SW2A2" + ], + [ + "CLBLL_SW2A3", + "VFRAME_SW2A3" + ], + [ + "CLBLL_SW4A0", + "VFRAME_SW4A0" + ], + [ + "CLBLL_SW4A1", + "VFRAME_SW4A1" + ], + [ + "CLBLL_SW4A2", + "VFRAME_SW4A2" + ], + [ + "CLBLL_SW4A3", + "VFRAME_SW4A3" + ], + [ + "CLBLL_SW4END0", + "VFRAME_SW4END0" + ], + [ + "CLBLL_SW4END1", + "VFRAME_SW4END1" + ], + [ + "CLBLL_SW4END2", + "VFRAME_SW4END2" + ], + [ + "CLBLL_SW4END3", + "VFRAME_SW4END3" + ], + [ + "CLBLL_WL1END0", + "VFRAME_WL1END0" + ], + [ + "CLBLL_WL1END1", + "VFRAME_WL1END1" + ], + [ + "CLBLL_WL1END2", + "VFRAME_WL1END2" + ], + [ + "CLBLL_WL1END3", + "VFRAME_WL1END3" + ], + [ + "CLBLL_WR1END0", + "VFRAME_WR1END0" + ], + [ + "CLBLL_WR1END1", + "VFRAME_WR1END1" + ], + [ + "CLBLL_WR1END2", + "VFRAME_WR1END2" + ], + [ + "CLBLL_WR1END3", + "VFRAME_WR1END3" + ], + [ + "CLBLL_WW2A0", + "VFRAME_WW2A0" + ], + [ + "CLBLL_WW2A1", + "VFRAME_WW2A1" + ], + [ + "CLBLL_WW2A2", + "VFRAME_WW2A2" + ], + [ + "CLBLL_WW2A3", + "VFRAME_WW2A3" + ], + [ + "CLBLL_WW2END0", + "VFRAME_WW2END0" + ], + [ + "CLBLL_WW2END1", + "VFRAME_WW2END1" + ], + [ + "CLBLL_WW2END2", + "VFRAME_WW2END2" + ], + [ + "CLBLL_WW2END3", + "VFRAME_WW2END3" + ], + [ + "CLBLL_WW4A0", + "VFRAME_WW4A0" + ], + [ + "CLBLL_WW4A1", + "VFRAME_WW4A1" + ], + [ + "CLBLL_WW4A2", + "VFRAME_WW4A2" + ], + [ + "CLBLL_WW4A3", + "VFRAME_WW4A3" + ], + [ + "CLBLL_WW4B0", + "VFRAME_WW4B0" + ], + [ + "CLBLL_WW4B1", + "VFRAME_WW4B1" + ], + [ + "CLBLL_WW4B2", + "VFRAME_WW4B2" + ], + [ + "CLBLL_WW4B3", + "VFRAME_WW4B3" + ], + [ + "CLBLL_WW4C0", + "VFRAME_WW4C0" + ], + [ + "CLBLL_WW4C1", + "VFRAME_WW4C1" + ], + [ + "CLBLL_WW4C2", + "VFRAME_WW4C2" + ], + [ + "CLBLL_WW4C3", + "VFRAME_WW4C3" + ], + [ + "CLBLL_WW4END0", + "VFRAME_WW4END0" + ], + [ + "CLBLL_WW4END1", + "VFRAME_WW4END1" + ], + [ + "CLBLL_WW4END2", + "VFRAME_WW4END2" + ], + [ + "CLBLL_WW4END3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLM_L", + "CLBLM_L" + ], + "wire_pairs": [ + [ + "CLBLM_L_CIN", + "CLBLM_L_COUT_N" + ], + [ + "CLBLM_M_CIN", + "CLBLM_M_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLM_L", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "CLBLM_EE2A0", + "CLBLM_EE2A0" + ], + [ + "CLBLM_EE2A1", + "CLBLM_EE2A1" + ], + [ + "CLBLM_EE2A2", + "CLBLM_EE2A2" + ], + [ + "CLBLM_EE2A3", + "CLBLM_EE2A3" + ], + [ + "CLBLM_EE2BEG0", + "CLBLM_EE2BEG0" + ], + [ + "CLBLM_EE2BEG1", + "CLBLM_EE2BEG1" + ], + [ + "CLBLM_EE2BEG2", + "CLBLM_EE2BEG2" + ], + [ + "CLBLM_EE2BEG3", + "CLBLM_EE2BEG3" + ], + [ + "CLBLM_EE4A0", + "CLBLM_EE4A0" + ], + [ + "CLBLM_EE4A1", + "CLBLM_EE4A1" + ], + [ + "CLBLM_EE4A2", + "CLBLM_EE4A2" + ], + [ + "CLBLM_EE4A3", + "CLBLM_EE4A3" + ], + [ + "CLBLM_EE4B0", + "CLBLM_EE4B0" + ], + [ + "CLBLM_EE4B1", + "CLBLM_EE4B1" + ], + [ + "CLBLM_EE4B2", + "CLBLM_EE4B2" + ], + [ + "CLBLM_EE4B3", + "CLBLM_EE4B3" + ], + [ + "CLBLM_EE4BEG0", + "CLBLM_EE4BEG0" + ], + [ + "CLBLM_EE4BEG1", + "CLBLM_EE4BEG1" + ], + [ + "CLBLM_EE4BEG2", + "CLBLM_EE4BEG2" + ], + [ + "CLBLM_EE4BEG3", + "CLBLM_EE4BEG3" + ], + [ + "CLBLM_EE4C0", + "CLBLM_EE4C0" + ], + [ + "CLBLM_EE4C1", + "CLBLM_EE4C1" + ], + [ + "CLBLM_EE4C2", + "CLBLM_EE4C2" + ], + [ + "CLBLM_EE4C3", + "CLBLM_EE4C3" + ], + [ + "CLBLM_EL1BEG0", + "CLBLM_EL1BEG0" + ], + [ + "CLBLM_EL1BEG1", + "CLBLM_EL1BEG1" + ], + [ + "CLBLM_EL1BEG2", + "CLBLM_EL1BEG2" + ], + [ + "CLBLM_EL1BEG3", + "CLBLM_EL1BEG3" + ], + [ + "CLBLM_ER1BEG0", + "CLBLM_ER1BEG0" + ], + [ + "CLBLM_ER1BEG1", + "CLBLM_ER1BEG1" + ], + [ + "CLBLM_ER1BEG2", + "CLBLM_ER1BEG2" + ], + [ + "CLBLM_ER1BEG3", + "CLBLM_ER1BEG3" + ], + [ + "CLBLM_LH1", + "CLBLM_LH1" + ], + [ + "CLBLM_LH2", + "CLBLM_LH2" + ], + [ + "CLBLM_LH3", + "CLBLM_LH3" + ], + [ + "CLBLM_LH4", + "CLBLM_LH4" + ], + [ + "CLBLM_LH5", + "CLBLM_LH5" + ], + [ + "CLBLM_LH6", + "CLBLM_LH6" + ], + [ + "CLBLM_LH7", + "CLBLM_LH7" + ], + [ + "CLBLM_LH8", + "CLBLM_LH8" + ], + [ + "CLBLM_LH9", + "CLBLM_LH9" + ], + [ + "CLBLM_LH10", + "CLBLM_LH10" + ], + [ + "CLBLM_LH11", + "CLBLM_LH11" + ], + [ + "CLBLM_LH12", + "CLBLM_LH12" + ], + [ + "CLBLM_MONITOR_N", + "CLBLM_MONITOR_N" + ], + [ + "CLBLM_MONITOR_P", + "CLBLM_MONITOR_P" + ], + [ + "CLBLM_NE2A0", + "CLBLM_NE2A0" + ], + [ + "CLBLM_NE2A1", + "CLBLM_NE2A1" + ], + [ + "CLBLM_NE2A2", + "CLBLM_NE2A2" + ], + [ + "CLBLM_NE2A3", + "CLBLM_NE2A3" + ], + [ + "CLBLM_NE4BEG0", + "CLBLM_NE4BEG0" + ], + [ + "CLBLM_NE4BEG1", + "CLBLM_NE4BEG1" + ], + [ + "CLBLM_NE4BEG2", + "CLBLM_NE4BEG2" + ], + [ + "CLBLM_NE4BEG3", + "CLBLM_NE4BEG3" + ], + [ + "CLBLM_NE4C0", + "CLBLM_NE4C0" + ], + [ + "CLBLM_NE4C1", + "CLBLM_NE4C1" + ], + [ + "CLBLM_NE4C2", + "CLBLM_NE4C2" + ], + [ + "CLBLM_NE4C3", + "CLBLM_NE4C3" + ], + [ + "CLBLM_NW2A0", + "CLBLM_NW2A0" + ], + [ + "CLBLM_NW2A1", + "CLBLM_NW2A1" + ], + [ + "CLBLM_NW2A2", + "CLBLM_NW2A2" + ], + [ + "CLBLM_NW2A3", + "CLBLM_NW2A3" + ], + [ + "CLBLM_NW4A0", + "CLBLM_NW4A0" + ], + [ + "CLBLM_NW4A1", + "CLBLM_NW4A1" + ], + [ + "CLBLM_NW4A2", + "CLBLM_NW4A2" + ], + [ + "CLBLM_NW4A3", + "CLBLM_NW4A3" + ], + [ + "CLBLM_NW4END0", + "CLBLM_NW4END0" + ], + [ + "CLBLM_NW4END1", + "CLBLM_NW4END1" + ], + [ + "CLBLM_NW4END2", + "CLBLM_NW4END2" + ], + [ + "CLBLM_NW4END3", + "CLBLM_NW4END3" + ], + [ + "CLBLM_SE2A0", + "CLBLM_SE2A0" + ], + [ + "CLBLM_SE2A1", + "CLBLM_SE2A1" + ], + [ + "CLBLM_SE2A2", + "CLBLM_SE2A2" + ], + [ + "CLBLM_SE2A3", + "CLBLM_SE2A3" + ], + [ + "CLBLM_SE4BEG0", + "CLBLM_SE4BEG0" + ], + [ + "CLBLM_SE4BEG1", + "CLBLM_SE4BEG1" + ], + [ + "CLBLM_SE4BEG2", + "CLBLM_SE4BEG2" + ], + [ + "CLBLM_SE4BEG3", + "CLBLM_SE4BEG3" + ], + [ + "CLBLM_SE4C0", + "CLBLM_SE4C0" + ], + [ + "CLBLM_SE4C1", + "CLBLM_SE4C1" + ], + [ + "CLBLM_SE4C2", + "CLBLM_SE4C2" + ], + [ + "CLBLM_SE4C3", + "CLBLM_SE4C3" + ], + [ + "CLBLM_SW2A0", + "CLBLM_SW2A0" + ], + [ + "CLBLM_SW2A1", + "CLBLM_SW2A1" + ], + [ + "CLBLM_SW2A2", + "CLBLM_SW2A2" + ], + [ + "CLBLM_SW2A3", + "CLBLM_SW2A3" + ], + [ + "CLBLM_SW4A0", + "CLBLM_SW4A0" + ], + [ + "CLBLM_SW4A1", + "CLBLM_SW4A1" + ], + [ + "CLBLM_SW4A2", + "CLBLM_SW4A2" + ], + [ + "CLBLM_SW4A3", + "CLBLM_SW4A3" + ], + [ + "CLBLM_SW4END0", + "CLBLM_SW4END0" + ], + [ + "CLBLM_SW4END1", + "CLBLM_SW4END1" + ], + [ + "CLBLM_SW4END2", + "CLBLM_SW4END2" + ], + [ + "CLBLM_SW4END3", + "CLBLM_SW4END3" + ], + [ + "CLBLM_WL1END0", + "CLBLM_WL1END0" + ], + [ + "CLBLM_WL1END1", + "CLBLM_WL1END1" + ], + [ + "CLBLM_WL1END2", + "CLBLM_WL1END2" + ], + [ + "CLBLM_WL1END3", + "CLBLM_WL1END3" + ], + [ + "CLBLM_WR1END0", + "CLBLM_WR1END0" + ], + [ + "CLBLM_WR1END1", + "CLBLM_WR1END1" + ], + [ + "CLBLM_WR1END2", + "CLBLM_WR1END2" + ], + [ + "CLBLM_WR1END3", + "CLBLM_WR1END3" + ], + [ + "CLBLM_WW2A0", + "CLBLM_WW2A0" + ], + [ + "CLBLM_WW2A1", + "CLBLM_WW2A1" + ], + [ + "CLBLM_WW2A2", + "CLBLM_WW2A2" + ], + [ + "CLBLM_WW2A3", + "CLBLM_WW2A3" + ], + [ + "CLBLM_WW2END0", + "CLBLM_WW2END0" + ], + [ + "CLBLM_WW2END1", + "CLBLM_WW2END1" + ], + [ + "CLBLM_WW2END2", + "CLBLM_WW2END2" + ], + [ + "CLBLM_WW2END3", + "CLBLM_WW2END3" + ], + [ + "CLBLM_WW4A0", + "CLBLM_WW4A0" + ], + [ + "CLBLM_WW4A1", + "CLBLM_WW4A1" + ], + [ + "CLBLM_WW4A2", + "CLBLM_WW4A2" + ], + [ + "CLBLM_WW4A3", + "CLBLM_WW4A3" + ], + [ + "CLBLM_WW4B0", + "CLBLM_WW4B0" + ], + [ + "CLBLM_WW4B1", + "CLBLM_WW4B1" + ], + [ + "CLBLM_WW4B2", + "CLBLM_WW4B2" + ], + [ + "CLBLM_WW4B3", + "CLBLM_WW4B3" + ], + [ + "CLBLM_WW4C0", + "CLBLM_WW4C0" + ], + [ + "CLBLM_WW4C1", + "CLBLM_WW4C1" + ], + [ + "CLBLM_WW4C2", + "CLBLM_WW4C2" + ], + [ + "CLBLM_WW4C3", + "CLBLM_WW4C3" + ], + [ + "CLBLM_WW4END0", + "CLBLM_WW4END0" + ], + [ + "CLBLM_WW4END1", + "CLBLM_WW4END1" + ], + [ + "CLBLM_WW4END2", + "CLBLM_WW4END2" + ], + [ + "CLBLM_WW4END3", + "CLBLM_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLBLM_L", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLM_L_COUT_N", + "HCLK_CLB_COUT1_L" + ], + [ + "CLBLM_M_COUT_N", + "HCLK_CLB_COUT0_L" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLM_L", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLM_L_CIN", + "HCLK_CLB_COUT1_L" + ], + [ + "CLBLM_M_CIN", + "HCLK_CLB_COUT0_L" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLBLM_L", + "INT_L" + ], + "wire_pairs": [ + [ + "CLBLM_BYP0", + "BYP_L0" + ], + [ + "CLBLM_BYP1", + "BYP_L1" + ], + [ + "CLBLM_BYP2", + "BYP_L2" + ], + [ + "CLBLM_BYP3", + "BYP_L3" + ], + [ + "CLBLM_BYP4", + "BYP_L4" + ], + [ + "CLBLM_BYP5", + "BYP_L5" + ], + [ + "CLBLM_BYP6", + "BYP_L6" + ], + [ + "CLBLM_BYP7", + "BYP_L7" + ], + [ + "CLBLM_CLK0", + "CLK_L0" + ], + [ + "CLBLM_CLK1", + "CLK_L1" + ], + [ + "CLBLM_CTRL0", + "CTRL_L0" + ], + [ + "CLBLM_CTRL1", + "CTRL_L1" + ], + [ + "CLBLM_EE2A0", + "EE2END0" + ], + [ + "CLBLM_EE2A1", + "EE2END1" + ], + [ + "CLBLM_EE2A2", + "EE2END2" + ], + [ + "CLBLM_EE2A3", + "EE2END3" + ], + [ + "CLBLM_EE2BEG0", + "EE2A0" + ], + [ + "CLBLM_EE2BEG1", + "EE2A1" + ], + [ + "CLBLM_EE2BEG2", + "EE2A2" + ], + [ + "CLBLM_EE2BEG3", + "EE2A3" + ], + [ + "CLBLM_EE4A0", + "EE4B0" + ], + [ + "CLBLM_EE4A1", + "EE4B1" + ], + [ + "CLBLM_EE4A2", + "EE4B2" + ], + [ + "CLBLM_EE4A3", + "EE4B3" + ], + [ + "CLBLM_EE4B0", + "EE4C0" + ], + [ + "CLBLM_EE4B1", + "EE4C1" + ], + [ + "CLBLM_EE4B2", + "EE4C2" + ], + [ + "CLBLM_EE4B3", + "EE4C3" + ], + [ + "CLBLM_EE4BEG0", + "EE4A0" + ], + [ + "CLBLM_EE4BEG1", + "EE4A1" + ], + [ + "CLBLM_EE4BEG2", + "EE4A2" + ], + [ + "CLBLM_EE4BEG3", + "EE4A3" + ], + [ + "CLBLM_EE4C0", + "EE4END0" + ], + [ + "CLBLM_EE4C1", + "EE4END1" + ], + [ + "CLBLM_EE4C2", + "EE4END2" + ], + [ + "CLBLM_EE4C3", + "EE4END3" + ], + [ + "CLBLM_EL1BEG0", + "EL1END0" + ], + [ + "CLBLM_EL1BEG1", + "EL1END1" + ], + [ + "CLBLM_EL1BEG2", + "EL1END2" + ], + [ + "CLBLM_EL1BEG3", + "EL1END3" + ], + [ + "CLBLM_ER1BEG0", + "ER1END0" + ], + [ + "CLBLM_ER1BEG1", + "ER1END1" + ], + [ + "CLBLM_ER1BEG2", + "ER1END2" + ], + [ + "CLBLM_ER1BEG3", + "ER1END3" + ], + [ + "CLBLM_FAN0", + "FAN_L0" + ], + [ + "CLBLM_FAN1", + "FAN_L1" + ], + [ + "CLBLM_FAN2", + "FAN_L2" + ], + [ + "CLBLM_FAN3", + "FAN_L3" + ], + [ + "CLBLM_FAN4", + "FAN_L4" + ], + [ + "CLBLM_FAN5", + "FAN_L5" + ], + [ + "CLBLM_FAN6", + "FAN_L6" + ], + [ + "CLBLM_FAN7", + "FAN_L7" + ], + [ + "CLBLM_IMUX0", + "IMUX_L0" + ], + [ + "CLBLM_IMUX1", + "IMUX_L1" + ], + [ + "CLBLM_IMUX2", + "IMUX_L2" + ], + [ + "CLBLM_IMUX3", + "IMUX_L3" + ], + [ + "CLBLM_IMUX4", + "IMUX_L4" + ], + [ + "CLBLM_IMUX5", + "IMUX_L5" + ], + [ + "CLBLM_IMUX6", + "IMUX_L6" + ], + [ + "CLBLM_IMUX7", + "IMUX_L7" + ], + [ + "CLBLM_IMUX8", + "IMUX_L8" + ], + [ + "CLBLM_IMUX9", + "IMUX_L9" + ], + [ + "CLBLM_IMUX10", + "IMUX_L10" + ], + [ + "CLBLM_IMUX11", + "IMUX_L11" + ], + [ + "CLBLM_IMUX12", + "IMUX_L12" + ], + [ + "CLBLM_IMUX13", + "IMUX_L13" + ], + [ + "CLBLM_IMUX14", + "IMUX_L14" + ], + [ + "CLBLM_IMUX15", + "IMUX_L15" + ], + [ + "CLBLM_IMUX16", + "IMUX_L16" + ], + [ + "CLBLM_IMUX17", + "IMUX_L17" + ], + [ + "CLBLM_IMUX18", + "IMUX_L18" + ], + [ + "CLBLM_IMUX19", + "IMUX_L19" + ], + [ + "CLBLM_IMUX20", + "IMUX_L20" + ], + [ + "CLBLM_IMUX21", + "IMUX_L21" + ], + [ + "CLBLM_IMUX22", + "IMUX_L22" + ], + [ + "CLBLM_IMUX23", + "IMUX_L23" + ], + [ + "CLBLM_IMUX24", + "IMUX_L24" + ], + [ + "CLBLM_IMUX25", + "IMUX_L25" + ], + [ + "CLBLM_IMUX26", + "IMUX_L26" + ], + [ + "CLBLM_IMUX27", + "IMUX_L27" + ], + [ + "CLBLM_IMUX28", + "IMUX_L28" + ], + [ + "CLBLM_IMUX29", + "IMUX_L29" + ], + [ + "CLBLM_IMUX30", + "IMUX_L30" + ], + [ + "CLBLM_IMUX31", + "IMUX_L31" + ], + [ + "CLBLM_IMUX32", + "IMUX_L32" + ], + [ + "CLBLM_IMUX33", + "IMUX_L33" + ], + [ + "CLBLM_IMUX34", + "IMUX_L34" + ], + [ + "CLBLM_IMUX35", + "IMUX_L35" + ], + [ + "CLBLM_IMUX36", + "IMUX_L36" + ], + [ + "CLBLM_IMUX37", + "IMUX_L37" + ], + [ + "CLBLM_IMUX38", + "IMUX_L38" + ], + [ + "CLBLM_IMUX39", + "IMUX_L39" + ], + [ + "CLBLM_IMUX40", + "IMUX_L40" + ], + [ + "CLBLM_IMUX41", + "IMUX_L41" + ], + [ + "CLBLM_IMUX42", + "IMUX_L42" + ], + [ + "CLBLM_IMUX43", + "IMUX_L43" + ], + [ + "CLBLM_IMUX44", + "IMUX_L44" + ], + [ + "CLBLM_IMUX45", + "IMUX_L45" + ], + [ + "CLBLM_IMUX46", + "IMUX_L46" + ], + [ + "CLBLM_IMUX47", + "IMUX_L47" + ], + [ + "CLBLM_LH1", + "LH0" + ], + [ + "CLBLM_LH2", + "LH1" + ], + [ + "CLBLM_LH3", + "LH2" + ], + [ + "CLBLM_LH4", + "LH3" + ], + [ + "CLBLM_LH5", + "LH4" + ], + [ + "CLBLM_LH6", + "LH5" + ], + [ + "CLBLM_LH7", + "LH6" + ], + [ + "CLBLM_LH8", + "LH7" + ], + [ + "CLBLM_LH9", + "LH8" + ], + [ + "CLBLM_LH10", + "LH9" + ], + [ + "CLBLM_LH11", + "LH10" + ], + [ + "CLBLM_LH12", + "LH11" + ], + [ + "CLBLM_LOGIC_OUTS0", + "LOGIC_OUTS_L0" + ], + [ + "CLBLM_LOGIC_OUTS1", + "LOGIC_OUTS_L1" + ], + [ + "CLBLM_LOGIC_OUTS2", + "LOGIC_OUTS_L2" + ], + [ + "CLBLM_LOGIC_OUTS3", + "LOGIC_OUTS_L3" + ], + [ + "CLBLM_LOGIC_OUTS4", + "LOGIC_OUTS_L4" + ], + [ + "CLBLM_LOGIC_OUTS5", + "LOGIC_OUTS_L5" + ], + [ + "CLBLM_LOGIC_OUTS6", + "LOGIC_OUTS_L6" + ], + [ + "CLBLM_LOGIC_OUTS7", + "LOGIC_OUTS_L7" + ], + [ + "CLBLM_LOGIC_OUTS8", + "LOGIC_OUTS_L8" + ], + [ + "CLBLM_LOGIC_OUTS9", + "LOGIC_OUTS_L9" + ], + [ + "CLBLM_LOGIC_OUTS10", + "LOGIC_OUTS_L10" + ], + [ + "CLBLM_LOGIC_OUTS11", + "LOGIC_OUTS_L11" + ], + [ + "CLBLM_LOGIC_OUTS12", + "LOGIC_OUTS_L12" + ], + [ + "CLBLM_LOGIC_OUTS13", + "LOGIC_OUTS_L13" + ], + [ + "CLBLM_LOGIC_OUTS14", + "LOGIC_OUTS_L14" + ], + [ + "CLBLM_LOGIC_OUTS15", + "LOGIC_OUTS_L15" + ], + [ + "CLBLM_LOGIC_OUTS16", + "LOGIC_OUTS_L16" + ], + [ + "CLBLM_LOGIC_OUTS17", + "LOGIC_OUTS_L17" + ], + [ + "CLBLM_LOGIC_OUTS18", + "LOGIC_OUTS_L18" + ], + [ + "CLBLM_LOGIC_OUTS19", + "LOGIC_OUTS_L19" + ], + [ + "CLBLM_LOGIC_OUTS20", + "LOGIC_OUTS_L20" + ], + [ + "CLBLM_LOGIC_OUTS21", + "LOGIC_OUTS_L21" + ], + [ + "CLBLM_LOGIC_OUTS22", + "LOGIC_OUTS_L22" + ], + [ + "CLBLM_LOGIC_OUTS23", + "LOGIC_OUTS_L23" + ], + [ + "CLBLM_MONITOR_N", + "MONITOR_N" + ], + [ + "CLBLM_MONITOR_P", + "MONITOR_P" + ], + [ + "CLBLM_NE2A0", + "NE2END0" + ], + [ + "CLBLM_NE2A1", + "NE2END1" + ], + [ + "CLBLM_NE2A2", + "NE2END2" + ], + [ + "CLBLM_NE2A3", + "NE2END3" + ], + [ + "CLBLM_NE4BEG0", + "NE6A0" + ], + [ + "CLBLM_NE4BEG1", + "NE6A1" + ], + [ + "CLBLM_NE4BEG2", + "NE6A2" + ], + [ + "CLBLM_NE4BEG3", + "NE6A3" + ], + [ + "CLBLM_NE4C0", + "NE6END0" + ], + [ + "CLBLM_NE4C1", + "NE6END1" + ], + [ + "CLBLM_NE4C2", + "NE6END2" + ], + [ + "CLBLM_NE4C3", + "NE6END3" + ], + [ + "CLBLM_NW2A0", + "NW2A0" + ], + [ + "CLBLM_NW2A1", + "NW2A1" + ], + [ + "CLBLM_NW2A2", + "NW2A2" + ], + [ + "CLBLM_NW2A3", + "NW2A3" + ], + [ + "CLBLM_NW4A0", + "NW6BEG0" + ], + [ + "CLBLM_NW4A1", + "NW6BEG1" + ], + [ + "CLBLM_NW4A2", + "NW6BEG2" + ], + [ + "CLBLM_NW4A3", + "NW6BEG3" + ], + [ + "CLBLM_NW4END0", + "NW6E0" + ], + [ + "CLBLM_NW4END1", + "NW6E1" + ], + [ + "CLBLM_NW4END2", + "NW6E2" + ], + [ + "CLBLM_NW4END3", + "NW6E3" + ], + [ + "CLBLM_SE2A0", + "SE2END0" + ], + [ + "CLBLM_SE2A1", + "SE2END1" + ], + [ + "CLBLM_SE2A2", + "SE2END2" + ], + [ + "CLBLM_SE2A3", + "SE2END3" + ], + [ + "CLBLM_SE4BEG0", + "SE6A0" + ], + [ + "CLBLM_SE4BEG1", + "SE6A1" + ], + [ + "CLBLM_SE4BEG2", + "SE6A2" + ], + [ + "CLBLM_SE4BEG3", + "SE6A3" + ], + [ + "CLBLM_SE4C0", + "SE6END0" + ], + [ + "CLBLM_SE4C1", + "SE6END1" + ], + [ + "CLBLM_SE4C2", + "SE6END2" + ], + [ + "CLBLM_SE4C3", + "SE6END3" + ], + [ + "CLBLM_SW2A0", + "SW2A0" + ], + [ + "CLBLM_SW2A1", + "SW2A1" + ], + [ + "CLBLM_SW2A2", + "SW2A2" + ], + [ + "CLBLM_SW2A3", + "SW2A3" + ], + [ + "CLBLM_SW4A0", + "SW6BEG0" + ], + [ + "CLBLM_SW4A1", + "SW6BEG1" + ], + [ + "CLBLM_SW4A2", + "SW6BEG2" + ], + [ + "CLBLM_SW4A3", + "SW6BEG3" + ], + [ + "CLBLM_SW4END0", + "SW6E0" + ], + [ + "CLBLM_SW4END1", + "SW6E1" + ], + [ + "CLBLM_SW4END2", + "SW6E2" + ], + [ + "CLBLM_SW4END3", + "SW6E3" + ], + [ + "CLBLM_WL1END0", + "WL1BEG0" + ], + [ + "CLBLM_WL1END1", + "WL1BEG1" + ], + [ + "CLBLM_WL1END2", + "WL1BEG2" + ], + [ + "CLBLM_WL1END3", + "WL1BEG3" + ], + [ + "CLBLM_WR1END0", + "WR1BEG0" + ], + [ + "CLBLM_WR1END1", + "WR1BEG1" + ], + [ + "CLBLM_WR1END2", + "WR1BEG2" + ], + [ + "CLBLM_WR1END3", + "WR1BEG3" + ], + [ + "CLBLM_WW2A0", + "WW2BEG0" + ], + [ + "CLBLM_WW2A1", + "WW2BEG1" + ], + [ + "CLBLM_WW2A2", + "WW2BEG2" + ], + [ + "CLBLM_WW2A3", + "WW2BEG3" + ], + [ + "CLBLM_WW2END0", + "WW2A0" + ], + [ + "CLBLM_WW2END1", + "WW2A1" + ], + [ + "CLBLM_WW2END2", + "WW2A2" + ], + [ + "CLBLM_WW2END3", + "WW2A3" + ], + [ + "CLBLM_WW4A0", + "WW4BEG0" + ], + [ + "CLBLM_WW4A1", + "WW4BEG1" + ], + [ + "CLBLM_WW4A2", + "WW4BEG2" + ], + [ + "CLBLM_WW4A3", + "WW4BEG3" + ], + [ + "CLBLM_WW4B0", + "WW4A0" + ], + [ + "CLBLM_WW4B1", + "WW4A1" + ], + [ + "CLBLM_WW4B2", + "WW4A2" + ], + [ + "CLBLM_WW4B3", + "WW4A3" + ], + [ + "CLBLM_WW4C0", + "WW4B0" + ], + [ + "CLBLM_WW4C1", + "WW4B1" + ], + [ + "CLBLM_WW4C2", + "WW4B2" + ], + [ + "CLBLM_WW4C3", + "WW4B3" + ], + [ + "CLBLM_WW4END0", + "WW4C0" + ], + [ + "CLBLM_WW4END1", + "WW4C1" + ], + [ + "CLBLM_WW4END2", + "WW4C2" + ], + [ + "CLBLM_WW4END3", + "WW4C3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLM_L", + "VBRK" + ], + "wire_pairs": [ + [ + "CLBLM_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLBLM_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLBLM_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLBLM_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLBLM_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLBLM_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLBLM_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLBLM_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLBLM_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLBLM_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLBLM_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLBLM_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLBLM_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLBLM_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLBLM_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLBLM_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLBLM_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLBLM_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLBLM_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLBLM_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLBLM_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLBLM_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLBLM_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLBLM_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLBLM_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLBLM_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLBLM_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLBLM_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLBLM_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLBLM_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLBLM_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLBLM_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLBLM_LH1", + "VBRK_LH1" + ], + [ + "CLBLM_LH2", + "VBRK_LH2" + ], + [ + "CLBLM_LH3", + "VBRK_LH3" + ], + [ + "CLBLM_LH4", + "VBRK_LH4" + ], + [ + "CLBLM_LH5", + "VBRK_LH5" + ], + [ + "CLBLM_LH6", + "VBRK_LH6" + ], + [ + "CLBLM_LH7", + "VBRK_LH7" + ], + [ + "CLBLM_LH8", + "VBRK_LH8" + ], + [ + "CLBLM_LH9", + "VBRK_LH9" + ], + [ + "CLBLM_LH10", + "VBRK_LH10" + ], + [ + "CLBLM_LH11", + "VBRK_LH11" + ], + [ + "CLBLM_LH12", + "VBRK_LH12" + ], + [ + "CLBLM_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLBLM_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLBLM_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLBLM_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLBLM_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLBLM_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLBLM_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLBLM_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLBLM_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLBLM_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLBLM_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLBLM_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLBLM_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLBLM_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLBLM_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLBLM_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLBLM_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLBLM_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLBLM_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLBLM_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLBLM_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLBLM_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLBLM_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLBLM_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLBLM_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLBLM_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLBLM_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLBLM_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLBLM_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLBLM_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLBLM_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLBLM_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLBLM_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLBLM_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLBLM_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLBLM_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLBLM_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLBLM_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLBLM_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLBLM_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLBLM_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLBLM_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLBLM_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLBLM_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLBLM_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLBLM_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLBLM_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLBLM_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLBLM_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLBLM_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLBLM_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLBLM_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLBLM_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLBLM_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLBLM_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLBLM_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLBLM_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLBLM_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLBLM_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLBLM_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLBLM_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLBLM_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLBLM_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLBLM_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLBLM_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLBLM_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLBLM_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLBLM_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLBLM_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLBLM_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLBLM_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLBLM_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLBLM_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLBLM_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLBLM_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLBLM_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLBLM_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLBLM_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLBLM_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLBLM_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLBLM_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLBLM_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLM_R", + "CLBLM_R" + ], + "wire_pairs": [ + [ + "CLBLM_L_CIN", + "CLBLM_L_COUT_N" + ], + [ + "CLBLM_M_CIN", + "CLBLM_M_COUT_N" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLBLM_R", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLM_L_COUT_N", + "HCLK_CLB_COUT0_R" + ], + [ + "CLBLM_M_COUT_N", + "HCLK_CLB_COUT1_R" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLBLM_R", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "CLBLM_L_CIN", + "HCLK_CLB_COUT0_R" + ], + [ + "CLBLM_M_CIN", + "HCLK_CLB_COUT1_R" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLBLM_R", + "INT_R" + ], + "wire_pairs": [ + [ + "CLBLM_BYP0", + "BYP0" + ], + [ + "CLBLM_BYP1", + "BYP1" + ], + [ + "CLBLM_BYP2", + "BYP2" + ], + [ + "CLBLM_BYP3", + "BYP3" + ], + [ + "CLBLM_BYP4", + "BYP4" + ], + [ + "CLBLM_BYP5", + "BYP5" + ], + [ + "CLBLM_BYP6", + "BYP6" + ], + [ + "CLBLM_BYP7", + "BYP7" + ], + [ + "CLBLM_CLK0", + "CLK0" + ], + [ + "CLBLM_CLK1", + "CLK1" + ], + [ + "CLBLM_CTRL0", + "CTRL0" + ], + [ + "CLBLM_CTRL1", + "CTRL1" + ], + [ + "CLBLM_EE2A0", + "EE2A0" + ], + [ + "CLBLM_EE2A1", + "EE2A1" + ], + [ + "CLBLM_EE2A2", + "EE2A2" + ], + [ + "CLBLM_EE2A3", + "EE2A3" + ], + [ + "CLBLM_EE2BEG0", + "EE2BEG0" + ], + [ + "CLBLM_EE2BEG1", + "EE2BEG1" + ], + [ + "CLBLM_EE2BEG2", + "EE2BEG2" + ], + [ + "CLBLM_EE2BEG3", + "EE2BEG3" + ], + [ + "CLBLM_EE4A0", + "EE4A0" + ], + [ + "CLBLM_EE4A1", + "EE4A1" + ], + [ + "CLBLM_EE4A2", + "EE4A2" + ], + [ + "CLBLM_EE4A3", + "EE4A3" + ], + [ + "CLBLM_EE4B0", + "EE4B0" + ], + [ + "CLBLM_EE4B1", + "EE4B1" + ], + [ + "CLBLM_EE4B2", + "EE4B2" + ], + [ + "CLBLM_EE4B3", + "EE4B3" + ], + [ + "CLBLM_EE4BEG0", + "EE4BEG0" + ], + [ + "CLBLM_EE4BEG1", + "EE4BEG1" + ], + [ + "CLBLM_EE4BEG2", + "EE4BEG2" + ], + [ + "CLBLM_EE4BEG3", + "EE4BEG3" + ], + [ + "CLBLM_EE4C0", + "EE4C0" + ], + [ + "CLBLM_EE4C1", + "EE4C1" + ], + [ + "CLBLM_EE4C2", + "EE4C2" + ], + [ + "CLBLM_EE4C3", + "EE4C3" + ], + [ + "CLBLM_EL1BEG0", + "EL1BEG0" + ], + [ + "CLBLM_EL1BEG1", + "EL1BEG1" + ], + [ + "CLBLM_EL1BEG2", + "EL1BEG2" + ], + [ + "CLBLM_EL1BEG3", + "EL1BEG3" + ], + [ + "CLBLM_ER1BEG0", + "ER1BEG0" + ], + [ + "CLBLM_ER1BEG1", + "ER1BEG1" + ], + [ + "CLBLM_ER1BEG2", + "ER1BEG2" + ], + [ + "CLBLM_ER1BEG3", + "ER1BEG3" + ], + [ + "CLBLM_FAN0", + "FAN0" + ], + [ + "CLBLM_FAN1", + "FAN1" + ], + [ + "CLBLM_FAN2", + "FAN2" + ], + [ + "CLBLM_FAN3", + "FAN3" + ], + [ + "CLBLM_FAN4", + "FAN4" + ], + [ + "CLBLM_FAN5", + "FAN5" + ], + [ + "CLBLM_FAN6", + "FAN6" + ], + [ + "CLBLM_FAN7", + "FAN7" + ], + [ + "CLBLM_IMUX0", + "IMUX0" + ], + [ + "CLBLM_IMUX1", + "IMUX1" + ], + [ + "CLBLM_IMUX2", + "IMUX2" + ], + [ + "CLBLM_IMUX3", + "IMUX3" + ], + [ + "CLBLM_IMUX4", + "IMUX4" + ], + [ + "CLBLM_IMUX5", + "IMUX5" + ], + [ + "CLBLM_IMUX6", + "IMUX6" + ], + [ + "CLBLM_IMUX7", + "IMUX7" + ], + [ + "CLBLM_IMUX8", + "IMUX8" + ], + [ + "CLBLM_IMUX9", + "IMUX9" + ], + [ + "CLBLM_IMUX10", + "IMUX10" + ], + [ + "CLBLM_IMUX11", + "IMUX11" + ], + [ + "CLBLM_IMUX12", + "IMUX12" + ], + [ + "CLBLM_IMUX13", + "IMUX13" + ], + [ + "CLBLM_IMUX14", + "IMUX14" + ], + [ + "CLBLM_IMUX15", + "IMUX15" + ], + [ + "CLBLM_IMUX16", + "IMUX16" + ], + [ + "CLBLM_IMUX17", + "IMUX17" + ], + [ + "CLBLM_IMUX18", + "IMUX18" + ], + [ + "CLBLM_IMUX19", + "IMUX19" + ], + [ + "CLBLM_IMUX20", + "IMUX20" + ], + [ + "CLBLM_IMUX21", + "IMUX21" + ], + [ + "CLBLM_IMUX22", + "IMUX22" + ], + [ + "CLBLM_IMUX23", + "IMUX23" + ], + [ + "CLBLM_IMUX24", + "IMUX24" + ], + [ + "CLBLM_IMUX25", + "IMUX25" + ], + [ + "CLBLM_IMUX26", + "IMUX26" + ], + [ + "CLBLM_IMUX27", + "IMUX27" + ], + [ + "CLBLM_IMUX28", + "IMUX28" + ], + [ + "CLBLM_IMUX29", + "IMUX29" + ], + [ + "CLBLM_IMUX30", + "IMUX30" + ], + [ + "CLBLM_IMUX31", + "IMUX31" + ], + [ + "CLBLM_IMUX32", + "IMUX32" + ], + [ + "CLBLM_IMUX33", + "IMUX33" + ], + [ + "CLBLM_IMUX34", + "IMUX34" + ], + [ + "CLBLM_IMUX35", + "IMUX35" + ], + [ + "CLBLM_IMUX36", + "IMUX36" + ], + [ + "CLBLM_IMUX37", + "IMUX37" + ], + [ + "CLBLM_IMUX38", + "IMUX38" + ], + [ + "CLBLM_IMUX39", + "IMUX39" + ], + [ + "CLBLM_IMUX40", + "IMUX40" + ], + [ + "CLBLM_IMUX41", + "IMUX41" + ], + [ + "CLBLM_IMUX42", + "IMUX42" + ], + [ + "CLBLM_IMUX43", + "IMUX43" + ], + [ + "CLBLM_IMUX44", + "IMUX44" + ], + [ + "CLBLM_IMUX45", + "IMUX45" + ], + [ + "CLBLM_IMUX46", + "IMUX46" + ], + [ + "CLBLM_IMUX47", + "IMUX47" + ], + [ + "CLBLM_LH1", + "LH1" + ], + [ + "CLBLM_LH2", + "LH2" + ], + [ + "CLBLM_LH3", + "LH3" + ], + [ + "CLBLM_LH4", + "LH4" + ], + [ + "CLBLM_LH5", + "LH5" + ], + [ + "CLBLM_LH6", + "LH6" + ], + [ + "CLBLM_LH7", + "LH7" + ], + [ + "CLBLM_LH8", + "LH8" + ], + [ + "CLBLM_LH9", + "LH9" + ], + [ + "CLBLM_LH10", + "LH10" + ], + [ + "CLBLM_LH11", + "LH11" + ], + [ + "CLBLM_LH12", + "LH12" + ], + [ + "CLBLM_LOGIC_OUTS0", + "LOGIC_OUTS0" + ], + [ + "CLBLM_LOGIC_OUTS1", + "LOGIC_OUTS1" + ], + [ + "CLBLM_LOGIC_OUTS2", + "LOGIC_OUTS2" + ], + [ + "CLBLM_LOGIC_OUTS3", + "LOGIC_OUTS3" + ], + [ + "CLBLM_LOGIC_OUTS4", + "LOGIC_OUTS4" + ], + [ + "CLBLM_LOGIC_OUTS5", + "LOGIC_OUTS5" + ], + [ + "CLBLM_LOGIC_OUTS6", + "LOGIC_OUTS6" + ], + [ + "CLBLM_LOGIC_OUTS7", + "LOGIC_OUTS7" + ], + [ + "CLBLM_LOGIC_OUTS8", + "LOGIC_OUTS8" + ], + [ + "CLBLM_LOGIC_OUTS9", + "LOGIC_OUTS9" + ], + [ + "CLBLM_LOGIC_OUTS10", + "LOGIC_OUTS10" + ], + [ + "CLBLM_LOGIC_OUTS11", + "LOGIC_OUTS11" + ], + [ + "CLBLM_LOGIC_OUTS12", + "LOGIC_OUTS12" + ], + [ + "CLBLM_LOGIC_OUTS13", + "LOGIC_OUTS13" + ], + [ + "CLBLM_LOGIC_OUTS14", + "LOGIC_OUTS14" + ], + [ + "CLBLM_LOGIC_OUTS15", + "LOGIC_OUTS15" + ], + [ + "CLBLM_LOGIC_OUTS16", + "LOGIC_OUTS16" + ], + [ + "CLBLM_LOGIC_OUTS17", + "LOGIC_OUTS17" + ], + [ + "CLBLM_LOGIC_OUTS18", + "LOGIC_OUTS18" + ], + [ + "CLBLM_LOGIC_OUTS19", + "LOGIC_OUTS19" + ], + [ + "CLBLM_LOGIC_OUTS20", + "LOGIC_OUTS20" + ], + [ + "CLBLM_LOGIC_OUTS21", + "LOGIC_OUTS21" + ], + [ + "CLBLM_LOGIC_OUTS22", + "LOGIC_OUTS22" + ], + [ + "CLBLM_LOGIC_OUTS23", + "LOGIC_OUTS23" + ], + [ + "CLBLM_MONITOR_N", + "MONITOR_N" + ], + [ + "CLBLM_MONITOR_P", + "MONITOR_P" + ], + [ + "CLBLM_NE2A0", + "NE2A0" + ], + [ + "CLBLM_NE2A1", + "NE2A1" + ], + [ + "CLBLM_NE2A2", + "NE2A2" + ], + [ + "CLBLM_NE2A3", + "NE2A3" + ], + [ + "CLBLM_NE4BEG0", + "NE6BEG0" + ], + [ + "CLBLM_NE4BEG1", + "NE6BEG1" + ], + [ + "CLBLM_NE4BEG2", + "NE6BEG2" + ], + [ + "CLBLM_NE4BEG3", + "NE6BEG3" + ], + [ + "CLBLM_NE4C0", + "NE6E0" + ], + [ + "CLBLM_NE4C1", + "NE6E1" + ], + [ + "CLBLM_NE4C2", + "NE6E2" + ], + [ + "CLBLM_NE4C3", + "NE6E3" + ], + [ + "CLBLM_NW2A0", + "NW2END0" + ], + [ + "CLBLM_NW2A1", + "NW2END1" + ], + [ + "CLBLM_NW2A2", + "NW2END2" + ], + [ + "CLBLM_NW2A3", + "NW2END3" + ], + [ + "CLBLM_NW4A0", + "NW6A0" + ], + [ + "CLBLM_NW4A1", + "NW6A1" + ], + [ + "CLBLM_NW4A2", + "NW6A2" + ], + [ + "CLBLM_NW4A3", + "NW6A3" + ], + [ + "CLBLM_NW4END0", + "NW6END0" + ], + [ + "CLBLM_NW4END1", + "NW6END1" + ], + [ + "CLBLM_NW4END2", + "NW6END2" + ], + [ + "CLBLM_NW4END3", + "NW6END3" + ], + [ + "CLBLM_SE2A0", + "SE2A0" + ], + [ + "CLBLM_SE2A1", + "SE2A1" + ], + [ + "CLBLM_SE2A2", + "SE2A2" + ], + [ + "CLBLM_SE2A3", + "SE2A3" + ], + [ + "CLBLM_SE4BEG0", + "SE6BEG0" + ], + [ + "CLBLM_SE4BEG1", + "SE6BEG1" + ], + [ + "CLBLM_SE4BEG2", + "SE6BEG2" + ], + [ + "CLBLM_SE4BEG3", + "SE6BEG3" + ], + [ + "CLBLM_SE4C0", + "SE6E0" + ], + [ + "CLBLM_SE4C1", + "SE6E1" + ], + [ + "CLBLM_SE4C2", + "SE6E2" + ], + [ + "CLBLM_SE4C3", + "SE6E3" + ], + [ + "CLBLM_SW2A0", + "SW2END0" + ], + [ + "CLBLM_SW2A1", + "SW2END1" + ], + [ + "CLBLM_SW2A2", + "SW2END2" + ], + [ + "CLBLM_SW2A3", + "SW2END3" + ], + [ + "CLBLM_SW4A0", + "SW6A0" + ], + [ + "CLBLM_SW4A1", + "SW6A1" + ], + [ + "CLBLM_SW4A2", + "SW6A2" + ], + [ + "CLBLM_SW4A3", + "SW6A3" + ], + [ + "CLBLM_SW4END0", + "SW6END0" + ], + [ + "CLBLM_SW4END1", + "SW6END1" + ], + [ + "CLBLM_SW4END2", + "SW6END2" + ], + [ + "CLBLM_SW4END3", + "SW6END3" + ], + [ + "CLBLM_WL1END0", + "WL1END0" + ], + [ + "CLBLM_WL1END1", + "WL1END1" + ], + [ + "CLBLM_WL1END2", + "WL1END2" + ], + [ + "CLBLM_WL1END3", + "WL1END3" + ], + [ + "CLBLM_WR1END0", + "WR1END0" + ], + [ + "CLBLM_WR1END1", + "WR1END1" + ], + [ + "CLBLM_WR1END2", + "WR1END2" + ], + [ + "CLBLM_WR1END3", + "WR1END3" + ], + [ + "CLBLM_WW2A0", + "WW2A0" + ], + [ + "CLBLM_WW2A1", + "WW2A1" + ], + [ + "CLBLM_WW2A2", + "WW2A2" + ], + [ + "CLBLM_WW2A3", + "WW2A3" + ], + [ + "CLBLM_WW2END0", + "WW2END0" + ], + [ + "CLBLM_WW2END1", + "WW2END1" + ], + [ + "CLBLM_WW2END2", + "WW2END2" + ], + [ + "CLBLM_WW2END3", + "WW2END3" + ], + [ + "CLBLM_WW4A0", + "WW4A0" + ], + [ + "CLBLM_WW4A1", + "WW4A1" + ], + [ + "CLBLM_WW4A2", + "WW4A2" + ], + [ + "CLBLM_WW4A3", + "WW4A3" + ], + [ + "CLBLM_WW4B0", + "WW4B0" + ], + [ + "CLBLM_WW4B1", + "WW4B1" + ], + [ + "CLBLM_WW4B2", + "WW4B2" + ], + [ + "CLBLM_WW4B3", + "WW4B3" + ], + [ + "CLBLM_WW4C0", + "WW4C0" + ], + [ + "CLBLM_WW4C1", + "WW4C1" + ], + [ + "CLBLM_WW4C2", + "WW4C2" + ], + [ + "CLBLM_WW4C3", + "WW4C3" + ], + [ + "CLBLM_WW4END0", + "WW4END0" + ], + [ + "CLBLM_WW4END1", + "WW4END1" + ], + [ + "CLBLM_WW4END2", + "WW4END2" + ], + [ + "CLBLM_WW4END3", + "WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLBLM_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLBLM_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLBLM_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLBLM_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLBLM_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLBLM_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLBLM_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLBLM_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLBLM_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLBLM_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLBLM_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLBLM_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLBLM_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLBLM_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLBLM_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLBLM_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLBLM_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLBLM_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLBLM_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLBLM_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLBLM_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLBLM_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLBLM_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLBLM_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLBLM_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLBLM_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLBLM_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLBLM_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLBLM_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLBLM_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLBLM_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLBLM_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLBLM_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLBLM_LH1", + "VBRK_LH1" + ], + [ + "CLBLM_LH2", + "VBRK_LH2" + ], + [ + "CLBLM_LH3", + "VBRK_LH3" + ], + [ + "CLBLM_LH4", + "VBRK_LH4" + ], + [ + "CLBLM_LH5", + "VBRK_LH5" + ], + [ + "CLBLM_LH6", + "VBRK_LH6" + ], + [ + "CLBLM_LH7", + "VBRK_LH7" + ], + [ + "CLBLM_LH8", + "VBRK_LH8" + ], + [ + "CLBLM_LH9", + "VBRK_LH9" + ], + [ + "CLBLM_LH10", + "VBRK_LH10" + ], + [ + "CLBLM_LH11", + "VBRK_LH11" + ], + [ + "CLBLM_LH12", + "VBRK_LH12" + ], + [ + "CLBLM_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLBLM_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLBLM_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLBLM_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLBLM_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLBLM_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLBLM_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLBLM_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLBLM_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLBLM_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLBLM_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLBLM_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLBLM_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLBLM_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLBLM_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLBLM_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLBLM_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLBLM_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLBLM_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLBLM_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLBLM_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLBLM_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLBLM_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLBLM_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLBLM_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLBLM_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLBLM_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLBLM_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLBLM_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLBLM_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLBLM_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLBLM_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLBLM_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLBLM_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLBLM_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLBLM_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLBLM_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLBLM_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLBLM_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLBLM_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLBLM_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLBLM_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLBLM_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLBLM_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLBLM_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLBLM_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLBLM_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLBLM_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLBLM_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLBLM_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLBLM_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLBLM_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLBLM_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLBLM_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLBLM_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLBLM_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLBLM_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLBLM_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLBLM_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLBLM_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLBLM_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLBLM_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLBLM_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLBLM_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLBLM_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLBLM_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLBLM_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLBLM_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLBLM_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLBLM_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLBLM_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLBLM_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLBLM_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLBLM_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLBLM_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLBLM_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLBLM_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLBLM_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLBLM_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLBLM_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLBLM_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLBLM_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "CLK_MTBF2" + ], + "wire_pairs": [ + [ + "CLK_BUFG_BOT_R_CK_MUXED0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_BUFG_BOT_R_CK_MUXED31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_BUFG_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_BUFG_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_BUFG_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_BUFG_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_BUFG_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_BUFG_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_BUFG_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_BUFG_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_BUFG_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_BUFG_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_BUFG_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_BUFG_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_BUFG_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_BUFG_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_BUFG_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_BUFG_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_BUFG_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_BUFG_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_BUFG_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_BUFG_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_BUFG_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_BUFG_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_BUFG_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_BUFG_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_BUFG_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_BUFG_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_BUFG_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_BUFG_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_BUFG_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_BUFG_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_BUFG_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_BUFG_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_3", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_3", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_3", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_3", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_3", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_3", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_3", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_3", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_2", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_2", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_2", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_2", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_2", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_2", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_2", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_2", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_1", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_1", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_1", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_1", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_1", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_1", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_1", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_1", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_0", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_0", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_0", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_0", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_0", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_3", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_3", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_3", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_3", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_3", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_3", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_3", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_3", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_3", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_3", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_3", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_3", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_2", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_2", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_2", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_2", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_2", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_2", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_2", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_2", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_2", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_2", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_2", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_2", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_1", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_1", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_1", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_1", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_1", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_1", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_1", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_1", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_1", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_1", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_1", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_1", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_BUFG_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_0", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_0", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_0", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_0", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_0", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_0", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_0", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_0", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_0", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_0", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_0", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_0", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "CLK_BUFG_REBUF", + "CLK_FEED" + ], + "wire_pairs": [ + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK0_TOP", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK1_TOP", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK2_TOP", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK3_TOP", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK4_TOP", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK5_TOP", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK6_TOP", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK7_TOP", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK8_TOP", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK9_TOP", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK10_TOP", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK11_TOP", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK12_TOP", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK13_TOP", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK14_TOP", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK15_TOP", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK16_TOP", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK17_TOP", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK18_TOP", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK19_TOP", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK20_TOP", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK21_TOP", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK22_TOP", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK23_TOP", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK24_TOP", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK25_TOP", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK26_TOP", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK27_TOP", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK28_TOP", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK29_TOP", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK30_TOP", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK31_TOP", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_BUFG_REBUF", + "CLK_FEED" + ], + "wire_pairs": [ + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_BUFG_REBUF_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK0_BOT", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK1_BOT", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK2_BOT", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK3_BOT", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK4_BOT", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK5_BOT", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK6_BOT", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK7_BOT", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK8_BOT", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK9_BOT", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK10_BOT", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK11_BOT", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK12_BOT", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK13_BOT", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK14_BOT", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK15_BOT", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK16_BOT", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK17_BOT", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK18_BOT", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK19_BOT", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK20_BOT", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK21_BOT", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK22_BOT", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK23_BOT", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK24_BOT", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK25_BOT", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK26_BOT", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK27_BOT", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK28_BOT", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK29_BOT", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK30_BOT", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_BUFG_REBUF_R_CK_GCLK31_BOT", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CLK_BUFG_REBUF", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_REBUF_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_BUFG_REBUF_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_BUFG_REBUF_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_BUFG_REBUF_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_BUFG_REBUF_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_BUFG_REBUF_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_BUFG_REBUF_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_BUFG_REBUF_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_BUFG_REBUF_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_BUFG_REBUF_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_BUFG_REBUF_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_BUFG_REBUF_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_BUFG_REBUF_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_BUFG_REBUF_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_BUFG_REBUF_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_BUFG_REBUF_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_BUFG_REBUF_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_BUFG_REBUF_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_BUFG_REBUF_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_BUFG_REBUF_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_BUFG_REBUF_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_BUFG_REBUF_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_BUFG_REBUF_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_BUFG_REBUF_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_BUFG_REBUF_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_BUFG_REBUF_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_BUFG_REBUF_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_BUFG_REBUF_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_BUFG_REBUF_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_BUFG_REBUF_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_BUFG_REBUF_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_BUFG_REBUF_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CLK_BUFG_REBUF_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CLK_BUFG_REBUF_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CLK_BUFG_REBUF_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CLK_BUFG_REBUF_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CLK_BUFG_REBUF_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CLK_BUFG_REBUF_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CLK_BUFG_REBUF_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CLK_BUFG_REBUF_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CLK_BUFG_REBUF_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CLK_BUFG_REBUF_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CLK_BUFG_REBUF_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_BUFG_REBUF_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_BUFG_REBUF_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_BUFG_REBUF_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_BUFG_REBUF_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_BUFG_REBUF_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_BUFG_REBUF_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_BUFG_REBUF_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_BUFG_REBUF_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_BUFG_REBUF_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_BUFG_REBUF_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_BUFG_REBUF_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_BUFG_REBUF_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_BUFG_REBUF_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_BUFG_REBUF_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_BUFG_REBUF_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_BUFG_REBUF_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_BUFG_REBUF_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_BUFG_REBUF_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_BUFG_REBUF_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_BUFG_REBUF_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_BUFG_REBUF_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_BUFG_REBUF_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_BUFG_REBUF_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_BUFG_REBUF_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_BUFG_REBUF_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_BUFG_REBUF_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_BUFG_REBUF_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_BUFG_REBUF_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_BUFG_REBUF_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_BUFG_REBUF_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_BUFG_REBUF_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_BUFG_REBUF_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_BUFG_REBUF_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_BUFG_REBUF_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_BUFG_REBUF_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_BUFG_REBUF_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_BUFG_REBUF_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_BUFG_REBUF_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_BUFG_REBUF_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_BUFG_REBUF_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_BUFG_REBUF_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_BUFG_REBUF_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_BUFG_REBUF_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_BUFG_REBUF_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_BUFG_REBUF_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_BUFG_REBUF_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_BUFG_REBUF_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_BUFG_REBUF_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_BUFG_REBUF_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_BUFG_REBUF_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_BUFG_REBUF_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_BUFG_REBUF_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_BUFG_REBUF_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_BUFG_REBUF_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_BUFG_REBUF_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_BUFG_REBUF_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_BUFG_REBUF_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_BUFG_REBUF_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_BUFG_REBUF_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_BUFG_REBUF_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_BUFG_REBUF_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_BUFG_REBUF_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_BUFG_REBUF_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_BUFG_REBUF_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_BUFG_REBUF_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_BUFG_REBUF_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_BUFG_REBUF_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_BUFG_REBUF_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_BUFG_REBUF_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_BUFG_REBUF_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_BUFG_REBUF_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_BUFG_REBUF_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_BUFG_REBUF_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_BUFG_REBUF_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_BUFG_REBUF_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_BUFG_REBUF_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_BUFG_REBUF_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_BUFG_REBUF_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_BUFG_REBUF_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_BUFG_REBUF_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_BUFG_REBUF_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_BUFG_REBUF", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_REBUF_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_BUFG_REBUF_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_BUFG_REBUF_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_BUFG_REBUF_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_BUFG_REBUF_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_BUFG_REBUF_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_BUFG_REBUF_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_BUFG_REBUF_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_BUFG_REBUF_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_BUFG_REBUF_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_BUFG_REBUF_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_BUFG_REBUF_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_BUFG_REBUF_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_BUFG_REBUF_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_BUFG_REBUF_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_BUFG_REBUF_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_BUFG_REBUF_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_BUFG_REBUF_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_BUFG_REBUF_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_BUFG_REBUF_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_BUFG_REBUF_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_BUFG_REBUF_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_BUFG_REBUF_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_BUFG_REBUF_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_BUFG_REBUF_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_BUFG_REBUF_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_BUFG_REBUF_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_BUFG_REBUF_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_BUFG_REBUF_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_BUFG_REBUF_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_BUFG_REBUF_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CLK_BUFG_REBUF_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CLK_BUFG_REBUF_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CLK_BUFG_REBUF_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CLK_BUFG_REBUF_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CLK_BUFG_REBUF_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CLK_BUFG_REBUF_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CLK_BUFG_REBUF_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CLK_BUFG_REBUF_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CLK_BUFG_REBUF_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CLK_BUFG_REBUF_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CLK_BUFG_REBUF_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CLK_BUFG_REBUF_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_BUFG_REBUF_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_BUFG_REBUF_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_BUFG_REBUF_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_BUFG_REBUF_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_BUFG_REBUF_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_BUFG_REBUF_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_BUFG_REBUF_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_BUFG_REBUF_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_BUFG_REBUF_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_BUFG_REBUF_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_BUFG_REBUF_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_BUFG_REBUF_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_BUFG_REBUF_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_BUFG_REBUF_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_BUFG_REBUF_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_BUFG_REBUF_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_BUFG_REBUF_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_BUFG_REBUF_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_BUFG_REBUF_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_BUFG_REBUF_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_BUFG_REBUF_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_BUFG_REBUF_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_BUFG_REBUF_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_BUFG_REBUF_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_BUFG_REBUF_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_BUFG_REBUF_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_BUFG_REBUF_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_BUFG_REBUF_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_BUFG_REBUF_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_BUFG_REBUF_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_BUFG_REBUF_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_BUFG_REBUF_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_BUFG_REBUF_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_BUFG_REBUF_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_BUFG_REBUF_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_BUFG_REBUF_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_BUFG_REBUF_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_BUFG_REBUF_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_BUFG_REBUF_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_BUFG_REBUF_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_BUFG_REBUF_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_BUFG_REBUF_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_BUFG_REBUF_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_BUFG_REBUF_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_BUFG_REBUF_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_BUFG_REBUF_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_BUFG_REBUF_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_BUFG_REBUF_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_BUFG_REBUF_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_BUFG_REBUF_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_BUFG_REBUF_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_BUFG_REBUF_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_BUFG_REBUF_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_BUFG_REBUF_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_BUFG_REBUF_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_BUFG_REBUF_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_BUFG_REBUF_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_BUFG_REBUF_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_BUFG_REBUF_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_BUFG_REBUF_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_BUFG_REBUF_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_BUFG_REBUF_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_BUFG_REBUF_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_BUFG_REBUF_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_BUFG_REBUF_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_BUFG_REBUF_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_BUFG_REBUF_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_BUFG_REBUF_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_BUFG_REBUF_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_BUFG_REBUF_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_BUFG_REBUF_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_BUFG_REBUF_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_BUFG_REBUF_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_BUFG_REBUF_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_BUFG_REBUF_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_BUFG_REBUF_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_BUFG_REBUF_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_BUFG_REBUF_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_BUFG_REBUF_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CLK_BUFG_REBUF", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_BUFG_REBUF_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CLK_BUFG_REBUF_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CLK_BUFG_REBUF_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CLK_BUFG_REBUF_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CLK_BUFG_REBUF_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CLK_BUFG_REBUF_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CLK_BUFG_REBUF_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CLK_BUFG_REBUF_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CLK_BUFG_REBUF_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CLK_BUFG_REBUF_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CLK_BUFG_REBUF_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CLK_BUFG_REBUF_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CLK_BUFG_REBUF_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CLK_BUFG_REBUF_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CLK_BUFG_REBUF_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CLK_BUFG_REBUF_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CLK_BUFG_REBUF_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CLK_BUFG_REBUF_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CLK_BUFG_REBUF_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CLK_BUFG_REBUF_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CLK_BUFG_REBUF_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CLK_BUFG_REBUF_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CLK_BUFG_REBUF_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CLK_BUFG_REBUF_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CLK_BUFG_REBUF_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CLK_BUFG_REBUF_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CLK_BUFG_REBUF_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CLK_BUFG_REBUF_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CLK_BUFG_REBUF_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CLK_BUFG_REBUF_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CLK_BUFG_REBUF_LH1_1", + "VBRK_LH1" + ], + [ + "CLK_BUFG_REBUF_LH2_1", + "VBRK_LH2" + ], + [ + "CLK_BUFG_REBUF_LH3_1", + "VBRK_LH3" + ], + [ + "CLK_BUFG_REBUF_LH4_1", + "VBRK_LH4" + ], + [ + "CLK_BUFG_REBUF_LH5_1", + "VBRK_LH5" + ], + [ + "CLK_BUFG_REBUF_LH6_1", + "VBRK_LH6" + ], + [ + "CLK_BUFG_REBUF_LH7_1", + "VBRK_LH7" + ], + [ + "CLK_BUFG_REBUF_LH8_1", + "VBRK_LH8" + ], + [ + "CLK_BUFG_REBUF_LH9_1", + "VBRK_LH9" + ], + [ + "CLK_BUFG_REBUF_LH10_1", + "VBRK_LH10" + ], + [ + "CLK_BUFG_REBUF_LH11_1", + "VBRK_LH11" + ], + [ + "CLK_BUFG_REBUF_LH12_1", + "VBRK_LH12" + ], + [ + "CLK_BUFG_REBUF_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CLK_BUFG_REBUF_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CLK_BUFG_REBUF_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CLK_BUFG_REBUF_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CLK_BUFG_REBUF_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CLK_BUFG_REBUF_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CLK_BUFG_REBUF_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CLK_BUFG_REBUF_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CLK_BUFG_REBUF_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CLK_BUFG_REBUF_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CLK_BUFG_REBUF_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CLK_BUFG_REBUF_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CLK_BUFG_REBUF_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CLK_BUFG_REBUF_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CLK_BUFG_REBUF_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CLK_BUFG_REBUF_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CLK_BUFG_REBUF_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CLK_BUFG_REBUF_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CLK_BUFG_REBUF_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CLK_BUFG_REBUF_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CLK_BUFG_REBUF_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CLK_BUFG_REBUF_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CLK_BUFG_REBUF_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CLK_BUFG_REBUF_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CLK_BUFG_REBUF_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CLK_BUFG_REBUF_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CLK_BUFG_REBUF_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CLK_BUFG_REBUF_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CLK_BUFG_REBUF_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CLK_BUFG_REBUF_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CLK_BUFG_REBUF_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CLK_BUFG_REBUF_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CLK_BUFG_REBUF_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CLK_BUFG_REBUF_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CLK_BUFG_REBUF_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CLK_BUFG_REBUF_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CLK_BUFG_REBUF_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CLK_BUFG_REBUF_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CLK_BUFG_REBUF_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CLK_BUFG_REBUF_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CLK_BUFG_REBUF_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CLK_BUFG_REBUF_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CLK_BUFG_REBUF_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CLK_BUFG_REBUF_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CLK_BUFG_REBUF_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CLK_BUFG_REBUF_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CLK_BUFG_REBUF_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CLK_BUFG_REBUF_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CLK_BUFG_REBUF_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CLK_BUFG_REBUF_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CLK_BUFG_REBUF_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CLK_BUFG_REBUF_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CLK_BUFG_REBUF_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CLK_BUFG_REBUF_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CLK_BUFG_REBUF_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CLK_BUFG_REBUF_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CLK_BUFG_REBUF_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CLK_BUFG_REBUF_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CLK_BUFG_REBUF_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CLK_BUFG_REBUF_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CLK_BUFG_REBUF_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CLK_BUFG_REBUF_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CLK_BUFG_REBUF_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CLK_BUFG_REBUF_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CLK_BUFG_REBUF_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CLK_BUFG_REBUF_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CLK_BUFG_REBUF_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CLK_BUFG_REBUF_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CLK_BUFG_REBUF_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CLK_BUFG_REBUF_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CLK_BUFG_REBUF_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CLK_BUFG_REBUF_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CLK_BUFG_REBUF_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CLK_BUFG_REBUF_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CLK_BUFG_REBUF_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CLK_BUFG_REBUF_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CLK_BUFG_REBUF_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CLK_BUFG_REBUF_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CLK_BUFG_REBUF_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CLK_BUFG_REBUF_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CLK_BUFG_REBUF_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CLK_BUFG_REBUF_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_BUFG_REBUF", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_BUFG_REBUF_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CLK_BUFG_REBUF_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CLK_BUFG_REBUF_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CLK_BUFG_REBUF_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CLK_BUFG_REBUF_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CLK_BUFG_REBUF_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CLK_BUFG_REBUF_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CLK_BUFG_REBUF_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CLK_BUFG_REBUF_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CLK_BUFG_REBUF_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CLK_BUFG_REBUF_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CLK_BUFG_REBUF_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CLK_BUFG_REBUF_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CLK_BUFG_REBUF_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CLK_BUFG_REBUF_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CLK_BUFG_REBUF_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CLK_BUFG_REBUF_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CLK_BUFG_REBUF_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CLK_BUFG_REBUF_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CLK_BUFG_REBUF_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CLK_BUFG_REBUF_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CLK_BUFG_REBUF_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CLK_BUFG_REBUF_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CLK_BUFG_REBUF_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CLK_BUFG_REBUF_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CLK_BUFG_REBUF_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CLK_BUFG_REBUF_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CLK_BUFG_REBUF_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CLK_BUFG_REBUF_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CLK_BUFG_REBUF_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CLK_BUFG_REBUF_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CLK_BUFG_REBUF_LH1_0", + "VBRK_LH1" + ], + [ + "CLK_BUFG_REBUF_LH2_0", + "VBRK_LH2" + ], + [ + "CLK_BUFG_REBUF_LH3_0", + "VBRK_LH3" + ], + [ + "CLK_BUFG_REBUF_LH4_0", + "VBRK_LH4" + ], + [ + "CLK_BUFG_REBUF_LH5_0", + "VBRK_LH5" + ], + [ + "CLK_BUFG_REBUF_LH6_0", + "VBRK_LH6" + ], + [ + "CLK_BUFG_REBUF_LH7_0", + "VBRK_LH7" + ], + [ + "CLK_BUFG_REBUF_LH8_0", + "VBRK_LH8" + ], + [ + "CLK_BUFG_REBUF_LH9_0", + "VBRK_LH9" + ], + [ + "CLK_BUFG_REBUF_LH10_0", + "VBRK_LH10" + ], + [ + "CLK_BUFG_REBUF_LH11_0", + "VBRK_LH11" + ], + [ + "CLK_BUFG_REBUF_LH12_0", + "VBRK_LH12" + ], + [ + "CLK_BUFG_REBUF_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CLK_BUFG_REBUF_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CLK_BUFG_REBUF_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CLK_BUFG_REBUF_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CLK_BUFG_REBUF_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CLK_BUFG_REBUF_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CLK_BUFG_REBUF_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CLK_BUFG_REBUF_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CLK_BUFG_REBUF_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CLK_BUFG_REBUF_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CLK_BUFG_REBUF_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CLK_BUFG_REBUF_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CLK_BUFG_REBUF_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CLK_BUFG_REBUF_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CLK_BUFG_REBUF_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CLK_BUFG_REBUF_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CLK_BUFG_REBUF_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CLK_BUFG_REBUF_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CLK_BUFG_REBUF_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CLK_BUFG_REBUF_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CLK_BUFG_REBUF_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CLK_BUFG_REBUF_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CLK_BUFG_REBUF_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CLK_BUFG_REBUF_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CLK_BUFG_REBUF_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CLK_BUFG_REBUF_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CLK_BUFG_REBUF_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CLK_BUFG_REBUF_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CLK_BUFG_REBUF_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CLK_BUFG_REBUF_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CLK_BUFG_REBUF_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CLK_BUFG_REBUF_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CLK_BUFG_REBUF_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CLK_BUFG_REBUF_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CLK_BUFG_REBUF_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CLK_BUFG_REBUF_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CLK_BUFG_REBUF_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CLK_BUFG_REBUF_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CLK_BUFG_REBUF_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CLK_BUFG_REBUF_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CLK_BUFG_REBUF_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CLK_BUFG_REBUF_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CLK_BUFG_REBUF_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CLK_BUFG_REBUF_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CLK_BUFG_REBUF_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CLK_BUFG_REBUF_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CLK_BUFG_REBUF_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CLK_BUFG_REBUF_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CLK_BUFG_REBUF_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CLK_BUFG_REBUF_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CLK_BUFG_REBUF_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CLK_BUFG_REBUF_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CLK_BUFG_REBUF_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CLK_BUFG_REBUF_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CLK_BUFG_REBUF_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CLK_BUFG_REBUF_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CLK_BUFG_REBUF_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CLK_BUFG_REBUF_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CLK_BUFG_REBUF_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CLK_BUFG_REBUF_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CLK_BUFG_REBUF_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CLK_BUFG_REBUF_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CLK_BUFG_REBUF_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CLK_BUFG_REBUF_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CLK_BUFG_REBUF_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CLK_BUFG_REBUF_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CLK_BUFG_REBUF_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CLK_BUFG_REBUF_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CLK_BUFG_REBUF_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CLK_BUFG_REBUF_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CLK_BUFG_REBUF_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CLK_BUFG_REBUF_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CLK_BUFG_REBUF_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CLK_BUFG_REBUF_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CLK_BUFG_REBUF_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CLK_BUFG_REBUF_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CLK_BUFG_REBUF_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CLK_BUFG_REBUF_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CLK_BUFG_REBUF_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CLK_BUFG_REBUF_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -4 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "CLK_FEED" + ], + "wire_pairs": [ + [ + "CLK_BUFG_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_BUFG_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_BUFG_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_BUFG_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_BUFG_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_BUFG_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_BUFG_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_BUFG_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_BUFG_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_BUFG_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_BUFG_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_BUFG_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_BUFG_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_BUFG_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_BUFG_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_BUFG_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_BUFG_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_BUFG_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_BUFG_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_BUFG_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_BUFG_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_BUFG_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_BUFG_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_BUFG_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_BUFG_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_BUFG_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_BUFG_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_BUFG_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_BUFG_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_BUFG_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_BUFG_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_BUFG_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_BUFG_TOP_R_CK_MUXED31", + "CLK_FEED_R_CK_BUFG_CASC31" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_3", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_3", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_3", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_3", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_3", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_3", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_3", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_3", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_3", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_3", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_2", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_2", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_2", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_2", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_2", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_2", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_2", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_2", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_1", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_1", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_1", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_1", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_1", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_1", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_1", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_1", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_BUFG_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_BUFG_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_BUFG_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_BUFG_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_BUFG_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_BUFG_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_BUFG_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_BUFG_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_BUFG_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_BUFG_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_BUFG_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_BUFG_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_BUFG_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_BUFG_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_BUFG_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_BUFG_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_BUFG_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_BUFG_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_BUFG_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_BUFG_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_BUFG_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_BUFG_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_BUFG_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_BUFG_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_BUFG_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_BUFG_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_BUFG_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_BUFG_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_BUFG_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_BUFG_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_BUFG_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_BUFG_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_BUFG_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_BUFG_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_BUFG_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_BUFG_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_BUFG_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_BUFG_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_BUFG_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_BUFG_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_BUFG_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_BUFG_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_BUFG_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_BUFG_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_BUFG_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_BUFG_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_BUFG_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_BUFG_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B0_0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B1_0", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B2_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B3_0", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B4_0", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B6_0", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_BUFG_LOGIC_OUTS_B7_0", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CLK_HROW_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_3", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_3", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_3", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_3", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_3", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_3", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_3", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_3", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_3", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_3", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_3", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_3", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_2", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_2", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_2", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_2", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_2", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_2", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_2", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_2", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_2", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_2", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_2", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_2", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_1", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_1", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_1", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_1", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_1", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_1", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_1", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_1", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_1", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_1", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_1", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_1", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_BUFG_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_0", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_0", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_0", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_0", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_0", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_0", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_0", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_0", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_0", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_0", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_0", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_0", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_FEED" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "CLK_FEED", + "CLK_HROW_BOT_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_HROW_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_HROW_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_HROW_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_HROW_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_HROW_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_HROW_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_HROW_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_HROW_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_HROW_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_HROW_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_HROW_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_HROW_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_HROW_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_HROW_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_HROW_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_HROW_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_HROW_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_HROW_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_HROW_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_HROW_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_HROW_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_HROW_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_HROW_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_HROW_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_HROW_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_HROW_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_HROW_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_HROW_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_HROW_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_HROW_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_HROW_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_HROW_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "CLK_FEED", + "CLK_HROW_BOT_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_HROW_BOT_R_CK_BUFG_CASCO0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_HROW_BOT_R_CK_BUFG_CASCO1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_HROW_BOT_R_CK_BUFG_CASCO2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_HROW_BOT_R_CK_BUFG_CASCO3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_HROW_BOT_R_CK_BUFG_CASCO4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_HROW_BOT_R_CK_BUFG_CASCO5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_HROW_BOT_R_CK_BUFG_CASCO6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_HROW_BOT_R_CK_BUFG_CASCO7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_HROW_BOT_R_CK_BUFG_CASCO8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_HROW_BOT_R_CK_BUFG_CASCO9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_HROW_BOT_R_CK_BUFG_CASCO10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_HROW_BOT_R_CK_BUFG_CASCO11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_HROW_BOT_R_CK_BUFG_CASCO12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_HROW_BOT_R_CK_BUFG_CASCO13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_HROW_BOT_R_CK_BUFG_CASCO14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_HROW_BOT_R_CK_BUFG_CASCO15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_HROW_BOT_R_CK_BUFG_CASCO16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_HROW_BOT_R_CK_BUFG_CASCO17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_HROW_BOT_R_CK_BUFG_CASCO18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_HROW_BOT_R_CK_BUFG_CASCO19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_HROW_BOT_R_CK_BUFG_CASCO20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_HROW_BOT_R_CK_BUFG_CASCO21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_HROW_BOT_R_CK_BUFG_CASCO22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_HROW_BOT_R_CK_BUFG_CASCO23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_HROW_BOT_R_CK_BUFG_CASCO24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_HROW_BOT_R_CK_BUFG_CASCO25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_HROW_BOT_R_CK_BUFG_CASCO26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_HROW_BOT_R_CK_BUFG_CASCO27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_HROW_BOT_R_CK_BUFG_CASCO28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_HROW_BOT_R_CK_BUFG_CASCO29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_HROW_BOT_R_CK_BUFG_CASCO30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_HROW_BOT_R_CK_BUFG_CASCO31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_HROW_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_HROW_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_HROW_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_HROW_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_HROW_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_HROW_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_HROW_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_HROW_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_HROW_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_HROW_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_HROW_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_HROW_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_HROW_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_HROW_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_HROW_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_HROW_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_HROW_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_HROW_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_HROW_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_HROW_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_HROW_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_HROW_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_HROW_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_HROW_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_HROW_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_HROW_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_HROW_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_HROW_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_HROW_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_HROW_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_HROW_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_HROW_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "CLK_FEED", + "CLK_HROW_TOP_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_HROW_TOP_R_CK_BUFG_CASCO0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_HROW_TOP_R_CK_BUFG_CASCO1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_HROW_TOP_R_CK_BUFG_CASCO2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_HROW_TOP_R_CK_BUFG_CASCO3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_HROW_TOP_R_CK_BUFG_CASCO4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_HROW_TOP_R_CK_BUFG_CASCO5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_HROW_TOP_R_CK_BUFG_CASCO6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_HROW_TOP_R_CK_BUFG_CASCO7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_HROW_TOP_R_CK_BUFG_CASCO8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_HROW_TOP_R_CK_BUFG_CASCO9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_HROW_TOP_R_CK_BUFG_CASCO10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_HROW_TOP_R_CK_BUFG_CASCO11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_HROW_TOP_R_CK_BUFG_CASCO12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_HROW_TOP_R_CK_BUFG_CASCO13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_HROW_TOP_R_CK_BUFG_CASCO14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_HROW_TOP_R_CK_BUFG_CASCO15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_HROW_TOP_R_CK_BUFG_CASCO16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_HROW_TOP_R_CK_BUFG_CASCO17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_HROW_TOP_R_CK_BUFG_CASCO18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_HROW_TOP_R_CK_BUFG_CASCO19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_HROW_TOP_R_CK_BUFG_CASCO20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_HROW_TOP_R_CK_BUFG_CASCO21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_HROW_TOP_R_CK_BUFG_CASCO22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_HROW_TOP_R_CK_BUFG_CASCO23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_HROW_TOP_R_CK_BUFG_CASCO24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_HROW_TOP_R_CK_BUFG_CASCO25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_HROW_TOP_R_CK_BUFG_CASCO26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_HROW_TOP_R_CK_BUFG_CASCO27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_HROW_TOP_R_CK_BUFG_CASCO28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_HROW_TOP_R_CK_BUFG_CASCO29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_HROW_TOP_R_CK_BUFG_CASCO30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_HROW_TOP_R_CK_BUFG_CASCO31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_HROW_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_HROW_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_HROW_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_HROW_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_HROW_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_HROW_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_HROW_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_HROW_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_HROW_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_HROW_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_HROW_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_HROW_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_HROW_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_HROW_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_HROW_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_HROW_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_HROW_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_HROW_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_HROW_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_HROW_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_HROW_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_HROW_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_HROW_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_HROW_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_HROW_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_HROW_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_HROW_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_HROW_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_HROW_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_HROW_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_HROW_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_HROW_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "CLK_FEED", + "CLK_HROW_TOP_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_HROW_TOP_R_CK_BUFG_CASCIN31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_HROW_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_HROW_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_HROW_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_HROW_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_HROW_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_HROW_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_HROW_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_HROW_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_HROW_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_HROW_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_HROW_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_HROW_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_HROW_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_HROW_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_HROW_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_HROW_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_HROW_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_HROW_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_HROW_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_HROW_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_HROW_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_HROW_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_HROW_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_HROW_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_HROW_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_HROW_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_HROW_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_HROW_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_HROW_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_HROW_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_HROW_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_HROW_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_MTBF2" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMV" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_PMV_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_PMV_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_PMV_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_PMV_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_PMV_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_PMV_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_PMV_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_PMV_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_PMV_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_PMV_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_PMV_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_PMV_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_PMV_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_PMV_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_PMV_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_PMV_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_PMV_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_PMV_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_PMV_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_PMV_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_PMV_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_PMV_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_PMV_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_PMV_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_PMV_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_PMV_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_PMV_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_PMV_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_PMV_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_PMV_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_PMV_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_PMV_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 7 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMV" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_PMV_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_PMV_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_PMV_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_PMV_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_PMV_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_PMV_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_PMV_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_PMV_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_PMV_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_PMV_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_PMV_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_PMV_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_PMV_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_PMV_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_PMV_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_PMV_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_PMV_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_PMV_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_PMV_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_PMV_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_PMV_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_PMV_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_PMV_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_PMV_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_PMV_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_PMV_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_PMV_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_PMV_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_PMV_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_PMV_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_PMV_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_PMV_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMV2" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMV2" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMV2_SVT" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMV2_SVT" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_BUFG_CASC0", + "CLK_FEED_R_CK_BUFG_CASC0" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC1", + "CLK_FEED_R_CK_BUFG_CASC1" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC2", + "CLK_FEED_R_CK_BUFG_CASC2" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC3", + "CLK_FEED_R_CK_BUFG_CASC3" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC4", + "CLK_FEED_R_CK_BUFG_CASC4" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC5", + "CLK_FEED_R_CK_BUFG_CASC5" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC6", + "CLK_FEED_R_CK_BUFG_CASC6" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC7", + "CLK_FEED_R_CK_BUFG_CASC7" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC8", + "CLK_FEED_R_CK_BUFG_CASC8" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC9", + "CLK_FEED_R_CK_BUFG_CASC9" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC10", + "CLK_FEED_R_CK_BUFG_CASC10" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC11", + "CLK_FEED_R_CK_BUFG_CASC11" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC12", + "CLK_FEED_R_CK_BUFG_CASC12" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC13", + "CLK_FEED_R_CK_BUFG_CASC13" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC14", + "CLK_FEED_R_CK_BUFG_CASC14" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC15", + "CLK_FEED_R_CK_BUFG_CASC15" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC16", + "CLK_FEED_R_CK_BUFG_CASC16" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC17", + "CLK_FEED_R_CK_BUFG_CASC17" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC18", + "CLK_FEED_R_CK_BUFG_CASC18" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC19", + "CLK_FEED_R_CK_BUFG_CASC19" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC20", + "CLK_FEED_R_CK_BUFG_CASC20" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC21", + "CLK_FEED_R_CK_BUFG_CASC21" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC22", + "CLK_FEED_R_CK_BUFG_CASC22" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC23", + "CLK_FEED_R_CK_BUFG_CASC23" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC24", + "CLK_FEED_R_CK_BUFG_CASC24" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC25", + "CLK_FEED_R_CK_BUFG_CASC25" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC26", + "CLK_FEED_R_CK_BUFG_CASC26" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC27", + "CLK_FEED_R_CK_BUFG_CASC27" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC28", + "CLK_FEED_R_CK_BUFG_CASC28" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC29", + "CLK_FEED_R_CK_BUFG_CASC29" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC30", + "CLK_FEED_R_CK_BUFG_CASC30" + ], + [ + "CLK_FEED_R_CK_BUFG_CASC31", + "CLK_FEED_R_CK_BUFG_CASC31" + ], + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMVIOB" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_PMVIOB" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_FEED_R_CK_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_FEED_R_CK_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_FEED_R_CK_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_FEED_R_CK_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_FEED_R_CK_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_FEED_R_CK_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_FEED_R_CK_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_FEED_R_CK_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_FEED_R_CK_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_FEED_R_CK_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_FEED_R_CK_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_FEED_R_CK_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_FEED_R_CK_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_FEED_R_CK_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_FEED_R_CK_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_FEED_R_CK_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_FEED_R_CK_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_FEED_R_CK_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_FEED_R_CK_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_FEED_R_CK_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_FEED_R_CK_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_FEED_R_CK_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_FEED_R_CK_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_FEED_R_CK_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_FEED_R_CK_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_FEED_R_CK_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_FEED_R_CK_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_FEED_R_CK_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_FEED_R_CK_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_FEED_R_CK_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_FEED_R_CK_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_FEED_R_CK_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_TERM" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_TERM_R_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_TERM_R_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_TERM_R_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_TERM_R_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_TERM_R_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_TERM_R_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_TERM_R_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_TERM_R_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_TERM_R_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_TERM_R_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_TERM_R_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_TERM_R_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_TERM_R_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_TERM_R_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_TERM_R_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_TERM_R_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_TERM_R_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_TERM_R_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_TERM_R_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_TERM_R_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_TERM_R_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_TERM_R_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_TERM_R_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_TERM_R_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_TERM_R_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_TERM_R_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_TERM_R_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_TERM_R_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_TERM_R_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_TERM_R_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_TERM_R_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_TERM_R_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "CLK_FEED", + "CLK_TERM" + ], + "wire_pairs": [ + [ + "CLK_FEED_R_CK_GCLK0", + "CLK_TERM_R_GCLK0" + ], + [ + "CLK_FEED_R_CK_GCLK1", + "CLK_TERM_R_GCLK1" + ], + [ + "CLK_FEED_R_CK_GCLK2", + "CLK_TERM_R_GCLK2" + ], + [ + "CLK_FEED_R_CK_GCLK3", + "CLK_TERM_R_GCLK3" + ], + [ + "CLK_FEED_R_CK_GCLK4", + "CLK_TERM_R_GCLK4" + ], + [ + "CLK_FEED_R_CK_GCLK5", + "CLK_TERM_R_GCLK5" + ], + [ + "CLK_FEED_R_CK_GCLK6", + "CLK_TERM_R_GCLK6" + ], + [ + "CLK_FEED_R_CK_GCLK7", + "CLK_TERM_R_GCLK7" + ], + [ + "CLK_FEED_R_CK_GCLK8", + "CLK_TERM_R_GCLK8" + ], + [ + "CLK_FEED_R_CK_GCLK9", + "CLK_TERM_R_GCLK9" + ], + [ + "CLK_FEED_R_CK_GCLK10", + "CLK_TERM_R_GCLK10" + ], + [ + "CLK_FEED_R_CK_GCLK11", + "CLK_TERM_R_GCLK11" + ], + [ + "CLK_FEED_R_CK_GCLK12", + "CLK_TERM_R_GCLK12" + ], + [ + "CLK_FEED_R_CK_GCLK13", + "CLK_TERM_R_GCLK13" + ], + [ + "CLK_FEED_R_CK_GCLK14", + "CLK_TERM_R_GCLK14" + ], + [ + "CLK_FEED_R_CK_GCLK15", + "CLK_TERM_R_GCLK15" + ], + [ + "CLK_FEED_R_CK_GCLK16", + "CLK_TERM_R_GCLK16" + ], + [ + "CLK_FEED_R_CK_GCLK17", + "CLK_TERM_R_GCLK17" + ], + [ + "CLK_FEED_R_CK_GCLK18", + "CLK_TERM_R_GCLK18" + ], + [ + "CLK_FEED_R_CK_GCLK19", + "CLK_TERM_R_GCLK19" + ], + [ + "CLK_FEED_R_CK_GCLK20", + "CLK_TERM_R_GCLK20" + ], + [ + "CLK_FEED_R_CK_GCLK21", + "CLK_TERM_R_GCLK21" + ], + [ + "CLK_FEED_R_CK_GCLK22", + "CLK_TERM_R_GCLK22" + ], + [ + "CLK_FEED_R_CK_GCLK23", + "CLK_TERM_R_GCLK23" + ], + [ + "CLK_FEED_R_CK_GCLK24", + "CLK_TERM_R_GCLK24" + ], + [ + "CLK_FEED_R_CK_GCLK25", + "CLK_TERM_R_GCLK25" + ], + [ + "CLK_FEED_R_CK_GCLK26", + "CLK_TERM_R_GCLK26" + ], + [ + "CLK_FEED_R_CK_GCLK27", + "CLK_TERM_R_GCLK27" + ], + [ + "CLK_FEED_R_CK_GCLK28", + "CLK_TERM_R_GCLK28" + ], + [ + "CLK_FEED_R_CK_GCLK29", + "CLK_TERM_R_GCLK29" + ], + [ + "CLK_FEED_R_CK_GCLK30", + "CLK_TERM_R_GCLK30" + ], + [ + "CLK_FEED_R_CK_GCLK31", + "CLK_TERM_R_GCLK31" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_FEED", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_FEED_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_FEED_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_FEED_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_FEED_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_FEED_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_FEED_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_FEED_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CLK_FEED_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CLK_FEED_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CLK_FEED_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CLK_FEED_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_FEED", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "VBRK_LH1" + ], + [ + "CLK_FEED_LH2", + "VBRK_LH2" + ], + [ + "CLK_FEED_LH3", + "VBRK_LH3" + ], + [ + "CLK_FEED_LH4", + "VBRK_LH4" + ], + [ + "CLK_FEED_LH5", + "VBRK_LH5" + ], + [ + "CLK_FEED_LH6", + "VBRK_LH6" + ], + [ + "CLK_FEED_LH7", + "VBRK_LH7" + ], + [ + "CLK_FEED_LH8", + "VBRK_LH8" + ], + [ + "CLK_FEED_LH9", + "VBRK_LH9" + ], + [ + "CLK_FEED_LH10", + "VBRK_LH10" + ], + [ + "CLK_FEED_LH11", + "VBRK_LH11" + ], + [ + "CLK_FEED_LH12", + "VBRK_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "CLK_HROW_CK_BUFHCLK_L0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "CLK_HROW_CK_BUFHCLK_L1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "CLK_HROW_CK_BUFHCLK_L2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "CLK_HROW_CK_BUFHCLK_L3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "CLK_HROW_CK_BUFHCLK_L4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "CLK_HROW_CK_BUFHCLK_L5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "CLK_HROW_CK_BUFHCLK_L6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "CLK_HROW_CK_BUFHCLK_L7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "CLK_HROW_CK_BUFHCLK_L8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "CLK_HROW_CK_BUFHCLK_L9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "CLK_HROW_CK_BUFHCLK_L10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "CLK_HROW_CK_BUFHCLK_L11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "CLK_HROW_CK_BUFRCLK_L0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "CLK_HROW_CK_BUFRCLK_L1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "CLK_HROW_CK_BUFRCLK_L2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "CLK_HROW_CK_BUFRCLK_L3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "CLK_HROW_CK_IN_L0", + "HCLK_INT_INTERFACE_CK_IN0" + ], + [ + "CLK_HROW_CK_IN_L1", + "HCLK_INT_INTERFACE_CK_IN1" + ], + [ + "CLK_HROW_CK_IN_L2", + "HCLK_INT_INTERFACE_CK_IN2" + ], + [ + "CLK_HROW_CK_IN_L3", + "HCLK_INT_INTERFACE_CK_IN3" + ], + [ + "CLK_HROW_CK_IN_L4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "CLK_HROW_CK_IN_L5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "CLK_HROW_CK_IN_L6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "CLK_HROW_CK_IN_L7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "CLK_HROW_CK_IN_L8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "CLK_HROW_CK_IN_L9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "CLK_HROW_CK_IN_L10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "CLK_HROW_CK_IN_L11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "CLK_HROW_CK_IN_L12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "CLK_HROW_CK_IN_L13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_CK_BUFHCLK_R0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "CLK_HROW_CK_BUFHCLK_R1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "CLK_HROW_CK_BUFHCLK_R2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "CLK_HROW_CK_BUFHCLK_R3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "CLK_HROW_CK_BUFHCLK_R4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "CLK_HROW_CK_BUFHCLK_R5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "CLK_HROW_CK_BUFHCLK_R6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "CLK_HROW_CK_BUFHCLK_R7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "CLK_HROW_CK_BUFHCLK_R8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "CLK_HROW_CK_BUFHCLK_R9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "CLK_HROW_CK_BUFHCLK_R10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "CLK_HROW_CK_BUFHCLK_R11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "CLK_HROW_CK_BUFRCLK_R0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "CLK_HROW_CK_BUFRCLK_R1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "CLK_HROW_CK_BUFRCLK_R2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "CLK_HROW_CK_BUFRCLK_R3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "CLK_HROW_CK_IN_R0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "CLK_HROW_CK_IN_R1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "CLK_HROW_CK_IN_R2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "CLK_HROW_CK_IN_R3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "CLK_HROW_CK_IN_R4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "CLK_HROW_CK_IN_R5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "CLK_HROW_CK_IN_R6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "CLK_HROW_CK_IN_R7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "CLK_HROW_CK_IN_R8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "CLK_HROW_CK_IN_R9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "CLK_HROW_CK_IN_R10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "CLK_HROW_CK_IN_R11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "CLK_HROW_CK_IN_R12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "CLK_HROW_CK_IN_R13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_7", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_7", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_7", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_7", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_7", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_7", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_7", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_7", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_7", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_7", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_7", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_7", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_7", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_7", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_7", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_7", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_7", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_7", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_7", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_7", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_7", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_7", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_7", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_7", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_7", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_7", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_7", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_7", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_7", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_7", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_7", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_7", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_7", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_7", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_7", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_7", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_7", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_7", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_7", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_7", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_7", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_7", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_7", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_7", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_7", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_7", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_7", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_7", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_7", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_7", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_7", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_7", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_7", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_7", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_7", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_7", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_7", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_7", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_7", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_7", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_7", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_7", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_7", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_7", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_7", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_7", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_7", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_7", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_7", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_7", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_7", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_7", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_7", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_7", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_7", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_7", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_7", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_7", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_7", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_7", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_7", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_7", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_7", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_7", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_7", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_7", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_7", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_7", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_7", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_7", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_7", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_7", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_7", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_7", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_7", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_7", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_7", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_7", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_7", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_7", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_7", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_7", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_7", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_7", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_7", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_7", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_7", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_7", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_7", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_7", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_7", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_7", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_7", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_7", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_7", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_7", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_7", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_7", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_7", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_7", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_7", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_7", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_7", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_7", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_7", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_7", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_7", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_7", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_7", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_7", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_7", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_7", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_7", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_7", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_7", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_7", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_7", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_7", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_7", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_7", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_7", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_7", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_7", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_7", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_7", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_7", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_7", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_7", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_7", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_7", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_7", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_7", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_7", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_7", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_7", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_7", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_7", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_7", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_7", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_7", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_7", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_7", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_7", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_7", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_7", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_7", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_7", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_7", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_7", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_7", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_7", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_7", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_7", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_7", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_7", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_7", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_7", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_7", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_7", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_7", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_7", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_7", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_7", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_7", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_7", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_7", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_7", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_7", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_7", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_7", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_7", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_6", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_6", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_6", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_6", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_6", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_6", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_6", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_6", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_6", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_6", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_6", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_6", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_6", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_6", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_6", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_6", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_6", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_6", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_6", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_6", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_6", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_6", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_6", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_6", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_6", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_6", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_6", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_6", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_6", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_6", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_6", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_6", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_6", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_6", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_6", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_6", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_6", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_6", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_6", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_6", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_6", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_6", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_6", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_6", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_6", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_6", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_6", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_6", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_6", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_6", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_6", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_6", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_6", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_6", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_6", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_6", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_6", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_6", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_6", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_6", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_6", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_6", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_6", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_6", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_6", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_6", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_6", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_6", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_6", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_6", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_6", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_5", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_5", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_5", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_5", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_5", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_5", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_5", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_5", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_5", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_5", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_5", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_5", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_5", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_5", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_5", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_5", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_5", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_5", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_5", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_5", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_5", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_5", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_5", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_5", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_5", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_5", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_5", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_5", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_5", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_5", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_5", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_5", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_5", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_5", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_5", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_5", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_5", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_5", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_5", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_5", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_5", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_5", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_5", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_5", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_5", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_5", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_5", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_5", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_5", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_5", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_5", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_5", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_5", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_5", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_5", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_5", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_5", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_5", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_5", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_5", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_5", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_5", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_5", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_5", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_5", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_5", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_5", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_5", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_7", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_7", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_7", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_7", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_7", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_7", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_7", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_7", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_7", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_7", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_7", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_7", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_6", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_6", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_6", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_6", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_6", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_6", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_6", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_6", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_6", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_6", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_6", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_6", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_5", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_5", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_5", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_5", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_5", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_5", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_5", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_5", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_5", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_5", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_5", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_5", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_4", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_4", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_4", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_4", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_4", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_4", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_4", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_4", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_4", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_4", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_4", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_4", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_3", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_3", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_3", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_3", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_3", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_3", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_3", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_3", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_3", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_3", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_3", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_3", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_2", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_2", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_2", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_2", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_2", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_2", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_2", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_2", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_2", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_2", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_2", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_2", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_1", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_1", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_1", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_1", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_1", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_1", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_1", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_1", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_1", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_1", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_1", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_1", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CLK_HROW_BOT_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_0", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_0", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_0", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_0", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_0", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_0", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_0", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_0", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_0", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_0", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_0", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_0", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "CLK_HROW_CK_BUFHCLK_L0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "CLK_HROW_CK_BUFHCLK_L1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "CLK_HROW_CK_BUFHCLK_L2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "CLK_HROW_CK_BUFHCLK_L3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "CLK_HROW_CK_BUFHCLK_L4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "CLK_HROW_CK_BUFHCLK_L5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "CLK_HROW_CK_BUFHCLK_L6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "CLK_HROW_CK_BUFHCLK_L7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "CLK_HROW_CK_BUFHCLK_L8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "CLK_HROW_CK_BUFHCLK_L9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "CLK_HROW_CK_BUFHCLK_L10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "CLK_HROW_CK_BUFHCLK_L11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "CLK_HROW_CK_BUFRCLK_L0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "CLK_HROW_CK_BUFRCLK_L1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "CLK_HROW_CK_BUFRCLK_L2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "CLK_HROW_CK_BUFRCLK_L3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "CLK_HROW_CK_IN_L0", + "HCLK_INT_INTERFACE_CK_IN0" + ], + [ + "CLK_HROW_CK_IN_L1", + "HCLK_INT_INTERFACE_CK_IN1" + ], + [ + "CLK_HROW_CK_IN_L2", + "HCLK_INT_INTERFACE_CK_IN2" + ], + [ + "CLK_HROW_CK_IN_L3", + "HCLK_INT_INTERFACE_CK_IN3" + ], + [ + "CLK_HROW_CK_IN_L4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "CLK_HROW_CK_IN_L5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "CLK_HROW_CK_IN_L6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "CLK_HROW_CK_IN_L7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "CLK_HROW_CK_IN_L8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "CLK_HROW_CK_IN_L9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "CLK_HROW_CK_IN_L10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "CLK_HROW_CK_IN_L11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "CLK_HROW_CK_IN_L12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "CLK_HROW_CK_IN_L13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_CK_BUFHCLK_R0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "CLK_HROW_CK_BUFHCLK_R1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "CLK_HROW_CK_BUFHCLK_R2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "CLK_HROW_CK_BUFHCLK_R3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "CLK_HROW_CK_BUFHCLK_R4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "CLK_HROW_CK_BUFHCLK_R5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "CLK_HROW_CK_BUFHCLK_R6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "CLK_HROW_CK_BUFHCLK_R7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "CLK_HROW_CK_BUFHCLK_R8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "CLK_HROW_CK_BUFHCLK_R9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "CLK_HROW_CK_BUFHCLK_R10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "CLK_HROW_CK_BUFHCLK_R11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "CLK_HROW_CK_BUFRCLK_R0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "CLK_HROW_CK_BUFRCLK_R1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "CLK_HROW_CK_BUFRCLK_R2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "CLK_HROW_CK_BUFRCLK_R3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "CLK_HROW_CK_IN_R0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "CLK_HROW_CK_IN_R1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "CLK_HROW_CK_IN_R2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "CLK_HROW_CK_IN_R3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "CLK_HROW_CK_IN_R4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "CLK_HROW_CK_IN_R5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "CLK_HROW_CK_IN_R6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "CLK_HROW_CK_IN_R7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "CLK_HROW_CK_IN_R8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "CLK_HROW_CK_IN_R9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "CLK_HROW_CK_IN_R10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "CLK_HROW_CK_IN_R11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "CLK_HROW_CK_IN_R12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "CLK_HROW_CK_IN_R13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_7", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_7", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_7", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_7", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_7", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_7", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_7", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_7", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_7", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_7", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_7", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_7", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_7", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_7", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_7", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_7", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_7", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_7", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_7", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_7", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_7", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_7", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_7", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_7", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_7", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_7", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_7", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_7", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_7", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_7", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_7", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_7", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_7", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_7", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_7", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_7", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_7", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_7", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_7", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_7", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_7", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_7", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_7", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_7", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_7", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_7", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_7", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_7", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_7", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_7", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_7", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_7", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_7", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_7", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_7", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_7", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_7", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_7", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_7", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_7", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_7", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_7", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_7", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_7", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_7", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_7", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_7", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_7", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_7", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_7", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_7", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_7", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_7", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_7", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_7", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_7", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_7", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_7", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_7", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_7", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_7", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_7", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_7", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_7", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_7", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_7", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_7", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_7", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_7", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_7", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_7", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_7", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_7", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_7", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_7", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_7", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_7", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_7", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_7", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_7", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_7", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_7", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_7", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_7", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_7", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_7", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_7", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_7", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_7", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_7", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_7", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_7", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_7", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_7", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_7", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_7", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_7", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_7", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_7", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_7", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_7", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_7", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_7", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_7", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_7", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_7", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_7", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_7", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_7", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_7", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_7", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_7", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_7", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_7", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_7", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_7", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_7", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_7", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_7", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_7", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_7", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_7", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_7", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_7", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_7", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_7", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_7", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_7", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_7", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_7", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_7", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_7", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_7", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_7", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_7", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_7", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_7", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_7", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_7", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_7", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_7", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_7", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_7", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_7", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_7", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_7", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_7", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_7", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_7", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_7", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_7", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_7", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_7", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_7", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_7", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_7", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_7", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_7", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_7", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_7", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_7", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_7", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_7", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_7", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_7", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_7", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_7", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_7", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_7", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_7", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_7", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_6", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_6", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_6", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_6", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_6", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_6", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_6", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_6", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_6", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_6", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_6", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_6", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_6", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_6", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_6", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_6", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_6", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_6", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_6", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_6", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_6", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_6", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_6", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_6", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_6", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_6", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_6", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_6", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_6", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_6", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_6", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_6", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_6", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_6", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_6", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_6", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_6", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_6", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_6", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_6", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_6", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_6", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_6", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_6", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_6", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_6", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_6", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_6", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_6", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_6", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_6", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_6", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_6", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_6", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_6", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_6", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_6", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_6", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_6", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_6", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_6", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_6", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_6", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_6", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_6", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_6", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_6", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_6", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_6", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_6", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_6", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_5", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_5", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_5", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_5", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_5", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_5", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_5", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_5", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_5", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_5", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_5", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_5", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_5", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_5", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_5", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_5", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_5", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_5", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_5", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_5", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_5", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_5", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_5", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_5", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_5", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_5", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_5", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_5", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_5", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_5", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_5", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_5", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_5", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_5", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_5", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_5", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_5", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_5", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_5", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_5", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_5", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_5", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_5", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_5", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_5", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_5", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_5", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_5", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_5", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_5", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_5", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_5", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_5", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_5", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_5", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_5", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_5", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_5", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_5", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_5", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_5", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_5", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_5", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_5", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_5", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_5", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_5", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_5", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_HROW_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_HROW_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_HROW_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_HROW_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_HROW_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_HROW_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_HROW_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_HROW_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_HROW_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_HROW_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_HROW_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_HROW_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_HROW_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_HROW_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_HROW_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_HROW_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_HROW_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_HROW_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_HROW_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_HROW_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_HROW_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_HROW_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_HROW_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_HROW_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_HROW_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_HROW_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_HROW_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_HROW_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_HROW_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_HROW_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_HROW_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_HROW_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_HROW_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_HROW_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_HROW_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_HROW_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_HROW_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_HROW_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_HROW_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_HROW_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_HROW_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_HROW_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_HROW_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_HROW_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_HROW_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_HROW_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_HROW_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_HROW_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_HROW_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_HROW_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_HROW_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_HROW_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_HROW_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_HROW_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_HROW_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_HROW_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_HROW_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_HROW_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_HROW_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_HROW_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_HROW_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_HROW_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_HROW_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_HROW_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_HROW_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_HROW_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_HROW_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_HROW_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_HROW_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_HROW_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CLK_HROW_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CLK_HROW_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CLK_HROW_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CLK_HROW_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CLK_HROW_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CLK_HROW_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CLK_HROW_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CLK_HROW_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CLK_HROW_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CLK_HROW_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CLK_HROW_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CLK_HROW_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_7", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_7", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_7", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_7", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_7", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_7", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_7", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_7", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_7", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_7", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_7", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_7", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_6", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_6", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_6", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_6", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_6", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_6", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_6", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_6", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_6", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_6", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_6", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_6", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_5", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_5", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_5", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_5", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_5", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_5", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_5", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_5", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_5", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_5", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_5", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_5", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_4", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_4", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_4", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_4", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_4", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_4", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_4", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_4", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_4", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_4", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_4", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_4", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_3", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_3", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_3", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_3", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_3", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_3", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_3", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_3", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_3", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_3", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_3", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_3", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_2", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_2", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_2", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_2", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_2", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_2", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_2", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_2", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_2", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_2", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_2", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_2", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_1", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_1", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_1", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_1", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_1", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_1", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_1", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_1", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_1", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_1", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_1", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_1", + "VBRK_LH12" + ], + [ + "CLK_HROW_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CLK_HROW_TOP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_HROW_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CLK_HROW_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CLK_HROW_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CLK_HROW_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CLK_HROW_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CLK_HROW_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CLK_HROW_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CLK_HROW_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CLK_HROW_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CLK_HROW_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CLK_HROW_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CLK_HROW_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CLK_HROW_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CLK_HROW_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CLK_HROW_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CLK_HROW_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CLK_HROW_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CLK_HROW_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CLK_HROW_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CLK_HROW_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CLK_HROW_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CLK_HROW_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CLK_HROW_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CLK_HROW_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CLK_HROW_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CLK_HROW_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CLK_HROW_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CLK_HROW_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CLK_HROW_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CLK_HROW_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CLK_HROW_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CLK_HROW_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CLK_HROW_LH1_0", + "VBRK_LH1" + ], + [ + "CLK_HROW_LH2_0", + "VBRK_LH2" + ], + [ + "CLK_HROW_LH3_0", + "VBRK_LH3" + ], + [ + "CLK_HROW_LH4_0", + "VBRK_LH4" + ], + [ + "CLK_HROW_LH5_0", + "VBRK_LH5" + ], + [ + "CLK_HROW_LH6_0", + "VBRK_LH6" + ], + [ + "CLK_HROW_LH7_0", + "VBRK_LH7" + ], + [ + "CLK_HROW_LH8_0", + "VBRK_LH8" + ], + [ + "CLK_HROW_LH9_0", + "VBRK_LH9" + ], + [ + "CLK_HROW_LH10_0", + "VBRK_LH10" + ], + [ + "CLK_HROW_LH11_0", + "VBRK_LH11" + ], + [ + "CLK_HROW_LH12_0", + "VBRK_LH12" + ], + [ + "CLK_HROW_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CLK_HROW_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CLK_HROW_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CLK_HROW_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CLK_HROW_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CLK_HROW_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CLK_HROW_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CLK_HROW_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CLK_HROW_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CLK_HROW_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CLK_HROW_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CLK_HROW_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CLK_HROW_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CLK_HROW_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CLK_HROW_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CLK_HROW_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CLK_HROW_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CLK_HROW_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CLK_HROW_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CLK_HROW_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CLK_HROW_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CLK_HROW_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CLK_HROW_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CLK_HROW_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CLK_HROW_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CLK_HROW_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CLK_HROW_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CLK_HROW_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CLK_HROW_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CLK_HROW_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CLK_HROW_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CLK_HROW_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CLK_HROW_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CLK_HROW_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CLK_HROW_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CLK_HROW_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CLK_HROW_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CLK_HROW_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CLK_HROW_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CLK_HROW_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CLK_HROW_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CLK_HROW_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CLK_HROW_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CLK_HROW_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CLK_HROW_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CLK_HROW_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CLK_HROW_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CLK_HROW_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CLK_HROW_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CLK_HROW_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CLK_HROW_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CLK_HROW_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CLK_HROW_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CLK_HROW_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CLK_HROW_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CLK_HROW_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CLK_HROW_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CLK_HROW_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CLK_HROW_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CLK_HROW_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CLK_HROW_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CLK_HROW_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CLK_HROW_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CLK_HROW_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CLK_HROW_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CLK_HROW_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CLK_HROW_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CLK_HROW_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CLK_HROW_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CLK_HROW_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CLK_HROW_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CLK_HROW_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CLK_HROW_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CLK_HROW_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CLK_HROW_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CLK_HROW_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CLK_HROW_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CLK_HROW_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CLK_HROW_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CLK_HROW_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CLK_HROW_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CLK_HROW_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_MTBF2", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_FEED_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_FEED_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_FEED_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_FEED_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_FEED_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_FEED_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_FEED_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CLK_FEED_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CLK_FEED_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CLK_FEED_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CLK_FEED_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "INT_INTERFACE_WW4END3" + ], + [ + "CLK_PMV_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LOGIC_OUTS2_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CLK_PMV_LOGIC_OUTS5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_PMV_LOGIC_OUTS6_0", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CLK_PMV_LOGIC_OUTS9_0", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CLK_PMV_LOGIC_OUTS10_0", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CLK_PMV_LOGIC_OUTS14_0", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CLK_PMV_LOGIC_OUTS16_0", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CLK_PMV_LOGIC_OUTS19_0", + "INT_INTERFACE_LOGIC_OUTS_B19" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_MTBF2", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "VBRK_LH1" + ], + [ + "CLK_FEED_LH2", + "VBRK_LH2" + ], + [ + "CLK_FEED_LH3", + "VBRK_LH3" + ], + [ + "CLK_FEED_LH4", + "VBRK_LH4" + ], + [ + "CLK_FEED_LH5", + "VBRK_LH5" + ], + [ + "CLK_FEED_LH6", + "VBRK_LH6" + ], + [ + "CLK_FEED_LH7", + "VBRK_LH7" + ], + [ + "CLK_FEED_LH8", + "VBRK_LH8" + ], + [ + "CLK_FEED_LH9", + "VBRK_LH9" + ], + [ + "CLK_FEED_LH10", + "VBRK_LH10" + ], + [ + "CLK_FEED_LH11", + "VBRK_LH11" + ], + [ + "CLK_FEED_LH12", + "VBRK_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_6", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_6", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_6", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_6", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_6", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_6", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_6", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_6", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_6", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_6", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_6", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_6", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_6", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_6", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_6", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_6", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_6", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_6", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_6", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_6", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_6", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_6", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_6", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_6", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_6", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_6", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_6", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_6", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_6", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_6", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_6", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_6", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_6", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_6", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_6", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_6", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_6", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_6", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_6", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_6", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_6", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_6", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_6", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_6", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_6", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_6", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_6", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_6", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_6", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_6", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_6", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_6", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_6", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_6", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_6", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_6", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_6", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_6", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_6", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_6", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_6", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_6", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_6", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_6", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_6", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_6", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_6", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_6", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_MONITOR_N_6", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_6", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_6", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_5", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_5", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_5", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_5", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_5", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_5", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_5", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_5", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_5", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_5", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_5", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_5", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_5", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_5", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_5", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_5", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_5", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_5", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_5", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_5", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_5", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_5", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_5", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_5", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_5", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_5", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_5", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_5", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_5", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_5", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_5", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_5", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_5", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_5", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_5", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_5", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_5", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_5", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_5", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_5", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_5", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_5", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_5", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_5", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_5", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_5", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_5", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_5", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_5", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_5", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_5", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_5", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_5", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_5", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_5", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_5", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_5", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_5", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_5", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_5", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_5", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_5", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_5", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_5", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_5", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_5", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_5", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_5", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_LOGIC_OUTS1_3", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_PMV_LOGIC_OUTS9_3", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CLK_PMV_LOGIC_OUTS13_3", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CLK_PMV_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_PMV_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_PMV_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_PMV_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_PMV_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_PMV_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_PMV_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_PMV_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_PMV_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_PMV_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_PMV_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_PMV_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_PMV_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_PMV_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_PMV_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_PMV_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CLK_PMV_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CLK_PMV_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CLK_PMV_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CLK_PMV_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CLK_PMV_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CLK_PMV_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CLK_PMV_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CLK_PMV_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CLK_PMV_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CLK_PMV_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CLK_PMV_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CLK_PMV_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_PMV_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_PMV_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_PMV_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_PMV_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_PMV_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_PMV_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_PMV_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_PMV_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_PMV_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_PMV_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_PMV_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_PMV_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_PMV_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_PMV_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_PMV_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_PMV_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_PMV_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_PMV_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_PMV_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_PMV_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_PMV_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_PMV_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_PMV_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_PMV_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_PMV_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_PMV_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_PMV_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_PMV_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_PMV_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_PMV_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_PMV_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_PMV_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_PMV_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_PMV_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_PMV_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_PMV_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_PMV_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_PMV_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_PMV_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_PMV_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_PMV_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_PMV_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_PMV_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_PMV_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_PMV_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_PMV_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_PMV_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_PMV_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_PMV_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_PMV_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_PMV_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_PMV_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_PMV_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_PMV_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_PMV_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_PMV_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_PMV_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_PMV_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_PMV_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_PMV_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_PMV_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_PMV_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_PMV_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_PMV_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_PMV_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_PMV_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_PMV_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_PMV_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_PMV_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_6", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_6", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_6", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_6", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_6", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_6", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_6", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_6", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_6", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_6", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_6", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_6", + "VBRK_LH12" + ], + [ + "CLK_PMV_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_5", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_5", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_5", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_5", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_5", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_5", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_5", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_5", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_5", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_5", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_5", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_5", + "VBRK_LH12" + ], + [ + "CLK_PMV_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_4", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_4", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_4", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_4", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_4", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_4", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_4", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_4", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_4", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_4", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_4", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_4", + "VBRK_LH12" + ], + [ + "CLK_PMV_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_3", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_3", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_3", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_3", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_3", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_3", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_3", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_3", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_3", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_3", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_3", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_3", + "VBRK_LH12" + ], + [ + "CLK_PMV_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_2", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_2", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_2", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_2", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_2", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_2", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_2", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_2", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_2", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_2", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_2", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_2", + "VBRK_LH12" + ], + [ + "CLK_PMV_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_1", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_1", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_1", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_1", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_1", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_1", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_1", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_1", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_1", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_1", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_1", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_1", + "VBRK_LH12" + ], + [ + "CLK_PMV_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_PMV", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_PMV_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CLK_PMV_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CLK_PMV_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CLK_PMV_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CLK_PMV_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CLK_PMV_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CLK_PMV_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CLK_PMV_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CLK_PMV_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CLK_PMV_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CLK_PMV_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CLK_PMV_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CLK_PMV_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CLK_PMV_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CLK_PMV_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CLK_PMV_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CLK_PMV_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CLK_PMV_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CLK_PMV_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CLK_PMV_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CLK_PMV_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CLK_PMV_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CLK_PMV_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CLK_PMV_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CLK_PMV_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CLK_PMV_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CLK_PMV_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CLK_PMV_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CLK_PMV_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CLK_PMV_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CLK_PMV_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CLK_PMV_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CLK_PMV_LH1_0", + "VBRK_LH1" + ], + [ + "CLK_PMV_LH2_0", + "VBRK_LH2" + ], + [ + "CLK_PMV_LH3_0", + "VBRK_LH3" + ], + [ + "CLK_PMV_LH4_0", + "VBRK_LH4" + ], + [ + "CLK_PMV_LH5_0", + "VBRK_LH5" + ], + [ + "CLK_PMV_LH6_0", + "VBRK_LH6" + ], + [ + "CLK_PMV_LH7_0", + "VBRK_LH7" + ], + [ + "CLK_PMV_LH8_0", + "VBRK_LH8" + ], + [ + "CLK_PMV_LH9_0", + "VBRK_LH9" + ], + [ + "CLK_PMV_LH10_0", + "VBRK_LH10" + ], + [ + "CLK_PMV_LH11_0", + "VBRK_LH11" + ], + [ + "CLK_PMV_LH12_0", + "VBRK_LH12" + ], + [ + "CLK_PMV_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CLK_PMV_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CLK_PMV_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CLK_PMV_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CLK_PMV_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CLK_PMV_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CLK_PMV_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CLK_PMV_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CLK_PMV_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CLK_PMV_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CLK_PMV_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CLK_PMV_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CLK_PMV_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CLK_PMV_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CLK_PMV_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CLK_PMV_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CLK_PMV_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CLK_PMV_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CLK_PMV_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CLK_PMV_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CLK_PMV_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CLK_PMV_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CLK_PMV_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CLK_PMV_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CLK_PMV_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CLK_PMV_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CLK_PMV_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CLK_PMV_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CLK_PMV_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CLK_PMV_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CLK_PMV_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CLK_PMV_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CLK_PMV_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CLK_PMV_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CLK_PMV_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CLK_PMV_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CLK_PMV_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CLK_PMV_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CLK_PMV_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CLK_PMV_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CLK_PMV_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CLK_PMV_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CLK_PMV_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CLK_PMV_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CLK_PMV_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CLK_PMV_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CLK_PMV_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CLK_PMV_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CLK_PMV_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CLK_PMV_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CLK_PMV_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CLK_PMV_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CLK_PMV_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CLK_PMV_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CLK_PMV_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CLK_PMV_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CLK_PMV_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CLK_PMV_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CLK_PMV_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CLK_PMV_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CLK_PMV_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CLK_PMV_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CLK_PMV_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CLK_PMV_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CLK_PMV_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CLK_PMV_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CLK_PMV_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CLK_PMV_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CLK_PMV_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CLK_PMV_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CLK_PMV_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CLK_PMV_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CLK_PMV_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CLK_PMV_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CLK_PMV_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CLK_PMV_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CLK_PMV_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CLK_PMV_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CLK_PMV_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CLK_PMV_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CLK_PMV_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CLK_PMV_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_PMV2", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_FEED_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_FEED_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_FEED_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_FEED_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_FEED_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_FEED_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_FEED_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CLK_FEED_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CLK_FEED_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CLK_FEED_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CLK_FEED_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "INT_INTERFACE_WW4END3" + ], + [ + "CLK_PMV_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LOGIC_OUTS5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_PMV_LOGIC_OUTS9_0", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CLK_PMV_LOGIC_OUTS19_0", + "INT_INTERFACE_LOGIC_OUTS_B19" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_PMV2", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "VBRK_LH1" + ], + [ + "CLK_FEED_LH2", + "VBRK_LH2" + ], + [ + "CLK_FEED_LH3", + "VBRK_LH3" + ], + [ + "CLK_FEED_LH4", + "VBRK_LH4" + ], + [ + "CLK_FEED_LH5", + "VBRK_LH5" + ], + [ + "CLK_FEED_LH6", + "VBRK_LH6" + ], + [ + "CLK_FEED_LH7", + "VBRK_LH7" + ], + [ + "CLK_FEED_LH8", + "VBRK_LH8" + ], + [ + "CLK_FEED_LH9", + "VBRK_LH9" + ], + [ + "CLK_FEED_LH10", + "VBRK_LH10" + ], + [ + "CLK_FEED_LH11", + "VBRK_LH11" + ], + [ + "CLK_FEED_LH12", + "VBRK_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_PMV2_SVT", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_FEED_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_FEED_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_FEED_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_FEED_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_FEED_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_FEED_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_FEED_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CLK_FEED_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CLK_FEED_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CLK_FEED_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CLK_FEED_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CLK_FEED_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "INT_INTERFACE_WW4END3" + ], + [ + "CLK_PMV_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LOGIC_OUTS5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CLK_PMV_LOGIC_OUTS9_0", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CLK_PMV_LOGIC_OUTS19_0", + "INT_INTERFACE_LOGIC_OUTS_B19" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_PMV2_SVT", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "VBRK_LH1" + ], + [ + "CLK_FEED_LH2", + "VBRK_LH2" + ], + [ + "CLK_FEED_LH3", + "VBRK_LH3" + ], + [ + "CLK_FEED_LH4", + "VBRK_LH4" + ], + [ + "CLK_FEED_LH5", + "VBRK_LH5" + ], + [ + "CLK_FEED_LH6", + "VBRK_LH6" + ], + [ + "CLK_FEED_LH7", + "VBRK_LH7" + ], + [ + "CLK_FEED_LH8", + "VBRK_LH8" + ], + [ + "CLK_FEED_LH9", + "VBRK_LH9" + ], + [ + "CLK_FEED_LH10", + "VBRK_LH10" + ], + [ + "CLK_FEED_LH11", + "VBRK_LH11" + ], + [ + "CLK_FEED_LH12", + "VBRK_LH12" + ], + [ + "CLK_FEED_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CLK_PMVIOB", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CLK_FEED_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CLK_FEED_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CLK_FEED_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CLK_FEED_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CLK_FEED_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CLK_FEED_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CLK_FEED_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CLK_FEED_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CLK_FEED_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CLK_FEED_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CLK_FEED_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "INT_INTERFACE_WW4END3" + ], + [ + "CLK_PMV_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CLK_PMV_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CLK_PMV_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CLK_PMV_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CLK_PMV_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CLK_PMV_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CLK_PMV_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CLK_PMV_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_PMV_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_PMV_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CLK_PMV_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CLK_PMV_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CLK_PMV_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CLK_PMV_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CLK_PMV_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CLK_PMV_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CLK_PMV_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CLK_PMV_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CLK_PMV_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CLK_PMV_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CLK_PMV_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CLK_PMV_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CLK_PMV_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CLK_PMV_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CLK_PMV_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CLK_PMV_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CLK_PMV_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CLK_PMV_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CLK_PMV_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CLK_PMV_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CLK_PMV_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CLK_PMV_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CLK_PMV_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CLK_PMV_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CLK_PMV_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CLK_PMV_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CLK_PMV_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CLK_PMV_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CLK_PMV_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CLK_PMV_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CLK_PMV_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CLK_PMV_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CLK_PMV_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CLK_PMV_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CLK_PMV_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CLK_PMV_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CLK_PMV_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CLK_PMV_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CLK_PMV_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CLK_PMV_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CLK_PMV_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CLK_PMV_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CLK_PMV_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CLK_PMV_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CLK_PMV_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CLK_PMV_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CLK_PMV_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CLK_PMV_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CLK_PMV_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CLK_PMV_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CLK_PMV_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CLK_PMV_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CLK_PMV_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CLK_PMV_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CLK_PMV_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CLK_PMV_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CLK_PMV_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CLK_PMV_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CLK_PMV_LOGIC_OUTS0_0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CLK_PMV_LOGIC_OUTS1_0", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CLK_PMV_LOGIC_OUTS2_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CLK_PMVIOB", + "VBRK" + ], + "wire_pairs": [ + [ + "CLK_FEED_EE2A0", + "VBRK_EE2A0" + ], + [ + "CLK_FEED_EE2A1", + "VBRK_EE2A1" + ], + [ + "CLK_FEED_EE2A2", + "VBRK_EE2A2" + ], + [ + "CLK_FEED_EE2A3", + "VBRK_EE2A3" + ], + [ + "CLK_FEED_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "CLK_FEED_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "CLK_FEED_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "CLK_FEED_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "CLK_FEED_EE4A0", + "VBRK_EE4A0" + ], + [ + "CLK_FEED_EE4A1", + "VBRK_EE4A1" + ], + [ + "CLK_FEED_EE4A2", + "VBRK_EE4A2" + ], + [ + "CLK_FEED_EE4A3", + "VBRK_EE4A3" + ], + [ + "CLK_FEED_EE4B0", + "VBRK_EE4B0" + ], + [ + "CLK_FEED_EE4B1", + "VBRK_EE4B1" + ], + [ + "CLK_FEED_EE4B2", + "VBRK_EE4B2" + ], + [ + "CLK_FEED_EE4B3", + "VBRK_EE4B3" + ], + [ + "CLK_FEED_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "CLK_FEED_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "CLK_FEED_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "CLK_FEED_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "CLK_FEED_EE4C0", + "VBRK_EE4C0" + ], + [ + "CLK_FEED_EE4C1", + "VBRK_EE4C1" + ], + [ + "CLK_FEED_EE4C2", + "VBRK_EE4C2" + ], + [ + "CLK_FEED_EE4C3", + "VBRK_EE4C3" + ], + [ + "CLK_FEED_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "CLK_FEED_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "CLK_FEED_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "CLK_FEED_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "CLK_FEED_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "CLK_FEED_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "CLK_FEED_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "CLK_FEED_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "CLK_FEED_LH1", + "VBRK_LH1" + ], + [ + "CLK_FEED_LH2", + "VBRK_LH2" + ], + [ + "CLK_FEED_LH3", + "VBRK_LH3" + ], + [ + "CLK_FEED_LH4", + "VBRK_LH4" + ], + [ + "CLK_FEED_LH5", + "VBRK_LH5" + ], + [ + "CLK_FEED_LH6", + "VBRK_LH6" + ], + [ + "CLK_FEED_LH7", + "VBRK_LH7" + ], + [ + "CLK_FEED_LH8", + "VBRK_LH8" + ], + [ + "CLK_FEED_LH9", + "VBRK_LH9" + ], + [ + "CLK_FEED_LH10", + "VBRK_LH10" + ], + [ + "CLK_FEED_LH11", + "VBRK_LH11" + ], + [ + "CLK_FEED_LH12", + "VBRK_LH12" + ], + [ + "CLK_FEED_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "CLK_FEED_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "CLK_FEED_NE2A0", + "VBRK_NE2A0" + ], + [ + "CLK_FEED_NE2A1", + "VBRK_NE2A1" + ], + [ + "CLK_FEED_NE2A2", + "VBRK_NE2A2" + ], + [ + "CLK_FEED_NE2A3", + "VBRK_NE2A3" + ], + [ + "CLK_FEED_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "CLK_FEED_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "CLK_FEED_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "CLK_FEED_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "CLK_FEED_NE4C0", + "VBRK_NE4C0" + ], + [ + "CLK_FEED_NE4C1", + "VBRK_NE4C1" + ], + [ + "CLK_FEED_NE4C2", + "VBRK_NE4C2" + ], + [ + "CLK_FEED_NE4C3", + "VBRK_NE4C3" + ], + [ + "CLK_FEED_NW2A0", + "VBRK_NW2A0" + ], + [ + "CLK_FEED_NW2A1", + "VBRK_NW2A1" + ], + [ + "CLK_FEED_NW2A2", + "VBRK_NW2A2" + ], + [ + "CLK_FEED_NW2A3", + "VBRK_NW2A3" + ], + [ + "CLK_FEED_NW4A0", + "VBRK_NW4A0" + ], + [ + "CLK_FEED_NW4A1", + "VBRK_NW4A1" + ], + [ + "CLK_FEED_NW4A2", + "VBRK_NW4A2" + ], + [ + "CLK_FEED_NW4A3", + "VBRK_NW4A3" + ], + [ + "CLK_FEED_NW4END0", + "VBRK_NW4END0" + ], + [ + "CLK_FEED_NW4END1", + "VBRK_NW4END1" + ], + [ + "CLK_FEED_NW4END2", + "VBRK_NW4END2" + ], + [ + "CLK_FEED_NW4END3", + "VBRK_NW4END3" + ], + [ + "CLK_FEED_SE2A0", + "VBRK_SE2A0" + ], + [ + "CLK_FEED_SE2A1", + "VBRK_SE2A1" + ], + [ + "CLK_FEED_SE2A2", + "VBRK_SE2A2" + ], + [ + "CLK_FEED_SE2A3", + "VBRK_SE2A3" + ], + [ + "CLK_FEED_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "CLK_FEED_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "CLK_FEED_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "CLK_FEED_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "CLK_FEED_SE4C0", + "VBRK_SE4C0" + ], + [ + "CLK_FEED_SE4C1", + "VBRK_SE4C1" + ], + [ + "CLK_FEED_SE4C2", + "VBRK_SE4C2" + ], + [ + "CLK_FEED_SE4C3", + "VBRK_SE4C3" + ], + [ + "CLK_FEED_SW2A0", + "VBRK_SW2A0" + ], + [ + "CLK_FEED_SW2A1", + "VBRK_SW2A1" + ], + [ + "CLK_FEED_SW2A2", + "VBRK_SW2A2" + ], + [ + "CLK_FEED_SW2A3", + "VBRK_SW2A3" + ], + [ + "CLK_FEED_SW4A0", + "VBRK_SW4A0" + ], + [ + "CLK_FEED_SW4A1", + "VBRK_SW4A1" + ], + [ + "CLK_FEED_SW4A2", + "VBRK_SW4A2" + ], + [ + "CLK_FEED_SW4A3", + "VBRK_SW4A3" + ], + [ + "CLK_FEED_SW4END0", + "VBRK_SW4END0" + ], + [ + "CLK_FEED_SW4END1", + "VBRK_SW4END1" + ], + [ + "CLK_FEED_SW4END2", + "VBRK_SW4END2" + ], + [ + "CLK_FEED_SW4END3", + "VBRK_SW4END3" + ], + [ + "CLK_FEED_WL1END0", + "VBRK_WL1END0" + ], + [ + "CLK_FEED_WL1END1", + "VBRK_WL1END1" + ], + [ + "CLK_FEED_WL1END2", + "VBRK_WL1END2" + ], + [ + "CLK_FEED_WL1END3", + "VBRK_WL1END3" + ], + [ + "CLK_FEED_WR1END0", + "VBRK_WR1END0" + ], + [ + "CLK_FEED_WR1END1", + "VBRK_WR1END1" + ], + [ + "CLK_FEED_WR1END2", + "VBRK_WR1END2" + ], + [ + "CLK_FEED_WR1END3", + "VBRK_WR1END3" + ], + [ + "CLK_FEED_WW2A0", + "VBRK_WW2A0" + ], + [ + "CLK_FEED_WW2A1", + "VBRK_WW2A1" + ], + [ + "CLK_FEED_WW2A2", + "VBRK_WW2A2" + ], + [ + "CLK_FEED_WW2A3", + "VBRK_WW2A3" + ], + [ + "CLK_FEED_WW2END0", + "VBRK_WW2END0" + ], + [ + "CLK_FEED_WW2END1", + "VBRK_WW2END1" + ], + [ + "CLK_FEED_WW2END2", + "VBRK_WW2END2" + ], + [ + "CLK_FEED_WW2END3", + "VBRK_WW2END3" + ], + [ + "CLK_FEED_WW4A0", + "VBRK_WW4A0" + ], + [ + "CLK_FEED_WW4A1", + "VBRK_WW4A1" + ], + [ + "CLK_FEED_WW4A2", + "VBRK_WW4A2" + ], + [ + "CLK_FEED_WW4A3", + "VBRK_WW4A3" + ], + [ + "CLK_FEED_WW4B0", + "VBRK_WW4B0" + ], + [ + "CLK_FEED_WW4B1", + "VBRK_WW4B1" + ], + [ + "CLK_FEED_WW4B2", + "VBRK_WW4B2" + ], + [ + "CLK_FEED_WW4B3", + "VBRK_WW4B3" + ], + [ + "CLK_FEED_WW4C0", + "VBRK_WW4C0" + ], + [ + "CLK_FEED_WW4C1", + "VBRK_WW4C1" + ], + [ + "CLK_FEED_WW4C2", + "VBRK_WW4C2" + ], + [ + "CLK_FEED_WW4C3", + "VBRK_WW4C3" + ], + [ + "CLK_FEED_WW4END0", + "VBRK_WW4END0" + ], + [ + "CLK_FEED_WW4END1", + "VBRK_WW4END1" + ], + [ + "CLK_FEED_WW4END2", + "VBRK_WW4END2" + ], + [ + "CLK_FEED_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CMT_FIFO_L", + "CMT_TOP_L_LOWER_B" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_9" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_10" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_11" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_12" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_9" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_10" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_11" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_12" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_9" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_10" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_11" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_12" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_9" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_10" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_11" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_12" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_9" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_10" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_11" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_12" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_9" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_10" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_11" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_12" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_9" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_10" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_11" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_12" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_9" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_10" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_11" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_12" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_9" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_10" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_11" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_12" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_9" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_10" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_11" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_12" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_9" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_10" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_11" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_12" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_9" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_10" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_11" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_12" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_9" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_10" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_11" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_12" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_9" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_10" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_11" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_12" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_9" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_10" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_11" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_12" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_9" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_10" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_11" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_12" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_9" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_10" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_11" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_12" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_9" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_10" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_11" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_12" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_9" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_10" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_11" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_12" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_9" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_10" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_11" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_12" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_9" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_10" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_11" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_12" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_9" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_10" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_11" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_12" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_9" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_10" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_11" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_12" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_9" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_10" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_11" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_12" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_9" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_10" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_11" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_12" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_9" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_10" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_11" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_12" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_9" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_10" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_11" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_12" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_9" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_10" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_11" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_12" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_9" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_10" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_11" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_12" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_9" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_10" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_11" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_12" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_9" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_10" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_11" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_12" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_9" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_10" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_11" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_12" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_9" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_10" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_11" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_12" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_9" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_10" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_11" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_12" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_9" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_10" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_11" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_12" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_9" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_10" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_11" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_12" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_9" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_10" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_11" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_12" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_9" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_10" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_11" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_12" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_9" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_10" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_11" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_12" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_9" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_10" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_11" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_12" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_9" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_10" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_11" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_12" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_9" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_10" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_11" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_12" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_9" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_10" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_11" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_12" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_9" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_10" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_11" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_12" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_9" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_10" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_11" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_12" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_9" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_10" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_11" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_12" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_9" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_10" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_11" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_12" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_9" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_10" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_11" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_12" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_9" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_10" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_11" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_12" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_9" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_10" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_11" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_12" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_9" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_10" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_11" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_12" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_9" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_10" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_11" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_12" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_9" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_10" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_11" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_12" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_9" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_10" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_11" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_12" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_9" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_10" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_11" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_12" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_9" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_10" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_11" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_12" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_9" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_10" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_11" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_12" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_9" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_10" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_11" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_12" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_9" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_10" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_11" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_12" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_9" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_10" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_11" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_12" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_9" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_10" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_11" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_12" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_9" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_10" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_11" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_12" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_9" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_10" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_11" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_12" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_9" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_10" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_11" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_12" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_9" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_10" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_11" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_12" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_9" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_10" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_11" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_12" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_9" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_10" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_11" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_12" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_9" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_10" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_11" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_12" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_9" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_10" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_11" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_12" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_9" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_10" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_11" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_12" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_9" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_10" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_11" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_12" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_9" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_10" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_11" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_12" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_9" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_10" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_11" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_12" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_9" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_10" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_11" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_12" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_9" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_10" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_11" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_12" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_9" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_10" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_11" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_12" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_9" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_10" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_11" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_12" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_9" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_10" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_11" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_12" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_9" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_10" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_11" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_12" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_9" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_10" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_11" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_12" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_9" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_10" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_11" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_12" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_9" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_10" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_11" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_12" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_9" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_10" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_11" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_12" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_9" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_10" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_11" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_12" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_9" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_10" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_11" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_12" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_9" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_10" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_11" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_12" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_9" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_10" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_11" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_12" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_9" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_10" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_11" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_12" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_9" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_10" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_11" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_12" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_9" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_10" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_11" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_12" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_9" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_10" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_11" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_12" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_9" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_10" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_11" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_12" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_9" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_10" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_11" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_12" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_9" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_10" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_11" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_12" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_9" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_10" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_11" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_12" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_9" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_10" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_11" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_12" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_9" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_10" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_11" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_12" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_9" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_10" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_11" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_12" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_9" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_10" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_11" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_12" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_9" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_10" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_11" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_12" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_9" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_10" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_11" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_12" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_9" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_10" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_11" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_12" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_9" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_10" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_11" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_12" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_9" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_10" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_11" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_12" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_9" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_10" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_11" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_12" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_9" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_10" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_11" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_12" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_9" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_10" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_11" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_12" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_9" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_10" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_11" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_12" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_9" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_10" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_11" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_12" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_9" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_10" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_11" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_12" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_9" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_10" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_11" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_12" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_9" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_10" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_11" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "CMT_TOP_LOGIC_OUTS_L_B7_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "CMT_TOP_LOGIC_OUTS_L_B15_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "CMT_TOP_LOGIC_OUTS_L_B15_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "CMT_TOP_LOGIC_OUTS_L_B15_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_0", + "CMT_TOP_LOGIC_OUTS_L_B16_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_1", + "CMT_TOP_LOGIC_OUTS_L_B16_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "CMT_TOP_LOGIC_OUTS_L_B16_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "CMT_TOP_LOGIC_OUTS_L_B16_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "CMT_TOP_LOGIC_OUTS_L_B17_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_0", + "CMT_TOP_LOGIC_OUTS_L_B18_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_1", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_0", + "CMT_TOP_LOGIC_OUTS_L_B21_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "CMT_TOP_LOGIC_OUTS_L_B21_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "CMT_TOP_LOGIC_OUTS_L_B21_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "CMT_TOP_LOGIC_OUTS_L_B21_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_10" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_MMCM_A_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_MMCM_A_RDEN_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_MMCM_A_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_MMCM_A_WREN_TOFIFO" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_1" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_3" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_5" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_7" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_9" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_11" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_1" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_3" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_5" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_7" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_9" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_11" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_9" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_10" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_11" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_12" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_9" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_10" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_11" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_12" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_9" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_10" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_11" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_12" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_9" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_10" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_11" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_12" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_9" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_10" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_11" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_12" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_9" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_10" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_11" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_12" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_9" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_10" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_11" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_12" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_9" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_10" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_11" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_12" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_9" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_10" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_11" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_12" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_9" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_10" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_11" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_12" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_9" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_10" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_11" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_12" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_9" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_10" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_11" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_12" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_9" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_10" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_11" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_12" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_9" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_10" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_11" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_12" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_9" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_10" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_11" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_12" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_9" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_10" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_11" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_12" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_9" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_10" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_11" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_12" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_9" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_10" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_11" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_12" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_9" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_10" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_11" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_12" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_9" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_10" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_11" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_12" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_9" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_10" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_11" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_12" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_9" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_10" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_11" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_12" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_9" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_10" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_11" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_12" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_9" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_10" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_11" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_12" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_9" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_10" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_11" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_12" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_9" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_10" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_11" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_12" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_9" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_10" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_11" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_12" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_9" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_10" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_11" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_12" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_9" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_10" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_11" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_12" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_9" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_10" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_11" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_12" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_9" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_10" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_11" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_12" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_9" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_10" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_11" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_12" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_9" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_10" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_11" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_12" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_9" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_10" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_11" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_12" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_9" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_10" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_11" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_12" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_9" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_10" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_11" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_12" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_9" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_10" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_11" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_12" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_9" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_10" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_11" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_12" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_9" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_10" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_11" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_12" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_9" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_10" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_11" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_12" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_9" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_10" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_11" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_12" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_9" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_10" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_11" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_12" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_9" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_10" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_11" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_12" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_9" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_10" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_11" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_12" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_9" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_10" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_11" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_12" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_9" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_10" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_11" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_12" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_9" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_10" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_11" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_12" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_9" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_10" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_11" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_12" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_9" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_10" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_11" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_12" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_9" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_10" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_11" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_12" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_9" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_10" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_11" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_12" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_9" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_10" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_11" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_12" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_9" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_10" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_11" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_12" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_9" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_10" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_11" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_12" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_9" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_10" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_11" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_12" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_9" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_10" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_11" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_12" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_9" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_10" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_11" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_12" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_9" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_10" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_11" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_12" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_9" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_10" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_11" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_12" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_9" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_10" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_11" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_12" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_9" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_10" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_11" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_12" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_9" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_10" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_11" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_12" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_9" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_10" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_11" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_12" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_9" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_10" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_11" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_12" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_9" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_10" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_11" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_12" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_9" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_10" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_11" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_12" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_9" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_10" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_11" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_12" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_9" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_10" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_11" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_12" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_9" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_10" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_11" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_12" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_9" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_10" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_11" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_12" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_9" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_10" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_11" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_12" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_9" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_10" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_11" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_12" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_9" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_10" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_11" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_12" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_9" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_10" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_11" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_12" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_9" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_10" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_11" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_12" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_9" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_10" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_11" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_12" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_9" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_10" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_11" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_12" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_9" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_10" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_11" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_12" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_9" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_10" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_11" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_12" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_8" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_9" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_10" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_11" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_12" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_MMCM_DQS_TO_PHASERA" + ] + ] + }, + { + "grid_deltas": [ + -1, + 11 + ], + "tile_types": [ + "CMT_FIFO_L", + "CMT_TOP_L_LOWER_B" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_13" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_14" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_15" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_13" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_14" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_15" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_13" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_14" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_15" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_13" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_14" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_15" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_13" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_14" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_15" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_13" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_14" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_15" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_13" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_14" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_15" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_13" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_14" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_15" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_13" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_14" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_15" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_13" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_14" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_15" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_13" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_14" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_15" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_13" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_14" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_15" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_13" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_14" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_15" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_13" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_14" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_15" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_13" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_14" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_15" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_13" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_14" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_15" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_13" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_14" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_15" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_13" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_14" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_15" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_13" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_14" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_15" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_13" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_14" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_15" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_13" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_14" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_15" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_13" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_14" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_15" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_13" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_14" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_15" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_13" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_14" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_15" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_13" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_14" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_15" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_13" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_14" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_15" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_13" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_14" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_15" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_13" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_14" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_15" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_13" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_14" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_15" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_13" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_14" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_15" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_13" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_14" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_15" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_13" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_14" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_15" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_13" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_14" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_15" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_13" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_14" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_15" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_13" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_14" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_15" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_13" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_14" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_15" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_13" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_14" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_15" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_13" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_14" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_15" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_13" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_14" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_15" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_13" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_14" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_15" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_13" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_14" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_15" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_13" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_14" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_15" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_13" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_14" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_15" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_13" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_14" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_15" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_13" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_14" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_15" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_13" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_14" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_15" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_13" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_14" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_15" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_13" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_14" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_15" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_13" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_14" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_15" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_13" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_14" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_15" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_13" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_14" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_15" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_13" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_14" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_15" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_13" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_14" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_15" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_13" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_14" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_15" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_13" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_14" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_15" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_13" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_14" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_15" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_13" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_14" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_15" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_13" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_14" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_15" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_13" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_14" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_15" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_13" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_14" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_15" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_13" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_14" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_15" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_13" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_14" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_15" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_13" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_14" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_15" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_13" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_14" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_15" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_13" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_14" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_15" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_13" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_14" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_15" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_13" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_14" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_15" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_13" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_14" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_15" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_13" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_14" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_15" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_13" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_14" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_15" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_13" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_14" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_15" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_13" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_14" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_15" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_13" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_14" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_15" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_13" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_14" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_15" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_13" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_14" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_15" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_13" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_14" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_15" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_13" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_14" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_15" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_13" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_14" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_15" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_13" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_14" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_15" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_13" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_14" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_15" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_13" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_14" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_15" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_13" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_14" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_15" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_13" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_14" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_15" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_13" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_14" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_15" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_13" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_14" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_15" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_13" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_14" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_15" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_13" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_14" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_15" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_13" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_14" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_15" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_13" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_14" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_15" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_13" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_14" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_15" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_13" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_14" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_15" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_13" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_14" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_15" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_13" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_14" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_15" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_13" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_14" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_15" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_13" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_14" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_15" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_13" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_14" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_15" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_13" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_14" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_15" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_13" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_14" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_15" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_13" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_14" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_15" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_13" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_14" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_15" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_13" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_14" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_15" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_13" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_14" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_15" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_13" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_14" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_15" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_13" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_14" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_15" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_13" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_14" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_15" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_13" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_14" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_15" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_13" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_14" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_15" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_13" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_14" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_15" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_13" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_14" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_15" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_13" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_14" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_15" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_13" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_14" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_15" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_13" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_14" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_15" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_13" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_15" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_13" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_15" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_13" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_14" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_15" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_13" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_14" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_15" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_13" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_14" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_15" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_13" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_14" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_15" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_13" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_14" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_15" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_13" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_14" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_15" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_13" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_14" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_15" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_13" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_14" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_15" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_13" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_14" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_15" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_13" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_14" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_15" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_13" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_14" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_15" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_13" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_14" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_15" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_13" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_14" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_15" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_13" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_14" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_15" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_13" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_14" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_15" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_13" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_14" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_15" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_13" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_14" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_15" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_13" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_14" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_15" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_13" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_14" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_15" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_13" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_14" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_15" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_13" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_14" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_15" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_13" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_14" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_15" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_13" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_14" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_15" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_13" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_14" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_15" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_13" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_14" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_15" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_13" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_14" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_15" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_13" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_14" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_15" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_13" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_14" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_15" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_13" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_14" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_15" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_13" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_14" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_15" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_13" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_14" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_15" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_13" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_14" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_15" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_13" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_14" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_15" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_13" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_14" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_15" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_13" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_14" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_15" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_13" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_14" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_15" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_13" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_14" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_15" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_13" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_14" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_15" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_13" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_14" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_15" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_13" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_14" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_15" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_13" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_14" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_15" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_13" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_14" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_15" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_13" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_14" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_15" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_13" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_14" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_15" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_13" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_14" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_15" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_13" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_14" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_15" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_13" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_14" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_15" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_13" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_14" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_15" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_13" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_14" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_15" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_13" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_14" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_15" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_13" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_14" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_15" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_13" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_14" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_15" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_13" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_14" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_15" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_13" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_14" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_15" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_13" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_14" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_15" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_13" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_14" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_15" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_13" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_14" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_15" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_13" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_14" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_15" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_13" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_14" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_15" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_13" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_14" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_15" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_13" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_14" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_15" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_13" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_14" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_15" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_13" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_14" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_15" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_13" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_14" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_15" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_13" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_14" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_15" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_13" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_14" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_15" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_13" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_14" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_15" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_13" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_14" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_15" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_13" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_14" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_15" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_13" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_14" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_15" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_13" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_14" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_15" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_13" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_14" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_15" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_13" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_14" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_15" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_13" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_14" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_15" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_13" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_14" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_15" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_13" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_14" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_15" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_13" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_14" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_15" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_13" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_14" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_15" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_13" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_14" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_15" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_13" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_14" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_15" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CMT_FIFO_L", + "CMT_TOP_L_LOWER_T" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_0" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_0" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_0" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_0" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_0" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_0" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_0" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_0" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_0" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_0" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_0" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_0" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_6", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_10", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_3", + "CMT_TOP_LOGIC_OUTS_L_B3_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_4", + "CMT_TOP_LOGIC_OUTS_L_B3_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_5", + "CMT_TOP_LOGIC_OUTS_L_B3_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_8", + "CMT_TOP_LOGIC_OUTS_L_B3_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_9", + "CMT_TOP_LOGIC_OUTS_L_B3_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_10", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_6", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_3", + "CMT_TOP_LOGIC_OUTS_L_B6_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_4", + "CMT_TOP_LOGIC_OUTS_L_B6_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_5", + "CMT_TOP_LOGIC_OUTS_L_B6_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_8", + "CMT_TOP_LOGIC_OUTS_L_B6_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_9", + "CMT_TOP_LOGIC_OUTS_L_B6_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_10", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_11", + "CMT_TOP_LOGIC_OUTS_L_B6_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "CMT_TOP_LOGIC_OUTS_L_B7_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_10", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_11", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_3", + "CMT_TOP_LOGIC_OUTS_L_B14_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_4", + "CMT_TOP_LOGIC_OUTS_L_B14_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_5", + "CMT_TOP_LOGIC_OUTS_L_B14_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_8", + "CMT_TOP_LOGIC_OUTS_L_B14_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_9", + "CMT_TOP_LOGIC_OUTS_L_B14_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_10", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_10", + "CMT_TOP_LOGIC_OUTS_L_B15_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_3", + "CMT_TOP_LOGIC_OUTS_L_B16_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_4", + "CMT_TOP_LOGIC_OUTS_L_B16_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_5", + "CMT_TOP_LOGIC_OUTS_L_B16_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "CMT_TOP_LOGIC_OUTS_L_B16_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "CMT_TOP_LOGIC_OUTS_L_B16_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "CMT_TOP_LOGIC_OUTS_L_B16_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_9", + "CMT_TOP_LOGIC_OUTS_L_B16_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_10", + "CMT_TOP_LOGIC_OUTS_L_B16_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "CMT_TOP_LOGIC_OUTS_L_B17_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_10", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_11", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_10", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_10", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_11", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_PHASER_OUT_B_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_PHASER_OUT_B_RDEN_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_PHASER_IN_B_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_PHASER_IN_B_WREN_TOFIFO" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_1" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_3" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_5" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_7" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_1" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_3" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_5" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_7" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_0" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_8" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_PHASER_DOWN_DQS_TO_PHASER_B" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CMT_FIFO_L", + "CMT_TOP_L_UPPER_B" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_9" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_10" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_11" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_9" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_10" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_11" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_9" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_10" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_11" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_9" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_10" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_11" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_9" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_10" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_11" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_9" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_10" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_11" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_9" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_10" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_11" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_9" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_10" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_11" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_9" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_10" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_11" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_9" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_10" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_11" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_9" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_10" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_11" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_9" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_10" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_11" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_9" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_10" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_11" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_9" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_10" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_11" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_9" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_10" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_11" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_9" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_10" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_11" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_9" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_10" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_11" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_9" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_10" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_11" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_9" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_10" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_11" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_9" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_10" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_11" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_9" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_10" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_11" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_9" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_10" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_11" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_9" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_10" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_11" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_9" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_10" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_11" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_9" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_10" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_11" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_9" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_10" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_11" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_9" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_10" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_11" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_9" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_10" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_11" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_9" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_10" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_11" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_9" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_10" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_11" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_9" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_10" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_11" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_9" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_10" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_11" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_0" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_9" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_10" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_11" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_0" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_9" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_10" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_11" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_0" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_9" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_10" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_11" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_0" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_9" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_10" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_11" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_0" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_9" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_10" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_11" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_0" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_9" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_10" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_11" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_0" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_9" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_10" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_11" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_0" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_9" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_10" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_11" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_0" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_9" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_10" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_11" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_0" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_9" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_10" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_11" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_0" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_9" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_10" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_11" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_0" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_9" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_10" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_11" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_9" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_10" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_11" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_9" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_10" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_11" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_9" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_10" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_11" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_9" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_10" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_11" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_9" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_10" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_11" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_9" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_10" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_11" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_9" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_10" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_11" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_9" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_10" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_11" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_9" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_10" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_11" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_9" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_10" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_11" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_9" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_10" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_11" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_9" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_10" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_11" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_9" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_10" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_11" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_9" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_10" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_11" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_9" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_10" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_11" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_9" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_10" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_11" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_9" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_10" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_11" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_9" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_10" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_11" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_9" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_10" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_11" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_9" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_10" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_11" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_9" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_10" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_11" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_9" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_10" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_11" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_9" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_10" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_11" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_9" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_10" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_11" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_9" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_10" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_11" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_9" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_10" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_11" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_9" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_10" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_11" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_9" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_10" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_11" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_9" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_10" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_11" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_9" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_10" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_11" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_9" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_10" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_11" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_9" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_10" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_11" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_9" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_10" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_11" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_9" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_10" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_11" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_9" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_10" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_11" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_9" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_10" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_11" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_9" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_10" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_11" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_9" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_10" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_11" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_9" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_10" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_11" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_9" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_10" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_11" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_9" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_10" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_11" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_9" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_10" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_11" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_9" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_10" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_11" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_9" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_10" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_11" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_9" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_10" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_11" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_9" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_10" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_11" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_9" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_10" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_11" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_9" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_10" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_11" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_9" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_10" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_11" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_9" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_10" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_11" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_9" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_10" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_11" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_9" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_10" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_11" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_9" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_10" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_11" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_9" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_10" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_11" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_9" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_10" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_11" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_9" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_10" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_11" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_9" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_10" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_11" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_9" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_10" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_11" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_9" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_10" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_11" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_9" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_10" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_11" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_9" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_10" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_11" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_9" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_10" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_11" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_9" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_10" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_11" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_9" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_10" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_11" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_9" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_10" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_11" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_9" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_10" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_11" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_9" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_10" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_11" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_9" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_10" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_6", + "CMT_TOP_LOGIC_OUTS_L_B0_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_0", + "CMT_TOP_LOGIC_OUTS_L_B2_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_1", + "CMT_TOP_LOGIC_OUTS_L_B2_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "CMT_TOP_LOGIC_OUTS_L_B2_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_10", + "CMT_TOP_LOGIC_OUTS_L_B2_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_0", + "CMT_TOP_LOGIC_OUTS_L_B3_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_1", + "CMT_TOP_LOGIC_OUTS_L_B3_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_2", + "CMT_TOP_LOGIC_OUTS_L_B3_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_3", + "CMT_TOP_LOGIC_OUTS_L_B3_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_4", + "CMT_TOP_LOGIC_OUTS_L_B3_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_5", + "CMT_TOP_LOGIC_OUTS_L_B3_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_8", + "CMT_TOP_LOGIC_OUTS_L_B3_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_9", + "CMT_TOP_LOGIC_OUTS_L_B3_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_10", + "CMT_TOP_LOGIC_OUTS_L_B3_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_6", + "CMT_TOP_LOGIC_OUTS_L_B4_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_0", + "CMT_TOP_LOGIC_OUTS_L_B6_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_1", + "CMT_TOP_LOGIC_OUTS_L_B6_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_2", + "CMT_TOP_LOGIC_OUTS_L_B6_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_3", + "CMT_TOP_LOGIC_OUTS_L_B6_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_4", + "CMT_TOP_LOGIC_OUTS_L_B6_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_5", + "CMT_TOP_LOGIC_OUTS_L_B6_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_8", + "CMT_TOP_LOGIC_OUTS_L_B6_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_9", + "CMT_TOP_LOGIC_OUTS_L_B6_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_10", + "CMT_TOP_LOGIC_OUTS_L_B6_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_0", + "CMT_TOP_LOGIC_OUTS_L_B7_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_1", + "CMT_TOP_LOGIC_OUTS_L_B7_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "CMT_TOP_LOGIC_OUTS_L_B7_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_10", + "CMT_TOP_LOGIC_OUTS_L_B7_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_0", + "CMT_TOP_LOGIC_OUTS_L_B10_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_1", + "CMT_TOP_LOGIC_OUTS_L_B10_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "CMT_TOP_LOGIC_OUTS_L_B10_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_0", + "CMT_TOP_LOGIC_OUTS_L_B14_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_1", + "CMT_TOP_LOGIC_OUTS_L_B14_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_2", + "CMT_TOP_LOGIC_OUTS_L_B14_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_3", + "CMT_TOP_LOGIC_OUTS_L_B14_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_4", + "CMT_TOP_LOGIC_OUTS_L_B14_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_5", + "CMT_TOP_LOGIC_OUTS_L_B14_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_8", + "CMT_TOP_LOGIC_OUTS_L_B14_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_9", + "CMT_TOP_LOGIC_OUTS_L_B14_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_10", + "CMT_TOP_LOGIC_OUTS_L_B14_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_0", + "CMT_TOP_LOGIC_OUTS_L_B15_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_1", + "CMT_TOP_LOGIC_OUTS_L_B15_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "CMT_TOP_LOGIC_OUTS_L_B15_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "CMT_TOP_LOGIC_OUTS_L_B15_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_10", + "CMT_TOP_LOGIC_OUTS_L_B15_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_0", + "CMT_TOP_LOGIC_OUTS_L_B16_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_1", + "CMT_TOP_LOGIC_OUTS_L_B16_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_2", + "CMT_TOP_LOGIC_OUTS_L_B16_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_3", + "CMT_TOP_LOGIC_OUTS_L_B16_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_4", + "CMT_TOP_LOGIC_OUTS_L_B16_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_5", + "CMT_TOP_LOGIC_OUTS_L_B16_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "CMT_TOP_LOGIC_OUTS_L_B16_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_9", + "CMT_TOP_LOGIC_OUTS_L_B16_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_10", + "CMT_TOP_LOGIC_OUTS_L_B16_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_0", + "CMT_TOP_LOGIC_OUTS_L_B17_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "CMT_TOP_LOGIC_OUTS_L_B17_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_10", + "CMT_TOP_LOGIC_OUTS_L_B17_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_11", + "CMT_TOP_LOGIC_OUTS_L_B17_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_0", + "CMT_TOP_LOGIC_OUTS_L_B18_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_1", + "CMT_TOP_LOGIC_OUTS_L_B18_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_0", + "CMT_TOP_LOGIC_OUTS_L_B21_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_1", + "CMT_TOP_LOGIC_OUTS_L_B21_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "CMT_TOP_LOGIC_OUTS_L_B21_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "CMT_TOP_LOGIC_OUTS_L_B21_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "CMT_TOP_LOGIC_OUTS_L_B21_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "CMT_TOP_LOGIC_OUTS_L_B21_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_10", + "CMT_TOP_LOGIC_OUTS_L_B21_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_0", + "CMT_TOP_LOGIC_OUTS_L_B23_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_1", + "CMT_TOP_LOGIC_OUTS_L_B23_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "CMT_TOP_LOGIC_OUTS_L_B23_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_9" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_R_PHASER_OUT_C_RDCLK_FIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_R_PHASER_OUT_C_RDENABLE_FIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_R_PHASER_IN_C_WRCLK_FIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_PHASER_IN_C_WRENABLE_FIFO" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_0" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_2" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_4" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_6" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_8" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_10" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_0" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_2" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_4" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_6" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_8" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_10" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_9" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_10" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_11" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_9" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_10" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_11" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_9" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_10" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_11" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_9" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_10" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_11" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_9" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_10" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_11" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_9" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_10" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_11" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_9" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_10" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_11" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_9" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_10" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_11" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_9" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_10" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_11" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_9" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_10" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_11" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_9" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_10" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_11" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_9" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_10" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_11" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_9" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_10" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_11" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_9" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_10" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_11" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_9" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_10" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_11" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_9" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_10" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_11" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_9" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_10" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_11" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_9" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_10" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_11" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_9" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_10" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_11" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_9" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_10" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_11" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_9" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_10" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_11" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_9" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_10" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_11" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_9" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_10" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_11" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_9" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_10" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_11" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_9" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_10" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_11" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_9" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_10" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_11" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_9" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_10" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_11" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_9" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_10" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_11" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_9" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_10" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_11" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_9" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_10" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_11" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_9" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_10" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_11" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_9" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_10" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_11" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_9" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_10" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_11" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_9" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_10" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_11" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_9" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_10" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_11" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_9" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_10" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_11" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_9" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_10" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_11" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_9" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_10" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_11" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_9" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_10" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_11" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_9" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_10" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_11" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_9" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_10" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_11" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_9" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_10" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_11" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_9" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_10" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_11" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_9" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_10" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_11" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_9" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_10" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_11" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_9" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_10" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_11" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_9" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_10" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_11" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_9" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_10" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_11" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_9" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_10" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_11" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_9" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_10" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_11" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_9" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_10" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_11" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_9" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_10" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_11" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_9" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_10" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_11" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_9" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_10" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_11" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_9" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_10" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_11" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_9" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_10" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_11" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_9" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_10" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_11" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_9" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_10" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_11" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_9" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_10" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_11" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_9" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_10" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_11" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_9" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_10" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_11" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_9" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_10" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_11" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_9" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_10" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_11" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_9" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_10" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_11" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_9" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_10" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_11" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_9" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_10" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_11" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_9" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_10" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_11" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_9" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_10" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_11" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_9" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_10" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_11" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_9" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_10" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_11" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_9" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_10" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_11" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_9" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_10" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_11" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_9" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_10" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_11" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_9" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_10" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_11" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_9" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_10" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_11" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_9" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_10" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_11" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_9" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_10" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_11" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_9" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_10" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_11" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_9" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_10" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_11" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_0" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_8" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_9" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_10" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_11" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_PHASER_UP_DQS_TO_PHASER_C" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CMT_FIFO_L", + "CMT_TOP_L_UPPER_T" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_9" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_10" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_11" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_9" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_10" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_11" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_9" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_10" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_11" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_9" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_10" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_11" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_9" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_10" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_11" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_9" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_10" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_11" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_9" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_10" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_11" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_9" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_10" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_11" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_9" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_10" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_11" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_9" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_10" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_11" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_9" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_10" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_11" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_9" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_10" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_11" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_9" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_10" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_11" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_9" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_10" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_11" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_9" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_10" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_11" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_9" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_10" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_11" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_9" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_10" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_11" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_9" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_10" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_11" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_9" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_10" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_11" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_9" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_10" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_11" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_9" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_10" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_11" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_9" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_10" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_11" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_9" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_10" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_11" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_9" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_10" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_11" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_9" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_10" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_11" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_9" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_10" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_11" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_9" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_10" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_11" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_9" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_10" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_11" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_9" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_10" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_11" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_9" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_10" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_11" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_9" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_10" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_11" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_9" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_10" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_11" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_0" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_9" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_10" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_11" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_0" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_9" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_10" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_11" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_0" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_9" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_10" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_11" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_0" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_9" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_10" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_11" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_0" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_9" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_10" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_11" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_0" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_9" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_10" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_11" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_0" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_9" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_10" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_11" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_0" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_9" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_10" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_11" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_0" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_9" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_10" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_11" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_0" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_9" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_10" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_11" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_0" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_9" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_10" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_11" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_0" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_9" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_10" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_11" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_9" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_10" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_11" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_9" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_10" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_11" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_9" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_10" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_11" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_9" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_10" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_11" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_9" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_10" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_11" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_9" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_10" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_11" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_9" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_10" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_11" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_9" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_10" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_11" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_9" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_10" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_11" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_9" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_10" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_11" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_9" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_10" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_11" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_9" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_10" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_11" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_9" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_10" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_11" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_9" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_10" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_11" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_9" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_10" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_11" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_9" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_10" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_11" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_9" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_10" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_11" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_9" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_10" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_11" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_9" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_10" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_11" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_9" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_10" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_11" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_9" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_10" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_11" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_9" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_10" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_11" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_9" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_10" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_11" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_9" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_10" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_11" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_9" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_10" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_11" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_9" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_10" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_11" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_9" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_10" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_11" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_9" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_10" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_11" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_9" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_10" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_11" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_9" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_10" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_11" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_9" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_10" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_11" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_9" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_10" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_11" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_9" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_10" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_11" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_9" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_10" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_11" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_9" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_10" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_11" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_9" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_10" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_11" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_9" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_10" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_11" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_9" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_10" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_11" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_9" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_10" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_11" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_9" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_10" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_11" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_9" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_10" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_11" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_9" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_10" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_11" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_9" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_10" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_11" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_9" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_10" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_11" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_9" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_10" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_11" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_9" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_10" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_11" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_9" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_10" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_11" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_9" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_10" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_11" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_9" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_10" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_11" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_9" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_10" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_11" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_9" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_10" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_11" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_9" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_10" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_11" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_9" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_10" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_11" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_9" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_10" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_11" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_9" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_10" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_11" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_9" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_10" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_11" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_9" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_10" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_11" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_9" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_10" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_11" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_9" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_10" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_11" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_9" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_10" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_11" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_9" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_10" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_11" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_9" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_10" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_11" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_9" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_10" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_11" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_9" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_10" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_11" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_9" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_10" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_11" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_9" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_10" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_11" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_9" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_10" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_11" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_9" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_10" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "CMT_TOP_LOGIC_OUTS_L_B2_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "CMT_TOP_LOGIC_OUTS_L_B7_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "CMT_TOP_LOGIC_OUTS_L_B7_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "CMT_TOP_LOGIC_OUTS_L_B10_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "CMT_TOP_LOGIC_OUTS_L_B15_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "CMT_TOP_LOGIC_OUTS_L_B15_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "CMT_TOP_LOGIC_OUTS_L_B15_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "CMT_TOP_LOGIC_OUTS_L_B16_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "CMT_TOP_LOGIC_OUTS_L_B16_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "CMT_TOP_LOGIC_OUTS_L_B16_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_11", + "CMT_TOP_LOGIC_OUTS_L_B16_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "CMT_TOP_LOGIC_OUTS_L_B17_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "CMT_TOP_LOGIC_OUTS_L_B17_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "CMT_TOP_LOGIC_OUTS_L_B21_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "CMT_TOP_LOGIC_OUTS_L_B21_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "CMT_TOP_LOGIC_OUTS_L_B21_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_11", + "CMT_TOP_LOGIC_OUTS_L_B21_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "CMT_TOP_LOGIC_OUTS_L_B23_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_9" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_PLL_PHASER_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_PLL_PHASER_RDENABLE_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_PLL_PHASER_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_PLL_PHASER_WRENABLE_TOFIFO" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_0" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_2" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_4" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_6" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_8" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_10" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_0" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_2" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_4" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_6" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_8" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_10" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_9" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_10" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_11" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_9" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_10" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_11" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_9" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_10" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_11" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_9" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_10" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_11" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_9" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_10" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_11" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_9" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_10" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_11" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_9" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_10" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_11" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_9" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_10" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_11" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_9" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_10" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_11" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_9" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_10" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_11" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_9" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_10" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_11" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_9" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_10" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_11" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_9" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_10" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_11" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_9" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_10" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_11" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_9" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_10" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_11" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_9" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_10" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_11" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_9" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_10" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_11" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_9" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_10" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_11" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_9" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_10" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_11" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_9" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_10" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_11" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_9" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_10" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_11" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_9" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_10" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_11" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_9" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_10" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_11" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_9" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_10" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_11" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_9" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_10" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_11" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_9" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_10" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_11" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_9" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_10" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_11" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_9" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_10" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_11" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_9" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_10" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_11" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_9" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_10" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_11" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_9" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_10" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_11" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_9" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_10" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_11" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_9" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_10" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_11" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_9" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_10" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_11" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_9" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_10" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_11" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_9" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_10" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_11" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_9" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_10" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_11" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_9" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_10" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_11" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_9" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_10" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_11" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_9" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_10" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_11" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_9" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_10" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_11" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_9" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_10" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_11" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_9" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_10" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_11" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_9" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_10" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_11" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_9" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_10" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_11" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_9" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_10" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_11" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_9" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_10" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_11" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_9" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_10" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_11" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_9" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_10" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_11" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_9" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_10" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_11" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_9" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_10" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_11" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_9" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_10" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_11" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_9" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_10" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_11" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_9" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_10" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_11" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_9" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_10" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_11" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_9" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_10" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_11" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_9" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_10" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_11" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_9" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_10" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_11" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_9" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_10" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_11" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_9" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_10" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_11" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_9" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_10" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_11" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_9" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_10" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_11" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_9" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_10" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_11" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_9" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_10" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_11" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_9" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_10" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_11" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_9" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_10" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_11" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_9" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_10" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_11" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_9" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_10" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_11" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_9" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_10" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_11" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_9" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_10" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_11" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_9" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_10" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_11" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_9" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_10" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_11" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_9" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_10" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_11" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_9" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_10" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_11" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_9" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_10" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_11" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_9" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_10" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_11" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_9" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_10" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_11" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_9" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_10" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_11" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_9" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_10" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_11" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_0" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_8" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_9" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_10" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_11" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_PLL_DQS_TO_PHASER_D" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_11", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_11", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_11", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_11", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_11", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_11", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_11", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_11", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_11", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_11", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_11", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_11", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_11", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_11", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_11", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_11", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_11", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_11", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_11", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_11", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_11", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_11", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_11", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_11", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_11", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_11", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_11", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_11", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_11", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_11", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_11", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_11", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_11", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_11", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_11", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_11", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_11", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_11", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_11", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_11", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_11", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_11", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_11", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_11", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_11", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_11", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_11", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_11", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_11", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_11", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_11", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_11", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_11", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_NE2A0_11", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_11", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_11", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_11", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_11", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_11", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_11", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_11", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_11", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_11", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_11", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_11", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_11", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_11", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_11", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_11", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_11", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_11", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_11", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_11", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_11", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_11", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_11", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_11", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_11", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_11", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_11", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_11", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_11", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_11", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_11", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_11", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_11", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_11", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_11", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_11", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_11", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_11", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_11", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_11", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_11", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_11", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_11", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_11", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_11", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_11", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_11", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_11", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_11", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_11", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_11", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_11", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_11", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_11", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_11", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_11", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_11", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_11", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_11", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_11", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_11", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_11", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_11", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_11", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_11", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_11", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_11", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_11", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_11", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_11", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_11", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_11", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_10", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_10", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_10", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_10", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_10", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_10", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_10", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_10", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_10", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_10", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_10", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_10", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_10", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_10", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_10", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_10", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_10", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_10", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_10", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_10", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_10", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_10", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_10", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_10", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_10", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_10", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_10", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_10", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_10", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_10", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_10", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_10", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_10", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_10", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_10", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_10", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_10", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_10", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_10", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_10", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_10", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_10", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_10", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_10", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_10", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_10", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_10", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_10", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_10", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_10", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_10", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_10", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_10", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_10", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_10", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_10", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_10", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_10", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_10", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_10", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_10", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_10", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_10", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_10", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_10", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_10", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_10", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_10", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_10", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_10", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_10", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_10", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_10", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_10", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_10", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_10", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_10", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_10", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_10", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_10", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_10", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_10", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_10", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_10", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_10", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_10", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_10", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_10", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_10", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_10", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_10", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_10", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_10", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_10", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_10", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_10", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_10", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_10", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_10", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_10", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_10", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_10", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_10", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_10", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_10", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_10", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_10", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_10", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_10", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_10", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_10", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_10", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_10", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_10", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_10", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_10", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_10", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_10", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_10", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_10", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_10", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_10", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_10", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_10", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_10", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_10", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_10", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_10", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_10", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_10", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_5", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_9", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_9", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_9", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_9", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_9", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_9", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_9", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_9", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_9", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_9", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_9", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_9", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_9", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_9", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_9", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_9", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_9", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_9", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_9", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_9", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_9", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_9", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_9", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_9", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_9", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_9", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_9", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_9", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_9", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_9", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_9", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_9", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_9", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_9", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_9", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_9", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_9", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_9", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_9", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_9", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_9", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_9", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_9", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_9", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_9", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_9", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_9", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_9", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_9", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_9", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_NE2A0_9", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_9", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_9", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_9", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_9", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_9", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_9", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_9", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_9", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_9", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_9", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_9", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_9", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_9", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_9", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_9", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_9", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_9", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_9", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_9", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_9", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_9", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_9", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_9", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_9", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_9", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_9", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_9", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_9", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_9", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_9", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_9", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_9", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_9", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_9", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_9", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_9", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_9", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_9", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_9", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_9", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_9", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_9", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_9", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_9", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_9", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_9", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_9", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_9", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_9", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_9", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_9", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_9", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_9", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_9", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_9", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_9", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_9", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_9", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_9", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_9", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_9", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_9", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_9", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_9", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_9", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_9", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_9", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_9", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_9", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_9", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_9", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_8", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_8", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_8", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_8", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_8", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_8", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_8", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_8", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_8", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_8", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_8", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_8", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_8", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_8", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_8", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_8", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_8", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_8", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_8", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_8", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_8", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_8", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_8", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_8", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_8", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_8", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_8", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_8", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_8", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_8", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_8", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_8", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_8", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_8", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_8", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_8", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_8", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_8", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_8", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_8", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_8", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_8", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_8", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_8", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_8", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_8", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_8", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_8", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_8", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_8", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_8", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_8", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_8", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_8", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_8", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_8", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_8", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_8", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_8", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_8", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_8", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_8", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_8", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_8", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_8", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_8", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_8", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_8", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_8", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_8", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_8", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_8", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_8", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_8", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_8", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_8", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_8", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_8", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_8", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_8", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_8", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_8", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_8", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_8", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_8", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_8", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_8", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_8", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_8", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_8", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_8", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_8", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_8", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_8", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_8", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_8", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_8", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_8", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_8", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_8", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_8", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_8", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_8", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_8", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_8", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_8", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_8", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_8", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_8", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_8", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_8", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_8", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_8", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_8", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_8", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_8", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_8", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_8", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_8", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_8", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_8", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_3", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_7", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_7", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_7", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_7", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_7", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_7", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_7", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_7", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_7", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_7", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_7", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_7", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_7", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_7", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_7", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_7", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_7", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_7", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_7", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_7", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_7", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_7", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_7", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_7", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_7", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_7", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_7", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_7", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_7", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_7", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_7", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_7", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_7", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_7", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_7", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_7", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_7", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_7", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_7", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_7", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_7", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_7", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_7", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_7", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_7", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_7", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_NE2A0_7", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_7", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_7", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_7", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_7", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_7", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_7", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_7", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_7", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_7", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_7", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_7", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_7", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_7", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_7", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_7", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_7", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_7", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_7", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_7", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_7", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_7", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_7", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_7", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_7", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_7", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_7", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_7", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_7", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_7", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_7", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_7", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_7", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_7", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_7", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_7", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_7", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_7", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_7", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_7", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_7", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_7", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_7", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_7", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_7", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_7", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_7", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_7", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_7", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_7", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_7", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_7", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_7", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_7", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_7", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_7", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_7", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_7", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_7", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_7", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_7", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_7", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_7", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_7", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_7", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_7", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_7", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_7", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_7", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_7", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_7", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_7", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_6", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_6", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_6", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_6", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_6", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_6", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_6", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_6", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_6", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_6", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_6", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_6", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_6", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_6", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_6", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_6", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_6", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_6", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_6", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_6", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_6", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_5", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_5", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_5", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_5", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_5", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_5", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_5", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_5", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_5", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_5", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_5", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_5", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_5", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_5", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_5", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_5", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_5", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_5", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_5", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_5", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_5", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_5", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_4", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_4", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_4", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_4", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_4", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_22", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_3", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_3", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_3", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_3", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_2", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_2", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_2", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_2", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_2", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_44", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_1", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_1", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_1", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_1", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_1", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_1", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_1", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_1", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_1", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_1", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_1", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 6 + ], + "tile_types": [ + "CMT_FIFO_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_0", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_0", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_0", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_0", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_0", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_0", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_0", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_0", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_0", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_0", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_0", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_0", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_0", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_66", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CMT_FIFO_R", + "CMT_TOP_R_LOWER_B" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_9" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_10" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_11" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_12" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_9" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_10" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_11" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_12" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_9" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_10" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_11" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_12" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_9" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_10" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_11" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_12" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_9" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_10" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_11" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_12" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_9" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_10" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_11" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_12" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_9" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_10" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_11" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_12" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_9" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_10" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_11" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_12" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_9" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_10" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_11" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_12" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_9" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_10" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_11" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_12" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_9" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_10" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_11" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_12" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_9" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_10" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_11" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_12" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_9" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_10" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_11" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_12" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_9" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_10" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_11" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_12" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_9" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_10" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_11" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_12" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_9" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_10" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_11" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_12" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_9" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_10" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_11" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_12" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_9" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_10" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_11" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_12" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_9" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_10" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_11" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_12" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_9" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_10" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_11" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_12" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_9" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_10" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_11" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_12" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_9" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_10" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_11" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_12" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_9" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_10" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_11" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_12" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_9" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_10" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_11" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_12" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_9" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_10" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_11" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_12" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_9" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_10" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_11" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_12" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_9" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_10" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_11" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_12" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_9" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_10" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_11" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_12" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_9" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_10" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_11" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_12" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_9" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_10" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_11" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_12" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_9" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_10" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_11" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_12" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_9" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_10" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_11" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_12" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_9" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_10" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_11" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_12" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_9" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_10" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_11" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_12" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_9" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_10" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_11" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_12" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_9" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_10" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_11" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_12" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_9" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_10" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_11" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_12" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_9" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_10" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_11" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_12" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_9" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_10" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_11" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_12" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_9" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_10" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_11" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_12" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_9" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_10" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_11" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_12" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_9" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_10" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_11" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_12" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_9" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_10" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_11" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_12" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_9" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_10" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_11" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_12" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_9" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_10" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_11" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_12" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_9" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_10" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_11" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_12" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_9" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_10" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_11" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_12" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_9" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_10" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_11" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_12" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_9" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_10" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_11" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_12" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_9" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_10" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_11" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_12" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_9" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_10" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_11" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_12" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_9" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_10" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_11" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_12" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_9" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_10" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_11" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_12" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_9" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_10" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_11" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_12" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_9" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_10" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_11" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_12" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_9" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_10" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_11" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_12" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_9" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_10" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_11" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_12" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_9" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_10" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_11" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_12" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_9" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_10" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_11" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_12" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_9" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_10" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_11" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_12" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_9" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_10" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_11" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_12" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_9" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_10" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_11" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_12" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_9" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_10" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_11" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_12" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_9" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_10" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_11" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_12" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_9" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_10" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_11" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_12" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_9" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_10" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_11" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_12" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_9" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_10" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_11" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_12" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_9" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_10" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_11" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_12" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_9" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_10" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_11" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_12" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_9" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_10" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_11" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_12" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_9" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_10" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_11" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_12" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_9" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_10" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_11" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_12" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_9" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_10" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_11" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_12" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_9" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_10" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_11" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_12" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_9" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_10" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_11" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_12" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_9" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_10" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_11" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_12" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_9" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_10" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_11" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_12" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_9" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_10" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_11" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_12" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_9" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_10" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_11" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_12" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_9" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_10" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_11" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_12" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_9" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_10" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_11" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_12" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_9" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_10" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_11" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_12" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_9" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_10" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_11" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_12" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_9" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_10" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_11" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_12" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_9" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_10" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_11" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_12" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_9" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_10" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_11" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_12" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_9" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_10" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_11" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_12" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_9" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_10" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_11" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_12" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_9" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_10" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_11" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_12" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_9" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_10" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_11" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_12" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_9" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_10" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_11" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_12" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_9" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_10" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_11" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_12" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_9" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_10" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_11" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_12" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_9" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_10" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_11" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_12" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_9" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_10" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_11" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_12" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_9" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_10" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_11" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_12" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_9" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_10" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_11" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_12" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_9" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_10" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_11" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_12" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_9" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_10" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_11" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_12" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_9" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_10" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_11" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_12" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_9" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_10" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_11" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_12" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_9" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_10" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_11" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_12" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_9" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_10" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_11" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_12" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_9" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_10" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_11" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_12" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_9" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_10" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_11" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_12" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_9" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_10" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_11" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_12" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_9" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_10" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_11" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_12" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_9" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_10" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_11" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_12" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_9" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_10" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_11" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_12" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_9" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_10" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_11" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_12" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_9" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_10" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_11" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_12" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_9" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_10" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_11" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "CMT_TOP_LOGIC_OUTS_L_B7_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "CMT_TOP_LOGIC_OUTS_L_B15_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "CMT_TOP_LOGIC_OUTS_L_B15_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "CMT_TOP_LOGIC_OUTS_L_B15_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_0", + "CMT_TOP_LOGIC_OUTS_L_B16_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_1", + "CMT_TOP_LOGIC_OUTS_L_B16_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "CMT_TOP_LOGIC_OUTS_L_B16_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "CMT_TOP_LOGIC_OUTS_L_B16_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "CMT_TOP_LOGIC_OUTS_L_B17_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_0", + "CMT_TOP_LOGIC_OUTS_L_B18_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_1", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_0", + "CMT_TOP_LOGIC_OUTS_L_B21_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "CMT_TOP_LOGIC_OUTS_L_B21_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "CMT_TOP_LOGIC_OUTS_L_B21_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "CMT_TOP_LOGIC_OUTS_L_B21_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_10" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_MMCM_A_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_MMCM_A_RDEN_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_MMCM_A_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_MMCM_A_WREN_TOFIFO" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_1" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_3" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_5" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_7" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_9" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_11" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_1" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_3" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_5" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_7" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_9" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_11" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_9" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_10" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_11" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_12" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_9" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_10" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_11" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_12" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_9" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_10" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_11" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_12" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_9" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_10" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_11" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_12" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_9" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_10" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_11" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_12" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_9" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_10" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_11" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_12" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_9" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_10" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_11" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_12" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_9" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_10" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_11" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_12" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_9" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_10" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_11" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_12" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_9" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_10" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_11" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_12" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_9" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_10" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_11" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_12" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_9" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_10" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_11" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_12" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_9" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_10" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_11" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_12" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_9" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_10" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_11" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_12" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_9" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_10" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_11" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_12" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_9" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_10" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_11" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_12" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_9" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_10" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_11" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_12" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_9" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_10" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_11" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_12" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_9" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_10" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_11" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_12" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_9" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_10" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_11" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_12" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_9" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_10" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_11" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_12" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_9" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_10" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_11" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_12" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_9" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_10" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_11" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_12" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_9" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_10" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_11" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_12" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_12" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_9" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_10" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_11" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_12" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_9" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_10" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_11" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_12" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_9" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_10" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_11" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_12" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_9" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_10" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_11" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_12" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_9" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_10" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_11" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_12" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_9" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_10" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_11" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_12" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_9" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_10" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_11" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_12" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_9" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_10" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_11" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_12" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_9" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_10" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_11" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_12" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_9" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_10" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_11" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_12" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_9" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_10" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_11" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_12" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_9" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_10" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_11" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_12" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_9" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_10" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_11" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_12" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_9" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_10" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_11" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_12" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_9" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_10" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_11" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_12" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_9" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_10" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_11" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_12" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_9" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_10" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_11" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_12" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_9" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_10" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_11" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_12" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_9" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_10" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_11" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_12" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_9" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_10" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_11" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_12" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_9" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_10" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_11" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_12" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_9" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_10" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_11" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_12" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_9" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_10" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_11" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_12" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_9" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_10" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_11" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_12" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_9" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_10" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_11" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_12" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_9" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_10" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_11" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_12" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_9" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_10" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_11" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_12" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_9" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_10" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_11" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_12" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_9" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_10" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_11" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_12" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_9" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_10" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_11" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_12" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_9" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_10" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_11" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_12" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_9" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_10" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_11" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_12" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_9" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_10" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_11" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_12" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_9" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_10" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_11" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_12" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_9" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_10" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_11" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_12" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_9" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_10" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_11" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_12" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_9" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_10" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_11" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_12" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_9" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_10" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_11" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_12" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_9" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_10" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_11" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_12" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_9" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_10" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_11" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_12" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_9" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_10" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_11" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_12" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_9" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_10" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_11" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_12" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_9" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_10" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_11" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_12" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_9" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_10" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_11" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_12" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_9" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_10" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_11" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_12" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_9" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_10" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_11" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_12" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_9" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_10" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_11" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_12" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_9" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_10" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_11" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_12" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_9" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_10" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_11" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_12" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_9" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_10" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_11" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_12" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_9" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_10" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_11" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_12" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_9" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_10" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_11" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_12" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_9" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_10" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_11" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_12" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_9" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_10" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_11" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_12" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_9" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_10" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_11" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_12" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_8" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_9" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_10" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_11" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_12" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_MMCM_DQS_TO_PHASERA" + ] + ] + }, + { + "grid_deltas": [ + 1, + 11 + ], + "tile_types": [ + "CMT_FIFO_R", + "CMT_TOP_R_LOWER_B" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_13" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_14" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_15" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_13" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_14" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_15" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_13" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_14" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_15" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_13" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_14" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_15" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_13" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_14" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_15" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_13" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_14" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_15" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_13" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_14" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_15" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_13" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_14" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_15" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_13" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_14" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_15" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_13" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_14" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_15" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_13" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_14" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_15" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_13" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_14" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_15" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_13" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_14" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_15" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_13" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_14" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_15" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_13" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_14" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_15" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_13" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_14" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_15" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_13" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_14" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_15" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_13" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_14" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_15" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_13" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_14" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_15" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_13" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_14" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_15" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_13" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_14" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_15" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_13" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_14" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_15" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_13" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_14" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_15" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_13" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_14" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_15" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_13" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_14" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_15" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_13" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_14" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_15" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_13" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_14" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_15" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_13" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_14" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_15" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_13" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_14" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_15" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_13" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_14" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_15" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_13" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_14" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_15" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_13" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_14" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_15" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_13" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_14" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_15" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_13" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_14" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_15" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_13" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_14" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_15" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_13" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_14" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_15" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_13" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_14" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_15" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_13" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_14" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_15" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_13" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_14" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_15" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_13" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_14" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_15" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_13" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_14" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_15" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_13" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_14" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_15" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_13" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_14" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_15" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_13" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_14" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_15" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_13" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_14" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_15" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_13" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_14" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_15" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_13" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_14" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_15" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_13" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_14" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_15" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_13" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_14" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_15" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_13" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_14" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_15" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_13" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_14" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_15" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_13" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_14" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_15" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_13" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_14" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_15" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_13" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_14" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_15" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_13" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_14" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_15" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_13" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_14" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_15" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_13" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_14" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_15" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_13" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_14" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_15" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_13" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_14" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_15" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_13" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_14" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_15" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_13" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_14" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_15" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_13" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_14" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_15" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_13" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_14" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_15" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_13" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_14" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_15" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_13" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_14" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_15" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_13" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_14" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_15" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_13" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_14" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_15" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_13" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_14" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_15" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_13" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_14" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_15" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_13" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_14" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_15" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_13" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_14" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_15" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_13" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_14" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_15" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_13" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_14" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_15" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_13" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_14" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_15" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_13" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_14" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_15" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_13" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_14" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_15" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_13" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_14" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_15" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_13" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_14" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_15" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_13" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_14" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_15" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_13" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_14" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_15" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_13" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_14" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_15" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_13" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_14" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_15" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_13" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_14" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_15" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_13" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_14" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_15" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_13" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_14" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_15" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_13" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_14" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_15" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_13" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_14" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_15" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_13" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_14" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_15" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_13" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_14" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_15" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_13" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_14" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_15" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_13" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_14" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_15" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_13" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_14" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_15" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_13" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_14" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_15" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_13" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_14" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_15" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_13" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_14" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_15" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_13" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_14" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_15" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_13" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_14" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_15" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_13" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_14" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_15" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_13" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_14" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_15" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_13" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_14" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_15" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_13" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_14" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_15" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_13" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_14" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_15" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_13" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_14" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_15" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_13" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_14" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_15" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_13" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_14" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_15" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_13" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_14" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_15" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_13" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_14" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_15" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_13" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_14" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_15" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_13" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_14" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_15" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_13" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_14" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_15" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_13" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_14" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_15" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_13" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_14" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_15" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_13" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_15" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_13" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_15" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_13" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_14" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_15" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_13" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_14" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_15" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_13" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_14" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_15" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_13" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_14" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_15" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_13" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_14" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_15" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_13" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_14" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_15" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_13" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_14" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_15" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_13" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_14" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_15" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_13" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_14" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_15" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_13" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_14" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_15" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_13" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_14" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_15" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_13" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_14" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_15" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_13" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_14" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_15" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_13" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_14" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_15" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_13" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_14" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_15" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_13" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_14" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_15" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_13" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_14" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_15" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_13" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_14" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_15" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_13" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_14" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_15" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_13" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_14" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_15" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_13" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_14" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_15" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_13" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_14" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_15" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_13" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_14" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_15" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_13" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_14" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_15" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_13" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_14" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_15" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_13" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_14" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_15" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_13" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_14" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_15" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_13" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_14" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_15" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_13" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_14" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_15" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_13" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_14" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_15" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_13" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_14" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_15" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_13" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_14" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_15" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_13" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_14" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_15" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_13" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_14" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_15" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_13" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_14" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_15" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_13" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_14" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_15" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_13" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_14" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_15" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_13" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_14" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_15" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_13" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_14" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_15" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_13" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_14" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_15" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_13" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_14" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_15" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_13" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_14" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_15" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_13" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_14" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_15" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_13" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_14" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_15" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_13" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_14" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_15" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_13" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_14" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_15" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_13" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_14" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_15" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_13" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_14" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_15" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_13" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_14" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_15" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_13" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_14" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_15" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_13" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_14" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_15" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_13" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_14" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_15" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_13" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_14" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_15" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_13" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_14" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_15" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_13" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_14" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_15" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_13" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_14" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_15" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_13" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_14" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_15" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_13" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_14" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_15" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_13" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_14" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_15" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_13" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_14" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_15" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_13" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_14" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_15" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_13" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_14" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_15" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_13" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_14" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_15" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_13" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_14" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_15" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_13" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_14" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_15" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_13" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_14" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_15" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_13" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_14" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_15" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_13" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_14" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_15" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_13" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_14" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_15" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_13" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_14" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_15" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_13" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_14" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_15" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_13" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_14" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_15" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_13" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_14" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_15" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_13" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_14" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_15" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_13" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_14" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_15" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_13" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_14" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_15" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_13" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_14" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_15" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_13" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_14" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_15" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_13" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_14" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_15" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_13" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_14" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_15" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_13" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_14" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_15" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CMT_FIFO_R", + "CMT_TOP_R_LOWER_T" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_0" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_0" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_0" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_0" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_0" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_0" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_0" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_0" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_0" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_0" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_0" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_0" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_6", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_10", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_3", + "CMT_TOP_LOGIC_OUTS_L_B3_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_4", + "CMT_TOP_LOGIC_OUTS_L_B3_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_5", + "CMT_TOP_LOGIC_OUTS_L_B3_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_8", + "CMT_TOP_LOGIC_OUTS_L_B3_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_9", + "CMT_TOP_LOGIC_OUTS_L_B3_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_10", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_6", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_3", + "CMT_TOP_LOGIC_OUTS_L_B6_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_4", + "CMT_TOP_LOGIC_OUTS_L_B6_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_5", + "CMT_TOP_LOGIC_OUTS_L_B6_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_8", + "CMT_TOP_LOGIC_OUTS_L_B6_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_9", + "CMT_TOP_LOGIC_OUTS_L_B6_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_10", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_11", + "CMT_TOP_LOGIC_OUTS_L_B6_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "CMT_TOP_LOGIC_OUTS_L_B7_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_10", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_11", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_3", + "CMT_TOP_LOGIC_OUTS_L_B14_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_4", + "CMT_TOP_LOGIC_OUTS_L_B14_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_5", + "CMT_TOP_LOGIC_OUTS_L_B14_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_8", + "CMT_TOP_LOGIC_OUTS_L_B14_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_9", + "CMT_TOP_LOGIC_OUTS_L_B14_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_10", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_10", + "CMT_TOP_LOGIC_OUTS_L_B15_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_3", + "CMT_TOP_LOGIC_OUTS_L_B16_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_4", + "CMT_TOP_LOGIC_OUTS_L_B16_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_5", + "CMT_TOP_LOGIC_OUTS_L_B16_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "CMT_TOP_LOGIC_OUTS_L_B16_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "CMT_TOP_LOGIC_OUTS_L_B16_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "CMT_TOP_LOGIC_OUTS_L_B16_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_9", + "CMT_TOP_LOGIC_OUTS_L_B16_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_10", + "CMT_TOP_LOGIC_OUTS_L_B16_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "CMT_TOP_LOGIC_OUTS_L_B17_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_10", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_11", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_10", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_10", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_11", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_PHASER_OUT_B_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_PHASER_OUT_B_RDEN_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_PHASER_IN_B_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_PHASER_IN_B_WREN_TOFIFO" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_1" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_3" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_5" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_7" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_1" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_3" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_5" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_7" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_0" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_8" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_PHASER_DOWN_DQS_TO_PHASER_B" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CMT_FIFO_R", + "CMT_TOP_R_UPPER_B" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_9" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_10" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_11" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_9" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_10" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_11" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_9" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_10" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_11" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_9" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_10" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_11" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_9" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_10" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_11" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_9" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_10" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_11" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_9" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_10" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_11" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_9" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_10" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_11" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_9" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_10" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_11" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_9" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_10" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_11" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_9" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_10" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_11" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_9" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_10" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_11" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_9" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_10" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_11" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_9" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_10" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_11" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_9" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_10" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_11" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_9" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_10" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_11" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_9" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_10" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_11" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_9" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_10" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_11" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_9" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_10" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_11" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_9" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_10" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_11" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_9" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_10" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_11" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_9" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_10" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_11" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_9" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_10" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_11" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_9" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_10" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_11" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_9" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_10" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_11" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_9" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_10" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_11" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_9" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_10" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_11" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_9" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_10" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_11" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_9" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_10" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_11" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_9" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_10" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_11" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_9" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_10" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_11" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_9" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_10" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_11" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_0" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_9" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_10" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_11" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_0" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_9" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_10" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_11" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_0" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_9" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_10" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_11" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_0" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_9" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_10" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_11" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_0" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_9" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_10" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_11" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_0" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_9" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_10" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_11" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_0" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_9" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_10" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_11" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_0" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_9" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_10" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_11" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_0" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_9" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_10" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_11" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_0" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_9" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_10" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_11" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_0" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_9" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_10" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_11" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_0" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_9" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_10" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_11" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_9" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_10" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_11" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_9" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_10" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_11" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_9" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_10" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_11" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_9" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_10" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_11" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_9" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_10" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_11" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_9" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_10" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_11" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_9" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_10" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_11" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_9" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_10" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_11" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_9" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_10" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_11" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_9" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_10" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_11" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_9" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_10" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_11" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_9" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_10" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_11" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_9" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_10" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_11" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_9" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_10" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_11" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_9" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_10" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_11" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_9" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_10" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_11" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_9" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_10" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_11" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_9" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_10" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_11" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_9" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_10" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_11" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_9" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_10" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_11" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_9" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_10" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_11" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_9" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_10" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_11" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_9" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_10" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_11" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_9" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_10" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_11" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_9" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_10" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_11" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_9" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_10" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_11" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_9" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_10" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_11" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_9" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_10" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_11" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_9" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_10" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_11" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_9" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_10" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_11" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_9" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_10" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_11" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_9" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_10" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_11" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_9" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_10" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_11" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_9" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_10" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_11" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_9" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_10" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_11" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_9" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_10" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_11" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_9" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_10" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_11" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_9" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_10" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_11" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_9" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_10" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_11" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_9" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_10" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_11" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_9" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_10" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_11" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_9" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_10" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_11" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_9" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_10" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_11" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_9" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_10" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_11" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_9" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_10" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_11" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_9" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_10" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_11" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_9" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_10" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_11" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_9" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_10" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_11" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_9" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_10" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_11" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_9" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_10" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_11" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_9" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_10" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_11" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_9" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_10" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_11" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_9" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_10" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_11" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_9" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_10" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_11" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_9" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_10" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_11" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_9" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_10" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_11" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_9" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_10" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_11" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_9" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_10" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_11" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_9" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_10" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_11" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_9" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_10" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_11" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_9" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_10" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_11" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_9" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_10" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_11" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_9" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_10" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_11" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_9" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_10" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_11" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_9" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_10" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_11" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_9" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_10" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_11" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_9" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_10" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_11" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_9" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_10" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_6", + "CMT_TOP_LOGIC_OUTS_L_B0_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_0", + "CMT_TOP_LOGIC_OUTS_L_B2_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_1", + "CMT_TOP_LOGIC_OUTS_L_B2_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "CMT_TOP_LOGIC_OUTS_L_B2_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_10", + "CMT_TOP_LOGIC_OUTS_L_B2_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_0", + "CMT_TOP_LOGIC_OUTS_L_B3_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_1", + "CMT_TOP_LOGIC_OUTS_L_B3_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_2", + "CMT_TOP_LOGIC_OUTS_L_B3_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_3", + "CMT_TOP_LOGIC_OUTS_L_B3_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_4", + "CMT_TOP_LOGIC_OUTS_L_B3_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_5", + "CMT_TOP_LOGIC_OUTS_L_B3_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_8", + "CMT_TOP_LOGIC_OUTS_L_B3_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_9", + "CMT_TOP_LOGIC_OUTS_L_B3_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_10", + "CMT_TOP_LOGIC_OUTS_L_B3_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_6", + "CMT_TOP_LOGIC_OUTS_L_B4_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_0", + "CMT_TOP_LOGIC_OUTS_L_B6_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_1", + "CMT_TOP_LOGIC_OUTS_L_B6_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_2", + "CMT_TOP_LOGIC_OUTS_L_B6_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_3", + "CMT_TOP_LOGIC_OUTS_L_B6_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_4", + "CMT_TOP_LOGIC_OUTS_L_B6_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_5", + "CMT_TOP_LOGIC_OUTS_L_B6_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_8", + "CMT_TOP_LOGIC_OUTS_L_B6_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_9", + "CMT_TOP_LOGIC_OUTS_L_B6_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_10", + "CMT_TOP_LOGIC_OUTS_L_B6_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_0", + "CMT_TOP_LOGIC_OUTS_L_B7_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_1", + "CMT_TOP_LOGIC_OUTS_L_B7_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "CMT_TOP_LOGIC_OUTS_L_B7_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_10", + "CMT_TOP_LOGIC_OUTS_L_B7_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_0", + "CMT_TOP_LOGIC_OUTS_L_B10_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_1", + "CMT_TOP_LOGIC_OUTS_L_B10_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "CMT_TOP_LOGIC_OUTS_L_B10_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_0", + "CMT_TOP_LOGIC_OUTS_L_B14_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_1", + "CMT_TOP_LOGIC_OUTS_L_B14_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_2", + "CMT_TOP_LOGIC_OUTS_L_B14_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_3", + "CMT_TOP_LOGIC_OUTS_L_B14_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_4", + "CMT_TOP_LOGIC_OUTS_L_B14_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_5", + "CMT_TOP_LOGIC_OUTS_L_B14_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_8", + "CMT_TOP_LOGIC_OUTS_L_B14_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_9", + "CMT_TOP_LOGIC_OUTS_L_B14_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_10", + "CMT_TOP_LOGIC_OUTS_L_B14_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_0", + "CMT_TOP_LOGIC_OUTS_L_B15_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_1", + "CMT_TOP_LOGIC_OUTS_L_B15_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "CMT_TOP_LOGIC_OUTS_L_B15_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "CMT_TOP_LOGIC_OUTS_L_B15_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_10", + "CMT_TOP_LOGIC_OUTS_L_B15_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_0", + "CMT_TOP_LOGIC_OUTS_L_B16_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_1", + "CMT_TOP_LOGIC_OUTS_L_B16_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_2", + "CMT_TOP_LOGIC_OUTS_L_B16_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_3", + "CMT_TOP_LOGIC_OUTS_L_B16_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_4", + "CMT_TOP_LOGIC_OUTS_L_B16_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_5", + "CMT_TOP_LOGIC_OUTS_L_B16_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "CMT_TOP_LOGIC_OUTS_L_B16_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_9", + "CMT_TOP_LOGIC_OUTS_L_B16_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_10", + "CMT_TOP_LOGIC_OUTS_L_B16_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_0", + "CMT_TOP_LOGIC_OUTS_L_B17_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "CMT_TOP_LOGIC_OUTS_L_B17_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_10", + "CMT_TOP_LOGIC_OUTS_L_B17_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_11", + "CMT_TOP_LOGIC_OUTS_L_B17_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_0", + "CMT_TOP_LOGIC_OUTS_L_B18_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_1", + "CMT_TOP_LOGIC_OUTS_L_B18_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_0", + "CMT_TOP_LOGIC_OUTS_L_B21_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_1", + "CMT_TOP_LOGIC_OUTS_L_B21_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "CMT_TOP_LOGIC_OUTS_L_B21_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "CMT_TOP_LOGIC_OUTS_L_B21_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "CMT_TOP_LOGIC_OUTS_L_B21_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "CMT_TOP_LOGIC_OUTS_L_B21_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_10", + "CMT_TOP_LOGIC_OUTS_L_B21_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_0", + "CMT_TOP_LOGIC_OUTS_L_B23_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_1", + "CMT_TOP_LOGIC_OUTS_L_B23_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "CMT_TOP_LOGIC_OUTS_L_B23_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_9" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_PHASER_OUT_C_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_PHASER_OUT_C_RDENABLE_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_PHASER_IN_C_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_PHASER_IN_C_WRENABLE_FIFO" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_0" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_2" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_4" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_6" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_8" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_10" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_0" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_2" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_4" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_6" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_8" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_10" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_9" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_10" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_11" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_9" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_10" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_11" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_9" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_10" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_11" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_9" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_10" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_11" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_9" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_10" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_11" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_9" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_10" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_11" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_9" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_10" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_11" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_9" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_10" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_11" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_9" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_10" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_11" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_9" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_10" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_11" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_9" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_10" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_11" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_9" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_10" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_11" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_9" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_10" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_11" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_9" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_10" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_11" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_9" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_10" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_11" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_9" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_10" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_11" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_9" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_10" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_11" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_9" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_10" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_11" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_9" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_10" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_11" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_9" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_10" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_11" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_9" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_10" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_11" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_9" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_10" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_11" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_9" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_10" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_11" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_9" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_10" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_11" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_9" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_10" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_11" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_9" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_10" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_11" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_9" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_10" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_11" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_9" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_10" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_11" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_9" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_10" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_11" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_9" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_10" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_11" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_9" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_10" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_11" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_9" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_10" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_11" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_9" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_10" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_11" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_9" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_10" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_11" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_9" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_10" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_11" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_9" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_10" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_11" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_9" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_10" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_11" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_9" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_10" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_11" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_9" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_10" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_11" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_9" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_10" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_11" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_9" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_10" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_11" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_9" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_10" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_11" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_9" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_10" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_11" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_9" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_10" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_11" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_9" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_10" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_11" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_9" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_10" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_11" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_9" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_10" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_11" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_9" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_10" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_11" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_9" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_10" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_11" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_9" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_10" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_11" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_9" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_10" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_11" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_9" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_10" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_11" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_9" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_10" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_11" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_9" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_10" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_11" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_9" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_10" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_11" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_9" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_10" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_11" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_9" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_10" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_11" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_9" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_10" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_11" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_9" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_10" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_11" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_9" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_10" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_11" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_9" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_10" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_11" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_9" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_10" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_11" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_9" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_10" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_11" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_9" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_10" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_11" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_9" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_10" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_11" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_9" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_10" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_11" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_9" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_10" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_11" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_9" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_10" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_11" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_9" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_10" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_11" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_9" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_10" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_11" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_9" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_10" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_11" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_9" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_10" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_11" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_9" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_10" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_11" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_9" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_10" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_11" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_9" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_10" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_11" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_9" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_10" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_11" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_9" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_10" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_11" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_9" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_10" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_11" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_9" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_10" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_11" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_0" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_8" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_9" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_10" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_11" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_PHASER_UP_DQS_TO_PHASER_C" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CMT_FIFO_R", + "CMT_TOP_R_UPPER_T" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_FIFO_EE2A0_1", + "CMT_TOP_EE2A0_1" + ], + [ + "CMT_FIFO_EE2A0_2", + "CMT_TOP_EE2A0_2" + ], + [ + "CMT_FIFO_EE2A0_3", + "CMT_TOP_EE2A0_3" + ], + [ + "CMT_FIFO_EE2A0_4", + "CMT_TOP_EE2A0_4" + ], + [ + "CMT_FIFO_EE2A0_5", + "CMT_TOP_EE2A0_5" + ], + [ + "CMT_FIFO_EE2A0_6", + "CMT_TOP_EE2A0_6" + ], + [ + "CMT_FIFO_EE2A0_7", + "CMT_TOP_EE2A0_7" + ], + [ + "CMT_FIFO_EE2A0_8", + "CMT_TOP_EE2A0_8" + ], + [ + "CMT_FIFO_EE2A0_9", + "CMT_TOP_EE2A0_9" + ], + [ + "CMT_FIFO_EE2A0_10", + "CMT_TOP_EE2A0_10" + ], + [ + "CMT_FIFO_EE2A0_11", + "CMT_TOP_EE2A0_11" + ], + [ + "CMT_FIFO_EE2A1_0", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_FIFO_EE2A1_1", + "CMT_TOP_EE2A1_1" + ], + [ + "CMT_FIFO_EE2A1_2", + "CMT_TOP_EE2A1_2" + ], + [ + "CMT_FIFO_EE2A1_3", + "CMT_TOP_EE2A1_3" + ], + [ + "CMT_FIFO_EE2A1_4", + "CMT_TOP_EE2A1_4" + ], + [ + "CMT_FIFO_EE2A1_5", + "CMT_TOP_EE2A1_5" + ], + [ + "CMT_FIFO_EE2A1_6", + "CMT_TOP_EE2A1_6" + ], + [ + "CMT_FIFO_EE2A1_7", + "CMT_TOP_EE2A1_7" + ], + [ + "CMT_FIFO_EE2A1_8", + "CMT_TOP_EE2A1_8" + ], + [ + "CMT_FIFO_EE2A1_9", + "CMT_TOP_EE2A1_9" + ], + [ + "CMT_FIFO_EE2A1_10", + "CMT_TOP_EE2A1_10" + ], + [ + "CMT_FIFO_EE2A1_11", + "CMT_TOP_EE2A1_11" + ], + [ + "CMT_FIFO_EE2A2_0", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_FIFO_EE2A2_1", + "CMT_TOP_EE2A2_1" + ], + [ + "CMT_FIFO_EE2A2_2", + "CMT_TOP_EE2A2_2" + ], + [ + "CMT_FIFO_EE2A2_3", + "CMT_TOP_EE2A2_3" + ], + [ + "CMT_FIFO_EE2A2_4", + "CMT_TOP_EE2A2_4" + ], + [ + "CMT_FIFO_EE2A2_5", + "CMT_TOP_EE2A2_5" + ], + [ + "CMT_FIFO_EE2A2_6", + "CMT_TOP_EE2A2_6" + ], + [ + "CMT_FIFO_EE2A2_7", + "CMT_TOP_EE2A2_7" + ], + [ + "CMT_FIFO_EE2A2_8", + "CMT_TOP_EE2A2_8" + ], + [ + "CMT_FIFO_EE2A2_9", + "CMT_TOP_EE2A2_9" + ], + [ + "CMT_FIFO_EE2A2_10", + "CMT_TOP_EE2A2_10" + ], + [ + "CMT_FIFO_EE2A2_11", + "CMT_TOP_EE2A2_11" + ], + [ + "CMT_FIFO_EE2A3_0", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_FIFO_EE2A3_1", + "CMT_TOP_EE2A3_1" + ], + [ + "CMT_FIFO_EE2A3_2", + "CMT_TOP_EE2A3_2" + ], + [ + "CMT_FIFO_EE2A3_3", + "CMT_TOP_EE2A3_3" + ], + [ + "CMT_FIFO_EE2A3_4", + "CMT_TOP_EE2A3_4" + ], + [ + "CMT_FIFO_EE2A3_5", + "CMT_TOP_EE2A3_5" + ], + [ + "CMT_FIFO_EE2A3_6", + "CMT_TOP_EE2A3_6" + ], + [ + "CMT_FIFO_EE2A3_7", + "CMT_TOP_EE2A3_7" + ], + [ + "CMT_FIFO_EE2A3_8", + "CMT_TOP_EE2A3_8" + ], + [ + "CMT_FIFO_EE2A3_9", + "CMT_TOP_EE2A3_9" + ], + [ + "CMT_FIFO_EE2A3_10", + "CMT_TOP_EE2A3_10" + ], + [ + "CMT_FIFO_EE2A3_11", + "CMT_TOP_EE2A3_11" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "CMT_TOP_EE2BEG0_1" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "CMT_TOP_EE2BEG0_2" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "CMT_TOP_EE2BEG0_3" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "CMT_TOP_EE2BEG0_4" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "CMT_TOP_EE2BEG0_5" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "CMT_TOP_EE2BEG0_6" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "CMT_TOP_EE2BEG0_7" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "CMT_TOP_EE2BEG0_8" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "CMT_TOP_EE2BEG0_9" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "CMT_TOP_EE2BEG0_10" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "CMT_TOP_EE2BEG0_11" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "CMT_TOP_EE2BEG1_1" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "CMT_TOP_EE2BEG1_2" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "CMT_TOP_EE2BEG1_3" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "CMT_TOP_EE2BEG1_4" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "CMT_TOP_EE2BEG1_5" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "CMT_TOP_EE2BEG1_6" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "CMT_TOP_EE2BEG1_7" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "CMT_TOP_EE2BEG1_8" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "CMT_TOP_EE2BEG1_9" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "CMT_TOP_EE2BEG1_10" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "CMT_TOP_EE2BEG1_11" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "CMT_TOP_EE2BEG2_1" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "CMT_TOP_EE2BEG2_2" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "CMT_TOP_EE2BEG2_3" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "CMT_TOP_EE2BEG2_4" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "CMT_TOP_EE2BEG2_5" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "CMT_TOP_EE2BEG2_6" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "CMT_TOP_EE2BEG2_7" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "CMT_TOP_EE2BEG2_8" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "CMT_TOP_EE2BEG2_9" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "CMT_TOP_EE2BEG2_10" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "CMT_TOP_EE2BEG2_11" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "CMT_TOP_EE2BEG3_1" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "CMT_TOP_EE2BEG3_2" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "CMT_TOP_EE2BEG3_3" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "CMT_TOP_EE2BEG3_4" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "CMT_TOP_EE2BEG3_5" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "CMT_TOP_EE2BEG3_6" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "CMT_TOP_EE2BEG3_7" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "CMT_TOP_EE2BEG3_8" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "CMT_TOP_EE2BEG3_9" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "CMT_TOP_EE2BEG3_10" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "CMT_TOP_EE2BEG3_11" + ], + [ + "CMT_FIFO_EE4A0_0", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_FIFO_EE4A0_1", + "CMT_TOP_EE4A0_1" + ], + [ + "CMT_FIFO_EE4A0_2", + "CMT_TOP_EE4A0_2" + ], + [ + "CMT_FIFO_EE4A0_3", + "CMT_TOP_EE4A0_3" + ], + [ + "CMT_FIFO_EE4A0_4", + "CMT_TOP_EE4A0_4" + ], + [ + "CMT_FIFO_EE4A0_5", + "CMT_TOP_EE4A0_5" + ], + [ + "CMT_FIFO_EE4A0_6", + "CMT_TOP_EE4A0_6" + ], + [ + "CMT_FIFO_EE4A0_7", + "CMT_TOP_EE4A0_7" + ], + [ + "CMT_FIFO_EE4A0_8", + "CMT_TOP_EE4A0_8" + ], + [ + "CMT_FIFO_EE4A0_9", + "CMT_TOP_EE4A0_9" + ], + [ + "CMT_FIFO_EE4A0_10", + "CMT_TOP_EE4A0_10" + ], + [ + "CMT_FIFO_EE4A0_11", + "CMT_TOP_EE4A0_11" + ], + [ + "CMT_FIFO_EE4A1_0", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_FIFO_EE4A1_1", + "CMT_TOP_EE4A1_1" + ], + [ + "CMT_FIFO_EE4A1_2", + "CMT_TOP_EE4A1_2" + ], + [ + "CMT_FIFO_EE4A1_3", + "CMT_TOP_EE4A1_3" + ], + [ + "CMT_FIFO_EE4A1_4", + "CMT_TOP_EE4A1_4" + ], + [ + "CMT_FIFO_EE4A1_5", + "CMT_TOP_EE4A1_5" + ], + [ + "CMT_FIFO_EE4A1_6", + "CMT_TOP_EE4A1_6" + ], + [ + "CMT_FIFO_EE4A1_7", + "CMT_TOP_EE4A1_7" + ], + [ + "CMT_FIFO_EE4A1_8", + "CMT_TOP_EE4A1_8" + ], + [ + "CMT_FIFO_EE4A1_9", + "CMT_TOP_EE4A1_9" + ], + [ + "CMT_FIFO_EE4A1_10", + "CMT_TOP_EE4A1_10" + ], + [ + "CMT_FIFO_EE4A1_11", + "CMT_TOP_EE4A1_11" + ], + [ + "CMT_FIFO_EE4A2_0", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_FIFO_EE4A2_1", + "CMT_TOP_EE4A2_1" + ], + [ + "CMT_FIFO_EE4A2_2", + "CMT_TOP_EE4A2_2" + ], + [ + "CMT_FIFO_EE4A2_3", + "CMT_TOP_EE4A2_3" + ], + [ + "CMT_FIFO_EE4A2_4", + "CMT_TOP_EE4A2_4" + ], + [ + "CMT_FIFO_EE4A2_5", + "CMT_TOP_EE4A2_5" + ], + [ + "CMT_FIFO_EE4A2_6", + "CMT_TOP_EE4A2_6" + ], + [ + "CMT_FIFO_EE4A2_7", + "CMT_TOP_EE4A2_7" + ], + [ + "CMT_FIFO_EE4A2_8", + "CMT_TOP_EE4A2_8" + ], + [ + "CMT_FIFO_EE4A2_9", + "CMT_TOP_EE4A2_9" + ], + [ + "CMT_FIFO_EE4A2_10", + "CMT_TOP_EE4A2_10" + ], + [ + "CMT_FIFO_EE4A2_11", + "CMT_TOP_EE4A2_11" + ], + [ + "CMT_FIFO_EE4A3_0", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_FIFO_EE4A3_1", + "CMT_TOP_EE4A3_1" + ], + [ + "CMT_FIFO_EE4A3_2", + "CMT_TOP_EE4A3_2" + ], + [ + "CMT_FIFO_EE4A3_3", + "CMT_TOP_EE4A3_3" + ], + [ + "CMT_FIFO_EE4A3_4", + "CMT_TOP_EE4A3_4" + ], + [ + "CMT_FIFO_EE4A3_5", + "CMT_TOP_EE4A3_5" + ], + [ + "CMT_FIFO_EE4A3_6", + "CMT_TOP_EE4A3_6" + ], + [ + "CMT_FIFO_EE4A3_7", + "CMT_TOP_EE4A3_7" + ], + [ + "CMT_FIFO_EE4A3_8", + "CMT_TOP_EE4A3_8" + ], + [ + "CMT_FIFO_EE4A3_9", + "CMT_TOP_EE4A3_9" + ], + [ + "CMT_FIFO_EE4A3_10", + "CMT_TOP_EE4A3_10" + ], + [ + "CMT_FIFO_EE4A3_11", + "CMT_TOP_EE4A3_11" + ], + [ + "CMT_FIFO_EE4B0_0", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_FIFO_EE4B0_1", + "CMT_TOP_EE4B0_1" + ], + [ + "CMT_FIFO_EE4B0_2", + "CMT_TOP_EE4B0_2" + ], + [ + "CMT_FIFO_EE4B0_3", + "CMT_TOP_EE4B0_3" + ], + [ + "CMT_FIFO_EE4B0_4", + "CMT_TOP_EE4B0_4" + ], + [ + "CMT_FIFO_EE4B0_5", + "CMT_TOP_EE4B0_5" + ], + [ + "CMT_FIFO_EE4B0_6", + "CMT_TOP_EE4B0_6" + ], + [ + "CMT_FIFO_EE4B0_7", + "CMT_TOP_EE4B0_7" + ], + [ + "CMT_FIFO_EE4B0_8", + "CMT_TOP_EE4B0_8" + ], + [ + "CMT_FIFO_EE4B0_9", + "CMT_TOP_EE4B0_9" + ], + [ + "CMT_FIFO_EE4B0_10", + "CMT_TOP_EE4B0_10" + ], + [ + "CMT_FIFO_EE4B0_11", + "CMT_TOP_EE4B0_11" + ], + [ + "CMT_FIFO_EE4B1_0", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_FIFO_EE4B1_1", + "CMT_TOP_EE4B1_1" + ], + [ + "CMT_FIFO_EE4B1_2", + "CMT_TOP_EE4B1_2" + ], + [ + "CMT_FIFO_EE4B1_3", + "CMT_TOP_EE4B1_3" + ], + [ + "CMT_FIFO_EE4B1_4", + "CMT_TOP_EE4B1_4" + ], + [ + "CMT_FIFO_EE4B1_5", + "CMT_TOP_EE4B1_5" + ], + [ + "CMT_FIFO_EE4B1_6", + "CMT_TOP_EE4B1_6" + ], + [ + "CMT_FIFO_EE4B1_7", + "CMT_TOP_EE4B1_7" + ], + [ + "CMT_FIFO_EE4B1_8", + "CMT_TOP_EE4B1_8" + ], + [ + "CMT_FIFO_EE4B1_9", + "CMT_TOP_EE4B1_9" + ], + [ + "CMT_FIFO_EE4B1_10", + "CMT_TOP_EE4B1_10" + ], + [ + "CMT_FIFO_EE4B1_11", + "CMT_TOP_EE4B1_11" + ], + [ + "CMT_FIFO_EE4B2_0", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_FIFO_EE4B2_1", + "CMT_TOP_EE4B2_1" + ], + [ + "CMT_FIFO_EE4B2_2", + "CMT_TOP_EE4B2_2" + ], + [ + "CMT_FIFO_EE4B2_3", + "CMT_TOP_EE4B2_3" + ], + [ + "CMT_FIFO_EE4B2_4", + "CMT_TOP_EE4B2_4" + ], + [ + "CMT_FIFO_EE4B2_5", + "CMT_TOP_EE4B2_5" + ], + [ + "CMT_FIFO_EE4B2_6", + "CMT_TOP_EE4B2_6" + ], + [ + "CMT_FIFO_EE4B2_7", + "CMT_TOP_EE4B2_7" + ], + [ + "CMT_FIFO_EE4B2_8", + "CMT_TOP_EE4B2_8" + ], + [ + "CMT_FIFO_EE4B2_9", + "CMT_TOP_EE4B2_9" + ], + [ + "CMT_FIFO_EE4B2_10", + "CMT_TOP_EE4B2_10" + ], + [ + "CMT_FIFO_EE4B2_11", + "CMT_TOP_EE4B2_11" + ], + [ + "CMT_FIFO_EE4B3_0", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_FIFO_EE4B3_1", + "CMT_TOP_EE4B3_1" + ], + [ + "CMT_FIFO_EE4B3_2", + "CMT_TOP_EE4B3_2" + ], + [ + "CMT_FIFO_EE4B3_3", + "CMT_TOP_EE4B3_3" + ], + [ + "CMT_FIFO_EE4B3_4", + "CMT_TOP_EE4B3_4" + ], + [ + "CMT_FIFO_EE4B3_5", + "CMT_TOP_EE4B3_5" + ], + [ + "CMT_FIFO_EE4B3_6", + "CMT_TOP_EE4B3_6" + ], + [ + "CMT_FIFO_EE4B3_7", + "CMT_TOP_EE4B3_7" + ], + [ + "CMT_FIFO_EE4B3_8", + "CMT_TOP_EE4B3_8" + ], + [ + "CMT_FIFO_EE4B3_9", + "CMT_TOP_EE4B3_9" + ], + [ + "CMT_FIFO_EE4B3_10", + "CMT_TOP_EE4B3_10" + ], + [ + "CMT_FIFO_EE4B3_11", + "CMT_TOP_EE4B3_11" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "CMT_TOP_EE4BEG0_1" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "CMT_TOP_EE4BEG0_2" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "CMT_TOP_EE4BEG0_3" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "CMT_TOP_EE4BEG0_4" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "CMT_TOP_EE4BEG0_5" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "CMT_TOP_EE4BEG0_6" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "CMT_TOP_EE4BEG0_7" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "CMT_TOP_EE4BEG0_8" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "CMT_TOP_EE4BEG0_9" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "CMT_TOP_EE4BEG0_10" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "CMT_TOP_EE4BEG0_11" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "CMT_TOP_EE4BEG1_1" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "CMT_TOP_EE4BEG1_2" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "CMT_TOP_EE4BEG1_3" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "CMT_TOP_EE4BEG1_4" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "CMT_TOP_EE4BEG1_5" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "CMT_TOP_EE4BEG1_6" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "CMT_TOP_EE4BEG1_7" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "CMT_TOP_EE4BEG1_8" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "CMT_TOP_EE4BEG1_9" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "CMT_TOP_EE4BEG1_10" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "CMT_TOP_EE4BEG1_11" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "CMT_TOP_EE4BEG2_1" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "CMT_TOP_EE4BEG2_2" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "CMT_TOP_EE4BEG2_3" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "CMT_TOP_EE4BEG2_4" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "CMT_TOP_EE4BEG2_5" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "CMT_TOP_EE4BEG2_6" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "CMT_TOP_EE4BEG2_7" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "CMT_TOP_EE4BEG2_8" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "CMT_TOP_EE4BEG2_9" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "CMT_TOP_EE4BEG2_10" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "CMT_TOP_EE4BEG2_11" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "CMT_TOP_EE4BEG3_1" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "CMT_TOP_EE4BEG3_2" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "CMT_TOP_EE4BEG3_3" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "CMT_TOP_EE4BEG3_4" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "CMT_TOP_EE4BEG3_5" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "CMT_TOP_EE4BEG3_6" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "CMT_TOP_EE4BEG3_7" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "CMT_TOP_EE4BEG3_8" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "CMT_TOP_EE4BEG3_9" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "CMT_TOP_EE4BEG3_10" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "CMT_TOP_EE4BEG3_11" + ], + [ + "CMT_FIFO_EE4C0_0", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_FIFO_EE4C0_1", + "CMT_TOP_EE4C0_1" + ], + [ + "CMT_FIFO_EE4C0_2", + "CMT_TOP_EE4C0_2" + ], + [ + "CMT_FIFO_EE4C0_3", + "CMT_TOP_EE4C0_3" + ], + [ + "CMT_FIFO_EE4C0_4", + "CMT_TOP_EE4C0_4" + ], + [ + "CMT_FIFO_EE4C0_5", + "CMT_TOP_EE4C0_5" + ], + [ + "CMT_FIFO_EE4C0_6", + "CMT_TOP_EE4C0_6" + ], + [ + "CMT_FIFO_EE4C0_7", + "CMT_TOP_EE4C0_7" + ], + [ + "CMT_FIFO_EE4C0_8", + "CMT_TOP_EE4C0_8" + ], + [ + "CMT_FIFO_EE4C0_9", + "CMT_TOP_EE4C0_9" + ], + [ + "CMT_FIFO_EE4C0_10", + "CMT_TOP_EE4C0_10" + ], + [ + "CMT_FIFO_EE4C0_11", + "CMT_TOP_EE4C0_11" + ], + [ + "CMT_FIFO_EE4C1_0", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_FIFO_EE4C1_1", + "CMT_TOP_EE4C1_1" + ], + [ + "CMT_FIFO_EE4C1_2", + "CMT_TOP_EE4C1_2" + ], + [ + "CMT_FIFO_EE4C1_3", + "CMT_TOP_EE4C1_3" + ], + [ + "CMT_FIFO_EE4C1_4", + "CMT_TOP_EE4C1_4" + ], + [ + "CMT_FIFO_EE4C1_5", + "CMT_TOP_EE4C1_5" + ], + [ + "CMT_FIFO_EE4C1_6", + "CMT_TOP_EE4C1_6" + ], + [ + "CMT_FIFO_EE4C1_7", + "CMT_TOP_EE4C1_7" + ], + [ + "CMT_FIFO_EE4C1_8", + "CMT_TOP_EE4C1_8" + ], + [ + "CMT_FIFO_EE4C1_9", + "CMT_TOP_EE4C1_9" + ], + [ + "CMT_FIFO_EE4C1_10", + "CMT_TOP_EE4C1_10" + ], + [ + "CMT_FIFO_EE4C1_11", + "CMT_TOP_EE4C1_11" + ], + [ + "CMT_FIFO_EE4C2_0", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_FIFO_EE4C2_1", + "CMT_TOP_EE4C2_1" + ], + [ + "CMT_FIFO_EE4C2_2", + "CMT_TOP_EE4C2_2" + ], + [ + "CMT_FIFO_EE4C2_3", + "CMT_TOP_EE4C2_3" + ], + [ + "CMT_FIFO_EE4C2_4", + "CMT_TOP_EE4C2_4" + ], + [ + "CMT_FIFO_EE4C2_5", + "CMT_TOP_EE4C2_5" + ], + [ + "CMT_FIFO_EE4C2_6", + "CMT_TOP_EE4C2_6" + ], + [ + "CMT_FIFO_EE4C2_7", + "CMT_TOP_EE4C2_7" + ], + [ + "CMT_FIFO_EE4C2_8", + "CMT_TOP_EE4C2_8" + ], + [ + "CMT_FIFO_EE4C2_9", + "CMT_TOP_EE4C2_9" + ], + [ + "CMT_FIFO_EE4C2_10", + "CMT_TOP_EE4C2_10" + ], + [ + "CMT_FIFO_EE4C2_11", + "CMT_TOP_EE4C2_11" + ], + [ + "CMT_FIFO_EE4C3_0", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_FIFO_EE4C3_1", + "CMT_TOP_EE4C3_1" + ], + [ + "CMT_FIFO_EE4C3_2", + "CMT_TOP_EE4C3_2" + ], + [ + "CMT_FIFO_EE4C3_3", + "CMT_TOP_EE4C3_3" + ], + [ + "CMT_FIFO_EE4C3_4", + "CMT_TOP_EE4C3_4" + ], + [ + "CMT_FIFO_EE4C3_5", + "CMT_TOP_EE4C3_5" + ], + [ + "CMT_FIFO_EE4C3_6", + "CMT_TOP_EE4C3_6" + ], + [ + "CMT_FIFO_EE4C3_7", + "CMT_TOP_EE4C3_7" + ], + [ + "CMT_FIFO_EE4C3_8", + "CMT_TOP_EE4C3_8" + ], + [ + "CMT_FIFO_EE4C3_9", + "CMT_TOP_EE4C3_9" + ], + [ + "CMT_FIFO_EE4C3_10", + "CMT_TOP_EE4C3_10" + ], + [ + "CMT_FIFO_EE4C3_11", + "CMT_TOP_EE4C3_11" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "CMT_TOP_EL1BEG0_1" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "CMT_TOP_EL1BEG0_2" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "CMT_TOP_EL1BEG0_3" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "CMT_TOP_EL1BEG0_4" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "CMT_TOP_EL1BEG0_5" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "CMT_TOP_EL1BEG0_6" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "CMT_TOP_EL1BEG0_7" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "CMT_TOP_EL1BEG0_8" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "CMT_TOP_EL1BEG0_9" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "CMT_TOP_EL1BEG0_10" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "CMT_TOP_EL1BEG0_11" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "CMT_TOP_EL1BEG1_1" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "CMT_TOP_EL1BEG1_2" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "CMT_TOP_EL1BEG1_3" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "CMT_TOP_EL1BEG1_4" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "CMT_TOP_EL1BEG1_5" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "CMT_TOP_EL1BEG1_6" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "CMT_TOP_EL1BEG1_7" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "CMT_TOP_EL1BEG1_8" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "CMT_TOP_EL1BEG1_9" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "CMT_TOP_EL1BEG1_10" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "CMT_TOP_EL1BEG1_11" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "CMT_TOP_EL1BEG2_1" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "CMT_TOP_EL1BEG2_2" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "CMT_TOP_EL1BEG2_3" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "CMT_TOP_EL1BEG2_4" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "CMT_TOP_EL1BEG2_5" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "CMT_TOP_EL1BEG2_6" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "CMT_TOP_EL1BEG2_7" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "CMT_TOP_EL1BEG2_8" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "CMT_TOP_EL1BEG2_9" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "CMT_TOP_EL1BEG2_10" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "CMT_TOP_EL1BEG2_11" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "CMT_TOP_EL1BEG3_1" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "CMT_TOP_EL1BEG3_2" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "CMT_TOP_EL1BEG3_3" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "CMT_TOP_EL1BEG3_4" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "CMT_TOP_EL1BEG3_5" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "CMT_TOP_EL1BEG3_6" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "CMT_TOP_EL1BEG3_7" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "CMT_TOP_EL1BEG3_8" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "CMT_TOP_EL1BEG3_9" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "CMT_TOP_EL1BEG3_10" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "CMT_TOP_EL1BEG3_11" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "CMT_TOP_ER1BEG0_1" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "CMT_TOP_ER1BEG0_2" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "CMT_TOP_ER1BEG0_3" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "CMT_TOP_ER1BEG0_4" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "CMT_TOP_ER1BEG0_5" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "CMT_TOP_ER1BEG0_6" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "CMT_TOP_ER1BEG0_7" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "CMT_TOP_ER1BEG0_8" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "CMT_TOP_ER1BEG0_9" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "CMT_TOP_ER1BEG0_10" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "CMT_TOP_ER1BEG0_11" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "CMT_TOP_ER1BEG1_1" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "CMT_TOP_ER1BEG1_2" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "CMT_TOP_ER1BEG1_3" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "CMT_TOP_ER1BEG1_4" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "CMT_TOP_ER1BEG1_5" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "CMT_TOP_ER1BEG1_6" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "CMT_TOP_ER1BEG1_7" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "CMT_TOP_ER1BEG1_8" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "CMT_TOP_ER1BEG1_9" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "CMT_TOP_ER1BEG1_10" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "CMT_TOP_ER1BEG1_11" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "CMT_TOP_ER1BEG2_1" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "CMT_TOP_ER1BEG2_2" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "CMT_TOP_ER1BEG2_3" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "CMT_TOP_ER1BEG2_4" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "CMT_TOP_ER1BEG2_5" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "CMT_TOP_ER1BEG2_6" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "CMT_TOP_ER1BEG2_7" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "CMT_TOP_ER1BEG2_8" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "CMT_TOP_ER1BEG2_9" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "CMT_TOP_ER1BEG2_10" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "CMT_TOP_ER1BEG2_11" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "CMT_TOP_ER1BEG3_1" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "CMT_TOP_ER1BEG3_2" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "CMT_TOP_ER1BEG3_3" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "CMT_TOP_ER1BEG3_4" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "CMT_TOP_ER1BEG3_5" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "CMT_TOP_ER1BEG3_6" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "CMT_TOP_ER1BEG3_7" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "CMT_TOP_ER1BEG3_8" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "CMT_TOP_ER1BEG3_9" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "CMT_TOP_ER1BEG3_10" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "CMT_TOP_ER1BEG3_11" + ], + [ + "CMT_FIFO_LH1_0", + "CMT_TOP_LH1_0" + ], + [ + "CMT_FIFO_LH1_1", + "CMT_TOP_LH1_1" + ], + [ + "CMT_FIFO_LH1_2", + "CMT_TOP_LH1_2" + ], + [ + "CMT_FIFO_LH1_3", + "CMT_TOP_LH1_3" + ], + [ + "CMT_FIFO_LH1_4", + "CMT_TOP_LH1_4" + ], + [ + "CMT_FIFO_LH1_5", + "CMT_TOP_LH1_5" + ], + [ + "CMT_FIFO_LH1_6", + "CMT_TOP_LH1_6" + ], + [ + "CMT_FIFO_LH1_7", + "CMT_TOP_LH1_7" + ], + [ + "CMT_FIFO_LH1_8", + "CMT_TOP_LH1_8" + ], + [ + "CMT_FIFO_LH1_9", + "CMT_TOP_LH1_9" + ], + [ + "CMT_FIFO_LH1_10", + "CMT_TOP_LH1_10" + ], + [ + "CMT_FIFO_LH1_11", + "CMT_TOP_LH1_11" + ], + [ + "CMT_FIFO_LH2_0", + "CMT_TOP_LH2_0" + ], + [ + "CMT_FIFO_LH2_1", + "CMT_TOP_LH2_1" + ], + [ + "CMT_FIFO_LH2_2", + "CMT_TOP_LH2_2" + ], + [ + "CMT_FIFO_LH2_3", + "CMT_TOP_LH2_3" + ], + [ + "CMT_FIFO_LH2_4", + "CMT_TOP_LH2_4" + ], + [ + "CMT_FIFO_LH2_5", + "CMT_TOP_LH2_5" + ], + [ + "CMT_FIFO_LH2_6", + "CMT_TOP_LH2_6" + ], + [ + "CMT_FIFO_LH2_7", + "CMT_TOP_LH2_7" + ], + [ + "CMT_FIFO_LH2_8", + "CMT_TOP_LH2_8" + ], + [ + "CMT_FIFO_LH2_9", + "CMT_TOP_LH2_9" + ], + [ + "CMT_FIFO_LH2_10", + "CMT_TOP_LH2_10" + ], + [ + "CMT_FIFO_LH2_11", + "CMT_TOP_LH2_11" + ], + [ + "CMT_FIFO_LH3_0", + "CMT_TOP_LH3_0" + ], + [ + "CMT_FIFO_LH3_1", + "CMT_TOP_LH3_1" + ], + [ + "CMT_FIFO_LH3_2", + "CMT_TOP_LH3_2" + ], + [ + "CMT_FIFO_LH3_3", + "CMT_TOP_LH3_3" + ], + [ + "CMT_FIFO_LH3_4", + "CMT_TOP_LH3_4" + ], + [ + "CMT_FIFO_LH3_5", + "CMT_TOP_LH3_5" + ], + [ + "CMT_FIFO_LH3_6", + "CMT_TOP_LH3_6" + ], + [ + "CMT_FIFO_LH3_7", + "CMT_TOP_LH3_7" + ], + [ + "CMT_FIFO_LH3_8", + "CMT_TOP_LH3_8" + ], + [ + "CMT_FIFO_LH3_9", + "CMT_TOP_LH3_9" + ], + [ + "CMT_FIFO_LH3_10", + "CMT_TOP_LH3_10" + ], + [ + "CMT_FIFO_LH3_11", + "CMT_TOP_LH3_11" + ], + [ + "CMT_FIFO_LH4_0", + "CMT_TOP_LH4_0" + ], + [ + "CMT_FIFO_LH4_1", + "CMT_TOP_LH4_1" + ], + [ + "CMT_FIFO_LH4_2", + "CMT_TOP_LH4_2" + ], + [ + "CMT_FIFO_LH4_3", + "CMT_TOP_LH4_3" + ], + [ + "CMT_FIFO_LH4_4", + "CMT_TOP_LH4_4" + ], + [ + "CMT_FIFO_LH4_5", + "CMT_TOP_LH4_5" + ], + [ + "CMT_FIFO_LH4_6", + "CMT_TOP_LH4_6" + ], + [ + "CMT_FIFO_LH4_7", + "CMT_TOP_LH4_7" + ], + [ + "CMT_FIFO_LH4_8", + "CMT_TOP_LH4_8" + ], + [ + "CMT_FIFO_LH4_9", + "CMT_TOP_LH4_9" + ], + [ + "CMT_FIFO_LH4_10", + "CMT_TOP_LH4_10" + ], + [ + "CMT_FIFO_LH4_11", + "CMT_TOP_LH4_11" + ], + [ + "CMT_FIFO_LH5_0", + "CMT_TOP_LH5_0" + ], + [ + "CMT_FIFO_LH5_1", + "CMT_TOP_LH5_1" + ], + [ + "CMT_FIFO_LH5_2", + "CMT_TOP_LH5_2" + ], + [ + "CMT_FIFO_LH5_3", + "CMT_TOP_LH5_3" + ], + [ + "CMT_FIFO_LH5_4", + "CMT_TOP_LH5_4" + ], + [ + "CMT_FIFO_LH5_5", + "CMT_TOP_LH5_5" + ], + [ + "CMT_FIFO_LH5_6", + "CMT_TOP_LH5_6" + ], + [ + "CMT_FIFO_LH5_7", + "CMT_TOP_LH5_7" + ], + [ + "CMT_FIFO_LH5_8", + "CMT_TOP_LH5_8" + ], + [ + "CMT_FIFO_LH5_9", + "CMT_TOP_LH5_9" + ], + [ + "CMT_FIFO_LH5_10", + "CMT_TOP_LH5_10" + ], + [ + "CMT_FIFO_LH5_11", + "CMT_TOP_LH5_11" + ], + [ + "CMT_FIFO_LH6_0", + "CMT_TOP_LH6_0" + ], + [ + "CMT_FIFO_LH6_1", + "CMT_TOP_LH6_1" + ], + [ + "CMT_FIFO_LH6_2", + "CMT_TOP_LH6_2" + ], + [ + "CMT_FIFO_LH6_3", + "CMT_TOP_LH6_3" + ], + [ + "CMT_FIFO_LH6_4", + "CMT_TOP_LH6_4" + ], + [ + "CMT_FIFO_LH6_5", + "CMT_TOP_LH6_5" + ], + [ + "CMT_FIFO_LH6_6", + "CMT_TOP_LH6_6" + ], + [ + "CMT_FIFO_LH6_7", + "CMT_TOP_LH6_7" + ], + [ + "CMT_FIFO_LH6_8", + "CMT_TOP_LH6_8" + ], + [ + "CMT_FIFO_LH6_9", + "CMT_TOP_LH6_9" + ], + [ + "CMT_FIFO_LH6_10", + "CMT_TOP_LH6_10" + ], + [ + "CMT_FIFO_LH6_11", + "CMT_TOP_LH6_11" + ], + [ + "CMT_FIFO_LH7_0", + "CMT_TOP_LH7_0" + ], + [ + "CMT_FIFO_LH7_1", + "CMT_TOP_LH7_1" + ], + [ + "CMT_FIFO_LH7_2", + "CMT_TOP_LH7_2" + ], + [ + "CMT_FIFO_LH7_3", + "CMT_TOP_LH7_3" + ], + [ + "CMT_FIFO_LH7_4", + "CMT_TOP_LH7_4" + ], + [ + "CMT_FIFO_LH7_5", + "CMT_TOP_LH7_5" + ], + [ + "CMT_FIFO_LH7_6", + "CMT_TOP_LH7_6" + ], + [ + "CMT_FIFO_LH7_7", + "CMT_TOP_LH7_7" + ], + [ + "CMT_FIFO_LH7_8", + "CMT_TOP_LH7_8" + ], + [ + "CMT_FIFO_LH7_9", + "CMT_TOP_LH7_9" + ], + [ + "CMT_FIFO_LH7_10", + "CMT_TOP_LH7_10" + ], + [ + "CMT_FIFO_LH7_11", + "CMT_TOP_LH7_11" + ], + [ + "CMT_FIFO_LH8_0", + "CMT_TOP_LH8_0" + ], + [ + "CMT_FIFO_LH8_1", + "CMT_TOP_LH8_1" + ], + [ + "CMT_FIFO_LH8_2", + "CMT_TOP_LH8_2" + ], + [ + "CMT_FIFO_LH8_3", + "CMT_TOP_LH8_3" + ], + [ + "CMT_FIFO_LH8_4", + "CMT_TOP_LH8_4" + ], + [ + "CMT_FIFO_LH8_5", + "CMT_TOP_LH8_5" + ], + [ + "CMT_FIFO_LH8_6", + "CMT_TOP_LH8_6" + ], + [ + "CMT_FIFO_LH8_7", + "CMT_TOP_LH8_7" + ], + [ + "CMT_FIFO_LH8_8", + "CMT_TOP_LH8_8" + ], + [ + "CMT_FIFO_LH8_9", + "CMT_TOP_LH8_9" + ], + [ + "CMT_FIFO_LH8_10", + "CMT_TOP_LH8_10" + ], + [ + "CMT_FIFO_LH8_11", + "CMT_TOP_LH8_11" + ], + [ + "CMT_FIFO_LH9_0", + "CMT_TOP_LH9_0" + ], + [ + "CMT_FIFO_LH9_1", + "CMT_TOP_LH9_1" + ], + [ + "CMT_FIFO_LH9_2", + "CMT_TOP_LH9_2" + ], + [ + "CMT_FIFO_LH9_3", + "CMT_TOP_LH9_3" + ], + [ + "CMT_FIFO_LH9_4", + "CMT_TOP_LH9_4" + ], + [ + "CMT_FIFO_LH9_5", + "CMT_TOP_LH9_5" + ], + [ + "CMT_FIFO_LH9_6", + "CMT_TOP_LH9_6" + ], + [ + "CMT_FIFO_LH9_7", + "CMT_TOP_LH9_7" + ], + [ + "CMT_FIFO_LH9_8", + "CMT_TOP_LH9_8" + ], + [ + "CMT_FIFO_LH9_9", + "CMT_TOP_LH9_9" + ], + [ + "CMT_FIFO_LH9_10", + "CMT_TOP_LH9_10" + ], + [ + "CMT_FIFO_LH9_11", + "CMT_TOP_LH9_11" + ], + [ + "CMT_FIFO_LH10_0", + "CMT_TOP_LH10_0" + ], + [ + "CMT_FIFO_LH10_1", + "CMT_TOP_LH10_1" + ], + [ + "CMT_FIFO_LH10_2", + "CMT_TOP_LH10_2" + ], + [ + "CMT_FIFO_LH10_3", + "CMT_TOP_LH10_3" + ], + [ + "CMT_FIFO_LH10_4", + "CMT_TOP_LH10_4" + ], + [ + "CMT_FIFO_LH10_5", + "CMT_TOP_LH10_5" + ], + [ + "CMT_FIFO_LH10_6", + "CMT_TOP_LH10_6" + ], + [ + "CMT_FIFO_LH10_7", + "CMT_TOP_LH10_7" + ], + [ + "CMT_FIFO_LH10_8", + "CMT_TOP_LH10_8" + ], + [ + "CMT_FIFO_LH10_9", + "CMT_TOP_LH10_9" + ], + [ + "CMT_FIFO_LH10_10", + "CMT_TOP_LH10_10" + ], + [ + "CMT_FIFO_LH10_11", + "CMT_TOP_LH10_11" + ], + [ + "CMT_FIFO_LH11_0", + "CMT_TOP_LH11_0" + ], + [ + "CMT_FIFO_LH11_1", + "CMT_TOP_LH11_1" + ], + [ + "CMT_FIFO_LH11_2", + "CMT_TOP_LH11_2" + ], + [ + "CMT_FIFO_LH11_3", + "CMT_TOP_LH11_3" + ], + [ + "CMT_FIFO_LH11_4", + "CMT_TOP_LH11_4" + ], + [ + "CMT_FIFO_LH11_5", + "CMT_TOP_LH11_5" + ], + [ + "CMT_FIFO_LH11_6", + "CMT_TOP_LH11_6" + ], + [ + "CMT_FIFO_LH11_7", + "CMT_TOP_LH11_7" + ], + [ + "CMT_FIFO_LH11_8", + "CMT_TOP_LH11_8" + ], + [ + "CMT_FIFO_LH11_9", + "CMT_TOP_LH11_9" + ], + [ + "CMT_FIFO_LH11_10", + "CMT_TOP_LH11_10" + ], + [ + "CMT_FIFO_LH11_11", + "CMT_TOP_LH11_11" + ], + [ + "CMT_FIFO_LH12_0", + "CMT_TOP_LH12_0" + ], + [ + "CMT_FIFO_LH12_1", + "CMT_TOP_LH12_1" + ], + [ + "CMT_FIFO_LH12_2", + "CMT_TOP_LH12_2" + ], + [ + "CMT_FIFO_LH12_3", + "CMT_TOP_LH12_3" + ], + [ + "CMT_FIFO_LH12_4", + "CMT_TOP_LH12_4" + ], + [ + "CMT_FIFO_LH12_5", + "CMT_TOP_LH12_5" + ], + [ + "CMT_FIFO_LH12_6", + "CMT_TOP_LH12_6" + ], + [ + "CMT_FIFO_LH12_7", + "CMT_TOP_LH12_7" + ], + [ + "CMT_FIFO_LH12_8", + "CMT_TOP_LH12_8" + ], + [ + "CMT_FIFO_LH12_9", + "CMT_TOP_LH12_9" + ], + [ + "CMT_FIFO_LH12_10", + "CMT_TOP_LH12_10" + ], + [ + "CMT_FIFO_LH12_11", + "CMT_TOP_LH12_11" + ], + [ + "CMT_FIFO_L_BYP0_0", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_FIFO_L_BYP0_1", + "CMT_TOP_BYP0_1" + ], + [ + "CMT_FIFO_L_BYP0_2", + "CMT_TOP_BYP0_2" + ], + [ + "CMT_FIFO_L_BYP0_3", + "CMT_TOP_BYP0_3" + ], + [ + "CMT_FIFO_L_BYP0_4", + "CMT_TOP_BYP0_4" + ], + [ + "CMT_FIFO_L_BYP0_5", + "CMT_TOP_BYP0_5" + ], + [ + "CMT_FIFO_L_BYP0_6", + "CMT_TOP_BYP0_6" + ], + [ + "CMT_FIFO_L_BYP0_7", + "CMT_TOP_BYP0_7" + ], + [ + "CMT_FIFO_L_BYP0_8", + "CMT_TOP_BYP0_8" + ], + [ + "CMT_FIFO_L_BYP0_9", + "CMT_TOP_BYP0_9" + ], + [ + "CMT_FIFO_L_BYP0_10", + "CMT_TOP_BYP0_10" + ], + [ + "CMT_FIFO_L_BYP0_11", + "CMT_TOP_BYP0_11" + ], + [ + "CMT_FIFO_L_BYP1_0", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_FIFO_L_BYP1_1", + "CMT_TOP_BYP1_1" + ], + [ + "CMT_FIFO_L_BYP1_2", + "CMT_TOP_BYP1_2" + ], + [ + "CMT_FIFO_L_BYP1_3", + "CMT_TOP_BYP1_3" + ], + [ + "CMT_FIFO_L_BYP1_4", + "CMT_TOP_BYP1_4" + ], + [ + "CMT_FIFO_L_BYP1_5", + "CMT_TOP_BYP1_5" + ], + [ + "CMT_FIFO_L_BYP1_6", + "CMT_TOP_BYP1_6" + ], + [ + "CMT_FIFO_L_BYP1_7", + "CMT_TOP_BYP1_7" + ], + [ + "CMT_FIFO_L_BYP1_8", + "CMT_TOP_BYP1_8" + ], + [ + "CMT_FIFO_L_BYP1_9", + "CMT_TOP_BYP1_9" + ], + [ + "CMT_FIFO_L_BYP1_10", + "CMT_TOP_BYP1_10" + ], + [ + "CMT_FIFO_L_BYP1_11", + "CMT_TOP_BYP1_11" + ], + [ + "CMT_FIFO_L_BYP2_0", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_FIFO_L_BYP2_1", + "CMT_TOP_BYP2_1" + ], + [ + "CMT_FIFO_L_BYP2_2", + "CMT_TOP_BYP2_2" + ], + [ + "CMT_FIFO_L_BYP2_3", + "CMT_TOP_BYP2_3" + ], + [ + "CMT_FIFO_L_BYP2_4", + "CMT_TOP_BYP2_4" + ], + [ + "CMT_FIFO_L_BYP2_5", + "CMT_TOP_BYP2_5" + ], + [ + "CMT_FIFO_L_BYP2_6", + "CMT_TOP_BYP2_6" + ], + [ + "CMT_FIFO_L_BYP2_7", + "CMT_TOP_BYP2_7" + ], + [ + "CMT_FIFO_L_BYP2_8", + "CMT_TOP_BYP2_8" + ], + [ + "CMT_FIFO_L_BYP2_9", + "CMT_TOP_BYP2_9" + ], + [ + "CMT_FIFO_L_BYP2_10", + "CMT_TOP_BYP2_10" + ], + [ + "CMT_FIFO_L_BYP2_11", + "CMT_TOP_BYP2_11" + ], + [ + "CMT_FIFO_L_BYP3_0", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_FIFO_L_BYP3_1", + "CMT_TOP_BYP3_1" + ], + [ + "CMT_FIFO_L_BYP3_2", + "CMT_TOP_BYP3_2" + ], + [ + "CMT_FIFO_L_BYP3_3", + "CMT_TOP_BYP3_3" + ], + [ + "CMT_FIFO_L_BYP3_4", + "CMT_TOP_BYP3_4" + ], + [ + "CMT_FIFO_L_BYP3_5", + "CMT_TOP_BYP3_5" + ], + [ + "CMT_FIFO_L_BYP3_6", + "CMT_TOP_BYP3_6" + ], + [ + "CMT_FIFO_L_BYP3_7", + "CMT_TOP_BYP3_7" + ], + [ + "CMT_FIFO_L_BYP3_8", + "CMT_TOP_BYP3_8" + ], + [ + "CMT_FIFO_L_BYP3_9", + "CMT_TOP_BYP3_9" + ], + [ + "CMT_FIFO_L_BYP3_10", + "CMT_TOP_BYP3_10" + ], + [ + "CMT_FIFO_L_BYP3_11", + "CMT_TOP_BYP3_11" + ], + [ + "CMT_FIFO_L_BYP4_0", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_FIFO_L_BYP4_1", + "CMT_TOP_BYP4_1" + ], + [ + "CMT_FIFO_L_BYP4_2", + "CMT_TOP_BYP4_2" + ], + [ + "CMT_FIFO_L_BYP4_3", + "CMT_TOP_BYP4_3" + ], + [ + "CMT_FIFO_L_BYP4_4", + "CMT_TOP_BYP4_4" + ], + [ + "CMT_FIFO_L_BYP4_5", + "CMT_TOP_BYP4_5" + ], + [ + "CMT_FIFO_L_BYP4_6", + "CMT_TOP_BYP4_6" + ], + [ + "CMT_FIFO_L_BYP4_7", + "CMT_TOP_BYP4_7" + ], + [ + "CMT_FIFO_L_BYP4_8", + "CMT_TOP_BYP4_8" + ], + [ + "CMT_FIFO_L_BYP4_9", + "CMT_TOP_BYP4_9" + ], + [ + "CMT_FIFO_L_BYP4_10", + "CMT_TOP_BYP4_10" + ], + [ + "CMT_FIFO_L_BYP4_11", + "CMT_TOP_BYP4_11" + ], + [ + "CMT_FIFO_L_BYP5_0", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_FIFO_L_BYP5_1", + "CMT_TOP_BYP5_1" + ], + [ + "CMT_FIFO_L_BYP5_2", + "CMT_TOP_BYP5_2" + ], + [ + "CMT_FIFO_L_BYP5_3", + "CMT_TOP_BYP5_3" + ], + [ + "CMT_FIFO_L_BYP5_4", + "CMT_TOP_BYP5_4" + ], + [ + "CMT_FIFO_L_BYP5_5", + "CMT_TOP_BYP5_5" + ], + [ + "CMT_FIFO_L_BYP5_6", + "CMT_TOP_BYP5_6" + ], + [ + "CMT_FIFO_L_BYP5_7", + "CMT_TOP_BYP5_7" + ], + [ + "CMT_FIFO_L_BYP5_8", + "CMT_TOP_BYP5_8" + ], + [ + "CMT_FIFO_L_BYP5_9", + "CMT_TOP_BYP5_9" + ], + [ + "CMT_FIFO_L_BYP5_10", + "CMT_TOP_BYP5_10" + ], + [ + "CMT_FIFO_L_BYP5_11", + "CMT_TOP_BYP5_11" + ], + [ + "CMT_FIFO_L_BYP6_0", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_FIFO_L_BYP6_1", + "CMT_TOP_BYP6_1" + ], + [ + "CMT_FIFO_L_BYP6_2", + "CMT_TOP_BYP6_2" + ], + [ + "CMT_FIFO_L_BYP6_3", + "CMT_TOP_BYP6_3" + ], + [ + "CMT_FIFO_L_BYP6_4", + "CMT_TOP_BYP6_4" + ], + [ + "CMT_FIFO_L_BYP6_5", + "CMT_TOP_BYP6_5" + ], + [ + "CMT_FIFO_L_BYP6_6", + "CMT_TOP_BYP6_6" + ], + [ + "CMT_FIFO_L_BYP6_7", + "CMT_TOP_BYP6_7" + ], + [ + "CMT_FIFO_L_BYP6_8", + "CMT_TOP_BYP6_8" + ], + [ + "CMT_FIFO_L_BYP6_9", + "CMT_TOP_BYP6_9" + ], + [ + "CMT_FIFO_L_BYP6_10", + "CMT_TOP_BYP6_10" + ], + [ + "CMT_FIFO_L_BYP6_11", + "CMT_TOP_BYP6_11" + ], + [ + "CMT_FIFO_L_BYP7_0", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_FIFO_L_BYP7_1", + "CMT_TOP_BYP7_1" + ], + [ + "CMT_FIFO_L_BYP7_2", + "CMT_TOP_BYP7_2" + ], + [ + "CMT_FIFO_L_BYP7_3", + "CMT_TOP_BYP7_3" + ], + [ + "CMT_FIFO_L_BYP7_4", + "CMT_TOP_BYP7_4" + ], + [ + "CMT_FIFO_L_BYP7_5", + "CMT_TOP_BYP7_5" + ], + [ + "CMT_FIFO_L_BYP7_6", + "CMT_TOP_BYP7_6" + ], + [ + "CMT_FIFO_L_BYP7_7", + "CMT_TOP_BYP7_7" + ], + [ + "CMT_FIFO_L_BYP7_8", + "CMT_TOP_BYP7_8" + ], + [ + "CMT_FIFO_L_BYP7_9", + "CMT_TOP_BYP7_9" + ], + [ + "CMT_FIFO_L_BYP7_10", + "CMT_TOP_BYP7_10" + ], + [ + "CMT_FIFO_L_BYP7_11", + "CMT_TOP_BYP7_11" + ], + [ + "CMT_FIFO_L_CLK0_0", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_FIFO_L_CLK0_1", + "CMT_TOP_CLK0_1" + ], + [ + "CMT_FIFO_L_CLK0_2", + "CMT_TOP_CLK0_2" + ], + [ + "CMT_FIFO_L_CLK0_3", + "CMT_TOP_CLK0_3" + ], + [ + "CMT_FIFO_L_CLK0_4", + "CMT_TOP_CLK0_4" + ], + [ + "CMT_FIFO_L_CLK0_5", + "CMT_TOP_CLK0_5" + ], + [ + "CMT_FIFO_L_CLK0_6", + "CMT_TOP_CLK0_6" + ], + [ + "CMT_FIFO_L_CLK0_7", + "CMT_TOP_CLK0_7" + ], + [ + "CMT_FIFO_L_CLK0_8", + "CMT_TOP_CLK0_8" + ], + [ + "CMT_FIFO_L_CLK0_9", + "CMT_TOP_CLK0_9" + ], + [ + "CMT_FIFO_L_CLK0_10", + "CMT_TOP_CLK0_10" + ], + [ + "CMT_FIFO_L_CLK0_11", + "CMT_TOP_CLK0_11" + ], + [ + "CMT_FIFO_L_CLK1_0", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_FIFO_L_CLK1_1", + "CMT_TOP_CLK1_1" + ], + [ + "CMT_FIFO_L_CLK1_2", + "CMT_TOP_CLK1_2" + ], + [ + "CMT_FIFO_L_CLK1_3", + "CMT_TOP_CLK1_3" + ], + [ + "CMT_FIFO_L_CLK1_4", + "CMT_TOP_CLK1_4" + ], + [ + "CMT_FIFO_L_CLK1_5", + "CMT_TOP_CLK1_5" + ], + [ + "CMT_FIFO_L_CLK1_6", + "CMT_TOP_CLK1_6" + ], + [ + "CMT_FIFO_L_CLK1_7", + "CMT_TOP_CLK1_7" + ], + [ + "CMT_FIFO_L_CLK1_8", + "CMT_TOP_CLK1_8" + ], + [ + "CMT_FIFO_L_CLK1_9", + "CMT_TOP_CLK1_9" + ], + [ + "CMT_FIFO_L_CLK1_10", + "CMT_TOP_CLK1_10" + ], + [ + "CMT_FIFO_L_CLK1_11", + "CMT_TOP_CLK1_11" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "CMT_TOP_CTRL0_1" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "CMT_TOP_CTRL0_2" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "CMT_TOP_CTRL0_3" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "CMT_TOP_CTRL0_4" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "CMT_TOP_CTRL0_5" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "CMT_TOP_CTRL0_6" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "CMT_TOP_CTRL0_7" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "CMT_TOP_CTRL0_8" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "CMT_TOP_CTRL0_9" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "CMT_TOP_CTRL0_10" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "CMT_TOP_CTRL0_11" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "CMT_TOP_CTRL1_1" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "CMT_TOP_CTRL1_2" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "CMT_TOP_CTRL1_3" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "CMT_TOP_CTRL1_4" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "CMT_TOP_CTRL1_5" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "CMT_TOP_CTRL1_6" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "CMT_TOP_CTRL1_7" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "CMT_TOP_CTRL1_8" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "CMT_TOP_CTRL1_9" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "CMT_TOP_CTRL1_10" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "CMT_TOP_CTRL1_11" + ], + [ + "CMT_FIFO_L_FAN0_0", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_FIFO_L_FAN0_1", + "CMT_TOP_FAN0_1" + ], + [ + "CMT_FIFO_L_FAN0_2", + "CMT_TOP_FAN0_2" + ], + [ + "CMT_FIFO_L_FAN0_3", + "CMT_TOP_FAN0_3" + ], + [ + "CMT_FIFO_L_FAN0_4", + "CMT_TOP_FAN0_4" + ], + [ + "CMT_FIFO_L_FAN0_5", + "CMT_TOP_FAN0_5" + ], + [ + "CMT_FIFO_L_FAN0_6", + "CMT_TOP_FAN0_6" + ], + [ + "CMT_FIFO_L_FAN0_7", + "CMT_TOP_FAN0_7" + ], + [ + "CMT_FIFO_L_FAN0_8", + "CMT_TOP_FAN0_8" + ], + [ + "CMT_FIFO_L_FAN0_9", + "CMT_TOP_FAN0_9" + ], + [ + "CMT_FIFO_L_FAN0_10", + "CMT_TOP_FAN0_10" + ], + [ + "CMT_FIFO_L_FAN0_11", + "CMT_TOP_FAN0_11" + ], + [ + "CMT_FIFO_L_FAN1_0", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_FIFO_L_FAN1_1", + "CMT_TOP_FAN1_1" + ], + [ + "CMT_FIFO_L_FAN1_2", + "CMT_TOP_FAN1_2" + ], + [ + "CMT_FIFO_L_FAN1_3", + "CMT_TOP_FAN1_3" + ], + [ + "CMT_FIFO_L_FAN1_4", + "CMT_TOP_FAN1_4" + ], + [ + "CMT_FIFO_L_FAN1_5", + "CMT_TOP_FAN1_5" + ], + [ + "CMT_FIFO_L_FAN1_6", + "CMT_TOP_FAN1_6" + ], + [ + "CMT_FIFO_L_FAN1_7", + "CMT_TOP_FAN1_7" + ], + [ + "CMT_FIFO_L_FAN1_8", + "CMT_TOP_FAN1_8" + ], + [ + "CMT_FIFO_L_FAN1_9", + "CMT_TOP_FAN1_9" + ], + [ + "CMT_FIFO_L_FAN1_10", + "CMT_TOP_FAN1_10" + ], + [ + "CMT_FIFO_L_FAN1_11", + "CMT_TOP_FAN1_11" + ], + [ + "CMT_FIFO_L_FAN2_0", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_FIFO_L_FAN2_1", + "CMT_TOP_FAN2_1" + ], + [ + "CMT_FIFO_L_FAN2_2", + "CMT_TOP_FAN2_2" + ], + [ + "CMT_FIFO_L_FAN2_3", + "CMT_TOP_FAN2_3" + ], + [ + "CMT_FIFO_L_FAN2_4", + "CMT_TOP_FAN2_4" + ], + [ + "CMT_FIFO_L_FAN2_5", + "CMT_TOP_FAN2_5" + ], + [ + "CMT_FIFO_L_FAN2_6", + "CMT_TOP_FAN2_6" + ], + [ + "CMT_FIFO_L_FAN2_7", + "CMT_TOP_FAN2_7" + ], + [ + "CMT_FIFO_L_FAN2_8", + "CMT_TOP_FAN2_8" + ], + [ + "CMT_FIFO_L_FAN2_9", + "CMT_TOP_FAN2_9" + ], + [ + "CMT_FIFO_L_FAN2_10", + "CMT_TOP_FAN2_10" + ], + [ + "CMT_FIFO_L_FAN2_11", + "CMT_TOP_FAN2_11" + ], + [ + "CMT_FIFO_L_FAN3_0", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_FIFO_L_FAN3_1", + "CMT_TOP_FAN3_1" + ], + [ + "CMT_FIFO_L_FAN3_2", + "CMT_TOP_FAN3_2" + ], + [ + "CMT_FIFO_L_FAN3_3", + "CMT_TOP_FAN3_3" + ], + [ + "CMT_FIFO_L_FAN3_4", + "CMT_TOP_FAN3_4" + ], + [ + "CMT_FIFO_L_FAN3_5", + "CMT_TOP_FAN3_5" + ], + [ + "CMT_FIFO_L_FAN3_6", + "CMT_TOP_FAN3_6" + ], + [ + "CMT_FIFO_L_FAN3_7", + "CMT_TOP_FAN3_7" + ], + [ + "CMT_FIFO_L_FAN3_8", + "CMT_TOP_FAN3_8" + ], + [ + "CMT_FIFO_L_FAN3_9", + "CMT_TOP_FAN3_9" + ], + [ + "CMT_FIFO_L_FAN3_10", + "CMT_TOP_FAN3_10" + ], + [ + "CMT_FIFO_L_FAN3_11", + "CMT_TOP_FAN3_11" + ], + [ + "CMT_FIFO_L_FAN4_0", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_FIFO_L_FAN4_1", + "CMT_TOP_FAN4_1" + ], + [ + "CMT_FIFO_L_FAN4_2", + "CMT_TOP_FAN4_2" + ], + [ + "CMT_FIFO_L_FAN4_3", + "CMT_TOP_FAN4_3" + ], + [ + "CMT_FIFO_L_FAN4_4", + "CMT_TOP_FAN4_4" + ], + [ + "CMT_FIFO_L_FAN4_5", + "CMT_TOP_FAN4_5" + ], + [ + "CMT_FIFO_L_FAN4_6", + "CMT_TOP_FAN4_6" + ], + [ + "CMT_FIFO_L_FAN4_7", + "CMT_TOP_FAN4_7" + ], + [ + "CMT_FIFO_L_FAN4_8", + "CMT_TOP_FAN4_8" + ], + [ + "CMT_FIFO_L_FAN4_9", + "CMT_TOP_FAN4_9" + ], + [ + "CMT_FIFO_L_FAN4_10", + "CMT_TOP_FAN4_10" + ], + [ + "CMT_FIFO_L_FAN4_11", + "CMT_TOP_FAN4_11" + ], + [ + "CMT_FIFO_L_FAN5_0", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_FIFO_L_FAN5_1", + "CMT_TOP_FAN5_1" + ], + [ + "CMT_FIFO_L_FAN5_2", + "CMT_TOP_FAN5_2" + ], + [ + "CMT_FIFO_L_FAN5_3", + "CMT_TOP_FAN5_3" + ], + [ + "CMT_FIFO_L_FAN5_4", + "CMT_TOP_FAN5_4" + ], + [ + "CMT_FIFO_L_FAN5_5", + "CMT_TOP_FAN5_5" + ], + [ + "CMT_FIFO_L_FAN5_6", + "CMT_TOP_FAN5_6" + ], + [ + "CMT_FIFO_L_FAN5_7", + "CMT_TOP_FAN5_7" + ], + [ + "CMT_FIFO_L_FAN5_8", + "CMT_TOP_FAN5_8" + ], + [ + "CMT_FIFO_L_FAN5_9", + "CMT_TOP_FAN5_9" + ], + [ + "CMT_FIFO_L_FAN5_10", + "CMT_TOP_FAN5_10" + ], + [ + "CMT_FIFO_L_FAN5_11", + "CMT_TOP_FAN5_11" + ], + [ + "CMT_FIFO_L_FAN6_0", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_FIFO_L_FAN6_1", + "CMT_TOP_FAN6_1" + ], + [ + "CMT_FIFO_L_FAN6_2", + "CMT_TOP_FAN6_2" + ], + [ + "CMT_FIFO_L_FAN6_3", + "CMT_TOP_FAN6_3" + ], + [ + "CMT_FIFO_L_FAN6_4", + "CMT_TOP_FAN6_4" + ], + [ + "CMT_FIFO_L_FAN6_5", + "CMT_TOP_FAN6_5" + ], + [ + "CMT_FIFO_L_FAN6_6", + "CMT_TOP_FAN6_6" + ], + [ + "CMT_FIFO_L_FAN6_7", + "CMT_TOP_FAN6_7" + ], + [ + "CMT_FIFO_L_FAN6_8", + "CMT_TOP_FAN6_8" + ], + [ + "CMT_FIFO_L_FAN6_9", + "CMT_TOP_FAN6_9" + ], + [ + "CMT_FIFO_L_FAN6_10", + "CMT_TOP_FAN6_10" + ], + [ + "CMT_FIFO_L_FAN6_11", + "CMT_TOP_FAN6_11" + ], + [ + "CMT_FIFO_L_FAN7_0", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_FIFO_L_FAN7_1", + "CMT_TOP_FAN7_1" + ], + [ + "CMT_FIFO_L_FAN7_2", + "CMT_TOP_FAN7_2" + ], + [ + "CMT_FIFO_L_FAN7_3", + "CMT_TOP_FAN7_3" + ], + [ + "CMT_FIFO_L_FAN7_4", + "CMT_TOP_FAN7_4" + ], + [ + "CMT_FIFO_L_FAN7_5", + "CMT_TOP_FAN7_5" + ], + [ + "CMT_FIFO_L_FAN7_6", + "CMT_TOP_FAN7_6" + ], + [ + "CMT_FIFO_L_FAN7_7", + "CMT_TOP_FAN7_7" + ], + [ + "CMT_FIFO_L_FAN7_8", + "CMT_TOP_FAN7_8" + ], + [ + "CMT_FIFO_L_FAN7_9", + "CMT_TOP_FAN7_9" + ], + [ + "CMT_FIFO_L_FAN7_10", + "CMT_TOP_FAN7_10" + ], + [ + "CMT_FIFO_L_FAN7_11", + "CMT_TOP_FAN7_11" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "CMT_TOP_IMUX0_1" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "CMT_TOP_IMUX0_2" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "CMT_TOP_IMUX0_3" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "CMT_TOP_IMUX0_4" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "CMT_TOP_IMUX0_5" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "CMT_TOP_IMUX0_6" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "CMT_TOP_IMUX0_7" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "CMT_TOP_IMUX0_8" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "CMT_TOP_IMUX0_9" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "CMT_TOP_IMUX0_10" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "CMT_TOP_IMUX0_11" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "CMT_TOP_IMUX1_1" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "CMT_TOP_IMUX1_2" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "CMT_TOP_IMUX1_3" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "CMT_TOP_IMUX1_4" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "CMT_TOP_IMUX1_5" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "CMT_TOP_IMUX1_6" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "CMT_TOP_IMUX1_7" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "CMT_TOP_IMUX1_8" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "CMT_TOP_IMUX1_9" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "CMT_TOP_IMUX1_10" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "CMT_TOP_IMUX1_11" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "CMT_TOP_IMUX2_1" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "CMT_TOP_IMUX2_2" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "CMT_TOP_IMUX2_3" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "CMT_TOP_IMUX2_4" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "CMT_TOP_IMUX2_5" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "CMT_TOP_IMUX2_6" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "CMT_TOP_IMUX2_7" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "CMT_TOP_IMUX2_8" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "CMT_TOP_IMUX2_9" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "CMT_TOP_IMUX2_10" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "CMT_TOP_IMUX2_11" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "CMT_TOP_IMUX3_1" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "CMT_TOP_IMUX3_2" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "CMT_TOP_IMUX3_3" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "CMT_TOP_IMUX3_4" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "CMT_TOP_IMUX3_5" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "CMT_TOP_IMUX3_6" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "CMT_TOP_IMUX3_7" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "CMT_TOP_IMUX3_8" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "CMT_TOP_IMUX3_9" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "CMT_TOP_IMUX3_10" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "CMT_TOP_IMUX3_11" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "CMT_TOP_IMUX4_1" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "CMT_TOP_IMUX4_2" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "CMT_TOP_IMUX4_3" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "CMT_TOP_IMUX4_4" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "CMT_TOP_IMUX4_5" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "CMT_TOP_IMUX4_6" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "CMT_TOP_IMUX4_7" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "CMT_TOP_IMUX4_8" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "CMT_TOP_IMUX4_9" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "CMT_TOP_IMUX4_10" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "CMT_TOP_IMUX4_11" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "CMT_TOP_IMUX5_1" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "CMT_TOP_IMUX5_2" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "CMT_TOP_IMUX5_3" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "CMT_TOP_IMUX5_4" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "CMT_TOP_IMUX5_5" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "CMT_TOP_IMUX5_6" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "CMT_TOP_IMUX5_7" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "CMT_TOP_IMUX5_8" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "CMT_TOP_IMUX5_9" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "CMT_TOP_IMUX5_10" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "CMT_TOP_IMUX5_11" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "CMT_TOP_IMUX6_1" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "CMT_TOP_IMUX6_2" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "CMT_TOP_IMUX6_3" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "CMT_TOP_IMUX6_4" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "CMT_TOP_IMUX6_5" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "CMT_TOP_IMUX6_6" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "CMT_TOP_IMUX6_7" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "CMT_TOP_IMUX6_8" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "CMT_TOP_IMUX6_9" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "CMT_TOP_IMUX6_10" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "CMT_TOP_IMUX6_11" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "CMT_TOP_IMUX7_1" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "CMT_TOP_IMUX7_2" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "CMT_TOP_IMUX7_3" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "CMT_TOP_IMUX7_4" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "CMT_TOP_IMUX7_5" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "CMT_TOP_IMUX7_6" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "CMT_TOP_IMUX7_7" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "CMT_TOP_IMUX7_8" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "CMT_TOP_IMUX7_9" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "CMT_TOP_IMUX7_10" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "CMT_TOP_IMUX7_11" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "CMT_TOP_IMUX8_1" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "CMT_TOP_IMUX8_2" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "CMT_TOP_IMUX8_3" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "CMT_TOP_IMUX8_4" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "CMT_TOP_IMUX8_5" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "CMT_TOP_IMUX8_6" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "CMT_TOP_IMUX8_7" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "CMT_TOP_IMUX8_8" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "CMT_TOP_IMUX8_9" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "CMT_TOP_IMUX8_10" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "CMT_TOP_IMUX8_11" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "CMT_TOP_IMUX9_1" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "CMT_TOP_IMUX9_2" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "CMT_TOP_IMUX9_3" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "CMT_TOP_IMUX9_4" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "CMT_TOP_IMUX9_5" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "CMT_TOP_IMUX9_6" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "CMT_TOP_IMUX9_7" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "CMT_TOP_IMUX9_8" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "CMT_TOP_IMUX9_9" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "CMT_TOP_IMUX9_10" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "CMT_TOP_IMUX9_11" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "CMT_TOP_IMUX10_1" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "CMT_TOP_IMUX10_2" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "CMT_TOP_IMUX10_3" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "CMT_TOP_IMUX10_4" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "CMT_TOP_IMUX10_5" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "CMT_TOP_IMUX10_6" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "CMT_TOP_IMUX10_7" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "CMT_TOP_IMUX10_8" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "CMT_TOP_IMUX10_9" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "CMT_TOP_IMUX10_10" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "CMT_TOP_IMUX10_11" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "CMT_TOP_IMUX11_1" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "CMT_TOP_IMUX11_2" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "CMT_TOP_IMUX11_3" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "CMT_TOP_IMUX11_4" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "CMT_TOP_IMUX11_5" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "CMT_TOP_IMUX11_6" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "CMT_TOP_IMUX11_7" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "CMT_TOP_IMUX11_8" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "CMT_TOP_IMUX11_9" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "CMT_TOP_IMUX11_10" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "CMT_TOP_IMUX11_11" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "CMT_TOP_IMUX12_1" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "CMT_TOP_IMUX12_2" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "CMT_TOP_IMUX12_3" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "CMT_TOP_IMUX12_4" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "CMT_TOP_IMUX12_5" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "CMT_TOP_IMUX12_6" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "CMT_TOP_IMUX12_7" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "CMT_TOP_IMUX12_8" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "CMT_TOP_IMUX12_9" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "CMT_TOP_IMUX12_10" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "CMT_TOP_IMUX12_11" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "CMT_TOP_IMUX13_1" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "CMT_TOP_IMUX13_2" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "CMT_TOP_IMUX13_3" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "CMT_TOP_IMUX13_4" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "CMT_TOP_IMUX13_5" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "CMT_TOP_IMUX13_6" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "CMT_TOP_IMUX13_7" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "CMT_TOP_IMUX13_8" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "CMT_TOP_IMUX13_9" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "CMT_TOP_IMUX13_10" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "CMT_TOP_IMUX13_11" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "CMT_TOP_IMUX14_1" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "CMT_TOP_IMUX14_2" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "CMT_TOP_IMUX14_3" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "CMT_TOP_IMUX14_4" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "CMT_TOP_IMUX14_5" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "CMT_TOP_IMUX14_6" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "CMT_TOP_IMUX14_7" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "CMT_TOP_IMUX14_8" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "CMT_TOP_IMUX14_9" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "CMT_TOP_IMUX14_10" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "CMT_TOP_IMUX14_11" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "CMT_TOP_IMUX15_1" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "CMT_TOP_IMUX15_2" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "CMT_TOP_IMUX15_3" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "CMT_TOP_IMUX15_4" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "CMT_TOP_IMUX15_5" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "CMT_TOP_IMUX15_6" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "CMT_TOP_IMUX15_7" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "CMT_TOP_IMUX15_8" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "CMT_TOP_IMUX15_9" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "CMT_TOP_IMUX15_10" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "CMT_TOP_IMUX15_11" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "CMT_TOP_IMUX16_1" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "CMT_TOP_IMUX16_2" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "CMT_TOP_IMUX16_3" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "CMT_TOP_IMUX16_4" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "CMT_TOP_IMUX16_5" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "CMT_TOP_IMUX16_6" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "CMT_TOP_IMUX16_7" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "CMT_TOP_IMUX16_8" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "CMT_TOP_IMUX16_9" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "CMT_TOP_IMUX16_10" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "CMT_TOP_IMUX16_11" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "CMT_TOP_IMUX17_1" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "CMT_TOP_IMUX17_2" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "CMT_TOP_IMUX17_3" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "CMT_TOP_IMUX17_4" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "CMT_TOP_IMUX17_5" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "CMT_TOP_IMUX17_6" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "CMT_TOP_IMUX17_7" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "CMT_TOP_IMUX17_8" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "CMT_TOP_IMUX17_9" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "CMT_TOP_IMUX17_10" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "CMT_TOP_IMUX17_11" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "CMT_TOP_IMUX18_1" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "CMT_TOP_IMUX18_2" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "CMT_TOP_IMUX18_3" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "CMT_TOP_IMUX18_4" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "CMT_TOP_IMUX18_5" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "CMT_TOP_IMUX18_6" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "CMT_TOP_IMUX18_7" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "CMT_TOP_IMUX18_8" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "CMT_TOP_IMUX18_9" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "CMT_TOP_IMUX18_10" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "CMT_TOP_IMUX18_11" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "CMT_TOP_IMUX19_1" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "CMT_TOP_IMUX19_2" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "CMT_TOP_IMUX19_3" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "CMT_TOP_IMUX19_4" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "CMT_TOP_IMUX19_5" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "CMT_TOP_IMUX19_6" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "CMT_TOP_IMUX19_7" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "CMT_TOP_IMUX19_8" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "CMT_TOP_IMUX19_9" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "CMT_TOP_IMUX19_10" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "CMT_TOP_IMUX19_11" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "CMT_TOP_IMUX20_1" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "CMT_TOP_IMUX20_2" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "CMT_TOP_IMUX20_3" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "CMT_TOP_IMUX20_4" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "CMT_TOP_IMUX20_5" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "CMT_TOP_IMUX20_6" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "CMT_TOP_IMUX20_7" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "CMT_TOP_IMUX20_8" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "CMT_TOP_IMUX20_9" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "CMT_TOP_IMUX20_10" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "CMT_TOP_IMUX20_11" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "CMT_TOP_IMUX21_1" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "CMT_TOP_IMUX21_2" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "CMT_TOP_IMUX21_3" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "CMT_TOP_IMUX21_4" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "CMT_TOP_IMUX21_5" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "CMT_TOP_IMUX21_6" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "CMT_TOP_IMUX21_7" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "CMT_TOP_IMUX21_8" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "CMT_TOP_IMUX21_9" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "CMT_TOP_IMUX21_10" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "CMT_TOP_IMUX21_11" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "CMT_TOP_IMUX22_1" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "CMT_TOP_IMUX22_2" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "CMT_TOP_IMUX22_3" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "CMT_TOP_IMUX22_4" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "CMT_TOP_IMUX22_5" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "CMT_TOP_IMUX22_6" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "CMT_TOP_IMUX22_7" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "CMT_TOP_IMUX22_8" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "CMT_TOP_IMUX22_9" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "CMT_TOP_IMUX22_10" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "CMT_TOP_IMUX22_11" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "CMT_TOP_IMUX23_1" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "CMT_TOP_IMUX23_2" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "CMT_TOP_IMUX23_3" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "CMT_TOP_IMUX23_4" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "CMT_TOP_IMUX23_5" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "CMT_TOP_IMUX23_6" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "CMT_TOP_IMUX23_7" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "CMT_TOP_IMUX23_8" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "CMT_TOP_IMUX23_9" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "CMT_TOP_IMUX23_10" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "CMT_TOP_IMUX23_11" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "CMT_TOP_IMUX24_1" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "CMT_TOP_IMUX24_2" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "CMT_TOP_IMUX24_3" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "CMT_TOP_IMUX24_4" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "CMT_TOP_IMUX24_5" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "CMT_TOP_IMUX24_6" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "CMT_TOP_IMUX24_7" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "CMT_TOP_IMUX24_8" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "CMT_TOP_IMUX24_9" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "CMT_TOP_IMUX24_10" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "CMT_TOP_IMUX24_11" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "CMT_TOP_IMUX25_1" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "CMT_TOP_IMUX25_2" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "CMT_TOP_IMUX25_3" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "CMT_TOP_IMUX25_4" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "CMT_TOP_IMUX25_5" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "CMT_TOP_IMUX25_6" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "CMT_TOP_IMUX25_7" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "CMT_TOP_IMUX25_8" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "CMT_TOP_IMUX25_9" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "CMT_TOP_IMUX25_10" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "CMT_TOP_IMUX25_11" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "CMT_TOP_IMUX26_1" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "CMT_TOP_IMUX26_2" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "CMT_TOP_IMUX26_3" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "CMT_TOP_IMUX26_4" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "CMT_TOP_IMUX26_5" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "CMT_TOP_IMUX26_6" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "CMT_TOP_IMUX26_7" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "CMT_TOP_IMUX26_8" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "CMT_TOP_IMUX26_9" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "CMT_TOP_IMUX26_10" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "CMT_TOP_IMUX26_11" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "CMT_TOP_IMUX27_1" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "CMT_TOP_IMUX27_2" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "CMT_TOP_IMUX27_3" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "CMT_TOP_IMUX27_4" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "CMT_TOP_IMUX27_5" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "CMT_TOP_IMUX27_6" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "CMT_TOP_IMUX27_7" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "CMT_TOP_IMUX27_8" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "CMT_TOP_IMUX27_9" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "CMT_TOP_IMUX27_10" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "CMT_TOP_IMUX27_11" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "CMT_TOP_IMUX28_1" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "CMT_TOP_IMUX28_2" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "CMT_TOP_IMUX28_3" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "CMT_TOP_IMUX28_4" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "CMT_TOP_IMUX28_5" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "CMT_TOP_IMUX28_6" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "CMT_TOP_IMUX28_7" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "CMT_TOP_IMUX28_8" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "CMT_TOP_IMUX28_9" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "CMT_TOP_IMUX28_10" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "CMT_TOP_IMUX28_11" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "CMT_TOP_IMUX29_1" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "CMT_TOP_IMUX29_2" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "CMT_TOP_IMUX29_3" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "CMT_TOP_IMUX29_4" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "CMT_TOP_IMUX29_5" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "CMT_TOP_IMUX29_6" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "CMT_TOP_IMUX29_7" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "CMT_TOP_IMUX29_8" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "CMT_TOP_IMUX29_9" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "CMT_TOP_IMUX29_10" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "CMT_TOP_IMUX29_11" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "CMT_TOP_IMUX30_1" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "CMT_TOP_IMUX30_2" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "CMT_TOP_IMUX30_3" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "CMT_TOP_IMUX30_4" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "CMT_TOP_IMUX30_5" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "CMT_TOP_IMUX30_6" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "CMT_TOP_IMUX30_7" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "CMT_TOP_IMUX30_8" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "CMT_TOP_IMUX30_9" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "CMT_TOP_IMUX30_10" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "CMT_TOP_IMUX30_11" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "CMT_TOP_IMUX31_1" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "CMT_TOP_IMUX31_2" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "CMT_TOP_IMUX31_3" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "CMT_TOP_IMUX31_4" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "CMT_TOP_IMUX31_5" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "CMT_TOP_IMUX31_6" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "CMT_TOP_IMUX31_7" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "CMT_TOP_IMUX31_8" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "CMT_TOP_IMUX31_9" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "CMT_TOP_IMUX31_10" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "CMT_TOP_IMUX31_11" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "CMT_TOP_IMUX32_1" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "CMT_TOP_IMUX32_2" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "CMT_TOP_IMUX32_3" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "CMT_TOP_IMUX32_4" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "CMT_TOP_IMUX32_5" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "CMT_TOP_IMUX32_6" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "CMT_TOP_IMUX32_7" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "CMT_TOP_IMUX32_8" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "CMT_TOP_IMUX32_9" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "CMT_TOP_IMUX32_10" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "CMT_TOP_IMUX32_11" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "CMT_TOP_IMUX33_1" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "CMT_TOP_IMUX33_2" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "CMT_TOP_IMUX33_3" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "CMT_TOP_IMUX33_4" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "CMT_TOP_IMUX33_5" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "CMT_TOP_IMUX33_6" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "CMT_TOP_IMUX33_7" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "CMT_TOP_IMUX33_8" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "CMT_TOP_IMUX33_9" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "CMT_TOP_IMUX33_10" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "CMT_TOP_IMUX33_11" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "CMT_TOP_IMUX34_1" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "CMT_TOP_IMUX34_2" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "CMT_TOP_IMUX34_3" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "CMT_TOP_IMUX34_4" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "CMT_TOP_IMUX34_5" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "CMT_TOP_IMUX34_6" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "CMT_TOP_IMUX34_7" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "CMT_TOP_IMUX34_8" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "CMT_TOP_IMUX34_9" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "CMT_TOP_IMUX34_10" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "CMT_TOP_IMUX34_11" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "CMT_TOP_IMUX35_1" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "CMT_TOP_IMUX35_2" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "CMT_TOP_IMUX35_3" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "CMT_TOP_IMUX35_4" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "CMT_TOP_IMUX35_5" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "CMT_TOP_IMUX35_6" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "CMT_TOP_IMUX35_7" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "CMT_TOP_IMUX35_8" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "CMT_TOP_IMUX35_9" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "CMT_TOP_IMUX35_10" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "CMT_TOP_IMUX35_11" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "CMT_TOP_IMUX36_1" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "CMT_TOP_IMUX36_2" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "CMT_TOP_IMUX36_3" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "CMT_TOP_IMUX36_4" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "CMT_TOP_IMUX36_5" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "CMT_TOP_IMUX36_6" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "CMT_TOP_IMUX36_7" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "CMT_TOP_IMUX36_8" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "CMT_TOP_IMUX36_9" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "CMT_TOP_IMUX36_10" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "CMT_TOP_IMUX36_11" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "CMT_TOP_IMUX37_1" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "CMT_TOP_IMUX37_2" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "CMT_TOP_IMUX37_3" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "CMT_TOP_IMUX37_4" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "CMT_TOP_IMUX37_5" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "CMT_TOP_IMUX37_6" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "CMT_TOP_IMUX37_7" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "CMT_TOP_IMUX37_8" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "CMT_TOP_IMUX37_9" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "CMT_TOP_IMUX37_10" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "CMT_TOP_IMUX37_11" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "CMT_TOP_IMUX38_1" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "CMT_TOP_IMUX38_2" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "CMT_TOP_IMUX38_3" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "CMT_TOP_IMUX38_4" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "CMT_TOP_IMUX38_5" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "CMT_TOP_IMUX38_6" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "CMT_TOP_IMUX38_7" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "CMT_TOP_IMUX38_8" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "CMT_TOP_IMUX38_9" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "CMT_TOP_IMUX38_10" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "CMT_TOP_IMUX38_11" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "CMT_TOP_IMUX39_1" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "CMT_TOP_IMUX39_2" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "CMT_TOP_IMUX39_3" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "CMT_TOP_IMUX39_4" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "CMT_TOP_IMUX39_5" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "CMT_TOP_IMUX39_6" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "CMT_TOP_IMUX39_7" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "CMT_TOP_IMUX39_8" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "CMT_TOP_IMUX39_9" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "CMT_TOP_IMUX39_10" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "CMT_TOP_IMUX39_11" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "CMT_TOP_IMUX40_1" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "CMT_TOP_IMUX40_2" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "CMT_TOP_IMUX40_3" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "CMT_TOP_IMUX40_4" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "CMT_TOP_IMUX40_5" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "CMT_TOP_IMUX40_6" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "CMT_TOP_IMUX40_7" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "CMT_TOP_IMUX40_8" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "CMT_TOP_IMUX40_9" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "CMT_TOP_IMUX40_10" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "CMT_TOP_IMUX40_11" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "CMT_TOP_IMUX41_1" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "CMT_TOP_IMUX41_2" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "CMT_TOP_IMUX41_3" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "CMT_TOP_IMUX41_4" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "CMT_TOP_IMUX41_5" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "CMT_TOP_IMUX41_6" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "CMT_TOP_IMUX41_7" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "CMT_TOP_IMUX41_8" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "CMT_TOP_IMUX41_9" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "CMT_TOP_IMUX41_10" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "CMT_TOP_IMUX41_11" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "CMT_TOP_IMUX42_1" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "CMT_TOP_IMUX42_2" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "CMT_TOP_IMUX42_3" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "CMT_TOP_IMUX42_4" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "CMT_TOP_IMUX42_5" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "CMT_TOP_IMUX42_6" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "CMT_TOP_IMUX42_7" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "CMT_TOP_IMUX42_8" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "CMT_TOP_IMUX42_9" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "CMT_TOP_IMUX42_10" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "CMT_TOP_IMUX42_11" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "CMT_TOP_IMUX43_1" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "CMT_TOP_IMUX43_2" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "CMT_TOP_IMUX43_3" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "CMT_TOP_IMUX43_4" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "CMT_TOP_IMUX43_5" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "CMT_TOP_IMUX43_6" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "CMT_TOP_IMUX43_7" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "CMT_TOP_IMUX43_8" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "CMT_TOP_IMUX43_9" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "CMT_TOP_IMUX43_10" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "CMT_TOP_IMUX43_11" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "CMT_TOP_IMUX44_1" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "CMT_TOP_IMUX44_2" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "CMT_TOP_IMUX44_3" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "CMT_TOP_IMUX44_4" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "CMT_TOP_IMUX44_5" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "CMT_TOP_IMUX44_6" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "CMT_TOP_IMUX44_7" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "CMT_TOP_IMUX44_8" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "CMT_TOP_IMUX44_9" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "CMT_TOP_IMUX44_10" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "CMT_TOP_IMUX44_11" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "CMT_TOP_IMUX45_1" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "CMT_TOP_IMUX45_2" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "CMT_TOP_IMUX45_3" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "CMT_TOP_IMUX45_4" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "CMT_TOP_IMUX45_5" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "CMT_TOP_IMUX45_6" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "CMT_TOP_IMUX45_7" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "CMT_TOP_IMUX45_8" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "CMT_TOP_IMUX45_9" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "CMT_TOP_IMUX45_10" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "CMT_TOP_IMUX45_11" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "CMT_TOP_IMUX46_1" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "CMT_TOP_IMUX46_2" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "CMT_TOP_IMUX46_3" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "CMT_TOP_IMUX46_4" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "CMT_TOP_IMUX46_5" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "CMT_TOP_IMUX46_6" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "CMT_TOP_IMUX46_7" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "CMT_TOP_IMUX46_8" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "CMT_TOP_IMUX46_9" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "CMT_TOP_IMUX46_10" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "CMT_TOP_IMUX46_11" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "CMT_TOP_IMUX47_1" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "CMT_TOP_IMUX47_2" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "CMT_TOP_IMUX47_3" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "CMT_TOP_IMUX47_4" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "CMT_TOP_IMUX47_5" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "CMT_TOP_IMUX47_6" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "CMT_TOP_IMUX47_7" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "CMT_TOP_IMUX47_8" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "CMT_TOP_IMUX47_9" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "CMT_TOP_IMUX47_10" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "CMT_TOP_IMUX47_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "CMT_TOP_LOGIC_OUTS_L_B0_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "CMT_TOP_LOGIC_OUTS_L_B0_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "CMT_TOP_LOGIC_OUTS_L_B0_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "CMT_TOP_LOGIC_OUTS_L_B0_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "CMT_TOP_LOGIC_OUTS_L_B0_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "CMT_TOP_LOGIC_OUTS_L_B0_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "CMT_TOP_LOGIC_OUTS_L_B0_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "CMT_TOP_LOGIC_OUTS_L_B0_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "CMT_TOP_LOGIC_OUTS_L_B0_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "CMT_TOP_LOGIC_OUTS_L_B0_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "CMT_TOP_LOGIC_OUTS_L_B1_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "CMT_TOP_LOGIC_OUTS_L_B1_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "CMT_TOP_LOGIC_OUTS_L_B1_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "CMT_TOP_LOGIC_OUTS_L_B1_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "CMT_TOP_LOGIC_OUTS_L_B1_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "CMT_TOP_LOGIC_OUTS_L_B1_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "CMT_TOP_LOGIC_OUTS_L_B1_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "CMT_TOP_LOGIC_OUTS_L_B1_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "CMT_TOP_LOGIC_OUTS_L_B1_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "CMT_TOP_LOGIC_OUTS_L_B1_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "CMT_TOP_LOGIC_OUTS_L_B1_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "CMT_TOP_LOGIC_OUTS_L_B1_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "CMT_TOP_LOGIC_OUTS_L_B2_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "CMT_TOP_LOGIC_OUTS_L_B2_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "CMT_TOP_LOGIC_OUTS_L_B2_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "CMT_TOP_LOGIC_OUTS_L_B2_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "CMT_TOP_LOGIC_OUTS_L_B2_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "CMT_TOP_LOGIC_OUTS_L_B2_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "CMT_TOP_LOGIC_OUTS_L_B2_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "CMT_TOP_LOGIC_OUTS_L_B2_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "CMT_TOP_LOGIC_OUTS_L_B3_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "CMT_TOP_LOGIC_OUTS_L_B3_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "CMT_TOP_LOGIC_OUTS_L_B4_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "CMT_TOP_LOGIC_OUTS_L_B4_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "CMT_TOP_LOGIC_OUTS_L_B4_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "CMT_TOP_LOGIC_OUTS_L_B4_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "CMT_TOP_LOGIC_OUTS_L_B4_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "CMT_TOP_LOGIC_OUTS_L_B4_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "CMT_TOP_LOGIC_OUTS_L_B4_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "CMT_TOP_LOGIC_OUTS_L_B4_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "CMT_TOP_LOGIC_OUTS_L_B4_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "CMT_TOP_LOGIC_OUTS_L_B4_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "CMT_TOP_LOGIC_OUTS_L_B4_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "CMT_TOP_LOGIC_OUTS_L_B5_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "CMT_TOP_LOGIC_OUTS_L_B5_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "CMT_TOP_LOGIC_OUTS_L_B5_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "CMT_TOP_LOGIC_OUTS_L_B5_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "CMT_TOP_LOGIC_OUTS_L_B5_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "CMT_TOP_LOGIC_OUTS_L_B5_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "CMT_TOP_LOGIC_OUTS_L_B5_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "CMT_TOP_LOGIC_OUTS_L_B5_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "CMT_TOP_LOGIC_OUTS_L_B5_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "CMT_TOP_LOGIC_OUTS_L_B5_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "CMT_TOP_LOGIC_OUTS_L_B5_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "CMT_TOP_LOGIC_OUTS_L_B6_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "CMT_TOP_LOGIC_OUTS_L_B6_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "CMT_TOP_LOGIC_OUTS_L_B7_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "CMT_TOP_LOGIC_OUTS_L_B7_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "CMT_TOP_LOGIC_OUTS_L_B7_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "CMT_TOP_LOGIC_OUTS_L_B7_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "CMT_TOP_LOGIC_OUTS_L_B7_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "CMT_TOP_LOGIC_OUTS_L_B7_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "CMT_TOP_LOGIC_OUTS_L_B7_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "CMT_TOP_LOGIC_OUTS_L_B7_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "CMT_TOP_LOGIC_OUTS_L_B8_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "CMT_TOP_LOGIC_OUTS_L_B8_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "CMT_TOP_LOGIC_OUTS_L_B8_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "CMT_TOP_LOGIC_OUTS_L_B8_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "CMT_TOP_LOGIC_OUTS_L_B8_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "CMT_TOP_LOGIC_OUTS_L_B8_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "CMT_TOP_LOGIC_OUTS_L_B8_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "CMT_TOP_LOGIC_OUTS_L_B8_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "CMT_TOP_LOGIC_OUTS_L_B8_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "CMT_TOP_LOGIC_OUTS_L_B8_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "CMT_TOP_LOGIC_OUTS_L_B8_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "CMT_TOP_LOGIC_OUTS_L_B9_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "CMT_TOP_LOGIC_OUTS_L_B9_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "CMT_TOP_LOGIC_OUTS_L_B9_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "CMT_TOP_LOGIC_OUTS_L_B9_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "CMT_TOP_LOGIC_OUTS_L_B9_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "CMT_TOP_LOGIC_OUTS_L_B9_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "CMT_TOP_LOGIC_OUTS_L_B9_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "CMT_TOP_LOGIC_OUTS_L_B9_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "CMT_TOP_LOGIC_OUTS_L_B9_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "CMT_TOP_LOGIC_OUTS_L_B9_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "CMT_TOP_LOGIC_OUTS_L_B9_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "CMT_TOP_LOGIC_OUTS_L_B9_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "CMT_TOP_LOGIC_OUTS_L_B10_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "CMT_TOP_LOGIC_OUTS_L_B10_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "CMT_TOP_LOGIC_OUTS_L_B10_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "CMT_TOP_LOGIC_OUTS_L_B10_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "CMT_TOP_LOGIC_OUTS_L_B10_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "CMT_TOP_LOGIC_OUTS_L_B10_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "CMT_TOP_LOGIC_OUTS_L_B10_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "CMT_TOP_LOGIC_OUTS_L_B10_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "CMT_TOP_LOGIC_OUTS_L_B11_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "CMT_TOP_LOGIC_OUTS_L_B11_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "CMT_TOP_LOGIC_OUTS_L_B11_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "CMT_TOP_LOGIC_OUTS_L_B11_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "CMT_TOP_LOGIC_OUTS_L_B11_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "CMT_TOP_LOGIC_OUTS_L_B11_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "CMT_TOP_LOGIC_OUTS_L_B11_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "CMT_TOP_LOGIC_OUTS_L_B11_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "CMT_TOP_LOGIC_OUTS_L_B11_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "CMT_TOP_LOGIC_OUTS_L_B11_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "CMT_TOP_LOGIC_OUTS_L_B11_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "CMT_TOP_LOGIC_OUTS_L_B11_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "CMT_TOP_LOGIC_OUTS_L_B12_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "CMT_TOP_LOGIC_OUTS_L_B12_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "CMT_TOP_LOGIC_OUTS_L_B12_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "CMT_TOP_LOGIC_OUTS_L_B12_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "CMT_TOP_LOGIC_OUTS_L_B12_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "CMT_TOP_LOGIC_OUTS_L_B12_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "CMT_TOP_LOGIC_OUTS_L_B12_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "CMT_TOP_LOGIC_OUTS_L_B12_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "CMT_TOP_LOGIC_OUTS_L_B12_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "CMT_TOP_LOGIC_OUTS_L_B12_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "CMT_TOP_LOGIC_OUTS_L_B12_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "CMT_TOP_LOGIC_OUTS_L_B12_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "CMT_TOP_LOGIC_OUTS_L_B13_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "CMT_TOP_LOGIC_OUTS_L_B13_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "CMT_TOP_LOGIC_OUTS_L_B13_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "CMT_TOP_LOGIC_OUTS_L_B13_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "CMT_TOP_LOGIC_OUTS_L_B13_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "CMT_TOP_LOGIC_OUTS_L_B13_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "CMT_TOP_LOGIC_OUTS_L_B13_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "CMT_TOP_LOGIC_OUTS_L_B13_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "CMT_TOP_LOGIC_OUTS_L_B13_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "CMT_TOP_LOGIC_OUTS_L_B13_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "CMT_TOP_LOGIC_OUTS_L_B13_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "CMT_TOP_LOGIC_OUTS_L_B14_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "CMT_TOP_LOGIC_OUTS_L_B14_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "CMT_TOP_LOGIC_OUTS_L_B15_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "CMT_TOP_LOGIC_OUTS_L_B15_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "CMT_TOP_LOGIC_OUTS_L_B15_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "CMT_TOP_LOGIC_OUTS_L_B15_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "CMT_TOP_LOGIC_OUTS_L_B15_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "CMT_TOP_LOGIC_OUTS_L_B15_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "CMT_TOP_LOGIC_OUTS_L_B15_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "CMT_TOP_LOGIC_OUTS_L_B15_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "CMT_TOP_LOGIC_OUTS_L_B16_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "CMT_TOP_LOGIC_OUTS_L_B16_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "CMT_TOP_LOGIC_OUTS_L_B16_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_11", + "CMT_TOP_LOGIC_OUTS_L_B16_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "CMT_TOP_LOGIC_OUTS_L_B17_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "CMT_TOP_LOGIC_OUTS_L_B17_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "CMT_TOP_LOGIC_OUTS_L_B17_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "CMT_TOP_LOGIC_OUTS_L_B17_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "CMT_TOP_LOGIC_OUTS_L_B17_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "CMT_TOP_LOGIC_OUTS_L_B17_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "CMT_TOP_LOGIC_OUTS_L_B17_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "CMT_TOP_LOGIC_OUTS_L_B17_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "CMT_TOP_LOGIC_OUTS_L_B18_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "CMT_TOP_LOGIC_OUTS_L_B18_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "CMT_TOP_LOGIC_OUTS_L_B18_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "CMT_TOP_LOGIC_OUTS_L_B18_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "CMT_TOP_LOGIC_OUTS_L_B18_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "CMT_TOP_LOGIC_OUTS_L_B18_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "CMT_TOP_LOGIC_OUTS_L_B18_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "CMT_TOP_LOGIC_OUTS_L_B18_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "CMT_TOP_LOGIC_OUTS_L_B19_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "CMT_TOP_LOGIC_OUTS_L_B19_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "CMT_TOP_LOGIC_OUTS_L_B19_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "CMT_TOP_LOGIC_OUTS_L_B19_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "CMT_TOP_LOGIC_OUTS_L_B19_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "CMT_TOP_LOGIC_OUTS_L_B19_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "CMT_TOP_LOGIC_OUTS_L_B19_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "CMT_TOP_LOGIC_OUTS_L_B19_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "CMT_TOP_LOGIC_OUTS_L_B19_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "CMT_TOP_LOGIC_OUTS_L_B19_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "CMT_TOP_LOGIC_OUTS_L_B19_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "CMT_TOP_LOGIC_OUTS_L_B20_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "CMT_TOP_LOGIC_OUTS_L_B20_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "CMT_TOP_LOGIC_OUTS_L_B20_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "CMT_TOP_LOGIC_OUTS_L_B20_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "CMT_TOP_LOGIC_OUTS_L_B20_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "CMT_TOP_LOGIC_OUTS_L_B20_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "CMT_TOP_LOGIC_OUTS_L_B20_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "CMT_TOP_LOGIC_OUTS_L_B20_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "CMT_TOP_LOGIC_OUTS_L_B20_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "CMT_TOP_LOGIC_OUTS_L_B20_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "CMT_TOP_LOGIC_OUTS_L_B20_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "CMT_TOP_LOGIC_OUTS_L_B21_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "CMT_TOP_LOGIC_OUTS_L_B21_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "CMT_TOP_LOGIC_OUTS_L_B21_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "CMT_TOP_LOGIC_OUTS_L_B21_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "CMT_TOP_LOGIC_OUTS_L_B21_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "CMT_TOP_LOGIC_OUTS_L_B21_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "CMT_TOP_LOGIC_OUTS_L_B21_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_11", + "CMT_TOP_LOGIC_OUTS_L_B21_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "CMT_TOP_LOGIC_OUTS_L_B22_1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "CMT_TOP_LOGIC_OUTS_L_B22_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "CMT_TOP_LOGIC_OUTS_L_B22_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "CMT_TOP_LOGIC_OUTS_L_B22_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "CMT_TOP_LOGIC_OUTS_L_B22_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "CMT_TOP_LOGIC_OUTS_L_B22_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "CMT_TOP_LOGIC_OUTS_L_B22_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "CMT_TOP_LOGIC_OUTS_L_B22_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "CMT_TOP_LOGIC_OUTS_L_B22_9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "CMT_TOP_LOGIC_OUTS_L_B22_10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "CMT_TOP_LOGIC_OUTS_L_B22_11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "CMT_TOP_LOGIC_OUTS_L_B23_2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "CMT_TOP_LOGIC_OUTS_L_B23_3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "CMT_TOP_LOGIC_OUTS_L_B23_4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "CMT_TOP_LOGIC_OUTS_L_B23_5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "CMT_TOP_LOGIC_OUTS_L_B23_6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "CMT_TOP_LOGIC_OUTS_L_B23_7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "CMT_TOP_LOGIC_OUTS_L_B23_8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "CMT_TOP_LOGIC_OUTS_L_B23_9" + ], + [ + "CMT_FIFO_L_PHASER_RDCLK", + "CMT_PLL_PHASER_RDCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_RDENABLE", + "CMT_PLL_PHASER_RDENABLE_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRCLK", + "CMT_PLL_PHASER_WRCLK_TOFIFO" + ], + [ + "CMT_FIFO_L_PHASER_WRENABLE", + "CMT_PLL_PHASER_WRENABLE_TOFIFO" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "CMT_TOP_MONITOR_N_0" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "CMT_TOP_MONITOR_N_2" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "CMT_TOP_MONITOR_N_4" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "CMT_TOP_MONITOR_N_6" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "CMT_TOP_MONITOR_N_8" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "CMT_TOP_MONITOR_N_10" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "CMT_TOP_MONITOR_P_0" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "CMT_TOP_MONITOR_P_2" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "CMT_TOP_MONITOR_P_4" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "CMT_TOP_MONITOR_P_6" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "CMT_TOP_MONITOR_P_8" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "CMT_TOP_MONITOR_P_10" + ], + [ + "CMT_FIFO_NE2A0_0", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_FIFO_NE2A0_1", + "CMT_TOP_NE2A0_1" + ], + [ + "CMT_FIFO_NE2A0_2", + "CMT_TOP_NE2A0_2" + ], + [ + "CMT_FIFO_NE2A0_3", + "CMT_TOP_NE2A0_3" + ], + [ + "CMT_FIFO_NE2A0_4", + "CMT_TOP_NE2A0_4" + ], + [ + "CMT_FIFO_NE2A0_5", + "CMT_TOP_NE2A0_5" + ], + [ + "CMT_FIFO_NE2A0_6", + "CMT_TOP_NE2A0_6" + ], + [ + "CMT_FIFO_NE2A0_7", + "CMT_TOP_NE2A0_7" + ], + [ + "CMT_FIFO_NE2A0_8", + "CMT_TOP_NE2A0_8" + ], + [ + "CMT_FIFO_NE2A0_9", + "CMT_TOP_NE2A0_9" + ], + [ + "CMT_FIFO_NE2A0_10", + "CMT_TOP_NE2A0_10" + ], + [ + "CMT_FIFO_NE2A0_11", + "CMT_TOP_NE2A0_11" + ], + [ + "CMT_FIFO_NE2A1_0", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_FIFO_NE2A1_1", + "CMT_TOP_NE2A1_1" + ], + [ + "CMT_FIFO_NE2A1_2", + "CMT_TOP_NE2A1_2" + ], + [ + "CMT_FIFO_NE2A1_3", + "CMT_TOP_NE2A1_3" + ], + [ + "CMT_FIFO_NE2A1_4", + "CMT_TOP_NE2A1_4" + ], + [ + "CMT_FIFO_NE2A1_5", + "CMT_TOP_NE2A1_5" + ], + [ + "CMT_FIFO_NE2A1_6", + "CMT_TOP_NE2A1_6" + ], + [ + "CMT_FIFO_NE2A1_7", + "CMT_TOP_NE2A1_7" + ], + [ + "CMT_FIFO_NE2A1_8", + "CMT_TOP_NE2A1_8" + ], + [ + "CMT_FIFO_NE2A1_9", + "CMT_TOP_NE2A1_9" + ], + [ + "CMT_FIFO_NE2A1_10", + "CMT_TOP_NE2A1_10" + ], + [ + "CMT_FIFO_NE2A1_11", + "CMT_TOP_NE2A1_11" + ], + [ + "CMT_FIFO_NE2A2_0", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_FIFO_NE2A2_1", + "CMT_TOP_NE2A2_1" + ], + [ + "CMT_FIFO_NE2A2_2", + "CMT_TOP_NE2A2_2" + ], + [ + "CMT_FIFO_NE2A2_3", + "CMT_TOP_NE2A2_3" + ], + [ + "CMT_FIFO_NE2A2_4", + "CMT_TOP_NE2A2_4" + ], + [ + "CMT_FIFO_NE2A2_5", + "CMT_TOP_NE2A2_5" + ], + [ + "CMT_FIFO_NE2A2_6", + "CMT_TOP_NE2A2_6" + ], + [ + "CMT_FIFO_NE2A2_7", + "CMT_TOP_NE2A2_7" + ], + [ + "CMT_FIFO_NE2A2_8", + "CMT_TOP_NE2A2_8" + ], + [ + "CMT_FIFO_NE2A2_9", + "CMT_TOP_NE2A2_9" + ], + [ + "CMT_FIFO_NE2A2_10", + "CMT_TOP_NE2A2_10" + ], + [ + "CMT_FIFO_NE2A2_11", + "CMT_TOP_NE2A2_11" + ], + [ + "CMT_FIFO_NE2A3_0", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_FIFO_NE2A3_1", + "CMT_TOP_NE2A3_1" + ], + [ + "CMT_FIFO_NE2A3_2", + "CMT_TOP_NE2A3_2" + ], + [ + "CMT_FIFO_NE2A3_3", + "CMT_TOP_NE2A3_3" + ], + [ + "CMT_FIFO_NE2A3_4", + "CMT_TOP_NE2A3_4" + ], + [ + "CMT_FIFO_NE2A3_5", + "CMT_TOP_NE2A3_5" + ], + [ + "CMT_FIFO_NE2A3_6", + "CMT_TOP_NE2A3_6" + ], + [ + "CMT_FIFO_NE2A3_7", + "CMT_TOP_NE2A3_7" + ], + [ + "CMT_FIFO_NE2A3_8", + "CMT_TOP_NE2A3_8" + ], + [ + "CMT_FIFO_NE2A3_9", + "CMT_TOP_NE2A3_9" + ], + [ + "CMT_FIFO_NE2A3_10", + "CMT_TOP_NE2A3_10" + ], + [ + "CMT_FIFO_NE2A3_11", + "CMT_TOP_NE2A3_11" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "CMT_TOP_NE4BEG0_1" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "CMT_TOP_NE4BEG0_2" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "CMT_TOP_NE4BEG0_3" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "CMT_TOP_NE4BEG0_4" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "CMT_TOP_NE4BEG0_5" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "CMT_TOP_NE4BEG0_6" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "CMT_TOP_NE4BEG0_7" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "CMT_TOP_NE4BEG0_8" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "CMT_TOP_NE4BEG0_9" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "CMT_TOP_NE4BEG0_10" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "CMT_TOP_NE4BEG0_11" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "CMT_TOP_NE4BEG1_1" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "CMT_TOP_NE4BEG1_2" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "CMT_TOP_NE4BEG1_3" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "CMT_TOP_NE4BEG1_4" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "CMT_TOP_NE4BEG1_5" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "CMT_TOP_NE4BEG1_6" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "CMT_TOP_NE4BEG1_7" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "CMT_TOP_NE4BEG1_8" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "CMT_TOP_NE4BEG1_9" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "CMT_TOP_NE4BEG1_10" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "CMT_TOP_NE4BEG1_11" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "CMT_TOP_NE4BEG2_1" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "CMT_TOP_NE4BEG2_2" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "CMT_TOP_NE4BEG2_3" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "CMT_TOP_NE4BEG2_4" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "CMT_TOP_NE4BEG2_5" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "CMT_TOP_NE4BEG2_6" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "CMT_TOP_NE4BEG2_7" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "CMT_TOP_NE4BEG2_8" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "CMT_TOP_NE4BEG2_9" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "CMT_TOP_NE4BEG2_10" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "CMT_TOP_NE4BEG2_11" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "CMT_TOP_NE4BEG3_1" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "CMT_TOP_NE4BEG3_2" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "CMT_TOP_NE4BEG3_3" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "CMT_TOP_NE4BEG3_4" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "CMT_TOP_NE4BEG3_5" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "CMT_TOP_NE4BEG3_6" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "CMT_TOP_NE4BEG3_7" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "CMT_TOP_NE4BEG3_8" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "CMT_TOP_NE4BEG3_9" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "CMT_TOP_NE4BEG3_10" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "CMT_TOP_NE4BEG3_11" + ], + [ + "CMT_FIFO_NE4C0_0", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_FIFO_NE4C0_1", + "CMT_TOP_NE4C0_1" + ], + [ + "CMT_FIFO_NE4C0_2", + "CMT_TOP_NE4C0_2" + ], + [ + "CMT_FIFO_NE4C0_3", + "CMT_TOP_NE4C0_3" + ], + [ + "CMT_FIFO_NE4C0_4", + "CMT_TOP_NE4C0_4" + ], + [ + "CMT_FIFO_NE4C0_5", + "CMT_TOP_NE4C0_5" + ], + [ + "CMT_FIFO_NE4C0_6", + "CMT_TOP_NE4C0_6" + ], + [ + "CMT_FIFO_NE4C0_7", + "CMT_TOP_NE4C0_7" + ], + [ + "CMT_FIFO_NE4C0_8", + "CMT_TOP_NE4C0_8" + ], + [ + "CMT_FIFO_NE4C0_9", + "CMT_TOP_NE4C0_9" + ], + [ + "CMT_FIFO_NE4C0_10", + "CMT_TOP_NE4C0_10" + ], + [ + "CMT_FIFO_NE4C0_11", + "CMT_TOP_NE4C0_11" + ], + [ + "CMT_FIFO_NE4C1_0", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_FIFO_NE4C1_1", + "CMT_TOP_NE4C1_1" + ], + [ + "CMT_FIFO_NE4C1_2", + "CMT_TOP_NE4C1_2" + ], + [ + "CMT_FIFO_NE4C1_3", + "CMT_TOP_NE4C1_3" + ], + [ + "CMT_FIFO_NE4C1_4", + "CMT_TOP_NE4C1_4" + ], + [ + "CMT_FIFO_NE4C1_5", + "CMT_TOP_NE4C1_5" + ], + [ + "CMT_FIFO_NE4C1_6", + "CMT_TOP_NE4C1_6" + ], + [ + "CMT_FIFO_NE4C1_7", + "CMT_TOP_NE4C1_7" + ], + [ + "CMT_FIFO_NE4C1_8", + "CMT_TOP_NE4C1_8" + ], + [ + "CMT_FIFO_NE4C1_9", + "CMT_TOP_NE4C1_9" + ], + [ + "CMT_FIFO_NE4C1_10", + "CMT_TOP_NE4C1_10" + ], + [ + "CMT_FIFO_NE4C1_11", + "CMT_TOP_NE4C1_11" + ], + [ + "CMT_FIFO_NE4C2_0", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_FIFO_NE4C2_1", + "CMT_TOP_NE4C2_1" + ], + [ + "CMT_FIFO_NE4C2_2", + "CMT_TOP_NE4C2_2" + ], + [ + "CMT_FIFO_NE4C2_3", + "CMT_TOP_NE4C2_3" + ], + [ + "CMT_FIFO_NE4C2_4", + "CMT_TOP_NE4C2_4" + ], + [ + "CMT_FIFO_NE4C2_5", + "CMT_TOP_NE4C2_5" + ], + [ + "CMT_FIFO_NE4C2_6", + "CMT_TOP_NE4C2_6" + ], + [ + "CMT_FIFO_NE4C2_7", + "CMT_TOP_NE4C2_7" + ], + [ + "CMT_FIFO_NE4C2_8", + "CMT_TOP_NE4C2_8" + ], + [ + "CMT_FIFO_NE4C2_9", + "CMT_TOP_NE4C2_9" + ], + [ + "CMT_FIFO_NE4C2_10", + "CMT_TOP_NE4C2_10" + ], + [ + "CMT_FIFO_NE4C2_11", + "CMT_TOP_NE4C2_11" + ], + [ + "CMT_FIFO_NE4C3_0", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_FIFO_NE4C3_1", + "CMT_TOP_NE4C3_1" + ], + [ + "CMT_FIFO_NE4C3_2", + "CMT_TOP_NE4C3_2" + ], + [ + "CMT_FIFO_NE4C3_3", + "CMT_TOP_NE4C3_3" + ], + [ + "CMT_FIFO_NE4C3_4", + "CMT_TOP_NE4C3_4" + ], + [ + "CMT_FIFO_NE4C3_5", + "CMT_TOP_NE4C3_5" + ], + [ + "CMT_FIFO_NE4C3_6", + "CMT_TOP_NE4C3_6" + ], + [ + "CMT_FIFO_NE4C3_7", + "CMT_TOP_NE4C3_7" + ], + [ + "CMT_FIFO_NE4C3_8", + "CMT_TOP_NE4C3_8" + ], + [ + "CMT_FIFO_NE4C3_9", + "CMT_TOP_NE4C3_9" + ], + [ + "CMT_FIFO_NE4C3_10", + "CMT_TOP_NE4C3_10" + ], + [ + "CMT_FIFO_NE4C3_11", + "CMT_TOP_NE4C3_11" + ], + [ + "CMT_FIFO_NW2A0_0", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_FIFO_NW2A0_1", + "CMT_TOP_NW2A0_1" + ], + [ + "CMT_FIFO_NW2A0_2", + "CMT_TOP_NW2A0_2" + ], + [ + "CMT_FIFO_NW2A0_3", + "CMT_TOP_NW2A0_3" + ], + [ + "CMT_FIFO_NW2A0_4", + "CMT_TOP_NW2A0_4" + ], + [ + "CMT_FIFO_NW2A0_5", + "CMT_TOP_NW2A0_5" + ], + [ + "CMT_FIFO_NW2A0_6", + "CMT_TOP_NW2A0_6" + ], + [ + "CMT_FIFO_NW2A0_7", + "CMT_TOP_NW2A0_7" + ], + [ + "CMT_FIFO_NW2A0_8", + "CMT_TOP_NW2A0_8" + ], + [ + "CMT_FIFO_NW2A0_9", + "CMT_TOP_NW2A0_9" + ], + [ + "CMT_FIFO_NW2A0_10", + "CMT_TOP_NW2A0_10" + ], + [ + "CMT_FIFO_NW2A0_11", + "CMT_TOP_NW2A0_11" + ], + [ + "CMT_FIFO_NW2A1_0", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_FIFO_NW2A1_1", + "CMT_TOP_NW2A1_1" + ], + [ + "CMT_FIFO_NW2A1_2", + "CMT_TOP_NW2A1_2" + ], + [ + "CMT_FIFO_NW2A1_3", + "CMT_TOP_NW2A1_3" + ], + [ + "CMT_FIFO_NW2A1_4", + "CMT_TOP_NW2A1_4" + ], + [ + "CMT_FIFO_NW2A1_5", + "CMT_TOP_NW2A1_5" + ], + [ + "CMT_FIFO_NW2A1_6", + "CMT_TOP_NW2A1_6" + ], + [ + "CMT_FIFO_NW2A1_7", + "CMT_TOP_NW2A1_7" + ], + [ + "CMT_FIFO_NW2A1_8", + "CMT_TOP_NW2A1_8" + ], + [ + "CMT_FIFO_NW2A1_9", + "CMT_TOP_NW2A1_9" + ], + [ + "CMT_FIFO_NW2A1_10", + "CMT_TOP_NW2A1_10" + ], + [ + "CMT_FIFO_NW2A1_11", + "CMT_TOP_NW2A1_11" + ], + [ + "CMT_FIFO_NW2A2_0", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_FIFO_NW2A2_1", + "CMT_TOP_NW2A2_1" + ], + [ + "CMT_FIFO_NW2A2_2", + "CMT_TOP_NW2A2_2" + ], + [ + "CMT_FIFO_NW2A2_3", + "CMT_TOP_NW2A2_3" + ], + [ + "CMT_FIFO_NW2A2_4", + "CMT_TOP_NW2A2_4" + ], + [ + "CMT_FIFO_NW2A2_5", + "CMT_TOP_NW2A2_5" + ], + [ + "CMT_FIFO_NW2A2_6", + "CMT_TOP_NW2A2_6" + ], + [ + "CMT_FIFO_NW2A2_7", + "CMT_TOP_NW2A2_7" + ], + [ + "CMT_FIFO_NW2A2_8", + "CMT_TOP_NW2A2_8" + ], + [ + "CMT_FIFO_NW2A2_9", + "CMT_TOP_NW2A2_9" + ], + [ + "CMT_FIFO_NW2A2_10", + "CMT_TOP_NW2A2_10" + ], + [ + "CMT_FIFO_NW2A2_11", + "CMT_TOP_NW2A2_11" + ], + [ + "CMT_FIFO_NW2A3_0", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_FIFO_NW2A3_1", + "CMT_TOP_NW2A3_1" + ], + [ + "CMT_FIFO_NW2A3_2", + "CMT_TOP_NW2A3_2" + ], + [ + "CMT_FIFO_NW2A3_3", + "CMT_TOP_NW2A3_3" + ], + [ + "CMT_FIFO_NW2A3_4", + "CMT_TOP_NW2A3_4" + ], + [ + "CMT_FIFO_NW2A3_5", + "CMT_TOP_NW2A3_5" + ], + [ + "CMT_FIFO_NW2A3_6", + "CMT_TOP_NW2A3_6" + ], + [ + "CMT_FIFO_NW2A3_7", + "CMT_TOP_NW2A3_7" + ], + [ + "CMT_FIFO_NW2A3_8", + "CMT_TOP_NW2A3_8" + ], + [ + "CMT_FIFO_NW2A3_9", + "CMT_TOP_NW2A3_9" + ], + [ + "CMT_FIFO_NW2A3_10", + "CMT_TOP_NW2A3_10" + ], + [ + "CMT_FIFO_NW2A3_11", + "CMT_TOP_NW2A3_11" + ], + [ + "CMT_FIFO_NW4A0_0", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_FIFO_NW4A0_1", + "CMT_TOP_NW4A0_1" + ], + [ + "CMT_FIFO_NW4A0_2", + "CMT_TOP_NW4A0_2" + ], + [ + "CMT_FIFO_NW4A0_3", + "CMT_TOP_NW4A0_3" + ], + [ + "CMT_FIFO_NW4A0_4", + "CMT_TOP_NW4A0_4" + ], + [ + "CMT_FIFO_NW4A0_5", + "CMT_TOP_NW4A0_5" + ], + [ + "CMT_FIFO_NW4A0_6", + "CMT_TOP_NW4A0_6" + ], + [ + "CMT_FIFO_NW4A0_7", + "CMT_TOP_NW4A0_7" + ], + [ + "CMT_FIFO_NW4A0_8", + "CMT_TOP_NW4A0_8" + ], + [ + "CMT_FIFO_NW4A0_9", + "CMT_TOP_NW4A0_9" + ], + [ + "CMT_FIFO_NW4A0_10", + "CMT_TOP_NW4A0_10" + ], + [ + "CMT_FIFO_NW4A0_11", + "CMT_TOP_NW4A0_11" + ], + [ + "CMT_FIFO_NW4A1_0", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_FIFO_NW4A1_1", + "CMT_TOP_NW4A1_1" + ], + [ + "CMT_FIFO_NW4A1_2", + "CMT_TOP_NW4A1_2" + ], + [ + "CMT_FIFO_NW4A1_3", + "CMT_TOP_NW4A1_3" + ], + [ + "CMT_FIFO_NW4A1_4", + "CMT_TOP_NW4A1_4" + ], + [ + "CMT_FIFO_NW4A1_5", + "CMT_TOP_NW4A1_5" + ], + [ + "CMT_FIFO_NW4A1_6", + "CMT_TOP_NW4A1_6" + ], + [ + "CMT_FIFO_NW4A1_7", + "CMT_TOP_NW4A1_7" + ], + [ + "CMT_FIFO_NW4A1_8", + "CMT_TOP_NW4A1_8" + ], + [ + "CMT_FIFO_NW4A1_9", + "CMT_TOP_NW4A1_9" + ], + [ + "CMT_FIFO_NW4A1_10", + "CMT_TOP_NW4A1_10" + ], + [ + "CMT_FIFO_NW4A1_11", + "CMT_TOP_NW4A1_11" + ], + [ + "CMT_FIFO_NW4A2_0", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_FIFO_NW4A2_1", + "CMT_TOP_NW4A2_1" + ], + [ + "CMT_FIFO_NW4A2_2", + "CMT_TOP_NW4A2_2" + ], + [ + "CMT_FIFO_NW4A2_3", + "CMT_TOP_NW4A2_3" + ], + [ + "CMT_FIFO_NW4A2_4", + "CMT_TOP_NW4A2_4" + ], + [ + "CMT_FIFO_NW4A2_5", + "CMT_TOP_NW4A2_5" + ], + [ + "CMT_FIFO_NW4A2_6", + "CMT_TOP_NW4A2_6" + ], + [ + "CMT_FIFO_NW4A2_7", + "CMT_TOP_NW4A2_7" + ], + [ + "CMT_FIFO_NW4A2_8", + "CMT_TOP_NW4A2_8" + ], + [ + "CMT_FIFO_NW4A2_9", + "CMT_TOP_NW4A2_9" + ], + [ + "CMT_FIFO_NW4A2_10", + "CMT_TOP_NW4A2_10" + ], + [ + "CMT_FIFO_NW4A2_11", + "CMT_TOP_NW4A2_11" + ], + [ + "CMT_FIFO_NW4A3_0", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_FIFO_NW4A3_1", + "CMT_TOP_NW4A3_1" + ], + [ + "CMT_FIFO_NW4A3_2", + "CMT_TOP_NW4A3_2" + ], + [ + "CMT_FIFO_NW4A3_3", + "CMT_TOP_NW4A3_3" + ], + [ + "CMT_FIFO_NW4A3_4", + "CMT_TOP_NW4A3_4" + ], + [ + "CMT_FIFO_NW4A3_5", + "CMT_TOP_NW4A3_5" + ], + [ + "CMT_FIFO_NW4A3_6", + "CMT_TOP_NW4A3_6" + ], + [ + "CMT_FIFO_NW4A3_7", + "CMT_TOP_NW4A3_7" + ], + [ + "CMT_FIFO_NW4A3_8", + "CMT_TOP_NW4A3_8" + ], + [ + "CMT_FIFO_NW4A3_9", + "CMT_TOP_NW4A3_9" + ], + [ + "CMT_FIFO_NW4A3_10", + "CMT_TOP_NW4A3_10" + ], + [ + "CMT_FIFO_NW4A3_11", + "CMT_TOP_NW4A3_11" + ], + [ + "CMT_FIFO_NW4END0_0", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_FIFO_NW4END0_1", + "CMT_TOP_NW4END0_1" + ], + [ + "CMT_FIFO_NW4END0_2", + "CMT_TOP_NW4END0_2" + ], + [ + "CMT_FIFO_NW4END0_3", + "CMT_TOP_NW4END0_3" + ], + [ + "CMT_FIFO_NW4END0_4", + "CMT_TOP_NW4END0_4" + ], + [ + "CMT_FIFO_NW4END0_5", + "CMT_TOP_NW4END0_5" + ], + [ + "CMT_FIFO_NW4END0_6", + "CMT_TOP_NW4END0_6" + ], + [ + "CMT_FIFO_NW4END0_7", + "CMT_TOP_NW4END0_7" + ], + [ + "CMT_FIFO_NW4END0_8", + "CMT_TOP_NW4END0_8" + ], + [ + "CMT_FIFO_NW4END0_9", + "CMT_TOP_NW4END0_9" + ], + [ + "CMT_FIFO_NW4END0_10", + "CMT_TOP_NW4END0_10" + ], + [ + "CMT_FIFO_NW4END0_11", + "CMT_TOP_NW4END0_11" + ], + [ + "CMT_FIFO_NW4END1_0", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_FIFO_NW4END1_1", + "CMT_TOP_NW4END1_1" + ], + [ + "CMT_FIFO_NW4END1_2", + "CMT_TOP_NW4END1_2" + ], + [ + "CMT_FIFO_NW4END1_3", + "CMT_TOP_NW4END1_3" + ], + [ + "CMT_FIFO_NW4END1_4", + "CMT_TOP_NW4END1_4" + ], + [ + "CMT_FIFO_NW4END1_5", + "CMT_TOP_NW4END1_5" + ], + [ + "CMT_FIFO_NW4END1_6", + "CMT_TOP_NW4END1_6" + ], + [ + "CMT_FIFO_NW4END1_7", + "CMT_TOP_NW4END1_7" + ], + [ + "CMT_FIFO_NW4END1_8", + "CMT_TOP_NW4END1_8" + ], + [ + "CMT_FIFO_NW4END1_9", + "CMT_TOP_NW4END1_9" + ], + [ + "CMT_FIFO_NW4END1_10", + "CMT_TOP_NW4END1_10" + ], + [ + "CMT_FIFO_NW4END1_11", + "CMT_TOP_NW4END1_11" + ], + [ + "CMT_FIFO_NW4END2_0", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_FIFO_NW4END2_1", + "CMT_TOP_NW4END2_1" + ], + [ + "CMT_FIFO_NW4END2_2", + "CMT_TOP_NW4END2_2" + ], + [ + "CMT_FIFO_NW4END2_3", + "CMT_TOP_NW4END2_3" + ], + [ + "CMT_FIFO_NW4END2_4", + "CMT_TOP_NW4END2_4" + ], + [ + "CMT_FIFO_NW4END2_5", + "CMT_TOP_NW4END2_5" + ], + [ + "CMT_FIFO_NW4END2_6", + "CMT_TOP_NW4END2_6" + ], + [ + "CMT_FIFO_NW4END2_7", + "CMT_TOP_NW4END2_7" + ], + [ + "CMT_FIFO_NW4END2_8", + "CMT_TOP_NW4END2_8" + ], + [ + "CMT_FIFO_NW4END2_9", + "CMT_TOP_NW4END2_9" + ], + [ + "CMT_FIFO_NW4END2_10", + "CMT_TOP_NW4END2_10" + ], + [ + "CMT_FIFO_NW4END2_11", + "CMT_TOP_NW4END2_11" + ], + [ + "CMT_FIFO_NW4END3_0", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_FIFO_NW4END3_1", + "CMT_TOP_NW4END3_1" + ], + [ + "CMT_FIFO_NW4END3_2", + "CMT_TOP_NW4END3_2" + ], + [ + "CMT_FIFO_NW4END3_3", + "CMT_TOP_NW4END3_3" + ], + [ + "CMT_FIFO_NW4END3_4", + "CMT_TOP_NW4END3_4" + ], + [ + "CMT_FIFO_NW4END3_5", + "CMT_TOP_NW4END3_5" + ], + [ + "CMT_FIFO_NW4END3_6", + "CMT_TOP_NW4END3_6" + ], + [ + "CMT_FIFO_NW4END3_7", + "CMT_TOP_NW4END3_7" + ], + [ + "CMT_FIFO_NW4END3_8", + "CMT_TOP_NW4END3_8" + ], + [ + "CMT_FIFO_NW4END3_9", + "CMT_TOP_NW4END3_9" + ], + [ + "CMT_FIFO_NW4END3_10", + "CMT_TOP_NW4END3_10" + ], + [ + "CMT_FIFO_NW4END3_11", + "CMT_TOP_NW4END3_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "CMT_TOP_ICLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "CMT_TOP_ICLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "CMT_TOP_ICLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "CMT_TOP_ICLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "CMT_TOP_ICLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "CMT_TOP_ICLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "CMT_TOP_ICLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "CMT_TOP_ICLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "CMT_TOP_ICLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "CMT_TOP_ICLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "CMT_TOP_ICLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "CMT_TOP_ICLKDIV_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "CMT_TOP_ICLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "CMT_TOP_ICLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "CMT_TOP_ICLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "CMT_TOP_ICLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "CMT_TOP_ICLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "CMT_TOP_ICLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "CMT_TOP_ICLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "CMT_TOP_ICLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "CMT_TOP_ICLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "CMT_TOP_ICLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "CMT_TOP_ICLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "CMT_TOP_ICLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "CMT_TOP_OCLK_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "CMT_TOP_OCLK_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "CMT_TOP_OCLK_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "CMT_TOP_OCLK_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "CMT_TOP_OCLK_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "CMT_TOP_OCLK_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "CMT_TOP_OCLK_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "CMT_TOP_OCLK_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "CMT_TOP_OCLK_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "CMT_TOP_OCLK_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "CMT_TOP_OCLK_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "CMT_TOP_OCLK_11" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "CMT_TOP_OCLK1X_90_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "CMT_TOP_OCLKDIV_0" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "CMT_TOP_OCLKDIV_1" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "CMT_TOP_OCLKDIV_2" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "CMT_TOP_OCLKDIV_3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "CMT_TOP_OCLKDIV_4" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "CMT_TOP_OCLKDIV_5" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "CMT_TOP_OCLKDIV_6" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "CMT_TOP_OCLKDIV_7" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "CMT_TOP_OCLKDIV_8" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "CMT_TOP_OCLKDIV_9" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "CMT_TOP_OCLKDIV_10" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "CMT_TOP_OCLKDIV_11" + ], + [ + "CMT_FIFO_SE2A0_0", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_FIFO_SE2A0_1", + "CMT_TOP_SE2A0_1" + ], + [ + "CMT_FIFO_SE2A0_2", + "CMT_TOP_SE2A0_2" + ], + [ + "CMT_FIFO_SE2A0_3", + "CMT_TOP_SE2A0_3" + ], + [ + "CMT_FIFO_SE2A0_4", + "CMT_TOP_SE2A0_4" + ], + [ + "CMT_FIFO_SE2A0_5", + "CMT_TOP_SE2A0_5" + ], + [ + "CMT_FIFO_SE2A0_6", + "CMT_TOP_SE2A0_6" + ], + [ + "CMT_FIFO_SE2A0_7", + "CMT_TOP_SE2A0_7" + ], + [ + "CMT_FIFO_SE2A0_8", + "CMT_TOP_SE2A0_8" + ], + [ + "CMT_FIFO_SE2A0_9", + "CMT_TOP_SE2A0_9" + ], + [ + "CMT_FIFO_SE2A0_10", + "CMT_TOP_SE2A0_10" + ], + [ + "CMT_FIFO_SE2A0_11", + "CMT_TOP_SE2A0_11" + ], + [ + "CMT_FIFO_SE2A1_0", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_FIFO_SE2A1_1", + "CMT_TOP_SE2A1_1" + ], + [ + "CMT_FIFO_SE2A1_2", + "CMT_TOP_SE2A1_2" + ], + [ + "CMT_FIFO_SE2A1_3", + "CMT_TOP_SE2A1_3" + ], + [ + "CMT_FIFO_SE2A1_4", + "CMT_TOP_SE2A1_4" + ], + [ + "CMT_FIFO_SE2A1_5", + "CMT_TOP_SE2A1_5" + ], + [ + "CMT_FIFO_SE2A1_6", + "CMT_TOP_SE2A1_6" + ], + [ + "CMT_FIFO_SE2A1_7", + "CMT_TOP_SE2A1_7" + ], + [ + "CMT_FIFO_SE2A1_8", + "CMT_TOP_SE2A1_8" + ], + [ + "CMT_FIFO_SE2A1_9", + "CMT_TOP_SE2A1_9" + ], + [ + "CMT_FIFO_SE2A1_10", + "CMT_TOP_SE2A1_10" + ], + [ + "CMT_FIFO_SE2A1_11", + "CMT_TOP_SE2A1_11" + ], + [ + "CMT_FIFO_SE2A2_0", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_FIFO_SE2A2_1", + "CMT_TOP_SE2A2_1" + ], + [ + "CMT_FIFO_SE2A2_2", + "CMT_TOP_SE2A2_2" + ], + [ + "CMT_FIFO_SE2A2_3", + "CMT_TOP_SE2A2_3" + ], + [ + "CMT_FIFO_SE2A2_4", + "CMT_TOP_SE2A2_4" + ], + [ + "CMT_FIFO_SE2A2_5", + "CMT_TOP_SE2A2_5" + ], + [ + "CMT_FIFO_SE2A2_6", + "CMT_TOP_SE2A2_6" + ], + [ + "CMT_FIFO_SE2A2_7", + "CMT_TOP_SE2A2_7" + ], + [ + "CMT_FIFO_SE2A2_8", + "CMT_TOP_SE2A2_8" + ], + [ + "CMT_FIFO_SE2A2_9", + "CMT_TOP_SE2A2_9" + ], + [ + "CMT_FIFO_SE2A2_10", + "CMT_TOP_SE2A2_10" + ], + [ + "CMT_FIFO_SE2A2_11", + "CMT_TOP_SE2A2_11" + ], + [ + "CMT_FIFO_SE2A3_0", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_FIFO_SE2A3_1", + "CMT_TOP_SE2A3_1" + ], + [ + "CMT_FIFO_SE2A3_2", + "CMT_TOP_SE2A3_2" + ], + [ + "CMT_FIFO_SE2A3_3", + "CMT_TOP_SE2A3_3" + ], + [ + "CMT_FIFO_SE2A3_4", + "CMT_TOP_SE2A3_4" + ], + [ + "CMT_FIFO_SE2A3_5", + "CMT_TOP_SE2A3_5" + ], + [ + "CMT_FIFO_SE2A3_6", + "CMT_TOP_SE2A3_6" + ], + [ + "CMT_FIFO_SE2A3_7", + "CMT_TOP_SE2A3_7" + ], + [ + "CMT_FIFO_SE2A3_8", + "CMT_TOP_SE2A3_8" + ], + [ + "CMT_FIFO_SE2A3_9", + "CMT_TOP_SE2A3_9" + ], + [ + "CMT_FIFO_SE2A3_10", + "CMT_TOP_SE2A3_10" + ], + [ + "CMT_FIFO_SE2A3_11", + "CMT_TOP_SE2A3_11" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "CMT_TOP_SE4BEG0_1" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "CMT_TOP_SE4BEG0_2" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "CMT_TOP_SE4BEG0_3" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "CMT_TOP_SE4BEG0_4" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "CMT_TOP_SE4BEG0_5" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "CMT_TOP_SE4BEG0_6" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "CMT_TOP_SE4BEG0_7" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "CMT_TOP_SE4BEG0_8" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "CMT_TOP_SE4BEG0_9" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "CMT_TOP_SE4BEG0_10" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "CMT_TOP_SE4BEG0_11" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "CMT_TOP_SE4BEG1_1" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "CMT_TOP_SE4BEG1_2" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "CMT_TOP_SE4BEG1_3" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "CMT_TOP_SE4BEG1_4" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "CMT_TOP_SE4BEG1_5" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "CMT_TOP_SE4BEG1_6" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "CMT_TOP_SE4BEG1_7" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "CMT_TOP_SE4BEG1_8" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "CMT_TOP_SE4BEG1_9" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "CMT_TOP_SE4BEG1_10" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "CMT_TOP_SE4BEG1_11" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "CMT_TOP_SE4BEG2_1" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "CMT_TOP_SE4BEG2_2" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "CMT_TOP_SE4BEG2_3" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "CMT_TOP_SE4BEG2_4" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "CMT_TOP_SE4BEG2_5" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "CMT_TOP_SE4BEG2_6" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "CMT_TOP_SE4BEG2_7" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "CMT_TOP_SE4BEG2_8" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "CMT_TOP_SE4BEG2_9" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "CMT_TOP_SE4BEG2_10" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "CMT_TOP_SE4BEG2_11" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "CMT_TOP_SE4BEG3_1" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "CMT_TOP_SE4BEG3_2" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "CMT_TOP_SE4BEG3_3" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "CMT_TOP_SE4BEG3_4" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "CMT_TOP_SE4BEG3_5" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "CMT_TOP_SE4BEG3_6" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "CMT_TOP_SE4BEG3_7" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "CMT_TOP_SE4BEG3_8" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "CMT_TOP_SE4BEG3_9" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "CMT_TOP_SE4BEG3_10" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "CMT_TOP_SE4BEG3_11" + ], + [ + "CMT_FIFO_SE4C0_0", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_FIFO_SE4C0_1", + "CMT_TOP_SE4C0_1" + ], + [ + "CMT_FIFO_SE4C0_2", + "CMT_TOP_SE4C0_2" + ], + [ + "CMT_FIFO_SE4C0_3", + "CMT_TOP_SE4C0_3" + ], + [ + "CMT_FIFO_SE4C0_4", + "CMT_TOP_SE4C0_4" + ], + [ + "CMT_FIFO_SE4C0_5", + "CMT_TOP_SE4C0_5" + ], + [ + "CMT_FIFO_SE4C0_6", + "CMT_TOP_SE4C0_6" + ], + [ + "CMT_FIFO_SE4C0_7", + "CMT_TOP_SE4C0_7" + ], + [ + "CMT_FIFO_SE4C0_8", + "CMT_TOP_SE4C0_8" + ], + [ + "CMT_FIFO_SE4C0_9", + "CMT_TOP_SE4C0_9" + ], + [ + "CMT_FIFO_SE4C0_10", + "CMT_TOP_SE4C0_10" + ], + [ + "CMT_FIFO_SE4C0_11", + "CMT_TOP_SE4C0_11" + ], + [ + "CMT_FIFO_SE4C1_0", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_FIFO_SE4C1_1", + "CMT_TOP_SE4C1_1" + ], + [ + "CMT_FIFO_SE4C1_2", + "CMT_TOP_SE4C1_2" + ], + [ + "CMT_FIFO_SE4C1_3", + "CMT_TOP_SE4C1_3" + ], + [ + "CMT_FIFO_SE4C1_4", + "CMT_TOP_SE4C1_4" + ], + [ + "CMT_FIFO_SE4C1_5", + "CMT_TOP_SE4C1_5" + ], + [ + "CMT_FIFO_SE4C1_6", + "CMT_TOP_SE4C1_6" + ], + [ + "CMT_FIFO_SE4C1_7", + "CMT_TOP_SE4C1_7" + ], + [ + "CMT_FIFO_SE4C1_8", + "CMT_TOP_SE4C1_8" + ], + [ + "CMT_FIFO_SE4C1_9", + "CMT_TOP_SE4C1_9" + ], + [ + "CMT_FIFO_SE4C1_10", + "CMT_TOP_SE4C1_10" + ], + [ + "CMT_FIFO_SE4C1_11", + "CMT_TOP_SE4C1_11" + ], + [ + "CMT_FIFO_SE4C2_0", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_FIFO_SE4C2_1", + "CMT_TOP_SE4C2_1" + ], + [ + "CMT_FIFO_SE4C2_2", + "CMT_TOP_SE4C2_2" + ], + [ + "CMT_FIFO_SE4C2_3", + "CMT_TOP_SE4C2_3" + ], + [ + "CMT_FIFO_SE4C2_4", + "CMT_TOP_SE4C2_4" + ], + [ + "CMT_FIFO_SE4C2_5", + "CMT_TOP_SE4C2_5" + ], + [ + "CMT_FIFO_SE4C2_6", + "CMT_TOP_SE4C2_6" + ], + [ + "CMT_FIFO_SE4C2_7", + "CMT_TOP_SE4C2_7" + ], + [ + "CMT_FIFO_SE4C2_8", + "CMT_TOP_SE4C2_8" + ], + [ + "CMT_FIFO_SE4C2_9", + "CMT_TOP_SE4C2_9" + ], + [ + "CMT_FIFO_SE4C2_10", + "CMT_TOP_SE4C2_10" + ], + [ + "CMT_FIFO_SE4C2_11", + "CMT_TOP_SE4C2_11" + ], + [ + "CMT_FIFO_SE4C3_0", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_FIFO_SE4C3_1", + "CMT_TOP_SE4C3_1" + ], + [ + "CMT_FIFO_SE4C3_2", + "CMT_TOP_SE4C3_2" + ], + [ + "CMT_FIFO_SE4C3_3", + "CMT_TOP_SE4C3_3" + ], + [ + "CMT_FIFO_SE4C3_4", + "CMT_TOP_SE4C3_4" + ], + [ + "CMT_FIFO_SE4C3_5", + "CMT_TOP_SE4C3_5" + ], + [ + "CMT_FIFO_SE4C3_6", + "CMT_TOP_SE4C3_6" + ], + [ + "CMT_FIFO_SE4C3_7", + "CMT_TOP_SE4C3_7" + ], + [ + "CMT_FIFO_SE4C3_8", + "CMT_TOP_SE4C3_8" + ], + [ + "CMT_FIFO_SE4C3_9", + "CMT_TOP_SE4C3_9" + ], + [ + "CMT_FIFO_SE4C3_10", + "CMT_TOP_SE4C3_10" + ], + [ + "CMT_FIFO_SE4C3_11", + "CMT_TOP_SE4C3_11" + ], + [ + "CMT_FIFO_SW2A0_0", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_FIFO_SW2A0_1", + "CMT_TOP_SW2A0_1" + ], + [ + "CMT_FIFO_SW2A0_2", + "CMT_TOP_SW2A0_2" + ], + [ + "CMT_FIFO_SW2A0_3", + "CMT_TOP_SW2A0_3" + ], + [ + "CMT_FIFO_SW2A0_4", + "CMT_TOP_SW2A0_4" + ], + [ + "CMT_FIFO_SW2A0_5", + "CMT_TOP_SW2A0_5" + ], + [ + "CMT_FIFO_SW2A0_6", + "CMT_TOP_SW2A0_6" + ], + [ + "CMT_FIFO_SW2A0_7", + "CMT_TOP_SW2A0_7" + ], + [ + "CMT_FIFO_SW2A0_8", + "CMT_TOP_SW2A0_8" + ], + [ + "CMT_FIFO_SW2A0_9", + "CMT_TOP_SW2A0_9" + ], + [ + "CMT_FIFO_SW2A0_10", + "CMT_TOP_SW2A0_10" + ], + [ + "CMT_FIFO_SW2A0_11", + "CMT_TOP_SW2A0_11" + ], + [ + "CMT_FIFO_SW2A1_0", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_FIFO_SW2A1_1", + "CMT_TOP_SW2A1_1" + ], + [ + "CMT_FIFO_SW2A1_2", + "CMT_TOP_SW2A1_2" + ], + [ + "CMT_FIFO_SW2A1_3", + "CMT_TOP_SW2A1_3" + ], + [ + "CMT_FIFO_SW2A1_4", + "CMT_TOP_SW2A1_4" + ], + [ + "CMT_FIFO_SW2A1_5", + "CMT_TOP_SW2A1_5" + ], + [ + "CMT_FIFO_SW2A1_6", + "CMT_TOP_SW2A1_6" + ], + [ + "CMT_FIFO_SW2A1_7", + "CMT_TOP_SW2A1_7" + ], + [ + "CMT_FIFO_SW2A1_8", + "CMT_TOP_SW2A1_8" + ], + [ + "CMT_FIFO_SW2A1_9", + "CMT_TOP_SW2A1_9" + ], + [ + "CMT_FIFO_SW2A1_10", + "CMT_TOP_SW2A1_10" + ], + [ + "CMT_FIFO_SW2A1_11", + "CMT_TOP_SW2A1_11" + ], + [ + "CMT_FIFO_SW2A2_0", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_FIFO_SW2A2_1", + "CMT_TOP_SW2A2_1" + ], + [ + "CMT_FIFO_SW2A2_2", + "CMT_TOP_SW2A2_2" + ], + [ + "CMT_FIFO_SW2A2_3", + "CMT_TOP_SW2A2_3" + ], + [ + "CMT_FIFO_SW2A2_4", + "CMT_TOP_SW2A2_4" + ], + [ + "CMT_FIFO_SW2A2_5", + "CMT_TOP_SW2A2_5" + ], + [ + "CMT_FIFO_SW2A2_6", + "CMT_TOP_SW2A2_6" + ], + [ + "CMT_FIFO_SW2A2_7", + "CMT_TOP_SW2A2_7" + ], + [ + "CMT_FIFO_SW2A2_8", + "CMT_TOP_SW2A2_8" + ], + [ + "CMT_FIFO_SW2A2_9", + "CMT_TOP_SW2A2_9" + ], + [ + "CMT_FIFO_SW2A2_10", + "CMT_TOP_SW2A2_10" + ], + [ + "CMT_FIFO_SW2A2_11", + "CMT_TOP_SW2A2_11" + ], + [ + "CMT_FIFO_SW2A3_0", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_FIFO_SW2A3_1", + "CMT_TOP_SW2A3_1" + ], + [ + "CMT_FIFO_SW2A3_2", + "CMT_TOP_SW2A3_2" + ], + [ + "CMT_FIFO_SW2A3_3", + "CMT_TOP_SW2A3_3" + ], + [ + "CMT_FIFO_SW2A3_4", + "CMT_TOP_SW2A3_4" + ], + [ + "CMT_FIFO_SW2A3_5", + "CMT_TOP_SW2A3_5" + ], + [ + "CMT_FIFO_SW2A3_6", + "CMT_TOP_SW2A3_6" + ], + [ + "CMT_FIFO_SW2A3_7", + "CMT_TOP_SW2A3_7" + ], + [ + "CMT_FIFO_SW2A3_8", + "CMT_TOP_SW2A3_8" + ], + [ + "CMT_FIFO_SW2A3_9", + "CMT_TOP_SW2A3_9" + ], + [ + "CMT_FIFO_SW2A3_10", + "CMT_TOP_SW2A3_10" + ], + [ + "CMT_FIFO_SW2A3_11", + "CMT_TOP_SW2A3_11" + ], + [ + "CMT_FIFO_SW4A0_0", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_FIFO_SW4A0_1", + "CMT_TOP_SW4A0_1" + ], + [ + "CMT_FIFO_SW4A0_2", + "CMT_TOP_SW4A0_2" + ], + [ + "CMT_FIFO_SW4A0_3", + "CMT_TOP_SW4A0_3" + ], + [ + "CMT_FIFO_SW4A0_4", + "CMT_TOP_SW4A0_4" + ], + [ + "CMT_FIFO_SW4A0_5", + "CMT_TOP_SW4A0_5" + ], + [ + "CMT_FIFO_SW4A0_6", + "CMT_TOP_SW4A0_6" + ], + [ + "CMT_FIFO_SW4A0_7", + "CMT_TOP_SW4A0_7" + ], + [ + "CMT_FIFO_SW4A0_8", + "CMT_TOP_SW4A0_8" + ], + [ + "CMT_FIFO_SW4A0_9", + "CMT_TOP_SW4A0_9" + ], + [ + "CMT_FIFO_SW4A0_10", + "CMT_TOP_SW4A0_10" + ], + [ + "CMT_FIFO_SW4A0_11", + "CMT_TOP_SW4A0_11" + ], + [ + "CMT_FIFO_SW4A1_0", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_FIFO_SW4A1_1", + "CMT_TOP_SW4A1_1" + ], + [ + "CMT_FIFO_SW4A1_2", + "CMT_TOP_SW4A1_2" + ], + [ + "CMT_FIFO_SW4A1_3", + "CMT_TOP_SW4A1_3" + ], + [ + "CMT_FIFO_SW4A1_4", + "CMT_TOP_SW4A1_4" + ], + [ + "CMT_FIFO_SW4A1_5", + "CMT_TOP_SW4A1_5" + ], + [ + "CMT_FIFO_SW4A1_6", + "CMT_TOP_SW4A1_6" + ], + [ + "CMT_FIFO_SW4A1_7", + "CMT_TOP_SW4A1_7" + ], + [ + "CMT_FIFO_SW4A1_8", + "CMT_TOP_SW4A1_8" + ], + [ + "CMT_FIFO_SW4A1_9", + "CMT_TOP_SW4A1_9" + ], + [ + "CMT_FIFO_SW4A1_10", + "CMT_TOP_SW4A1_10" + ], + [ + "CMT_FIFO_SW4A1_11", + "CMT_TOP_SW4A1_11" + ], + [ + "CMT_FIFO_SW4A2_0", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_FIFO_SW4A2_1", + "CMT_TOP_SW4A2_1" + ], + [ + "CMT_FIFO_SW4A2_2", + "CMT_TOP_SW4A2_2" + ], + [ + "CMT_FIFO_SW4A2_3", + "CMT_TOP_SW4A2_3" + ], + [ + "CMT_FIFO_SW4A2_4", + "CMT_TOP_SW4A2_4" + ], + [ + "CMT_FIFO_SW4A2_5", + "CMT_TOP_SW4A2_5" + ], + [ + "CMT_FIFO_SW4A2_6", + "CMT_TOP_SW4A2_6" + ], + [ + "CMT_FIFO_SW4A2_7", + "CMT_TOP_SW4A2_7" + ], + [ + "CMT_FIFO_SW4A2_8", + "CMT_TOP_SW4A2_8" + ], + [ + "CMT_FIFO_SW4A2_9", + "CMT_TOP_SW4A2_9" + ], + [ + "CMT_FIFO_SW4A2_10", + "CMT_TOP_SW4A2_10" + ], + [ + "CMT_FIFO_SW4A2_11", + "CMT_TOP_SW4A2_11" + ], + [ + "CMT_FIFO_SW4A3_0", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_FIFO_SW4A3_1", + "CMT_TOP_SW4A3_1" + ], + [ + "CMT_FIFO_SW4A3_2", + "CMT_TOP_SW4A3_2" + ], + [ + "CMT_FIFO_SW4A3_3", + "CMT_TOP_SW4A3_3" + ], + [ + "CMT_FIFO_SW4A3_4", + "CMT_TOP_SW4A3_4" + ], + [ + "CMT_FIFO_SW4A3_5", + "CMT_TOP_SW4A3_5" + ], + [ + "CMT_FIFO_SW4A3_6", + "CMT_TOP_SW4A3_6" + ], + [ + "CMT_FIFO_SW4A3_7", + "CMT_TOP_SW4A3_7" + ], + [ + "CMT_FIFO_SW4A3_8", + "CMT_TOP_SW4A3_8" + ], + [ + "CMT_FIFO_SW4A3_9", + "CMT_TOP_SW4A3_9" + ], + [ + "CMT_FIFO_SW4A3_10", + "CMT_TOP_SW4A3_10" + ], + [ + "CMT_FIFO_SW4A3_11", + "CMT_TOP_SW4A3_11" + ], + [ + "CMT_FIFO_SW4END0_0", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_FIFO_SW4END0_1", + "CMT_TOP_SW4END0_1" + ], + [ + "CMT_FIFO_SW4END0_2", + "CMT_TOP_SW4END0_2" + ], + [ + "CMT_FIFO_SW4END0_3", + "CMT_TOP_SW4END0_3" + ], + [ + "CMT_FIFO_SW4END0_4", + "CMT_TOP_SW4END0_4" + ], + [ + "CMT_FIFO_SW4END0_5", + "CMT_TOP_SW4END0_5" + ], + [ + "CMT_FIFO_SW4END0_6", + "CMT_TOP_SW4END0_6" + ], + [ + "CMT_FIFO_SW4END0_7", + "CMT_TOP_SW4END0_7" + ], + [ + "CMT_FIFO_SW4END0_8", + "CMT_TOP_SW4END0_8" + ], + [ + "CMT_FIFO_SW4END0_9", + "CMT_TOP_SW4END0_9" + ], + [ + "CMT_FIFO_SW4END0_10", + "CMT_TOP_SW4END0_10" + ], + [ + "CMT_FIFO_SW4END0_11", + "CMT_TOP_SW4END0_11" + ], + [ + "CMT_FIFO_SW4END1_0", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_FIFO_SW4END1_1", + "CMT_TOP_SW4END1_1" + ], + [ + "CMT_FIFO_SW4END1_2", + "CMT_TOP_SW4END1_2" + ], + [ + "CMT_FIFO_SW4END1_3", + "CMT_TOP_SW4END1_3" + ], + [ + "CMT_FIFO_SW4END1_4", + "CMT_TOP_SW4END1_4" + ], + [ + "CMT_FIFO_SW4END1_5", + "CMT_TOP_SW4END1_5" + ], + [ + "CMT_FIFO_SW4END1_6", + "CMT_TOP_SW4END1_6" + ], + [ + "CMT_FIFO_SW4END1_7", + "CMT_TOP_SW4END1_7" + ], + [ + "CMT_FIFO_SW4END1_8", + "CMT_TOP_SW4END1_8" + ], + [ + "CMT_FIFO_SW4END1_9", + "CMT_TOP_SW4END1_9" + ], + [ + "CMT_FIFO_SW4END1_10", + "CMT_TOP_SW4END1_10" + ], + [ + "CMT_FIFO_SW4END1_11", + "CMT_TOP_SW4END1_11" + ], + [ + "CMT_FIFO_SW4END2_0", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_FIFO_SW4END2_1", + "CMT_TOP_SW4END2_1" + ], + [ + "CMT_FIFO_SW4END2_2", + "CMT_TOP_SW4END2_2" + ], + [ + "CMT_FIFO_SW4END2_3", + "CMT_TOP_SW4END2_3" + ], + [ + "CMT_FIFO_SW4END2_4", + "CMT_TOP_SW4END2_4" + ], + [ + "CMT_FIFO_SW4END2_5", + "CMT_TOP_SW4END2_5" + ], + [ + "CMT_FIFO_SW4END2_6", + "CMT_TOP_SW4END2_6" + ], + [ + "CMT_FIFO_SW4END2_7", + "CMT_TOP_SW4END2_7" + ], + [ + "CMT_FIFO_SW4END2_8", + "CMT_TOP_SW4END2_8" + ], + [ + "CMT_FIFO_SW4END2_9", + "CMT_TOP_SW4END2_9" + ], + [ + "CMT_FIFO_SW4END2_10", + "CMT_TOP_SW4END2_10" + ], + [ + "CMT_FIFO_SW4END2_11", + "CMT_TOP_SW4END2_11" + ], + [ + "CMT_FIFO_SW4END3_0", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_FIFO_SW4END3_1", + "CMT_TOP_SW4END3_1" + ], + [ + "CMT_FIFO_SW4END3_2", + "CMT_TOP_SW4END3_2" + ], + [ + "CMT_FIFO_SW4END3_3", + "CMT_TOP_SW4END3_3" + ], + [ + "CMT_FIFO_SW4END3_4", + "CMT_TOP_SW4END3_4" + ], + [ + "CMT_FIFO_SW4END3_5", + "CMT_TOP_SW4END3_5" + ], + [ + "CMT_FIFO_SW4END3_6", + "CMT_TOP_SW4END3_6" + ], + [ + "CMT_FIFO_SW4END3_7", + "CMT_TOP_SW4END3_7" + ], + [ + "CMT_FIFO_SW4END3_8", + "CMT_TOP_SW4END3_8" + ], + [ + "CMT_FIFO_SW4END3_9", + "CMT_TOP_SW4END3_9" + ], + [ + "CMT_FIFO_SW4END3_10", + "CMT_TOP_SW4END3_10" + ], + [ + "CMT_FIFO_SW4END3_11", + "CMT_TOP_SW4END3_11" + ], + [ + "CMT_FIFO_WL1END0_0", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_FIFO_WL1END0_1", + "CMT_TOP_WL1END0_1" + ], + [ + "CMT_FIFO_WL1END0_2", + "CMT_TOP_WL1END0_2" + ], + [ + "CMT_FIFO_WL1END0_3", + "CMT_TOP_WL1END0_3" + ], + [ + "CMT_FIFO_WL1END0_4", + "CMT_TOP_WL1END0_4" + ], + [ + "CMT_FIFO_WL1END0_5", + "CMT_TOP_WL1END0_5" + ], + [ + "CMT_FIFO_WL1END0_6", + "CMT_TOP_WL1END0_6" + ], + [ + "CMT_FIFO_WL1END0_7", + "CMT_TOP_WL1END0_7" + ], + [ + "CMT_FIFO_WL1END0_8", + "CMT_TOP_WL1END0_8" + ], + [ + "CMT_FIFO_WL1END0_9", + "CMT_TOP_WL1END0_9" + ], + [ + "CMT_FIFO_WL1END0_10", + "CMT_TOP_WL1END0_10" + ], + [ + "CMT_FIFO_WL1END0_11", + "CMT_TOP_WL1END0_11" + ], + [ + "CMT_FIFO_WL1END1_0", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_FIFO_WL1END1_1", + "CMT_TOP_WL1END1_1" + ], + [ + "CMT_FIFO_WL1END1_2", + "CMT_TOP_WL1END1_2" + ], + [ + "CMT_FIFO_WL1END1_3", + "CMT_TOP_WL1END1_3" + ], + [ + "CMT_FIFO_WL1END1_4", + "CMT_TOP_WL1END1_4" + ], + [ + "CMT_FIFO_WL1END1_5", + "CMT_TOP_WL1END1_5" + ], + [ + "CMT_FIFO_WL1END1_6", + "CMT_TOP_WL1END1_6" + ], + [ + "CMT_FIFO_WL1END1_7", + "CMT_TOP_WL1END1_7" + ], + [ + "CMT_FIFO_WL1END1_8", + "CMT_TOP_WL1END1_8" + ], + [ + "CMT_FIFO_WL1END1_9", + "CMT_TOP_WL1END1_9" + ], + [ + "CMT_FIFO_WL1END1_10", + "CMT_TOP_WL1END1_10" + ], + [ + "CMT_FIFO_WL1END1_11", + "CMT_TOP_WL1END1_11" + ], + [ + "CMT_FIFO_WL1END2_0", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_FIFO_WL1END2_1", + "CMT_TOP_WL1END2_1" + ], + [ + "CMT_FIFO_WL1END2_2", + "CMT_TOP_WL1END2_2" + ], + [ + "CMT_FIFO_WL1END2_3", + "CMT_TOP_WL1END2_3" + ], + [ + "CMT_FIFO_WL1END2_4", + "CMT_TOP_WL1END2_4" + ], + [ + "CMT_FIFO_WL1END2_5", + "CMT_TOP_WL1END2_5" + ], + [ + "CMT_FIFO_WL1END2_6", + "CMT_TOP_WL1END2_6" + ], + [ + "CMT_FIFO_WL1END2_7", + "CMT_TOP_WL1END2_7" + ], + [ + "CMT_FIFO_WL1END2_8", + "CMT_TOP_WL1END2_8" + ], + [ + "CMT_FIFO_WL1END2_9", + "CMT_TOP_WL1END2_9" + ], + [ + "CMT_FIFO_WL1END2_10", + "CMT_TOP_WL1END2_10" + ], + [ + "CMT_FIFO_WL1END2_11", + "CMT_TOP_WL1END2_11" + ], + [ + "CMT_FIFO_WL1END3_0", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_FIFO_WL1END3_1", + "CMT_TOP_WL1END3_1" + ], + [ + "CMT_FIFO_WL1END3_2", + "CMT_TOP_WL1END3_2" + ], + [ + "CMT_FIFO_WL1END3_3", + "CMT_TOP_WL1END3_3" + ], + [ + "CMT_FIFO_WL1END3_4", + "CMT_TOP_WL1END3_4" + ], + [ + "CMT_FIFO_WL1END3_5", + "CMT_TOP_WL1END3_5" + ], + [ + "CMT_FIFO_WL1END3_6", + "CMT_TOP_WL1END3_6" + ], + [ + "CMT_FIFO_WL1END3_7", + "CMT_TOP_WL1END3_7" + ], + [ + "CMT_FIFO_WL1END3_8", + "CMT_TOP_WL1END3_8" + ], + [ + "CMT_FIFO_WL1END3_9", + "CMT_TOP_WL1END3_9" + ], + [ + "CMT_FIFO_WL1END3_10", + "CMT_TOP_WL1END3_10" + ], + [ + "CMT_FIFO_WL1END3_11", + "CMT_TOP_WL1END3_11" + ], + [ + "CMT_FIFO_WR1END0_0", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_FIFO_WR1END0_1", + "CMT_TOP_WR1END0_1" + ], + [ + "CMT_FIFO_WR1END0_2", + "CMT_TOP_WR1END0_2" + ], + [ + "CMT_FIFO_WR1END0_3", + "CMT_TOP_WR1END0_3" + ], + [ + "CMT_FIFO_WR1END0_4", + "CMT_TOP_WR1END0_4" + ], + [ + "CMT_FIFO_WR1END0_5", + "CMT_TOP_WR1END0_5" + ], + [ + "CMT_FIFO_WR1END0_6", + "CMT_TOP_WR1END0_6" + ], + [ + "CMT_FIFO_WR1END0_7", + "CMT_TOP_WR1END0_7" + ], + [ + "CMT_FIFO_WR1END0_8", + "CMT_TOP_WR1END0_8" + ], + [ + "CMT_FIFO_WR1END0_9", + "CMT_TOP_WR1END0_9" + ], + [ + "CMT_FIFO_WR1END0_10", + "CMT_TOP_WR1END0_10" + ], + [ + "CMT_FIFO_WR1END0_11", + "CMT_TOP_WR1END0_11" + ], + [ + "CMT_FIFO_WR1END1_0", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_FIFO_WR1END1_1", + "CMT_TOP_WR1END1_1" + ], + [ + "CMT_FIFO_WR1END1_2", + "CMT_TOP_WR1END1_2" + ], + [ + "CMT_FIFO_WR1END1_3", + "CMT_TOP_WR1END1_3" + ], + [ + "CMT_FIFO_WR1END1_4", + "CMT_TOP_WR1END1_4" + ], + [ + "CMT_FIFO_WR1END1_5", + "CMT_TOP_WR1END1_5" + ], + [ + "CMT_FIFO_WR1END1_6", + "CMT_TOP_WR1END1_6" + ], + [ + "CMT_FIFO_WR1END1_7", + "CMT_TOP_WR1END1_7" + ], + [ + "CMT_FIFO_WR1END1_8", + "CMT_TOP_WR1END1_8" + ], + [ + "CMT_FIFO_WR1END1_9", + "CMT_TOP_WR1END1_9" + ], + [ + "CMT_FIFO_WR1END1_10", + "CMT_TOP_WR1END1_10" + ], + [ + "CMT_FIFO_WR1END1_11", + "CMT_TOP_WR1END1_11" + ], + [ + "CMT_FIFO_WR1END2_0", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_FIFO_WR1END2_1", + "CMT_TOP_WR1END2_1" + ], + [ + "CMT_FIFO_WR1END2_2", + "CMT_TOP_WR1END2_2" + ], + [ + "CMT_FIFO_WR1END2_3", + "CMT_TOP_WR1END2_3" + ], + [ + "CMT_FIFO_WR1END2_4", + "CMT_TOP_WR1END2_4" + ], + [ + "CMT_FIFO_WR1END2_5", + "CMT_TOP_WR1END2_5" + ], + [ + "CMT_FIFO_WR1END2_6", + "CMT_TOP_WR1END2_6" + ], + [ + "CMT_FIFO_WR1END2_7", + "CMT_TOP_WR1END2_7" + ], + [ + "CMT_FIFO_WR1END2_8", + "CMT_TOP_WR1END2_8" + ], + [ + "CMT_FIFO_WR1END2_9", + "CMT_TOP_WR1END2_9" + ], + [ + "CMT_FIFO_WR1END2_10", + "CMT_TOP_WR1END2_10" + ], + [ + "CMT_FIFO_WR1END2_11", + "CMT_TOP_WR1END2_11" + ], + [ + "CMT_FIFO_WR1END3_0", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_FIFO_WR1END3_1", + "CMT_TOP_WR1END3_1" + ], + [ + "CMT_FIFO_WR1END3_2", + "CMT_TOP_WR1END3_2" + ], + [ + "CMT_FIFO_WR1END3_3", + "CMT_TOP_WR1END3_3" + ], + [ + "CMT_FIFO_WR1END3_4", + "CMT_TOP_WR1END3_4" + ], + [ + "CMT_FIFO_WR1END3_5", + "CMT_TOP_WR1END3_5" + ], + [ + "CMT_FIFO_WR1END3_6", + "CMT_TOP_WR1END3_6" + ], + [ + "CMT_FIFO_WR1END3_7", + "CMT_TOP_WR1END3_7" + ], + [ + "CMT_FIFO_WR1END3_8", + "CMT_TOP_WR1END3_8" + ], + [ + "CMT_FIFO_WR1END3_9", + "CMT_TOP_WR1END3_9" + ], + [ + "CMT_FIFO_WR1END3_10", + "CMT_TOP_WR1END3_10" + ], + [ + "CMT_FIFO_WR1END3_11", + "CMT_TOP_WR1END3_11" + ], + [ + "CMT_FIFO_WW2A0_0", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_FIFO_WW2A0_1", + "CMT_TOP_WW2A0_1" + ], + [ + "CMT_FIFO_WW2A0_2", + "CMT_TOP_WW2A0_2" + ], + [ + "CMT_FIFO_WW2A0_3", + "CMT_TOP_WW2A0_3" + ], + [ + "CMT_FIFO_WW2A0_4", + "CMT_TOP_WW2A0_4" + ], + [ + "CMT_FIFO_WW2A0_5", + "CMT_TOP_WW2A0_5" + ], + [ + "CMT_FIFO_WW2A0_6", + "CMT_TOP_WW2A0_6" + ], + [ + "CMT_FIFO_WW2A0_7", + "CMT_TOP_WW2A0_7" + ], + [ + "CMT_FIFO_WW2A0_8", + "CMT_TOP_WW2A0_8" + ], + [ + "CMT_FIFO_WW2A0_9", + "CMT_TOP_WW2A0_9" + ], + [ + "CMT_FIFO_WW2A0_10", + "CMT_TOP_WW2A0_10" + ], + [ + "CMT_FIFO_WW2A0_11", + "CMT_TOP_WW2A0_11" + ], + [ + "CMT_FIFO_WW2A1_0", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_FIFO_WW2A1_1", + "CMT_TOP_WW2A1_1" + ], + [ + "CMT_FIFO_WW2A1_2", + "CMT_TOP_WW2A1_2" + ], + [ + "CMT_FIFO_WW2A1_3", + "CMT_TOP_WW2A1_3" + ], + [ + "CMT_FIFO_WW2A1_4", + "CMT_TOP_WW2A1_4" + ], + [ + "CMT_FIFO_WW2A1_5", + "CMT_TOP_WW2A1_5" + ], + [ + "CMT_FIFO_WW2A1_6", + "CMT_TOP_WW2A1_6" + ], + [ + "CMT_FIFO_WW2A1_7", + "CMT_TOP_WW2A1_7" + ], + [ + "CMT_FIFO_WW2A1_8", + "CMT_TOP_WW2A1_8" + ], + [ + "CMT_FIFO_WW2A1_9", + "CMT_TOP_WW2A1_9" + ], + [ + "CMT_FIFO_WW2A1_10", + "CMT_TOP_WW2A1_10" + ], + [ + "CMT_FIFO_WW2A1_11", + "CMT_TOP_WW2A1_11" + ], + [ + "CMT_FIFO_WW2A2_0", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_FIFO_WW2A2_1", + "CMT_TOP_WW2A2_1" + ], + [ + "CMT_FIFO_WW2A2_2", + "CMT_TOP_WW2A2_2" + ], + [ + "CMT_FIFO_WW2A2_3", + "CMT_TOP_WW2A2_3" + ], + [ + "CMT_FIFO_WW2A2_4", + "CMT_TOP_WW2A2_4" + ], + [ + "CMT_FIFO_WW2A2_5", + "CMT_TOP_WW2A2_5" + ], + [ + "CMT_FIFO_WW2A2_6", + "CMT_TOP_WW2A2_6" + ], + [ + "CMT_FIFO_WW2A2_7", + "CMT_TOP_WW2A2_7" + ], + [ + "CMT_FIFO_WW2A2_8", + "CMT_TOP_WW2A2_8" + ], + [ + "CMT_FIFO_WW2A2_9", + "CMT_TOP_WW2A2_9" + ], + [ + "CMT_FIFO_WW2A2_10", + "CMT_TOP_WW2A2_10" + ], + [ + "CMT_FIFO_WW2A2_11", + "CMT_TOP_WW2A2_11" + ], + [ + "CMT_FIFO_WW2A3_0", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_FIFO_WW2A3_1", + "CMT_TOP_WW2A3_1" + ], + [ + "CMT_FIFO_WW2A3_2", + "CMT_TOP_WW2A3_2" + ], + [ + "CMT_FIFO_WW2A3_3", + "CMT_TOP_WW2A3_3" + ], + [ + "CMT_FIFO_WW2A3_4", + "CMT_TOP_WW2A3_4" + ], + [ + "CMT_FIFO_WW2A3_5", + "CMT_TOP_WW2A3_5" + ], + [ + "CMT_FIFO_WW2A3_6", + "CMT_TOP_WW2A3_6" + ], + [ + "CMT_FIFO_WW2A3_7", + "CMT_TOP_WW2A3_7" + ], + [ + "CMT_FIFO_WW2A3_8", + "CMT_TOP_WW2A3_8" + ], + [ + "CMT_FIFO_WW2A3_9", + "CMT_TOP_WW2A3_9" + ], + [ + "CMT_FIFO_WW2A3_10", + "CMT_TOP_WW2A3_10" + ], + [ + "CMT_FIFO_WW2A3_11", + "CMT_TOP_WW2A3_11" + ], + [ + "CMT_FIFO_WW2END0_0", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_FIFO_WW2END0_1", + "CMT_TOP_WW2END0_1" + ], + [ + "CMT_FIFO_WW2END0_2", + "CMT_TOP_WW2END0_2" + ], + [ + "CMT_FIFO_WW2END0_3", + "CMT_TOP_WW2END0_3" + ], + [ + "CMT_FIFO_WW2END0_4", + "CMT_TOP_WW2END0_4" + ], + [ + "CMT_FIFO_WW2END0_5", + "CMT_TOP_WW2END0_5" + ], + [ + "CMT_FIFO_WW2END0_6", + "CMT_TOP_WW2END0_6" + ], + [ + "CMT_FIFO_WW2END0_7", + "CMT_TOP_WW2END0_7" + ], + [ + "CMT_FIFO_WW2END0_8", + "CMT_TOP_WW2END0_8" + ], + [ + "CMT_FIFO_WW2END0_9", + "CMT_TOP_WW2END0_9" + ], + [ + "CMT_FIFO_WW2END0_10", + "CMT_TOP_WW2END0_10" + ], + [ + "CMT_FIFO_WW2END0_11", + "CMT_TOP_WW2END0_11" + ], + [ + "CMT_FIFO_WW2END1_0", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_FIFO_WW2END1_1", + "CMT_TOP_WW2END1_1" + ], + [ + "CMT_FIFO_WW2END1_2", + "CMT_TOP_WW2END1_2" + ], + [ + "CMT_FIFO_WW2END1_3", + "CMT_TOP_WW2END1_3" + ], + [ + "CMT_FIFO_WW2END1_4", + "CMT_TOP_WW2END1_4" + ], + [ + "CMT_FIFO_WW2END1_5", + "CMT_TOP_WW2END1_5" + ], + [ + "CMT_FIFO_WW2END1_6", + "CMT_TOP_WW2END1_6" + ], + [ + "CMT_FIFO_WW2END1_7", + "CMT_TOP_WW2END1_7" + ], + [ + "CMT_FIFO_WW2END1_8", + "CMT_TOP_WW2END1_8" + ], + [ + "CMT_FIFO_WW2END1_9", + "CMT_TOP_WW2END1_9" + ], + [ + "CMT_FIFO_WW2END1_10", + "CMT_TOP_WW2END1_10" + ], + [ + "CMT_FIFO_WW2END1_11", + "CMT_TOP_WW2END1_11" + ], + [ + "CMT_FIFO_WW2END2_0", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_FIFO_WW2END2_1", + "CMT_TOP_WW2END2_1" + ], + [ + "CMT_FIFO_WW2END2_2", + "CMT_TOP_WW2END2_2" + ], + [ + "CMT_FIFO_WW2END2_3", + "CMT_TOP_WW2END2_3" + ], + [ + "CMT_FIFO_WW2END2_4", + "CMT_TOP_WW2END2_4" + ], + [ + "CMT_FIFO_WW2END2_5", + "CMT_TOP_WW2END2_5" + ], + [ + "CMT_FIFO_WW2END2_6", + "CMT_TOP_WW2END2_6" + ], + [ + "CMT_FIFO_WW2END2_7", + "CMT_TOP_WW2END2_7" + ], + [ + "CMT_FIFO_WW2END2_8", + "CMT_TOP_WW2END2_8" + ], + [ + "CMT_FIFO_WW2END2_9", + "CMT_TOP_WW2END2_9" + ], + [ + "CMT_FIFO_WW2END2_10", + "CMT_TOP_WW2END2_10" + ], + [ + "CMT_FIFO_WW2END2_11", + "CMT_TOP_WW2END2_11" + ], + [ + "CMT_FIFO_WW2END3_0", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_FIFO_WW2END3_1", + "CMT_TOP_WW2END3_1" + ], + [ + "CMT_FIFO_WW2END3_2", + "CMT_TOP_WW2END3_2" + ], + [ + "CMT_FIFO_WW2END3_3", + "CMT_TOP_WW2END3_3" + ], + [ + "CMT_FIFO_WW2END3_4", + "CMT_TOP_WW2END3_4" + ], + [ + "CMT_FIFO_WW2END3_5", + "CMT_TOP_WW2END3_5" + ], + [ + "CMT_FIFO_WW2END3_6", + "CMT_TOP_WW2END3_6" + ], + [ + "CMT_FIFO_WW2END3_7", + "CMT_TOP_WW2END3_7" + ], + [ + "CMT_FIFO_WW2END3_8", + "CMT_TOP_WW2END3_8" + ], + [ + "CMT_FIFO_WW2END3_9", + "CMT_TOP_WW2END3_9" + ], + [ + "CMT_FIFO_WW2END3_10", + "CMT_TOP_WW2END3_10" + ], + [ + "CMT_FIFO_WW2END3_11", + "CMT_TOP_WW2END3_11" + ], + [ + "CMT_FIFO_WW4A0_0", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_FIFO_WW4A0_1", + "CMT_TOP_WW4A0_1" + ], + [ + "CMT_FIFO_WW4A0_2", + "CMT_TOP_WW4A0_2" + ], + [ + "CMT_FIFO_WW4A0_3", + "CMT_TOP_WW4A0_3" + ], + [ + "CMT_FIFO_WW4A0_4", + "CMT_TOP_WW4A0_4" + ], + [ + "CMT_FIFO_WW4A0_5", + "CMT_TOP_WW4A0_5" + ], + [ + "CMT_FIFO_WW4A0_6", + "CMT_TOP_WW4A0_6" + ], + [ + "CMT_FIFO_WW4A0_7", + "CMT_TOP_WW4A0_7" + ], + [ + "CMT_FIFO_WW4A0_8", + "CMT_TOP_WW4A0_8" + ], + [ + "CMT_FIFO_WW4A0_9", + "CMT_TOP_WW4A0_9" + ], + [ + "CMT_FIFO_WW4A0_10", + "CMT_TOP_WW4A0_10" + ], + [ + "CMT_FIFO_WW4A0_11", + "CMT_TOP_WW4A0_11" + ], + [ + "CMT_FIFO_WW4A1_0", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_FIFO_WW4A1_1", + "CMT_TOP_WW4A1_1" + ], + [ + "CMT_FIFO_WW4A1_2", + "CMT_TOP_WW4A1_2" + ], + [ + "CMT_FIFO_WW4A1_3", + "CMT_TOP_WW4A1_3" + ], + [ + "CMT_FIFO_WW4A1_4", + "CMT_TOP_WW4A1_4" + ], + [ + "CMT_FIFO_WW4A1_5", + "CMT_TOP_WW4A1_5" + ], + [ + "CMT_FIFO_WW4A1_6", + "CMT_TOP_WW4A1_6" + ], + [ + "CMT_FIFO_WW4A1_7", + "CMT_TOP_WW4A1_7" + ], + [ + "CMT_FIFO_WW4A1_8", + "CMT_TOP_WW4A1_8" + ], + [ + "CMT_FIFO_WW4A1_9", + "CMT_TOP_WW4A1_9" + ], + [ + "CMT_FIFO_WW4A1_10", + "CMT_TOP_WW4A1_10" + ], + [ + "CMT_FIFO_WW4A1_11", + "CMT_TOP_WW4A1_11" + ], + [ + "CMT_FIFO_WW4A2_0", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_FIFO_WW4A2_1", + "CMT_TOP_WW4A2_1" + ], + [ + "CMT_FIFO_WW4A2_2", + "CMT_TOP_WW4A2_2" + ], + [ + "CMT_FIFO_WW4A2_3", + "CMT_TOP_WW4A2_3" + ], + [ + "CMT_FIFO_WW4A2_4", + "CMT_TOP_WW4A2_4" + ], + [ + "CMT_FIFO_WW4A2_5", + "CMT_TOP_WW4A2_5" + ], + [ + "CMT_FIFO_WW4A2_6", + "CMT_TOP_WW4A2_6" + ], + [ + "CMT_FIFO_WW4A2_7", + "CMT_TOP_WW4A2_7" + ], + [ + "CMT_FIFO_WW4A2_8", + "CMT_TOP_WW4A2_8" + ], + [ + "CMT_FIFO_WW4A2_9", + "CMT_TOP_WW4A2_9" + ], + [ + "CMT_FIFO_WW4A2_10", + "CMT_TOP_WW4A2_10" + ], + [ + "CMT_FIFO_WW4A2_11", + "CMT_TOP_WW4A2_11" + ], + [ + "CMT_FIFO_WW4A3_0", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_FIFO_WW4A3_1", + "CMT_TOP_WW4A3_1" + ], + [ + "CMT_FIFO_WW4A3_2", + "CMT_TOP_WW4A3_2" + ], + [ + "CMT_FIFO_WW4A3_3", + "CMT_TOP_WW4A3_3" + ], + [ + "CMT_FIFO_WW4A3_4", + "CMT_TOP_WW4A3_4" + ], + [ + "CMT_FIFO_WW4A3_5", + "CMT_TOP_WW4A3_5" + ], + [ + "CMT_FIFO_WW4A3_6", + "CMT_TOP_WW4A3_6" + ], + [ + "CMT_FIFO_WW4A3_7", + "CMT_TOP_WW4A3_7" + ], + [ + "CMT_FIFO_WW4A3_8", + "CMT_TOP_WW4A3_8" + ], + [ + "CMT_FIFO_WW4A3_9", + "CMT_TOP_WW4A3_9" + ], + [ + "CMT_FIFO_WW4A3_10", + "CMT_TOP_WW4A3_10" + ], + [ + "CMT_FIFO_WW4A3_11", + "CMT_TOP_WW4A3_11" + ], + [ + "CMT_FIFO_WW4B0_0", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_FIFO_WW4B0_1", + "CMT_TOP_WW4B0_1" + ], + [ + "CMT_FIFO_WW4B0_2", + "CMT_TOP_WW4B0_2" + ], + [ + "CMT_FIFO_WW4B0_3", + "CMT_TOP_WW4B0_3" + ], + [ + "CMT_FIFO_WW4B0_4", + "CMT_TOP_WW4B0_4" + ], + [ + "CMT_FIFO_WW4B0_5", + "CMT_TOP_WW4B0_5" + ], + [ + "CMT_FIFO_WW4B0_6", + "CMT_TOP_WW4B0_6" + ], + [ + "CMT_FIFO_WW4B0_7", + "CMT_TOP_WW4B0_7" + ], + [ + "CMT_FIFO_WW4B0_8", + "CMT_TOP_WW4B0_8" + ], + [ + "CMT_FIFO_WW4B0_9", + "CMT_TOP_WW4B0_9" + ], + [ + "CMT_FIFO_WW4B0_10", + "CMT_TOP_WW4B0_10" + ], + [ + "CMT_FIFO_WW4B0_11", + "CMT_TOP_WW4B0_11" + ], + [ + "CMT_FIFO_WW4B1_0", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_FIFO_WW4B1_1", + "CMT_TOP_WW4B1_1" + ], + [ + "CMT_FIFO_WW4B1_2", + "CMT_TOP_WW4B1_2" + ], + [ + "CMT_FIFO_WW4B1_3", + "CMT_TOP_WW4B1_3" + ], + [ + "CMT_FIFO_WW4B1_4", + "CMT_TOP_WW4B1_4" + ], + [ + "CMT_FIFO_WW4B1_5", + "CMT_TOP_WW4B1_5" + ], + [ + "CMT_FIFO_WW4B1_6", + "CMT_TOP_WW4B1_6" + ], + [ + "CMT_FIFO_WW4B1_7", + "CMT_TOP_WW4B1_7" + ], + [ + "CMT_FIFO_WW4B1_8", + "CMT_TOP_WW4B1_8" + ], + [ + "CMT_FIFO_WW4B1_9", + "CMT_TOP_WW4B1_9" + ], + [ + "CMT_FIFO_WW4B1_10", + "CMT_TOP_WW4B1_10" + ], + [ + "CMT_FIFO_WW4B1_11", + "CMT_TOP_WW4B1_11" + ], + [ + "CMT_FIFO_WW4B2_0", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_FIFO_WW4B2_1", + "CMT_TOP_WW4B2_1" + ], + [ + "CMT_FIFO_WW4B2_2", + "CMT_TOP_WW4B2_2" + ], + [ + "CMT_FIFO_WW4B2_3", + "CMT_TOP_WW4B2_3" + ], + [ + "CMT_FIFO_WW4B2_4", + "CMT_TOP_WW4B2_4" + ], + [ + "CMT_FIFO_WW4B2_5", + "CMT_TOP_WW4B2_5" + ], + [ + "CMT_FIFO_WW4B2_6", + "CMT_TOP_WW4B2_6" + ], + [ + "CMT_FIFO_WW4B2_7", + "CMT_TOP_WW4B2_7" + ], + [ + "CMT_FIFO_WW4B2_8", + "CMT_TOP_WW4B2_8" + ], + [ + "CMT_FIFO_WW4B2_9", + "CMT_TOP_WW4B2_9" + ], + [ + "CMT_FIFO_WW4B2_10", + "CMT_TOP_WW4B2_10" + ], + [ + "CMT_FIFO_WW4B2_11", + "CMT_TOP_WW4B2_11" + ], + [ + "CMT_FIFO_WW4B3_0", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_FIFO_WW4B3_1", + "CMT_TOP_WW4B3_1" + ], + [ + "CMT_FIFO_WW4B3_2", + "CMT_TOP_WW4B3_2" + ], + [ + "CMT_FIFO_WW4B3_3", + "CMT_TOP_WW4B3_3" + ], + [ + "CMT_FIFO_WW4B3_4", + "CMT_TOP_WW4B3_4" + ], + [ + "CMT_FIFO_WW4B3_5", + "CMT_TOP_WW4B3_5" + ], + [ + "CMT_FIFO_WW4B3_6", + "CMT_TOP_WW4B3_6" + ], + [ + "CMT_FIFO_WW4B3_7", + "CMT_TOP_WW4B3_7" + ], + [ + "CMT_FIFO_WW4B3_8", + "CMT_TOP_WW4B3_8" + ], + [ + "CMT_FIFO_WW4B3_9", + "CMT_TOP_WW4B3_9" + ], + [ + "CMT_FIFO_WW4B3_10", + "CMT_TOP_WW4B3_10" + ], + [ + "CMT_FIFO_WW4B3_11", + "CMT_TOP_WW4B3_11" + ], + [ + "CMT_FIFO_WW4C0_0", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_FIFO_WW4C0_1", + "CMT_TOP_WW4C0_1" + ], + [ + "CMT_FIFO_WW4C0_2", + "CMT_TOP_WW4C0_2" + ], + [ + "CMT_FIFO_WW4C0_3", + "CMT_TOP_WW4C0_3" + ], + [ + "CMT_FIFO_WW4C0_4", + "CMT_TOP_WW4C0_4" + ], + [ + "CMT_FIFO_WW4C0_5", + "CMT_TOP_WW4C0_5" + ], + [ + "CMT_FIFO_WW4C0_6", + "CMT_TOP_WW4C0_6" + ], + [ + "CMT_FIFO_WW4C0_7", + "CMT_TOP_WW4C0_7" + ], + [ + "CMT_FIFO_WW4C0_8", + "CMT_TOP_WW4C0_8" + ], + [ + "CMT_FIFO_WW4C0_9", + "CMT_TOP_WW4C0_9" + ], + [ + "CMT_FIFO_WW4C0_10", + "CMT_TOP_WW4C0_10" + ], + [ + "CMT_FIFO_WW4C0_11", + "CMT_TOP_WW4C0_11" + ], + [ + "CMT_FIFO_WW4C1_0", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_FIFO_WW4C1_1", + "CMT_TOP_WW4C1_1" + ], + [ + "CMT_FIFO_WW4C1_2", + "CMT_TOP_WW4C1_2" + ], + [ + "CMT_FIFO_WW4C1_3", + "CMT_TOP_WW4C1_3" + ], + [ + "CMT_FIFO_WW4C1_4", + "CMT_TOP_WW4C1_4" + ], + [ + "CMT_FIFO_WW4C1_5", + "CMT_TOP_WW4C1_5" + ], + [ + "CMT_FIFO_WW4C1_6", + "CMT_TOP_WW4C1_6" + ], + [ + "CMT_FIFO_WW4C1_7", + "CMT_TOP_WW4C1_7" + ], + [ + "CMT_FIFO_WW4C1_8", + "CMT_TOP_WW4C1_8" + ], + [ + "CMT_FIFO_WW4C1_9", + "CMT_TOP_WW4C1_9" + ], + [ + "CMT_FIFO_WW4C1_10", + "CMT_TOP_WW4C1_10" + ], + [ + "CMT_FIFO_WW4C1_11", + "CMT_TOP_WW4C1_11" + ], + [ + "CMT_FIFO_WW4C2_0", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_FIFO_WW4C2_1", + "CMT_TOP_WW4C2_1" + ], + [ + "CMT_FIFO_WW4C2_2", + "CMT_TOP_WW4C2_2" + ], + [ + "CMT_FIFO_WW4C2_3", + "CMT_TOP_WW4C2_3" + ], + [ + "CMT_FIFO_WW4C2_4", + "CMT_TOP_WW4C2_4" + ], + [ + "CMT_FIFO_WW4C2_5", + "CMT_TOP_WW4C2_5" + ], + [ + "CMT_FIFO_WW4C2_6", + "CMT_TOP_WW4C2_6" + ], + [ + "CMT_FIFO_WW4C2_7", + "CMT_TOP_WW4C2_7" + ], + [ + "CMT_FIFO_WW4C2_8", + "CMT_TOP_WW4C2_8" + ], + [ + "CMT_FIFO_WW4C2_9", + "CMT_TOP_WW4C2_9" + ], + [ + "CMT_FIFO_WW4C2_10", + "CMT_TOP_WW4C2_10" + ], + [ + "CMT_FIFO_WW4C2_11", + "CMT_TOP_WW4C2_11" + ], + [ + "CMT_FIFO_WW4C3_0", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_FIFO_WW4C3_1", + "CMT_TOP_WW4C3_1" + ], + [ + "CMT_FIFO_WW4C3_2", + "CMT_TOP_WW4C3_2" + ], + [ + "CMT_FIFO_WW4C3_3", + "CMT_TOP_WW4C3_3" + ], + [ + "CMT_FIFO_WW4C3_4", + "CMT_TOP_WW4C3_4" + ], + [ + "CMT_FIFO_WW4C3_5", + "CMT_TOP_WW4C3_5" + ], + [ + "CMT_FIFO_WW4C3_6", + "CMT_TOP_WW4C3_6" + ], + [ + "CMT_FIFO_WW4C3_7", + "CMT_TOP_WW4C3_7" + ], + [ + "CMT_FIFO_WW4C3_8", + "CMT_TOP_WW4C3_8" + ], + [ + "CMT_FIFO_WW4C3_9", + "CMT_TOP_WW4C3_9" + ], + [ + "CMT_FIFO_WW4C3_10", + "CMT_TOP_WW4C3_10" + ], + [ + "CMT_FIFO_WW4C3_11", + "CMT_TOP_WW4C3_11" + ], + [ + "CMT_FIFO_WW4END0_0", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_FIFO_WW4END0_1", + "CMT_TOP_WW4END0_1" + ], + [ + "CMT_FIFO_WW4END0_2", + "CMT_TOP_WW4END0_2" + ], + [ + "CMT_FIFO_WW4END0_3", + "CMT_TOP_WW4END0_3" + ], + [ + "CMT_FIFO_WW4END0_4", + "CMT_TOP_WW4END0_4" + ], + [ + "CMT_FIFO_WW4END0_5", + "CMT_TOP_WW4END0_5" + ], + [ + "CMT_FIFO_WW4END0_6", + "CMT_TOP_WW4END0_6" + ], + [ + "CMT_FIFO_WW4END0_7", + "CMT_TOP_WW4END0_7" + ], + [ + "CMT_FIFO_WW4END0_8", + "CMT_TOP_WW4END0_8" + ], + [ + "CMT_FIFO_WW4END0_9", + "CMT_TOP_WW4END0_9" + ], + [ + "CMT_FIFO_WW4END0_10", + "CMT_TOP_WW4END0_10" + ], + [ + "CMT_FIFO_WW4END0_11", + "CMT_TOP_WW4END0_11" + ], + [ + "CMT_FIFO_WW4END1_0", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_FIFO_WW4END1_1", + "CMT_TOP_WW4END1_1" + ], + [ + "CMT_FIFO_WW4END1_2", + "CMT_TOP_WW4END1_2" + ], + [ + "CMT_FIFO_WW4END1_3", + "CMT_TOP_WW4END1_3" + ], + [ + "CMT_FIFO_WW4END1_4", + "CMT_TOP_WW4END1_4" + ], + [ + "CMT_FIFO_WW4END1_5", + "CMT_TOP_WW4END1_5" + ], + [ + "CMT_FIFO_WW4END1_6", + "CMT_TOP_WW4END1_6" + ], + [ + "CMT_FIFO_WW4END1_7", + "CMT_TOP_WW4END1_7" + ], + [ + "CMT_FIFO_WW4END1_8", + "CMT_TOP_WW4END1_8" + ], + [ + "CMT_FIFO_WW4END1_9", + "CMT_TOP_WW4END1_9" + ], + [ + "CMT_FIFO_WW4END1_10", + "CMT_TOP_WW4END1_10" + ], + [ + "CMT_FIFO_WW4END1_11", + "CMT_TOP_WW4END1_11" + ], + [ + "CMT_FIFO_WW4END2_0", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_FIFO_WW4END2_1", + "CMT_TOP_WW4END2_1" + ], + [ + "CMT_FIFO_WW4END2_2", + "CMT_TOP_WW4END2_2" + ], + [ + "CMT_FIFO_WW4END2_3", + "CMT_TOP_WW4END2_3" + ], + [ + "CMT_FIFO_WW4END2_4", + "CMT_TOP_WW4END2_4" + ], + [ + "CMT_FIFO_WW4END2_5", + "CMT_TOP_WW4END2_5" + ], + [ + "CMT_FIFO_WW4END2_6", + "CMT_TOP_WW4END2_6" + ], + [ + "CMT_FIFO_WW4END2_7", + "CMT_TOP_WW4END2_7" + ], + [ + "CMT_FIFO_WW4END2_8", + "CMT_TOP_WW4END2_8" + ], + [ + "CMT_FIFO_WW4END2_9", + "CMT_TOP_WW4END2_9" + ], + [ + "CMT_FIFO_WW4END2_10", + "CMT_TOP_WW4END2_10" + ], + [ + "CMT_FIFO_WW4END2_11", + "CMT_TOP_WW4END2_11" + ], + [ + "CMT_FIFO_WW4END3_0", + "CMT_TOP_WW4END3_0" + ], + [ + "CMT_FIFO_WW4END3_1", + "CMT_TOP_WW4END3_1" + ], + [ + "CMT_FIFO_WW4END3_2", + "CMT_TOP_WW4END3_2" + ], + [ + "CMT_FIFO_WW4END3_3", + "CMT_TOP_WW4END3_3" + ], + [ + "CMT_FIFO_WW4END3_4", + "CMT_TOP_WW4END3_4" + ], + [ + "CMT_FIFO_WW4END3_5", + "CMT_TOP_WW4END3_5" + ], + [ + "CMT_FIFO_WW4END3_6", + "CMT_TOP_WW4END3_6" + ], + [ + "CMT_FIFO_WW4END3_7", + "CMT_TOP_WW4END3_7" + ], + [ + "CMT_FIFO_WW4END3_8", + "CMT_TOP_WW4END3_8" + ], + [ + "CMT_FIFO_WW4END3_9", + "CMT_TOP_WW4END3_9" + ], + [ + "CMT_FIFO_WW4END3_10", + "CMT_TOP_WW4END3_10" + ], + [ + "CMT_FIFO_WW4END3_11", + "CMT_TOP_WW4END3_11" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "CMT_PLL_DQS_TO_PHASER_D" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_11", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_11", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_11", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_11", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_11", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_11", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_11", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_11", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_11", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_11", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_11", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_11", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_11", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_11", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_11", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_11", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_11", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_11", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_11", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_11", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_11", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_11", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_11", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_11", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_11", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_11", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_11", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_11", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_11", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_11", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_11", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_11", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_11", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_11", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_11", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_11", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_11", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_11", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_11", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_11", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_11", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_11", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_11", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_11", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_11", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_11", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_11", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_11", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_11", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_11", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_11", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_11", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_11", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_11", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_11", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_11", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_11", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_11", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_11", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_11", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_11", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_11", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_11", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_11", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_11", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_11", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_11", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_11", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_11", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_11", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_11", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_11", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_11", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_11", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_11", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_11", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_11", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_11", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_11", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_11", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_11", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_11", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_11", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_11", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_11", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_11", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_11", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_11", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_11", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_11", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_11", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_11", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_11", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_11", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_11", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_11", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_11", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_11", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_11", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_11", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_11", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_11", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_11", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_11", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_11", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_11", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_11", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_11", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_11", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_11", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_11", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_11", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_11", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_11", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_11", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_11", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_11", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_11", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_11", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_11", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_11", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_11", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_11", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_11", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_11", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_11", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_11", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_11", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_11", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_11", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_11", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_NE2A0_11", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_11", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_11", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_11", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_11", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_11", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_11", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_11", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_11", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_11", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_11", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_11", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_11", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_11", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_11", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_11", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_11", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_11", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_11", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_11", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_11", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_11", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_11", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_11", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_11", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_11", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_11", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_11", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_11", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_11", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_11", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_11", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_11", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_11", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_11", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_11", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_11", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_11", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_11", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_11", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_11", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_11", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_11", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_11", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_11", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_11", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_11", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_11", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_11", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_11", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_11", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_11", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_11", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_11", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_11", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_11", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_11", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_11", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_11", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_11", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_11", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_11", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_11", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_11", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_11", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_11", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_11", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_11", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_11", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_11", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_11", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_11", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_11", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_11", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_11", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_11", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_11", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_11", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_11", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_11", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_11", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_11", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_11", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_11", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_10", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_10", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_10", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_10", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_10", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_10", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_10", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_10", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_10", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_10", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_10", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_10", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_10", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_10", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_10", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_10", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_10", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_10", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_10", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_10", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_10", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_10", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_10", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_10", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_10", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_10", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_10", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_10", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_10", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_10", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_10", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_10", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_10", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_10", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_10", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_10", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_10", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_10", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_10", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_10", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_10", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_10", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_10", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_10", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_10", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_10", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_10", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_10", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_10", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_10", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_10", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_10", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_10", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_10", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_10", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_10", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_10", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_10", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_10", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_10", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_10", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_10", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_10", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_10", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_10", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_10", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_10", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_10", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_10", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_10", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_10", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_10", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_10", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_10", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_10", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_10", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_10", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_10", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_10", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_10", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_10", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_10", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_10", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_10", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_10", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_10", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_10", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_10", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_10", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_10", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_10", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_10", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_10", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_10", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_10", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_10", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_10", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_10", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_10", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_10", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_10", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_10", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_10", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_10", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_10", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_10", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_10", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_10", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_10", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_10", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_10", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_10", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_10", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_10", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_10", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_10", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_10", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_10", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_10", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_10", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_10", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_10", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_10", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_10", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_10", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_10", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_10", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_10", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_10", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_10", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_10", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_10", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_10", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_10", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_10", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_10", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_MONITOR_N_10", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_10", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_10", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_10", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_10", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_10", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_10", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_10", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_10", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_10", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_10", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_10", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_10", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_10", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_10", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_10", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_10", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_10", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_10", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_10", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_10", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_10", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_10", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_10", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_10", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_10", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_10", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_10", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_10", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_10", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_10", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_10", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_10", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_10", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_10", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_10", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_10", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_10", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_10", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_10", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_10", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_10", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_10", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_10", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_10", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_10", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_10", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_10", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_10", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_10", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_10", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_10", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_10", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_10", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_10", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_10", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_10", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_10", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_10", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_10", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_10", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_10", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_10", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_10", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_10", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_10", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_10", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_10", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_10", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_10", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_10", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_10", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_10", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_10", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_10", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_10", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_10", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_10", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_10", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_10", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_10", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_10", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_10", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_10", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_10", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_10", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_5", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_9", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_9", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_9", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_9", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_9", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_9", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_9", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_9", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_9", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_9", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_9", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_9", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_9", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_9", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_9", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_9", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_9", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_9", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_9", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_9", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_9", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_9", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_9", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_9", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_9", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_9", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_9", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_9", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_9", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_9", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_9", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_9", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_9", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_9", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_9", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_9", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_9", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_9", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_9", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_9", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_9", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_9", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_9", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_9", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_9", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_9", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_9", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_9", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_9", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_9", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_9", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_9", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_9", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_9", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_9", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_9", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_9", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_9", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_9", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_9", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_9", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_9", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_9", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_9", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_9", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_9", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_9", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_9", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_9", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_9", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_9", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_9", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_9", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_9", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_9", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_9", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_9", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_9", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_9", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_9", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_9", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_9", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_9", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_9", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_9", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_9", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_9", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_9", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_9", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_9", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_9", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_9", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_9", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_9", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_9", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_9", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_9", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_9", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_9", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_9", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_9", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_9", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_9", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_9", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_9", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_9", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_9", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_9", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_9", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_9", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_9", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_9", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_9", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_9", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_9", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_9", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_9", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_9", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_9", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_9", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_9", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_9", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_9", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_9", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_9", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_9", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_9", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_9", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_9", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_9", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_9", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_9", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_9", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_9", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_9", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_9", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_NE2A0_9", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_9", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_9", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_9", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_9", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_9", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_9", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_9", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_9", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_9", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_9", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_9", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_9", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_9", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_9", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_9", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_9", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_9", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_9", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_9", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_9", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_9", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_9", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_9", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_9", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_9", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_9", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_9", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_9", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_9", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_9", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_9", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_9", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_9", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_9", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_9", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_9", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_9", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_9", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_9", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_9", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_9", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_9", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_9", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_9", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_9", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_9", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_9", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_9", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_9", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_9", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_9", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_9", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_9", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_9", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_9", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_9", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_9", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_9", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_9", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_9", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_9", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_9", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_9", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_9", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_9", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_9", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_9", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_9", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_9", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_9", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_9", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_9", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_9", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_9", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_9", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_9", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_9", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_9", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_9", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_9", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_9", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_9", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_9", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_8", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_8", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_8", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_8", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_8", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_8", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_8", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_8", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_8", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_8", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_8", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_8", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_8", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_8", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_8", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_8", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_8", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_8", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_8", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_8", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_8", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_8", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_8", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_8", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_8", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_8", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_8", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_8", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_8", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_8", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_8", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_8", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_8", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_8", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_8", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_8", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_8", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_8", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_8", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_8", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_8", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_8", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_8", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_8", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_8", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_8", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_8", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_8", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_8", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_8", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_8", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_8", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_8", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_8", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_8", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_8", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_8", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_8", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_8", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_8", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_8", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_8", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_8", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_8", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_8", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_8", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_8", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_8", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_8", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_8", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_8", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_8", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_8", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_8", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_8", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_8", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_8", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_8", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_8", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_8", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_8", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_8", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_8", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_8", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_8", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_8", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_8", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_8", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_8", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_8", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_8", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_8", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_8", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_8", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_8", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_8", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_8", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_8", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_8", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_8", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_8", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_8", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_8", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_8", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_8", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_8", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_8", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_8", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_8", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_8", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_8", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_8", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_8", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_8", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_8", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_8", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_8", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_8", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_8", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_8", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_8", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_8", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_8", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_8", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_8", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_8", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_8", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_8", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_8", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_8", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_8", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_8", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_8", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_8", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_8", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_8", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_MONITOR_N_8", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_8", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_8", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_8", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_8", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_8", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_8", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_8", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_8", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_8", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_8", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_8", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_8", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_8", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_8", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_8", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_8", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_8", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_8", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_8", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_8", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_8", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_8", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_8", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_8", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_8", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_8", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_8", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_8", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_8", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_8", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_8", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_8", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_8", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_8", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_8", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_8", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_8", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_8", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_8", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_8", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_8", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_8", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_8", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_8", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_8", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_8", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_8", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_8", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_8", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_8", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_8", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_8", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_8", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_8", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_8", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_8", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_8", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_8", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_8", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_8", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_8", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_8", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_8", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_8", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_8", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_8", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_8", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_8", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_8", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_8", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_8", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_8", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_8", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_8", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_8", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_8", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_8", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_8", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_8", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_8", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_8", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_8", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_8", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_8", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_8", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_3", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_7", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_7", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_7", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_7", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_7", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_7", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_7", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_7", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_7", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_7", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_7", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_7", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_7", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_7", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_7", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_7", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_7", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_7", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_7", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_7", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_7", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_7", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_7", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_7", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_7", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_7", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_7", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_7", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_7", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_7", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_7", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_7", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_7", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_7", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_7", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_7", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_7", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_7", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_7", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_7", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_7", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_7", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_7", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_7", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_7", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_7", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_7", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_7", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_7", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_7", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_7", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_7", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_7", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_7", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_7", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_7", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_7", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_7", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_7", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_7", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_7", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_7", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_7", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_7", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_7", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_7", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_7", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_7", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_7", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_7", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_7", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_7", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_7", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_7", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_7", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_7", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_7", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_7", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_7", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_7", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_7", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_7", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_7", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_7", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_7", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_7", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_7", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_7", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_7", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_7", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_7", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_7", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_7", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_7", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_7", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_7", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_7", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_7", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_7", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_7", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_7", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_7", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_7", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_7", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_7", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_7", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_7", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_7", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_7", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_7", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_7", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_7", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_7", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_7", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_7", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_7", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_7", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_7", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_7", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_7", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_7", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_7", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_7", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_7", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_7", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_7", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_7", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_7", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_7", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_7", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_7", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_7", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_7", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_7", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_7", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_7", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_NE2A0_7", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_7", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_7", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_7", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_7", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_7", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_7", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_7", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_7", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_7", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_7", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_7", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_7", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_7", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_7", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_7", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_7", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_7", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_7", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_7", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_7", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_7", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_7", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_7", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_7", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_7", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_7", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_90_7", + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_7", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_7", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_7", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_7", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_7", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_7", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_7", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_7", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_7", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_7", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_7", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_7", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_7", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_7", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_7", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_7", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_7", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_7", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_7", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_7", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_7", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_7", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_7", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_7", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_7", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_7", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_7", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_7", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_7", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_7", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_7", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_7", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_7", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_7", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_7", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_7", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_7", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_7", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_7", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_7", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_7", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_7", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_7", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_7", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_7", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_7", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_7", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_7", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_7", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_7", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_7", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_7", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_7", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_7", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_7", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_7", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_7", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_6", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_6", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_6", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_6", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_6", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_6", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_6", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_6", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_6", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_6", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_6", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_6", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_6", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_6", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_6", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_6", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_6", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_6", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_6", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_6", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_6", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_6", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_6", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_6", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_6", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_6", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_6", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_6", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_6", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_6", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_6", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_6", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_6", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_6", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_6", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_6", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_6", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_6", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_6", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_6", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_6", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_6", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_6", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_6", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_6", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_6", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_6", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_6", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_6", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_6", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_6", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_6", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_6", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_6", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_6", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_6", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_6", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_6", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_6", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_6", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_6", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_6", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_6", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_6", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_6", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_6", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_6", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_6", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_6", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_6", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_6", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_6", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_6", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_6", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_6", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_6", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_6", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_6", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_6", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_6", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_6", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_6", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_6", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_6", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_6", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_6", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_6", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_6", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_6", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_6", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_6", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_6", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_MONITOR_N_6", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_6", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_6", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_6", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_6", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_6", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_6", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_1", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_5", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_5", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_5", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_5", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_5", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_5", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_5", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_5", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_5", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_5", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_5", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_5", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_5", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_5", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_5", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_5", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_5", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_5", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_5", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_5", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_5", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_5", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_5", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_5", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_5", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_5", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_5", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_5", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_5", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_5", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_5", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_5", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_5", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_5", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_5", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_5", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_5", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_5", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_5", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_5", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_5", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_5", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_5", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_5", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_5", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_5", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_5", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_5", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_5", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_5", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_5", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_5", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_5", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_5", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_5", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_5", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_5", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_5", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_5", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_5", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_5", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_5", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_5", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_5", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_5", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_5", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_5", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_5", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_5", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_5", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_5", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_5", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_5", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_5", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_5", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_5", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_5", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_5", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_5", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_5", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_5", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_5", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_5", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_5", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_5", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_5", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_5", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_5", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_5", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_5", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_5", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_5", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_5", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_5", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_5", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_5", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_4", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_4", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_4", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_4", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_4", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_4", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_4", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_4", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_4", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_4", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_4", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_4", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_4", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_4", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_4", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_4", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_4", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_4", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_4", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_4", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_4", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_4", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_4", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_4", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_4", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_4", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_4", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_4", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_4", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_22", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_3", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_3", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_3", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_3", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_3", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_3", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_3", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_3", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_3", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_3", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_3", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_3", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_3", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_3", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_3", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_3", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_3", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_3", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_3", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_3", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_3", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_3", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_3", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_3", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_3", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_3", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_3", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_3", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_2", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_2", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_2", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_2", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_2", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_2", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_2", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_2", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_2", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_2", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_2", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_2", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_2", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_2", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_2", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_2", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_2", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_2", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_2", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_2", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_2", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_2", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_2", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_2", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_2", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_2", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_2", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_2", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_2", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_44", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_1", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_1", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_1", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_1", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_1", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_1", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_1", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_1", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_1", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_1", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_1", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_1", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_1", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_1", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_1", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_1", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_1", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_1", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_1", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_1", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_1", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_1", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_1", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_1", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_1", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_1", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_1", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 6 + ], + "tile_types": [ + "CMT_FIFO_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_FIFO_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_FIFO_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_FIFO_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_FIFO_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_FIFO_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_FIFO_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_FIFO_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_FIFO_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_FIFO_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_FIFO_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_FIFO_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_FIFO_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_FIFO_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_FIFO_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_FIFO_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_FIFO_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_FIFO_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_FIFO_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_FIFO_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_FIFO_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_FIFO_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_FIFO_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_FIFO_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_FIFO_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_FIFO_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_FIFO_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_FIFO_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_FIFO_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_FIFO_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_FIFO_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_FIFO_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_FIFO_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_FIFO_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "CMT_FIFO_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "CMT_FIFO_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "CMT_FIFO_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "CMT_FIFO_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "CMT_FIFO_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "CMT_FIFO_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "CMT_FIFO_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "CMT_FIFO_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "CMT_FIFO_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "CMT_FIFO_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "CMT_FIFO_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "CMT_FIFO_L_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_FIFO_L_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_FIFO_L_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_FIFO_L_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_FIFO_L_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_FIFO_L_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_FIFO_L_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_FIFO_L_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_FIFO_L_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_FIFO_L_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_FIFO_L_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_FIFO_L_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_FIFO_L_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_FIFO_L_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_FIFO_L_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_FIFO_L_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_FIFO_L_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_FIFO_L_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_FIFO_L_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_FIFO_L_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_FIFO_L_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_FIFO_L_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_FIFO_L_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_FIFO_L_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_FIFO_L_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_FIFO_L_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_FIFO_L_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_FIFO_L_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_FIFO_L_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_FIFO_L_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_FIFO_L_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_FIFO_L_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_FIFO_L_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_FIFO_L_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_FIFO_L_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_FIFO_L_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_FIFO_L_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_FIFO_L_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_FIFO_L_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_FIFO_L_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_FIFO_L_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_FIFO_L_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_FIFO_L_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_FIFO_L_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_FIFO_L_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_FIFO_L_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_FIFO_L_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_FIFO_L_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_FIFO_L_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_FIFO_L_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_FIFO_L_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_FIFO_L_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_FIFO_L_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_FIFO_L_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_FIFO_L_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_FIFO_L_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_FIFO_L_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_FIFO_L_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_FIFO_L_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_FIFO_L_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_FIFO_L_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_FIFO_L_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_FIFO_L_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_FIFO_L_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_FIFO_L_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_FIFO_L_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_FIFO_L_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_FIFO_L_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS0_0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS1_0", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS2_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS3_0", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS4_0", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS6_0", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS7_0", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS8_0", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS9_0", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS10_0", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS11_0", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS12_0", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS13_0", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS14_0", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS15_0", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS16_0", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS17_0", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS18_0", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS19_0", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS20_0", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS21_0", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS22_0", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_FIFO_L_LOGIC_OUTS23_0", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_FIFO_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "CMT_FIFO_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "CMT_FIFO_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_FIFO_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_FIFO_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_FIFO_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_FIFO_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_FIFO_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_FIFO_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_FIFO_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_FIFO_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_FIFO_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_FIFO_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_FIFO_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_FIFO_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_FIFO_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_FIFO_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_FIFO_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_FIFO_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_FIFO_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_FIFO_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_FIFO_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_FIFO_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_FIFO_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_FIFO_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_FIFO_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLKDIV_0", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "CMT_FIFO_PHASER_TO_IO_ICLK_0", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLK1X_0", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "CMT_FIFO_PHASER_TO_IO_OCLKDIV_0", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "CMT_FIFO_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_FIFO_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_FIFO_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_FIFO_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_FIFO_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_FIFO_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_FIFO_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_FIFO_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_FIFO_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_FIFO_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_FIFO_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_FIFO_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_FIFO_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_FIFO_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_FIFO_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_FIFO_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_FIFO_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_FIFO_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_FIFO_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_FIFO_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_FIFO_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_FIFO_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_FIFO_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_FIFO_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_FIFO_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_FIFO_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_FIFO_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_FIFO_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_FIFO_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_FIFO_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_FIFO_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_FIFO_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_FIFO_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_FIFO_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_FIFO_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_FIFO_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_FIFO_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_FIFO_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_FIFO_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_FIFO_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_FIFO_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_FIFO_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_FIFO_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_FIFO_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_FIFO_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_FIFO_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_FIFO_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_FIFO_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_FIFO_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_FIFO_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_FIFO_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_FIFO_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_FIFO_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_FIFO_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_FIFO_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_FIFO_WW4END3_0", + "INT_INTERFACE_WW4END3" + ], + [ + "FIFO_DQS_IOTOPHASER_66", + "L_INT_INTER_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + -8 + ], + "tile_types": [ + "CMT_PMV", + "CMT_TOP_R_LOWER_B" + ], + "wire_pairs": [ + [ + "CMT_PMV_BYP0", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_PMV_BYP1", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_PMV_BYP2", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_PMV_BYP3", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_PMV_BYP4", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_PMV_BYP5", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_PMV_BYP6", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_PMV_BYP7", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_PMV_CLK0", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_PMV_CLK1", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_PMV_CTRL0", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_PMV_CTRL1", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_PMV_EE2A0", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_PMV_EE2A1", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_PMV_EE2A2", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_PMV_EE2A3", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_PMV_EE2BEG0", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_PMV_EE2BEG1", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_PMV_EE2BEG2", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_PMV_EE2BEG3", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_PMV_EE4A0", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_PMV_EE4A1", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_PMV_EE4A2", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_PMV_EE4A3", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_PMV_EE4B0", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_PMV_EE4B1", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_PMV_EE4B2", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_PMV_EE4B3", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_PMV_EE4BEG0", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_PMV_EE4BEG1", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_PMV_EE4BEG2", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_PMV_EE4BEG3", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_PMV_EE4C0", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_PMV_EE4C1", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_PMV_EE4C2", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_PMV_EE4C3", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_PMV_EL1BEG0", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_PMV_EL1BEG1", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_PMV_EL1BEG2", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_PMV_EL1BEG3", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_PMV_ER1BEG0", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_PMV_ER1BEG1", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_PMV_ER1BEG2", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_PMV_ER1BEG3", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_PMV_FAN0", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_PMV_FAN1", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_PMV_FAN2", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_PMV_FAN3", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_PMV_FAN4", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_PMV_FAN5", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_PMV_FAN6", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_PMV_FAN7", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_PMV_IMUX0", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_PMV_IMUX1", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_PMV_IMUX2", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_PMV_IMUX3", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_PMV_IMUX4", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_PMV_IMUX5", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_PMV_IMUX6", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_PMV_IMUX7", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_PMV_IMUX8", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_PMV_IMUX9", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_PMV_IMUX10", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_PMV_IMUX11", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_PMV_IMUX12", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_PMV_IMUX13", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_PMV_IMUX14", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_PMV_IMUX15", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_PMV_IMUX16", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_PMV_IMUX17", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_PMV_IMUX18", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_PMV_IMUX19", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_PMV_IMUX20", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_PMV_IMUX21", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_PMV_IMUX22", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_PMV_IMUX23", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_PMV_IMUX24", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_PMV_IMUX25", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_PMV_IMUX26", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_PMV_IMUX27", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_PMV_IMUX28", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_PMV_IMUX29", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_PMV_IMUX30", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_PMV_IMUX31", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_PMV_IMUX32", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_PMV_IMUX33", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_PMV_IMUX34", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_PMV_IMUX35", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_PMV_IMUX36", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_PMV_IMUX37", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_PMV_IMUX38", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_PMV_IMUX39", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_PMV_IMUX40", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_PMV_IMUX41", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_PMV_IMUX42", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_PMV_IMUX43", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_PMV_IMUX44", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_PMV_IMUX45", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_PMV_IMUX46", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_PMV_IMUX47", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_PMV_LH1", + "CMT_TOP_LH1_0" + ], + [ + "CMT_PMV_LH2", + "CMT_TOP_LH2_0" + ], + [ + "CMT_PMV_LH3", + "CMT_TOP_LH3_0" + ], + [ + "CMT_PMV_LH4", + "CMT_TOP_LH4_0" + ], + [ + "CMT_PMV_LH5", + "CMT_TOP_LH5_0" + ], + [ + "CMT_PMV_LH6", + "CMT_TOP_LH6_0" + ], + [ + "CMT_PMV_LH7", + "CMT_TOP_LH7_0" + ], + [ + "CMT_PMV_LH8", + "CMT_TOP_LH8_0" + ], + [ + "CMT_PMV_LH9", + "CMT_TOP_LH9_0" + ], + [ + "CMT_PMV_LH10", + "CMT_TOP_LH10_0" + ], + [ + "CMT_PMV_LH11", + "CMT_TOP_LH11_0" + ], + [ + "CMT_PMV_LH12", + "CMT_TOP_LH12_0" + ], + [ + "CMT_PMV_LOGIC_OUTS0", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_PMV_LOGIC_OUTS2", + "CMT_TOP_LOGIC_OUTS_L_B2_0" + ], + [ + "CMT_PMV_LOGIC_OUTS5", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_PMV_LOGIC_OUTS7", + "CMT_TOP_LOGIC_OUTS_L_B7_0" + ], + [ + "CMT_PMV_LOGIC_OUTS8", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_PMV_LOGIC_OUTS10", + "CMT_TOP_LOGIC_OUTS_L_B10_0" + ], + [ + "CMT_PMV_LOGIC_OUTS13", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_PMV_LOGIC_OUTS15", + "CMT_TOP_LOGIC_OUTS_L_B15_0" + ], + [ + "CMT_PMV_LOGIC_OUTS16", + "CMT_TOP_LOGIC_OUTS_L_B16_0" + ], + [ + "CMT_PMV_LOGIC_OUTS17", + "CMT_TOP_LOGIC_OUTS_L_B17_0" + ], + [ + "CMT_PMV_LOGIC_OUTS18", + "CMT_TOP_LOGIC_OUTS_L_B18_0" + ], + [ + "CMT_PMV_LOGIC_OUTS19", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_PMV_LOGIC_OUTS20", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_PMV_LOGIC_OUTS21", + "CMT_TOP_LOGIC_OUTS_L_B21_0" + ], + [ + "CMT_PMV_LOGIC_OUTS22", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_PMV_LOGIC_OUTS23", + "CMT_TOP_LOGIC_OUTS_L_B23_0" + ], + [ + "CMT_PMV_NE2A0", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_PMV_NE2A1", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_PMV_NE2A2", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_PMV_NE2A3", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_PMV_NE4BEG0", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_PMV_NE4BEG1", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_PMV_NE4BEG2", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_PMV_NE4BEG3", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_PMV_NE4C0", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_PMV_NE4C1", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_PMV_NE4C2", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_PMV_NE4C3", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_PMV_NW2A0", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_PMV_NW2A1", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_PMV_NW2A2", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_PMV_NW2A3", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_PMV_NW4A0", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_PMV_NW4A1", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_PMV_NW4A2", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_PMV_NW4A3", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_PMV_NW4END0", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_PMV_NW4END1", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_PMV_NW4END2", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_PMV_NW4END3", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_PMV_SE2A0", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_PMV_SE2A1", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_PMV_SE2A2", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_PMV_SE2A3", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_PMV_SE4BEG0", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_PMV_SE4BEG1", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_PMV_SE4BEG2", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_PMV_SE4BEG3", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_PMV_SE4C0", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_PMV_SE4C1", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_PMV_SE4C2", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_PMV_SE4C3", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_PMV_SW2A0", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_PMV_SW2A1", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_PMV_SW2A2", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_PMV_SW2A3", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_PMV_SW4A0", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_PMV_SW4A1", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_PMV_SW4A2", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_PMV_SW4A3", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_PMV_SW4END0", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_PMV_SW4END1", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_PMV_SW4END2", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_PMV_SW4END3", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_PMV_WL1END0", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_PMV_WL1END1", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_PMV_WL1END2", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_PMV_WL1END3", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_PMV_WR1END0", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_PMV_WR1END1", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_PMV_WR1END2", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_PMV_WR1END3", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_PMV_WW2A0", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_PMV_WW2A1", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_PMV_WW2A2", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_PMV_WW2A3", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_PMV_WW2END0", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_PMV_WW2END1", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_PMV_WW2END2", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_PMV_WW2END3", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_PMV_WW4A0", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_PMV_WW4A1", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_PMV_WW4A2", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_PMV_WW4A3", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_PMV_WW4B0", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_PMV_WW4B1", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_PMV_WW4B2", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_PMV_WW4B3", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_PMV_WW4C0", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_PMV_WW4C1", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_PMV_WW4C2", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_PMV_WW4C3", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_PMV_WW4END0", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_PMV_WW4END1", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_PMV_WW4END2", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_PMV_WW4END3", + "CMT_TOP_WW4END3_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLK", + "CMT_TOP_ICLK_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLKDIV", + "CMT_TOP_ICLKDIV_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLK", + "CMT_TOP_OCLK_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLKDIV", + "CMT_TOP_OCLKDIV_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 7 + ], + "tile_types": [ + "CMT_PMV", + "CMT_TOP_R_UPPER_T" + ], + "wire_pairs": [ + [ + "CMT_PMV_BYP0", + "CMT_TOP_BYP0_12" + ], + [ + "CMT_PMV_BYP1", + "CMT_TOP_BYP1_12" + ], + [ + "CMT_PMV_BYP2", + "CMT_TOP_BYP2_12" + ], + [ + "CMT_PMV_BYP3", + "CMT_TOP_BYP3_12" + ], + [ + "CMT_PMV_BYP4", + "CMT_TOP_BYP4_12" + ], + [ + "CMT_PMV_BYP5", + "CMT_TOP_BYP5_12" + ], + [ + "CMT_PMV_BYP6", + "CMT_TOP_BYP6_12" + ], + [ + "CMT_PMV_BYP7", + "CMT_TOP_BYP7_12" + ], + [ + "CMT_PMV_CLK0", + "CMT_TOP_CLK0_12" + ], + [ + "CMT_PMV_CLK1", + "CMT_TOP_CLK1_12" + ], + [ + "CMT_PMV_CTRL0", + "CMT_TOP_CTRL0_12" + ], + [ + "CMT_PMV_CTRL1", + "CMT_TOP_CTRL1_12" + ], + [ + "CMT_PMV_EE2A0", + "CMT_TOP_EE2A0_12" + ], + [ + "CMT_PMV_EE2A1", + "CMT_TOP_EE2A1_12" + ], + [ + "CMT_PMV_EE2A2", + "CMT_TOP_EE2A2_12" + ], + [ + "CMT_PMV_EE2A3", + "CMT_TOP_EE2A3_12" + ], + [ + "CMT_PMV_EE2BEG0", + "CMT_TOP_EE2BEG0_12" + ], + [ + "CMT_PMV_EE2BEG1", + "CMT_TOP_EE2BEG1_12" + ], + [ + "CMT_PMV_EE2BEG2", + "CMT_TOP_EE2BEG2_12" + ], + [ + "CMT_PMV_EE2BEG3", + "CMT_TOP_EE2BEG3_12" + ], + [ + "CMT_PMV_EE4A0", + "CMT_TOP_EE4A0_12" + ], + [ + "CMT_PMV_EE4A1", + "CMT_TOP_EE4A1_12" + ], + [ + "CMT_PMV_EE4A2", + "CMT_TOP_EE4A2_12" + ], + [ + "CMT_PMV_EE4A3", + "CMT_TOP_EE4A3_12" + ], + [ + "CMT_PMV_EE4B0", + "CMT_TOP_EE4B0_12" + ], + [ + "CMT_PMV_EE4B1", + "CMT_TOP_EE4B1_12" + ], + [ + "CMT_PMV_EE4B2", + "CMT_TOP_EE4B2_12" + ], + [ + "CMT_PMV_EE4B3", + "CMT_TOP_EE4B3_12" + ], + [ + "CMT_PMV_EE4BEG0", + "CMT_TOP_EE4BEG0_12" + ], + [ + "CMT_PMV_EE4BEG1", + "CMT_TOP_EE4BEG1_12" + ], + [ + "CMT_PMV_EE4BEG2", + "CMT_TOP_EE4BEG2_12" + ], + [ + "CMT_PMV_EE4BEG3", + "CMT_TOP_EE4BEG3_12" + ], + [ + "CMT_PMV_EE4C0", + "CMT_TOP_EE4C0_12" + ], + [ + "CMT_PMV_EE4C1", + "CMT_TOP_EE4C1_12" + ], + [ + "CMT_PMV_EE4C2", + "CMT_TOP_EE4C2_12" + ], + [ + "CMT_PMV_EE4C3", + "CMT_TOP_EE4C3_12" + ], + [ + "CMT_PMV_EL1BEG0", + "CMT_TOP_EL1BEG0_12" + ], + [ + "CMT_PMV_EL1BEG1", + "CMT_TOP_EL1BEG1_12" + ], + [ + "CMT_PMV_EL1BEG2", + "CMT_TOP_EL1BEG2_12" + ], + [ + "CMT_PMV_EL1BEG3", + "CMT_TOP_EL1BEG3_12" + ], + [ + "CMT_PMV_ER1BEG0", + "CMT_TOP_ER1BEG0_12" + ], + [ + "CMT_PMV_ER1BEG1", + "CMT_TOP_ER1BEG1_12" + ], + [ + "CMT_PMV_ER1BEG2", + "CMT_TOP_ER1BEG2_12" + ], + [ + "CMT_PMV_ER1BEG3", + "CMT_TOP_ER1BEG3_12" + ], + [ + "CMT_PMV_FAN0", + "CMT_TOP_FAN0_12" + ], + [ + "CMT_PMV_FAN1", + "CMT_TOP_FAN1_12" + ], + [ + "CMT_PMV_FAN2", + "CMT_TOP_FAN2_12" + ], + [ + "CMT_PMV_FAN3", + "CMT_TOP_FAN3_12" + ], + [ + "CMT_PMV_FAN4", + "CMT_TOP_FAN4_12" + ], + [ + "CMT_PMV_FAN5", + "CMT_TOP_FAN5_12" + ], + [ + "CMT_PMV_FAN6", + "CMT_TOP_FAN6_12" + ], + [ + "CMT_PMV_FAN7", + "CMT_TOP_FAN7_12" + ], + [ + "CMT_PMV_IMUX0", + "CMT_TOP_IMUX0_12" + ], + [ + "CMT_PMV_IMUX1", + "CMT_TOP_IMUX1_12" + ], + [ + "CMT_PMV_IMUX2", + "CMT_TOP_IMUX2_12" + ], + [ + "CMT_PMV_IMUX3", + "CMT_TOP_IMUX3_12" + ], + [ + "CMT_PMV_IMUX4", + "CMT_TOP_IMUX4_12" + ], + [ + "CMT_PMV_IMUX5", + "CMT_TOP_IMUX5_12" + ], + [ + "CMT_PMV_IMUX6", + "CMT_TOP_IMUX6_12" + ], + [ + "CMT_PMV_IMUX7", + "CMT_TOP_IMUX7_12" + ], + [ + "CMT_PMV_IMUX8", + "CMT_TOP_IMUX8_12" + ], + [ + "CMT_PMV_IMUX9", + "CMT_TOP_IMUX9_12" + ], + [ + "CMT_PMV_IMUX10", + "CMT_TOP_IMUX10_12" + ], + [ + "CMT_PMV_IMUX11", + "CMT_TOP_IMUX11_12" + ], + [ + "CMT_PMV_IMUX12", + "CMT_TOP_IMUX12_12" + ], + [ + "CMT_PMV_IMUX13", + "CMT_TOP_IMUX13_12" + ], + [ + "CMT_PMV_IMUX14", + "CMT_TOP_IMUX14_12" + ], + [ + "CMT_PMV_IMUX15", + "CMT_TOP_IMUX15_12" + ], + [ + "CMT_PMV_IMUX16", + "CMT_TOP_IMUX16_12" + ], + [ + "CMT_PMV_IMUX17", + "CMT_TOP_IMUX17_12" + ], + [ + "CMT_PMV_IMUX18", + "CMT_TOP_IMUX18_12" + ], + [ + "CMT_PMV_IMUX19", + "CMT_TOP_IMUX19_12" + ], + [ + "CMT_PMV_IMUX20", + "CMT_TOP_IMUX20_12" + ], + [ + "CMT_PMV_IMUX21", + "CMT_TOP_IMUX21_12" + ], + [ + "CMT_PMV_IMUX22", + "CMT_TOP_IMUX22_12" + ], + [ + "CMT_PMV_IMUX23", + "CMT_TOP_IMUX23_12" + ], + [ + "CMT_PMV_IMUX24", + "CMT_TOP_IMUX24_12" + ], + [ + "CMT_PMV_IMUX25", + "CMT_TOP_IMUX25_12" + ], + [ + "CMT_PMV_IMUX26", + "CMT_TOP_IMUX26_12" + ], + [ + "CMT_PMV_IMUX27", + "CMT_TOP_IMUX27_12" + ], + [ + "CMT_PMV_IMUX28", + "CMT_TOP_IMUX28_12" + ], + [ + "CMT_PMV_IMUX29", + "CMT_TOP_IMUX29_12" + ], + [ + "CMT_PMV_IMUX30", + "CMT_TOP_IMUX30_12" + ], + [ + "CMT_PMV_IMUX31", + "CMT_TOP_IMUX31_12" + ], + [ + "CMT_PMV_IMUX32", + "CMT_TOP_IMUX32_12" + ], + [ + "CMT_PMV_IMUX33", + "CMT_TOP_IMUX33_12" + ], + [ + "CMT_PMV_IMUX34", + "CMT_TOP_IMUX34_12" + ], + [ + "CMT_PMV_IMUX35", + "CMT_TOP_IMUX35_12" + ], + [ + "CMT_PMV_IMUX36", + "CMT_TOP_IMUX36_12" + ], + [ + "CMT_PMV_IMUX37", + "CMT_TOP_IMUX37_12" + ], + [ + "CMT_PMV_IMUX38", + "CMT_TOP_IMUX38_12" + ], + [ + "CMT_PMV_IMUX39", + "CMT_TOP_IMUX39_12" + ], + [ + "CMT_PMV_IMUX40", + "CMT_TOP_IMUX40_12" + ], + [ + "CMT_PMV_IMUX41", + "CMT_TOP_IMUX41_12" + ], + [ + "CMT_PMV_IMUX42", + "CMT_TOP_IMUX42_12" + ], + [ + "CMT_PMV_IMUX43", + "CMT_TOP_IMUX43_12" + ], + [ + "CMT_PMV_IMUX44", + "CMT_TOP_IMUX44_12" + ], + [ + "CMT_PMV_IMUX45", + "CMT_TOP_IMUX45_12" + ], + [ + "CMT_PMV_IMUX46", + "CMT_TOP_IMUX46_12" + ], + [ + "CMT_PMV_IMUX47", + "CMT_TOP_IMUX47_12" + ], + [ + "CMT_PMV_LH1", + "CMT_TOP_LH1_12" + ], + [ + "CMT_PMV_LH2", + "CMT_TOP_LH2_12" + ], + [ + "CMT_PMV_LH3", + "CMT_TOP_LH3_12" + ], + [ + "CMT_PMV_LH4", + "CMT_TOP_LH4_12" + ], + [ + "CMT_PMV_LH5", + "CMT_TOP_LH5_12" + ], + [ + "CMT_PMV_LH6", + "CMT_TOP_LH6_12" + ], + [ + "CMT_PMV_LH7", + "CMT_TOP_LH7_12" + ], + [ + "CMT_PMV_LH8", + "CMT_TOP_LH8_12" + ], + [ + "CMT_PMV_LH9", + "CMT_TOP_LH9_12" + ], + [ + "CMT_PMV_LH10", + "CMT_TOP_LH10_12" + ], + [ + "CMT_PMV_LH11", + "CMT_TOP_LH11_12" + ], + [ + "CMT_PMV_LH12", + "CMT_TOP_LH12_12" + ], + [ + "CMT_PMV_LOGIC_OUTS0", + "CMT_TOP_LOGIC_OUTS_L_B0_12" + ], + [ + "CMT_PMV_LOGIC_OUTS2", + "CMT_TOP_LOGIC_OUTS_L_B2_12" + ], + [ + "CMT_PMV_LOGIC_OUTS5", + "CMT_TOP_LOGIC_OUTS_L_B5_12" + ], + [ + "CMT_PMV_LOGIC_OUTS7", + "CMT_TOP_LOGIC_OUTS_L_B7_12" + ], + [ + "CMT_PMV_LOGIC_OUTS8", + "CMT_TOP_LOGIC_OUTS_L_B8_12" + ], + [ + "CMT_PMV_LOGIC_OUTS10", + "CMT_TOP_LOGIC_OUTS_L_B10_12" + ], + [ + "CMT_PMV_LOGIC_OUTS13", + "CMT_TOP_LOGIC_OUTS_L_B13_12" + ], + [ + "CMT_PMV_LOGIC_OUTS15", + "CMT_TOP_LOGIC_OUTS_L_B15_12" + ], + [ + "CMT_PMV_LOGIC_OUTS16", + "CMT_TOP_LOGIC_OUTS_L_B16_12" + ], + [ + "CMT_PMV_LOGIC_OUTS17", + "CMT_TOP_LOGIC_OUTS_L_B17_12" + ], + [ + "CMT_PMV_LOGIC_OUTS18", + "CMT_TOP_LOGIC_OUTS_L_B18_12" + ], + [ + "CMT_PMV_LOGIC_OUTS19", + "CMT_TOP_LOGIC_OUTS_L_B19_12" + ], + [ + "CMT_PMV_LOGIC_OUTS20", + "CMT_TOP_LOGIC_OUTS_L_B20_12" + ], + [ + "CMT_PMV_LOGIC_OUTS21", + "CMT_TOP_LOGIC_OUTS_L_B21_12" + ], + [ + "CMT_PMV_LOGIC_OUTS22", + "CMT_TOP_LOGIC_OUTS_L_B22_12" + ], + [ + "CMT_PMV_LOGIC_OUTS23", + "CMT_TOP_LOGIC_OUTS_L_B23_12" + ], + [ + "CMT_PMV_NE2A0", + "CMT_TOP_NE2A0_12" + ], + [ + "CMT_PMV_NE2A1", + "CMT_TOP_NE2A1_12" + ], + [ + "CMT_PMV_NE2A2", + "CMT_TOP_NE2A2_12" + ], + [ + "CMT_PMV_NE2A3", + "CMT_TOP_NE2A3_12" + ], + [ + "CMT_PMV_NE4BEG0", + "CMT_TOP_NE4BEG0_12" + ], + [ + "CMT_PMV_NE4BEG1", + "CMT_TOP_NE4BEG1_12" + ], + [ + "CMT_PMV_NE4BEG2", + "CMT_TOP_NE4BEG2_12" + ], + [ + "CMT_PMV_NE4BEG3", + "CMT_TOP_NE4BEG3_12" + ], + [ + "CMT_PMV_NE4C0", + "CMT_TOP_NE4C0_12" + ], + [ + "CMT_PMV_NE4C1", + "CMT_TOP_NE4C1_12" + ], + [ + "CMT_PMV_NE4C2", + "CMT_TOP_NE4C2_12" + ], + [ + "CMT_PMV_NE4C3", + "CMT_TOP_NE4C3_12" + ], + [ + "CMT_PMV_NW2A0", + "CMT_TOP_NW2A0_12" + ], + [ + "CMT_PMV_NW2A1", + "CMT_TOP_NW2A1_12" + ], + [ + "CMT_PMV_NW2A2", + "CMT_TOP_NW2A2_12" + ], + [ + "CMT_PMV_NW2A3", + "CMT_TOP_NW2A3_12" + ], + [ + "CMT_PMV_NW4A0", + "CMT_TOP_NW4A0_12" + ], + [ + "CMT_PMV_NW4A1", + "CMT_TOP_NW4A1_12" + ], + [ + "CMT_PMV_NW4A2", + "CMT_TOP_NW4A2_12" + ], + [ + "CMT_PMV_NW4A3", + "CMT_TOP_NW4A3_12" + ], + [ + "CMT_PMV_NW4END0", + "CMT_TOP_NW4END0_12" + ], + [ + "CMT_PMV_NW4END1", + "CMT_TOP_NW4END1_12" + ], + [ + "CMT_PMV_NW4END2", + "CMT_TOP_NW4END2_12" + ], + [ + "CMT_PMV_NW4END3", + "CMT_TOP_NW4END3_12" + ], + [ + "CMT_PMV_SE2A0", + "CMT_TOP_SE2A0_12" + ], + [ + "CMT_PMV_SE2A1", + "CMT_TOP_SE2A1_12" + ], + [ + "CMT_PMV_SE2A2", + "CMT_TOP_SE2A2_12" + ], + [ + "CMT_PMV_SE2A3", + "CMT_TOP_SE2A3_12" + ], + [ + "CMT_PMV_SE4BEG0", + "CMT_TOP_SE4BEG0_12" + ], + [ + "CMT_PMV_SE4BEG1", + "CMT_TOP_SE4BEG1_12" + ], + [ + "CMT_PMV_SE4BEG2", + "CMT_TOP_SE4BEG2_12" + ], + [ + "CMT_PMV_SE4BEG3", + "CMT_TOP_SE4BEG3_12" + ], + [ + "CMT_PMV_SE4C0", + "CMT_TOP_SE4C0_12" + ], + [ + "CMT_PMV_SE4C1", + "CMT_TOP_SE4C1_12" + ], + [ + "CMT_PMV_SE4C2", + "CMT_TOP_SE4C2_12" + ], + [ + "CMT_PMV_SE4C3", + "CMT_TOP_SE4C3_12" + ], + [ + "CMT_PMV_SW2A0", + "CMT_TOP_SW2A0_12" + ], + [ + "CMT_PMV_SW2A1", + "CMT_TOP_SW2A1_12" + ], + [ + "CMT_PMV_SW2A2", + "CMT_TOP_SW2A2_12" + ], + [ + "CMT_PMV_SW2A3", + "CMT_TOP_SW2A3_12" + ], + [ + "CMT_PMV_SW4A0", + "CMT_TOP_SW4A0_12" + ], + [ + "CMT_PMV_SW4A1", + "CMT_TOP_SW4A1_12" + ], + [ + "CMT_PMV_SW4A2", + "CMT_TOP_SW4A2_12" + ], + [ + "CMT_PMV_SW4A3", + "CMT_TOP_SW4A3_12" + ], + [ + "CMT_PMV_SW4END0", + "CMT_TOP_SW4END0_12" + ], + [ + "CMT_PMV_SW4END1", + "CMT_TOP_SW4END1_12" + ], + [ + "CMT_PMV_SW4END2", + "CMT_TOP_SW4END2_12" + ], + [ + "CMT_PMV_SW4END3", + "CMT_TOP_SW4END3_12" + ], + [ + "CMT_PMV_WL1END0", + "CMT_TOP_WL1END0_12" + ], + [ + "CMT_PMV_WL1END1", + "CMT_TOP_WL1END1_12" + ], + [ + "CMT_PMV_WL1END2", + "CMT_TOP_WL1END2_12" + ], + [ + "CMT_PMV_WL1END3", + "CMT_TOP_WL1END3_12" + ], + [ + "CMT_PMV_WR1END0", + "CMT_TOP_WR1END0_12" + ], + [ + "CMT_PMV_WR1END1", + "CMT_TOP_WR1END1_12" + ], + [ + "CMT_PMV_WR1END2", + "CMT_TOP_WR1END2_12" + ], + [ + "CMT_PMV_WR1END3", + "CMT_TOP_WR1END3_12" + ], + [ + "CMT_PMV_WW2A0", + "CMT_TOP_WW2A0_12" + ], + [ + "CMT_PMV_WW2A1", + "CMT_TOP_WW2A1_12" + ], + [ + "CMT_PMV_WW2A2", + "CMT_TOP_WW2A2_12" + ], + [ + "CMT_PMV_WW2A3", + "CMT_TOP_WW2A3_12" + ], + [ + "CMT_PMV_WW2END0", + "CMT_TOP_WW2END0_12" + ], + [ + "CMT_PMV_WW2END1", + "CMT_TOP_WW2END1_12" + ], + [ + "CMT_PMV_WW2END2", + "CMT_TOP_WW2END2_12" + ], + [ + "CMT_PMV_WW2END3", + "CMT_TOP_WW2END3_12" + ], + [ + "CMT_PMV_WW4A0", + "CMT_TOP_WW4A0_12" + ], + [ + "CMT_PMV_WW4A1", + "CMT_TOP_WW4A1_12" + ], + [ + "CMT_PMV_WW4A2", + "CMT_TOP_WW4A2_12" + ], + [ + "CMT_PMV_WW4A3", + "CMT_TOP_WW4A3_12" + ], + [ + "CMT_PMV_WW4B0", + "CMT_TOP_WW4B0_12" + ], + [ + "CMT_PMV_WW4B1", + "CMT_TOP_WW4B1_12" + ], + [ + "CMT_PMV_WW4B2", + "CMT_TOP_WW4B2_12" + ], + [ + "CMT_PMV_WW4B3", + "CMT_TOP_WW4B3_12" + ], + [ + "CMT_PMV_WW4C0", + "CMT_TOP_WW4C0_12" + ], + [ + "CMT_PMV_WW4C1", + "CMT_TOP_WW4C1_12" + ], + [ + "CMT_PMV_WW4C2", + "CMT_TOP_WW4C2_12" + ], + [ + "CMT_PMV_WW4C3", + "CMT_TOP_WW4C3_12" + ], + [ + "CMT_PMV_WW4END0", + "CMT_TOP_WW4END0_12" + ], + [ + "CMT_PMV_WW4END1", + "CMT_TOP_WW4END1_12" + ], + [ + "CMT_PMV_WW4END2", + "CMT_TOP_WW4END2_12" + ], + [ + "CMT_PMV_WW4END3", + "CMT_TOP_WW4END3_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLK", + "CMT_TOP_ICLK_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLKDIV", + "CMT_TOP_ICLKDIV_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLK", + "CMT_TOP_OCLK_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLKDIV", + "CMT_TOP_OCLKDIV_12" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CMT_PMV", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "CMT_PMV_BYP0", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_PMV_BYP1", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_PMV_BYP2", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_PMV_BYP3", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_PMV_BYP4", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_PMV_BYP5", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_PMV_BYP6", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_PMV_BYP7", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_PMV_CLK0", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_PMV_CLK1", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_PMV_CTRL0", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_PMV_CTRL1", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_PMV_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_PMV_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_PMV_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_PMV_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_PMV_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_PMV_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_PMV_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_PMV_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_PMV_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_PMV_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_PMV_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_PMV_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_PMV_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_PMV_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_PMV_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_PMV_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_PMV_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_PMV_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_PMV_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_PMV_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_PMV_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_PMV_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_PMV_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_PMV_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_PMV_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_PMV_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_PMV_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_PMV_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_PMV_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_PMV_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_PMV_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_PMV_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_PMV_FAN0", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_PMV_FAN1", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_PMV_FAN2", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_PMV_FAN3", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_PMV_FAN4", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_PMV_FAN5", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_PMV_FAN6", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_PMV_FAN7", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_PMV_IMUX0", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_PMV_IMUX1", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_PMV_IMUX2", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_PMV_IMUX3", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_PMV_IMUX4", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_PMV_IMUX5", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_PMV_IMUX6", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_PMV_IMUX7", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_PMV_IMUX8", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_PMV_IMUX9", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_PMV_IMUX10", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_PMV_IMUX11", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_PMV_IMUX12", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_PMV_IMUX13", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_PMV_IMUX14", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_PMV_IMUX15", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_PMV_IMUX16", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_PMV_IMUX17", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_PMV_IMUX18", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_PMV_IMUX19", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_PMV_IMUX20", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_PMV_IMUX21", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_PMV_IMUX22", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_PMV_IMUX23", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_PMV_IMUX24", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_PMV_IMUX25", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_PMV_IMUX26", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_PMV_IMUX27", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_PMV_IMUX28", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_PMV_IMUX29", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_PMV_IMUX30", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_PMV_IMUX31", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_PMV_IMUX32", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_PMV_IMUX33", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_PMV_IMUX34", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_PMV_IMUX35", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_PMV_IMUX36", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_PMV_IMUX37", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_PMV_IMUX38", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_PMV_IMUX39", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_PMV_IMUX40", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_PMV_IMUX41", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_PMV_IMUX42", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_PMV_IMUX43", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_PMV_IMUX44", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_PMV_IMUX45", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_PMV_IMUX46", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_PMV_IMUX47", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_PMV_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CMT_PMV_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CMT_PMV_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CMT_PMV_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CMT_PMV_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CMT_PMV_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CMT_PMV_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CMT_PMV_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CMT_PMV_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CMT_PMV_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CMT_PMV_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CMT_PMV_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CMT_PMV_LOGIC_OUTS0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "CMT_PMV_LOGIC_OUTS2", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "CMT_PMV_LOGIC_OUTS5", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "CMT_PMV_LOGIC_OUTS7", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "CMT_PMV_LOGIC_OUTS8", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "CMT_PMV_LOGIC_OUTS10", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "CMT_PMV_LOGIC_OUTS13", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "CMT_PMV_LOGIC_OUTS15", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "CMT_PMV_LOGIC_OUTS16", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "CMT_PMV_LOGIC_OUTS17", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "CMT_PMV_LOGIC_OUTS18", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "CMT_PMV_LOGIC_OUTS19", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "CMT_PMV_LOGIC_OUTS20", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "CMT_PMV_LOGIC_OUTS21", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "CMT_PMV_LOGIC_OUTS22", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "CMT_PMV_LOGIC_OUTS23", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "CMT_PMV_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_PMV_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_PMV_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_PMV_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_PMV_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_PMV_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_PMV_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_PMV_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_PMV_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_PMV_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_PMV_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_PMV_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_PMV_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_PMV_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_PMV_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_PMV_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_PMV_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_PMV_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_PMV_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_PMV_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_PMV_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_PMV_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_PMV_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_PMV_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_PMV_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_PMV_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_PMV_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_PMV_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_PMV_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_PMV_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_PMV_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_PMV_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_PMV_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_PMV_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_PMV_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_PMV_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_PMV_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_PMV_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_PMV_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_PMV_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_PMV_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_PMV_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_PMV_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_PMV_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_PMV_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_PMV_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_PMV_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_PMV_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_PMV_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_PMV_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_PMV_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_PMV_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_PMV_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_PMV_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_PMV_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_PMV_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_PMV_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_PMV_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_PMV_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_PMV_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_PMV_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_PMV_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_PMV_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_PMV_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_PMV_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_PMV_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_PMV_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_PMV_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_PMV_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_PMV_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_PMV_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_PMV_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_PMV_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_PMV_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_PMV_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_PMV_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_PMV_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_PMV_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_PMV_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_PMV_WW4END3", + "INT_INTERFACE_WW4END3" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLK", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLKDIV", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLK", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLKDIV", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ] + ] + }, + { + "grid_deltas": [ + -1, + -8 + ], + "tile_types": [ + "CMT_PMV_L", + "CMT_TOP_L_LOWER_B" + ], + "wire_pairs": [ + [ + "CMT_PMV_BYP0", + "CMT_TOP_BYP0_0" + ], + [ + "CMT_PMV_BYP1", + "CMT_TOP_BYP1_0" + ], + [ + "CMT_PMV_BYP2", + "CMT_TOP_BYP2_0" + ], + [ + "CMT_PMV_BYP3", + "CMT_TOP_BYP3_0" + ], + [ + "CMT_PMV_BYP4", + "CMT_TOP_BYP4_0" + ], + [ + "CMT_PMV_BYP5", + "CMT_TOP_BYP5_0" + ], + [ + "CMT_PMV_BYP6", + "CMT_TOP_BYP6_0" + ], + [ + "CMT_PMV_BYP7", + "CMT_TOP_BYP7_0" + ], + [ + "CMT_PMV_CLK0", + "CMT_TOP_CLK0_0" + ], + [ + "CMT_PMV_CLK1", + "CMT_TOP_CLK1_0" + ], + [ + "CMT_PMV_CTRL0", + "CMT_TOP_CTRL0_0" + ], + [ + "CMT_PMV_CTRL1", + "CMT_TOP_CTRL1_0" + ], + [ + "CMT_PMV_EE2A0", + "CMT_TOP_EE2A0_0" + ], + [ + "CMT_PMV_EE2A1", + "CMT_TOP_EE2A1_0" + ], + [ + "CMT_PMV_EE2A2", + "CMT_TOP_EE2A2_0" + ], + [ + "CMT_PMV_EE2A3", + "CMT_TOP_EE2A3_0" + ], + [ + "CMT_PMV_EE2BEG0", + "CMT_TOP_EE2BEG0_0" + ], + [ + "CMT_PMV_EE2BEG1", + "CMT_TOP_EE2BEG1_0" + ], + [ + "CMT_PMV_EE2BEG2", + "CMT_TOP_EE2BEG2_0" + ], + [ + "CMT_PMV_EE2BEG3", + "CMT_TOP_EE2BEG3_0" + ], + [ + "CMT_PMV_EE4A0", + "CMT_TOP_EE4A0_0" + ], + [ + "CMT_PMV_EE4A1", + "CMT_TOP_EE4A1_0" + ], + [ + "CMT_PMV_EE4A2", + "CMT_TOP_EE4A2_0" + ], + [ + "CMT_PMV_EE4A3", + "CMT_TOP_EE4A3_0" + ], + [ + "CMT_PMV_EE4B0", + "CMT_TOP_EE4B0_0" + ], + [ + "CMT_PMV_EE4B1", + "CMT_TOP_EE4B1_0" + ], + [ + "CMT_PMV_EE4B2", + "CMT_TOP_EE4B2_0" + ], + [ + "CMT_PMV_EE4B3", + "CMT_TOP_EE4B3_0" + ], + [ + "CMT_PMV_EE4BEG0", + "CMT_TOP_EE4BEG0_0" + ], + [ + "CMT_PMV_EE4BEG1", + "CMT_TOP_EE4BEG1_0" + ], + [ + "CMT_PMV_EE4BEG2", + "CMT_TOP_EE4BEG2_0" + ], + [ + "CMT_PMV_EE4BEG3", + "CMT_TOP_EE4BEG3_0" + ], + [ + "CMT_PMV_EE4C0", + "CMT_TOP_EE4C0_0" + ], + [ + "CMT_PMV_EE4C1", + "CMT_TOP_EE4C1_0" + ], + [ + "CMT_PMV_EE4C2", + "CMT_TOP_EE4C2_0" + ], + [ + "CMT_PMV_EE4C3", + "CMT_TOP_EE4C3_0" + ], + [ + "CMT_PMV_EL1BEG0", + "CMT_TOP_EL1BEG0_0" + ], + [ + "CMT_PMV_EL1BEG1", + "CMT_TOP_EL1BEG1_0" + ], + [ + "CMT_PMV_EL1BEG2", + "CMT_TOP_EL1BEG2_0" + ], + [ + "CMT_PMV_EL1BEG3", + "CMT_TOP_EL1BEG3_0" + ], + [ + "CMT_PMV_ER1BEG0", + "CMT_TOP_ER1BEG0_0" + ], + [ + "CMT_PMV_ER1BEG1", + "CMT_TOP_ER1BEG1_0" + ], + [ + "CMT_PMV_ER1BEG2", + "CMT_TOP_ER1BEG2_0" + ], + [ + "CMT_PMV_ER1BEG3", + "CMT_TOP_ER1BEG3_0" + ], + [ + "CMT_PMV_FAN0", + "CMT_TOP_FAN0_0" + ], + [ + "CMT_PMV_FAN1", + "CMT_TOP_FAN1_0" + ], + [ + "CMT_PMV_FAN2", + "CMT_TOP_FAN2_0" + ], + [ + "CMT_PMV_FAN3", + "CMT_TOP_FAN3_0" + ], + [ + "CMT_PMV_FAN4", + "CMT_TOP_FAN4_0" + ], + [ + "CMT_PMV_FAN5", + "CMT_TOP_FAN5_0" + ], + [ + "CMT_PMV_FAN6", + "CMT_TOP_FAN6_0" + ], + [ + "CMT_PMV_FAN7", + "CMT_TOP_FAN7_0" + ], + [ + "CMT_PMV_IMUX0", + "CMT_TOP_IMUX0_0" + ], + [ + "CMT_PMV_IMUX1", + "CMT_TOP_IMUX1_0" + ], + [ + "CMT_PMV_IMUX2", + "CMT_TOP_IMUX2_0" + ], + [ + "CMT_PMV_IMUX3", + "CMT_TOP_IMUX3_0" + ], + [ + "CMT_PMV_IMUX4", + "CMT_TOP_IMUX4_0" + ], + [ + "CMT_PMV_IMUX5", + "CMT_TOP_IMUX5_0" + ], + [ + "CMT_PMV_IMUX6", + "CMT_TOP_IMUX6_0" + ], + [ + "CMT_PMV_IMUX7", + "CMT_TOP_IMUX7_0" + ], + [ + "CMT_PMV_IMUX8", + "CMT_TOP_IMUX8_0" + ], + [ + "CMT_PMV_IMUX9", + "CMT_TOP_IMUX9_0" + ], + [ + "CMT_PMV_IMUX10", + "CMT_TOP_IMUX10_0" + ], + [ + "CMT_PMV_IMUX11", + "CMT_TOP_IMUX11_0" + ], + [ + "CMT_PMV_IMUX12", + "CMT_TOP_IMUX12_0" + ], + [ + "CMT_PMV_IMUX13", + "CMT_TOP_IMUX13_0" + ], + [ + "CMT_PMV_IMUX14", + "CMT_TOP_IMUX14_0" + ], + [ + "CMT_PMV_IMUX15", + "CMT_TOP_IMUX15_0" + ], + [ + "CMT_PMV_IMUX16", + "CMT_TOP_IMUX16_0" + ], + [ + "CMT_PMV_IMUX17", + "CMT_TOP_IMUX17_0" + ], + [ + "CMT_PMV_IMUX18", + "CMT_TOP_IMUX18_0" + ], + [ + "CMT_PMV_IMUX19", + "CMT_TOP_IMUX19_0" + ], + [ + "CMT_PMV_IMUX20", + "CMT_TOP_IMUX20_0" + ], + [ + "CMT_PMV_IMUX21", + "CMT_TOP_IMUX21_0" + ], + [ + "CMT_PMV_IMUX22", + "CMT_TOP_IMUX22_0" + ], + [ + "CMT_PMV_IMUX23", + "CMT_TOP_IMUX23_0" + ], + [ + "CMT_PMV_IMUX24", + "CMT_TOP_IMUX24_0" + ], + [ + "CMT_PMV_IMUX25", + "CMT_TOP_IMUX25_0" + ], + [ + "CMT_PMV_IMUX26", + "CMT_TOP_IMUX26_0" + ], + [ + "CMT_PMV_IMUX27", + "CMT_TOP_IMUX27_0" + ], + [ + "CMT_PMV_IMUX28", + "CMT_TOP_IMUX28_0" + ], + [ + "CMT_PMV_IMUX29", + "CMT_TOP_IMUX29_0" + ], + [ + "CMT_PMV_IMUX30", + "CMT_TOP_IMUX30_0" + ], + [ + "CMT_PMV_IMUX31", + "CMT_TOP_IMUX31_0" + ], + [ + "CMT_PMV_IMUX32", + "CMT_TOP_IMUX32_0" + ], + [ + "CMT_PMV_IMUX33", + "CMT_TOP_IMUX33_0" + ], + [ + "CMT_PMV_IMUX34", + "CMT_TOP_IMUX34_0" + ], + [ + "CMT_PMV_IMUX35", + "CMT_TOP_IMUX35_0" + ], + [ + "CMT_PMV_IMUX36", + "CMT_TOP_IMUX36_0" + ], + [ + "CMT_PMV_IMUX37", + "CMT_TOP_IMUX37_0" + ], + [ + "CMT_PMV_IMUX38", + "CMT_TOP_IMUX38_0" + ], + [ + "CMT_PMV_IMUX39", + "CMT_TOP_IMUX39_0" + ], + [ + "CMT_PMV_IMUX40", + "CMT_TOP_IMUX40_0" + ], + [ + "CMT_PMV_IMUX41", + "CMT_TOP_IMUX41_0" + ], + [ + "CMT_PMV_IMUX42", + "CMT_TOP_IMUX42_0" + ], + [ + "CMT_PMV_IMUX43", + "CMT_TOP_IMUX43_0" + ], + [ + "CMT_PMV_IMUX44", + "CMT_TOP_IMUX44_0" + ], + [ + "CMT_PMV_IMUX45", + "CMT_TOP_IMUX45_0" + ], + [ + "CMT_PMV_IMUX46", + "CMT_TOP_IMUX46_0" + ], + [ + "CMT_PMV_IMUX47", + "CMT_TOP_IMUX47_0" + ], + [ + "CMT_PMV_LH1", + "CMT_TOP_LH1_0" + ], + [ + "CMT_PMV_LH2", + "CMT_TOP_LH2_0" + ], + [ + "CMT_PMV_LH3", + "CMT_TOP_LH3_0" + ], + [ + "CMT_PMV_LH4", + "CMT_TOP_LH4_0" + ], + [ + "CMT_PMV_LH5", + "CMT_TOP_LH5_0" + ], + [ + "CMT_PMV_LH6", + "CMT_TOP_LH6_0" + ], + [ + "CMT_PMV_LH7", + "CMT_TOP_LH7_0" + ], + [ + "CMT_PMV_LH8", + "CMT_TOP_LH8_0" + ], + [ + "CMT_PMV_LH9", + "CMT_TOP_LH9_0" + ], + [ + "CMT_PMV_LH10", + "CMT_TOP_LH10_0" + ], + [ + "CMT_PMV_LH11", + "CMT_TOP_LH11_0" + ], + [ + "CMT_PMV_LH12", + "CMT_TOP_LH12_0" + ], + [ + "CMT_PMV_LOGIC_OUTS0", + "CMT_TOP_LOGIC_OUTS_L_B0_0" + ], + [ + "CMT_PMV_LOGIC_OUTS2", + "CMT_TOP_LOGIC_OUTS_L_B2_0" + ], + [ + "CMT_PMV_LOGIC_OUTS5", + "CMT_TOP_LOGIC_OUTS_L_B5_0" + ], + [ + "CMT_PMV_LOGIC_OUTS7", + "CMT_TOP_LOGIC_OUTS_L_B7_0" + ], + [ + "CMT_PMV_LOGIC_OUTS8", + "CMT_TOP_LOGIC_OUTS_L_B8_0" + ], + [ + "CMT_PMV_LOGIC_OUTS10", + "CMT_TOP_LOGIC_OUTS_L_B10_0" + ], + [ + "CMT_PMV_LOGIC_OUTS13", + "CMT_TOP_LOGIC_OUTS_L_B13_0" + ], + [ + "CMT_PMV_LOGIC_OUTS15", + "CMT_TOP_LOGIC_OUTS_L_B15_0" + ], + [ + "CMT_PMV_LOGIC_OUTS16", + "CMT_TOP_LOGIC_OUTS_L_B16_0" + ], + [ + "CMT_PMV_LOGIC_OUTS17", + "CMT_TOP_LOGIC_OUTS_L_B17_0" + ], + [ + "CMT_PMV_LOGIC_OUTS18", + "CMT_TOP_LOGIC_OUTS_L_B18_0" + ], + [ + "CMT_PMV_LOGIC_OUTS19", + "CMT_TOP_LOGIC_OUTS_L_B19_0" + ], + [ + "CMT_PMV_LOGIC_OUTS20", + "CMT_TOP_LOGIC_OUTS_L_B20_0" + ], + [ + "CMT_PMV_LOGIC_OUTS21", + "CMT_TOP_LOGIC_OUTS_L_B21_0" + ], + [ + "CMT_PMV_LOGIC_OUTS22", + "CMT_TOP_LOGIC_OUTS_L_B22_0" + ], + [ + "CMT_PMV_LOGIC_OUTS23", + "CMT_TOP_LOGIC_OUTS_L_B23_0" + ], + [ + "CMT_PMV_NE2A0", + "CMT_TOP_NE2A0_0" + ], + [ + "CMT_PMV_NE2A1", + "CMT_TOP_NE2A1_0" + ], + [ + "CMT_PMV_NE2A2", + "CMT_TOP_NE2A2_0" + ], + [ + "CMT_PMV_NE2A3", + "CMT_TOP_NE2A3_0" + ], + [ + "CMT_PMV_NE4BEG0", + "CMT_TOP_NE4BEG0_0" + ], + [ + "CMT_PMV_NE4BEG1", + "CMT_TOP_NE4BEG1_0" + ], + [ + "CMT_PMV_NE4BEG2", + "CMT_TOP_NE4BEG2_0" + ], + [ + "CMT_PMV_NE4BEG3", + "CMT_TOP_NE4BEG3_0" + ], + [ + "CMT_PMV_NE4C0", + "CMT_TOP_NE4C0_0" + ], + [ + "CMT_PMV_NE4C1", + "CMT_TOP_NE4C1_0" + ], + [ + "CMT_PMV_NE4C2", + "CMT_TOP_NE4C2_0" + ], + [ + "CMT_PMV_NE4C3", + "CMT_TOP_NE4C3_0" + ], + [ + "CMT_PMV_NW2A0", + "CMT_TOP_NW2A0_0" + ], + [ + "CMT_PMV_NW2A1", + "CMT_TOP_NW2A1_0" + ], + [ + "CMT_PMV_NW2A2", + "CMT_TOP_NW2A2_0" + ], + [ + "CMT_PMV_NW2A3", + "CMT_TOP_NW2A3_0" + ], + [ + "CMT_PMV_NW4A0", + "CMT_TOP_NW4A0_0" + ], + [ + "CMT_PMV_NW4A1", + "CMT_TOP_NW4A1_0" + ], + [ + "CMT_PMV_NW4A2", + "CMT_TOP_NW4A2_0" + ], + [ + "CMT_PMV_NW4A3", + "CMT_TOP_NW4A3_0" + ], + [ + "CMT_PMV_NW4END0", + "CMT_TOP_NW4END0_0" + ], + [ + "CMT_PMV_NW4END1", + "CMT_TOP_NW4END1_0" + ], + [ + "CMT_PMV_NW4END2", + "CMT_TOP_NW4END2_0" + ], + [ + "CMT_PMV_NW4END3", + "CMT_TOP_NW4END3_0" + ], + [ + "CMT_PMV_SE2A0", + "CMT_TOP_SE2A0_0" + ], + [ + "CMT_PMV_SE2A1", + "CMT_TOP_SE2A1_0" + ], + [ + "CMT_PMV_SE2A2", + "CMT_TOP_SE2A2_0" + ], + [ + "CMT_PMV_SE2A3", + "CMT_TOP_SE2A3_0" + ], + [ + "CMT_PMV_SE4BEG0", + "CMT_TOP_SE4BEG0_0" + ], + [ + "CMT_PMV_SE4BEG1", + "CMT_TOP_SE4BEG1_0" + ], + [ + "CMT_PMV_SE4BEG2", + "CMT_TOP_SE4BEG2_0" + ], + [ + "CMT_PMV_SE4BEG3", + "CMT_TOP_SE4BEG3_0" + ], + [ + "CMT_PMV_SE4C0", + "CMT_TOP_SE4C0_0" + ], + [ + "CMT_PMV_SE4C1", + "CMT_TOP_SE4C1_0" + ], + [ + "CMT_PMV_SE4C2", + "CMT_TOP_SE4C2_0" + ], + [ + "CMT_PMV_SE4C3", + "CMT_TOP_SE4C3_0" + ], + [ + "CMT_PMV_SW2A0", + "CMT_TOP_SW2A0_0" + ], + [ + "CMT_PMV_SW2A1", + "CMT_TOP_SW2A1_0" + ], + [ + "CMT_PMV_SW2A2", + "CMT_TOP_SW2A2_0" + ], + [ + "CMT_PMV_SW2A3", + "CMT_TOP_SW2A3_0" + ], + [ + "CMT_PMV_SW4A0", + "CMT_TOP_SW4A0_0" + ], + [ + "CMT_PMV_SW4A1", + "CMT_TOP_SW4A1_0" + ], + [ + "CMT_PMV_SW4A2", + "CMT_TOP_SW4A2_0" + ], + [ + "CMT_PMV_SW4A3", + "CMT_TOP_SW4A3_0" + ], + [ + "CMT_PMV_SW4END0", + "CMT_TOP_SW4END0_0" + ], + [ + "CMT_PMV_SW4END1", + "CMT_TOP_SW4END1_0" + ], + [ + "CMT_PMV_SW4END2", + "CMT_TOP_SW4END2_0" + ], + [ + "CMT_PMV_SW4END3", + "CMT_TOP_SW4END3_0" + ], + [ + "CMT_PMV_WL1END0", + "CMT_TOP_WL1END0_0" + ], + [ + "CMT_PMV_WL1END1", + "CMT_TOP_WL1END1_0" + ], + [ + "CMT_PMV_WL1END2", + "CMT_TOP_WL1END2_0" + ], + [ + "CMT_PMV_WL1END3", + "CMT_TOP_WL1END3_0" + ], + [ + "CMT_PMV_WR1END0", + "CMT_TOP_WR1END0_0" + ], + [ + "CMT_PMV_WR1END1", + "CMT_TOP_WR1END1_0" + ], + [ + "CMT_PMV_WR1END2", + "CMT_TOP_WR1END2_0" + ], + [ + "CMT_PMV_WR1END3", + "CMT_TOP_WR1END3_0" + ], + [ + "CMT_PMV_WW2A0", + "CMT_TOP_WW2A0_0" + ], + [ + "CMT_PMV_WW2A1", + "CMT_TOP_WW2A1_0" + ], + [ + "CMT_PMV_WW2A2", + "CMT_TOP_WW2A2_0" + ], + [ + "CMT_PMV_WW2A3", + "CMT_TOP_WW2A3_0" + ], + [ + "CMT_PMV_WW2END0", + "CMT_TOP_WW2END0_0" + ], + [ + "CMT_PMV_WW2END1", + "CMT_TOP_WW2END1_0" + ], + [ + "CMT_PMV_WW2END2", + "CMT_TOP_WW2END2_0" + ], + [ + "CMT_PMV_WW2END3", + "CMT_TOP_WW2END3_0" + ], + [ + "CMT_PMV_WW4A0", + "CMT_TOP_WW4A0_0" + ], + [ + "CMT_PMV_WW4A1", + "CMT_TOP_WW4A1_0" + ], + [ + "CMT_PMV_WW4A2", + "CMT_TOP_WW4A2_0" + ], + [ + "CMT_PMV_WW4A3", + "CMT_TOP_WW4A3_0" + ], + [ + "CMT_PMV_WW4B0", + "CMT_TOP_WW4B0_0" + ], + [ + "CMT_PMV_WW4B1", + "CMT_TOP_WW4B1_0" + ], + [ + "CMT_PMV_WW4B2", + "CMT_TOP_WW4B2_0" + ], + [ + "CMT_PMV_WW4B3", + "CMT_TOP_WW4B3_0" + ], + [ + "CMT_PMV_WW4C0", + "CMT_TOP_WW4C0_0" + ], + [ + "CMT_PMV_WW4C1", + "CMT_TOP_WW4C1_0" + ], + [ + "CMT_PMV_WW4C2", + "CMT_TOP_WW4C2_0" + ], + [ + "CMT_PMV_WW4C3", + "CMT_TOP_WW4C3_0" + ], + [ + "CMT_PMV_WW4END0", + "CMT_TOP_WW4END0_0" + ], + [ + "CMT_PMV_WW4END1", + "CMT_TOP_WW4END1_0" + ], + [ + "CMT_PMV_WW4END2", + "CMT_TOP_WW4END2_0" + ], + [ + "CMT_PMV_WW4END3", + "CMT_TOP_WW4END3_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLK", + "CMT_TOP_ICLK_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLKDIV", + "CMT_TOP_ICLKDIV_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLK", + "CMT_TOP_OCLK_0" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLKDIV", + "CMT_TOP_OCLKDIV_0" + ] + ] + }, + { + "grid_deltas": [ + -1, + 7 + ], + "tile_types": [ + "CMT_PMV_L", + "CMT_TOP_L_UPPER_T" + ], + "wire_pairs": [ + [ + "CMT_PMV_BYP0", + "CMT_TOP_BYP0_12" + ], + [ + "CMT_PMV_BYP1", + "CMT_TOP_BYP1_12" + ], + [ + "CMT_PMV_BYP2", + "CMT_TOP_BYP2_12" + ], + [ + "CMT_PMV_BYP3", + "CMT_TOP_BYP3_12" + ], + [ + "CMT_PMV_BYP4", + "CMT_TOP_BYP4_12" + ], + [ + "CMT_PMV_BYP5", + "CMT_TOP_BYP5_12" + ], + [ + "CMT_PMV_BYP6", + "CMT_TOP_BYP6_12" + ], + [ + "CMT_PMV_BYP7", + "CMT_TOP_BYP7_12" + ], + [ + "CMT_PMV_CLK0", + "CMT_TOP_CLK0_12" + ], + [ + "CMT_PMV_CLK1", + "CMT_TOP_CLK1_12" + ], + [ + "CMT_PMV_CTRL0", + "CMT_TOP_CTRL0_12" + ], + [ + "CMT_PMV_CTRL1", + "CMT_TOP_CTRL1_12" + ], + [ + "CMT_PMV_EE2A0", + "CMT_TOP_EE2A0_12" + ], + [ + "CMT_PMV_EE2A1", + "CMT_TOP_EE2A1_12" + ], + [ + "CMT_PMV_EE2A2", + "CMT_TOP_EE2A2_12" + ], + [ + "CMT_PMV_EE2A3", + "CMT_TOP_EE2A3_12" + ], + [ + "CMT_PMV_EE2BEG0", + "CMT_TOP_EE2BEG0_12" + ], + [ + "CMT_PMV_EE2BEG1", + "CMT_TOP_EE2BEG1_12" + ], + [ + "CMT_PMV_EE2BEG2", + "CMT_TOP_EE2BEG2_12" + ], + [ + "CMT_PMV_EE2BEG3", + "CMT_TOP_EE2BEG3_12" + ], + [ + "CMT_PMV_EE4A0", + "CMT_TOP_EE4A0_12" + ], + [ + "CMT_PMV_EE4A1", + "CMT_TOP_EE4A1_12" + ], + [ + "CMT_PMV_EE4A2", + "CMT_TOP_EE4A2_12" + ], + [ + "CMT_PMV_EE4A3", + "CMT_TOP_EE4A3_12" + ], + [ + "CMT_PMV_EE4B0", + "CMT_TOP_EE4B0_12" + ], + [ + "CMT_PMV_EE4B1", + "CMT_TOP_EE4B1_12" + ], + [ + "CMT_PMV_EE4B2", + "CMT_TOP_EE4B2_12" + ], + [ + "CMT_PMV_EE4B3", + "CMT_TOP_EE4B3_12" + ], + [ + "CMT_PMV_EE4BEG0", + "CMT_TOP_EE4BEG0_12" + ], + [ + "CMT_PMV_EE4BEG1", + "CMT_TOP_EE4BEG1_12" + ], + [ + "CMT_PMV_EE4BEG2", + "CMT_TOP_EE4BEG2_12" + ], + [ + "CMT_PMV_EE4BEG3", + "CMT_TOP_EE4BEG3_12" + ], + [ + "CMT_PMV_EE4C0", + "CMT_TOP_EE4C0_12" + ], + [ + "CMT_PMV_EE4C1", + "CMT_TOP_EE4C1_12" + ], + [ + "CMT_PMV_EE4C2", + "CMT_TOP_EE4C2_12" + ], + [ + "CMT_PMV_EE4C3", + "CMT_TOP_EE4C3_12" + ], + [ + "CMT_PMV_EL1BEG0", + "CMT_TOP_EL1BEG0_12" + ], + [ + "CMT_PMV_EL1BEG1", + "CMT_TOP_EL1BEG1_12" + ], + [ + "CMT_PMV_EL1BEG2", + "CMT_TOP_EL1BEG2_12" + ], + [ + "CMT_PMV_EL1BEG3", + "CMT_TOP_EL1BEG3_12" + ], + [ + "CMT_PMV_ER1BEG0", + "CMT_TOP_ER1BEG0_12" + ], + [ + "CMT_PMV_ER1BEG1", + "CMT_TOP_ER1BEG1_12" + ], + [ + "CMT_PMV_ER1BEG2", + "CMT_TOP_ER1BEG2_12" + ], + [ + "CMT_PMV_ER1BEG3", + "CMT_TOP_ER1BEG3_12" + ], + [ + "CMT_PMV_FAN0", + "CMT_TOP_FAN0_12" + ], + [ + "CMT_PMV_FAN1", + "CMT_TOP_FAN1_12" + ], + [ + "CMT_PMV_FAN2", + "CMT_TOP_FAN2_12" + ], + [ + "CMT_PMV_FAN3", + "CMT_TOP_FAN3_12" + ], + [ + "CMT_PMV_FAN4", + "CMT_TOP_FAN4_12" + ], + [ + "CMT_PMV_FAN5", + "CMT_TOP_FAN5_12" + ], + [ + "CMT_PMV_FAN6", + "CMT_TOP_FAN6_12" + ], + [ + "CMT_PMV_FAN7", + "CMT_TOP_FAN7_12" + ], + [ + "CMT_PMV_IMUX0", + "CMT_TOP_IMUX0_12" + ], + [ + "CMT_PMV_IMUX1", + "CMT_TOP_IMUX1_12" + ], + [ + "CMT_PMV_IMUX2", + "CMT_TOP_IMUX2_12" + ], + [ + "CMT_PMV_IMUX3", + "CMT_TOP_IMUX3_12" + ], + [ + "CMT_PMV_IMUX4", + "CMT_TOP_IMUX4_12" + ], + [ + "CMT_PMV_IMUX5", + "CMT_TOP_IMUX5_12" + ], + [ + "CMT_PMV_IMUX6", + "CMT_TOP_IMUX6_12" + ], + [ + "CMT_PMV_IMUX7", + "CMT_TOP_IMUX7_12" + ], + [ + "CMT_PMV_IMUX8", + "CMT_TOP_IMUX8_12" + ], + [ + "CMT_PMV_IMUX9", + "CMT_TOP_IMUX9_12" + ], + [ + "CMT_PMV_IMUX10", + "CMT_TOP_IMUX10_12" + ], + [ + "CMT_PMV_IMUX11", + "CMT_TOP_IMUX11_12" + ], + [ + "CMT_PMV_IMUX12", + "CMT_TOP_IMUX12_12" + ], + [ + "CMT_PMV_IMUX13", + "CMT_TOP_IMUX13_12" + ], + [ + "CMT_PMV_IMUX14", + "CMT_TOP_IMUX14_12" + ], + [ + "CMT_PMV_IMUX15", + "CMT_TOP_IMUX15_12" + ], + [ + "CMT_PMV_IMUX16", + "CMT_TOP_IMUX16_12" + ], + [ + "CMT_PMV_IMUX17", + "CMT_TOP_IMUX17_12" + ], + [ + "CMT_PMV_IMUX18", + "CMT_TOP_IMUX18_12" + ], + [ + "CMT_PMV_IMUX19", + "CMT_TOP_IMUX19_12" + ], + [ + "CMT_PMV_IMUX20", + "CMT_TOP_IMUX20_12" + ], + [ + "CMT_PMV_IMUX21", + "CMT_TOP_IMUX21_12" + ], + [ + "CMT_PMV_IMUX22", + "CMT_TOP_IMUX22_12" + ], + [ + "CMT_PMV_IMUX23", + "CMT_TOP_IMUX23_12" + ], + [ + "CMT_PMV_IMUX24", + "CMT_TOP_IMUX24_12" + ], + [ + "CMT_PMV_IMUX25", + "CMT_TOP_IMUX25_12" + ], + [ + "CMT_PMV_IMUX26", + "CMT_TOP_IMUX26_12" + ], + [ + "CMT_PMV_IMUX27", + "CMT_TOP_IMUX27_12" + ], + [ + "CMT_PMV_IMUX28", + "CMT_TOP_IMUX28_12" + ], + [ + "CMT_PMV_IMUX29", + "CMT_TOP_IMUX29_12" + ], + [ + "CMT_PMV_IMUX30", + "CMT_TOP_IMUX30_12" + ], + [ + "CMT_PMV_IMUX31", + "CMT_TOP_IMUX31_12" + ], + [ + "CMT_PMV_IMUX32", + "CMT_TOP_IMUX32_12" + ], + [ + "CMT_PMV_IMUX33", + "CMT_TOP_IMUX33_12" + ], + [ + "CMT_PMV_IMUX34", + "CMT_TOP_IMUX34_12" + ], + [ + "CMT_PMV_IMUX35", + "CMT_TOP_IMUX35_12" + ], + [ + "CMT_PMV_IMUX36", + "CMT_TOP_IMUX36_12" + ], + [ + "CMT_PMV_IMUX37", + "CMT_TOP_IMUX37_12" + ], + [ + "CMT_PMV_IMUX38", + "CMT_TOP_IMUX38_12" + ], + [ + "CMT_PMV_IMUX39", + "CMT_TOP_IMUX39_12" + ], + [ + "CMT_PMV_IMUX40", + "CMT_TOP_IMUX40_12" + ], + [ + "CMT_PMV_IMUX41", + "CMT_TOP_IMUX41_12" + ], + [ + "CMT_PMV_IMUX42", + "CMT_TOP_IMUX42_12" + ], + [ + "CMT_PMV_IMUX43", + "CMT_TOP_IMUX43_12" + ], + [ + "CMT_PMV_IMUX44", + "CMT_TOP_IMUX44_12" + ], + [ + "CMT_PMV_IMUX45", + "CMT_TOP_IMUX45_12" + ], + [ + "CMT_PMV_IMUX46", + "CMT_TOP_IMUX46_12" + ], + [ + "CMT_PMV_IMUX47", + "CMT_TOP_IMUX47_12" + ], + [ + "CMT_PMV_LH1", + "CMT_TOP_LH1_12" + ], + [ + "CMT_PMV_LH2", + "CMT_TOP_LH2_12" + ], + [ + "CMT_PMV_LH3", + "CMT_TOP_LH3_12" + ], + [ + "CMT_PMV_LH4", + "CMT_TOP_LH4_12" + ], + [ + "CMT_PMV_LH5", + "CMT_TOP_LH5_12" + ], + [ + "CMT_PMV_LH6", + "CMT_TOP_LH6_12" + ], + [ + "CMT_PMV_LH7", + "CMT_TOP_LH7_12" + ], + [ + "CMT_PMV_LH8", + "CMT_TOP_LH8_12" + ], + [ + "CMT_PMV_LH9", + "CMT_TOP_LH9_12" + ], + [ + "CMT_PMV_LH10", + "CMT_TOP_LH10_12" + ], + [ + "CMT_PMV_LH11", + "CMT_TOP_LH11_12" + ], + [ + "CMT_PMV_LH12", + "CMT_TOP_LH12_12" + ], + [ + "CMT_PMV_LOGIC_OUTS0", + "CMT_TOP_LOGIC_OUTS_L_B0_12" + ], + [ + "CMT_PMV_LOGIC_OUTS2", + "CMT_TOP_LOGIC_OUTS_L_B2_12" + ], + [ + "CMT_PMV_LOGIC_OUTS5", + "CMT_TOP_LOGIC_OUTS_L_B5_12" + ], + [ + "CMT_PMV_LOGIC_OUTS7", + "CMT_TOP_LOGIC_OUTS_L_B7_12" + ], + [ + "CMT_PMV_LOGIC_OUTS8", + "CMT_TOP_LOGIC_OUTS_L_B8_12" + ], + [ + "CMT_PMV_LOGIC_OUTS10", + "CMT_TOP_LOGIC_OUTS_L_B10_12" + ], + [ + "CMT_PMV_LOGIC_OUTS13", + "CMT_TOP_LOGIC_OUTS_L_B13_12" + ], + [ + "CMT_PMV_LOGIC_OUTS15", + "CMT_TOP_LOGIC_OUTS_L_B15_12" + ], + [ + "CMT_PMV_LOGIC_OUTS16", + "CMT_TOP_LOGIC_OUTS_L_B16_12" + ], + [ + "CMT_PMV_LOGIC_OUTS17", + "CMT_TOP_LOGIC_OUTS_L_B17_12" + ], + [ + "CMT_PMV_LOGIC_OUTS18", + "CMT_TOP_LOGIC_OUTS_L_B18_12" + ], + [ + "CMT_PMV_LOGIC_OUTS19", + "CMT_TOP_LOGIC_OUTS_L_B19_12" + ], + [ + "CMT_PMV_LOGIC_OUTS20", + "CMT_TOP_LOGIC_OUTS_L_B20_12" + ], + [ + "CMT_PMV_LOGIC_OUTS21", + "CMT_TOP_LOGIC_OUTS_L_B21_12" + ], + [ + "CMT_PMV_LOGIC_OUTS22", + "CMT_TOP_LOGIC_OUTS_L_B22_12" + ], + [ + "CMT_PMV_LOGIC_OUTS23", + "CMT_TOP_LOGIC_OUTS_L_B23_12" + ], + [ + "CMT_PMV_NE2A0", + "CMT_TOP_NE2A0_12" + ], + [ + "CMT_PMV_NE2A1", + "CMT_TOP_NE2A1_12" + ], + [ + "CMT_PMV_NE2A2", + "CMT_TOP_NE2A2_12" + ], + [ + "CMT_PMV_NE2A3", + "CMT_TOP_NE2A3_12" + ], + [ + "CMT_PMV_NE4BEG0", + "CMT_TOP_NE4BEG0_12" + ], + [ + "CMT_PMV_NE4BEG1", + "CMT_TOP_NE4BEG1_12" + ], + [ + "CMT_PMV_NE4BEG2", + "CMT_TOP_NE4BEG2_12" + ], + [ + "CMT_PMV_NE4BEG3", + "CMT_TOP_NE4BEG3_12" + ], + [ + "CMT_PMV_NE4C0", + "CMT_TOP_NE4C0_12" + ], + [ + "CMT_PMV_NE4C1", + "CMT_TOP_NE4C1_12" + ], + [ + "CMT_PMV_NE4C2", + "CMT_TOP_NE4C2_12" + ], + [ + "CMT_PMV_NE4C3", + "CMT_TOP_NE4C3_12" + ], + [ + "CMT_PMV_NW2A0", + "CMT_TOP_NW2A0_12" + ], + [ + "CMT_PMV_NW2A1", + "CMT_TOP_NW2A1_12" + ], + [ + "CMT_PMV_NW2A2", + "CMT_TOP_NW2A2_12" + ], + [ + "CMT_PMV_NW2A3", + "CMT_TOP_NW2A3_12" + ], + [ + "CMT_PMV_NW4A0", + "CMT_TOP_NW4A0_12" + ], + [ + "CMT_PMV_NW4A1", + "CMT_TOP_NW4A1_12" + ], + [ + "CMT_PMV_NW4A2", + "CMT_TOP_NW4A2_12" + ], + [ + "CMT_PMV_NW4A3", + "CMT_TOP_NW4A3_12" + ], + [ + "CMT_PMV_NW4END0", + "CMT_TOP_NW4END0_12" + ], + [ + "CMT_PMV_NW4END1", + "CMT_TOP_NW4END1_12" + ], + [ + "CMT_PMV_NW4END2", + "CMT_TOP_NW4END2_12" + ], + [ + "CMT_PMV_NW4END3", + "CMT_TOP_NW4END3_12" + ], + [ + "CMT_PMV_SE2A0", + "CMT_TOP_SE2A0_12" + ], + [ + "CMT_PMV_SE2A1", + "CMT_TOP_SE2A1_12" + ], + [ + "CMT_PMV_SE2A2", + "CMT_TOP_SE2A2_12" + ], + [ + "CMT_PMV_SE2A3", + "CMT_TOP_SE2A3_12" + ], + [ + "CMT_PMV_SE4BEG0", + "CMT_TOP_SE4BEG0_12" + ], + [ + "CMT_PMV_SE4BEG1", + "CMT_TOP_SE4BEG1_12" + ], + [ + "CMT_PMV_SE4BEG2", + "CMT_TOP_SE4BEG2_12" + ], + [ + "CMT_PMV_SE4BEG3", + "CMT_TOP_SE4BEG3_12" + ], + [ + "CMT_PMV_SE4C0", + "CMT_TOP_SE4C0_12" + ], + [ + "CMT_PMV_SE4C1", + "CMT_TOP_SE4C1_12" + ], + [ + "CMT_PMV_SE4C2", + "CMT_TOP_SE4C2_12" + ], + [ + "CMT_PMV_SE4C3", + "CMT_TOP_SE4C3_12" + ], + [ + "CMT_PMV_SW2A0", + "CMT_TOP_SW2A0_12" + ], + [ + "CMT_PMV_SW2A1", + "CMT_TOP_SW2A1_12" + ], + [ + "CMT_PMV_SW2A2", + "CMT_TOP_SW2A2_12" + ], + [ + "CMT_PMV_SW2A3", + "CMT_TOP_SW2A3_12" + ], + [ + "CMT_PMV_SW4A0", + "CMT_TOP_SW4A0_12" + ], + [ + "CMT_PMV_SW4A1", + "CMT_TOP_SW4A1_12" + ], + [ + "CMT_PMV_SW4A2", + "CMT_TOP_SW4A2_12" + ], + [ + "CMT_PMV_SW4A3", + "CMT_TOP_SW4A3_12" + ], + [ + "CMT_PMV_SW4END0", + "CMT_TOP_SW4END0_12" + ], + [ + "CMT_PMV_SW4END1", + "CMT_TOP_SW4END1_12" + ], + [ + "CMT_PMV_SW4END2", + "CMT_TOP_SW4END2_12" + ], + [ + "CMT_PMV_SW4END3", + "CMT_TOP_SW4END3_12" + ], + [ + "CMT_PMV_WL1END0", + "CMT_TOP_WL1END0_12" + ], + [ + "CMT_PMV_WL1END1", + "CMT_TOP_WL1END1_12" + ], + [ + "CMT_PMV_WL1END2", + "CMT_TOP_WL1END2_12" + ], + [ + "CMT_PMV_WL1END3", + "CMT_TOP_WL1END3_12" + ], + [ + "CMT_PMV_WR1END0", + "CMT_TOP_WR1END0_12" + ], + [ + "CMT_PMV_WR1END1", + "CMT_TOP_WR1END1_12" + ], + [ + "CMT_PMV_WR1END2", + "CMT_TOP_WR1END2_12" + ], + [ + "CMT_PMV_WR1END3", + "CMT_TOP_WR1END3_12" + ], + [ + "CMT_PMV_WW2A0", + "CMT_TOP_WW2A0_12" + ], + [ + "CMT_PMV_WW2A1", + "CMT_TOP_WW2A1_12" + ], + [ + "CMT_PMV_WW2A2", + "CMT_TOP_WW2A2_12" + ], + [ + "CMT_PMV_WW2A3", + "CMT_TOP_WW2A3_12" + ], + [ + "CMT_PMV_WW2END0", + "CMT_TOP_WW2END0_12" + ], + [ + "CMT_PMV_WW2END1", + "CMT_TOP_WW2END1_12" + ], + [ + "CMT_PMV_WW2END2", + "CMT_TOP_WW2END2_12" + ], + [ + "CMT_PMV_WW2END3", + "CMT_TOP_WW2END3_12" + ], + [ + "CMT_PMV_WW4A0", + "CMT_TOP_WW4A0_12" + ], + [ + "CMT_PMV_WW4A1", + "CMT_TOP_WW4A1_12" + ], + [ + "CMT_PMV_WW4A2", + "CMT_TOP_WW4A2_12" + ], + [ + "CMT_PMV_WW4A3", + "CMT_TOP_WW4A3_12" + ], + [ + "CMT_PMV_WW4B0", + "CMT_TOP_WW4B0_12" + ], + [ + "CMT_PMV_WW4B1", + "CMT_TOP_WW4B1_12" + ], + [ + "CMT_PMV_WW4B2", + "CMT_TOP_WW4B2_12" + ], + [ + "CMT_PMV_WW4B3", + "CMT_TOP_WW4B3_12" + ], + [ + "CMT_PMV_WW4C0", + "CMT_TOP_WW4C0_12" + ], + [ + "CMT_PMV_WW4C1", + "CMT_TOP_WW4C1_12" + ], + [ + "CMT_PMV_WW4C2", + "CMT_TOP_WW4C2_12" + ], + [ + "CMT_PMV_WW4C3", + "CMT_TOP_WW4C3_12" + ], + [ + "CMT_PMV_WW4END0", + "CMT_TOP_WW4END0_12" + ], + [ + "CMT_PMV_WW4END1", + "CMT_TOP_WW4END1_12" + ], + [ + "CMT_PMV_WW4END2", + "CMT_TOP_WW4END2_12" + ], + [ + "CMT_PMV_WW4END3", + "CMT_TOP_WW4END3_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLK", + "CMT_TOP_ICLK_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLKDIV", + "CMT_TOP_ICLKDIV_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLK", + "CMT_TOP_OCLK_12" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLKDIV", + "CMT_TOP_OCLKDIV_12" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CMT_PMV_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "CMT_PMV_BYP0", + "INT_INTERFACE_BYP0" + ], + [ + "CMT_PMV_BYP1", + "INT_INTERFACE_BYP1" + ], + [ + "CMT_PMV_BYP2", + "INT_INTERFACE_BYP2" + ], + [ + "CMT_PMV_BYP3", + "INT_INTERFACE_BYP3" + ], + [ + "CMT_PMV_BYP4", + "INT_INTERFACE_BYP4" + ], + [ + "CMT_PMV_BYP5", + "INT_INTERFACE_BYP5" + ], + [ + "CMT_PMV_BYP6", + "INT_INTERFACE_BYP6" + ], + [ + "CMT_PMV_BYP7", + "INT_INTERFACE_BYP7" + ], + [ + "CMT_PMV_CLK0", + "INT_INTERFACE_CLK0" + ], + [ + "CMT_PMV_CLK1", + "INT_INTERFACE_CLK1" + ], + [ + "CMT_PMV_CTRL0", + "INT_INTERFACE_CTRL0" + ], + [ + "CMT_PMV_CTRL1", + "INT_INTERFACE_CTRL1" + ], + [ + "CMT_PMV_EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "CMT_PMV_EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "CMT_PMV_EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "CMT_PMV_EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "CMT_PMV_EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "CMT_PMV_EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "CMT_PMV_EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "CMT_PMV_EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "CMT_PMV_EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "CMT_PMV_EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "CMT_PMV_EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "CMT_PMV_EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "CMT_PMV_EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "CMT_PMV_EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "CMT_PMV_EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "CMT_PMV_EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "CMT_PMV_EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "CMT_PMV_EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "CMT_PMV_EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "CMT_PMV_EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "CMT_PMV_EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "CMT_PMV_EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "CMT_PMV_EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "CMT_PMV_EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "CMT_PMV_EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "CMT_PMV_EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "CMT_PMV_EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "CMT_PMV_EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "CMT_PMV_ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "CMT_PMV_ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "CMT_PMV_ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "CMT_PMV_ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "CMT_PMV_FAN0", + "INT_INTERFACE_FAN0" + ], + [ + "CMT_PMV_FAN1", + "INT_INTERFACE_FAN1" + ], + [ + "CMT_PMV_FAN2", + "INT_INTERFACE_FAN2" + ], + [ + "CMT_PMV_FAN3", + "INT_INTERFACE_FAN3" + ], + [ + "CMT_PMV_FAN4", + "INT_INTERFACE_FAN4" + ], + [ + "CMT_PMV_FAN5", + "INT_INTERFACE_FAN5" + ], + [ + "CMT_PMV_FAN6", + "INT_INTERFACE_FAN6" + ], + [ + "CMT_PMV_FAN7", + "INT_INTERFACE_FAN7" + ], + [ + "CMT_PMV_IMUX0", + "INT_INTERFACE_IMUX0" + ], + [ + "CMT_PMV_IMUX1", + "INT_INTERFACE_IMUX1" + ], + [ + "CMT_PMV_IMUX2", + "INT_INTERFACE_IMUX2" + ], + [ + "CMT_PMV_IMUX3", + "INT_INTERFACE_IMUX3" + ], + [ + "CMT_PMV_IMUX4", + "INT_INTERFACE_IMUX4" + ], + [ + "CMT_PMV_IMUX5", + "INT_INTERFACE_IMUX5" + ], + [ + "CMT_PMV_IMUX6", + "INT_INTERFACE_IMUX6" + ], + [ + "CMT_PMV_IMUX7", + "INT_INTERFACE_IMUX7" + ], + [ + "CMT_PMV_IMUX8", + "INT_INTERFACE_IMUX8" + ], + [ + "CMT_PMV_IMUX9", + "INT_INTERFACE_IMUX9" + ], + [ + "CMT_PMV_IMUX10", + "INT_INTERFACE_IMUX10" + ], + [ + "CMT_PMV_IMUX11", + "INT_INTERFACE_IMUX11" + ], + [ + "CMT_PMV_IMUX12", + "INT_INTERFACE_IMUX12" + ], + [ + "CMT_PMV_IMUX13", + "INT_INTERFACE_IMUX13" + ], + [ + "CMT_PMV_IMUX14", + "INT_INTERFACE_IMUX14" + ], + [ + "CMT_PMV_IMUX15", + "INT_INTERFACE_IMUX15" + ], + [ + "CMT_PMV_IMUX16", + "INT_INTERFACE_IMUX16" + ], + [ + "CMT_PMV_IMUX17", + "INT_INTERFACE_IMUX17" + ], + [ + "CMT_PMV_IMUX18", + "INT_INTERFACE_IMUX18" + ], + [ + "CMT_PMV_IMUX19", + "INT_INTERFACE_IMUX19" + ], + [ + "CMT_PMV_IMUX20", + "INT_INTERFACE_IMUX20" + ], + [ + "CMT_PMV_IMUX21", + "INT_INTERFACE_IMUX21" + ], + [ + "CMT_PMV_IMUX22", + "INT_INTERFACE_IMUX22" + ], + [ + "CMT_PMV_IMUX23", + "INT_INTERFACE_IMUX23" + ], + [ + "CMT_PMV_IMUX24", + "INT_INTERFACE_IMUX24" + ], + [ + "CMT_PMV_IMUX25", + "INT_INTERFACE_IMUX25" + ], + [ + "CMT_PMV_IMUX26", + "INT_INTERFACE_IMUX26" + ], + [ + "CMT_PMV_IMUX27", + "INT_INTERFACE_IMUX27" + ], + [ + "CMT_PMV_IMUX28", + "INT_INTERFACE_IMUX28" + ], + [ + "CMT_PMV_IMUX29", + "INT_INTERFACE_IMUX29" + ], + [ + "CMT_PMV_IMUX30", + "INT_INTERFACE_IMUX30" + ], + [ + "CMT_PMV_IMUX31", + "INT_INTERFACE_IMUX31" + ], + [ + "CMT_PMV_IMUX32", + "INT_INTERFACE_IMUX32" + ], + [ + "CMT_PMV_IMUX33", + "INT_INTERFACE_IMUX33" + ], + [ + "CMT_PMV_IMUX34", + "INT_INTERFACE_IMUX34" + ], + [ + "CMT_PMV_IMUX35", + "INT_INTERFACE_IMUX35" + ], + [ + "CMT_PMV_IMUX36", + "INT_INTERFACE_IMUX36" + ], + [ + "CMT_PMV_IMUX37", + "INT_INTERFACE_IMUX37" + ], + [ + "CMT_PMV_IMUX38", + "INT_INTERFACE_IMUX38" + ], + [ + "CMT_PMV_IMUX39", + "INT_INTERFACE_IMUX39" + ], + [ + "CMT_PMV_IMUX40", + "INT_INTERFACE_IMUX40" + ], + [ + "CMT_PMV_IMUX41", + "INT_INTERFACE_IMUX41" + ], + [ + "CMT_PMV_IMUX42", + "INT_INTERFACE_IMUX42" + ], + [ + "CMT_PMV_IMUX43", + "INT_INTERFACE_IMUX43" + ], + [ + "CMT_PMV_IMUX44", + "INT_INTERFACE_IMUX44" + ], + [ + "CMT_PMV_IMUX45", + "INT_INTERFACE_IMUX45" + ], + [ + "CMT_PMV_IMUX46", + "INT_INTERFACE_IMUX46" + ], + [ + "CMT_PMV_IMUX47", + "INT_INTERFACE_IMUX47" + ], + [ + "CMT_PMV_LH1", + "INT_INTERFACE_LH1" + ], + [ + "CMT_PMV_LH2", + "INT_INTERFACE_LH2" + ], + [ + "CMT_PMV_LH3", + "INT_INTERFACE_LH3" + ], + [ + "CMT_PMV_LH4", + "INT_INTERFACE_LH4" + ], + [ + "CMT_PMV_LH5", + "INT_INTERFACE_LH5" + ], + [ + "CMT_PMV_LH6", + "INT_INTERFACE_LH6" + ], + [ + "CMT_PMV_LH7", + "INT_INTERFACE_LH7" + ], + [ + "CMT_PMV_LH8", + "INT_INTERFACE_LH8" + ], + [ + "CMT_PMV_LH9", + "INT_INTERFACE_LH9" + ], + [ + "CMT_PMV_LH10", + "INT_INTERFACE_LH10" + ], + [ + "CMT_PMV_LH11", + "INT_INTERFACE_LH11" + ], + [ + "CMT_PMV_LH12", + "INT_INTERFACE_LH12" + ], + [ + "CMT_PMV_LOGIC_OUTS0", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "CMT_PMV_LOGIC_OUTS2", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "CMT_PMV_LOGIC_OUTS5", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "CMT_PMV_LOGIC_OUTS7", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "CMT_PMV_LOGIC_OUTS8", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "CMT_PMV_LOGIC_OUTS10", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "CMT_PMV_LOGIC_OUTS13", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "CMT_PMV_LOGIC_OUTS15", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "CMT_PMV_LOGIC_OUTS16", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "CMT_PMV_LOGIC_OUTS17", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "CMT_PMV_LOGIC_OUTS18", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "CMT_PMV_LOGIC_OUTS19", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "CMT_PMV_LOGIC_OUTS20", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "CMT_PMV_LOGIC_OUTS21", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "CMT_PMV_LOGIC_OUTS22", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "CMT_PMV_LOGIC_OUTS23", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "CMT_PMV_NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "CMT_PMV_NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "CMT_PMV_NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "CMT_PMV_NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "CMT_PMV_NE4BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "CMT_PMV_NE4BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "CMT_PMV_NE4BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "CMT_PMV_NE4BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "CMT_PMV_NE4C0", + "INT_INTERFACE_NE4C0" + ], + [ + "CMT_PMV_NE4C1", + "INT_INTERFACE_NE4C1" + ], + [ + "CMT_PMV_NE4C2", + "INT_INTERFACE_NE4C2" + ], + [ + "CMT_PMV_NE4C3", + "INT_INTERFACE_NE4C3" + ], + [ + "CMT_PMV_NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "CMT_PMV_NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "CMT_PMV_NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "CMT_PMV_NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "CMT_PMV_NW4A0", + "INT_INTERFACE_NW4A0" + ], + [ + "CMT_PMV_NW4A1", + "INT_INTERFACE_NW4A1" + ], + [ + "CMT_PMV_NW4A2", + "INT_INTERFACE_NW4A2" + ], + [ + "CMT_PMV_NW4A3", + "INT_INTERFACE_NW4A3" + ], + [ + "CMT_PMV_NW4END0", + "INT_INTERFACE_NW4END0" + ], + [ + "CMT_PMV_NW4END1", + "INT_INTERFACE_NW4END1" + ], + [ + "CMT_PMV_NW4END2", + "INT_INTERFACE_NW4END2" + ], + [ + "CMT_PMV_NW4END3", + "INT_INTERFACE_NW4END3" + ], + [ + "CMT_PMV_SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "CMT_PMV_SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "CMT_PMV_SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "CMT_PMV_SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "CMT_PMV_SE4BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "CMT_PMV_SE4BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "CMT_PMV_SE4BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "CMT_PMV_SE4BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "CMT_PMV_SE4C0", + "INT_INTERFACE_SE4C0" + ], + [ + "CMT_PMV_SE4C1", + "INT_INTERFACE_SE4C1" + ], + [ + "CMT_PMV_SE4C2", + "INT_INTERFACE_SE4C2" + ], + [ + "CMT_PMV_SE4C3", + "INT_INTERFACE_SE4C3" + ], + [ + "CMT_PMV_SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "CMT_PMV_SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "CMT_PMV_SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "CMT_PMV_SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "CMT_PMV_SW4A0", + "INT_INTERFACE_SW4A0" + ], + [ + "CMT_PMV_SW4A1", + "INT_INTERFACE_SW4A1" + ], + [ + "CMT_PMV_SW4A2", + "INT_INTERFACE_SW4A2" + ], + [ + "CMT_PMV_SW4A3", + "INT_INTERFACE_SW4A3" + ], + [ + "CMT_PMV_SW4END0", + "INT_INTERFACE_SW4END0" + ], + [ + "CMT_PMV_SW4END1", + "INT_INTERFACE_SW4END1" + ], + [ + "CMT_PMV_SW4END2", + "INT_INTERFACE_SW4END2" + ], + [ + "CMT_PMV_SW4END3", + "INT_INTERFACE_SW4END3" + ], + [ + "CMT_PMV_WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "CMT_PMV_WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "CMT_PMV_WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "CMT_PMV_WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "CMT_PMV_WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "CMT_PMV_WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "CMT_PMV_WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "CMT_PMV_WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "CMT_PMV_WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "CMT_PMV_WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "CMT_PMV_WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "CMT_PMV_WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "CMT_PMV_WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "CMT_PMV_WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "CMT_PMV_WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "CMT_PMV_WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "CMT_PMV_WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "CMT_PMV_WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "CMT_PMV_WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "CMT_PMV_WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "CMT_PMV_WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "CMT_PMV_WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "CMT_PMV_WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "CMT_PMV_WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "CMT_PMV_WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "CMT_PMV_WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "CMT_PMV_WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "CMT_PMV_WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "CMT_PMV_WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "CMT_PMV_WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "CMT_PMV_WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "CMT_PMV_WW4END3", + "INT_INTERFACE_WW4END3" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLK", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "L_TERM_INT_PHASER_TO_IO_ICLKDIV", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLK", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "L_TERM_INT_PHASER_TO_IO_OCLKDIV", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ] + ] + }, + { + "grid_deltas": [ + 0, + -9 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "CMT_TOP_L_LOWER_T" + ], + "wire_pairs": [ + [ + "CMT_L_LOWER_B_CLK_IN1_HCLK", + "CMT_LR_LOWER_T_CLK_IN1_HCLK" + ], + [ + "CMT_L_LOWER_B_CLK_IN2_HCLK", + "CMT_LR_LOWER_T_CLK_IN2_HCLK" + ], + [ + "CMT_L_LOWER_B_CLK_IN3_HCLK", + "CMT_LR_LOWER_T_CLK_IN3_HCLK" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM0", + "CMT_LR_LOWER_T_CLK_MMCM0" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM1", + "CMT_LR_LOWER_T_CLK_MMCM1" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM2", + "CMT_LR_LOWER_T_CLK_MMCM2" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM3", + "CMT_LR_LOWER_T_CLK_MMCM3" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM4", + "CMT_LR_LOWER_T_CLK_MMCM4" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM5", + "CMT_LR_LOWER_T_CLK_MMCM5" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM6", + "CMT_LR_LOWER_T_CLK_MMCM6" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM7", + "CMT_LR_LOWER_T_CLK_MMCM7" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM8", + "CMT_LR_LOWER_T_CLK_MMCM8" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM9", + "CMT_LR_LOWER_T_CLK_MMCM9" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM10", + "CMT_LR_LOWER_T_CLK_MMCM10" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM11", + "CMT_LR_LOWER_T_CLK_MMCM11" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM12", + "CMT_LR_LOWER_T_CLK_MMCM12" + ], + [ + "CMT_L_LOWER_B_CLK_MMCM13", + "CMT_LR_LOWER_T_CLK_MMCM13" + ], + [ + "CMT_L_LOWER_B_CLK_PERF0", + "CMT_LR_LOWER_T_CLK_PERF0" + ], + [ + "CMT_L_LOWER_B_CLK_PERF1", + "CMT_LR_LOWER_T_CLK_PERF1" + ], + [ + "CMT_L_LOWER_B_CLK_PERF2", + "CMT_LR_LOWER_T_CLK_PERF2" + ], + [ + "CMT_L_LOWER_B_CLK_PERF3", + "CMT_LR_LOWER_T_CLK_PERF3" + ], + [ + "CMT_MMCM_A_RDCLK_TOFIFO", + "CMT_PHASER_OUT_A_RDCLK_TOFIFO" + ], + [ + "CMT_MMCM_A_RDEN_TOFIFO", + "CMT_PHASER_OUT_A_RDEN_TOFIFO" + ], + [ + "CMT_MMCM_A_WRCLK_TOFIFO", + "CMT_PHASER_IN_A_WRCLK_TOFIFO" + ], + [ + "CMT_MMCM_A_WREN_TOFIFO", + "CMT_PHASER_IN_A_WREN_TOFIFO" + ], + [ + "CMT_MMCM_PHASERA_CTSBUS0", + "CMT_PHASERA_CTSBUS0" + ], + [ + "CMT_MMCM_PHASERA_CTSBUS1", + "CMT_PHASERA_CTSBUS1" + ], + [ + "CMT_MMCM_PHASERA_DQSBUS0", + "CMT_PHASERA_DQSBUS0" + ], + [ + "CMT_MMCM_PHASERA_DQSBUS1", + "CMT_PHASERA_DQSBUS1" + ], + [ + "CMT_MMCM_PHASERA_DTSBUS0", + "CMT_PHASERA_DTSBUS0" + ], + [ + "CMT_MMCM_PHASERA_DTSBUS1", + "CMT_PHASERA_DTSBUS1" + ], + [ + "CMT_MMCM_PHASERREF0", + "CMT_PHASER_DOWN_PHASERREF0" + ], + [ + "CMT_MMCM_PHASERREF1", + "CMT_PHASER_DOWN_PHASERREF1" + ], + [ + "CMT_MMCM_PHASERREF_ABOVE0", + "CMT_PHASER_DOWN_PHASERREF_ABOVE0" + ], + [ + "CMT_MMCM_PHASERREF_ABOVE1", + "CMT_PHASER_DOWN_PHASERREF_ABOVE1" + ], + [ + "CMT_MMCM_PHASERREF_BELOW0", + "CMT_PHASER_DOWN_PHASERREF_BELOW0" + ], + [ + "CMT_MMCM_PHASERREF_BELOW1", + "CMT_PHASER_DOWN_PHASERREF_BELOW1" + ], + [ + "CMT_MMCM_PHASER_IN_A_ICLK", + "CMT_PHASER_IN_A_ICLK" + ], + [ + "CMT_MMCM_PHASER_IN_A_ICLKDIV", + "CMT_PHASER_IN_A_ICLKDIV" + ], + [ + "CMT_MMCM_PHASER_IN_B_ICLK", + "CMT_PHASER_B_TOMMCM_ICLK" + ], + [ + "CMT_MMCM_PHASER_IN_B_ICLKDIV", + "CMT_PHASER_B_TOMMCM_ICLKDIV" + ], + [ + "CMT_MMCM_PHASER_OUT_A_OCLK", + "CMT_PHASER_OUT_A_OCLK" + ], + [ + "CMT_MMCM_PHASER_OUT_A_OCLK1X_90", + "CMT_PHASER_OUT_A_OCLK1X_90" + ], + [ + "CMT_MMCM_PHASER_OUT_A_OCLKDIV", + "CMT_PHASER_OUT_A_OCLKDIV" + ], + [ + "CMT_MMCM_PHASER_OUT_B_OCLK", + "CMT_PHASER_B_TOMMCM_OCLK" + ], + [ + "CMT_MMCM_PHASER_OUT_B_OCLKDIV", + "CMT_PHASER_B_TOMMCM_OCLKDIV" + ], + [ + "CMT_MMCM_PHYCTRL_SYNC_BB_UP", + "CMT_PHASER_BOT_SYNC_BB" + ], + [ + "MMCMOUT_CLK_FREQ_BB_0", + "MMCMOUT_CLK_FREQ_BB_REBUFIN0" + ], + [ + "MMCMOUT_CLK_FREQ_BB_1", + "MMCMOUT_CLK_FREQ_BB_REBUFIN1" + ], + [ + "MMCMOUT_CLK_FREQ_BB_2", + "MMCMOUT_CLK_FREQ_BB_REBUFIN2" + ], + [ + "MMCMOUT_CLK_FREQ_BB_3", + "MMCMOUT_CLK_FREQ_BB_REBUFIN3" + ], + [ + "MMCM_CLK_FREQ_BB_NS0", + "MMCM_CLK_FREQBB_REBUFOUT0" + ], + [ + "MMCM_CLK_FREQ_BB_NS1", + "MMCM_CLK_FREQBB_REBUFOUT1" + ], + [ + "MMCM_CLK_FREQ_BB_NS2", + "MMCM_CLK_FREQBB_REBUFOUT2" + ], + [ + "MMCM_CLK_FREQ_BB_NS3", + "MMCM_CLK_FREQBB_REBUFOUT3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 9 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "TERM_CMT" + ], + "wire_pairs": [ + [ + "MMCM_CLK_FREQ_BB_REBUF0_NS", + "TERM_CMT_FREQ_REF_NS0" + ], + [ + "MMCM_CLK_FREQ_BB_REBUF1_NS", + "TERM_CMT_FREQ_REF_NS1" + ], + [ + "MMCM_CLK_FREQ_BB_REBUF2_NS", + "TERM_CMT_FREQ_REF_NS2" + ], + [ + "MMCM_CLK_FREQ_BB_REBUF3_NS", + "TERM_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_15", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_15", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_15", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_15", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_15", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_15", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_15", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_15", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_15", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_15", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_15", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_15", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_15", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_15", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_15", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_15", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_15", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_15", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_15", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_15", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_15", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_15", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_15", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_15", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_15", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_15", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_15", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_15", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_15", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_15", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_15", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_15", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_15", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_15", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_15", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_15", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_15", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_15", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_15", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_15", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_15", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_15", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_15", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_15", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_15", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_15", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_15", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_15", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_15", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_15", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_15", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_15", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_15", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_15", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_15", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_15", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_15", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_15", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_15", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_15", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_15", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_15", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_15", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_15", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_15", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_15", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_15", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_15", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_15", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_15", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_15", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_15", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_15", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_15", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_15", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_15", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_15", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_15", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_15", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_15", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_15", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_15", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_15", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_15", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_15", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_15", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_15", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_15", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_15", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_15", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_15", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_15", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_15", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_15", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_15", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_15", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_15", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_15", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_15", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_15", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_15", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_15", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_15", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_15", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_15", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_15", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_15", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_15", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_15", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_15", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_15", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_15", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_15", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_15", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_15", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_15", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_15", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_15", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_15", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_15", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_15", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_15", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_15", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_15", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_15", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_15", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_14", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_14", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_14", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_14", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_14", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_14", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_14", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_14", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_14", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_14", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_14", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_14", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_14", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_14", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_14", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_14", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_14", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_14", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_14", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_14", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_14", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_14", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_14", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_14", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_14", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_14", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_14", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_14", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_14", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_14", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_14", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_14", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_14", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_14", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_14", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_14", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_14", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_14", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_14", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_14", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_14", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_14", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_14", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_14", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_14", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_14", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_14", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_14", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_14", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_14", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_14", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_14", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_14", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_14", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_14", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_14", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_14", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_14", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_14", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_14", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_14", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_14", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_14", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_14", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_14", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_14", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_14", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_14", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_14", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_14", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_14", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_14", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_14", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_14", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_14", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_14", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_14", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_14", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_14", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_14", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_14", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_14", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_14", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_14", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_14", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_14", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_14", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_14", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_14", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_14", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_14", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_14", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_14", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_14", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_14", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_14", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_14", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_14", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_14", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_14", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_14", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_14", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_14", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_14", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_14", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_14", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_14", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_14", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_14", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_14", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_14", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_14", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_14", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_14", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_14", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_14", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_14", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_14", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_14", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_14", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_14", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_14", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_14", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_14", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_13", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_13", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_13", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_13", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_13", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_13", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_13", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_13", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_13", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_13", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_13", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_13", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_13", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_13", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_13", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_13", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_13", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_13", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_13", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_13", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_13", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_13", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_13", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_13", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_13", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_13", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_13", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_13", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_13", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_13", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_13", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_13", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_13", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_13", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_13", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_13", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_13", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_13", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_13", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_13", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_13", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_13", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_13", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_13", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_13", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_13", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_13", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_13", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_13", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_13", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_13", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_13", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_13", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_13", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_13", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_13", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_13", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_13", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_13", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_13", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_13", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_13", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_13", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_13", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_13", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_13", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_13", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_13", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_13", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_13", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_13", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_13", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_13", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_13", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_13", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_13", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_13", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_13", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_13", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_13", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_13", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_13", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_13", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_13", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_13", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_13", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_13", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_13", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_13", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_13", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_13", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_13", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_13", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_13", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_13", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_13", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_13", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_13", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_13", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_13", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_13", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_13", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_13", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_13", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_13", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_13", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_13", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_13", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_13", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_13", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_13", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_13", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_13", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_13", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_13", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_13", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_13", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_13", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_13", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_13", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_13", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_13", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_13", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_13", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_13", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_13", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_12", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_12", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_12", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_12", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_12", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_12", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_12", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_12", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_12", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_12", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_12", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_12", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_12", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_12", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_12", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_12", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_12", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_12", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_12", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_12", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_12", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_12", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_12", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_12", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_12", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_12", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_12", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_12", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_12", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_12", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_12", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_12", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_12", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_12", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_12", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_12", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_12", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_12", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_12", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_12", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_12", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_12", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_12", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_12", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_12", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_12", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_12", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_12", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_12", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_12", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_12", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_12", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_12", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_12", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_12", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_12", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_12", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_12", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_12", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_12", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_12", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_12", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_12", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_12", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_12", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_12", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_12", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_12", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_12", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_12", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_12", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_12", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_12", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_12", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_12", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_12", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_12", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_12", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_12", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_12", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_12", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_12", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_12", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_12", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_12", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_12", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_12", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_12", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_12", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_12", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_12", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_12", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_12", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_12", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_12", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_12", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_12", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_12", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_12", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_12", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_12", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_12", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_12", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_12", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_12", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_12", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_12", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_12", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_12", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_12", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_12", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_12", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_12", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_12", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_12", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_12", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_12", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_12", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_12", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_12", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_12", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_12", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_12", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_12", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_11", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_11", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_11", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_11", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_11", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_11", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_11", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_11", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_11", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_11", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_11", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_11", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_11", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_11", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_11", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_11", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_11", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_11", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_11", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_11", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_11", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_11", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_11", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_11", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_11", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_11", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_11", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_11", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_11", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_11", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_11", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_11", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_11", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_11", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_11", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_11", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_11", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_11", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_11", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_11", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_11", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_11", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_11", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_11", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_11", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_11", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_11", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_11", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_11", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_11", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_11", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_11", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_11", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_11", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_11", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_11", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_11", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_11", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_11", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_11", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_11", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_11", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_11", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_11", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_11", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_11", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_11", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_11", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_11", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_11", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_11", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_11", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_11", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_11", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_11", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_11", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_11", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_11", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_11", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_11", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_11", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_11", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_11", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_11", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_11", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_11", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_11", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_11", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_11", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_11", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_11", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_11", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_11", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_11", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_11", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_11", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_11", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_11", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_11", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_11", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_11", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_11", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_11", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_11", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_11", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_11", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_11", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_11", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_11", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_11", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_11", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_11", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_11", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_11", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_11", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_11", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_11", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_11", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_11", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_11", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_11", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_11", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_11", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_11", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_11", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_11", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_10", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_10", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_10", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_10", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_10", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_10", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_10", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_10", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_10", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_10", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_10", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_10", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_10", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_10", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_10", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_10", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_10", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_10", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_10", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_10", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_10", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_10", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_10", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_10", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_10", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_10", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_10", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_10", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_10", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_10", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_10", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_10", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_10", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_10", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_10", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_10", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_10", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_10", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_10", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_10", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_10", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_10", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_10", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_10", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_10", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_10", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_10", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_10", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_10", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_10", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_10", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_10", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_10", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_10", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_10", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_10", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_10", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_10", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_10", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_10", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_10", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_10", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_10", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_10", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_10", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_10", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_10", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_10", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_10", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_10", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_10", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_10", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_10", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_10", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_10", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_10", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_10", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_10", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_10", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_10", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_10", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_10", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_10", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_10", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_10", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_10", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_10", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_10", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_10", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_10", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_10", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_10", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_10", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_10", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_10", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_10", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_10", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_10", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_10", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_10", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_10", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_10", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_10", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_10", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_10", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_10", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_10", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_10", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_10", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_10", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_10", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_10", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_10", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_10", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_10", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_10", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_10", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_10", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_10", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_10", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_10", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_10", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_10", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_10", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_9", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_9", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_9", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_9", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_9", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_9", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_9", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_9", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_9", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_9", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_9", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_9", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_9", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_9", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_9", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_9", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_9", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_9", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_9", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_9", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_9", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_9", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_9", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_9", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_9", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_9", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_9", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_9", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_9", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_9", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_9", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_9", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_9", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_9", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_9", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_9", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_9", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_9", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_9", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_9", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_9", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_9", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_9", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_9", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_9", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_9", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_9", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_9", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_9", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_9", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_9", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_9", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_9", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_9", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_9", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_9", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_9", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_9", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_9", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_9", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_9", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_9", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_9", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_9", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_9", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_9", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_9", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_9", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_9", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_9", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_9", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_9", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_9", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_9", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_9", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_9", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_9", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_9", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_9", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_9", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_9", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_9", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_9", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_9", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_9", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_9", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_9", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_9", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_9", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_9", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_9", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_9", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_9", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_9", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_9", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_9", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_9", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_9", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_9", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_9", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_9", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_9", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_9", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_9", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_9", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_9", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_9", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_9", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_9", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_9", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_9", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_9", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_9", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_9", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_9", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_9", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_9", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_9", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_9", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_9", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_9", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_9", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_9", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_9", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_9", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_9", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_7", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_7", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_5", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_5", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 6 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 7 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 8 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -8 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "HCLK_CMT_L" + ], + "wire_pairs": [ + [ + "CMT_BOT_HCLKMUX_CLKINT_0", + "HCLK_CMT_MUX_CLKINT_0" + ], + [ + "CMT_BOT_HCLKMUX_CLKINT_1", + "HCLK_CMT_MUX_CLKINT_1" + ], + [ + "CMT_LR_LOWER_T_CLK_IN1_HCLK", + "HCLK_CMT_MUX_MMCM_CLKIN1" + ], + [ + "CMT_LR_LOWER_T_CLK_IN2_HCLK", + "HCLK_CMT_MUX_MMCM_CLKIN2" + ], + [ + "CMT_LR_LOWER_T_CLK_IN3_HCLK", + "HCLK_CMT_MUX_MMCM_CLKFBIN" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM0", + "HCLK_CMT_MUX_CLK_MMCM0" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM1", + "HCLK_CMT_MUX_CLK_MMCM1" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM2", + "HCLK_CMT_MUX_CLK_MMCM2" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM3", + "HCLK_CMT_MUX_CLK_MMCM3" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM4", + "HCLK_CMT_MUX_CLK_MMCM4" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM5", + "HCLK_CMT_MUX_CLK_MMCM5" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM6", + "HCLK_CMT_MUX_CLK_MMCM6" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM7", + "HCLK_CMT_MUX_CLK_MMCM7" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM8", + "HCLK_CMT_MUX_CLK_MMCM8" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM9", + "HCLK_CMT_MUX_CLK_MMCM9" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM10", + "HCLK_CMT_MUX_CLK_MMCM10" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM11", + "HCLK_CMT_MUX_CLK_MMCM11" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM12", + "HCLK_CMT_MUX_CLK_MMCM12" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM13", + "HCLK_CMT_MUX_CLK_MMCM13" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF0", + "HCLK_CMT_MUX_MMCM_MUXED0" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF1", + "HCLK_CMT_MUX_MMCM_MUXED1" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF2", + "HCLK_CMT_MUX_MMCM_MUXED2" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF3", + "HCLK_CMT_MUX_MMCM_MUXED3" + ], + [ + "CMT_PHASER_BOT_ENCALIB0", + "HCLK_CMT_ECALIB0" + ], + [ + "CMT_PHASER_BOT_ENCALIB1", + "HCLK_CMT_ECALIB1" + ], + [ + "CMT_PHASER_BOT_IBURSTPENDING0", + "HCLK_CMT_IBURSTPENDING0" + ], + [ + "CMT_PHASER_BOT_IBURSTPENDING1", + "HCLK_CMT_IBURSTPENDING1" + ], + [ + "CMT_PHASER_BOT_IRANKA0", + "HCLK_CMT_PHY_CONTROL_IRANKA0" + ], + [ + "CMT_PHASER_BOT_IRANKA1", + "HCLK_CMT_PHY_CONTROL_IRANKA1" + ], + [ + "CMT_PHASER_BOT_IRANKB0", + "HCLK_CMT_PHY_CONTROL_IRANKB0" + ], + [ + "CMT_PHASER_BOT_IRANKB1", + "HCLK_CMT_PHY_CONTROL_IRANKB1" + ], + [ + "CMT_PHASER_BOT_OBURSTPENDING0", + "HCLK_CMT_OBURSTPENDING0" + ], + [ + "CMT_PHASER_BOT_OBURSTPENDING1", + "HCLK_CMT_OBURSTPENDING1" + ], + [ + "CMT_PHASER_BOT_REFMUX_0", + "HCLK_CMT_FREQ_PHASER_REFMUX_0" + ], + [ + "CMT_PHASER_BOT_REFMUX_1", + "HCLK_CMT_FREQ_PHASER_REFMUX_1" + ], + [ + "CMT_PHASER_BOT_REFMUX_2", + "HCLK_CMT_FREQ_PHASER_REFMUX_2" + ], + [ + "CMT_PHASER_BOT_SYNC_BB", + "HCLK_CMT_PHY_SYNC_BB" + ], + [ + "CMT_PHASER_DOWN_PHASERREF0", + "HCLK_CMT_BUFMR_PHASEREF0" + ], + [ + "CMT_PHASER_DOWN_PHASERREF1", + "HCLK_CMT_BUFMR_PHASEREF1" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_ABOVE0", + "HCLK_CMT_PHASEREF_ABOVE0" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_ABOVE1", + "HCLK_CMT_PHASEREF_ABOVE1" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_BELOW0", + "HCLK_CMT_PHASEREF_BELOW0" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_BELOW1", + "HCLK_CMT_PHASEREF_BELOW1" + ], + [ + "CMT_PHASER_IN_A_RCLK0", + "HCLK_CMT_PHASERIN_RCLK0" + ], + [ + "CMT_PHASER_IN_B_RCLK1", + "HCLK_CMT_PHASERIN_RCLK1" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT0", + "HCLK_CMT_FREQ_REF_NS0" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT1", + "HCLK_CMT_FREQ_REF_NS1" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT2", + "HCLK_CMT_FREQ_REF_NS2" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT3", + "HCLK_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_7", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_7", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_5", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_5", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CMT_TOP_L_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -13 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "CMT_TOP_L_UPPER_T" + ], + "wire_pairs": [ + [ + "CMT_PHASERD_CTSBUS0", + "CMT_PLL_PHASERD_CTSBUS0" + ], + [ + "CMT_PHASERD_CTSBUS1", + "CMT_PLL_PHASERD_CTSBUS1" + ], + [ + "CMT_PHASERD_DQSBUS0", + "CMT_PLL_PHASERD_DQSBUS0" + ], + [ + "CMT_PHASERD_DQSBUS1", + "CMT_PLL_PHASERD_DQSBUS1" + ], + [ + "CMT_PHASERD_DTSBUS0", + "CMT_PLL_PHASERD_DTSBUS0" + ], + [ + "CMT_PHASERD_DTSBUS1", + "CMT_PLL_PHASERD_DTSBUS1" + ], + [ + "CMT_PHASER_IN_D_ICLK", + "CMT_PLL_PHASER_IN_D_ICLK" + ], + [ + "CMT_PHASER_IN_D_ICLKDIV", + "CMT_PLL_PHASER_IN_D_ICLKDIV" + ], + [ + "CMT_PHASER_IN_D_WRENABLE_FIFO", + "CMT_PLL_PHASER_WRENABLE_TOFIFO" + ], + [ + "CMT_PHASER_OUT_D_OCLK", + "CMT_PLL_PHASER_OUT_D_OCLK" + ], + [ + "CMT_PHASER_OUT_D_OCLK1X_90", + "CMT_PLL_PHASER_OUT_D_OCLK1X_90" + ], + [ + "CMT_PHASER_OUT_D_OCLKDIV", + "CMT_PLL_PHASER_OUT_D_OCLKDIV" + ], + [ + "CMT_PHASER_TOP_SYNC_BB", + "CMT_PLL_PHYCTRL_SYNC_BB_DN" + ], + [ + "CMT_PHASER_UP_PHASERREF0", + "CMT_PLL_PHASERREF0" + ], + [ + "CMT_PHASER_UP_PHASERREF1", + "CMT_PLL_PHASERREF1" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE0", + "CMT_PLL_PHASERREF_ABOVE0" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE1", + "CMT_PLL_PHASERREF_ABOVE1" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW0", + "CMT_PLL_PHASERREF_BELOW0" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW1", + "CMT_PLL_PHASERREF_BELOW1" + ], + [ + "CMT_R_PHASER_IN_D_WRCLK_TOFIFO", + "CMT_PLL_PHASER_WRCLK_TOFIFO" + ], + [ + "CMT_R_PHASER_OUT_D_RDCLK_TOFIFO", + "CMT_PLL_PHASER_RDCLK_TOFIFO" + ], + [ + "CMT_R_PHASER_OUT_D_RDENABLE_TOFIFO", + "CMT_PLL_PHASER_RDENABLE_TOFIFO" + ], + [ + "CMT_R_TOP_UPPER_B_CLKFBIN", + "CMT_TOP_L_UPPER_T_CLKFBIN" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN1", + "CMT_TOP_L_UPPER_T_CLKIN1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN2", + "CMT_TOP_L_UPPER_T_CLKIN2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL0", + "CMT_TOP_L_UPPER_T_CLKPLL0" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL1", + "CMT_TOP_L_UPPER_T_CLKPLL1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL2", + "CMT_TOP_L_UPPER_T_CLKPLL2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL3", + "CMT_TOP_L_UPPER_T_CLKPLL3" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL4", + "CMT_TOP_L_UPPER_T_CLKPLL4" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL5", + "CMT_TOP_L_UPPER_T_CLKPLL5" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL6", + "CMT_TOP_L_UPPER_T_CLKPLL6" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL7", + "CMT_TOP_L_UPPER_T_CLKPLL7" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN0", + "PLLOUT_CLK_FREQ_BB_0" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN1", + "PLLOUT_CLK_FREQ_BB_1" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN2", + "PLLOUT_CLK_FREQ_BB_2" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN3", + "PLLOUT_CLK_FREQ_BB_3" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT0", + "PLL_CLK_FREQ_BB0_NS" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT1", + "PLL_CLK_FREQ_BB1_NS" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT2", + "PLL_CLK_FREQ_BB2_NS" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT3", + "PLL_CLK_FREQ_BB3_NS" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "HCLK_CMT_L" + ], + "wire_pairs": [ + [ + "CMT_FREQ_PHASER_REFMUX_0", + "HCLK_CMT_FREQ_PHASER_REFMUX_0" + ], + [ + "CMT_FREQ_PHASER_REFMUX_1", + "HCLK_CMT_FREQ_PHASER_REFMUX_1" + ], + [ + "CMT_FREQ_PHASER_REFMUX_2", + "HCLK_CMT_FREQ_PHASER_REFMUX_2" + ], + [ + "CMT_L_TOP_UPPER_B_CLKINT_2", + "HCLK_CMT_MUX_CLKINT_2" + ], + [ + "CMT_L_TOP_UPPER_B_CLKINT_3", + "HCLK_CMT_MUX_CLKINT_3" + ], + [ + "CMT_PHASER_IN_C_RCLK2", + "HCLK_CMT_PHASERIN_RCLK2" + ], + [ + "CMT_PHASER_IN_D_RCLK3", + "HCLK_CMT_PHASERIN_RCLK3" + ], + [ + "CMT_PHASER_REF_CLKOUT_TOHCLK", + "HCLK_CMT_PREF_CLKOUT" + ], + [ + "CMT_PHASER_REF_TMUXOUT_TOHCLK", + "HCLK_CMT_PREF_TMUXOUT" + ], + [ + "CMT_PHASER_TOP_SYNC_BB", + "HCLK_CMT_PHY_SYNC_BB" + ], + [ + "CMT_PHASER_UP_BUFMRCE_CE0", + "HCLK_CMT_BUFMR_CE0" + ], + [ + "CMT_PHASER_UP_BUFMRCE_CE1", + "HCLK_CMT_BUFMR_CE1" + ], + [ + "CMT_PHASER_UP_PHASERREF0", + "HCLK_CMT_BUFMR_PHASEREF0" + ], + [ + "CMT_PHASER_UP_PHASERREF1", + "HCLK_CMT_BUFMR_PHASEREF1" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE0", + "HCLK_CMT_PHASEREF_ABOVE0" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE1", + "HCLK_CMT_PHASEREF_ABOVE1" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW0", + "HCLK_CMT_PHASEREF_BELOW0" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW1", + "HCLK_CMT_PHASEREF_BELOW1" + ], + [ + "CMT_PHY_CONTROL_ECALIB0", + "HCLK_CMT_ECALIB0" + ], + [ + "CMT_PHY_CONTROL_ECALIB1", + "HCLK_CMT_ECALIB1" + ], + [ + "CMT_PHY_CONTROL_IBURSTPENDING0", + "HCLK_CMT_IBURSTPENDING0" + ], + [ + "CMT_PHY_CONTROL_IBURSTPENDING1", + "HCLK_CMT_IBURSTPENDING1" + ], + [ + "CMT_PHY_CONTROL_IRANKA0", + "HCLK_CMT_PHY_CONTROL_IRANKA0" + ], + [ + "CMT_PHY_CONTROL_IRANKA1", + "HCLK_CMT_PHY_CONTROL_IRANKA1" + ], + [ + "CMT_PHY_CONTROL_IRANKB0", + "HCLK_CMT_PHY_CONTROL_IRANKB0" + ], + [ + "CMT_PHY_CONTROL_IRANKB1", + "HCLK_CMT_PHY_CONTROL_IRANKB1" + ], + [ + "CMT_PHY_CONTROL_OBURSTPENDING0", + "HCLK_CMT_OBURSTPENDING0" + ], + [ + "CMT_PHY_CONTROL_OBURSTPENDING1", + "HCLK_CMT_OBURSTPENDING1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKFBIN", + "HCLK_CMT_MUX_PLLE2_CLKFBIN" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN1", + "HCLK_CMT_MUX_PLLE2_CLKIN1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN2", + "HCLK_CMT_MUX_PLLE2_CLKIN2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL0", + "HCLK_CMT_MUX_CLK_PLL0" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL1", + "HCLK_CMT_MUX_CLK_PLL1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL2", + "HCLK_CMT_MUX_CLK_PLL2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL3", + "HCLK_CMT_MUX_CLK_PLL3" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL4", + "HCLK_CMT_MUX_CLK_PLL4" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL5", + "HCLK_CMT_MUX_CLK_PLL5" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL6", + "HCLK_CMT_MUX_CLK_PLL6" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL7", + "HCLK_CMT_MUX_CLK_PLL7" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT0", + "HCLK_CMT_FREQ_REF_NS0" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT1", + "HCLK_CMT_FREQ_REF_NS1" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT2", + "HCLK_CMT_FREQ_REF_NS2" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT3", + "HCLK_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_11", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_11", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_11", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_11", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_11", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_11", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_11", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_11", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_11", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_11", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_11", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_11", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_11", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_11", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_11", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_11", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_11", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_11", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_11", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_11", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_11", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_11", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_11", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_11", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_11", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_11", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_11", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_11", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_11", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_11", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_11", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_11", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_11", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_11", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_11", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_11", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_11", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_11", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_11", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_11", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_11", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_11", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_11", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_11", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_11", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_11", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_11", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_11", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_11", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_11", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_11", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_11", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_11", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_11", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_11", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_11", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_11", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_11", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_11", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_11", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_11", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_11", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_11", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_11", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_11", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_11", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_11", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_11", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_11", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_11", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_11", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_11", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_11", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_11", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_11", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_11", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_11", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_11", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_11", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_11", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_11", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_11", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_11", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_11", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_11", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_11", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_11", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_11", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_11", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_11", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_11", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_11", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_11", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_11", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_11", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_11", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_11", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_11", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_11", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_11", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_11", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_11", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_11", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_11", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_11", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_11", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_11", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_11", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_11", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_11", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_11", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_11", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_11", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_11", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_11", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_11", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_11", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_11", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_11", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_11", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_11", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_11", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_11", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_11", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_10", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_10", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_10", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_10", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_10", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_10", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_10", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_10", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_10", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_10", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_10", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_10", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_10", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_10", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_10", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_10", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_10", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_10", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_10", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_10", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_10", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_10", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_10", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_10", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_10", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_10", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_10", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_10", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_10", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_10", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_10", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_10", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_10", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_10", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_10", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_10", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_10", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_10", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_10", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_10", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_10", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_10", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_10", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_10", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_10", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_10", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_10", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_10", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_10", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_10", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_10", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_10", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_10", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_10", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_10", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_10", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_10", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_10", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_10", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_10", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_10", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_10", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_10", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_10", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_10", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_10", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_10", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_10", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_10", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_10", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_10", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_10", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_10", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_10", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_10", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_10", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_10", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_10", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_10", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_10", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_10", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_10", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_10", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_10", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_10", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_10", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_10", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_10", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_10", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_10", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_10", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_10", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_10", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_10", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_10", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_10", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_10", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_10", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_10", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_10", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_10", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_10", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_10", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_10", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_10", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_10", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_10", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_10", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_10", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_10", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_10", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_10", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_10", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_10", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_10", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_10", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_10", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_10", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_10", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_10", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_10", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_10", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_10", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_10", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_10", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_10", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_9", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_9", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_9", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_9", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_9", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_9", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_9", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_9", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_9", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_9", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_9", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_9", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_9", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_9", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_9", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_9", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_9", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_9", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_9", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_9", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_9", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_9", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_9", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_9", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_9", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_9", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_9", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_9", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_9", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_9", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_9", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_9", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_9", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_9", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_9", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_9", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_9", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_9", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_9", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_9", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_9", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_9", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_9", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_9", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_9", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_9", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_9", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_9", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_9", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_9", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_9", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_9", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_9", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_9", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_9", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_9", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_9", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_9", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_9", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_9", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_9", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_9", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_9", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_9", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_9", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_9", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_9", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_9", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_9", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_9", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_9", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_9", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_9", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_9", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_9", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_9", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_9", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_9", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_9", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_9", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_9", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_9", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_9", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_9", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_9", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_9", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_9", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_9", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_9", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_9", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_9", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_9", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_9", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_9", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_9", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_9", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_9", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_9", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_9", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_9", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_9", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_9", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_9", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_9", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_9", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_9", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_9", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_9", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_9", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_9", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_9", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_9", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_9", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_9", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_9", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_9", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_9", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_9", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_9", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_9", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_9", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_9", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_9", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_9", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_8", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_8", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_12", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_12", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_12", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_12", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_12", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_12", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_12", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_12", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_12", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_12", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_12", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_12", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_12", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_12", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_12", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_12", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_12", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_12", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_12", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_12", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_12", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_12", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_12", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_12", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_12", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_12", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_12", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_12", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_12", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_12", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_12", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_12", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_12", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_12", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_12", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_12", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_12", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_12", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_12", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_12", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_12", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_12", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_12", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_12", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_12", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_12", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_12", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_12", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_12", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_12", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_12", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_12", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_12", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_12", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_12", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_12", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_12", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_12", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_12", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_12", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_12", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_12", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_12", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_12", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_12", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_12", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_12", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_12", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_12", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_12", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_12", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_12", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_12", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_12", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_12", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_12", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_12", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_12", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_12", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_12", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_12", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_12", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_12", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_12", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_12", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_12", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_12", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_12", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_12", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_12", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_12", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_12", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_12", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_12", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_12", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_12", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_12", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_12", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_12", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_12", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_12", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_12", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_12", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_12", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_12", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_12", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_12", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_12", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_12", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_12", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_12", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_12", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_12", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_12", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_12", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_12", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_12", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_12", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_12", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_12", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_12", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_12", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_12", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_12", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_11", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_11", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_11", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_11", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_11", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_11", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_11", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_11", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_11", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_11", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_11", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_11", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_11", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_11", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_11", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_11", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_11", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_11", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_11", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_11", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_11", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_11", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_11", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_11", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_11", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_11", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_11", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_11", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_11", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_11", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_11", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_11", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_11", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_11", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_11", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_11", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_11", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_11", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_11", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_11", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_11", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_11", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_11", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_11", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_11", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_11", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_11", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_11", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_11", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_11", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_11", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_11", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_11", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_11", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_11", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_11", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_11", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_11", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_11", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_11", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_11", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_11", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_11", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_11", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_11", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_11", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_11", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_11", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_11", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_11", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_11", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_11", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_11", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_11", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_11", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_11", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_11", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_11", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_11", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_11", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_11", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_11", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_11", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_11", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_11", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_11", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_11", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_11", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_11", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_11", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_11", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_11", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_11", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_11", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_11", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_11", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_11", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_11", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_11", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_11", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_11", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_11", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_11", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_11", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_11", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_11", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_11", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_11", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_11", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_11", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_11", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_11", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_11", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_11", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_11", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_11", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_11", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_11", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_11", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_11", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_11", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_11", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_11", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_11", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_10", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_10", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_10", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_10", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_10", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_10", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_10", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_10", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_10", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_10", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_10", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_10", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_10", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_10", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_10", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_10", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_10", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_10", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_10", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_10", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_10", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_10", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_10", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_10", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_10", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_10", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_10", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_10", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_10", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_10", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_10", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_10", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_10", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_10", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_10", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_10", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_10", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_10", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_10", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_10", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_10", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_10", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_10", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_10", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_10", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_10", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_10", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_10", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_10", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_10", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_10", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_10", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_10", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_10", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_10", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_10", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_10", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_10", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_10", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_10", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_10", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_10", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_10", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_10", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_10", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_10", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_10", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_10", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_10", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_10", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_10", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_10", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_10", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_10", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_10", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_10", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_10", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_10", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_10", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_10", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_10", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_10", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_10", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_10", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_10", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_10", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_10", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_10", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_10", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_10", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_10", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_10", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_10", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_10", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_10", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_10", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_10", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_10", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_10", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_10", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_10", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_10", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_10", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_10", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_10", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_10", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_10", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_10", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_10", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_10", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_10", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_10", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_10", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_10", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_10", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_10", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_10", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_10", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_10", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_10", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_10", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_10", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_10", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_10", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_10", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_10", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_9", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_9", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_9", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_9", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_9", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_9", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_9", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_9", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_9", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_9", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_9", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_9", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_9", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_9", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_9", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_9", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_9", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_9", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_9", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_9", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_9", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_9", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_9", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_9", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_9", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_9", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_9", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_9", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_9", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_9", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_9", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_9", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_9", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_9", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_9", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_9", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_9", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_9", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_9", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_9", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_9", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_9", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_9", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_9", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_9", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_9", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_9", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_9", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_9", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_9", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_9", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_9", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_9", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_9", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_9", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_9", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_9", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_9", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_9", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_9", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_9", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_9", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_9", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_9", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_9", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_9", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_9", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_9", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_9", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_9", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_9", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_9", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_9", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_9", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_9", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_9", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_9", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_9", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_9", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_9", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_9", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_9", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_9", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_9", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_9", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_9", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_9", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_9", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_9", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_9", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_9", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_9", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_9", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_9", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_9", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_9", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_9", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_9", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_9", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_9", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_9", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_9", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_9", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_9", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_9", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_9", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_9", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_9", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_9", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_9", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_9", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_9", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_9", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_9", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_9", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_9", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_9", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_9", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_9", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_9", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_9", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_9", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_9", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_9", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_8", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_8", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "CMT_TOP_L_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -9 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "CMT_TOP_R_LOWER_T" + ], + "wire_pairs": [ + [ + "CMT_MMCM_A_RDCLK_TOFIFO", + "CMT_PHASER_OUT_A_RDCLK_TOFIFO" + ], + [ + "CMT_MMCM_A_RDEN_TOFIFO", + "CMT_PHASER_OUT_A_RDEN_TOFIFO" + ], + [ + "CMT_MMCM_A_WRCLK_TOFIFO", + "CMT_PHASER_IN_A_WRCLK_TOFIFO" + ], + [ + "CMT_MMCM_A_WREN_TOFIFO", + "CMT_PHASER_IN_A_WREN_TOFIFO" + ], + [ + "CMT_MMCM_PHASERA_CTSBUS0", + "CMT_PHASERA_CTSBUS0" + ], + [ + "CMT_MMCM_PHASERA_CTSBUS1", + "CMT_PHASERA_CTSBUS1" + ], + [ + "CMT_MMCM_PHASERA_DQSBUS0", + "CMT_PHASERA_DQSBUS0" + ], + [ + "CMT_MMCM_PHASERA_DQSBUS1", + "CMT_PHASERA_DQSBUS1" + ], + [ + "CMT_MMCM_PHASERA_DTSBUS0", + "CMT_PHASERA_DTSBUS0" + ], + [ + "CMT_MMCM_PHASERA_DTSBUS1", + "CMT_PHASERA_DTSBUS1" + ], + [ + "CMT_MMCM_PHASERREF0", + "CMT_PHASER_DOWN_PHASERREF0" + ], + [ + "CMT_MMCM_PHASERREF1", + "CMT_PHASER_DOWN_PHASERREF1" + ], + [ + "CMT_MMCM_PHASERREF_ABOVE0", + "CMT_PHASER_DOWN_PHASERREF_ABOVE0" + ], + [ + "CMT_MMCM_PHASERREF_ABOVE1", + "CMT_PHASER_DOWN_PHASERREF_ABOVE1" + ], + [ + "CMT_MMCM_PHASERREF_BELOW0", + "CMT_PHASER_DOWN_PHASERREF_BELOW0" + ], + [ + "CMT_MMCM_PHASERREF_BELOW1", + "CMT_PHASER_DOWN_PHASERREF_BELOW1" + ], + [ + "CMT_MMCM_PHASER_IN_A_ICLK", + "CMT_PHASER_IN_A_ICLK" + ], + [ + "CMT_MMCM_PHASER_IN_A_ICLKDIV", + "CMT_PHASER_IN_A_ICLKDIV" + ], + [ + "CMT_MMCM_PHASER_IN_B_ICLK", + "CMT_PHASER_B_TOMMCM_ICLK" + ], + [ + "CMT_MMCM_PHASER_IN_B_ICLKDIV", + "CMT_PHASER_B_TOMMCM_ICLKDIV" + ], + [ + "CMT_MMCM_PHASER_OUT_A_OCLK", + "CMT_PHASER_OUT_A_OCLK" + ], + [ + "CMT_MMCM_PHASER_OUT_A_OCLK1X_90", + "CMT_PHASER_OUT_A_OCLK1X_90" + ], + [ + "CMT_MMCM_PHASER_OUT_A_OCLKDIV", + "CMT_PHASER_OUT_A_OCLKDIV" + ], + [ + "CMT_MMCM_PHASER_OUT_B_OCLK", + "CMT_PHASER_B_TOMMCM_OCLK" + ], + [ + "CMT_MMCM_PHASER_OUT_B_OCLKDIV", + "CMT_PHASER_B_TOMMCM_OCLKDIV" + ], + [ + "CMT_MMCM_PHYCTRL_SYNC_BB_UP", + "CMT_PHASER_BOT_SYNC_BB" + ], + [ + "CMT_R_LOWER_B_CLK_IN1_HCLK", + "CMT_LR_LOWER_T_CLK_IN1_HCLK" + ], + [ + "CMT_R_LOWER_B_CLK_IN2_HCLK", + "CMT_LR_LOWER_T_CLK_IN2_HCLK" + ], + [ + "CMT_R_LOWER_B_CLK_IN3_HCLK", + "CMT_LR_LOWER_T_CLK_IN3_HCLK" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM0", + "CMT_LR_LOWER_T_CLK_MMCM0" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM1", + "CMT_LR_LOWER_T_CLK_MMCM1" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM2", + "CMT_LR_LOWER_T_CLK_MMCM2" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM3", + "CMT_LR_LOWER_T_CLK_MMCM3" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM4", + "CMT_LR_LOWER_T_CLK_MMCM4" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM5", + "CMT_LR_LOWER_T_CLK_MMCM5" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM6", + "CMT_LR_LOWER_T_CLK_MMCM6" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM7", + "CMT_LR_LOWER_T_CLK_MMCM7" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM8", + "CMT_LR_LOWER_T_CLK_MMCM8" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM9", + "CMT_LR_LOWER_T_CLK_MMCM9" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM10", + "CMT_LR_LOWER_T_CLK_MMCM10" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM11", + "CMT_LR_LOWER_T_CLK_MMCM11" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM12", + "CMT_LR_LOWER_T_CLK_MMCM12" + ], + [ + "CMT_R_LOWER_B_CLK_MMCM13", + "CMT_LR_LOWER_T_CLK_MMCM13" + ], + [ + "CMT_R_LOWER_B_CLK_PERF0", + "CMT_LR_LOWER_T_CLK_PERF0" + ], + [ + "CMT_R_LOWER_B_CLK_PERF1", + "CMT_LR_LOWER_T_CLK_PERF1" + ], + [ + "CMT_R_LOWER_B_CLK_PERF2", + "CMT_LR_LOWER_T_CLK_PERF2" + ], + [ + "CMT_R_LOWER_B_CLK_PERF3", + "CMT_LR_LOWER_T_CLK_PERF3" + ], + [ + "MMCMOUT_CLK_FREQ_BB_0", + "MMCMOUT_CLK_FREQ_BB_REBUFIN0" + ], + [ + "MMCMOUT_CLK_FREQ_BB_1", + "MMCMOUT_CLK_FREQ_BB_REBUFIN1" + ], + [ + "MMCMOUT_CLK_FREQ_BB_2", + "MMCMOUT_CLK_FREQ_BB_REBUFIN2" + ], + [ + "MMCMOUT_CLK_FREQ_BB_3", + "MMCMOUT_CLK_FREQ_BB_REBUFIN3" + ], + [ + "MMCM_CLK_FREQ_BB_NS0", + "MMCM_CLK_FREQBB_REBUFOUT0" + ], + [ + "MMCM_CLK_FREQ_BB_NS1", + "MMCM_CLK_FREQBB_REBUFOUT1" + ], + [ + "MMCM_CLK_FREQ_BB_NS2", + "MMCM_CLK_FREQBB_REBUFOUT2" + ], + [ + "MMCM_CLK_FREQ_BB_NS3", + "MMCM_CLK_FREQBB_REBUFOUT3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 9 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "TERM_CMT" + ], + "wire_pairs": [ + [ + "MMCM_CLK_FREQ_BB_REBUF0_NS", + "TERM_CMT_FREQ_REF_NS0" + ], + [ + "MMCM_CLK_FREQ_BB_REBUF1_NS", + "TERM_CMT_FREQ_REF_NS1" + ], + [ + "MMCM_CLK_FREQ_BB_REBUF2_NS", + "TERM_CMT_FREQ_REF_NS2" + ], + [ + "MMCM_CLK_FREQ_BB_REBUF3_NS", + "TERM_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_15", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_15", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_15", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_15", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_15", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_15", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_15", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_15", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_15", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_15", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_15", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_15", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_15", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_15", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_15", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_15", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_15", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_15", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_15", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_15", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_15", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_15", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_15", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_15", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_15", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_15", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_15", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_15", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_15", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_15", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_15", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_15", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_15", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_15", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_15", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_15", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_15", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_15", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_15", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_15", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_15", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_15", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_15", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_15", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_15", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_15", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_15", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_15", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_15", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_15", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_15", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_15", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_15", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_15", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_15", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_15", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_15", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_15", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_15", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_15", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_15", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_15", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_15", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_15", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_15", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_15", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_15", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_15", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_15", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_15", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_15", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_15", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_15", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_15", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_15", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_15", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_15", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_15", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_15", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_15", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_15", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_15", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_15", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_15", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_15", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_15", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_15", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_15", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_15", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_15", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_15", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_15", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_15", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_15", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_15", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_15", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_15", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_15", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_15", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_15", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_15", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_15", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_15", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_15", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_15", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_15", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_15", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_15", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_15", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_15", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_15", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_15", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_15", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_15", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_15", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_15", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_15", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_15", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_15", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_15", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_15", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_15", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_15", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_15", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_15", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_15", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_14", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_14", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_14", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_14", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_14", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_14", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_14", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_14", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_14", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_14", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_14", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_14", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_14", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_14", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_14", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_14", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_14", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_14", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_14", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_14", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_14", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_14", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_14", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_14", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_14", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_14", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_14", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_14", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_14", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_14", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_14", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_14", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_14", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_14", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_14", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_14", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_14", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_14", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_14", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_14", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_14", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_14", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_14", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_14", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_14", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_14", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_14", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_14", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_14", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_14", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_14", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_14", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_14", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_14", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_14", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_14", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_14", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_14", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_14", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_14", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_14", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_14", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_14", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_14", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_14", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_14", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_14", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_14", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_14", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_14", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_14", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_14", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_14", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_14", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_14", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_14", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_14", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_14", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_14", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_14", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_14", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_14", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_14", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_14", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_14", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_14", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_14", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_14", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_14", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_14", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_14", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_14", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_14", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_14", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_14", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_14", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_14", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_14", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_14", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_14", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_14", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_14", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_14", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_14", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_14", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_14", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_14", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_14", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_14", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_14", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_14", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_14", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_14", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_14", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_14", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_14", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_14", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_14", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_14", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_14", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_14", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_14", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_14", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_14", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_13", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_13", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_13", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_13", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_13", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_13", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_13", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_13", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_13", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_13", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_13", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_13", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_13", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_13", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_13", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_13", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_13", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_13", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_13", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_13", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_13", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_13", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_13", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_13", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_13", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_13", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_13", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_13", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_13", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_13", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_13", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_13", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_13", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_13", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_13", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_13", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_13", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_13", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_13", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_13", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_13", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_13", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_13", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_13", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_13", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_13", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_13", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_13", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_13", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_13", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_13", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_13", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_13", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_13", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_13", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_13", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_13", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_13", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_13", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_13", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_13", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_13", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_13", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_13", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_13", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_13", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_13", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_13", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_13", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_13", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_13", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_13", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_13", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_13", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_13", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_13", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_13", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_13", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_13", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_13", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_13", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_13", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_13", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_13", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_13", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_13", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_13", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_13", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_13", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_13", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_13", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_13", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_13", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_13", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_13", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_13", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_13", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_13", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_13", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_13", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_13", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_13", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_13", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_13", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_13", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_13", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_13", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_13", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_13", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_13", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_13", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_13", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_13", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_13", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_13", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_13", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_13", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_13", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_13", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_13", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_13", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_13", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_13", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_13", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_13", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_13", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_12", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_12", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_12", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_12", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_12", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_12", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_12", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_12", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_12", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_12", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_12", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_12", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_12", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_12", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_12", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_12", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_12", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_12", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_12", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_12", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_12", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_12", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_12", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_12", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_12", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_12", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_12", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_12", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_12", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_12", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_12", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_12", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_12", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_12", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_12", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_12", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_12", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_12", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_12", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_12", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_12", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_12", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_12", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_12", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_12", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_12", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_12", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_12", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_12", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_12", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_12", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_12", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_12", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_12", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_12", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_12", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_12", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_12", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_12", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_12", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_12", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_12", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_12", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_12", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_12", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_12", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_12", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_12", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_12", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_12", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_12", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_12", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_12", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_12", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_12", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_12", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_12", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_12", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_12", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_12", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_12", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_12", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_12", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_12", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_12", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_12", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_12", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_12", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_12", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_12", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_12", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_12", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_12", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_12", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_12", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_12", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_12", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_12", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_12", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_12", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_12", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_12", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_12", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_12", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_12", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_12", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_12", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_12", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_12", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_12", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_12", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_12", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_12", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_12", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_12", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_12", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_12", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_12", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_12", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_12", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_12", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_12", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_12", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_12", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_11", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_11", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_11", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_11", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_11", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_11", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_11", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_11", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_11", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_11", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_11", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_11", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_11", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_11", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_11", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_11", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_11", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_11", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_11", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_11", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_11", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_11", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_11", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_11", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_11", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_11", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_11", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_11", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_11", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_11", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_11", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_11", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_11", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_11", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_11", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_11", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_11", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_11", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_11", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_11", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_11", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_11", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_11", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_11", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_11", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_11", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_11", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_11", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_11", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_11", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_11", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_11", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_11", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_11", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_11", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_11", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_11", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_11", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_11", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_11", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_11", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_11", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_11", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_11", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_11", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_11", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_11", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_11", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_11", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_11", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_11", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_11", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_11", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_11", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_11", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_11", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_11", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_11", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_11", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_11", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_11", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_11", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_11", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_11", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_11", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_11", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_11", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_11", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_11", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_11", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_11", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_11", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_11", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_11", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_11", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_11", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_11", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_11", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_11", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_11", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_11", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_11", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_11", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_11", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_11", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_11", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_11", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_11", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_11", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_11", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_11", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_11", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_11", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_11", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_11", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_11", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_11", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_11", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_11", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_11", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_11", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_11", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_11", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_11", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_11", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_11", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_10", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_10", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_10", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_10", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_10", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_10", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_10", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_10", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_10", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_10", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_10", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_10", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_10", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_10", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_10", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_10", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_10", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_10", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_10", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_10", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_10", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_10", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_10", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_10", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_10", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_10", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_10", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_10", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_10", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_10", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_10", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_10", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_10", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_10", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_10", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_10", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_10", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_10", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_10", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_10", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_10", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_10", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_10", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_10", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_10", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_10", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_10", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_10", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_10", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_10", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_10", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_10", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_10", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_10", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_10", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_10", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_10", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_10", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_10", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_10", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_10", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_10", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_10", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_10", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_10", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_10", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_10", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_10", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_10", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_10", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_10", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_10", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_10", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_10", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_10", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_10", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_10", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_10", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_10", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_10", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_10", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_10", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_10", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_10", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_10", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_10", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_10", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_10", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_10", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_10", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_10", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_10", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_10", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_10", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_10", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_10", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_10", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_10", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_10", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_10", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_10", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_10", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_10", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_10", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_10", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_10", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_10", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_10", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_10", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_10", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_10", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_10", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_10", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_10", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_10", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_10", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_10", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_10", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_10", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_10", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_10", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_10", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_10", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_10", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_9", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_9", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_9", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_9", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_9", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_9", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_9", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_9", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_9", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_9", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_9", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_9", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_9", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_9", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_9", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_9", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_9", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_9", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_9", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_9", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_9", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_9", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_9", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_9", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_9", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_9", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_9", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_9", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_9", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_9", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_9", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_9", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_9", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_9", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_9", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_9", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_9", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_9", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_9", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_9", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_9", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_9", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_9", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_9", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_9", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_9", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_9", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_9", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_9", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_9", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_9", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_9", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_9", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_9", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_9", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_9", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_9", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_9", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_9", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_9", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_9", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_9", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_9", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_9", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_9", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_9", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_9", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_9", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_9", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_9", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_9", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_9", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_9", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_9", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_9", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_9", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_9", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_9", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_9", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_9", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_9", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_9", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_9", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_9", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_9", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_9", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_9", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_9", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_9", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_9", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_9", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_9", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_9", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_9", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_9", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_9", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_9", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_9", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_9", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_9", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_9", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_9", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_9", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_9", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_9", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_9", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_9", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_9", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_9", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_9", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_9", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_9", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_9", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_9", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_9", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_9", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_9", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_9", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_9", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_9", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_9", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_9", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_9", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_9", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_9", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_9", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_7", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_7", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_5", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_5", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 6 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 7 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 8 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -8 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "HCLK_CMT" + ], + "wire_pairs": [ + [ + "CMT_BOT_HCLKMUX_CLKINT_0", + "HCLK_CMT_MUX_CLKINT_0" + ], + [ + "CMT_BOT_HCLKMUX_CLKINT_1", + "HCLK_CMT_MUX_CLKINT_1" + ], + [ + "CMT_LR_LOWER_T_CLK_IN1_HCLK", + "HCLK_CMT_MUX_MMCM_CLKIN1" + ], + [ + "CMT_LR_LOWER_T_CLK_IN2_HCLK", + "HCLK_CMT_MUX_MMCM_CLKIN2" + ], + [ + "CMT_LR_LOWER_T_CLK_IN3_HCLK", + "HCLK_CMT_MUX_MMCM_CLKFBIN" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM0", + "HCLK_CMT_MUX_CLK_MMCM0" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM1", + "HCLK_CMT_MUX_CLK_MMCM1" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM2", + "HCLK_CMT_MUX_CLK_MMCM2" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM3", + "HCLK_CMT_MUX_CLK_MMCM3" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM4", + "HCLK_CMT_MUX_CLK_MMCM4" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM5", + "HCLK_CMT_MUX_CLK_MMCM5" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM6", + "HCLK_CMT_MUX_CLK_MMCM6" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM7", + "HCLK_CMT_MUX_CLK_MMCM7" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM8", + "HCLK_CMT_MUX_CLK_MMCM8" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM9", + "HCLK_CMT_MUX_CLK_MMCM9" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM10", + "HCLK_CMT_MUX_CLK_MMCM10" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM11", + "HCLK_CMT_MUX_CLK_MMCM11" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM12", + "HCLK_CMT_MUX_CLK_MMCM12" + ], + [ + "CMT_LR_LOWER_T_CLK_MMCM13", + "HCLK_CMT_MUX_CLK_MMCM13" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF0", + "HCLK_CMT_MUX_MMCM_MUXED0" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF1", + "HCLK_CMT_MUX_MMCM_MUXED1" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF2", + "HCLK_CMT_MUX_MMCM_MUXED2" + ], + [ + "CMT_LR_LOWER_T_CLK_PERF3", + "HCLK_CMT_MUX_MMCM_MUXED3" + ], + [ + "CMT_PHASER_BOT_ENCALIB0", + "HCLK_CMT_ECALIB0" + ], + [ + "CMT_PHASER_BOT_ENCALIB1", + "HCLK_CMT_ECALIB1" + ], + [ + "CMT_PHASER_BOT_IBURSTPENDING0", + "HCLK_CMT_IBURSTPENDING0" + ], + [ + "CMT_PHASER_BOT_IBURSTPENDING1", + "HCLK_CMT_IBURSTPENDING1" + ], + [ + "CMT_PHASER_BOT_IRANKA0", + "HCLK_CMT_PHY_CONTROL_IRANKA0" + ], + [ + "CMT_PHASER_BOT_IRANKA1", + "HCLK_CMT_PHY_CONTROL_IRANKA1" + ], + [ + "CMT_PHASER_BOT_IRANKB0", + "HCLK_CMT_PHY_CONTROL_IRANKB0" + ], + [ + "CMT_PHASER_BOT_IRANKB1", + "HCLK_CMT_PHY_CONTROL_IRANKB1" + ], + [ + "CMT_PHASER_BOT_OBURSTPENDING0", + "HCLK_CMT_OBURSTPENDING0" + ], + [ + "CMT_PHASER_BOT_OBURSTPENDING1", + "HCLK_CMT_OBURSTPENDING1" + ], + [ + "CMT_PHASER_BOT_REFMUX_0", + "HCLK_CMT_FREQ_PHASER_REFMUX_0" + ], + [ + "CMT_PHASER_BOT_REFMUX_1", + "HCLK_CMT_FREQ_PHASER_REFMUX_1" + ], + [ + "CMT_PHASER_BOT_REFMUX_2", + "HCLK_CMT_FREQ_PHASER_REFMUX_2" + ], + [ + "CMT_PHASER_BOT_SYNC_BB", + "HCLK_CMT_PHY_SYNC_BB" + ], + [ + "CMT_PHASER_DOWN_PHASERREF0", + "HCLK_CMT_BUFMR_PHASEREF0" + ], + [ + "CMT_PHASER_DOWN_PHASERREF1", + "HCLK_CMT_BUFMR_PHASEREF1" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_ABOVE0", + "HCLK_CMT_PHASEREF_ABOVE0" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_ABOVE1", + "HCLK_CMT_PHASEREF_ABOVE1" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_BELOW0", + "HCLK_CMT_PHASEREF_BELOW0" + ], + [ + "CMT_PHASER_DOWN_PHASERREF_BELOW1", + "HCLK_CMT_PHASEREF_BELOW1" + ], + [ + "CMT_PHASER_IN_A_ICLK", + "HCLK_CMT_PHASERINA_ICLK" + ], + [ + "CMT_PHASER_IN_A_ICLKDIV", + "HCLK_CMT_PHASERINA_ICLKDIV" + ], + [ + "CMT_PHASER_IN_A_RCLK0", + "HCLK_CMT_PHASERIN_RCLK0" + ], + [ + "CMT_PHASER_IN_B_ICLK", + "HCLK_CMT_PHASERINB_ICLK" + ], + [ + "CMT_PHASER_IN_B_ICLKDIV", + "HCLK_CMT_PHASERINB_ICLKDIV" + ], + [ + "CMT_PHASER_IN_B_RCLK1", + "HCLK_CMT_PHASERIN_RCLK1" + ], + [ + "CMT_PHASER_OUT_A_OCLK", + "HCLK_CMT_PHASEROUTA_OCLK" + ], + [ + "CMT_PHASER_OUT_A_OCLK1X_90", + "HCLK_CMT_PHASEROUTA_OCLK1X_90" + ], + [ + "CMT_PHASER_OUT_A_OCLKDIV", + "HCLK_CMT_PHASEROUTA_OCLKDIV" + ], + [ + "CMT_PHASER_OUT_B_OCLK", + "HCLK_CMT_PHASEROUTB_OCLK" + ], + [ + "CMT_PHASER_OUT_B_OCLK1X_90", + "HCLK_CMT_PHASEROUTB_OCLK1X_90" + ], + [ + "CMT_PHASER_OUT_B_OCLKDIV", + "HCLK_CMT_PHASEROUTB_OCLKDIV" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT0", + "HCLK_CMT_FREQ_REF_NS0" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT1", + "HCLK_CMT_FREQ_REF_NS1" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT2", + "HCLK_CMT_FREQ_REF_NS2" + ], + [ + "MMCM_CLK_FREQBB_REBUFOUT3", + "HCLK_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_7", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_7", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_5", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_5", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CMT_TOP_R_LOWER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -13 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "CMT_TOP_R_UPPER_T" + ], + "wire_pairs": [ + [ + "CMT_PHASERD_CTSBUS0", + "CMT_PLL_PHASERD_CTSBUS0" + ], + [ + "CMT_PHASERD_CTSBUS1", + "CMT_PLL_PHASERD_CTSBUS1" + ], + [ + "CMT_PHASERD_DQSBUS0", + "CMT_PLL_PHASERD_DQSBUS0" + ], + [ + "CMT_PHASERD_DQSBUS1", + "CMT_PLL_PHASERD_DQSBUS1" + ], + [ + "CMT_PHASERD_DTSBUS0", + "CMT_PLL_PHASERD_DTSBUS0" + ], + [ + "CMT_PHASERD_DTSBUS1", + "CMT_PLL_PHASERD_DTSBUS1" + ], + [ + "CMT_PHASER_IN_D_ICLK", + "CMT_PLL_PHASER_IN_D_ICLK" + ], + [ + "CMT_PHASER_IN_D_ICLKDIV", + "CMT_PLL_PHASER_IN_D_ICLKDIV" + ], + [ + "CMT_PHASER_IN_D_WRCLK_TOFIFO", + "CMT_PLL_PHASER_WRCLK_TOFIFO" + ], + [ + "CMT_PHASER_IN_D_WRENABLE_FIFO", + "CMT_PLL_PHASER_WRENABLE_TOFIFO" + ], + [ + "CMT_PHASER_OUT_D_OCLK", + "CMT_PLL_PHASER_OUT_D_OCLK" + ], + [ + "CMT_PHASER_OUT_D_OCLK1X_90", + "CMT_PLL_PHASER_OUT_D_OCLK1X_90" + ], + [ + "CMT_PHASER_OUT_D_OCLKDIV", + "CMT_PLL_PHASER_OUT_D_OCLKDIV" + ], + [ + "CMT_PHASER_OUT_D_RDCLK_TOFIFO", + "CMT_PLL_PHASER_RDCLK_TOFIFO" + ], + [ + "CMT_PHASER_OUT_D_RDENABLE_TOFIFO", + "CMT_PLL_PHASER_RDENABLE_TOFIFO" + ], + [ + "CMT_PHASER_TOP_SYNC_BB", + "CMT_PLL_PHYCTRL_SYNC_BB_DN" + ], + [ + "CMT_PHASER_UP_PHASERREF0", + "CMT_PLL_PHASERREF0" + ], + [ + "CMT_PHASER_UP_PHASERREF1", + "CMT_PLL_PHASERREF1" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE0", + "CMT_PLL_PHASERREF_ABOVE0" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE1", + "CMT_PLL_PHASERREF_ABOVE1" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW0", + "CMT_PLL_PHASERREF_BELOW0" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW1", + "CMT_PLL_PHASERREF_BELOW1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKFBIN", + "CMT_TOP_R_UPPER_T_CLKFBIN" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN1", + "CMT_TOP_R_UPPER_T_CLKIN1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN2", + "CMT_TOP_R_UPPER_T_CLKIN2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL0", + "CMT_TOP_R_UPPER_T_CLKPLL0" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL1", + "CMT_TOP_R_UPPER_T_CLKPLL1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL2", + "CMT_TOP_R_UPPER_T_CLKPLL2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL3", + "CMT_TOP_R_UPPER_T_CLKPLL3" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL4", + "CMT_TOP_R_UPPER_T_CLKPLL4" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL5", + "CMT_TOP_R_UPPER_T_CLKPLL5" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL6", + "CMT_TOP_R_UPPER_T_CLKPLL6" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL7", + "CMT_TOP_R_UPPER_T_CLKPLL7" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN0", + "PLLOUT_CLK_FREQ_BB_0" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN1", + "PLLOUT_CLK_FREQ_BB_1" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN2", + "PLLOUT_CLK_FREQ_BB_2" + ], + [ + "PLLOUT_CLK_FREQ_BB_REBUFIN3", + "PLLOUT_CLK_FREQ_BB_3" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT0", + "PLL_CLK_FREQ_BB0_NS" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT1", + "PLL_CLK_FREQ_BB1_NS" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT2", + "PLL_CLK_FREQ_BB2_NS" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT3", + "PLL_CLK_FREQ_BB3_NS" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "HCLK_CMT" + ], + "wire_pairs": [ + [ + "CMT_FREQ_PHASER_REFMUX_0", + "HCLK_CMT_FREQ_PHASER_REFMUX_0" + ], + [ + "CMT_FREQ_PHASER_REFMUX_1", + "HCLK_CMT_FREQ_PHASER_REFMUX_1" + ], + [ + "CMT_FREQ_PHASER_REFMUX_2", + "HCLK_CMT_FREQ_PHASER_REFMUX_2" + ], + [ + "CMT_PHASER_IN_C_ICLK", + "HCLK_CMT_PHASERINC_ICLK" + ], + [ + "CMT_PHASER_IN_C_ICLKDIV", + "HCLK_CMT_PHASERINC_ICLKDIV" + ], + [ + "CMT_PHASER_IN_C_RCLK2", + "HCLK_CMT_PHASERIN_RCLK2" + ], + [ + "CMT_PHASER_IN_D_ICLK", + "HCLK_CMT_PHASERIND_ICLK" + ], + [ + "CMT_PHASER_IN_D_ICLKDIV", + "HCLK_CMT_PHASERIND_ICLKDIV" + ], + [ + "CMT_PHASER_IN_D_RCLK3", + "HCLK_CMT_PHASERIN_RCLK3" + ], + [ + "CMT_PHASER_OUT_C_OCLK", + "HCLK_CMT_PHASEROUTC_OCLK" + ], + [ + "CMT_PHASER_OUT_C_OCLK1X_90", + "HCLK_CMT_PHASEROUTC_OCLK1X_90" + ], + [ + "CMT_PHASER_OUT_C_OCLKDIV", + "HCLK_CMT_PHASEROUTC_OCLKDIV" + ], + [ + "CMT_PHASER_OUT_D_OCLK", + "HCLK_CMT_PHASEROUTD_OCLK" + ], + [ + "CMT_PHASER_OUT_D_OCLK1X_90", + "HCLK_CMT_PHASEROUTD_OCLK1X_90" + ], + [ + "CMT_PHASER_OUT_D_OCLKDIV", + "HCLK_CMT_PHASEROUTD_OCLKDIV" + ], + [ + "CMT_PHASER_REF_CLKOUT_TOHCLK", + "HCLK_CMT_PREF_CLKOUT" + ], + [ + "CMT_PHASER_REF_TMUXOUT_TOHCLK", + "HCLK_CMT_PREF_TMUXOUT" + ], + [ + "CMT_PHASER_TOP_SYNC_BB", + "HCLK_CMT_PHY_SYNC_BB" + ], + [ + "CMT_PHASER_UP_BUFMRCE_CE0", + "HCLK_CMT_BUFMR_CE0" + ], + [ + "CMT_PHASER_UP_BUFMRCE_CE1", + "HCLK_CMT_BUFMR_CE1" + ], + [ + "CMT_PHASER_UP_PHASERREF0", + "HCLK_CMT_BUFMR_PHASEREF0" + ], + [ + "CMT_PHASER_UP_PHASERREF1", + "HCLK_CMT_BUFMR_PHASEREF1" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE0", + "HCLK_CMT_PHASEREF_ABOVE0" + ], + [ + "CMT_PHASER_UP_PHASERREF_ABOVE1", + "HCLK_CMT_PHASEREF_ABOVE1" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW0", + "HCLK_CMT_PHASEREF_BELOW0" + ], + [ + "CMT_PHASER_UP_PHASERREF_BELOW1", + "HCLK_CMT_PHASEREF_BELOW1" + ], + [ + "CMT_PHY_CONTROL_ECALIB0", + "HCLK_CMT_ECALIB0" + ], + [ + "CMT_PHY_CONTROL_ECALIB1", + "HCLK_CMT_ECALIB1" + ], + [ + "CMT_PHY_CONTROL_IBURSTPENDING0", + "HCLK_CMT_IBURSTPENDING0" + ], + [ + "CMT_PHY_CONTROL_IBURSTPENDING1", + "HCLK_CMT_IBURSTPENDING1" + ], + [ + "CMT_PHY_CONTROL_IRANKA0", + "HCLK_CMT_PHY_CONTROL_IRANKA0" + ], + [ + "CMT_PHY_CONTROL_IRANKA1", + "HCLK_CMT_PHY_CONTROL_IRANKA1" + ], + [ + "CMT_PHY_CONTROL_IRANKB0", + "HCLK_CMT_PHY_CONTROL_IRANKB0" + ], + [ + "CMT_PHY_CONTROL_IRANKB1", + "HCLK_CMT_PHY_CONTROL_IRANKB1" + ], + [ + "CMT_PHY_CONTROL_OBURSTPENDING0", + "HCLK_CMT_OBURSTPENDING0" + ], + [ + "CMT_PHY_CONTROL_OBURSTPENDING1", + "HCLK_CMT_OBURSTPENDING1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKFBIN", + "HCLK_CMT_MUX_PLLE2_CLKFBIN" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN1", + "HCLK_CMT_MUX_PLLE2_CLKIN1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKIN2", + "HCLK_CMT_MUX_PLLE2_CLKIN2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKINT_2", + "HCLK_CMT_MUX_CLKINT_2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKINT_3", + "HCLK_CMT_MUX_CLKINT_3" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL0", + "HCLK_CMT_MUX_CLK_PLL0" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL1", + "HCLK_CMT_MUX_CLK_PLL1" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL2", + "HCLK_CMT_MUX_CLK_PLL2" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL3", + "HCLK_CMT_MUX_CLK_PLL3" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL4", + "HCLK_CMT_MUX_CLK_PLL4" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL5", + "HCLK_CMT_MUX_CLK_PLL5" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL6", + "HCLK_CMT_MUX_CLK_PLL6" + ], + [ + "CMT_R_TOP_UPPER_B_CLKPLL7", + "HCLK_CMT_MUX_CLK_PLL7" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT0", + "HCLK_CMT_FREQ_REF_NS0" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT1", + "HCLK_CMT_FREQ_REF_NS1" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT2", + "HCLK_CMT_FREQ_REF_NS2" + ], + [ + "PLL_CLK_FREQBB_REBUFOUT3", + "HCLK_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_11", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_11", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_11", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_11", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_11", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_11", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_11", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_11", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_11", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_11", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_11", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_11", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_11", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_11", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_11", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_11", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_11", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_11", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_11", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_11", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_11", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_11", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_11", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_11", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_11", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_11", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_11", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_11", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_11", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_11", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_11", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_11", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_11", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_11", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_11", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_11", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_11", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_11", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_11", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_11", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_11", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_11", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_11", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_11", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_11", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_11", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_11", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_11", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_11", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_11", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_11", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_11", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_11", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_11", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_11", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_11", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_11", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_11", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_11", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_11", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_11", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_11", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_11", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_11", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_11", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_11", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_11", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_11", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_11", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_11", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_11", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_11", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_11", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_11", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_11", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_11", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_11", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_11", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_11", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_11", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_11", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_11", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_11", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_11", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_11", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_11", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_11", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_11", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_11", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_11", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_11", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_11", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_11", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_11", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_11", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_11", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_11", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_11", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_11", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_11", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_11", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_11", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_11", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_11", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_11", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_11", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_11", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_11", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_11", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_11", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_11", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_11", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_11", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_11", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_11", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_11", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_11", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_11", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_11", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_11", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_11", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_11", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_11", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_11", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_10", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_10", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_10", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_10", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_10", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_10", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_10", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_10", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_10", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_10", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_10", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_10", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_10", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_10", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_10", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_10", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_10", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_10", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_10", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_10", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_10", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_10", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_10", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_10", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_10", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_10", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_10", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_10", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_10", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_10", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_10", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_10", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_10", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_10", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_10", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_10", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_10", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_10", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_10", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_10", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_10", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_10", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_10", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_10", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_10", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_10", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_10", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_10", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_10", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_10", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_10", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_10", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_10", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_10", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_10", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_10", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_10", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_10", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_10", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_10", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_10", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_10", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_10", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_10", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_10", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_10", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_10", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_10", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_10", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_10", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_10", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_10", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_10", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_10", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_10", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_10", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_10", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_10", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_10", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_10", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_10", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_10", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_10", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_10", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_10", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_10", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_10", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_10", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_10", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_10", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_10", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_10", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_10", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_10", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_10", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_10", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_10", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_10", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_10", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_10", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_10", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_10", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_10", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_10", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_10", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_10", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_10", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_10", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_10", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_10", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_10", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_10", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_10", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_10", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_10", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_10", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_10", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_10", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_10", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_10", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_10", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_10", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_10", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_10", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_10", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_10", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_9", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_9", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_9", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_9", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_9", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_9", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_9", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_9", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_9", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_9", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_9", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_9", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_9", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_9", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_9", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_9", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_9", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_9", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_9", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_9", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_9", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_9", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_9", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_9", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_9", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_9", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_9", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_9", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_9", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_9", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_9", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_9", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_9", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_9", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_9", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_9", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_9", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_9", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_9", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_9", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_9", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_9", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_9", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_9", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_9", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_9", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_9", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_9", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_9", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_9", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_9", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_9", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_9", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_9", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_9", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_9", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_9", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_9", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_9", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_9", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_9", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_9", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_9", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_9", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_9", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_9", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_9", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_9", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_9", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_9", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_9", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_9", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_9", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_9", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_9", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_9", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_9", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_9", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_9", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_9", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_9", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_9", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_9", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_9", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_9", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_9", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_9", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_9", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_9", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_9", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_9", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_9", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_9", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_9", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_9", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_9", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_9", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_9", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_9", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_9", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_9", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_9", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_9", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_9", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_9", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_9", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_9", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_9", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_9", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_9", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_9", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_9", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_9", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_9", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_9", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_9", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_9", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_9", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_9", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_9", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_9", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_9", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_9", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_9", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_8", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_8", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_B", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -8 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "TERM_CMT" + ], + "wire_pairs": [ + [ + "PLL_CLK_FREQ_BB_BUFOUT_NS0", + "TERM_CMT_FREQ_REF_NS0" + ], + [ + "PLL_CLK_FREQ_BB_BUFOUT_NS1", + "TERM_CMT_FREQ_REF_NS1" + ], + [ + "PLL_CLK_FREQ_BB_BUFOUT_NS2", + "TERM_CMT_FREQ_REF_NS2" + ], + [ + "PLL_CLK_FREQ_BB_BUFOUT_NS3", + "TERM_CMT_FREQ_REF_NS3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_12", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_12", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_12", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_12", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_12", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_12", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_12", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_12", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_12", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_12", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_12", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_12", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_12", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_12", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_12", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_12", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_12", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_12", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_12", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_12", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_12", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_12", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_12", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_12", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_12", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_12", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_12", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_12", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_12", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_12", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_12", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_12", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_12", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_12", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_12", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_12", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_12", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_12", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_12", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_12", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_12", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_12", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_12", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_12", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_12", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_12", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_12", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_12", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_12", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_12", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_12", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_12", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_12", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_12", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_12", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_12", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_12", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_12", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_12", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_12", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_12", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_12", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_12", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_12", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_12", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_12", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_12", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_12", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_12", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_12", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_12", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_12", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_12", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_12", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_12", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_12", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_12", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_12", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_12", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_12", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_12", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_12", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_12", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_12", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_12", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_12", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_12", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_12", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_12", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_12", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_12", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_12", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_12", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_12", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_12", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_12", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_12", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_12", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_12", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_12", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_12", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_12", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_12", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_12", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_12", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_12", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_12", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_12", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_12", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_12", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_12", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_12", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_12", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_12", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_12", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_12", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_12", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_12", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_12", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_12", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_12", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_12", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_12", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_12", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_11", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_11", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_11", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_11", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_11", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_11", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_11", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_11", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_11", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_11", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_11", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_11", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_11", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_11", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_11", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_11", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_11", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_11", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_11", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_11", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_11", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_11", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_11", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_11", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_11", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_11", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_11", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_11", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_11", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_11", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_11", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_11", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_11", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_11", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_11", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_11", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_11", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_11", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_11", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_11", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_11", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_11", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_11", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_11", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_11", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_11", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_11", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_11", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_11", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_11", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_11", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_11", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_11", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_11", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_11", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_11", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_11", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_11", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_11", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_11", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_11", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_11", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_11", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_11", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_11", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_11", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_11", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_11", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_11", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_11", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_11", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_11", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_11", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_11", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_11", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_11", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_11", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_11", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_11", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_11", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_11", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_11", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_11", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_11", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_11", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_11", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_11", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_11", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_11", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_11", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_11", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_11", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_11", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_11", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_11", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_11", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_11", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_11", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_11", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_11", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_11", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_11", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_11", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_11", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_11", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_11", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_11", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_11", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_11", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_11", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_11", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_11", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_11", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_11", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_11", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_11", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_11", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_11", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_11", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_11", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_11", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_11", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_11", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_11", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_10", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_10", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_10", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_10", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_10", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_10", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_10", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_10", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_10", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_10", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_10", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_10", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_10", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_10", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_10", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_10", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_10", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_10", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_10", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_10", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_10", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_10", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_10", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_10", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_10", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_10", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_10", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_10", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_10", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_10", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_10", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_10", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_10", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_10", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_10", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_10", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_10", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_10", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_10", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_10", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_10", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_10", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_10", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_10", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_10", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_10", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_10", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_10", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_10", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_10", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_10", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_10", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_10", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_10", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_10", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_10", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_10", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_10", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_10", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_10", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_10", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_10", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_10", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_10", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_10", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_10", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_10", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_10", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_10", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_10", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_10", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_10", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_10", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_10", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_10", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_10", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_10", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_10", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_10", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_10", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_10", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_10", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_10", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_10", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_10", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_10", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_10", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_10", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_10", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_10", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_10", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_10", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_10", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_10", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_10", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_10", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_10", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_10", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_10", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_10", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_10", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_10", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_10", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_10", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_10", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_10", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_10", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_10", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_10", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_10", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_10", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_10", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_10", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_10", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_10", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_10", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_10", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_10", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_10", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_10", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_10", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_10", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_10", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_10", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_10", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_10", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_9", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_9", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_9", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_9", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_9", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_9", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_9", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_9", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_9", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_9", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_9", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_9", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_9", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_9", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_9", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_9", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_9", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_9", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_9", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_9", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_9", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_9", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_9", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_9", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_9", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_9", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_9", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_9", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_9", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_9", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_9", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_9", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_9", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_9", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_9", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_9", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_9", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_9", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_9", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_9", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_9", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_9", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_9", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_9", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_9", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_9", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_9", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_9", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_9", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_9", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_9", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_9", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_9", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_9", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_9", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_9", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_9", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_9", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_9", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_9", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_9", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_9", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_9", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_9", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_9", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_9", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_9", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_9", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_9", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_9", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_9", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_9", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_9", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_9", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_9", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_9", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_9", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_9", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_9", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_9", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_9", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_9", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_9", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_9", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_9", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_9", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_9", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_9", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_9", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_9", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_9", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_9", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_9", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_9", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_9", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_9", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_9", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_9", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_9", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_9", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_9", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_9", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_9", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_9", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_9", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_9", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_9", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_9", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_9", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_9", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_9", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_9", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_9", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_9", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_9", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_9", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_9", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_9", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_9", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_9", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_9", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_9", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_9", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_9", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_8", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_8", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_8", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_8", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_8", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_8", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_8", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_8", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_8", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_8", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_8", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_8", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_8", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_8", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_8", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_8", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_8", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_8", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_8", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_8", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_8", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_8", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_8", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_8", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_8", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_8", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_8", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_8", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_8", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_8", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_8", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_8", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_8", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_8", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_8", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_8", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_8", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_8", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_8", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_8", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_8", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_8", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_8", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_8", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_8", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_8", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_8", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_8", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_8", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_8", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_8", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_8", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_8", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_8", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_8", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_8", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_8", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_8", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_8", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_8", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_8", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_8", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_8", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_8", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_8", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_8", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_8", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_8", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_8", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_8", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_8", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_8", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_8", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_8", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_8", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_8", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_8", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_8", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_8", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_8", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_8", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_8", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_8", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_8", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_8", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_8", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_8", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_8", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_8", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_8", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_8", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_8", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_8", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_8", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_8", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_8", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_8", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_8", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_8", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_8", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_8", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_8", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_8", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_8", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_8", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_8", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_8", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_8", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_8", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_8", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_8", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_8", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_8", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_8", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_8", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_8", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_8", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_8", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_8", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_8", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_8", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_8", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_8", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_8", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_8", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_8", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_7", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_7", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_7", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_7", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_7", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_7", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_7", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_7", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_7", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_7", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_7", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_7", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_7", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_7", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_7", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_7", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_7", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_7", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_7", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_7", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_7", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_7", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_7", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_7", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_7", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_7", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_7", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_7", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_7", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_7", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_7", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_7", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_7", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_7", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_7", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_7", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_7", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_7", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_7", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_7", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_7", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_7", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_7", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_7", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_7", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_7", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_7", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_7", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_7", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_7", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_7", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_7", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_7", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_7", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_7", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_7", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_7", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_7", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_7", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_7", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_7", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_7", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_7", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_7", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_7", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_7", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_7", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_7", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_7", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_7", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_7", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_7", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_7", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_7", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_7", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_7", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_7", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_7", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_7", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_7", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_7", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_7", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_7", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_7", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_7", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_7", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_7", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_7", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_7", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_7", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_7", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_7", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_7", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_7", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_7", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_7", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_7", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_7", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_7", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_7", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_7", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_7", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_7", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_7", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_7", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_7", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_7", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_7", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_7", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_7", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_7", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_7", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_7", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_7", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_7", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_7", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_7", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_7", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_7", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_7", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_7", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_7", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_7", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_7", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_6", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_6", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_6", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_6", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_6", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_6", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_6", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_6", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_6", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_6", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_6", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_6", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_6", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_6", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_6", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_6", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_6", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_6", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_6", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_6", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_6", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_6", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_6", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_6", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_6", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_6", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_6", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_6", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_6", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_6", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_6", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_6", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_6", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_6", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_6", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_6", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_6", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_6", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_6", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_6", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_6", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_6", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_6", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_6", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_6", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_6", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_6", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_6", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_6", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_6", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_6", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_6", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_6", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_6", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_6", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_6", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_6", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_6", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_6", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_6", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_6", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_6", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_6", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_6", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_6", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_6", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_6", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_6", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_6", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_6", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_6", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_6", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_6", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_6", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_6", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_6", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_6", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_6", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_6", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_6", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_6", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_6", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_6", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_6", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_6", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_6", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_6", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_6", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_6", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_6", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_6", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_6", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_6", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_6", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_6", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_6", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_6", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_6", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_6", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_6", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_6", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_6", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_6", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_6", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_6", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_6", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_6", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_6", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_6", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_6", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_6", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_6", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_6", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_6", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_6", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_6", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_6", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_6", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_6", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_6", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_6", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_6", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_6", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_6", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_6", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_6", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_5", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_5", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_5", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_5", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_5", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_5", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_5", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_5", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_5", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_5", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_5", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_5", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_5", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_5", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_5", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_5", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_5", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_5", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_5", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_5", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_5", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_5", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_5", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_5", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_5", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_5", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_5", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_5", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_5", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_5", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_5", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_5", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_5", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_5", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_5", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_5", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_5", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_5", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_5", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_5", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_5", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_5", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_5", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_5", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_5", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_5", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_5", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_5", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_5", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_5", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_5", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_5", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_5", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_5", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_5", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_5", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_5", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_5", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_5", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_5", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_5", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_5", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_5", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_5", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_5", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_5", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_5", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_5", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_5", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_5", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_5", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_5", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_5", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_5", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_5", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_5", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_5", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_5", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_5", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_5", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_5", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_5", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_5", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_5", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_5", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_5", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_5", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_5", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_5", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_5", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_5", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_5", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_5", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_5", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_5", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_5", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_5", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_5", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_5", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_5", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_5", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_5", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_5", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_5", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_5", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_5", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_5", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_5", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_5", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_5", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_5", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_5", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_5", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_5", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_5", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_5", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_5", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_5", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_5", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_5", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_5", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_5", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_5", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_5", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_4", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_4", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_4", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_4", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_4", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_4", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_4", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_4", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_4", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_4", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_4", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_4", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_3", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_3", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_3", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_3", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_3", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_3", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_3", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_3", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_3", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_3", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_3", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_3", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_2", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_2", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_2", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_2", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_2", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_2", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_2", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_2", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_2", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_2", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_2", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_2", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_1", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_1", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_1", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_1", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_1", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_1", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_1", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_1", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_1", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_1", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_1", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_1", + "VBRK_LH12" + ], + [ + "CMT_TOP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "CMT_TOP_R_UPPER_T", + "VBRK" + ], + "wire_pairs": [ + [ + "CMT_TOP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "CMT_TOP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "CMT_TOP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "CMT_TOP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "CMT_TOP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "CMT_TOP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "CMT_TOP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "CMT_TOP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "CMT_TOP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "CMT_TOP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "CMT_TOP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "CMT_TOP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "CMT_TOP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "CMT_TOP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "CMT_TOP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "CMT_TOP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "CMT_TOP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "CMT_TOP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "CMT_TOP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "CMT_TOP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "CMT_TOP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "CMT_TOP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "CMT_TOP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "CMT_TOP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "CMT_TOP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "CMT_TOP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "CMT_TOP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "CMT_TOP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "CMT_TOP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "CMT_TOP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "CMT_TOP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "CMT_TOP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "CMT_TOP_LH1_0", + "VBRK_LH1" + ], + [ + "CMT_TOP_LH2_0", + "VBRK_LH2" + ], + [ + "CMT_TOP_LH3_0", + "VBRK_LH3" + ], + [ + "CMT_TOP_LH4_0", + "VBRK_LH4" + ], + [ + "CMT_TOP_LH5_0", + "VBRK_LH5" + ], + [ + "CMT_TOP_LH6_0", + "VBRK_LH6" + ], + [ + "CMT_TOP_LH7_0", + "VBRK_LH7" + ], + [ + "CMT_TOP_LH8_0", + "VBRK_LH8" + ], + [ + "CMT_TOP_LH9_0", + "VBRK_LH9" + ], + [ + "CMT_TOP_LH10_0", + "VBRK_LH10" + ], + [ + "CMT_TOP_LH11_0", + "VBRK_LH11" + ], + [ + "CMT_TOP_LH12_0", + "VBRK_LH12" + ], + [ + "CMT_TOP_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "CMT_TOP_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "CMT_TOP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "CMT_TOP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "CMT_TOP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "CMT_TOP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "CMT_TOP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "CMT_TOP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "CMT_TOP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "CMT_TOP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "CMT_TOP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "CMT_TOP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "CMT_TOP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "CMT_TOP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "CMT_TOP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "CMT_TOP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "CMT_TOP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "CMT_TOP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "CMT_TOP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "CMT_TOP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "CMT_TOP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "CMT_TOP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "CMT_TOP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "CMT_TOP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "CMT_TOP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "CMT_TOP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "CMT_TOP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "CMT_TOP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "CMT_TOP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "CMT_TOP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "CMT_TOP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "CMT_TOP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "CMT_TOP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "CMT_TOP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "CMT_TOP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "CMT_TOP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "CMT_TOP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "CMT_TOP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "CMT_TOP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "CMT_TOP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "CMT_TOP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "CMT_TOP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "CMT_TOP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "CMT_TOP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "CMT_TOP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "CMT_TOP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "CMT_TOP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "CMT_TOP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "CMT_TOP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "CMT_TOP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "CMT_TOP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "CMT_TOP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "CMT_TOP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "CMT_TOP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "CMT_TOP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "CMT_TOP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "CMT_TOP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "CMT_TOP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "CMT_TOP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "CMT_TOP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "CMT_TOP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "CMT_TOP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "CMT_TOP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "CMT_TOP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "CMT_TOP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "CMT_TOP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "CMT_TOP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "CMT_TOP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "CMT_TOP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "CMT_TOP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "CMT_TOP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "CMT_TOP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "CMT_TOP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "CMT_TOP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "CMT_TOP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "CMT_TOP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "CMT_TOP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "CMT_TOP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "CMT_TOP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "CMT_TOP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "CMT_TOP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "CMT_TOP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "DSP_L", + "DSP_L" + ], + "wire_pairs": [ + [ + "DSP_0_ACIN0", + "DSP_ACOUT0" + ], + [ + "DSP_0_ACIN1", + "DSP_ACOUT1" + ], + [ + "DSP_0_ACIN2", + "DSP_ACOUT2" + ], + [ + "DSP_0_ACIN3", + "DSP_ACOUT3" + ], + [ + "DSP_0_ACIN4", + "DSP_ACOUT4" + ], + [ + "DSP_0_ACIN5", + "DSP_ACOUT5" + ], + [ + "DSP_0_ACIN6", + "DSP_ACOUT6" + ], + [ + "DSP_0_ACIN7", + "DSP_ACOUT7" + ], + [ + "DSP_0_ACIN8", + "DSP_ACOUT8" + ], + [ + "DSP_0_ACIN9", + "DSP_ACOUT9" + ], + [ + "DSP_0_ACIN10", + "DSP_ACOUT10" + ], + [ + "DSP_0_ACIN11", + "DSP_ACOUT11" + ], + [ + "DSP_0_ACIN12", + "DSP_ACOUT12" + ], + [ + "DSP_0_ACIN13", + "DSP_ACOUT13" + ], + [ + "DSP_0_ACIN14", + "DSP_ACOUT14" + ], + [ + "DSP_0_ACIN15", + "DSP_ACOUT15" + ], + [ + "DSP_0_ACIN16", + "DSP_ACOUT16" + ], + [ + "DSP_0_ACIN17", + "DSP_ACOUT17" + ], + [ + "DSP_0_ACIN18", + "DSP_ACOUT18" + ], + [ + "DSP_0_ACIN19", + "DSP_ACOUT19" + ], + [ + "DSP_0_ACIN20", + "DSP_ACOUT20" + ], + [ + "DSP_0_ACIN21", + "DSP_ACOUT21" + ], + [ + "DSP_0_ACIN22", + "DSP_ACOUT22" + ], + [ + "DSP_0_ACIN23", + "DSP_ACOUT23" + ], + [ + "DSP_0_ACIN24", + "DSP_ACOUT24" + ], + [ + "DSP_0_ACIN25", + "DSP_ACOUT25" + ], + [ + "DSP_0_ACIN26", + "DSP_ACOUT26" + ], + [ + "DSP_0_ACIN27", + "DSP_ACOUT27" + ], + [ + "DSP_0_ACIN28", + "DSP_ACOUT28" + ], + [ + "DSP_0_ACIN29", + "DSP_ACOUT29" + ], + [ + "DSP_0_BCIN0", + "DSP_BCOUT0" + ], + [ + "DSP_0_BCIN1", + "DSP_BCOUT1" + ], + [ + "DSP_0_BCIN2", + "DSP_BCOUT2" + ], + [ + "DSP_0_BCIN3", + "DSP_BCOUT3" + ], + [ + "DSP_0_BCIN4", + "DSP_BCOUT4" + ], + [ + "DSP_0_BCIN5", + "DSP_BCOUT5" + ], + [ + "DSP_0_BCIN6", + "DSP_BCOUT6" + ], + [ + "DSP_0_BCIN7", + "DSP_BCOUT7" + ], + [ + "DSP_0_BCIN8", + "DSP_BCOUT8" + ], + [ + "DSP_0_BCIN9", + "DSP_BCOUT9" + ], + [ + "DSP_0_BCIN10", + "DSP_BCOUT10" + ], + [ + "DSP_0_BCIN11", + "DSP_BCOUT11" + ], + [ + "DSP_0_BCIN12", + "DSP_BCOUT12" + ], + [ + "DSP_0_BCIN13", + "DSP_BCOUT13" + ], + [ + "DSP_0_BCIN14", + "DSP_BCOUT14" + ], + [ + "DSP_0_BCIN15", + "DSP_BCOUT15" + ], + [ + "DSP_0_BCIN16", + "DSP_BCOUT16" + ], + [ + "DSP_0_BCIN17", + "DSP_BCOUT17" + ], + [ + "DSP_0_CARRYCASCIN", + "DSP_CARRYCASCOUT" + ], + [ + "DSP_0_MULTSIGNIN", + "DSP_MULTSIGNOUT" + ], + [ + "DSP_0_PCIN0", + "DSP_PCOUT0" + ], + [ + "DSP_0_PCIN1", + "DSP_PCOUT1" + ], + [ + "DSP_0_PCIN2", + "DSP_PCOUT2" + ], + [ + "DSP_0_PCIN3", + "DSP_PCOUT3" + ], + [ + "DSP_0_PCIN4", + "DSP_PCOUT4" + ], + [ + "DSP_0_PCIN5", + "DSP_PCOUT5" + ], + [ + "DSP_0_PCIN6", + "DSP_PCOUT6" + ], + [ + "DSP_0_PCIN7", + "DSP_PCOUT7" + ], + [ + "DSP_0_PCIN8", + "DSP_PCOUT8" + ], + [ + "DSP_0_PCIN9", + "DSP_PCOUT9" + ], + [ + "DSP_0_PCIN10", + "DSP_PCOUT10" + ], + [ + "DSP_0_PCIN11", + "DSP_PCOUT11" + ], + [ + "DSP_0_PCIN12", + "DSP_PCOUT12" + ], + [ + "DSP_0_PCIN13", + "DSP_PCOUT13" + ], + [ + "DSP_0_PCIN14", + "DSP_PCOUT14" + ], + [ + "DSP_0_PCIN15", + "DSP_PCOUT15" + ], + [ + "DSP_0_PCIN16", + "DSP_PCOUT16" + ], + [ + "DSP_0_PCIN17", + "DSP_PCOUT17" + ], + [ + "DSP_0_PCIN18", + "DSP_PCOUT18" + ], + [ + "DSP_0_PCIN19", + "DSP_PCOUT19" + ], + [ + "DSP_0_PCIN20", + "DSP_PCOUT20" + ], + [ + "DSP_0_PCIN21", + "DSP_PCOUT21" + ], + [ + "DSP_0_PCIN22", + "DSP_PCOUT22" + ], + [ + "DSP_0_PCIN23", + "DSP_PCOUT23" + ], + [ + "DSP_0_PCIN24", + "DSP_PCOUT24" + ], + [ + "DSP_0_PCIN25", + "DSP_PCOUT25" + ], + [ + "DSP_0_PCIN26", + "DSP_PCOUT26" + ], + [ + "DSP_0_PCIN27", + "DSP_PCOUT27" + ], + [ + "DSP_0_PCIN28", + "DSP_PCOUT28" + ], + [ + "DSP_0_PCIN29", + "DSP_PCOUT29" + ], + [ + "DSP_0_PCIN30", + "DSP_PCOUT30" + ], + [ + "DSP_0_PCIN31", + "DSP_PCOUT31" + ], + [ + "DSP_0_PCIN32", + "DSP_PCOUT32" + ], + [ + "DSP_0_PCIN33", + "DSP_PCOUT33" + ], + [ + "DSP_0_PCIN34", + "DSP_PCOUT34" + ], + [ + "DSP_0_PCIN35", + "DSP_PCOUT35" + ], + [ + "DSP_0_PCIN36", + "DSP_PCOUT36" + ], + [ + "DSP_0_PCIN37", + "DSP_PCOUT37" + ], + [ + "DSP_0_PCIN38", + "DSP_PCOUT38" + ], + [ + "DSP_0_PCIN39", + "DSP_PCOUT39" + ], + [ + "DSP_0_PCIN40", + "DSP_PCOUT40" + ], + [ + "DSP_0_PCIN41", + "DSP_PCOUT41" + ], + [ + "DSP_0_PCIN42", + "DSP_PCOUT42" + ], + [ + "DSP_0_PCIN43", + "DSP_PCOUT43" + ], + [ + "DSP_0_PCIN44", + "DSP_PCOUT44" + ], + [ + "DSP_0_PCIN45", + "DSP_PCOUT45" + ], + [ + "DSP_0_PCIN46", + "DSP_PCOUT46" + ], + [ + "DSP_0_PCIN47", + "DSP_PCOUT47" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "DSP_L", + "HCLK_DSP_L" + ], + "wire_pairs": [ + [ + "DSP_ACOUT0", + "HCLK_DSP_ACIN0" + ], + [ + "DSP_ACOUT1", + "HCLK_DSP_ACIN1" + ], + [ + "DSP_ACOUT2", + "HCLK_DSP_ACIN2" + ], + [ + "DSP_ACOUT3", + "HCLK_DSP_ACIN3" + ], + [ + "DSP_ACOUT4", + "HCLK_DSP_ACIN4" + ], + [ + "DSP_ACOUT5", + "HCLK_DSP_ACIN5" + ], + [ + "DSP_ACOUT6", + "HCLK_DSP_ACIN6" + ], + [ + "DSP_ACOUT7", + "HCLK_DSP_ACIN7" + ], + [ + "DSP_ACOUT8", + "HCLK_DSP_ACIN8" + ], + [ + "DSP_ACOUT9", + "HCLK_DSP_ACIN9" + ], + [ + "DSP_ACOUT10", + "HCLK_DSP_ACIN10" + ], + [ + "DSP_ACOUT11", + "HCLK_DSP_ACIN11" + ], + [ + "DSP_ACOUT12", + "HCLK_DSP_ACIN12" + ], + [ + "DSP_ACOUT13", + "HCLK_DSP_ACIN13" + ], + [ + "DSP_ACOUT14", + "HCLK_DSP_ACIN14" + ], + [ + "DSP_ACOUT15", + "HCLK_DSP_ACIN15" + ], + [ + "DSP_ACOUT16", + "HCLK_DSP_ACIN16" + ], + [ + "DSP_ACOUT17", + "HCLK_DSP_ACIN17" + ], + [ + "DSP_ACOUT18", + "HCLK_DSP_ACIN18" + ], + [ + "DSP_ACOUT19", + "HCLK_DSP_ACIN19" + ], + [ + "DSP_ACOUT20", + "HCLK_DSP_ACIN20" + ], + [ + "DSP_ACOUT21", + "HCLK_DSP_ACIN21" + ], + [ + "DSP_ACOUT22", + "HCLK_DSP_ACIN22" + ], + [ + "DSP_ACOUT23", + "HCLK_DSP_ACIN23" + ], + [ + "DSP_ACOUT24", + "HCLK_DSP_ACIN24" + ], + [ + "DSP_ACOUT25", + "HCLK_DSP_ACIN25" + ], + [ + "DSP_ACOUT26", + "HCLK_DSP_ACIN26" + ], + [ + "DSP_ACOUT27", + "HCLK_DSP_ACIN27" + ], + [ + "DSP_ACOUT28", + "HCLK_DSP_ACIN28" + ], + [ + "DSP_ACOUT29", + "HCLK_DSP_ACIN29" + ], + [ + "DSP_BCOUT0", + "HCLK_DSP_BCIN0" + ], + [ + "DSP_BCOUT1", + "HCLK_DSP_BCIN1" + ], + [ + "DSP_BCOUT2", + "HCLK_DSP_BCIN2" + ], + [ + "DSP_BCOUT3", + "HCLK_DSP_BCIN3" + ], + [ + "DSP_BCOUT4", + "HCLK_DSP_BCIN4" + ], + [ + "DSP_BCOUT5", + "HCLK_DSP_BCIN5" + ], + [ + "DSP_BCOUT6", + "HCLK_DSP_BCIN6" + ], + [ + "DSP_BCOUT7", + "HCLK_DSP_BCIN7" + ], + [ + "DSP_BCOUT8", + "HCLK_DSP_BCIN8" + ], + [ + "DSP_BCOUT9", + "HCLK_DSP_BCIN9" + ], + [ + "DSP_BCOUT10", + "HCLK_DSP_BCIN10" + ], + [ + "DSP_BCOUT11", + "HCLK_DSP_BCIN11" + ], + [ + "DSP_BCOUT12", + "HCLK_DSP_BCIN12" + ], + [ + "DSP_BCOUT13", + "HCLK_DSP_BCIN13" + ], + [ + "DSP_BCOUT14", + "HCLK_DSP_BCIN14" + ], + [ + "DSP_BCOUT15", + "HCLK_DSP_BCIN15" + ], + [ + "DSP_BCOUT16", + "HCLK_DSP_BCIN16" + ], + [ + "DSP_BCOUT17", + "HCLK_DSP_BCIN17" + ], + [ + "DSP_CARRYCASCOUT", + "HCLK_DSP_CARRYCASCIN" + ], + [ + "DSP_MULTSIGNOUT", + "HCLK_DSP_MULTSIGNIN" + ], + [ + "DSP_PCOUT0", + "HCLK_DSP_PCIN0" + ], + [ + "DSP_PCOUT1", + "HCLK_DSP_PCIN1" + ], + [ + "DSP_PCOUT2", + "HCLK_DSP_PCIN2" + ], + [ + "DSP_PCOUT3", + "HCLK_DSP_PCIN3" + ], + [ + "DSP_PCOUT4", + "HCLK_DSP_PCIN4" + ], + [ + "DSP_PCOUT5", + "HCLK_DSP_PCIN5" + ], + [ + "DSP_PCOUT6", + "HCLK_DSP_PCIN6" + ], + [ + "DSP_PCOUT7", + "HCLK_DSP_PCIN7" + ], + [ + "DSP_PCOUT8", + "HCLK_DSP_PCIN8" + ], + [ + "DSP_PCOUT9", + "HCLK_DSP_PCIN9" + ], + [ + "DSP_PCOUT10", + "HCLK_DSP_PCIN10" + ], + [ + "DSP_PCOUT11", + "HCLK_DSP_PCIN11" + ], + [ + "DSP_PCOUT12", + "HCLK_DSP_PCIN12" + ], + [ + "DSP_PCOUT13", + "HCLK_DSP_PCIN13" + ], + [ + "DSP_PCOUT14", + "HCLK_DSP_PCIN14" + ], + [ + "DSP_PCOUT15", + "HCLK_DSP_PCIN15" + ], + [ + "DSP_PCOUT16", + "HCLK_DSP_PCIN16" + ], + [ + "DSP_PCOUT17", + "HCLK_DSP_PCIN17" + ], + [ + "DSP_PCOUT18", + "HCLK_DSP_PCIN18" + ], + [ + "DSP_PCOUT19", + "HCLK_DSP_PCIN19" + ], + [ + "DSP_PCOUT20", + "HCLK_DSP_PCIN20" + ], + [ + "DSP_PCOUT21", + "HCLK_DSP_PCIN21" + ], + [ + "DSP_PCOUT22", + "HCLK_DSP_PCIN22" + ], + [ + "DSP_PCOUT23", + "HCLK_DSP_PCIN23" + ], + [ + "DSP_PCOUT24", + "HCLK_DSP_PCIN24" + ], + [ + "DSP_PCOUT25", + "HCLK_DSP_PCIN25" + ], + [ + "DSP_PCOUT26", + "HCLK_DSP_PCIN26" + ], + [ + "DSP_PCOUT27", + "HCLK_DSP_PCIN27" + ], + [ + "DSP_PCOUT28", + "HCLK_DSP_PCIN28" + ], + [ + "DSP_PCOUT29", + "HCLK_DSP_PCIN29" + ], + [ + "DSP_PCOUT30", + "HCLK_DSP_PCIN30" + ], + [ + "DSP_PCOUT31", + "HCLK_DSP_PCIN31" + ], + [ + "DSP_PCOUT32", + "HCLK_DSP_PCIN32" + ], + [ + "DSP_PCOUT33", + "HCLK_DSP_PCIN33" + ], + [ + "DSP_PCOUT34", + "HCLK_DSP_PCIN34" + ], + [ + "DSP_PCOUT35", + "HCLK_DSP_PCIN35" + ], + [ + "DSP_PCOUT36", + "HCLK_DSP_PCIN36" + ], + [ + "DSP_PCOUT37", + "HCLK_DSP_PCIN37" + ], + [ + "DSP_PCOUT38", + "HCLK_DSP_PCIN38" + ], + [ + "DSP_PCOUT39", + "HCLK_DSP_PCIN39" + ], + [ + "DSP_PCOUT40", + "HCLK_DSP_PCIN40" + ], + [ + "DSP_PCOUT41", + "HCLK_DSP_PCIN41" + ], + [ + "DSP_PCOUT42", + "HCLK_DSP_PCIN42" + ], + [ + "DSP_PCOUT43", + "HCLK_DSP_PCIN43" + ], + [ + "DSP_PCOUT44", + "HCLK_DSP_PCIN44" + ], + [ + "DSP_PCOUT45", + "HCLK_DSP_PCIN45" + ], + [ + "DSP_PCOUT46", + "HCLK_DSP_PCIN46" + ], + [ + "DSP_PCOUT47", + "HCLK_DSP_PCIN47" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "DSP_L", + "HCLK_DSP_L" + ], + "wire_pairs": [ + [ + "DSP_0_ACIN0", + "HCLK_DSP_ACIN0" + ], + [ + "DSP_0_ACIN1", + "HCLK_DSP_ACIN1" + ], + [ + "DSP_0_ACIN2", + "HCLK_DSP_ACIN2" + ], + [ + "DSP_0_ACIN3", + "HCLK_DSP_ACIN3" + ], + [ + "DSP_0_ACIN4", + "HCLK_DSP_ACIN4" + ], + [ + "DSP_0_ACIN5", + "HCLK_DSP_ACIN5" + ], + [ + "DSP_0_ACIN6", + "HCLK_DSP_ACIN6" + ], + [ + "DSP_0_ACIN7", + "HCLK_DSP_ACIN7" + ], + [ + "DSP_0_ACIN8", + "HCLK_DSP_ACIN8" + ], + [ + "DSP_0_ACIN9", + "HCLK_DSP_ACIN9" + ], + [ + "DSP_0_ACIN10", + "HCLK_DSP_ACIN10" + ], + [ + "DSP_0_ACIN11", + "HCLK_DSP_ACIN11" + ], + [ + "DSP_0_ACIN12", + "HCLK_DSP_ACIN12" + ], + [ + "DSP_0_ACIN13", + "HCLK_DSP_ACIN13" + ], + [ + "DSP_0_ACIN14", + "HCLK_DSP_ACIN14" + ], + [ + "DSP_0_ACIN15", + "HCLK_DSP_ACIN15" + ], + [ + "DSP_0_ACIN16", + "HCLK_DSP_ACIN16" + ], + [ + "DSP_0_ACIN17", + "HCLK_DSP_ACIN17" + ], + [ + "DSP_0_ACIN18", + "HCLK_DSP_ACIN18" + ], + [ + "DSP_0_ACIN19", + "HCLK_DSP_ACIN19" + ], + [ + "DSP_0_ACIN20", + "HCLK_DSP_ACIN20" + ], + [ + "DSP_0_ACIN21", + "HCLK_DSP_ACIN21" + ], + [ + "DSP_0_ACIN22", + "HCLK_DSP_ACIN22" + ], + [ + "DSP_0_ACIN23", + "HCLK_DSP_ACIN23" + ], + [ + "DSP_0_ACIN24", + "HCLK_DSP_ACIN24" + ], + [ + "DSP_0_ACIN25", + "HCLK_DSP_ACIN25" + ], + [ + "DSP_0_ACIN26", + "HCLK_DSP_ACIN26" + ], + [ + "DSP_0_ACIN27", + "HCLK_DSP_ACIN27" + ], + [ + "DSP_0_ACIN28", + "HCLK_DSP_ACIN28" + ], + [ + "DSP_0_ACIN29", + "HCLK_DSP_ACIN29" + ], + [ + "DSP_0_BCIN0", + "HCLK_DSP_BCIN0" + ], + [ + "DSP_0_BCIN1", + "HCLK_DSP_BCIN1" + ], + [ + "DSP_0_BCIN2", + "HCLK_DSP_BCIN2" + ], + [ + "DSP_0_BCIN3", + "HCLK_DSP_BCIN3" + ], + [ + "DSP_0_BCIN4", + "HCLK_DSP_BCIN4" + ], + [ + "DSP_0_BCIN5", + "HCLK_DSP_BCIN5" + ], + [ + "DSP_0_BCIN6", + "HCLK_DSP_BCIN6" + ], + [ + "DSP_0_BCIN7", + "HCLK_DSP_BCIN7" + ], + [ + "DSP_0_BCIN8", + "HCLK_DSP_BCIN8" + ], + [ + "DSP_0_BCIN9", + "HCLK_DSP_BCIN9" + ], + [ + "DSP_0_BCIN10", + "HCLK_DSP_BCIN10" + ], + [ + "DSP_0_BCIN11", + "HCLK_DSP_BCIN11" + ], + [ + "DSP_0_BCIN12", + "HCLK_DSP_BCIN12" + ], + [ + "DSP_0_BCIN13", + "HCLK_DSP_BCIN13" + ], + [ + "DSP_0_BCIN14", + "HCLK_DSP_BCIN14" + ], + [ + "DSP_0_BCIN15", + "HCLK_DSP_BCIN15" + ], + [ + "DSP_0_BCIN16", + "HCLK_DSP_BCIN16" + ], + [ + "DSP_0_BCIN17", + "HCLK_DSP_BCIN17" + ], + [ + "DSP_0_CARRYCASCIN", + "HCLK_DSP_CARRYCASCIN" + ], + [ + "DSP_0_MULTSIGNIN", + "HCLK_DSP_MULTSIGNIN" + ], + [ + "DSP_0_PCIN0", + "HCLK_DSP_PCIN0" + ], + [ + "DSP_0_PCIN1", + "HCLK_DSP_PCIN1" + ], + [ + "DSP_0_PCIN2", + "HCLK_DSP_PCIN2" + ], + [ + "DSP_0_PCIN3", + "HCLK_DSP_PCIN3" + ], + [ + "DSP_0_PCIN4", + "HCLK_DSP_PCIN4" + ], + [ + "DSP_0_PCIN5", + "HCLK_DSP_PCIN5" + ], + [ + "DSP_0_PCIN6", + "HCLK_DSP_PCIN6" + ], + [ + "DSP_0_PCIN7", + "HCLK_DSP_PCIN7" + ], + [ + "DSP_0_PCIN8", + "HCLK_DSP_PCIN8" + ], + [ + "DSP_0_PCIN9", + "HCLK_DSP_PCIN9" + ], + [ + "DSP_0_PCIN10", + "HCLK_DSP_PCIN10" + ], + [ + "DSP_0_PCIN11", + "HCLK_DSP_PCIN11" + ], + [ + "DSP_0_PCIN12", + "HCLK_DSP_PCIN12" + ], + [ + "DSP_0_PCIN13", + "HCLK_DSP_PCIN13" + ], + [ + "DSP_0_PCIN14", + "HCLK_DSP_PCIN14" + ], + [ + "DSP_0_PCIN15", + "HCLK_DSP_PCIN15" + ], + [ + "DSP_0_PCIN16", + "HCLK_DSP_PCIN16" + ], + [ + "DSP_0_PCIN17", + "HCLK_DSP_PCIN17" + ], + [ + "DSP_0_PCIN18", + "HCLK_DSP_PCIN18" + ], + [ + "DSP_0_PCIN19", + "HCLK_DSP_PCIN19" + ], + [ + "DSP_0_PCIN20", + "HCLK_DSP_PCIN20" + ], + [ + "DSP_0_PCIN21", + "HCLK_DSP_PCIN21" + ], + [ + "DSP_0_PCIN22", + "HCLK_DSP_PCIN22" + ], + [ + "DSP_0_PCIN23", + "HCLK_DSP_PCIN23" + ], + [ + "DSP_0_PCIN24", + "HCLK_DSP_PCIN24" + ], + [ + "DSP_0_PCIN25", + "HCLK_DSP_PCIN25" + ], + [ + "DSP_0_PCIN26", + "HCLK_DSP_PCIN26" + ], + [ + "DSP_0_PCIN27", + "HCLK_DSP_PCIN27" + ], + [ + "DSP_0_PCIN28", + "HCLK_DSP_PCIN28" + ], + [ + "DSP_0_PCIN29", + "HCLK_DSP_PCIN29" + ], + [ + "DSP_0_PCIN30", + "HCLK_DSP_PCIN30" + ], + [ + "DSP_0_PCIN31", + "HCLK_DSP_PCIN31" + ], + [ + "DSP_0_PCIN32", + "HCLK_DSP_PCIN32" + ], + [ + "DSP_0_PCIN33", + "HCLK_DSP_PCIN33" + ], + [ + "DSP_0_PCIN34", + "HCLK_DSP_PCIN34" + ], + [ + "DSP_0_PCIN35", + "HCLK_DSP_PCIN35" + ], + [ + "DSP_0_PCIN36", + "HCLK_DSP_PCIN36" + ], + [ + "DSP_0_PCIN37", + "HCLK_DSP_PCIN37" + ], + [ + "DSP_0_PCIN38", + "HCLK_DSP_PCIN38" + ], + [ + "DSP_0_PCIN39", + "HCLK_DSP_PCIN39" + ], + [ + "DSP_0_PCIN40", + "HCLK_DSP_PCIN40" + ], + [ + "DSP_0_PCIN41", + "HCLK_DSP_PCIN41" + ], + [ + "DSP_0_PCIN42", + "HCLK_DSP_PCIN42" + ], + [ + "DSP_0_PCIN43", + "HCLK_DSP_PCIN43" + ], + [ + "DSP_0_PCIN44", + "HCLK_DSP_PCIN44" + ], + [ + "DSP_0_PCIN45", + "HCLK_DSP_PCIN45" + ], + [ + "DSP_0_PCIN46", + "HCLK_DSP_PCIN46" + ], + [ + "DSP_0_PCIN47", + "HCLK_DSP_PCIN47" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "DSP_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "DSP_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_4", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_4", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_4", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_4", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_4", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_4", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_4", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_4", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_4", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "DSP_LOGIC_OUTS_B9_4", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "DSP_LOGIC_OUTS_B10_4", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_4", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "DSP_LOGIC_OUTS_B12_4", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "DSP_LOGIC_OUTS_B13_4", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "DSP_LOGIC_OUTS_B14_4", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_4", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_4", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_4", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_4", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_4", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_4", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_4", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_4", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_4", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "DSP_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "DSP_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "DSP_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_3", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_3", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_3", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_3", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_3", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_3", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_3", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_3", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_3", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "DSP_LOGIC_OUTS_B10_3", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_3", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "DSP_LOGIC_OUTS_B14_3", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_3", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_3", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_3", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_3", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_3", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_3", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_3", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_3", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_3", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "DSP_MONITOR_N_3", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_3", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "DSP_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "DSP_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_2", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_2", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_2", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_2", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_2", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_2", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_2", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_2", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_2", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "DSP_LOGIC_OUTS_B9_2", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "DSP_LOGIC_OUTS_B10_2", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_2", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "DSP_LOGIC_OUTS_B13_2", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "DSP_LOGIC_OUTS_B14_2", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_2", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_2", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_2", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_2", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_2", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_2", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_2", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_2", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_2", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "DSP_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "DSP_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "DSP_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_1", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_1", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_1", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_1", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_1", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_1", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_1", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_1", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "DSP_LOGIC_OUTS_B10_1", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_1", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "DSP_LOGIC_OUTS_B12_1", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "DSP_LOGIC_OUTS_B13_1", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "DSP_LOGIC_OUTS_B16_1", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_1", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_1", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_1", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_1", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_1", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_1", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_1", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "DSP_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "DSP_L", + "INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "DSP_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_0", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_0", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_0", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_0", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_0", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_0", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_0", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_0", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_0", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "DSP_LOGIC_OUTS_B9_0", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "DSP_LOGIC_OUTS_B10_0", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_0", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "DSP_LOGIC_OUTS_B12_0", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "DSP_LOGIC_OUTS_B13_0", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "DSP_LOGIC_OUTS_B14_0", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_0", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_0", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_0", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_0", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_0", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_0", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_0", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_0", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_0", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "DSP_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "DSP_L", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_4", + "VBRK_LH1" + ], + [ + "DSP_LH2_4", + "VBRK_LH2" + ], + [ + "DSP_LH3_4", + "VBRK_LH3" + ], + [ + "DSP_LH4_4", + "VBRK_LH4" + ], + [ + "DSP_LH5_4", + "VBRK_LH5" + ], + [ + "DSP_LH6_4", + "VBRK_LH6" + ], + [ + "DSP_LH7_4", + "VBRK_LH7" + ], + [ + "DSP_LH8_4", + "VBRK_LH8" + ], + [ + "DSP_LH9_4", + "VBRK_LH9" + ], + [ + "DSP_LH10_4", + "VBRK_LH10" + ], + [ + "DSP_LH11_4", + "VBRK_LH11" + ], + [ + "DSP_LH12_4", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "DSP_L", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_3", + "VBRK_LH1" + ], + [ + "DSP_LH2_3", + "VBRK_LH2" + ], + [ + "DSP_LH3_3", + "VBRK_LH3" + ], + [ + "DSP_LH4_3", + "VBRK_LH4" + ], + [ + "DSP_LH5_3", + "VBRK_LH5" + ], + [ + "DSP_LH6_3", + "VBRK_LH6" + ], + [ + "DSP_LH7_3", + "VBRK_LH7" + ], + [ + "DSP_LH8_3", + "VBRK_LH8" + ], + [ + "DSP_LH9_3", + "VBRK_LH9" + ], + [ + "DSP_LH10_3", + "VBRK_LH10" + ], + [ + "DSP_LH11_3", + "VBRK_LH11" + ], + [ + "DSP_LH12_3", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "DSP_L", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_2", + "VBRK_LH1" + ], + [ + "DSP_LH2_2", + "VBRK_LH2" + ], + [ + "DSP_LH3_2", + "VBRK_LH3" + ], + [ + "DSP_LH4_2", + "VBRK_LH4" + ], + [ + "DSP_LH5_2", + "VBRK_LH5" + ], + [ + "DSP_LH6_2", + "VBRK_LH6" + ], + [ + "DSP_LH7_2", + "VBRK_LH7" + ], + [ + "DSP_LH8_2", + "VBRK_LH8" + ], + [ + "DSP_LH9_2", + "VBRK_LH9" + ], + [ + "DSP_LH10_2", + "VBRK_LH10" + ], + [ + "DSP_LH11_2", + "VBRK_LH11" + ], + [ + "DSP_LH12_2", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "DSP_L", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_1", + "VBRK_LH1" + ], + [ + "DSP_LH2_1", + "VBRK_LH2" + ], + [ + "DSP_LH3_1", + "VBRK_LH3" + ], + [ + "DSP_LH4_1", + "VBRK_LH4" + ], + [ + "DSP_LH5_1", + "VBRK_LH5" + ], + [ + "DSP_LH6_1", + "VBRK_LH6" + ], + [ + "DSP_LH7_1", + "VBRK_LH7" + ], + [ + "DSP_LH8_1", + "VBRK_LH8" + ], + [ + "DSP_LH9_1", + "VBRK_LH9" + ], + [ + "DSP_LH10_1", + "VBRK_LH10" + ], + [ + "DSP_LH11_1", + "VBRK_LH11" + ], + [ + "DSP_LH12_1", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "DSP_L", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_0", + "VBRK_LH1" + ], + [ + "DSP_LH2_0", + "VBRK_LH2" + ], + [ + "DSP_LH3_0", + "VBRK_LH3" + ], + [ + "DSP_LH4_0", + "VBRK_LH4" + ], + [ + "DSP_LH5_0", + "VBRK_LH5" + ], + [ + "DSP_LH6_0", + "VBRK_LH6" + ], + [ + "DSP_LH7_0", + "VBRK_LH7" + ], + [ + "DSP_LH8_0", + "VBRK_LH8" + ], + [ + "DSP_LH9_0", + "VBRK_LH9" + ], + [ + "DSP_LH10_0", + "VBRK_LH10" + ], + [ + "DSP_LH11_0", + "VBRK_LH11" + ], + [ + "DSP_LH12_0", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 5 + ], + "tile_types": [ + "DSP_R", + "DSP_R" + ], + "wire_pairs": [ + [ + "DSP_0_ACIN0", + "DSP_ACOUT0" + ], + [ + "DSP_0_ACIN1", + "DSP_ACOUT1" + ], + [ + "DSP_0_ACIN2", + "DSP_ACOUT2" + ], + [ + "DSP_0_ACIN3", + "DSP_ACOUT3" + ], + [ + "DSP_0_ACIN4", + "DSP_ACOUT4" + ], + [ + "DSP_0_ACIN5", + "DSP_ACOUT5" + ], + [ + "DSP_0_ACIN6", + "DSP_ACOUT6" + ], + [ + "DSP_0_ACIN7", + "DSP_ACOUT7" + ], + [ + "DSP_0_ACIN8", + "DSP_ACOUT8" + ], + [ + "DSP_0_ACIN9", + "DSP_ACOUT9" + ], + [ + "DSP_0_ACIN10", + "DSP_ACOUT10" + ], + [ + "DSP_0_ACIN11", + "DSP_ACOUT11" + ], + [ + "DSP_0_ACIN12", + "DSP_ACOUT12" + ], + [ + "DSP_0_ACIN13", + "DSP_ACOUT13" + ], + [ + "DSP_0_ACIN14", + "DSP_ACOUT14" + ], + [ + "DSP_0_ACIN15", + "DSP_ACOUT15" + ], + [ + "DSP_0_ACIN16", + "DSP_ACOUT16" + ], + [ + "DSP_0_ACIN17", + "DSP_ACOUT17" + ], + [ + "DSP_0_ACIN18", + "DSP_ACOUT18" + ], + [ + "DSP_0_ACIN19", + "DSP_ACOUT19" + ], + [ + "DSP_0_ACIN20", + "DSP_ACOUT20" + ], + [ + "DSP_0_ACIN21", + "DSP_ACOUT21" + ], + [ + "DSP_0_ACIN22", + "DSP_ACOUT22" + ], + [ + "DSP_0_ACIN23", + "DSP_ACOUT23" + ], + [ + "DSP_0_ACIN24", + "DSP_ACOUT24" + ], + [ + "DSP_0_ACIN25", + "DSP_ACOUT25" + ], + [ + "DSP_0_ACIN26", + "DSP_ACOUT26" + ], + [ + "DSP_0_ACIN27", + "DSP_ACOUT27" + ], + [ + "DSP_0_ACIN28", + "DSP_ACOUT28" + ], + [ + "DSP_0_ACIN29", + "DSP_ACOUT29" + ], + [ + "DSP_0_BCIN0", + "DSP_BCOUT0" + ], + [ + "DSP_0_BCIN1", + "DSP_BCOUT1" + ], + [ + "DSP_0_BCIN2", + "DSP_BCOUT2" + ], + [ + "DSP_0_BCIN3", + "DSP_BCOUT3" + ], + [ + "DSP_0_BCIN4", + "DSP_BCOUT4" + ], + [ + "DSP_0_BCIN5", + "DSP_BCOUT5" + ], + [ + "DSP_0_BCIN6", + "DSP_BCOUT6" + ], + [ + "DSP_0_BCIN7", + "DSP_BCOUT7" + ], + [ + "DSP_0_BCIN8", + "DSP_BCOUT8" + ], + [ + "DSP_0_BCIN9", + "DSP_BCOUT9" + ], + [ + "DSP_0_BCIN10", + "DSP_BCOUT10" + ], + [ + "DSP_0_BCIN11", + "DSP_BCOUT11" + ], + [ + "DSP_0_BCIN12", + "DSP_BCOUT12" + ], + [ + "DSP_0_BCIN13", + "DSP_BCOUT13" + ], + [ + "DSP_0_BCIN14", + "DSP_BCOUT14" + ], + [ + "DSP_0_BCIN15", + "DSP_BCOUT15" + ], + [ + "DSP_0_BCIN16", + "DSP_BCOUT16" + ], + [ + "DSP_0_BCIN17", + "DSP_BCOUT17" + ], + [ + "DSP_0_CARRYCASCIN", + "DSP_CARRYCASCOUT" + ], + [ + "DSP_0_MULTSIGNIN", + "DSP_MULTSIGNOUT" + ], + [ + "DSP_0_PCIN0", + "DSP_PCOUT0" + ], + [ + "DSP_0_PCIN1", + "DSP_PCOUT1" + ], + [ + "DSP_0_PCIN2", + "DSP_PCOUT2" + ], + [ + "DSP_0_PCIN3", + "DSP_PCOUT3" + ], + [ + "DSP_0_PCIN4", + "DSP_PCOUT4" + ], + [ + "DSP_0_PCIN5", + "DSP_PCOUT5" + ], + [ + "DSP_0_PCIN6", + "DSP_PCOUT6" + ], + [ + "DSP_0_PCIN7", + "DSP_PCOUT7" + ], + [ + "DSP_0_PCIN8", + "DSP_PCOUT8" + ], + [ + "DSP_0_PCIN9", + "DSP_PCOUT9" + ], + [ + "DSP_0_PCIN10", + "DSP_PCOUT10" + ], + [ + "DSP_0_PCIN11", + "DSP_PCOUT11" + ], + [ + "DSP_0_PCIN12", + "DSP_PCOUT12" + ], + [ + "DSP_0_PCIN13", + "DSP_PCOUT13" + ], + [ + "DSP_0_PCIN14", + "DSP_PCOUT14" + ], + [ + "DSP_0_PCIN15", + "DSP_PCOUT15" + ], + [ + "DSP_0_PCIN16", + "DSP_PCOUT16" + ], + [ + "DSP_0_PCIN17", + "DSP_PCOUT17" + ], + [ + "DSP_0_PCIN18", + "DSP_PCOUT18" + ], + [ + "DSP_0_PCIN19", + "DSP_PCOUT19" + ], + [ + "DSP_0_PCIN20", + "DSP_PCOUT20" + ], + [ + "DSP_0_PCIN21", + "DSP_PCOUT21" + ], + [ + "DSP_0_PCIN22", + "DSP_PCOUT22" + ], + [ + "DSP_0_PCIN23", + "DSP_PCOUT23" + ], + [ + "DSP_0_PCIN24", + "DSP_PCOUT24" + ], + [ + "DSP_0_PCIN25", + "DSP_PCOUT25" + ], + [ + "DSP_0_PCIN26", + "DSP_PCOUT26" + ], + [ + "DSP_0_PCIN27", + "DSP_PCOUT27" + ], + [ + "DSP_0_PCIN28", + "DSP_PCOUT28" + ], + [ + "DSP_0_PCIN29", + "DSP_PCOUT29" + ], + [ + "DSP_0_PCIN30", + "DSP_PCOUT30" + ], + [ + "DSP_0_PCIN31", + "DSP_PCOUT31" + ], + [ + "DSP_0_PCIN32", + "DSP_PCOUT32" + ], + [ + "DSP_0_PCIN33", + "DSP_PCOUT33" + ], + [ + "DSP_0_PCIN34", + "DSP_PCOUT34" + ], + [ + "DSP_0_PCIN35", + "DSP_PCOUT35" + ], + [ + "DSP_0_PCIN36", + "DSP_PCOUT36" + ], + [ + "DSP_0_PCIN37", + "DSP_PCOUT37" + ], + [ + "DSP_0_PCIN38", + "DSP_PCOUT38" + ], + [ + "DSP_0_PCIN39", + "DSP_PCOUT39" + ], + [ + "DSP_0_PCIN40", + "DSP_PCOUT40" + ], + [ + "DSP_0_PCIN41", + "DSP_PCOUT41" + ], + [ + "DSP_0_PCIN42", + "DSP_PCOUT42" + ], + [ + "DSP_0_PCIN43", + "DSP_PCOUT43" + ], + [ + "DSP_0_PCIN44", + "DSP_PCOUT44" + ], + [ + "DSP_0_PCIN45", + "DSP_PCOUT45" + ], + [ + "DSP_0_PCIN46", + "DSP_PCOUT46" + ], + [ + "DSP_0_PCIN47", + "DSP_PCOUT47" + ] + ] + }, + { + "grid_deltas": [ + 0, + -5 + ], + "tile_types": [ + "DSP_R", + "HCLK_DSP_R" + ], + "wire_pairs": [ + [ + "DSP_ACOUT0", + "HCLK_DSP_ACIN0" + ], + [ + "DSP_ACOUT1", + "HCLK_DSP_ACIN1" + ], + [ + "DSP_ACOUT2", + "HCLK_DSP_ACIN2" + ], + [ + "DSP_ACOUT3", + "HCLK_DSP_ACIN3" + ], + [ + "DSP_ACOUT4", + "HCLK_DSP_ACIN4" + ], + [ + "DSP_ACOUT5", + "HCLK_DSP_ACIN5" + ], + [ + "DSP_ACOUT6", + "HCLK_DSP_ACIN6" + ], + [ + "DSP_ACOUT7", + "HCLK_DSP_ACIN7" + ], + [ + "DSP_ACOUT8", + "HCLK_DSP_ACIN8" + ], + [ + "DSP_ACOUT9", + "HCLK_DSP_ACIN9" + ], + [ + "DSP_ACOUT10", + "HCLK_DSP_ACIN10" + ], + [ + "DSP_ACOUT11", + "HCLK_DSP_ACIN11" + ], + [ + "DSP_ACOUT12", + "HCLK_DSP_ACIN12" + ], + [ + "DSP_ACOUT13", + "HCLK_DSP_ACIN13" + ], + [ + "DSP_ACOUT14", + "HCLK_DSP_ACIN14" + ], + [ + "DSP_ACOUT15", + "HCLK_DSP_ACIN15" + ], + [ + "DSP_ACOUT16", + "HCLK_DSP_ACIN16" + ], + [ + "DSP_ACOUT17", + "HCLK_DSP_ACIN17" + ], + [ + "DSP_ACOUT18", + "HCLK_DSP_ACIN18" + ], + [ + "DSP_ACOUT19", + "HCLK_DSP_ACIN19" + ], + [ + "DSP_ACOUT20", + "HCLK_DSP_ACIN20" + ], + [ + "DSP_ACOUT21", + "HCLK_DSP_ACIN21" + ], + [ + "DSP_ACOUT22", + "HCLK_DSP_ACIN22" + ], + [ + "DSP_ACOUT23", + "HCLK_DSP_ACIN23" + ], + [ + "DSP_ACOUT24", + "HCLK_DSP_ACIN24" + ], + [ + "DSP_ACOUT25", + "HCLK_DSP_ACIN25" + ], + [ + "DSP_ACOUT26", + "HCLK_DSP_ACIN26" + ], + [ + "DSP_ACOUT27", + "HCLK_DSP_ACIN27" + ], + [ + "DSP_ACOUT28", + "HCLK_DSP_ACIN28" + ], + [ + "DSP_ACOUT29", + "HCLK_DSP_ACIN29" + ], + [ + "DSP_BCOUT0", + "HCLK_DSP_BCIN0" + ], + [ + "DSP_BCOUT1", + "HCLK_DSP_BCIN1" + ], + [ + "DSP_BCOUT2", + "HCLK_DSP_BCIN2" + ], + [ + "DSP_BCOUT3", + "HCLK_DSP_BCIN3" + ], + [ + "DSP_BCOUT4", + "HCLK_DSP_BCIN4" + ], + [ + "DSP_BCOUT5", + "HCLK_DSP_BCIN5" + ], + [ + "DSP_BCOUT6", + "HCLK_DSP_BCIN6" + ], + [ + "DSP_BCOUT7", + "HCLK_DSP_BCIN7" + ], + [ + "DSP_BCOUT8", + "HCLK_DSP_BCIN8" + ], + [ + "DSP_BCOUT9", + "HCLK_DSP_BCIN9" + ], + [ + "DSP_BCOUT10", + "HCLK_DSP_BCIN10" + ], + [ + "DSP_BCOUT11", + "HCLK_DSP_BCIN11" + ], + [ + "DSP_BCOUT12", + "HCLK_DSP_BCIN12" + ], + [ + "DSP_BCOUT13", + "HCLK_DSP_BCIN13" + ], + [ + "DSP_BCOUT14", + "HCLK_DSP_BCIN14" + ], + [ + "DSP_BCOUT15", + "HCLK_DSP_BCIN15" + ], + [ + "DSP_BCOUT16", + "HCLK_DSP_BCIN16" + ], + [ + "DSP_BCOUT17", + "HCLK_DSP_BCIN17" + ], + [ + "DSP_CARRYCASCOUT", + "HCLK_DSP_CARRYCASCIN" + ], + [ + "DSP_MULTSIGNOUT", + "HCLK_DSP_MULTSIGNIN" + ], + [ + "DSP_PCOUT0", + "HCLK_DSP_PCIN0" + ], + [ + "DSP_PCOUT1", + "HCLK_DSP_PCIN1" + ], + [ + "DSP_PCOUT2", + "HCLK_DSP_PCIN2" + ], + [ + "DSP_PCOUT3", + "HCLK_DSP_PCIN3" + ], + [ + "DSP_PCOUT4", + "HCLK_DSP_PCIN4" + ], + [ + "DSP_PCOUT5", + "HCLK_DSP_PCIN5" + ], + [ + "DSP_PCOUT6", + "HCLK_DSP_PCIN6" + ], + [ + "DSP_PCOUT7", + "HCLK_DSP_PCIN7" + ], + [ + "DSP_PCOUT8", + "HCLK_DSP_PCIN8" + ], + [ + "DSP_PCOUT9", + "HCLK_DSP_PCIN9" + ], + [ + "DSP_PCOUT10", + "HCLK_DSP_PCIN10" + ], + [ + "DSP_PCOUT11", + "HCLK_DSP_PCIN11" + ], + [ + "DSP_PCOUT12", + "HCLK_DSP_PCIN12" + ], + [ + "DSP_PCOUT13", + "HCLK_DSP_PCIN13" + ], + [ + "DSP_PCOUT14", + "HCLK_DSP_PCIN14" + ], + [ + "DSP_PCOUT15", + "HCLK_DSP_PCIN15" + ], + [ + "DSP_PCOUT16", + "HCLK_DSP_PCIN16" + ], + [ + "DSP_PCOUT17", + "HCLK_DSP_PCIN17" + ], + [ + "DSP_PCOUT18", + "HCLK_DSP_PCIN18" + ], + [ + "DSP_PCOUT19", + "HCLK_DSP_PCIN19" + ], + [ + "DSP_PCOUT20", + "HCLK_DSP_PCIN20" + ], + [ + "DSP_PCOUT21", + "HCLK_DSP_PCIN21" + ], + [ + "DSP_PCOUT22", + "HCLK_DSP_PCIN22" + ], + [ + "DSP_PCOUT23", + "HCLK_DSP_PCIN23" + ], + [ + "DSP_PCOUT24", + "HCLK_DSP_PCIN24" + ], + [ + "DSP_PCOUT25", + "HCLK_DSP_PCIN25" + ], + [ + "DSP_PCOUT26", + "HCLK_DSP_PCIN26" + ], + [ + "DSP_PCOUT27", + "HCLK_DSP_PCIN27" + ], + [ + "DSP_PCOUT28", + "HCLK_DSP_PCIN28" + ], + [ + "DSP_PCOUT29", + "HCLK_DSP_PCIN29" + ], + [ + "DSP_PCOUT30", + "HCLK_DSP_PCIN30" + ], + [ + "DSP_PCOUT31", + "HCLK_DSP_PCIN31" + ], + [ + "DSP_PCOUT32", + "HCLK_DSP_PCIN32" + ], + [ + "DSP_PCOUT33", + "HCLK_DSP_PCIN33" + ], + [ + "DSP_PCOUT34", + "HCLK_DSP_PCIN34" + ], + [ + "DSP_PCOUT35", + "HCLK_DSP_PCIN35" + ], + [ + "DSP_PCOUT36", + "HCLK_DSP_PCIN36" + ], + [ + "DSP_PCOUT37", + "HCLK_DSP_PCIN37" + ], + [ + "DSP_PCOUT38", + "HCLK_DSP_PCIN38" + ], + [ + "DSP_PCOUT39", + "HCLK_DSP_PCIN39" + ], + [ + "DSP_PCOUT40", + "HCLK_DSP_PCIN40" + ], + [ + "DSP_PCOUT41", + "HCLK_DSP_PCIN41" + ], + [ + "DSP_PCOUT42", + "HCLK_DSP_PCIN42" + ], + [ + "DSP_PCOUT43", + "HCLK_DSP_PCIN43" + ], + [ + "DSP_PCOUT44", + "HCLK_DSP_PCIN44" + ], + [ + "DSP_PCOUT45", + "HCLK_DSP_PCIN45" + ], + [ + "DSP_PCOUT46", + "HCLK_DSP_PCIN46" + ], + [ + "DSP_PCOUT47", + "HCLK_DSP_PCIN47" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "DSP_R", + "HCLK_DSP_R" + ], + "wire_pairs": [ + [ + "DSP_0_ACIN0", + "HCLK_DSP_ACIN0" + ], + [ + "DSP_0_ACIN1", + "HCLK_DSP_ACIN1" + ], + [ + "DSP_0_ACIN2", + "HCLK_DSP_ACIN2" + ], + [ + "DSP_0_ACIN3", + "HCLK_DSP_ACIN3" + ], + [ + "DSP_0_ACIN4", + "HCLK_DSP_ACIN4" + ], + [ + "DSP_0_ACIN5", + "HCLK_DSP_ACIN5" + ], + [ + "DSP_0_ACIN6", + "HCLK_DSP_ACIN6" + ], + [ + "DSP_0_ACIN7", + "HCLK_DSP_ACIN7" + ], + [ + "DSP_0_ACIN8", + "HCLK_DSP_ACIN8" + ], + [ + "DSP_0_ACIN9", + "HCLK_DSP_ACIN9" + ], + [ + "DSP_0_ACIN10", + "HCLK_DSP_ACIN10" + ], + [ + "DSP_0_ACIN11", + "HCLK_DSP_ACIN11" + ], + [ + "DSP_0_ACIN12", + "HCLK_DSP_ACIN12" + ], + [ + "DSP_0_ACIN13", + "HCLK_DSP_ACIN13" + ], + [ + "DSP_0_ACIN14", + "HCLK_DSP_ACIN14" + ], + [ + "DSP_0_ACIN15", + "HCLK_DSP_ACIN15" + ], + [ + "DSP_0_ACIN16", + "HCLK_DSP_ACIN16" + ], + [ + "DSP_0_ACIN17", + "HCLK_DSP_ACIN17" + ], + [ + "DSP_0_ACIN18", + "HCLK_DSP_ACIN18" + ], + [ + "DSP_0_ACIN19", + "HCLK_DSP_ACIN19" + ], + [ + "DSP_0_ACIN20", + "HCLK_DSP_ACIN20" + ], + [ + "DSP_0_ACIN21", + "HCLK_DSP_ACIN21" + ], + [ + "DSP_0_ACIN22", + "HCLK_DSP_ACIN22" + ], + [ + "DSP_0_ACIN23", + "HCLK_DSP_ACIN23" + ], + [ + "DSP_0_ACIN24", + "HCLK_DSP_ACIN24" + ], + [ + "DSP_0_ACIN25", + "HCLK_DSP_ACIN25" + ], + [ + "DSP_0_ACIN26", + "HCLK_DSP_ACIN26" + ], + [ + "DSP_0_ACIN27", + "HCLK_DSP_ACIN27" + ], + [ + "DSP_0_ACIN28", + "HCLK_DSP_ACIN28" + ], + [ + "DSP_0_ACIN29", + "HCLK_DSP_ACIN29" + ], + [ + "DSP_0_BCIN0", + "HCLK_DSP_BCIN0" + ], + [ + "DSP_0_BCIN1", + "HCLK_DSP_BCIN1" + ], + [ + "DSP_0_BCIN2", + "HCLK_DSP_BCIN2" + ], + [ + "DSP_0_BCIN3", + "HCLK_DSP_BCIN3" + ], + [ + "DSP_0_BCIN4", + "HCLK_DSP_BCIN4" + ], + [ + "DSP_0_BCIN5", + "HCLK_DSP_BCIN5" + ], + [ + "DSP_0_BCIN6", + "HCLK_DSP_BCIN6" + ], + [ + "DSP_0_BCIN7", + "HCLK_DSP_BCIN7" + ], + [ + "DSP_0_BCIN8", + "HCLK_DSP_BCIN8" + ], + [ + "DSP_0_BCIN9", + "HCLK_DSP_BCIN9" + ], + [ + "DSP_0_BCIN10", + "HCLK_DSP_BCIN10" + ], + [ + "DSP_0_BCIN11", + "HCLK_DSP_BCIN11" + ], + [ + "DSP_0_BCIN12", + "HCLK_DSP_BCIN12" + ], + [ + "DSP_0_BCIN13", + "HCLK_DSP_BCIN13" + ], + [ + "DSP_0_BCIN14", + "HCLK_DSP_BCIN14" + ], + [ + "DSP_0_BCIN15", + "HCLK_DSP_BCIN15" + ], + [ + "DSP_0_BCIN16", + "HCLK_DSP_BCIN16" + ], + [ + "DSP_0_BCIN17", + "HCLK_DSP_BCIN17" + ], + [ + "DSP_0_CARRYCASCIN", + "HCLK_DSP_CARRYCASCIN" + ], + [ + "DSP_0_MULTSIGNIN", + "HCLK_DSP_MULTSIGNIN" + ], + [ + "DSP_0_PCIN0", + "HCLK_DSP_PCIN0" + ], + [ + "DSP_0_PCIN1", + "HCLK_DSP_PCIN1" + ], + [ + "DSP_0_PCIN2", + "HCLK_DSP_PCIN2" + ], + [ + "DSP_0_PCIN3", + "HCLK_DSP_PCIN3" + ], + [ + "DSP_0_PCIN4", + "HCLK_DSP_PCIN4" + ], + [ + "DSP_0_PCIN5", + "HCLK_DSP_PCIN5" + ], + [ + "DSP_0_PCIN6", + "HCLK_DSP_PCIN6" + ], + [ + "DSP_0_PCIN7", + "HCLK_DSP_PCIN7" + ], + [ + "DSP_0_PCIN8", + "HCLK_DSP_PCIN8" + ], + [ + "DSP_0_PCIN9", + "HCLK_DSP_PCIN9" + ], + [ + "DSP_0_PCIN10", + "HCLK_DSP_PCIN10" + ], + [ + "DSP_0_PCIN11", + "HCLK_DSP_PCIN11" + ], + [ + "DSP_0_PCIN12", + "HCLK_DSP_PCIN12" + ], + [ + "DSP_0_PCIN13", + "HCLK_DSP_PCIN13" + ], + [ + "DSP_0_PCIN14", + "HCLK_DSP_PCIN14" + ], + [ + "DSP_0_PCIN15", + "HCLK_DSP_PCIN15" + ], + [ + "DSP_0_PCIN16", + "HCLK_DSP_PCIN16" + ], + [ + "DSP_0_PCIN17", + "HCLK_DSP_PCIN17" + ], + [ + "DSP_0_PCIN18", + "HCLK_DSP_PCIN18" + ], + [ + "DSP_0_PCIN19", + "HCLK_DSP_PCIN19" + ], + [ + "DSP_0_PCIN20", + "HCLK_DSP_PCIN20" + ], + [ + "DSP_0_PCIN21", + "HCLK_DSP_PCIN21" + ], + [ + "DSP_0_PCIN22", + "HCLK_DSP_PCIN22" + ], + [ + "DSP_0_PCIN23", + "HCLK_DSP_PCIN23" + ], + [ + "DSP_0_PCIN24", + "HCLK_DSP_PCIN24" + ], + [ + "DSP_0_PCIN25", + "HCLK_DSP_PCIN25" + ], + [ + "DSP_0_PCIN26", + "HCLK_DSP_PCIN26" + ], + [ + "DSP_0_PCIN27", + "HCLK_DSP_PCIN27" + ], + [ + "DSP_0_PCIN28", + "HCLK_DSP_PCIN28" + ], + [ + "DSP_0_PCIN29", + "HCLK_DSP_PCIN29" + ], + [ + "DSP_0_PCIN30", + "HCLK_DSP_PCIN30" + ], + [ + "DSP_0_PCIN31", + "HCLK_DSP_PCIN31" + ], + [ + "DSP_0_PCIN32", + "HCLK_DSP_PCIN32" + ], + [ + "DSP_0_PCIN33", + "HCLK_DSP_PCIN33" + ], + [ + "DSP_0_PCIN34", + "HCLK_DSP_PCIN34" + ], + [ + "DSP_0_PCIN35", + "HCLK_DSP_PCIN35" + ], + [ + "DSP_0_PCIN36", + "HCLK_DSP_PCIN36" + ], + [ + "DSP_0_PCIN37", + "HCLK_DSP_PCIN37" + ], + [ + "DSP_0_PCIN38", + "HCLK_DSP_PCIN38" + ], + [ + "DSP_0_PCIN39", + "HCLK_DSP_PCIN39" + ], + [ + "DSP_0_PCIN40", + "HCLK_DSP_PCIN40" + ], + [ + "DSP_0_PCIN41", + "HCLK_DSP_PCIN41" + ], + [ + "DSP_0_PCIN42", + "HCLK_DSP_PCIN42" + ], + [ + "DSP_0_PCIN43", + "HCLK_DSP_PCIN43" + ], + [ + "DSP_0_PCIN44", + "HCLK_DSP_PCIN44" + ], + [ + "DSP_0_PCIN45", + "HCLK_DSP_PCIN45" + ], + [ + "DSP_0_PCIN46", + "HCLK_DSP_PCIN46" + ], + [ + "DSP_0_PCIN47", + "HCLK_DSP_PCIN47" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "DSP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "DSP_BYP0_4", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_4", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_4", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_4", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_4", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_4", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_4", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_4", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_4", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_4", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_4", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_4", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_4", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_4", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_4", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_4", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_4", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_4", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_4", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_4", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_4", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_4", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_4", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_4", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_4", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_4", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_4", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_4", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_4", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_4", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_4", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_4", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_4", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_4", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_4", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_4", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_4", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_4", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_4", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_4", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_4", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_4", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_4", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_4", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_4", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_4", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_4", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_4", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_4", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_4", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_4", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_4", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_4", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_4", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_4", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_4", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_4", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_4", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_4", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_4", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_4", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_4", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_4", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_4", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_4", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_4", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_4", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_4", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_4", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_4", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_4", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_4", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_4", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_4", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_4", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_4", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_4", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "DSP_LOGIC_OUTS_B9_4", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "DSP_LOGIC_OUTS_B10_4", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_4", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "DSP_LOGIC_OUTS_B12_4", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "DSP_LOGIC_OUTS_B13_4", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "DSP_LOGIC_OUTS_B14_4", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_4", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_4", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_4", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_4", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_4", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_4", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_4", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_4", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_4", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "DSP_MONITOR_N_4", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_4", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "DSP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "DSP_BYP0_3", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_3", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_3", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_3", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_3", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_3", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_3", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_3", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_3", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_3", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_3", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_3", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_3", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_3", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_3", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_3", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_3", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_3", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_3", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_3", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_3", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_3", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_3", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_3", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_3", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_3", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_3", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_3", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_3", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_3", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_3", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_3", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_3", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_3", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_3", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_3", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_3", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_3", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_3", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_3", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_3", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_3", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_3", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_3", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_3", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_3", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_3", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_3", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_3", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_3", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_3", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_3", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_3", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_3", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_3", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_3", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_3", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_3", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_3", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_3", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_3", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_3", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_3", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_3", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_3", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_3", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_3", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_3", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_3", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_3", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_3", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_3", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_3", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_3", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_3", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_3", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_3", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "DSP_LOGIC_OUTS_B10_3", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_3", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "DSP_LOGIC_OUTS_B14_3", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_3", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_3", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_3", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_3", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_3", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_3", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_3", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_3", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_3", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "DSP_MONITOR_N_3", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_3", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "DSP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "DSP_BYP0_2", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_2", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_2", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_2", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_2", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_2", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_2", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_2", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_2", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_2", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_2", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_2", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_2", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_2", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_2", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_2", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_2", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_2", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_2", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_2", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_2", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_2", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_2", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_2", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_2", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_2", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_2", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_2", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_2", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_2", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_2", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_2", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_2", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_2", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_2", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_2", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_2", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_2", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_2", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_2", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_2", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_2", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_2", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_2", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_2", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_2", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_2", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_2", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_2", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_2", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_2", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_2", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_2", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_2", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_2", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_2", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_2", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_2", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_2", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_2", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_2", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_2", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_2", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_2", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_2", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_2", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_2", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_2", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_2", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_2", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_2", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_2", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_2", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_2", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_2", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_2", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_2", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "DSP_LOGIC_OUTS_B9_2", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "DSP_LOGIC_OUTS_B10_2", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_2", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "DSP_LOGIC_OUTS_B13_2", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "DSP_LOGIC_OUTS_B14_2", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_2", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_2", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_2", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_2", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_2", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_2", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_2", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_2", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_2", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "DSP_MONITOR_N_2", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_2", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "DSP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "DSP_BYP0_1", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_1", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_1", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_1", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_1", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_1", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_1", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_1", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_1", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_1", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_1", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_1", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_1", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_1", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_1", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_1", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_1", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_1", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_1", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_1", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_1", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_1", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_1", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_1", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_1", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_1", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_1", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_1", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_1", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_1", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_1", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_1", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_1", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_1", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_1", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_1", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_1", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_1", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_1", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_1", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_1", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_1", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_1", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_1", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_1", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_1", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_1", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_1", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_1", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_1", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_1", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_1", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_1", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_1", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_1", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_1", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_1", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_1", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_1", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_1", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_1", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_1", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_1", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_1", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_1", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_1", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_1", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_1", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_1", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_1", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_1", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_1", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_1", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_1", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_1", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_1", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "DSP_LOGIC_OUTS_B10_1", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_1", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "DSP_LOGIC_OUTS_B12_1", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "DSP_LOGIC_OUTS_B13_1", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "DSP_LOGIC_OUTS_B16_1", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_1", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_1", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_1", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_1", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_1", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_1", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_1", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "DSP_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "DSP_R", + "INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "DSP_BYP0_0", + "INT_INTERFACE_BYP0" + ], + [ + "DSP_BYP1_0", + "INT_INTERFACE_BYP1" + ], + [ + "DSP_BYP2_0", + "INT_INTERFACE_BYP2" + ], + [ + "DSP_BYP3_0", + "INT_INTERFACE_BYP3" + ], + [ + "DSP_BYP4_0", + "INT_INTERFACE_BYP4" + ], + [ + "DSP_BYP5_0", + "INT_INTERFACE_BYP5" + ], + [ + "DSP_BYP6_0", + "INT_INTERFACE_BYP6" + ], + [ + "DSP_BYP7_0", + "INT_INTERFACE_BYP7" + ], + [ + "DSP_CLK0_0", + "INT_INTERFACE_CLK0" + ], + [ + "DSP_CLK1_0", + "INT_INTERFACE_CLK1" + ], + [ + "DSP_CTRL0_0", + "INT_INTERFACE_CTRL0" + ], + [ + "DSP_CTRL1_0", + "INT_INTERFACE_CTRL1" + ], + [ + "DSP_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "DSP_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "DSP_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "DSP_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "DSP_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "DSP_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "DSP_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "DSP_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "DSP_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "DSP_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "DSP_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "DSP_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "DSP_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "DSP_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "DSP_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "DSP_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "DSP_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "DSP_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "DSP_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "DSP_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "DSP_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "DSP_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "DSP_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "DSP_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "DSP_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "DSP_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "DSP_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "DSP_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "DSP_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "DSP_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "DSP_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "DSP_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "DSP_FAN0_0", + "INT_INTERFACE_FAN0" + ], + [ + "DSP_FAN1_0", + "INT_INTERFACE_FAN1" + ], + [ + "DSP_FAN2_0", + "INT_INTERFACE_FAN2" + ], + [ + "DSP_FAN3_0", + "INT_INTERFACE_FAN3" + ], + [ + "DSP_FAN4_0", + "INT_INTERFACE_FAN4" + ], + [ + "DSP_FAN5_0", + "INT_INTERFACE_FAN5" + ], + [ + "DSP_FAN6_0", + "INT_INTERFACE_FAN6" + ], + [ + "DSP_FAN7_0", + "INT_INTERFACE_FAN7" + ], + [ + "DSP_IMUX0_0", + "INT_INTERFACE_IMUX0" + ], + [ + "DSP_IMUX1_0", + "INT_INTERFACE_IMUX1" + ], + [ + "DSP_IMUX2_0", + "INT_INTERFACE_IMUX2" + ], + [ + "DSP_IMUX3_0", + "INT_INTERFACE_IMUX3" + ], + [ + "DSP_IMUX4_0", + "INT_INTERFACE_IMUX4" + ], + [ + "DSP_IMUX5_0", + "INT_INTERFACE_IMUX5" + ], + [ + "DSP_IMUX6_0", + "INT_INTERFACE_IMUX6" + ], + [ + "DSP_IMUX7_0", + "INT_INTERFACE_IMUX7" + ], + [ + "DSP_IMUX8_0", + "INT_INTERFACE_IMUX8" + ], + [ + "DSP_IMUX9_0", + "INT_INTERFACE_IMUX9" + ], + [ + "DSP_IMUX10_0", + "INT_INTERFACE_IMUX10" + ], + [ + "DSP_IMUX11_0", + "INT_INTERFACE_IMUX11" + ], + [ + "DSP_IMUX12_0", + "INT_INTERFACE_IMUX12" + ], + [ + "DSP_IMUX13_0", + "INT_INTERFACE_IMUX13" + ], + [ + "DSP_IMUX14_0", + "INT_INTERFACE_IMUX14" + ], + [ + "DSP_IMUX15_0", + "INT_INTERFACE_IMUX15" + ], + [ + "DSP_IMUX16_0", + "INT_INTERFACE_IMUX16" + ], + [ + "DSP_IMUX17_0", + "INT_INTERFACE_IMUX17" + ], + [ + "DSP_IMUX18_0", + "INT_INTERFACE_IMUX18" + ], + [ + "DSP_IMUX19_0", + "INT_INTERFACE_IMUX19" + ], + [ + "DSP_IMUX20_0", + "INT_INTERFACE_IMUX20" + ], + [ + "DSP_IMUX21_0", + "INT_INTERFACE_IMUX21" + ], + [ + "DSP_IMUX22_0", + "INT_INTERFACE_IMUX22" + ], + [ + "DSP_IMUX23_0", + "INT_INTERFACE_IMUX23" + ], + [ + "DSP_IMUX24_0", + "INT_INTERFACE_IMUX24" + ], + [ + "DSP_IMUX25_0", + "INT_INTERFACE_IMUX25" + ], + [ + "DSP_IMUX26_0", + "INT_INTERFACE_IMUX26" + ], + [ + "DSP_IMUX27_0", + "INT_INTERFACE_IMUX27" + ], + [ + "DSP_IMUX28_0", + "INT_INTERFACE_IMUX28" + ], + [ + "DSP_IMUX29_0", + "INT_INTERFACE_IMUX29" + ], + [ + "DSP_IMUX30_0", + "INT_INTERFACE_IMUX30" + ], + [ + "DSP_IMUX31_0", + "INT_INTERFACE_IMUX31" + ], + [ + "DSP_IMUX32_0", + "INT_INTERFACE_IMUX32" + ], + [ + "DSP_IMUX33_0", + "INT_INTERFACE_IMUX33" + ], + [ + "DSP_IMUX34_0", + "INT_INTERFACE_IMUX34" + ], + [ + "DSP_IMUX35_0", + "INT_INTERFACE_IMUX35" + ], + [ + "DSP_IMUX36_0", + "INT_INTERFACE_IMUX36" + ], + [ + "DSP_IMUX37_0", + "INT_INTERFACE_IMUX37" + ], + [ + "DSP_IMUX38_0", + "INT_INTERFACE_IMUX38" + ], + [ + "DSP_IMUX39_0", + "INT_INTERFACE_IMUX39" + ], + [ + "DSP_IMUX40_0", + "INT_INTERFACE_IMUX40" + ], + [ + "DSP_IMUX41_0", + "INT_INTERFACE_IMUX41" + ], + [ + "DSP_IMUX42_0", + "INT_INTERFACE_IMUX42" + ], + [ + "DSP_IMUX43_0", + "INT_INTERFACE_IMUX43" + ], + [ + "DSP_IMUX44_0", + "INT_INTERFACE_IMUX44" + ], + [ + "DSP_IMUX45_0", + "INT_INTERFACE_IMUX45" + ], + [ + "DSP_IMUX46_0", + "INT_INTERFACE_IMUX46" + ], + [ + "DSP_IMUX47_0", + "INT_INTERFACE_IMUX47" + ], + [ + "DSP_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "DSP_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "DSP_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "DSP_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "DSP_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "DSP_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "DSP_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "DSP_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "DSP_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "DSP_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "DSP_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "DSP_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "DSP_LOGIC_OUTS_B0_0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "DSP_LOGIC_OUTS_B1_0", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "DSP_LOGIC_OUTS_B2_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "DSP_LOGIC_OUTS_B3_0", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "DSP_LOGIC_OUTS_B4_0", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "DSP_LOGIC_OUTS_B5_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "DSP_LOGIC_OUTS_B6_0", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "DSP_LOGIC_OUTS_B7_0", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "DSP_LOGIC_OUTS_B8_0", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "DSP_LOGIC_OUTS_B9_0", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "DSP_LOGIC_OUTS_B10_0", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "DSP_LOGIC_OUTS_B11_0", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "DSP_LOGIC_OUTS_B12_0", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "DSP_LOGIC_OUTS_B13_0", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "DSP_LOGIC_OUTS_B14_0", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "DSP_LOGIC_OUTS_B15_0", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "DSP_LOGIC_OUTS_B16_0", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "DSP_LOGIC_OUTS_B17_0", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "DSP_LOGIC_OUTS_B18_0", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "DSP_LOGIC_OUTS_B19_0", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "DSP_LOGIC_OUTS_B20_0", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "DSP_LOGIC_OUTS_B21_0", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "DSP_LOGIC_OUTS_B22_0", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "DSP_LOGIC_OUTS_B23_0", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "DSP_MONITOR_N_0", + "INT_INTERFACE_MONITOR_N" + ], + [ + "DSP_MONITOR_P_0", + "INT_INTERFACE_MONITOR_P" + ], + [ + "DSP_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "DSP_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "DSP_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "DSP_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "DSP_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "DSP_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "DSP_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "DSP_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "DSP_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "DSP_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "DSP_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "DSP_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "DSP_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "DSP_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "DSP_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "DSP_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "DSP_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "DSP_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "DSP_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "DSP_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "DSP_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "DSP_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "DSP_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "DSP_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "DSP_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "DSP_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "DSP_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "DSP_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "DSP_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "DSP_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "DSP_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "DSP_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "DSP_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "DSP_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "DSP_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "DSP_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "DSP_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "DSP_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "DSP_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "DSP_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "DSP_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "DSP_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "DSP_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "DSP_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "DSP_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "DSP_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "DSP_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "DSP_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "DSP_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "DSP_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "DSP_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "DSP_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "DSP_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "DSP_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "DSP_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "DSP_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "DSP_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "DSP_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "DSP_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "DSP_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "DSP_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "DSP_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "DSP_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "DSP_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "DSP_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "DSP_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "DSP_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "DSP_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "DSP_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "DSP_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "DSP_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "DSP_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "DSP_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "DSP_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "DSP_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "DSP_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "DSP_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "DSP_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "DSP_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "DSP_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "DSP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_4", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_4", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_4", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_4", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_4", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_4", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_4", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_4", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_4", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_4", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_4", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_4", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_4", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_4", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_4", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_4", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_4", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_4", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_4", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_4", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_4", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_4", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_4", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_4", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_4", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_4", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_4", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_4", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_4", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_4", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_4", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_4", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_4", + "VBRK_LH1" + ], + [ + "DSP_LH2_4", + "VBRK_LH2" + ], + [ + "DSP_LH3_4", + "VBRK_LH3" + ], + [ + "DSP_LH4_4", + "VBRK_LH4" + ], + [ + "DSP_LH5_4", + "VBRK_LH5" + ], + [ + "DSP_LH6_4", + "VBRK_LH6" + ], + [ + "DSP_LH7_4", + "VBRK_LH7" + ], + [ + "DSP_LH8_4", + "VBRK_LH8" + ], + [ + "DSP_LH9_4", + "VBRK_LH9" + ], + [ + "DSP_LH10_4", + "VBRK_LH10" + ], + [ + "DSP_LH11_4", + "VBRK_LH11" + ], + [ + "DSP_LH12_4", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_4", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_4", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_4", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_4", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_4", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_4", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_4", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_4", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_4", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_4", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_4", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_4", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_4", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_4", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_4", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_4", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_4", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_4", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_4", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_4", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_4", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_4", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_4", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_4", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_4", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_4", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_4", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_4", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_4", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_4", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_4", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_4", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_4", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_4", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_4", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_4", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_4", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_4", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_4", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_4", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_4", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_4", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_4", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_4", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_4", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_4", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_4", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_4", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_4", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_4", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_4", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_4", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_4", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_4", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_4", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_4", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_4", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_4", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_4", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_4", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_4", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_4", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_4", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_4", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_4", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_4", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_4", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_4", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_4", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_4", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_4", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_4", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_4", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_4", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_4", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_4", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_4", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_4", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_4", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_4", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_4", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_4", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "DSP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_3", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_3", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_3", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_3", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_3", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_3", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_3", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_3", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_3", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_3", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_3", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_3", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_3", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_3", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_3", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_3", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_3", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_3", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_3", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_3", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_3", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_3", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_3", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_3", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_3", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_3", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_3", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_3", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_3", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_3", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_3", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_3", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_3", + "VBRK_LH1" + ], + [ + "DSP_LH2_3", + "VBRK_LH2" + ], + [ + "DSP_LH3_3", + "VBRK_LH3" + ], + [ + "DSP_LH4_3", + "VBRK_LH4" + ], + [ + "DSP_LH5_3", + "VBRK_LH5" + ], + [ + "DSP_LH6_3", + "VBRK_LH6" + ], + [ + "DSP_LH7_3", + "VBRK_LH7" + ], + [ + "DSP_LH8_3", + "VBRK_LH8" + ], + [ + "DSP_LH9_3", + "VBRK_LH9" + ], + [ + "DSP_LH10_3", + "VBRK_LH10" + ], + [ + "DSP_LH11_3", + "VBRK_LH11" + ], + [ + "DSP_LH12_3", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_3", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_3", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_3", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_3", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_3", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_3", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_3", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_3", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_3", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_3", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_3", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_3", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_3", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_3", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_3", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_3", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_3", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_3", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_3", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_3", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_3", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_3", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_3", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_3", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_3", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_3", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_3", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_3", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_3", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_3", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_3", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_3", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_3", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_3", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_3", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_3", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_3", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_3", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_3", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_3", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_3", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_3", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_3", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_3", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_3", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_3", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_3", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_3", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_3", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_3", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_3", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_3", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_3", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_3", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_3", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_3", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_3", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_3", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_3", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_3", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_3", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_3", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_3", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_3", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_3", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_3", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_3", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_3", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_3", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_3", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_3", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_3", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_3", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_3", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_3", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_3", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_3", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_3", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_3", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_3", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_3", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "DSP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_2", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_2", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_2", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_2", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_2", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_2", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_2", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_2", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_2", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_2", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_2", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_2", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_2", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_2", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_2", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_2", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_2", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_2", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_2", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_2", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_2", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_2", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_2", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_2", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_2", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_2", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_2", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_2", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_2", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_2", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_2", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_2", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_2", + "VBRK_LH1" + ], + [ + "DSP_LH2_2", + "VBRK_LH2" + ], + [ + "DSP_LH3_2", + "VBRK_LH3" + ], + [ + "DSP_LH4_2", + "VBRK_LH4" + ], + [ + "DSP_LH5_2", + "VBRK_LH5" + ], + [ + "DSP_LH6_2", + "VBRK_LH6" + ], + [ + "DSP_LH7_2", + "VBRK_LH7" + ], + [ + "DSP_LH8_2", + "VBRK_LH8" + ], + [ + "DSP_LH9_2", + "VBRK_LH9" + ], + [ + "DSP_LH10_2", + "VBRK_LH10" + ], + [ + "DSP_LH11_2", + "VBRK_LH11" + ], + [ + "DSP_LH12_2", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_2", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_2", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_2", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_2", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_2", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_2", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_2", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_2", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_2", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_2", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_2", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_2", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_2", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_2", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_2", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_2", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_2", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_2", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_2", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_2", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_2", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_2", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_2", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_2", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_2", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_2", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_2", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_2", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_2", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_2", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_2", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_2", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_2", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_2", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_2", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_2", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_2", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_2", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_2", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_2", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_2", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_2", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_2", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_2", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_2", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_2", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_2", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_2", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_2", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_2", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_2", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_2", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_2", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_2", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_2", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_2", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_2", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_2", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_2", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_2", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_2", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_2", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_2", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_2", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_2", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_2", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_2", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_2", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_2", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_2", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_2", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_2", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_2", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_2", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_2", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_2", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_2", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_2", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_2", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_2", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_2", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_2", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "DSP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_1", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_1", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_1", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_1", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_1", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_1", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_1", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_1", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_1", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_1", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_1", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_1", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_1", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_1", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_1", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_1", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_1", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_1", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_1", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_1", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_1", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_1", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_1", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_1", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_1", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_1", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_1", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_1", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_1", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_1", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_1", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_1", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_1", + "VBRK_LH1" + ], + [ + "DSP_LH2_1", + "VBRK_LH2" + ], + [ + "DSP_LH3_1", + "VBRK_LH3" + ], + [ + "DSP_LH4_1", + "VBRK_LH4" + ], + [ + "DSP_LH5_1", + "VBRK_LH5" + ], + [ + "DSP_LH6_1", + "VBRK_LH6" + ], + [ + "DSP_LH7_1", + "VBRK_LH7" + ], + [ + "DSP_LH8_1", + "VBRK_LH8" + ], + [ + "DSP_LH9_1", + "VBRK_LH9" + ], + [ + "DSP_LH10_1", + "VBRK_LH10" + ], + [ + "DSP_LH11_1", + "VBRK_LH11" + ], + [ + "DSP_LH12_1", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_1", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_1", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_1", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_1", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_1", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_1", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_1", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_1", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_1", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_1", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_1", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_1", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_1", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_1", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_1", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_1", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_1", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_1", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_1", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_1", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_1", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_1", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_1", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_1", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_1", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_1", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_1", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_1", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_1", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_1", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_1", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_1", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_1", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_1", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_1", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_1", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_1", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_1", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_1", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_1", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_1", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_1", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_1", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_1", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_1", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_1", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_1", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_1", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_1", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_1", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_1", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_1", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_1", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_1", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_1", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_1", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_1", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_1", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_1", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_1", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_1", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_1", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_1", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_1", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_1", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_1", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_1", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_1", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_1", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_1", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_1", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_1", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_1", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_1", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_1", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_1", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_1", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_1", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_1", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_1", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_1", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_1", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "DSP_R", + "VBRK" + ], + "wire_pairs": [ + [ + "DSP_EE2A0_0", + "VBRK_EE2A0" + ], + [ + "DSP_EE2A1_0", + "VBRK_EE2A1" + ], + [ + "DSP_EE2A2_0", + "VBRK_EE2A2" + ], + [ + "DSP_EE2A3_0", + "VBRK_EE2A3" + ], + [ + "DSP_EE2BEG0_0", + "VBRK_EE2BEG0" + ], + [ + "DSP_EE2BEG1_0", + "VBRK_EE2BEG1" + ], + [ + "DSP_EE2BEG2_0", + "VBRK_EE2BEG2" + ], + [ + "DSP_EE2BEG3_0", + "VBRK_EE2BEG3" + ], + [ + "DSP_EE4A0_0", + "VBRK_EE4A0" + ], + [ + "DSP_EE4A1_0", + "VBRK_EE4A1" + ], + [ + "DSP_EE4A2_0", + "VBRK_EE4A2" + ], + [ + "DSP_EE4A3_0", + "VBRK_EE4A3" + ], + [ + "DSP_EE4B0_0", + "VBRK_EE4B0" + ], + [ + "DSP_EE4B1_0", + "VBRK_EE4B1" + ], + [ + "DSP_EE4B2_0", + "VBRK_EE4B2" + ], + [ + "DSP_EE4B3_0", + "VBRK_EE4B3" + ], + [ + "DSP_EE4BEG0_0", + "VBRK_EE4BEG0" + ], + [ + "DSP_EE4BEG1_0", + "VBRK_EE4BEG1" + ], + [ + "DSP_EE4BEG2_0", + "VBRK_EE4BEG2" + ], + [ + "DSP_EE4BEG3_0", + "VBRK_EE4BEG3" + ], + [ + "DSP_EE4C0_0", + "VBRK_EE4C0" + ], + [ + "DSP_EE4C1_0", + "VBRK_EE4C1" + ], + [ + "DSP_EE4C2_0", + "VBRK_EE4C2" + ], + [ + "DSP_EE4C3_0", + "VBRK_EE4C3" + ], + [ + "DSP_EL1BEG0_0", + "VBRK_EL1BEG0" + ], + [ + "DSP_EL1BEG1_0", + "VBRK_EL1BEG1" + ], + [ + "DSP_EL1BEG2_0", + "VBRK_EL1BEG2" + ], + [ + "DSP_EL1BEG3_0", + "VBRK_EL1BEG3" + ], + [ + "DSP_ER1BEG0_0", + "VBRK_ER1BEG0" + ], + [ + "DSP_ER1BEG1_0", + "VBRK_ER1BEG1" + ], + [ + "DSP_ER1BEG2_0", + "VBRK_ER1BEG2" + ], + [ + "DSP_ER1BEG3_0", + "VBRK_ER1BEG3" + ], + [ + "DSP_LH1_0", + "VBRK_LH1" + ], + [ + "DSP_LH2_0", + "VBRK_LH2" + ], + [ + "DSP_LH3_0", + "VBRK_LH3" + ], + [ + "DSP_LH4_0", + "VBRK_LH4" + ], + [ + "DSP_LH5_0", + "VBRK_LH5" + ], + [ + "DSP_LH6_0", + "VBRK_LH6" + ], + [ + "DSP_LH7_0", + "VBRK_LH7" + ], + [ + "DSP_LH8_0", + "VBRK_LH8" + ], + [ + "DSP_LH9_0", + "VBRK_LH9" + ], + [ + "DSP_LH10_0", + "VBRK_LH10" + ], + [ + "DSP_LH11_0", + "VBRK_LH11" + ], + [ + "DSP_LH12_0", + "VBRK_LH12" + ], + [ + "DSP_MONITOR_N_0", + "VBRK_MONITOR_N" + ], + [ + "DSP_MONITOR_P_0", + "VBRK_MONITOR_P" + ], + [ + "DSP_NE2A0_0", + "VBRK_NE2A0" + ], + [ + "DSP_NE2A1_0", + "VBRK_NE2A1" + ], + [ + "DSP_NE2A2_0", + "VBRK_NE2A2" + ], + [ + "DSP_NE2A3_0", + "VBRK_NE2A3" + ], + [ + "DSP_NE4BEG0_0", + "VBRK_NE4BEG0" + ], + [ + "DSP_NE4BEG1_0", + "VBRK_NE4BEG1" + ], + [ + "DSP_NE4BEG2_0", + "VBRK_NE4BEG2" + ], + [ + "DSP_NE4BEG3_0", + "VBRK_NE4BEG3" + ], + [ + "DSP_NE4C0_0", + "VBRK_NE4C0" + ], + [ + "DSP_NE4C1_0", + "VBRK_NE4C1" + ], + [ + "DSP_NE4C2_0", + "VBRK_NE4C2" + ], + [ + "DSP_NE4C3_0", + "VBRK_NE4C3" + ], + [ + "DSP_NW2A0_0", + "VBRK_NW2A0" + ], + [ + "DSP_NW2A1_0", + "VBRK_NW2A1" + ], + [ + "DSP_NW2A2_0", + "VBRK_NW2A2" + ], + [ + "DSP_NW2A3_0", + "VBRK_NW2A3" + ], + [ + "DSP_NW4A0_0", + "VBRK_NW4A0" + ], + [ + "DSP_NW4A1_0", + "VBRK_NW4A1" + ], + [ + "DSP_NW4A2_0", + "VBRK_NW4A2" + ], + [ + "DSP_NW4A3_0", + "VBRK_NW4A3" + ], + [ + "DSP_NW4END0_0", + "VBRK_NW4END0" + ], + [ + "DSP_NW4END1_0", + "VBRK_NW4END1" + ], + [ + "DSP_NW4END2_0", + "VBRK_NW4END2" + ], + [ + "DSP_NW4END3_0", + "VBRK_NW4END3" + ], + [ + "DSP_SE2A0_0", + "VBRK_SE2A0" + ], + [ + "DSP_SE2A1_0", + "VBRK_SE2A1" + ], + [ + "DSP_SE2A2_0", + "VBRK_SE2A2" + ], + [ + "DSP_SE2A3_0", + "VBRK_SE2A3" + ], + [ + "DSP_SE4BEG0_0", + "VBRK_SE4BEG0" + ], + [ + "DSP_SE4BEG1_0", + "VBRK_SE4BEG1" + ], + [ + "DSP_SE4BEG2_0", + "VBRK_SE4BEG2" + ], + [ + "DSP_SE4BEG3_0", + "VBRK_SE4BEG3" + ], + [ + "DSP_SE4C0_0", + "VBRK_SE4C0" + ], + [ + "DSP_SE4C1_0", + "VBRK_SE4C1" + ], + [ + "DSP_SE4C2_0", + "VBRK_SE4C2" + ], + [ + "DSP_SE4C3_0", + "VBRK_SE4C3" + ], + [ + "DSP_SW2A0_0", + "VBRK_SW2A0" + ], + [ + "DSP_SW2A1_0", + "VBRK_SW2A1" + ], + [ + "DSP_SW2A2_0", + "VBRK_SW2A2" + ], + [ + "DSP_SW2A3_0", + "VBRK_SW2A3" + ], + [ + "DSP_SW4A0_0", + "VBRK_SW4A0" + ], + [ + "DSP_SW4A1_0", + "VBRK_SW4A1" + ], + [ + "DSP_SW4A2_0", + "VBRK_SW4A2" + ], + [ + "DSP_SW4A3_0", + "VBRK_SW4A3" + ], + [ + "DSP_SW4END0_0", + "VBRK_SW4END0" + ], + [ + "DSP_SW4END1_0", + "VBRK_SW4END1" + ], + [ + "DSP_SW4END2_0", + "VBRK_SW4END2" + ], + [ + "DSP_SW4END3_0", + "VBRK_SW4END3" + ], + [ + "DSP_WL1END0_0", + "VBRK_WL1END0" + ], + [ + "DSP_WL1END1_0", + "VBRK_WL1END1" + ], + [ + "DSP_WL1END2_0", + "VBRK_WL1END2" + ], + [ + "DSP_WL1END3_0", + "VBRK_WL1END3" + ], + [ + "DSP_WR1END0_0", + "VBRK_WR1END0" + ], + [ + "DSP_WR1END1_0", + "VBRK_WR1END1" + ], + [ + "DSP_WR1END2_0", + "VBRK_WR1END2" + ], + [ + "DSP_WR1END3_0", + "VBRK_WR1END3" + ], + [ + "DSP_WW2A0_0", + "VBRK_WW2A0" + ], + [ + "DSP_WW2A1_0", + "VBRK_WW2A1" + ], + [ + "DSP_WW2A2_0", + "VBRK_WW2A2" + ], + [ + "DSP_WW2A3_0", + "VBRK_WW2A3" + ], + [ + "DSP_WW2END0_0", + "VBRK_WW2END0" + ], + [ + "DSP_WW2END1_0", + "VBRK_WW2END1" + ], + [ + "DSP_WW2END2_0", + "VBRK_WW2END2" + ], + [ + "DSP_WW2END3_0", + "VBRK_WW2END3" + ], + [ + "DSP_WW4A0_0", + "VBRK_WW4A0" + ], + [ + "DSP_WW4A1_0", + "VBRK_WW4A1" + ], + [ + "DSP_WW4A2_0", + "VBRK_WW4A2" + ], + [ + "DSP_WW4A3_0", + "VBRK_WW4A3" + ], + [ + "DSP_WW4B0_0", + "VBRK_WW4B0" + ], + [ + "DSP_WW4B1_0", + "VBRK_WW4B1" + ], + [ + "DSP_WW4B2_0", + "VBRK_WW4B2" + ], + [ + "DSP_WW4B3_0", + "VBRK_WW4B3" + ], + [ + "DSP_WW4C0_0", + "VBRK_WW4C0" + ], + [ + "DSP_WW4C1_0", + "VBRK_WW4C1" + ], + [ + "DSP_WW4C2_0", + "VBRK_WW4C2" + ], + [ + "DSP_WW4C3_0", + "VBRK_WW4C3" + ], + [ + "DSP_WW4END0_0", + "VBRK_WW4END0" + ], + [ + "DSP_WW4END1_0", + "VBRK_WW4END1" + ], + [ + "DSP_WW4END2_0", + "VBRK_WW4END2" + ], + [ + "DSP_WW4END3_0", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -11 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "GTP_CHANNEL_1" + ], + "wire_pairs": [ + [ + "GTPE2_CHANNEL_PLLCLK0", + "GTPE2_CHANNEL_PLLCLK0" + ], + [ + "GTPE2_CHANNEL_PLLCLK1", + "GTPE2_CHANNEL_PLLCLK1" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK0", + "GTPE2_CHANNEL_PLLREFCLK0" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK1", + "GTPE2_CHANNEL_PLLREFCLK1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_0", + "GTPE2_CHANNEL_RXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_1", + "GTPE2_CHANNEL_RXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_2", + "GTPE2_CHANNEL_RXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_3", + "GTPE2_CHANNEL_RXOUTCLK_3" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_0", + "GTPE2_CHANNEL_TXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_1", + "GTPE2_CHANNEL_TXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_2", + "GTPE2_CHANNEL_TXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_3", + "GTPE2_CHANNEL_TXOUTCLK_3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_10", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_10", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_10", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_10", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_10", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_10", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_10", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_10", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_10", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_10", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_10", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_10", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_10", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_10", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_10", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_10", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_10", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_10", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_10", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_10", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_10", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_10", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_10", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_10", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_10", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_10", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_10", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_10", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_10", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_10", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_10", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_10", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_10", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_10", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_10", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_10", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_10", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_10", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_10", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_10", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_10", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_10", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_10", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_10", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_10", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_10", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_10", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_10", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_10", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_10", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_10", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_10", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_10", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_10", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_10", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_10", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_10", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_10", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_10", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_10", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_10", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_10", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_10", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_10", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_10", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_10", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_10", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_10", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_10", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_10", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_10", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_10", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_10", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_10", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_10", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B9_10", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B11_10", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_10", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_10", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_10", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_10", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_10", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_10", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_10", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_10", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_9", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_9", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_9", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_9", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_9", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_9", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_9", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_9", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_9", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_9", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_9", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_9", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_9", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_9", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_9", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_9", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_9", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_9", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_9", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_9", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_9", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_9", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_9", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_9", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_9", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_9", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_9", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_9", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_9", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_9", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_9", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_9", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_9", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_9", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_9", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_9", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_9", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_9", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_9", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_9", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_9", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_9", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_9", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_9", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_9", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_9", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_9", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_9", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_9", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_9", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_9", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_9", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_9", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_9", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_9", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_9", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_9", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_9", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_9", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_9", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_9", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_9", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_9", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_9", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_9", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_9", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_9", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_9", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_9", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_9", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_9", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_9", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_9", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_9", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_9", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_9", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_9", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_9", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_9", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_9", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_9", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_9", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_9", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_9", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_9", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_9", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_8", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_8", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_8", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_8", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_8", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_8", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_8", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_8", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_8", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_8", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_8", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_8", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_8", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_8", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_8", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_8", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_8", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_8", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_8", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_8", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_8", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_8", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_8", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_8", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_8", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_8", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_8", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_8", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_8", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_8", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_8", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_8", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_8", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_8", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_8", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_8", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_8", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_8", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_8", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_8", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_8", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_8", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_8", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_8", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_8", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_8", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_8", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_8", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_8", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_8", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_8", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_8", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_8", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_8", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_8", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_8", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_8", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_8", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_8", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_8", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_8", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_8", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_8", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_8", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_8", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_8", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_8", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_8", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_8", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_8", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_8", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_8", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_8", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_8", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_8", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_8", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_8", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_8", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_8", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_8", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_8", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_8", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_8", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_8", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_8", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_8", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_8", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_7", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_7", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_7", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_7", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_7", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_7", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_7", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_7", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_7", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_7", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_7", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_7", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_7", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_7", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_7", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_7", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_7", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_7", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_7", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_7", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_7", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_7", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_7", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_7", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_7", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_7", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_7", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_7", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_7", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_7", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_7", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_7", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_7", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_7", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_7", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_7", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_7", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_7", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_7", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_7", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_7", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_7", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_7", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_7", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_7", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_7", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_7", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_7", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_7", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_7", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_7", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_7", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_7", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_7", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_7", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_7", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_7", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_7", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_7", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_7", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_7", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_7", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_7", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_7", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_7", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_7", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_7", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_7", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_7", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_7", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_7", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_7", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_7", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_7", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_7", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_7", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_7", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_7", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_7", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_7", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_7", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_7", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_7", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_7", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_7", + "VBRK_EXT_LOGIC_OUTS_B21" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_6", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_6", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_6", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_6", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_6", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_6", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_6", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_6", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_6", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_6", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_6", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_6", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_6", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_6", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_6", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_6", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_6", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_6", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_6", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_6", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_6", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_6", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_6", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_6", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_6", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_6", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_6", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_6", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_6", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_6", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_6", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_6", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_6", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_6", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_6", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_6", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_6", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_6", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_6", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_6", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_6", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_6", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_6", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_6", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_6", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_6", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_6", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_6", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_6", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_6", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_6", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_6", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_6", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_6", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_6", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_6", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_6", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_6", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_6", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_6", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_6", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_6", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_6", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_6", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_6", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_6", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_6", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_6", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_6", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_6", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_6", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_6", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_6", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_6", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_6", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_6", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_6", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_6", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_6", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_6", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_6", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_6", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_6", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_6", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_6", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_6", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_6", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_5", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_5", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_5", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_5", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_5", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_5", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_5", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_5", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_5", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_5", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_5", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_5", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_5", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_5", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_5", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_5", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_5", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_5", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_5", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_5", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_5", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_5", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_5", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_5", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_5", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_5", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_5", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_5", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_5", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_5", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_5", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_5", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_5", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_5", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_5", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_5", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_5", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_5", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_5", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_5", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_5", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_5", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_5", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_5", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_5", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_5", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_5", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_5", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_5", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_5", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_5", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_5", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_5", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_5", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_5", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_5", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_5", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_5", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_5", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_5", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_5", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_5", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_5", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_5", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_5", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_5", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_5", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_5", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_5", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_5", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_5", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_5", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_5", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_5", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_5", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_5", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_5", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_5", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_5", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_5", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_5", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_5", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_5", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B21_5", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_5", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_5", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_4", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_4", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_4", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_4", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_4", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_4", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_4", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_4", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_4", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_4", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_4", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_4", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_4", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_4", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_4", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_4", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_4", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_4", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_4", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_4", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_4", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_4", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_4", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_4", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_4", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_4", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_4", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_4", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_4", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_4", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_4", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_4", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_4", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_4", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_4", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_4", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_4", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_4", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_4", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_4", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_4", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_4", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_4", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_4", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_4", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_4", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_4", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_4", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_4", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_4", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_4", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_4", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_4", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_4", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_4", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_4", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_4", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_4", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_4", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_4", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_4", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_4", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_4", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_4", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_4", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_4", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_4", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_4", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_4", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_4", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_4", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_4", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B6_4", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_4", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_4", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_4", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_4", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_4", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_4", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_4", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_4", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_4", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_4", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_4", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_4", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_4", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_4", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_3", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_3", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_3", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_3", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_3", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_3", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_3", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_3", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_3", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_3", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_3", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_3", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_3", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_3", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_3", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_3", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_3", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_3", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_3", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_3", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_3", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_3", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_3", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_3", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_3", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_3", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_3", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_3", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_3", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_3", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_3", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_3", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_3", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_3", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_3", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_3", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_3", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_3", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_3", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_3", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_3", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_3", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_3", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_3", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_3", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_3", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_3", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_3", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_3", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_3", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_3", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_3", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_3", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_3", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_3", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_3", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_3", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_3", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_3", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_3", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_3", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_3", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_3", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_3", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_3", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_3", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_3", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_3", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_3", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_3", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B3_3", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_3", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_3", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_3", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_3", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_3", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_3", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_3", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_3", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_3", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_3", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_3", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_3", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_3", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_3", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_2", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_2", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_2", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_2", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_2", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_2", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_2", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_2", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_2", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_2", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_2", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_2", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_2", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_2", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_2", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_2", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_2", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_2", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_2", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_2", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_2", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_2", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_2", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_2", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_2", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_2", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_2", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_2", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_2", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_2", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_2", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_2", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_2", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_2", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_2", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_2", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_2", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_2", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_2", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_2", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_2", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_2", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_2", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_2", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_2", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_2", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_2", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_2", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_2", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_2", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_2", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_2", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_2", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_2", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_2", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_2", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_2", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_2", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_2", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_2", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_2", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_2", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_2", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_2", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_2", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_2", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_2", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_2", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B3_2", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B6_2", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_2", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_2", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_2", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_2", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_2", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_2", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_2", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_2", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_2", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_2", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_2", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_2", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_1", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_1", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_1", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_1", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_1", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_1", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_1", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_1", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_1", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_1", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_1", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_1", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_1", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_1", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_1", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_1", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_1", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_1", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_1", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_1", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_1", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_1", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_1", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_1", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_1", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_1", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_1", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_1", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_1", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_1", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_1", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_1", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_1", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_1", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_1", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_1", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_1", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_1", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_1", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_1", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_1", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_1", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_1", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_1", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_1", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_1", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_1", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_1", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_1", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_1", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_1", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_1", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_1", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_1", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_1", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_1", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_1", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_1", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_1", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_1", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_1", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_1", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_1", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_1", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_1", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_1", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_1", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_1", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B5_1", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B8_1", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B10_1", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_1", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_1", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_1", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_1", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_1", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_1", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_1", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_1", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_1", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_1", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_1", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_1", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "GTP_CHANNEL_0", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_0", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_0", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_0", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_0", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_0", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_0", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_0", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_0", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_0", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_0", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_0", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_0", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_0", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_0", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_0", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_0", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_0", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_0", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_0", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_0", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_0", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_0", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_0", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_0", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_0", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_0", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_0", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_0", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_0", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_0", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_0", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_0", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_0", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_0", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_0", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_0", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_0", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_0", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_0", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_0", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_0", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_0", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_0", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_0", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_0", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_0", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_0", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_0", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_0", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_0", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_0", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_0", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_0", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_0", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_0", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_0", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_0", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_0", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_0", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_0", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_0", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_0", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_0", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_0", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_0", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_0", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_0", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_0", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_0", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_0", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_0", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_0", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_0", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_0", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_0", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_0", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_0", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_0", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_0", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_0", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_0", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_0", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + 0, + -6 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "GTP_COMMON" + ], + "wire_pairs": [ + [ + "GTPE2_CHANNEL_PLLCLK0", + "GTPE2_COMMON_PLLOUTCLK0" + ], + [ + "GTPE2_CHANNEL_PLLCLK1", + "GTPE2_COMMON_PLLOUTCLK1" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK0", + "GTPE2_COMMON_PLLREFCLK0" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK1", + "GTPE2_COMMON_PLLREFCLK1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_0", + "GTPE2_COMMON_RXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_1", + "GTPE2_COMMON_RXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_2", + "GTPE2_COMMON_RXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_3", + "GTPE2_COMMON_RXOUTCLK_3" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_0", + "GTPE2_COMMON_TXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_1", + "GTPE2_COMMON_TXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_2", + "GTPE2_COMMON_TXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_3", + "GTPE2_COMMON_TXOUTCLK_3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_10", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_10", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_10", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_10", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_10", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_10", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_10", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_10", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_10", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_10", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_10", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_10", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_10", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_10", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_10", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_10", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_10", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_10", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_10", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_10", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_10", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_10", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_10", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_10", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_10", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_10", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_10", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_10", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_10", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_10", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_10", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_10", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_10", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_10", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_10", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_10", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_10", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_10", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_10", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_10", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_10", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_10", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_10", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_10", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_10", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_10", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_10", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_10", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_10", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_10", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_10", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_10", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_10", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_10", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_10", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_10", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_10", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_10", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_10", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_10", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_10", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_10", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_10", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_10", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_10", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_10", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_10", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_10", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_10", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_10", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_10", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_10", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_10", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_10", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_10", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B9_10", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B11_10", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_10", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_10", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_10", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_10", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_10", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_10", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_10", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_10", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_9", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_9", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_9", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_9", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_9", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_9", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_9", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_9", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_9", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_9", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_9", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_9", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_9", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_9", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_9", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_9", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_9", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_9", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_9", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_9", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_9", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_9", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_9", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_9", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_9", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_9", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_9", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_9", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_9", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_9", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_9", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_9", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_9", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_9", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_9", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_9", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_9", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_9", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_9", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_9", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_9", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_9", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_9", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_9", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_9", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_9", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_9", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_9", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_9", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_9", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_9", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_9", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_9", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_9", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_9", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_9", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_9", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_9", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_9", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_9", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_9", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_9", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_9", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_9", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_9", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_9", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_9", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_9", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_9", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_9", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_9", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_9", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_9", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_9", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_9", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_9", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_9", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_9", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_9", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_9", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_9", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_9", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_9", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_9", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_9", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_9", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_8", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_8", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_8", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_8", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_8", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_8", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_8", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_8", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_8", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_8", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_8", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_8", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_8", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_8", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_8", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_8", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_8", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_8", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_8", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_8", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_8", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_8", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_8", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_8", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_8", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_8", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_8", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_8", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_8", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_8", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_8", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_8", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_8", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_8", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_8", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_8", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_8", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_8", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_8", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_8", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_8", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_8", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_8", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_8", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_8", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_8", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_8", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_8", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_8", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_8", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_8", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_8", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_8", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_8", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_8", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_8", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_8", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_8", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_8", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_8", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_8", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_8", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_8", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_8", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_8", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_8", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_8", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_8", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_8", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_8", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_8", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_8", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_8", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_8", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_8", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_8", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_8", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_8", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_8", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_8", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_8", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_8", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_8", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_8", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_8", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_8", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_8", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_7", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_7", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_7", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_7", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_7", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_7", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_7", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_7", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_7", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_7", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_7", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_7", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_7", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_7", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_7", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_7", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_7", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_7", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_7", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_7", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_7", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_7", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_7", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_7", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_7", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_7", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_7", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_7", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_7", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_7", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_7", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_7", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_7", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_7", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_7", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_7", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_7", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_7", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_7", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_7", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_7", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_7", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_7", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_7", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_7", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_7", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_7", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_7", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_7", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_7", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_7", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_7", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_7", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_7", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_7", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_7", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_7", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_7", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_7", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_7", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_7", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_7", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_7", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_7", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_7", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_7", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_7", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_7", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_7", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_7", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_7", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_7", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_7", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_7", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_7", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_7", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_7", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_7", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_7", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_7", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_7", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_7", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_7", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_7", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_7", + "VBRK_EXT_LOGIC_OUTS_B21" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_6", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_6", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_6", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_6", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_6", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_6", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_6", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_6", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_6", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_6", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_6", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_6", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_6", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_6", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_6", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_6", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_6", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_6", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_6", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_6", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_6", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_6", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_6", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_6", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_6", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_6", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_6", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_6", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_6", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_6", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_6", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_6", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_6", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_6", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_6", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_6", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_6", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_6", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_6", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_6", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_6", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_6", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_6", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_6", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_6", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_6", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_6", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_6", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_6", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_6", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_6", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_6", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_6", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_6", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_6", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_6", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_6", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_6", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_6", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_6", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_6", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_6", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_6", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_6", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_6", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_6", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_6", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_6", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_6", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_6", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_6", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_6", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_6", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_6", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_6", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_6", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_6", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_6", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_6", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_6", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_6", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_6", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_6", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_6", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_6", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_6", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_6", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_5", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_5", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_5", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_5", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_5", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_5", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_5", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_5", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_5", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_5", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_5", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_5", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_5", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_5", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_5", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_5", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_5", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_5", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_5", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_5", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_5", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_5", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_5", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_5", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_5", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_5", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_5", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_5", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_5", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_5", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_5", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_5", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_5", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_5", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_5", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_5", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_5", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_5", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_5", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_5", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_5", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_5", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_5", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_5", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_5", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_5", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_5", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_5", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_5", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_5", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_5", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_5", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_5", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_5", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_5", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_5", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_5", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_5", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_5", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_5", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_5", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_5", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_5", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_5", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_5", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_5", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_5", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_5", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_5", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_5", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_5", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_5", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_5", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_5", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_5", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_5", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_5", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_5", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_5", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_5", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_5", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_5", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_5", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B21_5", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_5", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_5", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_4", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_4", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_4", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_4", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_4", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_4", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_4", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_4", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_4", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_4", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_4", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_4", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_4", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_4", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_4", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_4", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_4", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_4", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_4", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_4", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_4", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_4", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_4", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_4", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_4", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_4", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_4", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_4", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_4", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_4", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_4", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_4", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_4", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_4", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_4", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_4", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_4", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_4", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_4", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_4", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_4", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_4", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_4", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_4", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_4", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_4", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_4", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_4", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_4", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_4", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_4", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_4", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_4", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_4", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_4", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_4", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_4", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_4", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_4", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_4", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_4", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_4", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_4", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_4", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_4", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_4", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_4", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_4", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_4", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_4", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_4", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_4", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B6_4", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_4", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_4", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_4", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_4", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_4", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_4", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_4", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_4", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_4", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_4", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_4", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_4", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_4", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_4", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_3", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_3", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_3", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_3", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_3", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_3", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_3", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_3", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_3", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_3", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_3", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_3", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_3", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_3", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_3", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_3", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_3", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_3", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_3", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_3", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_3", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_3", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_3", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_3", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_3", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_3", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_3", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_3", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_3", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_3", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_3", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_3", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_3", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_3", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_3", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_3", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_3", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_3", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_3", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_3", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_3", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_3", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_3", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_3", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_3", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_3", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_3", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_3", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_3", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_3", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_3", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_3", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_3", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_3", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_3", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_3", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_3", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_3", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_3", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_3", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_3", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_3", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_3", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_3", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_3", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_3", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_3", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_3", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_3", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_3", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B3_3", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_3", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_3", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_3", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_3", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_3", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_3", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_3", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_3", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_3", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_3", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_3", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_3", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_3", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_3", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_2", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_2", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_2", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_2", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_2", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_2", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_2", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_2", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_2", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_2", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_2", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_2", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_2", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_2", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_2", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_2", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_2", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_2", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_2", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_2", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_2", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_2", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_2", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_2", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_2", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_2", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_2", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_2", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_2", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_2", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_2", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_2", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_2", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_2", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_2", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_2", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_2", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_2", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_2", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_2", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_2", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_2", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_2", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_2", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_2", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_2", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_2", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_2", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_2", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_2", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_2", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_2", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_2", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_2", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_2", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_2", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_2", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_2", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_2", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_2", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_2", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_2", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_2", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_2", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_2", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_2", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_2", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_2", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B3_2", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B6_2", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_2", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_2", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_2", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_2", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_2", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_2", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_2", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_2", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_2", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_2", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_2", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_2", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_1", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_1", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_1", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_1", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_1", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_1", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_1", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_1", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_1", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_1", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_1", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_1", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_1", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_1", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_1", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_1", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_1", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_1", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_1", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_1", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_1", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_1", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_1", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_1", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_1", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_1", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_1", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_1", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_1", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_1", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_1", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_1", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_1", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_1", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_1", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_1", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_1", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_1", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_1", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_1", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_1", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_1", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_1", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_1", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_1", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_1", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_1", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_1", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_1", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_1", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_1", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_1", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_1", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_1", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_1", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_1", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_1", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_1", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_1", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_1", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_1", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_1", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_1", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_1", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_1", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_1", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_1", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_1", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B5_1", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B8_1", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B10_1", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_1", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_1", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_1", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_1", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_1", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_1", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_1", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_1", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_1", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_1", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_1", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_1", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "GTP_CHANNEL_1", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_0", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_0", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_0", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_0", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_0", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_0", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_0", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_0", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_0", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_0", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_0", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_0", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_0", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_0", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_0", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_0", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_0", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_0", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_0", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_0", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_0", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_0", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_0", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_0", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_0", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_0", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_0", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_0", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_0", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_0", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_0", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_0", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_0", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_0", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_0", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_0", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_0", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_0", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_0", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_0", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_0", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_0", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_0", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_0", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_0", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_0", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_0", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_0", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_0", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_0", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_0", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_0", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_0", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_0", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_0", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_0", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_0", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_0", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_0", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_0", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_0", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_0", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_0", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_0", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_0", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_0", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_0", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_0", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_0", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_0", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_0", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_0", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_0", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_0", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_0", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_0", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_0", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_0", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_0", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_0", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_0", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_0", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + 0, + -11 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "GTP_CHANNEL_3" + ], + "wire_pairs": [ + [ + "GTPE2_CHANNEL_PLLCLK0", + "GTPE2_CHANNEL_PLLCLK0" + ], + [ + "GTPE2_CHANNEL_PLLCLK1", + "GTPE2_CHANNEL_PLLCLK1" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK0", + "GTPE2_CHANNEL_PLLREFCLK0" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK1", + "GTPE2_CHANNEL_PLLREFCLK1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_0", + "GTPE2_CHANNEL_RXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_1", + "GTPE2_CHANNEL_RXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_2", + "GTPE2_CHANNEL_RXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_3", + "GTPE2_CHANNEL_RXOUTCLK_3" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_0", + "GTPE2_CHANNEL_TXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_1", + "GTPE2_CHANNEL_TXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_2", + "GTPE2_CHANNEL_TXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_3", + "GTPE2_CHANNEL_TXOUTCLK_3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 12 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "GTP_COMMON" + ], + "wire_pairs": [ + [ + "GTPE2_CHANNEL_PLLCLK0", + "GTPE2_COMMON_PLLOUTCLK0" + ], + [ + "GTPE2_CHANNEL_PLLCLK1", + "GTPE2_COMMON_PLLOUTCLK1" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK0", + "GTPE2_COMMON_PLLREFCLK0" + ], + [ + "GTPE2_CHANNEL_PLLREFCLK1", + "GTPE2_COMMON_PLLREFCLK1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_0", + "GTPE2_COMMON_RXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_1", + "GTPE2_COMMON_RXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_2", + "GTPE2_COMMON_RXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_RXOUTCLK_3", + "GTPE2_COMMON_RXOUTCLK_3" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_0", + "GTPE2_COMMON_TXOUTCLK_0" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_1", + "GTPE2_COMMON_TXOUTCLK_1" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_2", + "GTPE2_COMMON_TXOUTCLK_2" + ], + [ + "GTPE2_CHANNEL_TXOUTCLK_3", + "GTPE2_COMMON_TXOUTCLK_3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_10", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_10", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_10", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_10", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_10", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_10", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_10", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_10", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_10", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_10", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_10", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_10", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_10", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_10", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_10", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_10", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_10", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_10", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_10", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_10", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_10", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_10", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_10", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_10", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_10", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_10", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_10", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_10", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_10", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_10", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_10", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_10", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_10", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_10", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_10", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_10", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_10", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_10", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_10", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_10", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_10", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_10", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_10", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_10", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_10", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_10", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_10", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_10", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_10", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_10", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_10", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_10", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_10", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_10", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_10", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_10", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_10", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_10", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_10", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_10", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_10", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_10", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_10", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_10", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_10", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_10", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_10", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_10", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_10", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_10", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_10", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_10", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_10", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_10", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_10", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B9_10", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B11_10", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_10", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_10", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_10", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_10", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_10", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_10", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_10", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_10", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_9", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_9", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_9", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_9", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_9", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_9", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_9", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_9", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_9", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_9", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_9", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_9", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_9", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_9", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_9", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_9", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_9", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_9", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_9", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_9", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_9", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_9", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_9", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_9", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_9", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_9", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_9", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_9", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_9", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_9", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_9", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_9", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_9", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_9", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_9", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_9", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_9", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_9", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_9", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_9", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_9", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_9", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_9", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_9", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_9", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_9", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_9", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_9", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_9", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_9", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_9", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_9", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_9", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_9", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_9", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_9", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_9", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_9", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_9", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_9", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_9", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_9", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_9", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_9", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_9", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_9", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_9", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_9", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_9", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_9", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_9", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_9", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_9", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_9", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_9", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_9", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_9", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_9", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_9", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_9", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_9", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_9", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_9", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_9", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_9", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_9", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_8", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_8", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_8", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_8", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_8", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_8", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_8", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_8", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_8", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_8", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_8", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_8", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_8", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_8", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_8", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_8", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_8", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_8", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_8", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_8", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_8", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_8", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_8", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_8", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_8", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_8", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_8", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_8", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_8", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_8", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_8", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_8", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_8", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_8", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_8", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_8", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_8", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_8", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_8", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_8", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_8", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_8", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_8", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_8", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_8", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_8", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_8", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_8", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_8", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_8", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_8", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_8", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_8", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_8", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_8", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_8", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_8", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_8", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_8", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_8", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_8", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_8", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_8", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_8", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_8", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_8", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_8", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_8", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_8", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_8", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_8", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_8", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_8", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_8", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_8", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_8", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_8", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_8", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_8", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_8", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_8", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_8", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_8", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_8", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_8", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_8", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_8", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_7", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_7", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_7", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_7", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_7", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_7", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_7", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_7", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_7", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_7", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_7", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_7", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_7", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_7", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_7", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_7", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_7", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_7", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_7", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_7", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_7", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_7", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_7", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_7", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_7", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_7", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_7", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_7", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_7", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_7", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_7", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_7", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_7", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_7", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_7", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_7", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_7", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_7", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_7", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_7", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_7", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_7", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_7", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_7", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_7", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_7", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_7", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_7", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_7", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_7", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_7", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_7", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_7", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_7", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_7", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_7", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_7", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_7", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_7", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_7", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_7", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_7", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_7", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_7", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_7", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_7", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_7", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_7", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_7", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_7", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_7", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_7", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_7", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_7", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_7", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_7", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_7", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_7", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_7", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_7", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_7", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_7", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_7", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_7", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_7", + "VBRK_EXT_LOGIC_OUTS_B21" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_6", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_6", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_6", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_6", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_6", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_6", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_6", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_6", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_6", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_6", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_6", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_6", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_6", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_6", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_6", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_6", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_6", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_6", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_6", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_6", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_6", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_6", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_6", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_6", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_6", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_6", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_6", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_6", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_6", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_6", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_6", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_6", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_6", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_6", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_6", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_6", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_6", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_6", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_6", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_6", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_6", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_6", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_6", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_6", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_6", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_6", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_6", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_6", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_6", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_6", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_6", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_6", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_6", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_6", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_6", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_6", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_6", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_6", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_6", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_6", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_6", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_6", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_6", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_6", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_6", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_6", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_6", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_6", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_6", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_6", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_6", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_6", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_6", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_6", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_6", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_6", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_6", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_6", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_6", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_6", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_6", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_6", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_6", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_6", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_6", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_6", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_6", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_5", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_5", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_5", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_5", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_5", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_5", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_5", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_5", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_5", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_5", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_5", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_5", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_5", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_5", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_5", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_5", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_5", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_5", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_5", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_5", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_5", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_5", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_5", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_5", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_5", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_5", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_5", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_5", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_5", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_5", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_5", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_5", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_5", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_5", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_5", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_5", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_5", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_5", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_5", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_5", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_5", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_5", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_5", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_5", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_5", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_5", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_5", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_5", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_5", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_5", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_5", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_5", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_5", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_5", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_5", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_5", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_5", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_5", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_5", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_5", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_5", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_5", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_5", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_5", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_5", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_5", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_5", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_5", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_5", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_5", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_5", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_5", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_5", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_5", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_5", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_5", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_5", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_5", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_5", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_5", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_5", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_5", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_5", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B21_5", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_5", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_5", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_4", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_4", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_4", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_4", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_4", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_4", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_4", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_4", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_4", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_4", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_4", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_4", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_4", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_4", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_4", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_4", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_4", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_4", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_4", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_4", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_4", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_4", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_4", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_4", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_4", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_4", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_4", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_4", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_4", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_4", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_4", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_4", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_4", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_4", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_4", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_4", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_4", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_4", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_4", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_4", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_4", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_4", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_4", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_4", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_4", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_4", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_4", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_4", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_4", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_4", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_4", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_4", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_4", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_4", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_4", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_4", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_4", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_4", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_4", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_4", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_4", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_4", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_4", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_4", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_4", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_4", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_4", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_4", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_4", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_4", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_4", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_4", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B6_4", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_4", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_4", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_4", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_4", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_4", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_4", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_4", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_4", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_4", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_4", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_4", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_4", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_4", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_4", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_3", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_3", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_3", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_3", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_3", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_3", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_3", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_3", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_3", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_3", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_3", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_3", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_3", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_3", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_3", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_3", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_3", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_3", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_3", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_3", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_3", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_3", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_3", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_3", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_3", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_3", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_3", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_3", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_3", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_3", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_3", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_3", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_3", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_3", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_3", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_3", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_3", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_3", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_3", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_3", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_3", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_3", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_3", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_3", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_3", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_3", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_3", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_3", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_3", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_3", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_3", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_3", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_3", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_3", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_3", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_3", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_3", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_3", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_3", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_3", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_3", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_3", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_3", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_3", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_3", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_3", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_3", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_3", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_3", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_3", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B3_3", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_3", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_3", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_3", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_3", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_3", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_3", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_3", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_3", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_3", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_3", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_3", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_3", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_3", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_3", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_2", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_2", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_2", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_2", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_2", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_2", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_2", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_2", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_2", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_2", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_2", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_2", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_2", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_2", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_2", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_2", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_2", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_2", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_2", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_2", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_2", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_2", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_2", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_2", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_2", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_2", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_2", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_2", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_2", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_2", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_2", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_2", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_2", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_2", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_2", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_2", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_2", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_2", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_2", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_2", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_2", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_2", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_2", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_2", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_2", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_2", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_2", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_2", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_2", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_2", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_2", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_2", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_2", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_2", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_2", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_2", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_2", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_2", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_2", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_2", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_2", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_2", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_2", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_2", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_2", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_2", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_2", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_2", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B3_2", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B6_2", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_2", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_2", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_2", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_2", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_2", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_2", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_2", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_2", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_2", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_2", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_2", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_2", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_1", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_1", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_1", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_1", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_1", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_1", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_1", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_1", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_1", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_1", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_1", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_1", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_1", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_1", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_1", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_1", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_1", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_1", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_1", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_1", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_1", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_1", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_1", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_1", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_1", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_1", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_1", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_1", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_1", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_1", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_1", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_1", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_1", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_1", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_1", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_1", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_1", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_1", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_1", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_1", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_1", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_1", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_1", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_1", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_1", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_1", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_1", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_1", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_1", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_1", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_1", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_1", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_1", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_1", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_1", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_1", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_1", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_1", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_1", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_1", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_1", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_1", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_1", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_1", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_1", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_1", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_1", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_1", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B5_1", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B8_1", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B10_1", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_1", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_1", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_1", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_1", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_1", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_1", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_1", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_1", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_1", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_1", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_1", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_1", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "GTP_CHANNEL_2", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_0", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_0", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_0", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_0", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_0", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_0", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_0", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_0", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_0", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_0", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_0", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_0", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_0", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_0", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_0", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_0", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_0", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_0", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_0", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_0", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_0", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_0", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_0", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_0", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_0", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_0", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_0", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_0", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_0", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_0", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_0", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_0", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_0", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_0", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_0", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_0", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_0", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_0", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_0", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_0", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_0", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_0", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_0", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_0", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_0", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_0", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_0", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_0", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_0", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_0", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_0", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_0", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_0", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_0", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_0", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_0", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_0", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_0", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_0", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_0", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_0", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_0", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_0", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_0", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_0", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_0", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_0", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_0", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_0", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_0", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_0", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_0", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_0", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_0", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_0", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_0", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_0", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_0", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_0", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_0", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_0", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_0", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_10", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_10", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_10", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_10", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_10", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_10", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_10", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_10", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_10", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_10", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_10", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_10", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_10", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_10", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_10", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_10", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_10", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_10", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_10", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_10", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_10", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_10", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_10", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_10", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_10", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_10", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_10", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_10", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_10", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_10", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_10", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_10", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_10", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_10", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_10", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_10", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_10", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_10", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_10", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_10", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_10", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_10", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_10", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_10", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_10", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_10", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_10", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_10", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_10", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_10", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_10", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_10", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_10", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_10", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_10", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_10", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_10", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_10", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_10", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_10", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_10", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_10", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_10", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_10", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_10", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_10", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_10", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_10", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_10", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_10", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_10", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_10", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_10", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_10", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_10", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B9_10", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B11_10", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_10", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_10", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_10", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_10", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_10", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_10", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_10", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_10", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_9", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_9", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_9", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_9", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_9", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_9", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_9", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_9", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_9", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_9", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_9", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_9", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_9", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_9", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_9", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_9", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_9", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_9", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_9", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_9", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_9", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_9", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_9", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_9", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_9", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_9", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_9", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_9", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_9", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_9", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_9", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_9", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_9", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_9", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_9", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_9", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_9", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_9", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_9", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_9", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_9", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_9", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_9", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_9", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_9", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_9", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_9", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_9", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_9", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_9", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_9", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_9", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_9", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_9", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_9", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_9", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_9", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_9", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_9", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_9", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_9", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_9", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_9", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_9", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_9", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_9", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_9", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_9", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_9", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_9", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_9", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_9", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_9", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_9", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_9", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_9", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_9", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_9", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_9", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_9", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_9", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_9", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_9", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_9", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_9", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_9", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_8", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_8", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_8", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_8", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_8", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_8", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_8", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_8", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_8", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_8", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_8", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_8", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_8", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_8", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_8", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_8", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_8", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_8", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_8", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_8", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_8", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_8", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_8", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_8", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_8", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_8", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_8", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_8", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_8", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_8", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_8", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_8", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_8", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_8", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_8", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_8", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_8", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_8", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_8", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_8", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_8", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_8", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_8", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_8", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_8", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_8", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_8", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_8", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_8", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_8", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_8", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_8", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_8", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_8", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_8", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_8", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_8", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_8", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_8", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_8", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_8", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_8", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_8", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_8", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_8", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_8", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_8", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_8", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_8", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_8", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_8", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_8", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_8", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_8", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_8", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_8", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_8", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_8", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_8", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_8", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_8", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_8", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_8", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_8", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_8", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_8", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_8", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_7", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_7", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_7", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_7", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_7", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_7", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_7", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_7", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_7", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_7", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_7", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_7", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_7", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_7", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_7", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_7", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_7", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_7", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_7", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_7", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_7", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_7", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_7", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_7", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_7", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_7", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_7", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_7", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_7", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_7", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_7", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_7", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_7", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_7", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_7", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_7", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_7", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_7", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_7", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_7", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_7", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_7", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_7", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_7", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_7", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_7", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_7", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_7", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_7", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_7", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_7", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_7", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_7", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_7", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_7", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_7", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_7", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_7", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_7", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_7", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_7", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_7", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_7", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_7", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_7", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_7", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_7", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_7", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_7", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_7", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_7", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_7", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_7", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_7", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_7", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_7", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_7", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_7", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_7", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_7", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_7", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_7", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_7", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_7", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_7", + "VBRK_EXT_LOGIC_OUTS_B21" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_6", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_6", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_6", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_6", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_6", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_6", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_6", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_6", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_6", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_6", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_6", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_6", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_6", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_6", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_6", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_6", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_6", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_6", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_6", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_6", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_6", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_6", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_6", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_6", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_6", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_6", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_6", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_6", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_6", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_6", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_6", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_6", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_6", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_6", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_6", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_6", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_6", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_6", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_6", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_6", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_6", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_6", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_6", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_6", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_6", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_6", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_6", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_6", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_6", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_6", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_6", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_6", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_6", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_6", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_6", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_6", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_6", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_6", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_6", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_6", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_6", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_6", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_6", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_6", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_6", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_6", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_6", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_6", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_6", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_6", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_6", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_6", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_6", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_6", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_6", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_6", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_6", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_6", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_6", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_6", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_6", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_6", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_6", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_6", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B21_6", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_6", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_6", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_5", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_5", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_5", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_5", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_5", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_5", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_5", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_5", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_5", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_5", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_5", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_5", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_5", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_5", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_5", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_5", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_5", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_5", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_5", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_5", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_5", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_5", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_5", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_5", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_5", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_5", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_5", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_5", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_5", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_5", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_5", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_5", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_5", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_5", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_5", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_5", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_5", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_5", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_5", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_5", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_5", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_5", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_5", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_5", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_5", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_5", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_5", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_5", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_5", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_5", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_5", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_5", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_5", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_5", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_5", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_5", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_5", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_5", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_5", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_5", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_5", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_5", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_5", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_5", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_5", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_5", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_5", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_5", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_5", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_5", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_5", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B3_5", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_5", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_5", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B6_5", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_5", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_5", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_5", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_5", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_5", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_5", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_5", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B17_5", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B21_5", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_5", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_5", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_4", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_4", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_4", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_4", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_4", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_4", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_4", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_4", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_4", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_4", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_4", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_4", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_4", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_4", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_4", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_4", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_4", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_4", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_4", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_4", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_4", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_4", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_4", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_4", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_4", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_4", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_4", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_4", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_4", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_4", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_4", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_4", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_4", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_4", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_4", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_4", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_4", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_4", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_4", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_4", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_4", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_4", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_4", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_4", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_4", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_4", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_4", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_4", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_4", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_4", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_4", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_4", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_4", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_4", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_4", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_4", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_4", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_4", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_4", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_4", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_4", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_4", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_4", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_4", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_4", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_4", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_4", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_4", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_4", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_4", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B2_4", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "GTPE2_LOGIC_OUTS_B4_4", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B6_4", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_4", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_4", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_4", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_4", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_4", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_4", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_4", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_4", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_4", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_4", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_4", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_4", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_4", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_4", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_3", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_3", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_3", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_3", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_3", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_3", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_3", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_3", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_3", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_3", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_3", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_3", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_3", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_3", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_3", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_3", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_3", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_3", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_3", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_3", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_3", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_3", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_3", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_3", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_3", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_3", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_3", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_3", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_3", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_3", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_3", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_3", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_3", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_3", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_3", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_3", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_3", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_3", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_3", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_3", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_3", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_3", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_3", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_3", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_3", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_3", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_3", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_3", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_3", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_3", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_3", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_3", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_3", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_3", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_3", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_3", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_3", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_3", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_3", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_3", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_3", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_3", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_3", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_3", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_3", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_3", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_3", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_3", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B0_3", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "GTPE2_LOGIC_OUTS_B1_3", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "GTPE2_LOGIC_OUTS_B3_3", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B4_3", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "GTPE2_LOGIC_OUTS_B5_3", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B7_3", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_3", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_3", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B12_3", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_3", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_3", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_3", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_3", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_3", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_3", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_3", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B22_3", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_2", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_2", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_2", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_2", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_2", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_2", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_2", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_2", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_2", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_2", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_2", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_2", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_2", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_2", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_2", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_2", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_2", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_2", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_2", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_2", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_2", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_2", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_2", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_2", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_2", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_2", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_2", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_2", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_2", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_2", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_2", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_2", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_2", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_2", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_2", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_2", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_2", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_2", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_2", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_2", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_2", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_2", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_2", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_2", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_2", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_2", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_2", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_2", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_2", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_2", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_2", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_2", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_2", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_2", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_2", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_2", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_2", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_2", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_2", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_2", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_2", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_2", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_2", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_2", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_2", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_2", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_2", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_2", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B3_2", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "GTPE2_LOGIC_OUTS_B6_2", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "GTPE2_LOGIC_OUTS_B7_2", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "GTPE2_LOGIC_OUTS_B9_2", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B12_2", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_2", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_2", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_2", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_2", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_2", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_2", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_2", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_2", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_2", + "VBRK_EXT_LOGIC_OUTS_B22" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_1", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_1", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_1", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_1", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_1", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_1", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_1", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_1", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_1", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_1", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_1", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_1", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_1", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_1", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_1", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_1", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_1", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_1", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_1", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_1", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_1", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_1", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_1", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_1", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_1", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_1", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_1", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_1", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_1", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_1", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_1", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_1", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_1", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_1", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_1", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_1", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_1", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_1", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_1", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_1", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_1", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_1", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_1", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_1", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_1", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_1", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_1", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_1", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_1", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_1", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_1", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_1", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_1", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_1", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_1", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_1", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_1", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_1", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_1", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_1", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_1", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_1", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_1", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_1", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_1", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_1", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_1", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_1", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B5_1", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "GTPE2_LOGIC_OUTS_B8_1", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B10_1", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_1", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_1", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_1", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_1", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_1", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_1", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_1", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_1", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B20_1", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B21_1", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "GTPE2_LOGIC_OUTS_B22_1", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_1", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "GTP_CHANNEL_3", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_0", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_0", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_0", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_0", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_0", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_0", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_0", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_0", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_0", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_0", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_0", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_0", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_0", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_0", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_0", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_0", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_0", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_0", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_0", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_0", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_0", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_0", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_0", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_0", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_0", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_0", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_0", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_0", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_0", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_0", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_0", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_0", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_0", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_0", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_0", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_0", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_0", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_0", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_0", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_0", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_0", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_0", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_0", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_0", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_0", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_0", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_0", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_0", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_0", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_0", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_0", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_0", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_0", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_0", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_0", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_0", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_0", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_0", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_0", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_0", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_0", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_0", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_0", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_0", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_0", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_0", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_0", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_0", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_0", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_0", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_0", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_0", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B12_0", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "GTPE2_LOGIC_OUTS_B13_0", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_0", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B15_0", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "GTPE2_LOGIC_OUTS_B16_0", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B18_0", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_0", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_0", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B22_0", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "GTPE2_LOGIC_OUTS_B23_0", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "GTP_COMMON", + "HCLK_TERM_GTX" + ], + "wire_pairs": [ + [ + "GTPE2_COMMON_MGT_CLK0", + "HCLK_TERM_GTX_CK_IN4" + ], + [ + "GTPE2_COMMON_MGT_CLK1", + "HCLK_TERM_GTX_CK_IN5" + ], + [ + "GTPE2_COMMON_MGT_CLK2", + "HCLK_TERM_GTX_CK_IN6" + ], + [ + "GTPE2_COMMON_MGT_CLK3", + "HCLK_TERM_GTX_CK_IN7" + ], + [ + "GTPE2_COMMON_MGT_CLK4", + "HCLK_TERM_GTX_CK_IN8" + ], + [ + "GTPE2_COMMON_MGT_CLK5", + "HCLK_TERM_GTX_CK_IN9" + ], + [ + "GTPE2_COMMON_MGT_CLK6", + "HCLK_TERM_GTX_CK_IN10" + ], + [ + "GTPE2_COMMON_MGT_CLK7", + "HCLK_TERM_GTX_CK_IN11" + ], + [ + "GTPE2_COMMON_MGT_CLK8", + "HCLK_TERM_GTX_CK_IN12" + ], + [ + "GTPE2_COMMON_MGT_CLK9", + "HCLK_TERM_GTX_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "GTP_COMMON", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_5", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_5", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_5", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_5", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_5", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_5", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_5", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_5", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_5", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_5", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_5", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_5", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_5", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_5", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_5", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_5", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_5", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_5", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_5", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_5", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_5", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_5", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_5", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_5", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_5", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_5", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_5", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_5", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_5", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_5", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_5", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_5", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_5", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_5", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_5", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_5", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_5", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_5", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_5", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_5", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_5", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_5", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_5", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_5", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_5", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_5", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_5", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_5", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_5", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_5", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_5", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_5", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_5", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_5", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_5", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_5", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_5", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_5", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_5", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_5", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_5", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_5", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_5", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_5", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_5", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_5", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_5", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_5", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_5", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_5", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_5", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_5", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B13_5", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_5", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_5", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_5", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_5", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_5", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_5", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B23_5", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "GTP_COMMON", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_4", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_4", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_4", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_4", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_4", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_4", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_4", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_4", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_4", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_4", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_4", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_4", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_4", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_4", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_4", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_4", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_4", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_4", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_4", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_4", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_4", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_4", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_4", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_4", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_4", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_4", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_4", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_4", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_4", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_4", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_4", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_4", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_4", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_4", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_4", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_4", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_4", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_4", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_4", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_4", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_4", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_4", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_4", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_4", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_4", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_4", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_4", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_4", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_4", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_4", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_4", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_4", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_4", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_4", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_4", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_4", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_4", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_4", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_4", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_4", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_4", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_4", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_4", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_4", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_4", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_4", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_4", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_4", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_4", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_4", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_4", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B11_4", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "GTPE2_LOGIC_OUTS_B13_4", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_4", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_4", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_4", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_4", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_4", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_4", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B23_4", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "GTP_COMMON", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_3", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_3", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_3", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_3", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_3", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_3", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_3", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_3", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_3", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_3", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_3", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_3", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_3", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_3", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_3", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_3", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_3", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_3", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_3", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_3", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_3", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_3", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_3", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_3", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_3", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_3", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_3", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_3", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_3", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_3", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_3", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_3", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_3", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_3", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_3", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_3", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_3", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_3", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_3", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_3", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_3", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_3", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_3", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_3", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_3", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_3", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_3", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_3", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_3", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_3", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_3", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_3", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_3", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_3", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_3", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_3", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_3", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_3", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_3", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_3", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_3", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_3", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_3", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_3", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_3", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_3", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_3", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_3", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_3", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_3", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_3", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B13_3", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B14_3", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "GTPE2_LOGIC_OUTS_B16_3", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_3", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_3", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_3", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_3", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B23_3", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "GTP_COMMON", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_2", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_2", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_2", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_2", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_2", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_2", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_2", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_2", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_2", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_2", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_2", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_2", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_2", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_2", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_2", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_2", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_2", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_2", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_2", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_2", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_2", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_2", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_2", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_2", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_2", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_2", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_2", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_2", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_2", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_2", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_2", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_2", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_2", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_2", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_2", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_2", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_2", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_2", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_2", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_2", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_2", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_2", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_2", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_2", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_2", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_2", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_2", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_2", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_2", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_2", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_2", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_2", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_2", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_2", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_2", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_2", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_2", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_2", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_2", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_2", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_2", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_2", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_2", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_2", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_2", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_2", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_2", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_2", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_2", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_2", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_2", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B13_2", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B16_2", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_2", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B18_2", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "GTPE2_LOGIC_OUTS_B19_2", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_2", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B23_2", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "GTP_COMMON", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_1", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_1", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_1", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_1", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_1", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_1", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_1", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_1", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_1", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_1", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_1", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_1", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_1", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_1", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_1", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_1", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_1", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_1", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_1", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_1", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_1", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_1", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_1", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_1", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_1", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_1", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_1", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_1", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_1", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_1", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_1", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_1", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_1", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_1", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_1", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_1", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_1", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_1", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_1", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_1", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_1", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_1", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_1", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_1", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_1", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_1", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_1", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_1", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_1", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_1", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_1", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_1", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_1", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_1", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_1", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_1", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_1", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_1", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_1", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_1", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_1", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_1", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_1", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_1", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_1", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_1", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_1", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_1", + "VBRK_EXT_IMUX47" + ], + [ + "GTPE2_LOGIC_OUTS_B8_1", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "GTPE2_LOGIC_OUTS_B9_1", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "GTPE2_LOGIC_OUTS_B10_1", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "GTPE2_LOGIC_OUTS_B13_1", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "GTPE2_LOGIC_OUTS_B16_1", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "GTPE2_LOGIC_OUTS_B17_1", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "GTPE2_LOGIC_OUTS_B19_1", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "GTPE2_LOGIC_OUTS_B20_1", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "GTPE2_LOGIC_OUTS_B23_1", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "GTP_COMMON", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "GTPE2_BYP0_0", + "VBRK_EXT_BYP0" + ], + [ + "GTPE2_BYP1_0", + "VBRK_EXT_BYP1" + ], + [ + "GTPE2_BYP2_0", + "VBRK_EXT_BYP2" + ], + [ + "GTPE2_BYP3_0", + "VBRK_EXT_BYP3" + ], + [ + "GTPE2_BYP4_0", + "VBRK_EXT_BYP4" + ], + [ + "GTPE2_BYP5_0", + "VBRK_EXT_BYP5" + ], + [ + "GTPE2_BYP6_0", + "VBRK_EXT_BYP6" + ], + [ + "GTPE2_BYP7_0", + "VBRK_EXT_BYP7" + ], + [ + "GTPE2_CLK0_0", + "VBRK_EXT_CLK0" + ], + [ + "GTPE2_CLK1_0", + "VBRK_EXT_CLK1" + ], + [ + "GTPE2_CTRL0_0", + "VBRK_EXT_CTRL0" + ], + [ + "GTPE2_CTRL1_0", + "VBRK_EXT_CTRL1" + ], + [ + "GTPE2_FAN0_0", + "VBRK_EXT_FAN0" + ], + [ + "GTPE2_FAN1_0", + "VBRK_EXT_FAN1" + ], + [ + "GTPE2_FAN2_0", + "VBRK_EXT_FAN2" + ], + [ + "GTPE2_FAN3_0", + "VBRK_EXT_FAN3" + ], + [ + "GTPE2_FAN4_0", + "VBRK_EXT_FAN4" + ], + [ + "GTPE2_FAN5_0", + "VBRK_EXT_FAN5" + ], + [ + "GTPE2_FAN6_0", + "VBRK_EXT_FAN6" + ], + [ + "GTPE2_FAN7_0", + "VBRK_EXT_FAN7" + ], + [ + "GTPE2_IMUX0_0", + "VBRK_EXT_IMUX0" + ], + [ + "GTPE2_IMUX1_0", + "VBRK_EXT_IMUX1" + ], + [ + "GTPE2_IMUX2_0", + "VBRK_EXT_IMUX2" + ], + [ + "GTPE2_IMUX3_0", + "VBRK_EXT_IMUX3" + ], + [ + "GTPE2_IMUX4_0", + "VBRK_EXT_IMUX4" + ], + [ + "GTPE2_IMUX5_0", + "VBRK_EXT_IMUX5" + ], + [ + "GTPE2_IMUX6_0", + "VBRK_EXT_IMUX6" + ], + [ + "GTPE2_IMUX7_0", + "VBRK_EXT_IMUX7" + ], + [ + "GTPE2_IMUX8_0", + "VBRK_EXT_IMUX8" + ], + [ + "GTPE2_IMUX9_0", + "VBRK_EXT_IMUX9" + ], + [ + "GTPE2_IMUX10_0", + "VBRK_EXT_IMUX10" + ], + [ + "GTPE2_IMUX11_0", + "VBRK_EXT_IMUX11" + ], + [ + "GTPE2_IMUX12_0", + "VBRK_EXT_IMUX12" + ], + [ + "GTPE2_IMUX13_0", + "VBRK_EXT_IMUX13" + ], + [ + "GTPE2_IMUX14_0", + "VBRK_EXT_IMUX14" + ], + [ + "GTPE2_IMUX15_0", + "VBRK_EXT_IMUX15" + ], + [ + "GTPE2_IMUX16_0", + "VBRK_EXT_IMUX16" + ], + [ + "GTPE2_IMUX17_0", + "VBRK_EXT_IMUX17" + ], + [ + "GTPE2_IMUX18_0", + "VBRK_EXT_IMUX18" + ], + [ + "GTPE2_IMUX19_0", + "VBRK_EXT_IMUX19" + ], + [ + "GTPE2_IMUX20_0", + "VBRK_EXT_IMUX20" + ], + [ + "GTPE2_IMUX21_0", + "VBRK_EXT_IMUX21" + ], + [ + "GTPE2_IMUX22_0", + "VBRK_EXT_IMUX22" + ], + [ + "GTPE2_IMUX23_0", + "VBRK_EXT_IMUX23" + ], + [ + "GTPE2_IMUX24_0", + "VBRK_EXT_IMUX24" + ], + [ + "GTPE2_IMUX25_0", + "VBRK_EXT_IMUX25" + ], + [ + "GTPE2_IMUX26_0", + "VBRK_EXT_IMUX26" + ], + [ + "GTPE2_IMUX27_0", + "VBRK_EXT_IMUX27" + ], + [ + "GTPE2_IMUX28_0", + "VBRK_EXT_IMUX28" + ], + [ + "GTPE2_IMUX29_0", + "VBRK_EXT_IMUX29" + ], + [ + "GTPE2_IMUX30_0", + "VBRK_EXT_IMUX30" + ], + [ + "GTPE2_IMUX31_0", + "VBRK_EXT_IMUX31" + ], + [ + "GTPE2_IMUX32_0", + "VBRK_EXT_IMUX32" + ], + [ + "GTPE2_IMUX33_0", + "VBRK_EXT_IMUX33" + ], + [ + "GTPE2_IMUX34_0", + "VBRK_EXT_IMUX34" + ], + [ + "GTPE2_IMUX35_0", + "VBRK_EXT_IMUX35" + ], + [ + "GTPE2_IMUX36_0", + "VBRK_EXT_IMUX36" + ], + [ + "GTPE2_IMUX37_0", + "VBRK_EXT_IMUX37" + ], + [ + "GTPE2_IMUX38_0", + "VBRK_EXT_IMUX38" + ], + [ + "GTPE2_IMUX39_0", + "VBRK_EXT_IMUX39" + ], + [ + "GTPE2_IMUX40_0", + "VBRK_EXT_IMUX40" + ], + [ + "GTPE2_IMUX41_0", + "VBRK_EXT_IMUX41" + ], + [ + "GTPE2_IMUX42_0", + "VBRK_EXT_IMUX42" + ], + [ + "GTPE2_IMUX43_0", + "VBRK_EXT_IMUX43" + ], + [ + "GTPE2_IMUX44_0", + "VBRK_EXT_IMUX44" + ], + [ + "GTPE2_IMUX45_0", + "VBRK_EXT_IMUX45" + ], + [ + "GTPE2_IMUX46_0", + "VBRK_EXT_IMUX46" + ], + [ + "GTPE2_IMUX47_0", + "VBRK_EXT_IMUX47" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "GTP_INT_INTERFACE", + "INT_R" + ], + "wire_pairs": [ + [ + "GTPE2_INT_INTERFACE_IMUX0", + "IMUX0" + ], + [ + "GTPE2_INT_INTERFACE_IMUX1", + "IMUX1" + ], + [ + "GTPE2_INT_INTERFACE_IMUX2", + "IMUX2" + ], + [ + "GTPE2_INT_INTERFACE_IMUX3", + "IMUX3" + ], + [ + "GTPE2_INT_INTERFACE_IMUX4", + "IMUX4" + ], + [ + "GTPE2_INT_INTERFACE_IMUX5", + "IMUX5" + ], + [ + "GTPE2_INT_INTERFACE_IMUX6", + "IMUX6" + ], + [ + "GTPE2_INT_INTERFACE_IMUX7", + "IMUX7" + ], + [ + "GTPE2_INT_INTERFACE_IMUX8", + "IMUX8" + ], + [ + "GTPE2_INT_INTERFACE_IMUX9", + "IMUX9" + ], + [ + "GTPE2_INT_INTERFACE_IMUX10", + "IMUX10" + ], + [ + "GTPE2_INT_INTERFACE_IMUX11", + "IMUX11" + ], + [ + "GTPE2_INT_INTERFACE_IMUX12", + "IMUX12" + ], + [ + "GTPE2_INT_INTERFACE_IMUX13", + "IMUX13" + ], + [ + "GTPE2_INT_INTERFACE_IMUX14", + "IMUX14" + ], + [ + "GTPE2_INT_INTERFACE_IMUX15", + "IMUX15" + ], + [ + "GTPE2_INT_INTERFACE_IMUX16", + "IMUX16" + ], + [ + "GTPE2_INT_INTERFACE_IMUX17", + "IMUX17" + ], + [ + "GTPE2_INT_INTERFACE_IMUX18", + "IMUX18" + ], + [ + "GTPE2_INT_INTERFACE_IMUX19", + "IMUX19" + ], + [ + "GTPE2_INT_INTERFACE_IMUX20", + "IMUX20" + ], + [ + "GTPE2_INT_INTERFACE_IMUX21", + "IMUX21" + ], + [ + "GTPE2_INT_INTERFACE_IMUX22", + "IMUX22" + ], + [ + "GTPE2_INT_INTERFACE_IMUX23", + "IMUX23" + ], + [ + "GTPE2_INT_INTERFACE_IMUX24", + "IMUX24" + ], + [ + "GTPE2_INT_INTERFACE_IMUX25", + "IMUX25" + ], + [ + "GTPE2_INT_INTERFACE_IMUX26", + "IMUX26" + ], + [ + "GTPE2_INT_INTERFACE_IMUX27", + "IMUX27" + ], + [ + "GTPE2_INT_INTERFACE_IMUX28", + "IMUX28" + ], + [ + "GTPE2_INT_INTERFACE_IMUX29", + "IMUX29" + ], + [ + "GTPE2_INT_INTERFACE_IMUX30", + "IMUX30" + ], + [ + "GTPE2_INT_INTERFACE_IMUX31", + "IMUX31" + ], + [ + "GTPE2_INT_INTERFACE_IMUX32", + "IMUX32" + ], + [ + "GTPE2_INT_INTERFACE_IMUX33", + "IMUX33" + ], + [ + "GTPE2_INT_INTERFACE_IMUX34", + "IMUX34" + ], + [ + "GTPE2_INT_INTERFACE_IMUX35", + "IMUX35" + ], + [ + "GTPE2_INT_INTERFACE_IMUX36", + "IMUX36" + ], + [ + "GTPE2_INT_INTERFACE_IMUX37", + "IMUX37" + ], + [ + "GTPE2_INT_INTERFACE_IMUX38", + "IMUX38" + ], + [ + "GTPE2_INT_INTERFACE_IMUX39", + "IMUX39" + ], + [ + "GTPE2_INT_INTERFACE_IMUX40", + "IMUX40" + ], + [ + "GTPE2_INT_INTERFACE_IMUX41", + "IMUX41" + ], + [ + "GTPE2_INT_INTERFACE_IMUX42", + "IMUX42" + ], + [ + "GTPE2_INT_INTERFACE_IMUX43", + "IMUX43" + ], + [ + "GTPE2_INT_INTERFACE_IMUX44", + "IMUX44" + ], + [ + "GTPE2_INT_INTERFACE_IMUX45", + "IMUX45" + ], + [ + "GTPE2_INT_INTERFACE_IMUX46", + "IMUX46" + ], + [ + "GTPE2_INT_INTERFACE_IMUX47", + "IMUX47" + ], + [ + "INT_INTERFACE_BYP0", + "BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "EE2A0" + ], + [ + "INT_INTERFACE_EE2A1", + "EE2A1" + ], + [ + "INT_INTERFACE_EE2A2", + "EE2A2" + ], + [ + "INT_INTERFACE_EE2A3", + "EE2A3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "EE2BEG0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "EE2BEG1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "EE2BEG2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "EE2BEG3" + ], + [ + "INT_INTERFACE_EE4A0", + "EE4A0" + ], + [ + "INT_INTERFACE_EE4A1", + "EE4A1" + ], + [ + "INT_INTERFACE_EE4A2", + "EE4A2" + ], + [ + "INT_INTERFACE_EE4A3", + "EE4A3" + ], + [ + "INT_INTERFACE_EE4B0", + "EE4B0" + ], + [ + "INT_INTERFACE_EE4B1", + "EE4B1" + ], + [ + "INT_INTERFACE_EE4B2", + "EE4B2" + ], + [ + "INT_INTERFACE_EE4B3", + "EE4B3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "EE4BEG0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "EE4BEG1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "EE4BEG2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "EE4BEG3" + ], + [ + "INT_INTERFACE_EE4C0", + "EE4C0" + ], + [ + "INT_INTERFACE_EE4C1", + "EE4C1" + ], + [ + "INT_INTERFACE_EE4C2", + "EE4C2" + ], + [ + "INT_INTERFACE_EE4C3", + "EE4C3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "EL1BEG0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "EL1BEG1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "EL1BEG2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "EL1BEG3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "ER1BEG0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "ER1BEG1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "ER1BEG2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "ER1BEG3" + ], + [ + "INT_INTERFACE_FAN0", + "FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "FAN7" + ], + [ + "INT_INTERFACE_LH1", + "LH1" + ], + [ + "INT_INTERFACE_LH2", + "LH2" + ], + [ + "INT_INTERFACE_LH3", + "LH3" + ], + [ + "INT_INTERFACE_LH4", + "LH4" + ], + [ + "INT_INTERFACE_LH5", + "LH5" + ], + [ + "INT_INTERFACE_LH6", + "LH6" + ], + [ + "INT_INTERFACE_LH7", + "LH7" + ], + [ + "INT_INTERFACE_LH8", + "LH8" + ], + [ + "INT_INTERFACE_LH9", + "LH9" + ], + [ + "INT_INTERFACE_LH10", + "LH10" + ], + [ + "INT_INTERFACE_LH11", + "LH11" + ], + [ + "INT_INTERFACE_LH12", + "LH12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS0", + "LOGIC_OUTS0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS1", + "LOGIC_OUTS1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS2", + "LOGIC_OUTS2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS3", + "LOGIC_OUTS3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS4", + "LOGIC_OUTS4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS5", + "LOGIC_OUTS5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS6", + "LOGIC_OUTS6" + ], + [ + "INT_INTERFACE_LOGIC_OUTS7", + "LOGIC_OUTS7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS8", + "LOGIC_OUTS8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS9", + "LOGIC_OUTS9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS10", + "LOGIC_OUTS10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS11", + "LOGIC_OUTS11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS12", + "LOGIC_OUTS12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS13", + "LOGIC_OUTS13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS14", + "LOGIC_OUTS14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS15", + "LOGIC_OUTS15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS16", + "LOGIC_OUTS16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS17", + "LOGIC_OUTS17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS18", + "LOGIC_OUTS18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS19", + "LOGIC_OUTS19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS20", + "LOGIC_OUTS20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS21", + "LOGIC_OUTS21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS22", + "LOGIC_OUTS22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS23", + "LOGIC_OUTS23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "NE2A0" + ], + [ + "INT_INTERFACE_NE2A1", + "NE2A1" + ], + [ + "INT_INTERFACE_NE2A2", + "NE2A2" + ], + [ + "INT_INTERFACE_NE2A3", + "NE2A3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "NE6BEG0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "NE6BEG1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "NE6BEG2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "NE6BEG3" + ], + [ + "INT_INTERFACE_NE4C0", + "NE6E0" + ], + [ + "INT_INTERFACE_NE4C1", + "NE6E1" + ], + [ + "INT_INTERFACE_NE4C2", + "NE6E2" + ], + [ + "INT_INTERFACE_NE4C3", + "NE6E3" + ], + [ + "INT_INTERFACE_NW2A0", + "NW2END0" + ], + [ + "INT_INTERFACE_NW2A1", + "NW2END1" + ], + [ + "INT_INTERFACE_NW2A2", + "NW2END2" + ], + [ + "INT_INTERFACE_NW2A3", + "NW2END3" + ], + [ + "INT_INTERFACE_NW4A0", + "NW6A0" + ], + [ + "INT_INTERFACE_NW4A1", + "NW6A1" + ], + [ + "INT_INTERFACE_NW4A2", + "NW6A2" + ], + [ + "INT_INTERFACE_NW4A3", + "NW6A3" + ], + [ + "INT_INTERFACE_NW4END0", + "NW6END0" + ], + [ + "INT_INTERFACE_NW4END1", + "NW6END1" + ], + [ + "INT_INTERFACE_NW4END2", + "NW6END2" + ], + [ + "INT_INTERFACE_NW4END3", + "NW6END3" + ], + [ + "INT_INTERFACE_SE2A0", + "SE2A0" + ], + [ + "INT_INTERFACE_SE2A1", + "SE2A1" + ], + [ + "INT_INTERFACE_SE2A2", + "SE2A2" + ], + [ + "INT_INTERFACE_SE2A3", + "SE2A3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "SE6BEG0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "SE6BEG1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "SE6BEG2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "SE6BEG3" + ], + [ + "INT_INTERFACE_SE4C0", + "SE6E0" + ], + [ + "INT_INTERFACE_SE4C1", + "SE6E1" + ], + [ + "INT_INTERFACE_SE4C2", + "SE6E2" + ], + [ + "INT_INTERFACE_SE4C3", + "SE6E3" + ], + [ + "INT_INTERFACE_SW2A0", + "SW2END0" + ], + [ + "INT_INTERFACE_SW2A1", + "SW2END1" + ], + [ + "INT_INTERFACE_SW2A2", + "SW2END2" + ], + [ + "INT_INTERFACE_SW2A3", + "SW2END3" + ], + [ + "INT_INTERFACE_SW4A0", + "SW6A0" + ], + [ + "INT_INTERFACE_SW4A1", + "SW6A1" + ], + [ + "INT_INTERFACE_SW4A2", + "SW6A2" + ], + [ + "INT_INTERFACE_SW4A3", + "SW6A3" + ], + [ + "INT_INTERFACE_SW4END0", + "SW6END0" + ], + [ + "INT_INTERFACE_SW4END1", + "SW6END1" + ], + [ + "INT_INTERFACE_SW4END2", + "SW6END2" + ], + [ + "INT_INTERFACE_SW4END3", + "SW6END3" + ], + [ + "INT_INTERFACE_WL1END0", + "WL1END0" + ], + [ + "INT_INTERFACE_WL1END1", + "WL1END1" + ], + [ + "INT_INTERFACE_WL1END2", + "WL1END2" + ], + [ + "INT_INTERFACE_WL1END3", + "WL1END3" + ], + [ + "INT_INTERFACE_WR1END0", + "WR1END0" + ], + [ + "INT_INTERFACE_WR1END1", + "WR1END1" + ], + [ + "INT_INTERFACE_WR1END2", + "WR1END2" + ], + [ + "INT_INTERFACE_WR1END3", + "WR1END3" + ], + [ + "INT_INTERFACE_WW2A0", + "WW2A0" + ], + [ + "INT_INTERFACE_WW2A1", + "WW2A1" + ], + [ + "INT_INTERFACE_WW2A2", + "WW2A2" + ], + [ + "INT_INTERFACE_WW2A3", + "WW2A3" + ], + [ + "INT_INTERFACE_WW2END0", + "WW2END0" + ], + [ + "INT_INTERFACE_WW2END1", + "WW2END1" + ], + [ + "INT_INTERFACE_WW2END2", + "WW2END2" + ], + [ + "INT_INTERFACE_WW2END3", + "WW2END3" + ], + [ + "INT_INTERFACE_WW4A0", + "WW4A0" + ], + [ + "INT_INTERFACE_WW4A1", + "WW4A1" + ], + [ + "INT_INTERFACE_WW4A2", + "WW4A2" + ], + [ + "INT_INTERFACE_WW4A3", + "WW4A3" + ], + [ + "INT_INTERFACE_WW4B0", + "WW4B0" + ], + [ + "INT_INTERFACE_WW4B1", + "WW4B1" + ], + [ + "INT_INTERFACE_WW4B2", + "WW4B2" + ], + [ + "INT_INTERFACE_WW4B3", + "WW4B3" + ], + [ + "INT_INTERFACE_WW4C0", + "WW4C0" + ], + [ + "INT_INTERFACE_WW4C1", + "WW4C1" + ], + [ + "INT_INTERFACE_WW4C2", + "WW4C2" + ], + [ + "INT_INTERFACE_WW4C3", + "WW4C3" + ], + [ + "INT_INTERFACE_WW4END0", + "WW4END0" + ], + [ + "INT_INTERFACE_WW4END1", + "WW4END1" + ], + [ + "INT_INTERFACE_WW4END2", + "WW4END2" + ], + [ + "INT_INTERFACE_WW4END3", + "WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "GTP_INT_INTERFACE", + "R_TERM_INT_GTX" + ], + "wire_pairs": [ + [ + "GTPE2_INT_INTERFACE_IMUX_OUT0", + "R_TERM_INT_GTX_IMUX0" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT1", + "R_TERM_INT_GTX_IMUX1" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT2", + "R_TERM_INT_GTX_IMUX2" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT3", + "R_TERM_INT_GTX_IMUX3" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT4", + "R_TERM_INT_GTX_IMUX4" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT5", + "R_TERM_INT_GTX_IMUX5" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT6", + "R_TERM_INT_GTX_IMUX6" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT7", + "R_TERM_INT_GTX_IMUX7" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT8", + "R_TERM_INT_GTX_IMUX8" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT9", + "R_TERM_INT_GTX_IMUX9" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT10", + "R_TERM_INT_GTX_IMUX10" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT11", + "R_TERM_INT_GTX_IMUX11" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT12", + "R_TERM_INT_GTX_IMUX12" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT13", + "R_TERM_INT_GTX_IMUX13" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT14", + "R_TERM_INT_GTX_IMUX14" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT15", + "R_TERM_INT_GTX_IMUX15" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT16", + "R_TERM_INT_GTX_IMUX16" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT17", + "R_TERM_INT_GTX_IMUX17" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT18", + "R_TERM_INT_GTX_IMUX18" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT19", + "R_TERM_INT_GTX_IMUX19" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT20", + "R_TERM_INT_GTX_IMUX20" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT21", + "R_TERM_INT_GTX_IMUX21" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT22", + "R_TERM_INT_GTX_IMUX22" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT23", + "R_TERM_INT_GTX_IMUX23" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT24", + "R_TERM_INT_GTX_IMUX24" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT25", + "R_TERM_INT_GTX_IMUX25" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT26", + "R_TERM_INT_GTX_IMUX26" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT27", + "R_TERM_INT_GTX_IMUX27" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT28", + "R_TERM_INT_GTX_IMUX28" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT29", + "R_TERM_INT_GTX_IMUX29" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT30", + "R_TERM_INT_GTX_IMUX30" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT31", + "R_TERM_INT_GTX_IMUX31" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT32", + "R_TERM_INT_GTX_IMUX32" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT33", + "R_TERM_INT_GTX_IMUX33" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT34", + "R_TERM_INT_GTX_IMUX34" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT35", + "R_TERM_INT_GTX_IMUX35" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT36", + "R_TERM_INT_GTX_IMUX36" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT37", + "R_TERM_INT_GTX_IMUX37" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT38", + "R_TERM_INT_GTX_IMUX38" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT39", + "R_TERM_INT_GTX_IMUX39" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT40", + "R_TERM_INT_GTX_IMUX40" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT41", + "R_TERM_INT_GTX_IMUX41" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT42", + "R_TERM_INT_GTX_IMUX42" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT43", + "R_TERM_INT_GTX_IMUX43" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT44", + "R_TERM_INT_GTX_IMUX44" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT45", + "R_TERM_INT_GTX_IMUX45" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT46", + "R_TERM_INT_GTX_IMUX46" + ], + [ + "GTPE2_INT_INTERFACE_IMUX_OUT47", + "R_TERM_INT_GTX_IMUX47" + ], + [ + "INT_INTERFACE_BYP0", + "R_TERM_INT_GTX_BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "R_TERM_INT_GTX_BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "R_TERM_INT_GTX_BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "R_TERM_INT_GTX_BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "R_TERM_INT_GTX_BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "R_TERM_INT_GTX_BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "R_TERM_INT_GTX_BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "R_TERM_INT_GTX_BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "R_TERM_INT_GTX_CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "R_TERM_INT_GTX_CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "R_TERM_INT_GTX_CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "R_TERM_INT_GTX_CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "R_TERM_INT_WW2END0" + ], + [ + "INT_INTERFACE_EE2A1", + "R_TERM_INT_WW2END1" + ], + [ + "INT_INTERFACE_EE2A2", + "R_TERM_INT_WW2END2" + ], + [ + "INT_INTERFACE_EE2A3", + "R_TERM_INT_WW2END3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "R_TERM_INT_WW2A0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "R_TERM_INT_WW2A1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "R_TERM_INT_WW2A2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "R_TERM_INT_WW2A3" + ], + [ + "INT_INTERFACE_EE4A0", + "R_TERM_INT_WW4B0" + ], + [ + "INT_INTERFACE_EE4A1", + "R_TERM_INT_WW4B1" + ], + [ + "INT_INTERFACE_EE4A2", + "R_TERM_INT_WW4B2" + ], + [ + "INT_INTERFACE_EE4A3", + "R_TERM_INT_WW4B3" + ], + [ + "INT_INTERFACE_EE4B0", + "R_TERM_INT_WW4C0" + ], + [ + "INT_INTERFACE_EE4B1", + "R_TERM_INT_WW4C1" + ], + [ + "INT_INTERFACE_EE4B2", + "R_TERM_INT_WW4C2" + ], + [ + "INT_INTERFACE_EE4B3", + "R_TERM_INT_WW4C3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "R_TERM_INT_WW4A0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "R_TERM_INT_WW4A1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "R_TERM_INT_WW4A2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "R_TERM_INT_WW4A3" + ], + [ + "INT_INTERFACE_EE4C0", + "R_TERM_INT_WW4END0" + ], + [ + "INT_INTERFACE_EE4C1", + "R_TERM_INT_WW4END1" + ], + [ + "INT_INTERFACE_EE4C2", + "R_TERM_INT_WW4END2" + ], + [ + "INT_INTERFACE_EE4C3", + "R_TERM_INT_WW4END3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "R_TERM_INT_WL1END0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "R_TERM_INT_WL1END1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "R_TERM_INT_WL1END2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "R_TERM_INT_WL1END3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "R_TERM_INT_WR1END0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "R_TERM_INT_WR1END1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "R_TERM_INT_WR1END2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "R_TERM_INT_WR1END3" + ], + [ + "INT_INTERFACE_FAN0", + "R_TERM_INT_GTX_FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "R_TERM_INT_GTX_FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "R_TERM_INT_GTX_FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "R_TERM_INT_GTX_FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "R_TERM_INT_GTX_FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "R_TERM_INT_GTX_FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "R_TERM_INT_GTX_FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "R_TERM_INT_GTX_FAN7" + ], + [ + "INT_INTERFACE_LH1", + "R_TERM_INT_LH0" + ], + [ + "INT_INTERFACE_LH2", + "R_TERM_INT_LH1" + ], + [ + "INT_INTERFACE_LH3", + "R_TERM_INT_LH2" + ], + [ + "INT_INTERFACE_LH4", + "R_TERM_INT_LH3" + ], + [ + "INT_INTERFACE_LH5", + "R_TERM_INT_LH4" + ], + [ + "INT_INTERFACE_LH6", + "R_TERM_INT_LH5" + ], + [ + "INT_INTERFACE_LH7", + "R_TERM_INT_LH5" + ], + [ + "INT_INTERFACE_LH8", + "R_TERM_INT_LH4" + ], + [ + "INT_INTERFACE_LH9", + "R_TERM_INT_LH3" + ], + [ + "INT_INTERFACE_LH10", + "R_TERM_INT_LH2" + ], + [ + "INT_INTERFACE_LH11", + "R_TERM_INT_LH1" + ], + [ + "INT_INTERFACE_LH12", + "R_TERM_INT_LH0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "R_TERM_INT_GTX_LOGIC_OUTS_B0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "R_TERM_INT_GTX_LOGIC_OUTS_B1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "R_TERM_INT_GTX_LOGIC_OUTS_B2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "R_TERM_INT_GTX_LOGIC_OUTS_B3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "R_TERM_INT_GTX_LOGIC_OUTS_B4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "R_TERM_INT_GTX_LOGIC_OUTS_B5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "R_TERM_INT_GTX_LOGIC_OUTS_B6" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "R_TERM_INT_GTX_LOGIC_OUTS_B7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "R_TERM_INT_GTX_LOGIC_OUTS_B8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "R_TERM_INT_GTX_LOGIC_OUTS_B9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "R_TERM_INT_GTX_LOGIC_OUTS_B10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "R_TERM_INT_GTX_LOGIC_OUTS_B11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "R_TERM_INT_GTX_LOGIC_OUTS_B12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "R_TERM_INT_GTX_LOGIC_OUTS_B13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "R_TERM_INT_GTX_LOGIC_OUTS_B14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "R_TERM_INT_GTX_LOGIC_OUTS_B15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "R_TERM_INT_GTX_LOGIC_OUTS_B16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "R_TERM_INT_GTX_LOGIC_OUTS_B17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "R_TERM_INT_GTX_LOGIC_OUTS_B18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "R_TERM_INT_GTX_LOGIC_OUTS_B19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "R_TERM_INT_GTX_LOGIC_OUTS_B20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "R_TERM_INT_GTX_LOGIC_OUTS_B21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "R_TERM_INT_GTX_LOGIC_OUTS_B22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "R_TERM_INT_GTX_LOGIC_OUTS_B23" + ], + [ + "INT_INTERFACE_NE2A0", + "R_TERM_INT_NW2A0" + ], + [ + "INT_INTERFACE_NE2A1", + "R_TERM_INT_NW2A1" + ], + [ + "INT_INTERFACE_NE2A2", + "R_TERM_INT_NW2A2" + ], + [ + "INT_INTERFACE_NE2A3", + "R_TERM_INT_NW2A3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "R_TERM_INT_NW4A0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "R_TERM_INT_NW4A1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "R_TERM_INT_NW4A2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "R_TERM_INT_NW4A3" + ], + [ + "INT_INTERFACE_NE4C0", + "R_TERM_INT_NW4END0" + ], + [ + "INT_INTERFACE_NE4C1", + "R_TERM_INT_NW4END1" + ], + [ + "INT_INTERFACE_NE4C2", + "R_TERM_INT_NW4END2" + ], + [ + "INT_INTERFACE_NE4C3", + "R_TERM_INT_NW4END3" + ], + [ + "INT_INTERFACE_NW2A0", + "R_TERM_INT_NW2A0" + ], + [ + "INT_INTERFACE_NW2A1", + "R_TERM_INT_NW2A1" + ], + [ + "INT_INTERFACE_NW2A2", + "R_TERM_INT_NW2A2" + ], + [ + "INT_INTERFACE_NW2A3", + "R_TERM_INT_NW2A3" + ], + [ + "INT_INTERFACE_NW4A0", + "R_TERM_INT_NW4A0" + ], + [ + "INT_INTERFACE_NW4A1", + "R_TERM_INT_NW4A1" + ], + [ + "INT_INTERFACE_NW4A2", + "R_TERM_INT_NW4A2" + ], + [ + "INT_INTERFACE_NW4A3", + "R_TERM_INT_NW4A3" + ], + [ + "INT_INTERFACE_NW4END0", + "R_TERM_INT_NW4END0" + ], + [ + "INT_INTERFACE_NW4END1", + "R_TERM_INT_NW4END1" + ], + [ + "INT_INTERFACE_NW4END2", + "R_TERM_INT_NW4END2" + ], + [ + "INT_INTERFACE_NW4END3", + "R_TERM_INT_NW4END3" + ], + [ + "INT_INTERFACE_SE2A0", + "R_TERM_INT_SW2A0" + ], + [ + "INT_INTERFACE_SE2A1", + "R_TERM_INT_SW2A1" + ], + [ + "INT_INTERFACE_SE2A2", + "R_TERM_INT_SW2A2" + ], + [ + "INT_INTERFACE_SE2A3", + "R_TERM_INT_SW2A3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "R_TERM_INT_SW4A0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "R_TERM_INT_SW4A1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "R_TERM_INT_SW4A2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "R_TERM_INT_SW4A3" + ], + [ + "INT_INTERFACE_SE4C0", + "R_TERM_INT_SW4END0" + ], + [ + "INT_INTERFACE_SE4C1", + "R_TERM_INT_SW4END1" + ], + [ + "INT_INTERFACE_SE4C2", + "R_TERM_INT_SW4END2" + ], + [ + "INT_INTERFACE_SE4C3", + "R_TERM_INT_SW4END3" + ], + [ + "INT_INTERFACE_SW2A0", + "R_TERM_INT_SW2A0" + ], + [ + "INT_INTERFACE_SW2A1", + "R_TERM_INT_SW2A1" + ], + [ + "INT_INTERFACE_SW2A2", + "R_TERM_INT_SW2A2" + ], + [ + "INT_INTERFACE_SW2A3", + "R_TERM_INT_SW2A3" + ], + [ + "INT_INTERFACE_SW4A0", + "R_TERM_INT_SW4A0" + ], + [ + "INT_INTERFACE_SW4A1", + "R_TERM_INT_SW4A1" + ], + [ + "INT_INTERFACE_SW4A2", + "R_TERM_INT_SW4A2" + ], + [ + "INT_INTERFACE_SW4A3", + "R_TERM_INT_SW4A3" + ], + [ + "INT_INTERFACE_SW4END0", + "R_TERM_INT_SW4END0" + ], + [ + "INT_INTERFACE_SW4END1", + "R_TERM_INT_SW4END1" + ], + [ + "INT_INTERFACE_SW4END2", + "R_TERM_INT_SW4END2" + ], + [ + "INT_INTERFACE_SW4END3", + "R_TERM_INT_SW4END3" + ], + [ + "INT_INTERFACE_WL1END0", + "R_TERM_INT_WL1END0" + ], + [ + "INT_INTERFACE_WL1END1", + "R_TERM_INT_WL1END1" + ], + [ + "INT_INTERFACE_WL1END2", + "R_TERM_INT_WL1END2" + ], + [ + "INT_INTERFACE_WL1END3", + "R_TERM_INT_WL1END3" + ], + [ + "INT_INTERFACE_WR1END0", + "R_TERM_INT_WR1END0" + ], + [ + "INT_INTERFACE_WR1END1", + "R_TERM_INT_WR1END1" + ], + [ + "INT_INTERFACE_WR1END2", + "R_TERM_INT_WR1END2" + ], + [ + "INT_INTERFACE_WR1END3", + "R_TERM_INT_WR1END3" + ], + [ + "INT_INTERFACE_WW2A0", + "R_TERM_INT_WW2A0" + ], + [ + "INT_INTERFACE_WW2A1", + "R_TERM_INT_WW2A1" + ], + [ + "INT_INTERFACE_WW2A2", + "R_TERM_INT_WW2A2" + ], + [ + "INT_INTERFACE_WW2A3", + "R_TERM_INT_WW2A3" + ], + [ + "INT_INTERFACE_WW2END0", + "R_TERM_INT_WW2END0" + ], + [ + "INT_INTERFACE_WW2END1", + "R_TERM_INT_WW2END1" + ], + [ + "INT_INTERFACE_WW2END2", + "R_TERM_INT_WW2END2" + ], + [ + "INT_INTERFACE_WW2END3", + "R_TERM_INT_WW2END3" + ], + [ + "INT_INTERFACE_WW4A0", + "R_TERM_INT_WW4A0" + ], + [ + "INT_INTERFACE_WW4A1", + "R_TERM_INT_WW4A1" + ], + [ + "INT_INTERFACE_WW4A2", + "R_TERM_INT_WW4A2" + ], + [ + "INT_INTERFACE_WW4A3", + "R_TERM_INT_WW4A3" + ], + [ + "INT_INTERFACE_WW4B0", + "R_TERM_INT_WW4B0" + ], + [ + "INT_INTERFACE_WW4B1", + "R_TERM_INT_WW4B1" + ], + [ + "INT_INTERFACE_WW4B2", + "R_TERM_INT_WW4B2" + ], + [ + "INT_INTERFACE_WW4B3", + "R_TERM_INT_WW4B3" + ], + [ + "INT_INTERFACE_WW4C0", + "R_TERM_INT_WW4C0" + ], + [ + "INT_INTERFACE_WW4C1", + "R_TERM_INT_WW4C1" + ], + [ + "INT_INTERFACE_WW4C2", + "R_TERM_INT_WW4C2" + ], + [ + "INT_INTERFACE_WW4C3", + "R_TERM_INT_WW4C3" + ], + [ + "INT_INTERFACE_WW4END0", + "R_TERM_INT_WW4END0" + ], + [ + "INT_INTERFACE_WW4END1", + "R_TERM_INT_WW4END1" + ], + [ + "INT_INTERFACE_WW4END2", + "R_TERM_INT_WW4END2" + ], + [ + "INT_INTERFACE_WW4END3", + "R_TERM_INT_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_BRAM", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "HCLK_BRAM_CK_BUFHCLK0", + "HCLK_CLB_CK_BUFHCLK0" + ], + [ + "HCLK_BRAM_CK_BUFHCLK1", + "HCLK_CLB_CK_BUFHCLK1" + ], + [ + "HCLK_BRAM_CK_BUFHCLK2", + "HCLK_CLB_CK_BUFHCLK2" + ], + [ + "HCLK_BRAM_CK_BUFHCLK3", + "HCLK_CLB_CK_BUFHCLK3" + ], + [ + "HCLK_BRAM_CK_BUFHCLK4", + "HCLK_CLB_CK_BUFHCLK4" + ], + [ + "HCLK_BRAM_CK_BUFHCLK5", + "HCLK_CLB_CK_BUFHCLK5" + ], + [ + "HCLK_BRAM_CK_BUFHCLK6", + "HCLK_CLB_CK_BUFHCLK6" + ], + [ + "HCLK_BRAM_CK_BUFHCLK7", + "HCLK_CLB_CK_BUFHCLK7" + ], + [ + "HCLK_BRAM_CK_BUFHCLK8", + "HCLK_CLB_CK_BUFHCLK8" + ], + [ + "HCLK_BRAM_CK_BUFHCLK9", + "HCLK_CLB_CK_BUFHCLK9" + ], + [ + "HCLK_BRAM_CK_BUFHCLK10", + "HCLK_CLB_CK_BUFHCLK10" + ], + [ + "HCLK_BRAM_CK_BUFHCLK11", + "HCLK_CLB_CK_BUFHCLK11" + ], + [ + "HCLK_BRAM_CK_BUFRCLK0", + "HCLK_CLB_CK_BUFRCLK0" + ], + [ + "HCLK_BRAM_CK_BUFRCLK1", + "HCLK_CLB_CK_BUFRCLK1" + ], + [ + "HCLK_BRAM_CK_BUFRCLK2", + "HCLK_CLB_CK_BUFRCLK2" + ], + [ + "HCLK_BRAM_CK_BUFRCLK3", + "HCLK_CLB_CK_BUFRCLK3" + ], + [ + "HCLK_BRAM_CK_IN0", + "HCLK_CLB_CK_IN0" + ], + [ + "HCLK_BRAM_CK_IN1", + "HCLK_CLB_CK_IN1" + ], + [ + "HCLK_BRAM_CK_IN2", + "HCLK_CLB_CK_IN2" + ], + [ + "HCLK_BRAM_CK_IN3", + "HCLK_CLB_CK_IN3" + ], + [ + "HCLK_BRAM_CK_IN4", + "HCLK_CLB_CK_IN4" + ], + [ + "HCLK_BRAM_CK_IN5", + "HCLK_CLB_CK_IN5" + ], + [ + "HCLK_BRAM_CK_IN6", + "HCLK_CLB_CK_IN6" + ], + [ + "HCLK_BRAM_CK_IN7", + "HCLK_CLB_CK_IN7" + ], + [ + "HCLK_BRAM_CK_IN8", + "HCLK_CLB_CK_IN8" + ], + [ + "HCLK_BRAM_CK_IN9", + "HCLK_CLB_CK_IN9" + ], + [ + "HCLK_BRAM_CK_IN10", + "HCLK_CLB_CK_IN10" + ], + [ + "HCLK_BRAM_CK_IN11", + "HCLK_CLB_CK_IN11" + ], + [ + "HCLK_BRAM_CK_IN12", + "HCLK_CLB_CK_IN12" + ], + [ + "HCLK_BRAM_CK_IN13", + "HCLK_CLB_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_BRAM", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_BRAM_CK_BUFHCLK0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "HCLK_BRAM_CK_BUFHCLK1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "HCLK_BRAM_CK_BUFHCLK2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "HCLK_BRAM_CK_BUFHCLK3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "HCLK_BRAM_CK_BUFHCLK4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "HCLK_BRAM_CK_BUFHCLK5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "HCLK_BRAM_CK_BUFHCLK6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "HCLK_BRAM_CK_BUFHCLK7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "HCLK_BRAM_CK_BUFHCLK8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "HCLK_BRAM_CK_BUFHCLK9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "HCLK_BRAM_CK_BUFHCLK10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "HCLK_BRAM_CK_BUFHCLK11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "HCLK_BRAM_CK_BUFRCLK0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "HCLK_BRAM_CK_BUFRCLK1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "HCLK_BRAM_CK_BUFRCLK2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "HCLK_BRAM_CK_BUFRCLK3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "HCLK_BRAM_CK_IN0", + "HCLK_INT_INTERFACE_CK_IN0" + ], + [ + "HCLK_BRAM_CK_IN1", + "HCLK_INT_INTERFACE_CK_IN1" + ], + [ + "HCLK_BRAM_CK_IN2", + "HCLK_INT_INTERFACE_CK_IN2" + ], + [ + "HCLK_BRAM_CK_IN3", + "HCLK_INT_INTERFACE_CK_IN3" + ], + [ + "HCLK_BRAM_CK_IN4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "HCLK_BRAM_CK_IN5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "HCLK_BRAM_CK_IN6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "HCLK_BRAM_CK_IN7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "HCLK_BRAM_CK_IN8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "HCLK_BRAM_CK_IN9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "HCLK_BRAM_CK_IN10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "HCLK_BRAM_CK_IN11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "HCLK_BRAM_CK_IN12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "HCLK_BRAM_CK_IN13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_BRAM", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_BRAM_CK_BUFHCLK0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "HCLK_BRAM_CK_BUFHCLK1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "HCLK_BRAM_CK_BUFHCLK2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "HCLK_BRAM_CK_BUFHCLK3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "HCLK_BRAM_CK_BUFHCLK4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "HCLK_BRAM_CK_BUFHCLK5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "HCLK_BRAM_CK_BUFHCLK6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "HCLK_BRAM_CK_BUFHCLK7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "HCLK_BRAM_CK_BUFHCLK8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "HCLK_BRAM_CK_BUFHCLK9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "HCLK_BRAM_CK_BUFHCLK10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "HCLK_BRAM_CK_BUFHCLK11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "HCLK_BRAM_CK_BUFRCLK0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "HCLK_BRAM_CK_BUFRCLK1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "HCLK_BRAM_CK_BUFRCLK2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "HCLK_BRAM_CK_BUFRCLK3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "HCLK_BRAM_CK_IN0", + "HCLK_INT_INTERFACE_CK_IN0" + ], + [ + "HCLK_BRAM_CK_IN1", + "HCLK_INT_INTERFACE_CK_IN1" + ], + [ + "HCLK_BRAM_CK_IN2", + "HCLK_INT_INTERFACE_CK_IN2" + ], + [ + "HCLK_BRAM_CK_IN3", + "HCLK_INT_INTERFACE_CK_IN3" + ], + [ + "HCLK_BRAM_CK_IN4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "HCLK_BRAM_CK_IN5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "HCLK_BRAM_CK_IN6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "HCLK_BRAM_CK_IN7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "HCLK_BRAM_CK_IN8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "HCLK_BRAM_CK_IN9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "HCLK_BRAM_CK_IN10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "HCLK_BRAM_CK_IN11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "HCLK_BRAM_CK_IN12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "HCLK_BRAM_CK_IN13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_BRAM", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_BRAM_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_BRAM_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_BRAM_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_BRAM_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_BRAM_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_BRAM_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_BRAM_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_BRAM_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_BRAM_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_BRAM_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_BRAM_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_BRAM_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_BRAM_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_BRAM_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_BRAM_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_BRAM_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_BRAM_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_BRAM_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_BRAM_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_BRAM_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_BRAM_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_BRAM_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_BRAM_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_BRAM_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_BRAM_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_BRAM_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_BRAM_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_BRAM_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_BRAM_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_BRAM_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_BRAM", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_BRAM_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_BRAM_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_BRAM_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_BRAM_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_BRAM_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_BRAM_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_BRAM_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_BRAM_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_BRAM_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_BRAM_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_BRAM_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_BRAM_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_BRAM_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_BRAM_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_BRAM_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_BRAM_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_BRAM_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_BRAM_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_BRAM_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_BRAM_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_BRAM_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_BRAM_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_BRAM_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_BRAM_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_BRAM_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_BRAM_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_BRAM_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_BRAM_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_BRAM_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_BRAM_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_CLB" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_CLB_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_CLB_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_CLB_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_CLB_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_CLB_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_CLB_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_CLB_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_CLB_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_CLB_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_CLB_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_CLB_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_CLB_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_BUFRCLK0", + "HCLK_CLB_CK_BUFRCLK0" + ], + [ + "HCLK_CLB_CK_BUFRCLK1", + "HCLK_CLB_CK_BUFRCLK1" + ], + [ + "HCLK_CLB_CK_BUFRCLK2", + "HCLK_CLB_CK_BUFRCLK2" + ], + [ + "HCLK_CLB_CK_BUFRCLK3", + "HCLK_CLB_CK_BUFRCLK3" + ], + [ + "HCLK_CLB_CK_IN0", + "HCLK_CLB_CK_IN0" + ], + [ + "HCLK_CLB_CK_IN1", + "HCLK_CLB_CK_IN1" + ], + [ + "HCLK_CLB_CK_IN2", + "HCLK_CLB_CK_IN2" + ], + [ + "HCLK_CLB_CK_IN3", + "HCLK_CLB_CK_IN3" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_CLB_CK_IN4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_CLB_CK_IN5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_CLB_CK_IN6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_CLB_CK_IN7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_CLB_CK_IN8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_CLB_CK_IN9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_CLB_CK_IN10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_CLB_CK_IN11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_CLB_CK_IN12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_CLB_CK_IN13" + ], + [ + "HCLK_CLB_PERFCLK0", + "HCLK_CLB_PERFCLK0" + ], + [ + "HCLK_CLB_PERFCLK1", + "HCLK_CLB_PERFCLK1" + ], + [ + "HCLK_CLB_PERFCLK2", + "HCLK_CLB_PERFCLK2" + ], + [ + "HCLK_CLB_PERFCLK3", + "HCLK_CLB_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_L" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_BUFRCLK0", + "HCLK_CK_BUFRCLK0" + ], + [ + "HCLK_CLB_CK_BUFRCLK1", + "HCLK_CK_BUFRCLK1" + ], + [ + "HCLK_CLB_CK_BUFRCLK2", + "HCLK_CK_BUFRCLK2" + ], + [ + "HCLK_CLB_CK_BUFRCLK3", + "HCLK_CK_BUFRCLK3" + ], + [ + "HCLK_CLB_CK_IN0", + "HCLK_CK_IN0" + ], + [ + "HCLK_CLB_CK_IN1", + "HCLK_CK_IN1" + ], + [ + "HCLK_CLB_CK_IN2", + "HCLK_CK_IN2" + ], + [ + "HCLK_CLB_CK_IN3", + "HCLK_CK_IN3" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_CK_IN13" + ], + [ + "HCLK_CLB_PERFCLK0", + "HCLK_INT_PERFCLK0" + ], + [ + "HCLK_CLB_PERFCLK1", + "HCLK_INT_PERFCLK1" + ], + [ + "HCLK_CLB_PERFCLK2", + "HCLK_INT_PERFCLK2" + ], + [ + "HCLK_CLB_PERFCLK3", + "HCLK_INT_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_L_BOT_UTURN" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_R" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_BUFRCLK0", + "HCLK_CK_BUFRCLK0" + ], + [ + "HCLK_CLB_CK_BUFRCLK1", + "HCLK_CK_BUFRCLK1" + ], + [ + "HCLK_CLB_CK_BUFRCLK2", + "HCLK_CK_BUFRCLK2" + ], + [ + "HCLK_CLB_CK_BUFRCLK3", + "HCLK_CK_BUFRCLK3" + ], + [ + "HCLK_CLB_CK_IN0", + "HCLK_CK_IN0" + ], + [ + "HCLK_CLB_CK_IN1", + "HCLK_CK_IN1" + ], + [ + "HCLK_CLB_CK_IN2", + "HCLK_CK_IN2" + ], + [ + "HCLK_CLB_CK_IN3", + "HCLK_CK_IN3" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_CK_IN13" + ], + [ + "HCLK_CLB_PERFCLK0", + "HCLK_INT_PERFCLK0" + ], + [ + "HCLK_CLB_PERFCLK1", + "HCLK_INT_PERFCLK1" + ], + [ + "HCLK_CLB_PERFCLK2", + "HCLK_INT_PERFCLK2" + ], + [ + "HCLK_CLB_PERFCLK3", + "HCLK_INT_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_R_BOT_UTURN" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_CLB_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_CLB_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_CLB_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_CLB_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_CLB_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_CLB_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_CLB_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ], + [ + "HCLK_CLB_PERFCLK0", + "HCLK_VBRK_PHSR_PERFCLK0" + ], + [ + "HCLK_CLB_PERFCLK1", + "HCLK_VBRK_PHSR_PERFCLK1" + ], + [ + "HCLK_CLB_PERFCLK2", + "HCLK_VBRK_PHSR_PERFCLK2" + ], + [ + "HCLK_CLB_PERFCLK3", + "HCLK_VBRK_PHSR_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_CLB_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_CLB_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_CLB_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_CLB_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_CLB_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_CLB_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_CLB_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ], + [ + "HCLK_CLB_PERFCLK0", + "HCLK_VBRK_PHSR_PERFCLK0" + ], + [ + "HCLK_CLB_PERFCLK1", + "HCLK_VBRK_PHSR_PERFCLK1" + ], + [ + "HCLK_CLB_PERFCLK2", + "HCLK_VBRK_PHSR_PERFCLK2" + ], + [ + "HCLK_CLB_PERFCLK3", + "HCLK_VBRK_PHSR_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CLB", + "HCLK_VFRAME" + ], + "wire_pairs": [ + [ + "HCLK_CLB_CK_BUFHCLK0", + "HCLK_VFRAME_CK_BUFHCLK0" + ], + [ + "HCLK_CLB_CK_BUFHCLK1", + "HCLK_VFRAME_CK_BUFHCLK1" + ], + [ + "HCLK_CLB_CK_BUFHCLK2", + "HCLK_VFRAME_CK_BUFHCLK2" + ], + [ + "HCLK_CLB_CK_BUFHCLK3", + "HCLK_VFRAME_CK_BUFHCLK3" + ], + [ + "HCLK_CLB_CK_BUFHCLK4", + "HCLK_VFRAME_CK_BUFHCLK4" + ], + [ + "HCLK_CLB_CK_BUFHCLK5", + "HCLK_VFRAME_CK_BUFHCLK5" + ], + [ + "HCLK_CLB_CK_BUFHCLK6", + "HCLK_VFRAME_CK_BUFHCLK6" + ], + [ + "HCLK_CLB_CK_BUFHCLK7", + "HCLK_VFRAME_CK_BUFHCLK7" + ], + [ + "HCLK_CLB_CK_BUFHCLK8", + "HCLK_VFRAME_CK_BUFHCLK8" + ], + [ + "HCLK_CLB_CK_BUFHCLK9", + "HCLK_VFRAME_CK_BUFHCLK9" + ], + [ + "HCLK_CLB_CK_BUFHCLK10", + "HCLK_VFRAME_CK_BUFHCLK10" + ], + [ + "HCLK_CLB_CK_BUFHCLK11", + "HCLK_VFRAME_CK_BUFHCLK11" + ], + [ + "HCLK_CLB_CK_BUFRCLK0", + "HCLK_VFRAME_CK_BUFRCLK0" + ], + [ + "HCLK_CLB_CK_BUFRCLK1", + "HCLK_VFRAME_CK_BUFRCLK1" + ], + [ + "HCLK_CLB_CK_BUFRCLK2", + "HCLK_VFRAME_CK_BUFRCLK2" + ], + [ + "HCLK_CLB_CK_BUFRCLK3", + "HCLK_VFRAME_CK_BUFRCLK3" + ], + [ + "HCLK_CLB_CK_IN0", + "HCLK_VFRAME_CK_IN0" + ], + [ + "HCLK_CLB_CK_IN1", + "HCLK_VFRAME_CK_IN1" + ], + [ + "HCLK_CLB_CK_IN2", + "HCLK_VFRAME_CK_IN2" + ], + [ + "HCLK_CLB_CK_IN3", + "HCLK_VFRAME_CK_IN3" + ], + [ + "HCLK_CLB_CK_IN4", + "HCLK_VFRAME_CK_IN4" + ], + [ + "HCLK_CLB_CK_IN5", + "HCLK_VFRAME_CK_IN5" + ], + [ + "HCLK_CLB_CK_IN6", + "HCLK_VFRAME_CK_IN6" + ], + [ + "HCLK_CLB_CK_IN7", + "HCLK_VFRAME_CK_IN7" + ], + [ + "HCLK_CLB_CK_IN8", + "HCLK_VFRAME_CK_IN8" + ], + [ + "HCLK_CLB_CK_IN9", + "HCLK_VFRAME_CK_IN9" + ], + [ + "HCLK_CLB_CK_IN10", + "HCLK_VFRAME_CK_IN10" + ], + [ + "HCLK_CLB_CK_IN11", + "HCLK_VFRAME_CK_IN11" + ], + [ + "HCLK_CLB_CK_IN12", + "HCLK_VFRAME_CK_IN12" + ], + [ + "HCLK_CLB_CK_IN13", + "HCLK_VFRAME_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_CMT", + "HCLK_FIFO_L" + ], + "wire_pairs": [ + [ + "HCLK_CMT_CCIO0", + "HCLK_FIFO_CCIO0" + ], + [ + "HCLK_CMT_CCIO1", + "HCLK_FIFO_CCIO1" + ], + [ + "HCLK_CMT_CCIO2", + "HCLK_FIFO_CCIO2" + ], + [ + "HCLK_CMT_CCIO3", + "HCLK_FIFO_CCIO3" + ], + [ + "HCLK_CMT_CK_BUFHCLK0", + "HCLK_FIFO_CK_BUFHCLK0" + ], + [ + "HCLK_CMT_CK_BUFHCLK1", + "HCLK_FIFO_CK_BUFHCLK1" + ], + [ + "HCLK_CMT_CK_BUFHCLK2", + "HCLK_FIFO_CK_BUFHCLK2" + ], + [ + "HCLK_CMT_CK_BUFHCLK3", + "HCLK_FIFO_CK_BUFHCLK3" + ], + [ + "HCLK_CMT_CK_BUFHCLK4", + "HCLK_FIFO_CK_BUFHCLK4" + ], + [ + "HCLK_CMT_CK_BUFHCLK5", + "HCLK_FIFO_CK_BUFHCLK5" + ], + [ + "HCLK_CMT_CK_BUFHCLK6", + "HCLK_FIFO_CK_BUFHCLK6" + ], + [ + "HCLK_CMT_CK_BUFHCLK7", + "HCLK_FIFO_CK_BUFHCLK7" + ], + [ + "HCLK_CMT_CK_BUFHCLK8", + "HCLK_FIFO_CK_BUFHCLK8" + ], + [ + "HCLK_CMT_CK_BUFHCLK9", + "HCLK_FIFO_CK_BUFHCLK9" + ], + [ + "HCLK_CMT_CK_BUFHCLK10", + "HCLK_FIFO_CK_BUFHCLK10" + ], + [ + "HCLK_CMT_CK_BUFHCLK11", + "HCLK_FIFO_CK_BUFHCLK11" + ], + [ + "HCLK_CMT_CK_BUFRCLK0", + "HCLK_FIFO_CK_BUFRCLK0" + ], + [ + "HCLK_CMT_CK_BUFRCLK1", + "HCLK_FIFO_CK_BUFRCLK1" + ], + [ + "HCLK_CMT_CK_BUFRCLK2", + "HCLK_FIFO_CK_BUFRCLK2" + ], + [ + "HCLK_CMT_CK_BUFRCLK3", + "HCLK_FIFO_CK_BUFRCLK3" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK0", + "HCLK_FIFO_PERFCLK0" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK1", + "HCLK_FIFO_PERFCLK1" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK2", + "HCLK_FIFO_PERFCLK2" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK3", + "HCLK_FIFO_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CMT", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_CMT_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_CMT_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_CMT_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_CMT_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_CMT_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_CMT_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_CMT_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_CMT_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_CMT_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_CMT_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_CMT_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_CMT_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_CMT_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_CMT_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_CMT_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_CMT_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_CMT_MUX_CLK_0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_CMT_MUX_CLK_1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_CMT_MUX_CLK_2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_CMT_MUX_CLK_3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_CMT_MUX_CLK_4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_CMT_MUX_CLK_5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_CMT_MUX_CLK_6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_CMT_MUX_CLK_7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_CMT_MUX_CLK_8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_CMT_MUX_CLK_9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_CMT_MUX_CLK_10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_CMT_MUX_CLK_11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_CMT_MUX_CLK_12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_CMT_MUX_CLK_13", + "HCLK_VBRK_MUX_CLK13" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK0", + "HCLK_VBRK_PHSR_PERFCLK0" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK1", + "HCLK_VBRK_PHSR_PERFCLK1" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK2", + "HCLK_VBRK_PHSR_PERFCLK2" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK3", + "HCLK_VBRK_PHSR_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_CMT_L", + "HCLK_FIFO_L" + ], + "wire_pairs": [ + [ + "HCLK_CMT_CCIO0", + "HCLK_FIFO_CCIO0" + ], + [ + "HCLK_CMT_CCIO1", + "HCLK_FIFO_CCIO1" + ], + [ + "HCLK_CMT_CCIO2", + "HCLK_FIFO_CCIO2" + ], + [ + "HCLK_CMT_CCIO3", + "HCLK_FIFO_CCIO3" + ], + [ + "HCLK_CMT_CK_BUFHCLK0", + "HCLK_FIFO_CK_BUFHCLK0" + ], + [ + "HCLK_CMT_CK_BUFHCLK1", + "HCLK_FIFO_CK_BUFHCLK1" + ], + [ + "HCLK_CMT_CK_BUFHCLK2", + "HCLK_FIFO_CK_BUFHCLK2" + ], + [ + "HCLK_CMT_CK_BUFHCLK3", + "HCLK_FIFO_CK_BUFHCLK3" + ], + [ + "HCLK_CMT_CK_BUFHCLK4", + "HCLK_FIFO_CK_BUFHCLK4" + ], + [ + "HCLK_CMT_CK_BUFHCLK5", + "HCLK_FIFO_CK_BUFHCLK5" + ], + [ + "HCLK_CMT_CK_BUFHCLK6", + "HCLK_FIFO_CK_BUFHCLK6" + ], + [ + "HCLK_CMT_CK_BUFHCLK7", + "HCLK_FIFO_CK_BUFHCLK7" + ], + [ + "HCLK_CMT_CK_BUFHCLK8", + "HCLK_FIFO_CK_BUFHCLK8" + ], + [ + "HCLK_CMT_CK_BUFHCLK9", + "HCLK_FIFO_CK_BUFHCLK9" + ], + [ + "HCLK_CMT_CK_BUFHCLK10", + "HCLK_FIFO_CK_BUFHCLK10" + ], + [ + "HCLK_CMT_CK_BUFHCLK11", + "HCLK_FIFO_CK_BUFHCLK11" + ], + [ + "HCLK_CMT_CK_BUFRCLK0", + "HCLK_FIFO_CK_BUFRCLK0" + ], + [ + "HCLK_CMT_CK_BUFRCLK1", + "HCLK_FIFO_CK_BUFRCLK1" + ], + [ + "HCLK_CMT_CK_BUFRCLK2", + "HCLK_FIFO_CK_BUFRCLK2" + ], + [ + "HCLK_CMT_CK_BUFRCLK3", + "HCLK_FIFO_CK_BUFRCLK3" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK0", + "HCLK_FIFO_PERFCLK0" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK1", + "HCLK_FIFO_PERFCLK1" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK2", + "HCLK_FIFO_PERFCLK2" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK3", + "HCLK_FIFO_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_CMT_L", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_CMT_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_CMT_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_CMT_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_CMT_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_CMT_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_CMT_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_CMT_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_CMT_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_CMT_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_CMT_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_CMT_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_CMT_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_CMT_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_CMT_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_CMT_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_CMT_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_CMT_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_CMT_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_CMT_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_CMT_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_CMT_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_CMT_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_CMT_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_CMT_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_CMT_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_CMT_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_CMT_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_CMT_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_CMT_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_CMT_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK0", + "HCLK_VBRK_PHSR_PERFCLK0" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK1", + "HCLK_VBRK_PHSR_PERFCLK1" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK2", + "HCLK_VBRK_PHSR_PERFCLK2" + ], + [ + "HCLK_CMT_MUX_PHSR_PERFCLK3", + "HCLK_VBRK_PHSR_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_DSP_L", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_DSP_CK_BUFHCLK0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "HCLK_DSP_CK_BUFHCLK1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "HCLK_DSP_CK_BUFHCLK2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "HCLK_DSP_CK_BUFHCLK3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "HCLK_DSP_CK_BUFHCLK4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "HCLK_DSP_CK_BUFHCLK5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "HCLK_DSP_CK_BUFHCLK6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "HCLK_DSP_CK_BUFHCLK7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "HCLK_DSP_CK_BUFHCLK8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "HCLK_DSP_CK_BUFHCLK9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "HCLK_DSP_CK_BUFHCLK10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "HCLK_DSP_CK_BUFHCLK11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "HCLK_DSP_CK_BUFRCLK0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "HCLK_DSP_CK_BUFRCLK1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "HCLK_DSP_CK_BUFRCLK2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "HCLK_DSP_CK_BUFRCLK3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "HCLK_DSP_CK_IN0", + "HCLK_INT_INTERFACE_CK_IN0" + ], + [ + "HCLK_DSP_CK_IN1", + "HCLK_INT_INTERFACE_CK_IN1" + ], + [ + "HCLK_DSP_CK_IN2", + "HCLK_INT_INTERFACE_CK_IN2" + ], + [ + "HCLK_DSP_CK_IN3", + "HCLK_INT_INTERFACE_CK_IN3" + ], + [ + "HCLK_DSP_CK_IN4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "HCLK_DSP_CK_IN5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "HCLK_DSP_CK_IN6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "HCLK_DSP_CK_IN7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "HCLK_DSP_CK_IN8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "HCLK_DSP_CK_IN9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "HCLK_DSP_CK_IN10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "HCLK_DSP_CK_IN11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "HCLK_DSP_CK_IN12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "HCLK_DSP_CK_IN13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_DSP_L", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_DSP_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_DSP_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_DSP_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_DSP_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_DSP_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_DSP_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_DSP_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_DSP_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_DSP_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_DSP_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_DSP_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_DSP_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_DSP_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_DSP_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_DSP_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_DSP_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_DSP_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_DSP_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_DSP_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_DSP_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_DSP_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_DSP_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_DSP_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_DSP_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_DSP_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_DSP_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_DSP_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_DSP_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_DSP_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_DSP_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_DSP_R", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_DSP_CK_BUFHCLK0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "HCLK_DSP_CK_BUFHCLK1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "HCLK_DSP_CK_BUFHCLK2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "HCLK_DSP_CK_BUFHCLK3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "HCLK_DSP_CK_BUFHCLK4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "HCLK_DSP_CK_BUFHCLK5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "HCLK_DSP_CK_BUFHCLK6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "HCLK_DSP_CK_BUFHCLK7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "HCLK_DSP_CK_BUFHCLK8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "HCLK_DSP_CK_BUFHCLK9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "HCLK_DSP_CK_BUFHCLK10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "HCLK_DSP_CK_BUFHCLK11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "HCLK_DSP_CK_BUFRCLK0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "HCLK_DSP_CK_BUFRCLK1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "HCLK_DSP_CK_BUFRCLK2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "HCLK_DSP_CK_BUFRCLK3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "HCLK_DSP_CK_IN0", + "HCLK_INT_INTERFACE_CK_IN0" + ], + [ + "HCLK_DSP_CK_IN1", + "HCLK_INT_INTERFACE_CK_IN1" + ], + [ + "HCLK_DSP_CK_IN2", + "HCLK_INT_INTERFACE_CK_IN2" + ], + [ + "HCLK_DSP_CK_IN3", + "HCLK_INT_INTERFACE_CK_IN3" + ], + [ + "HCLK_DSP_CK_IN4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "HCLK_DSP_CK_IN5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "HCLK_DSP_CK_IN6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "HCLK_DSP_CK_IN7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "HCLK_DSP_CK_IN8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "HCLK_DSP_CK_IN9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "HCLK_DSP_CK_IN10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "HCLK_DSP_CK_IN11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "HCLK_DSP_CK_IN12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "HCLK_DSP_CK_IN13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_DSP_R", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_DSP_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_DSP_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_DSP_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_DSP_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_DSP_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_DSP_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_DSP_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_DSP_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_DSP_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_DSP_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_DSP_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_DSP_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_DSP_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_DSP_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_DSP_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_DSP_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_DSP_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_DSP_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_DSP_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_DSP_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_DSP_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_DSP_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_DSP_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_DSP_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_DSP_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_DSP_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_DSP_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_DSP_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_DSP_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_DSP_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_FEEDTHRU_1", + "HCLK_FEEDTHRU_1" + ], + "wire_pairs": [ + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK0", + "HCLK_FEEDTHRU_1_CK_BUFHCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK1", + "HCLK_FEEDTHRU_1_CK_BUFHCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK2", + "HCLK_FEEDTHRU_1_CK_BUFHCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK3", + "HCLK_FEEDTHRU_1_CK_BUFHCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK4", + "HCLK_FEEDTHRU_1_CK_BUFHCLK4" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK5", + "HCLK_FEEDTHRU_1_CK_BUFHCLK5" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK6", + "HCLK_FEEDTHRU_1_CK_BUFHCLK6" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK7", + "HCLK_FEEDTHRU_1_CK_BUFHCLK7" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK8", + "HCLK_FEEDTHRU_1_CK_BUFHCLK8" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK9", + "HCLK_FEEDTHRU_1_CK_BUFHCLK9" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK10", + "HCLK_FEEDTHRU_1_CK_BUFHCLK10" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK11", + "HCLK_FEEDTHRU_1_CK_BUFHCLK11" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK0", + "HCLK_FEEDTHRU_1_CK_BUFRCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK1", + "HCLK_FEEDTHRU_1_CK_BUFRCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK2", + "HCLK_FEEDTHRU_1_CK_BUFRCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK3", + "HCLK_FEEDTHRU_1_CK_BUFRCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN0", + "HCLK_FEEDTHRU_1_CK_IN0" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN1", + "HCLK_FEEDTHRU_1_CK_IN1" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN2", + "HCLK_FEEDTHRU_1_CK_IN2" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN3", + "HCLK_FEEDTHRU_1_CK_IN3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN4", + "HCLK_FEEDTHRU_1_CK_IN4" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN5", + "HCLK_FEEDTHRU_1_CK_IN5" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN6", + "HCLK_FEEDTHRU_1_CK_IN6" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN7", + "HCLK_FEEDTHRU_1_CK_IN7" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN8", + "HCLK_FEEDTHRU_1_CK_IN8" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN9", + "HCLK_FEEDTHRU_1_CK_IN9" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN10", + "HCLK_FEEDTHRU_1_CK_IN10" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN11", + "HCLK_FEEDTHRU_1_CK_IN11" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN12", + "HCLK_FEEDTHRU_1_CK_IN12" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN13", + "HCLK_FEEDTHRU_1_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_FEEDTHRU_1", + "HCLK_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK0", + "HCLK_FEEDTHRU_2_CK_BUFHCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK1", + "HCLK_FEEDTHRU_2_CK_BUFHCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK2", + "HCLK_FEEDTHRU_2_CK_BUFHCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK3", + "HCLK_FEEDTHRU_2_CK_BUFHCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK4", + "HCLK_FEEDTHRU_2_CK_BUFHCLK4" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK5", + "HCLK_FEEDTHRU_2_CK_BUFHCLK5" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK6", + "HCLK_FEEDTHRU_2_CK_BUFHCLK6" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK7", + "HCLK_FEEDTHRU_2_CK_BUFHCLK7" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK8", + "HCLK_FEEDTHRU_2_CK_BUFHCLK8" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK9", + "HCLK_FEEDTHRU_2_CK_BUFHCLK9" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK10", + "HCLK_FEEDTHRU_2_CK_BUFHCLK10" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK11", + "HCLK_FEEDTHRU_2_CK_BUFHCLK11" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK0", + "HCLK_FEEDTHRU_2_CK_BUFRCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK1", + "HCLK_FEEDTHRU_2_CK_BUFRCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK2", + "HCLK_FEEDTHRU_2_CK_BUFRCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK3", + "HCLK_FEEDTHRU_2_CK_BUFRCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN0", + "HCLK_FEEDTHRU_2_CK_IN0" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN1", + "HCLK_FEEDTHRU_2_CK_IN1" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN2", + "HCLK_FEEDTHRU_2_CK_IN2" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN3", + "HCLK_FEEDTHRU_2_CK_IN3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN4", + "HCLK_FEEDTHRU_2_CK_IN4" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN5", + "HCLK_FEEDTHRU_2_CK_IN5" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN6", + "HCLK_FEEDTHRU_2_CK_IN6" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN7", + "HCLK_FEEDTHRU_2_CK_IN7" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN8", + "HCLK_FEEDTHRU_2_CK_IN8" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN9", + "HCLK_FEEDTHRU_2_CK_IN9" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN10", + "HCLK_FEEDTHRU_2_CK_IN10" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN11", + "HCLK_FEEDTHRU_2_CK_IN11" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN12", + "HCLK_FEEDTHRU_2_CK_IN12" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN13", + "HCLK_FEEDTHRU_2_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_FEEDTHRU_1", + "HCLK_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK0", + "HCLK_FEEDTHRU_2_CK_BUFHCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK1", + "HCLK_FEEDTHRU_2_CK_BUFHCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK2", + "HCLK_FEEDTHRU_2_CK_BUFHCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK3", + "HCLK_FEEDTHRU_2_CK_BUFHCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK4", + "HCLK_FEEDTHRU_2_CK_BUFHCLK4" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK5", + "HCLK_FEEDTHRU_2_CK_BUFHCLK5" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK6", + "HCLK_FEEDTHRU_2_CK_BUFHCLK6" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK7", + "HCLK_FEEDTHRU_2_CK_BUFHCLK7" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK8", + "HCLK_FEEDTHRU_2_CK_BUFHCLK8" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK9", + "HCLK_FEEDTHRU_2_CK_BUFHCLK9" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK10", + "HCLK_FEEDTHRU_2_CK_BUFHCLK10" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK11", + "HCLK_FEEDTHRU_2_CK_BUFHCLK11" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK0", + "HCLK_FEEDTHRU_2_CK_BUFRCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK1", + "HCLK_FEEDTHRU_2_CK_BUFRCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK2", + "HCLK_FEEDTHRU_2_CK_BUFRCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK3", + "HCLK_FEEDTHRU_2_CK_BUFRCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN0", + "HCLK_FEEDTHRU_2_CK_IN0" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN1", + "HCLK_FEEDTHRU_2_CK_IN1" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN2", + "HCLK_FEEDTHRU_2_CK_IN2" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN3", + "HCLK_FEEDTHRU_2_CK_IN3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN4", + "HCLK_FEEDTHRU_2_CK_IN4" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN5", + "HCLK_FEEDTHRU_2_CK_IN5" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN6", + "HCLK_FEEDTHRU_2_CK_IN6" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN7", + "HCLK_FEEDTHRU_2_CK_IN7" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN8", + "HCLK_FEEDTHRU_2_CK_IN8" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN9", + "HCLK_FEEDTHRU_2_CK_IN9" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN10", + "HCLK_FEEDTHRU_2_CK_IN10" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN11", + "HCLK_FEEDTHRU_2_CK_IN11" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN12", + "HCLK_FEEDTHRU_2_CK_IN12" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN13", + "HCLK_FEEDTHRU_2_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_FEEDTHRU_1", + "HCLK_VBRK" + ], + "wire_pairs": [ + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK0", + "HCLK_VBRK_CK_BUFHCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK1", + "HCLK_VBRK_CK_BUFHCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK2", + "HCLK_VBRK_CK_BUFHCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK3", + "HCLK_VBRK_CK_BUFHCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK4", + "HCLK_VBRK_CK_BUFHCLK4" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK5", + "HCLK_VBRK_CK_BUFHCLK5" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK6", + "HCLK_VBRK_CK_BUFHCLK6" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK7", + "HCLK_VBRK_CK_BUFHCLK7" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK8", + "HCLK_VBRK_CK_BUFHCLK8" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK9", + "HCLK_VBRK_CK_BUFHCLK9" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK10", + "HCLK_VBRK_CK_BUFHCLK10" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK11", + "HCLK_VBRK_CK_BUFHCLK11" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK0", + "HCLK_VBRK_CK_BUFRCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK1", + "HCLK_VBRK_CK_BUFRCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK2", + "HCLK_VBRK_CK_BUFRCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK3", + "HCLK_VBRK_CK_BUFRCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN0", + "HCLK_VBRK_MUX_CLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN1", + "HCLK_VBRK_MUX_CLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN2", + "HCLK_VBRK_MUX_CLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN3", + "HCLK_VBRK_MUX_CLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN4", + "HCLK_VBRK_MUX_CLK4" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN5", + "HCLK_VBRK_MUX_CLK5" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN6", + "HCLK_VBRK_MUX_CLK6" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN7", + "HCLK_VBRK_MUX_CLK7" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN8", + "HCLK_VBRK_MUX_CLK8" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN9", + "HCLK_VBRK_MUX_CLK9" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN10", + "HCLK_VBRK_MUX_CLK10" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN11", + "HCLK_VBRK_MUX_CLK11" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN12", + "HCLK_VBRK_MUX_CLK12" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN13", + "HCLK_VBRK_MUX_CLK13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_FEEDTHRU_1", + "HCLK_VFRAME" + ], + "wire_pairs": [ + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK0", + "HCLK_VFRAME_CK_BUFHCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK1", + "HCLK_VFRAME_CK_BUFHCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK2", + "HCLK_VFRAME_CK_BUFHCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK3", + "HCLK_VFRAME_CK_BUFHCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK4", + "HCLK_VFRAME_CK_BUFHCLK4" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK5", + "HCLK_VFRAME_CK_BUFHCLK5" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK6", + "HCLK_VFRAME_CK_BUFHCLK6" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK7", + "HCLK_VFRAME_CK_BUFHCLK7" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK8", + "HCLK_VFRAME_CK_BUFHCLK8" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK9", + "HCLK_VFRAME_CK_BUFHCLK9" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK10", + "HCLK_VFRAME_CK_BUFHCLK10" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFHCLK11", + "HCLK_VFRAME_CK_BUFHCLK11" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK0", + "HCLK_VFRAME_CK_BUFRCLK0" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK1", + "HCLK_VFRAME_CK_BUFRCLK1" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK2", + "HCLK_VFRAME_CK_BUFRCLK2" + ], + [ + "HCLK_FEEDTHRU_1_CK_BUFRCLK3", + "HCLK_VFRAME_CK_BUFRCLK3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN0", + "HCLK_VFRAME_CK_IN0" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN1", + "HCLK_VFRAME_CK_IN1" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN2", + "HCLK_VFRAME_CK_IN2" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN3", + "HCLK_VFRAME_CK_IN3" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN4", + "HCLK_VFRAME_CK_IN4" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN5", + "HCLK_VFRAME_CK_IN5" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN6", + "HCLK_VFRAME_CK_IN6" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN7", + "HCLK_VFRAME_CK_IN7" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN8", + "HCLK_VFRAME_CK_IN8" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN9", + "HCLK_VFRAME_CK_IN9" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN10", + "HCLK_VFRAME_CK_IN10" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN11", + "HCLK_VFRAME_CK_IN11" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN12", + "HCLK_VFRAME_CK_IN12" + ], + [ + "HCLK_FEEDTHRU_1_CK_IN13", + "HCLK_VFRAME_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_FEEDTHRU_2", + "HCLK_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK0", + "HCLK_FEEDTHRU_2_CK_BUFHCLK0" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK1", + "HCLK_FEEDTHRU_2_CK_BUFHCLK1" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK2", + "HCLK_FEEDTHRU_2_CK_BUFHCLK2" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK3", + "HCLK_FEEDTHRU_2_CK_BUFHCLK3" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK4", + "HCLK_FEEDTHRU_2_CK_BUFHCLK4" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK5", + "HCLK_FEEDTHRU_2_CK_BUFHCLK5" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK6", + "HCLK_FEEDTHRU_2_CK_BUFHCLK6" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK7", + "HCLK_FEEDTHRU_2_CK_BUFHCLK7" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK8", + "HCLK_FEEDTHRU_2_CK_BUFHCLK8" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK9", + "HCLK_FEEDTHRU_2_CK_BUFHCLK9" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK10", + "HCLK_FEEDTHRU_2_CK_BUFHCLK10" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFHCLK11", + "HCLK_FEEDTHRU_2_CK_BUFHCLK11" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFRCLK0", + "HCLK_FEEDTHRU_2_CK_BUFRCLK0" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFRCLK1", + "HCLK_FEEDTHRU_2_CK_BUFRCLK1" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFRCLK2", + "HCLK_FEEDTHRU_2_CK_BUFRCLK2" + ], + [ + "HCLK_FEEDTHRU_2_CK_BUFRCLK3", + "HCLK_FEEDTHRU_2_CK_BUFRCLK3" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN0", + "HCLK_FEEDTHRU_2_CK_IN0" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN1", + "HCLK_FEEDTHRU_2_CK_IN1" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN2", + "HCLK_FEEDTHRU_2_CK_IN2" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN3", + "HCLK_FEEDTHRU_2_CK_IN3" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN4", + "HCLK_FEEDTHRU_2_CK_IN4" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN5", + "HCLK_FEEDTHRU_2_CK_IN5" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN6", + "HCLK_FEEDTHRU_2_CK_IN6" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN7", + "HCLK_FEEDTHRU_2_CK_IN7" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN8", + "HCLK_FEEDTHRU_2_CK_IN8" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN9", + "HCLK_FEEDTHRU_2_CK_IN9" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN10", + "HCLK_FEEDTHRU_2_CK_IN10" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN11", + "HCLK_FEEDTHRU_2_CK_IN11" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN12", + "HCLK_FEEDTHRU_2_CK_IN12" + ], + [ + "HCLK_FEEDTHRU_2_CK_IN13", + "HCLK_FEEDTHRU_2_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_FIFO_L", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_FIFO_CCIO0", + "HCLK_INT_INTERFACE_CCIO0" + ], + [ + "HCLK_FIFO_CCIO1", + "HCLK_INT_INTERFACE_CCIO1" + ], + [ + "HCLK_FIFO_CCIO2", + "HCLK_INT_INTERFACE_CCIO2" + ], + [ + "HCLK_FIFO_CCIO3", + "HCLK_INT_INTERFACE_CCIO3" + ], + [ + "HCLK_FIFO_CK_BUFHCLK0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "HCLK_FIFO_CK_BUFHCLK1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "HCLK_FIFO_CK_BUFHCLK2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "HCLK_FIFO_CK_BUFHCLK3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "HCLK_FIFO_CK_BUFHCLK4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "HCLK_FIFO_CK_BUFHCLK5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "HCLK_FIFO_CK_BUFHCLK6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "HCLK_FIFO_CK_BUFHCLK7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "HCLK_FIFO_CK_BUFHCLK8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "HCLK_FIFO_CK_BUFHCLK9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "HCLK_FIFO_CK_BUFHCLK10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "HCLK_FIFO_CK_BUFHCLK11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "HCLK_FIFO_CK_BUFRCLK0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "HCLK_FIFO_CK_BUFRCLK1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "HCLK_FIFO_CK_BUFRCLK2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "HCLK_FIFO_CK_BUFRCLK3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "HCLK_FIFO_PERFCLK0", + "HCLK_INT_INTERFACE_PERFCLK0" + ], + [ + "HCLK_FIFO_PERFCLK1", + "HCLK_INT_INTERFACE_PERFCLK1" + ], + [ + "HCLK_FIFO_PERFCLK2", + "HCLK_INT_INTERFACE_PERFCLK2" + ], + [ + "HCLK_FIFO_PERFCLK3", + "HCLK_INT_INTERFACE_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_FIFO_L", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_FIFO_CCIO0", + "HCLK_INT_INTERFACE_CCIO0" + ], + [ + "HCLK_FIFO_CCIO1", + "HCLK_INT_INTERFACE_CCIO1" + ], + [ + "HCLK_FIFO_CCIO2", + "HCLK_INT_INTERFACE_CCIO2" + ], + [ + "HCLK_FIFO_CCIO3", + "HCLK_INT_INTERFACE_CCIO3" + ], + [ + "HCLK_FIFO_CK_BUFHCLK0", + "HCLK_INT_INTERFACE_CK_BUFHCLK0" + ], + [ + "HCLK_FIFO_CK_BUFHCLK1", + "HCLK_INT_INTERFACE_CK_BUFHCLK1" + ], + [ + "HCLK_FIFO_CK_BUFHCLK2", + "HCLK_INT_INTERFACE_CK_BUFHCLK2" + ], + [ + "HCLK_FIFO_CK_BUFHCLK3", + "HCLK_INT_INTERFACE_CK_BUFHCLK3" + ], + [ + "HCLK_FIFO_CK_BUFHCLK4", + "HCLK_INT_INTERFACE_CK_BUFHCLK4" + ], + [ + "HCLK_FIFO_CK_BUFHCLK5", + "HCLK_INT_INTERFACE_CK_BUFHCLK5" + ], + [ + "HCLK_FIFO_CK_BUFHCLK6", + "HCLK_INT_INTERFACE_CK_BUFHCLK6" + ], + [ + "HCLK_FIFO_CK_BUFHCLK7", + "HCLK_INT_INTERFACE_CK_BUFHCLK7" + ], + [ + "HCLK_FIFO_CK_BUFHCLK8", + "HCLK_INT_INTERFACE_CK_BUFHCLK8" + ], + [ + "HCLK_FIFO_CK_BUFHCLK9", + "HCLK_INT_INTERFACE_CK_BUFHCLK9" + ], + [ + "HCLK_FIFO_CK_BUFHCLK10", + "HCLK_INT_INTERFACE_CK_BUFHCLK10" + ], + [ + "HCLK_FIFO_CK_BUFHCLK11", + "HCLK_INT_INTERFACE_CK_BUFHCLK11" + ], + [ + "HCLK_FIFO_CK_BUFRCLK0", + "HCLK_INT_INTERFACE_CK_BUFRCLK0" + ], + [ + "HCLK_FIFO_CK_BUFRCLK1", + "HCLK_INT_INTERFACE_CK_BUFRCLK1" + ], + [ + "HCLK_FIFO_CK_BUFRCLK2", + "HCLK_INT_INTERFACE_CK_BUFRCLK2" + ], + [ + "HCLK_FIFO_CK_BUFRCLK3", + "HCLK_INT_INTERFACE_CK_BUFRCLK3" + ], + [ + "HCLK_FIFO_PERFCLK0", + "HCLK_INT_INTERFACE_PERFCLK0" + ], + [ + "HCLK_FIFO_PERFCLK1", + "HCLK_INT_INTERFACE_PERFCLK1" + ], + [ + "HCLK_FIFO_PERFCLK2", + "HCLK_INT_INTERFACE_PERFCLK2" + ], + [ + "HCLK_FIFO_PERFCLK3", + "HCLK_INT_INTERFACE_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_GTX", + "HCLK_INT_INTERFACE" + ], + "wire_pairs": [ + [ + "HCLK_GTX_CK_IN4", + "HCLK_INT_INTERFACE_CK_IN4" + ], + [ + "HCLK_GTX_CK_IN5", + "HCLK_INT_INTERFACE_CK_IN5" + ], + [ + "HCLK_GTX_CK_IN6", + "HCLK_INT_INTERFACE_CK_IN6" + ], + [ + "HCLK_GTX_CK_IN7", + "HCLK_INT_INTERFACE_CK_IN7" + ], + [ + "HCLK_GTX_CK_IN8", + "HCLK_INT_INTERFACE_CK_IN8" + ], + [ + "HCLK_GTX_CK_IN9", + "HCLK_INT_INTERFACE_CK_IN9" + ], + [ + "HCLK_GTX_CK_IN10", + "HCLK_INT_INTERFACE_CK_IN10" + ], + [ + "HCLK_GTX_CK_IN11", + "HCLK_INT_INTERFACE_CK_IN11" + ], + [ + "HCLK_GTX_CK_IN12", + "HCLK_INT_INTERFACE_CK_IN12" + ], + [ + "HCLK_GTX_CK_IN13", + "HCLK_INT_INTERFACE_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_GTX", + "HCLK_TERM_GTX" + ], + "wire_pairs": [ + [ + "HCLK_GTX_CK_IN4", + "HCLK_TERM_GTX_CK_IN4" + ], + [ + "HCLK_GTX_CK_IN5", + "HCLK_TERM_GTX_CK_IN5" + ], + [ + "HCLK_GTX_CK_IN6", + "HCLK_TERM_GTX_CK_IN6" + ], + [ + "HCLK_GTX_CK_IN7", + "HCLK_TERM_GTX_CK_IN7" + ], + [ + "HCLK_GTX_CK_IN8", + "HCLK_TERM_GTX_CK_IN8" + ], + [ + "HCLK_GTX_CK_IN9", + "HCLK_TERM_GTX_CK_IN9" + ], + [ + "HCLK_GTX_CK_IN10", + "HCLK_TERM_GTX_CK_IN10" + ], + [ + "HCLK_GTX_CK_IN11", + "HCLK_TERM_GTX_CK_IN11" + ], + [ + "HCLK_GTX_CK_IN12", + "HCLK_TERM_GTX_CK_IN12" + ], + [ + "HCLK_GTX_CK_IN13", + "HCLK_TERM_GTX_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_INT_INTERFACE", + "HCLK_L" + ], + "wire_pairs": [ + [ + "HCLK_INT_INTERFACE_CCIO0", + "HCLK_CCIO0" + ], + [ + "HCLK_INT_INTERFACE_CCIO1", + "HCLK_CCIO1" + ], + [ + "HCLK_INT_INTERFACE_CCIO2", + "HCLK_CCIO2" + ], + [ + "HCLK_INT_INTERFACE_CCIO3", + "HCLK_CCIO3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK0", + "HCLK_CK_BUFRCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK1", + "HCLK_CK_BUFRCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK2", + "HCLK_CK_BUFRCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK3", + "HCLK_CK_BUFRCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_IN0", + "HCLK_CK_IN0" + ], + [ + "HCLK_INT_INTERFACE_CK_IN1", + "HCLK_CK_IN1" + ], + [ + "HCLK_INT_INTERFACE_CK_IN2", + "HCLK_CK_IN2" + ], + [ + "HCLK_INT_INTERFACE_CK_IN3", + "HCLK_CK_IN3" + ], + [ + "HCLK_INT_INTERFACE_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_INT_INTERFACE_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_INT_INTERFACE_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_INT_INTERFACE_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_INT_INTERFACE_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_INT_INTERFACE_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_INT_INTERFACE_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_INT_INTERFACE_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_INT_INTERFACE_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_INT_INTERFACE_CK_IN13", + "HCLK_CK_IN13" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK0", + "HCLK_INT_PERFCLK0" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK1", + "HCLK_INT_PERFCLK1" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK2", + "HCLK_INT_PERFCLK2" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK3", + "HCLK_INT_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_INT_INTERFACE", + "HCLK_R" + ], + "wire_pairs": [ + [ + "HCLK_INT_INTERFACE_CCIO0", + "HCLK_CCIO0" + ], + [ + "HCLK_INT_INTERFACE_CCIO1", + "HCLK_CCIO1" + ], + [ + "HCLK_INT_INTERFACE_CCIO2", + "HCLK_CCIO2" + ], + [ + "HCLK_INT_INTERFACE_CCIO3", + "HCLK_CCIO3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK0", + "HCLK_CK_BUFRCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK1", + "HCLK_CK_BUFRCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK2", + "HCLK_CK_BUFRCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK3", + "HCLK_CK_BUFRCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_IN0", + "HCLK_CK_IN0" + ], + [ + "HCLK_INT_INTERFACE_CK_IN1", + "HCLK_CK_IN1" + ], + [ + "HCLK_INT_INTERFACE_CK_IN2", + "HCLK_CK_IN2" + ], + [ + "HCLK_INT_INTERFACE_CK_IN3", + "HCLK_CK_IN3" + ], + [ + "HCLK_INT_INTERFACE_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_INT_INTERFACE_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_INT_INTERFACE_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_INT_INTERFACE_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_INT_INTERFACE_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_INT_INTERFACE_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_INT_INTERFACE_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_INT_INTERFACE_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_INT_INTERFACE_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_INT_INTERFACE_CK_IN13", + "HCLK_CK_IN13" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK0", + "HCLK_INT_PERFCLK0" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK1", + "HCLK_INT_PERFCLK1" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK2", + "HCLK_INT_PERFCLK2" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK3", + "HCLK_INT_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_INT_INTERFACE", + "HCLK_TERM" + ], + "wire_pairs": [ + [ + "HCLK_INT_INTERFACE_CCIO0", + "HCLK_TERM_CCIO0" + ], + [ + "HCLK_INT_INTERFACE_CCIO1", + "HCLK_TERM_CCIO1" + ], + [ + "HCLK_INT_INTERFACE_CCIO2", + "HCLK_TERM_CCIO2" + ], + [ + "HCLK_INT_INTERFACE_CCIO3", + "HCLK_TERM_CCIO3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK0", + "HCLK_TERM_CK_BUFHCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK1", + "HCLK_TERM_CK_BUFHCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK2", + "HCLK_TERM_CK_BUFHCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK3", + "HCLK_TERM_CK_BUFHCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK4", + "HCLK_TERM_CK_BUFHCLK4" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK5", + "HCLK_TERM_CK_BUFHCLK5" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK6", + "HCLK_TERM_CK_BUFHCLK6" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK7", + "HCLK_TERM_CK_BUFHCLK7" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK8", + "HCLK_TERM_CK_BUFHCLK8" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK9", + "HCLK_TERM_CK_BUFHCLK9" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK10", + "HCLK_TERM_CK_BUFHCLK10" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK11", + "HCLK_TERM_CK_BUFHCLK11" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK0", + "HCLK_TERM_CK_BUFRCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK1", + "HCLK_TERM_CK_BUFRCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK2", + "HCLK_TERM_CK_BUFRCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK3", + "HCLK_TERM_CK_BUFRCLK3" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK0", + "HCLK_TERM_PERFCLK0" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK1", + "HCLK_TERM_PERFCLK1" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK2", + "HCLK_TERM_PERFCLK2" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK3", + "HCLK_TERM_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_INT_INTERFACE", + "HCLK_TERM" + ], + "wire_pairs": [ + [ + "HCLK_INT_INTERFACE_CCIO0", + "HCLK_TERM_CCIO0" + ], + [ + "HCLK_INT_INTERFACE_CCIO1", + "HCLK_TERM_CCIO1" + ], + [ + "HCLK_INT_INTERFACE_CCIO2", + "HCLK_TERM_CCIO2" + ], + [ + "HCLK_INT_INTERFACE_CCIO3", + "HCLK_TERM_CCIO3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK0", + "HCLK_TERM_CK_BUFHCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK1", + "HCLK_TERM_CK_BUFHCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK2", + "HCLK_TERM_CK_BUFHCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK3", + "HCLK_TERM_CK_BUFHCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK4", + "HCLK_TERM_CK_BUFHCLK4" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK5", + "HCLK_TERM_CK_BUFHCLK5" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK6", + "HCLK_TERM_CK_BUFHCLK6" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK7", + "HCLK_TERM_CK_BUFHCLK7" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK8", + "HCLK_TERM_CK_BUFHCLK8" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK9", + "HCLK_TERM_CK_BUFHCLK9" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK10", + "HCLK_TERM_CK_BUFHCLK10" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK11", + "HCLK_TERM_CK_BUFHCLK11" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK0", + "HCLK_TERM_CK_BUFRCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK1", + "HCLK_TERM_CK_BUFRCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK2", + "HCLK_TERM_CK_BUFRCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK3", + "HCLK_TERM_CK_BUFRCLK3" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK0", + "HCLK_TERM_PERFCLK0" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK1", + "HCLK_TERM_PERFCLK1" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK2", + "HCLK_TERM_PERFCLK2" + ], + [ + "HCLK_INT_INTERFACE_PERFCLK3", + "HCLK_TERM_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_INT_INTERFACE", + "HCLK_VFRAME" + ], + "wire_pairs": [ + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK0", + "HCLK_VFRAME_CK_BUFHCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK1", + "HCLK_VFRAME_CK_BUFHCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK2", + "HCLK_VFRAME_CK_BUFHCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK3", + "HCLK_VFRAME_CK_BUFHCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK4", + "HCLK_VFRAME_CK_BUFHCLK4" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK5", + "HCLK_VFRAME_CK_BUFHCLK5" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK6", + "HCLK_VFRAME_CK_BUFHCLK6" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK7", + "HCLK_VFRAME_CK_BUFHCLK7" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK8", + "HCLK_VFRAME_CK_BUFHCLK8" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK9", + "HCLK_VFRAME_CK_BUFHCLK9" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK10", + "HCLK_VFRAME_CK_BUFHCLK10" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFHCLK11", + "HCLK_VFRAME_CK_BUFHCLK11" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK0", + "HCLK_VFRAME_CK_BUFRCLK0" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK1", + "HCLK_VFRAME_CK_BUFRCLK1" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK2", + "HCLK_VFRAME_CK_BUFRCLK2" + ], + [ + "HCLK_INT_INTERFACE_CK_BUFRCLK3", + "HCLK_VFRAME_CK_BUFRCLK3" + ], + [ + "HCLK_INT_INTERFACE_CK_IN0", + "HCLK_VFRAME_CK_IN0" + ], + [ + "HCLK_INT_INTERFACE_CK_IN1", + "HCLK_VFRAME_CK_IN1" + ], + [ + "HCLK_INT_INTERFACE_CK_IN2", + "HCLK_VFRAME_CK_IN2" + ], + [ + "HCLK_INT_INTERFACE_CK_IN3", + "HCLK_VFRAME_CK_IN3" + ], + [ + "HCLK_INT_INTERFACE_CK_IN4", + "HCLK_VFRAME_CK_IN4" + ], + [ + "HCLK_INT_INTERFACE_CK_IN5", + "HCLK_VFRAME_CK_IN5" + ], + [ + "HCLK_INT_INTERFACE_CK_IN6", + "HCLK_VFRAME_CK_IN6" + ], + [ + "HCLK_INT_INTERFACE_CK_IN7", + "HCLK_VFRAME_CK_IN7" + ], + [ + "HCLK_INT_INTERFACE_CK_IN8", + "HCLK_VFRAME_CK_IN8" + ], + [ + "HCLK_INT_INTERFACE_CK_IN9", + "HCLK_VFRAME_CK_IN9" + ], + [ + "HCLK_INT_INTERFACE_CK_IN10", + "HCLK_VFRAME_CK_IN10" + ], + [ + "HCLK_INT_INTERFACE_CK_IN11", + "HCLK_VFRAME_CK_IN11" + ], + [ + "HCLK_INT_INTERFACE_CK_IN12", + "HCLK_VFRAME_CK_IN12" + ], + [ + "HCLK_INT_INTERFACE_CK_IN13", + "HCLK_VFRAME_CK_IN13" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_IOB", + "HCLK_IOI3" + ], + "wire_pairs": [ + [ + "HCLK_IOB_CK_BUFHCLK0", + "HCLK_IOI_CK_BUFHCLK0" + ], + [ + "HCLK_IOB_CK_BUFHCLK1", + "HCLK_IOI_CK_BUFHCLK1" + ], + [ + "HCLK_IOB_CK_BUFHCLK2", + "HCLK_IOI_CK_BUFHCLK2" + ], + [ + "HCLK_IOB_CK_BUFHCLK3", + "HCLK_IOI_CK_BUFHCLK3" + ], + [ + "HCLK_IOB_CK_BUFHCLK4", + "HCLK_IOI_CK_BUFHCLK4" + ], + [ + "HCLK_IOB_CK_BUFHCLK5", + "HCLK_IOI_CK_BUFHCLK5" + ], + [ + "HCLK_IOB_CK_BUFHCLK6", + "HCLK_IOI_CK_BUFHCLK6" + ], + [ + "HCLK_IOB_CK_BUFHCLK7", + "HCLK_IOI_CK_BUFHCLK7" + ], + [ + "HCLK_IOB_CK_BUFHCLK8", + "HCLK_IOI_CK_BUFHCLK8" + ], + [ + "HCLK_IOB_CK_BUFHCLK9", + "HCLK_IOI_CK_BUFHCLK9" + ], + [ + "HCLK_IOB_CK_BUFHCLK10", + "HCLK_IOI_CK_BUFHCLK10" + ], + [ + "HCLK_IOB_CK_BUFHCLK11", + "HCLK_IOI_CK_BUFHCLK11" + ], + [ + "HCLK_IOB_CK_BUFRCLK0", + "HCLK_IOI_CK_BUFRCLK0" + ], + [ + "HCLK_IOB_CK_BUFRCLK1", + "HCLK_IOI_CK_BUFRCLK1" + ], + [ + "HCLK_IOB_CK_BUFRCLK2", + "HCLK_IOI_CK_BUFRCLK2" + ], + [ + "HCLK_IOB_CK_BUFRCLK3", + "HCLK_IOI_CK_BUFRCLK3" + ], + [ + "HCLK_IOB_PERFCLK0", + "HCLK_IOI_IOCLK_PLL0" + ], + [ + "HCLK_IOB_PERFCLK1", + "HCLK_IOI_IOCLK_PLL1" + ], + [ + "HCLK_IOB_PERFCLK2", + "HCLK_IOI_IOCLK_PLL2" + ], + [ + "HCLK_IOB_PERFCLK3", + "HCLK_IOI_IOCLK_PLL3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_IOB", + "HCLK_IOI3" + ], + "wire_pairs": [ + [ + "HCLK_IOB_CK_BUFHCLK0", + "HCLK_IOI_CK_BUFHCLK0" + ], + [ + "HCLK_IOB_CK_BUFHCLK1", + "HCLK_IOI_CK_BUFHCLK1" + ], + [ + "HCLK_IOB_CK_BUFHCLK2", + "HCLK_IOI_CK_BUFHCLK2" + ], + [ + "HCLK_IOB_CK_BUFHCLK3", + "HCLK_IOI_CK_BUFHCLK3" + ], + [ + "HCLK_IOB_CK_BUFHCLK4", + "HCLK_IOI_CK_BUFHCLK4" + ], + [ + "HCLK_IOB_CK_BUFHCLK5", + "HCLK_IOI_CK_BUFHCLK5" + ], + [ + "HCLK_IOB_CK_BUFHCLK6", + "HCLK_IOI_CK_BUFHCLK6" + ], + [ + "HCLK_IOB_CK_BUFHCLK7", + "HCLK_IOI_CK_BUFHCLK7" + ], + [ + "HCLK_IOB_CK_BUFHCLK8", + "HCLK_IOI_CK_BUFHCLK8" + ], + [ + "HCLK_IOB_CK_BUFHCLK9", + "HCLK_IOI_CK_BUFHCLK9" + ], + [ + "HCLK_IOB_CK_BUFHCLK10", + "HCLK_IOI_CK_BUFHCLK10" + ], + [ + "HCLK_IOB_CK_BUFHCLK11", + "HCLK_IOI_CK_BUFHCLK11" + ], + [ + "HCLK_IOB_CK_BUFRCLK0", + "HCLK_IOI_CK_BUFRCLK0" + ], + [ + "HCLK_IOB_CK_BUFRCLK1", + "HCLK_IOI_CK_BUFRCLK1" + ], + [ + "HCLK_IOB_CK_BUFRCLK2", + "HCLK_IOI_CK_BUFRCLK2" + ], + [ + "HCLK_IOB_CK_BUFRCLK3", + "HCLK_IOI_CK_BUFRCLK3" + ], + [ + "HCLK_IOB_PERFCLK0", + "HCLK_IOI_IOCLK_PLL0" + ], + [ + "HCLK_IOB_PERFCLK1", + "HCLK_IOI_IOCLK_PLL1" + ], + [ + "HCLK_IOB_PERFCLK2", + "HCLK_IOI_IOCLK_PLL2" + ], + [ + "HCLK_IOB_PERFCLK3", + "HCLK_IOI_IOCLK_PLL3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "HCLK_IOI3", + "HCLK_TERM" + ], + "wire_pairs": [ + [ + "HCLK_IOI_CK_BUFHCLK0", + "HCLK_TERM_CK_BUFHCLK0" + ], + [ + "HCLK_IOI_CK_BUFHCLK1", + "HCLK_TERM_CK_BUFHCLK1" + ], + [ + "HCLK_IOI_CK_BUFHCLK2", + "HCLK_TERM_CK_BUFHCLK2" + ], + [ + "HCLK_IOI_CK_BUFHCLK3", + "HCLK_TERM_CK_BUFHCLK3" + ], + [ + "HCLK_IOI_CK_BUFHCLK4", + "HCLK_TERM_CK_BUFHCLK4" + ], + [ + "HCLK_IOI_CK_BUFHCLK5", + "HCLK_TERM_CK_BUFHCLK5" + ], + [ + "HCLK_IOI_CK_BUFHCLK6", + "HCLK_TERM_CK_BUFHCLK6" + ], + [ + "HCLK_IOI_CK_BUFHCLK7", + "HCLK_TERM_CK_BUFHCLK7" + ], + [ + "HCLK_IOI_CK_BUFHCLK8", + "HCLK_TERM_CK_BUFHCLK8" + ], + [ + "HCLK_IOI_CK_BUFHCLK9", + "HCLK_TERM_CK_BUFHCLK9" + ], + [ + "HCLK_IOI_CK_BUFHCLK10", + "HCLK_TERM_CK_BUFHCLK10" + ], + [ + "HCLK_IOI_CK_BUFHCLK11", + "HCLK_TERM_CK_BUFHCLK11" + ], + [ + "HCLK_IOI_CK_BUFRCLK0", + "HCLK_TERM_CK_BUFRCLK0" + ], + [ + "HCLK_IOI_CK_BUFRCLK1", + "HCLK_TERM_CK_BUFRCLK1" + ], + [ + "HCLK_IOI_CK_BUFRCLK2", + "HCLK_TERM_CK_BUFRCLK2" + ], + [ + "HCLK_IOI_CK_BUFRCLK3", + "HCLK_TERM_CK_BUFRCLK3" + ], + [ + "HCLK_IOI_I2IOCLK_BOT0", + "HCLK_TERM_CCIO2" + ], + [ + "HCLK_IOI_I2IOCLK_BOT1", + "HCLK_TERM_CCIO3" + ], + [ + "HCLK_IOI_I2IOCLK_TOP0", + "HCLK_TERM_CCIO0" + ], + [ + "HCLK_IOI_I2IOCLK_TOP1", + "HCLK_TERM_CCIO1" + ], + [ + "HCLK_IOI_IOCLK_PLL0", + "HCLK_TERM_PERFCLK0" + ], + [ + "HCLK_IOI_IOCLK_PLL1", + "HCLK_TERM_PERFCLK1" + ], + [ + "HCLK_IOI_IOCLK_PLL2", + "HCLK_TERM_PERFCLK2" + ], + [ + "HCLK_IOI_IOCLK_PLL3", + "HCLK_TERM_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_IOI3", + "HCLK_TERM" + ], + "wire_pairs": [ + [ + "HCLK_IOI_CK_BUFHCLK0", + "HCLK_TERM_CK_BUFHCLK0" + ], + [ + "HCLK_IOI_CK_BUFHCLK1", + "HCLK_TERM_CK_BUFHCLK1" + ], + [ + "HCLK_IOI_CK_BUFHCLK2", + "HCLK_TERM_CK_BUFHCLK2" + ], + [ + "HCLK_IOI_CK_BUFHCLK3", + "HCLK_TERM_CK_BUFHCLK3" + ], + [ + "HCLK_IOI_CK_BUFHCLK4", + "HCLK_TERM_CK_BUFHCLK4" + ], + [ + "HCLK_IOI_CK_BUFHCLK5", + "HCLK_TERM_CK_BUFHCLK5" + ], + [ + "HCLK_IOI_CK_BUFHCLK6", + "HCLK_TERM_CK_BUFHCLK6" + ], + [ + "HCLK_IOI_CK_BUFHCLK7", + "HCLK_TERM_CK_BUFHCLK7" + ], + [ + "HCLK_IOI_CK_BUFHCLK8", + "HCLK_TERM_CK_BUFHCLK8" + ], + [ + "HCLK_IOI_CK_BUFHCLK9", + "HCLK_TERM_CK_BUFHCLK9" + ], + [ + "HCLK_IOI_CK_BUFHCLK10", + "HCLK_TERM_CK_BUFHCLK10" + ], + [ + "HCLK_IOI_CK_BUFHCLK11", + "HCLK_TERM_CK_BUFHCLK11" + ], + [ + "HCLK_IOI_CK_BUFRCLK0", + "HCLK_TERM_CK_BUFRCLK0" + ], + [ + "HCLK_IOI_CK_BUFRCLK1", + "HCLK_TERM_CK_BUFRCLK1" + ], + [ + "HCLK_IOI_CK_BUFRCLK2", + "HCLK_TERM_CK_BUFRCLK2" + ], + [ + "HCLK_IOI_CK_BUFRCLK3", + "HCLK_TERM_CK_BUFRCLK3" + ], + [ + "HCLK_IOI_I2IOCLK_BOT0", + "HCLK_TERM_CCIO2" + ], + [ + "HCLK_IOI_I2IOCLK_BOT1", + "HCLK_TERM_CCIO3" + ], + [ + "HCLK_IOI_I2IOCLK_TOP0", + "HCLK_TERM_CCIO0" + ], + [ + "HCLK_IOI_I2IOCLK_TOP1", + "HCLK_TERM_CCIO1" + ], + [ + "HCLK_IOI_IOCLK_PLL0", + "HCLK_TERM_PERFCLK0" + ], + [ + "HCLK_IOI_IOCLK_PLL1", + "HCLK_TERM_PERFCLK1" + ], + [ + "HCLK_IOI_IOCLK_PLL2", + "HCLK_TERM_PERFCLK2" + ], + [ + "HCLK_IOI_IOCLK_PLL3", + "HCLK_TERM_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "HCLK_IOI3", + "LIOI3" + ], + "wire_pairs": [ + [ + "HCLK_IOI_I2IOCLK_TOP0", + "LIOI_I2GCLK_TOP0" + ], + [ + "HCLK_IOI_I2IOCLK_TOP1", + "LIOI_I2GCLK_TOP1" + ], + [ + "HCLK_IOI_IDELAYCTRL_DNPULSEOUT", + "IOI_IDELAYCTRL_DNPULSEOUT" + ], + [ + "HCLK_IOI_IDELAYCTRL_RST", + "IOI_IDELAYCTRL_RST" + ], + [ + "HCLK_IOI_IDELAYCTRL_UPPULSEOUT", + "IOI_IDELAYCTRL_UPPULSEOUT" + ], + [ + "HCLK_IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "HCLK_IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "HCLK_IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "HCLK_IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP0", + "IOI_LEAF_GCLK0" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP1", + "IOI_LEAF_GCLK1" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP2", + "IOI_LEAF_GCLK2" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP3", + "IOI_LEAF_GCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP4", + "IOI_LEAF_GCLK4" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP5", + "IOI_LEAF_GCLK5" + ], + [ + "HCLK_IOI_RCLK2IO0", + "IOI_RCLK_FORIO0" + ], + [ + "HCLK_IOI_RCLK2IO1", + "IOI_RCLK_FORIO1" + ], + [ + "HCLK_IOI_RCLK2IO2", + "IOI_RCLK_FORIO2" + ], + [ + "HCLK_IOI_RCLK2IO3", + "IOI_RCLK_FORIO3" + ], + [ + "HCLK_IOI_RCLK_IMUX0", + "IOI_IMUX_RC0" + ], + [ + "HCLK_IOI_RCLK_IMUX1", + "IOI_IMUX_RC1" + ], + [ + "HCLK_RCLK_DIV_CE0", + "IOI_RCLK_DIV_CE0" + ], + [ + "HCLK_RCLK_DIV_CE1", + "IOI_RCLK_DIV_CE1" + ], + [ + "HCLK_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0" + ], + [ + "HCLK_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "HCLK_IOI3", + "LIOI3" + ], + "wire_pairs": [ + [ + "HCLK_IOI_I2IOCLK_BOT0", + "LIOI_I2GCLK_BOT1" + ], + [ + "HCLK_IOI_I2IOCLK_BOT1", + "LIOI_I2GCLK_TOP0" + ], + [ + "HCLK_IOI_IDELAYCTRL_OUTN1", + "IOI_IDELAYCTRL_OUTN1" + ], + [ + "HCLK_IOI_IDELAYCTRL_OUTN65", + "IOI_IDELAYCTRL_OUTN65" + ], + [ + "HCLK_IOI_IDELAYCTRL_RDY", + "IOI_IDELAYCTRL_RDY" + ], + [ + "HCLK_IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "HCLK_IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "HCLK_IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "HCLK_IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT0", + "IOI_LEAF_GCLK0" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT1", + "IOI_LEAF_GCLK1" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT2", + "IOI_LEAF_GCLK2" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT3", + "IOI_LEAF_GCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT4", + "IOI_LEAF_GCLK4" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT5", + "IOI_LEAF_GCLK5" + ], + [ + "HCLK_IOI_RCLK2IO0", + "IOI_RCLK_FORIO0" + ], + [ + "HCLK_IOI_RCLK2IO1", + "IOI_RCLK_FORIO1" + ], + [ + "HCLK_IOI_RCLK2IO2", + "IOI_RCLK_FORIO2" + ], + [ + "HCLK_IOI_RCLK2IO3", + "IOI_RCLK_FORIO3" + ], + [ + "HCLK_IOI_RCLK_IMUX2", + "IOI_IMUX_RC2" + ], + [ + "HCLK_IOI_RCLK_IMUX3", + "IOI_IMUX_RC3" + ], + [ + "HCLK_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2" + ], + [ + "HCLK_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3" + ], + [ + "HCLK_RCLK_DIV_CLR2", + "IOI_RCLK_DIV_CLR2" + ], + [ + "HCLK_RCLK_DIV_CLR3", + "IOI_RCLK_DIV_CLR3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "HCLK_IOI3", + "RIOI3" + ], + "wire_pairs": [ + [ + "HCLK_IOI_I2IOCLK_TOP0", + "RIOI_I2GCLK_TOP0" + ], + [ + "HCLK_IOI_I2IOCLK_TOP1", + "RIOI_I2GCLK_TOP1" + ], + [ + "HCLK_IOI_IDELAYCTRL_DNPULSEOUT", + "IOI_IDELAYCTRL_DNPULSEOUT" + ], + [ + "HCLK_IOI_IDELAYCTRL_RST", + "IOI_IDELAYCTRL_RST" + ], + [ + "HCLK_IOI_IDELAYCTRL_UPPULSEOUT", + "IOI_IDELAYCTRL_UPPULSEOUT" + ], + [ + "HCLK_IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "HCLK_IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "HCLK_IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "HCLK_IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP0", + "IOI_LEAF_GCLK0" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP1", + "IOI_LEAF_GCLK1" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP2", + "IOI_LEAF_GCLK2" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP3", + "IOI_LEAF_GCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP4", + "IOI_LEAF_GCLK4" + ], + [ + "HCLK_IOI_LEAF_GCLK_TOP5", + "IOI_LEAF_GCLK5" + ], + [ + "HCLK_IOI_RCLK2IO0", + "IOI_RCLK_FORIO0" + ], + [ + "HCLK_IOI_RCLK2IO1", + "IOI_RCLK_FORIO1" + ], + [ + "HCLK_IOI_RCLK2IO2", + "IOI_RCLK_FORIO2" + ], + [ + "HCLK_IOI_RCLK2IO3", + "IOI_RCLK_FORIO3" + ], + [ + "HCLK_IOI_RCLK_IMUX0", + "IOI_IMUX_RC0" + ], + [ + "HCLK_IOI_RCLK_IMUX1", + "IOI_IMUX_RC1" + ], + [ + "HCLK_RCLK_DIV_CE0", + "IOI_RCLK_DIV_CE0" + ], + [ + "HCLK_RCLK_DIV_CE1", + "IOI_RCLK_DIV_CE1" + ], + [ + "HCLK_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0" + ], + [ + "HCLK_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "HCLK_IOI3", + "RIOI3" + ], + "wire_pairs": [ + [ + "HCLK_IOI_I2IOCLK_BOT0", + "RIOI_I2GCLK_BOT1" + ], + [ + "HCLK_IOI_I2IOCLK_BOT1", + "RIOI_I2GCLK_TOP0" + ], + [ + "HCLK_IOI_IDELAYCTRL_OUTN1", + "IOI_IDELAYCTRL_OUTN1" + ], + [ + "HCLK_IOI_IDELAYCTRL_OUTN65", + "IOI_IDELAYCTRL_OUTN65" + ], + [ + "HCLK_IOI_IDELAYCTRL_RDY", + "IOI_IDELAYCTRL_RDY" + ], + [ + "HCLK_IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "HCLK_IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "HCLK_IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "HCLK_IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT0", + "IOI_LEAF_GCLK0" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT1", + "IOI_LEAF_GCLK1" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT2", + "IOI_LEAF_GCLK2" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT3", + "IOI_LEAF_GCLK3" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT4", + "IOI_LEAF_GCLK4" + ], + [ + "HCLK_IOI_LEAF_GCLK_BOT5", + "IOI_LEAF_GCLK5" + ], + [ + "HCLK_IOI_RCLK2IO0", + "IOI_RCLK_FORIO0" + ], + [ + "HCLK_IOI_RCLK2IO1", + "IOI_RCLK_FORIO1" + ], + [ + "HCLK_IOI_RCLK2IO2", + "IOI_RCLK_FORIO2" + ], + [ + "HCLK_IOI_RCLK2IO3", + "IOI_RCLK_FORIO3" + ], + [ + "HCLK_IOI_RCLK_IMUX2", + "IOI_IMUX_RC2" + ], + [ + "HCLK_IOI_RCLK_IMUX3", + "IOI_IMUX_RC3" + ], + [ + "HCLK_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2" + ], + [ + "HCLK_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3" + ], + [ + "HCLK_RCLK_DIV_CLR2", + "IOI_RCLK_DIV_CLR2" + ], + [ + "HCLK_RCLK_DIV_CLR3", + "IOI_RCLK_DIV_CLR3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_L", + "HCLK_R" + ], + "wire_pairs": [ + [ + "HCLK_CCIO0", + "HCLK_CCIO0" + ], + [ + "HCLK_CCIO1", + "HCLK_CCIO1" + ], + [ + "HCLK_CCIO2", + "HCLK_CCIO2" + ], + [ + "HCLK_CCIO3", + "HCLK_CCIO3" + ], + [ + "HCLK_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_CK_BUFRCLK0", + "HCLK_CK_BUFRCLK0" + ], + [ + "HCLK_CK_BUFRCLK1", + "HCLK_CK_BUFRCLK1" + ], + [ + "HCLK_CK_BUFRCLK2", + "HCLK_CK_BUFRCLK2" + ], + [ + "HCLK_CK_BUFRCLK3", + "HCLK_CK_BUFRCLK3" + ], + [ + "HCLK_CK_IN0", + "HCLK_CK_IN0" + ], + [ + "HCLK_CK_IN1", + "HCLK_CK_IN1" + ], + [ + "HCLK_CK_IN2", + "HCLK_CK_IN2" + ], + [ + "HCLK_CK_IN3", + "HCLK_CK_IN3" + ], + [ + "HCLK_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_CK_IN13", + "HCLK_CK_IN13" + ], + [ + "HCLK_CK_INOUT_L0", + "HCLK_CK_OUTIN_R4" + ], + [ + "HCLK_CK_INOUT_L1", + "HCLK_CK_OUTIN_R5" + ], + [ + "HCLK_CK_INOUT_L2", + "HCLK_CK_OUTIN_R6" + ], + [ + "HCLK_CK_INOUT_L3", + "HCLK_CK_OUTIN_R7" + ], + [ + "HCLK_CK_INOUT_L4", + "HCLK_CK_OUTIN_R0" + ], + [ + "HCLK_CK_INOUT_L5", + "HCLK_CK_OUTIN_R1" + ], + [ + "HCLK_CK_INOUT_L6", + "HCLK_CK_OUTIN_R2" + ], + [ + "HCLK_CK_INOUT_L7", + "HCLK_CK_OUTIN_R3" + ], + [ + "HCLK_CK_OUTIN_L0", + "HCLK_CK_INOUT_R0" + ], + [ + "HCLK_CK_OUTIN_L1", + "HCLK_CK_INOUT_R1" + ], + [ + "HCLK_CK_OUTIN_L2", + "HCLK_CK_INOUT_R2" + ], + [ + "HCLK_CK_OUTIN_L3", + "HCLK_CK_INOUT_R3" + ], + [ + "HCLK_CK_OUTIN_L4", + "HCLK_CK_INOUT_R4" + ], + [ + "HCLK_CK_OUTIN_L5", + "HCLK_CK_INOUT_R5" + ], + [ + "HCLK_CK_OUTIN_L6", + "HCLK_CK_INOUT_R6" + ], + [ + "HCLK_CK_OUTIN_L7", + "HCLK_CK_INOUT_R7" + ], + [ + "HCLK_INT_PERFCLK0", + "HCLK_INT_PERFCLK0" + ], + [ + "HCLK_INT_PERFCLK1", + "HCLK_INT_PERFCLK1" + ], + [ + "HCLK_INT_PERFCLK2", + "HCLK_INT_PERFCLK2" + ], + [ + "HCLK_INT_PERFCLK3", + "HCLK_INT_PERFCLK3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "HCLK_L", + "INT_L" + ], + "wire_pairs": [ + [ + "HCLK_BYP_BOUNCE2", + "BYP_BOUNCE_N3_2" + ], + [ + "HCLK_BYP_BOUNCE3", + "BYP_BOUNCE_N3_3" + ], + [ + "HCLK_BYP_BOUNCE6", + "BYP_BOUNCE_N3_6" + ], + [ + "HCLK_BYP_BOUNCE7", + "BYP_BOUNCE_N3_7" + ], + [ + "HCLK_EL1BEG3", + "EL1BEG_N3" + ], + [ + "HCLK_EL1END_S3_0", + "EL1END0" + ], + [ + "HCLK_ER1BEG_S0", + "ER1BEG0" + ], + [ + "HCLK_ER1END3", + "ER1END_N3_3" + ], + [ + "HCLK_FAN_BOUNCE_S3_0", + "FAN_BOUNCE0" + ], + [ + "HCLK_FAN_BOUNCE_S3_2", + "FAN_BOUNCE2" + ], + [ + "HCLK_FAN_BOUNCE_S3_4", + "FAN_BOUNCE4" + ], + [ + "HCLK_FAN_BOUNCE_S3_6", + "FAN_BOUNCE6" + ], + [ + "HCLK_LEAF_CLK_B_TOPL0", + "GCLK_L_B6" + ], + [ + "HCLK_LEAF_CLK_B_TOPL1", + "GCLK_L_B7" + ], + [ + "HCLK_LEAF_CLK_B_TOPL2", + "GCLK_L_B8" + ], + [ + "HCLK_LEAF_CLK_B_TOPL3", + "GCLK_L_B9" + ], + [ + "HCLK_LEAF_CLK_B_TOPL4", + "GCLK_L_B10" + ], + [ + "HCLK_LEAF_CLK_B_TOPL5", + "GCLK_L_B11" + ], + [ + "HCLK_LV0", + "LV_L1" + ], + [ + "HCLK_LV1", + "LV_L2" + ], + [ + "HCLK_LV2", + "LV_L3" + ], + [ + "HCLK_LV3", + "LV_L4" + ], + [ + "HCLK_LV4", + "LV_L5" + ], + [ + "HCLK_LV5", + "LV_L6" + ], + [ + "HCLK_LV6", + "LV_L7" + ], + [ + "HCLK_LV7", + "LV_L8" + ], + [ + "HCLK_LV8", + "LV_L9" + ], + [ + "HCLK_LV9", + "LV_L10" + ], + [ + "HCLK_LV10", + "LV_L11" + ], + [ + "HCLK_LV11", + "LV_L12" + ], + [ + "HCLK_LV12", + "LV_L13" + ], + [ + "HCLK_LV13", + "LV_L14" + ], + [ + "HCLK_LV14", + "LV_L15" + ], + [ + "HCLK_LV15", + "LV_L16" + ], + [ + "HCLK_LV16", + "LV_L17" + ], + [ + "HCLK_LV17", + "LV_L18" + ], + [ + "HCLK_LVB1", + "LVB_L1" + ], + [ + "HCLK_LVB2", + "LVB_L2" + ], + [ + "HCLK_LVB3", + "LVB_L3" + ], + [ + "HCLK_LVB4", + "LVB_L4" + ], + [ + "HCLK_LVB5", + "LVB_L5" + ], + [ + "HCLK_LVB6", + "LVB_L6" + ], + [ + "HCLK_LVB7", + "LVB_L7" + ], + [ + "HCLK_LVB8", + "LVB_L8" + ], + [ + "HCLK_LVB9", + "LVB_L9" + ], + [ + "HCLK_LVB10", + "LVB_L10" + ], + [ + "HCLK_LVB11", + "LVB_L11" + ], + [ + "HCLK_LVB12", + "LVB_L12" + ], + [ + "HCLK_NE2BEG0", + "NE2A0" + ], + [ + "HCLK_NE2BEG1", + "NE2A1" + ], + [ + "HCLK_NE2BEG2", + "NE2A2" + ], + [ + "HCLK_NE2BEG3", + "NE2A3" + ], + [ + "HCLK_NE2END_S3_0", + "NE2END0" + ], + [ + "HCLK_NE6A0", + "NE6B0" + ], + [ + "HCLK_NE6A1", + "NE6B1" + ], + [ + "HCLK_NE6A2", + "NE6B2" + ], + [ + "HCLK_NE6A3", + "NE6B3" + ], + [ + "HCLK_NE6B0", + "NE6C0" + ], + [ + "HCLK_NE6B1", + "NE6C1" + ], + [ + "HCLK_NE6B2", + "NE6C2" + ], + [ + "HCLK_NE6B3", + "NE6C3" + ], + [ + "HCLK_NE6C0", + "NE6D0" + ], + [ + "HCLK_NE6C1", + "NE6D1" + ], + [ + "HCLK_NE6C2", + "NE6D2" + ], + [ + "HCLK_NE6C3", + "NE6D3" + ], + [ + "HCLK_NE6D0", + "NE6E0" + ], + [ + "HCLK_NE6D1", + "NE6E1" + ], + [ + "HCLK_NE6D2", + "NE6E2" + ], + [ + "HCLK_NE6D3", + "NE6E3" + ], + [ + "HCLK_NL1BEG0", + "NL1END0" + ], + [ + "HCLK_NL1BEG1", + "NL1END1" + ], + [ + "HCLK_NL1BEG2", + "NL1END2" + ], + [ + "HCLK_NL1END_S3_0", + "NL1END0" + ], + [ + "HCLK_NN2A0", + "NN2END0" + ], + [ + "HCLK_NN2A1", + "NN2END1" + ], + [ + "HCLK_NN2A2", + "NN2END2" + ], + [ + "HCLK_NN2A3", + "NN2END3" + ], + [ + "HCLK_NN2BEG0", + "NN2A0" + ], + [ + "HCLK_NN2BEG1", + "NN2A1" + ], + [ + "HCLK_NN2BEG2", + "NN2A2" + ], + [ + "HCLK_NN2BEG3", + "NN2A3" + ], + [ + "HCLK_NN2END_S2_0", + "NN2END0" + ], + [ + "HCLK_NN6A0", + "NN6B0" + ], + [ + "HCLK_NN6A1", + "NN6B1" + ], + [ + "HCLK_NN6A2", + "NN6B2" + ], + [ + "HCLK_NN6A3", + "NN6B3" + ], + [ + "HCLK_NN6B0", + "NN6C0" + ], + [ + "HCLK_NN6B1", + "NN6C1" + ], + [ + "HCLK_NN6B2", + "NN6C2" + ], + [ + "HCLK_NN6B3", + "NN6C3" + ], + [ + "HCLK_NN6BEG0", + "NN6A0" + ], + [ + "HCLK_NN6BEG1", + "NN6A1" + ], + [ + "HCLK_NN6BEG2", + "NN6A2" + ], + [ + "HCLK_NN6BEG3", + "NN6A3" + ], + [ + "HCLK_NN6C0", + "NN6D0" + ], + [ + "HCLK_NN6C1", + "NN6D1" + ], + [ + "HCLK_NN6C2", + "NN6D2" + ], + [ + "HCLK_NN6C3", + "NN6D3" + ], + [ + "HCLK_NN6D0", + "NN6E0" + ], + [ + "HCLK_NN6D1", + "NN6E1" + ], + [ + "HCLK_NN6D2", + "NN6E2" + ], + [ + "HCLK_NN6D3", + "NN6E3" + ], + [ + "HCLK_NN6E0", + "NN6END0" + ], + [ + "HCLK_NN6E1", + "NN6END1" + ], + [ + "HCLK_NN6E2", + "NN6END2" + ], + [ + "HCLK_NN6E3", + "NN6END3" + ], + [ + "HCLK_NN6END_S1_0", + "NN6END0" + ], + [ + "HCLK_NR1BEG0", + "NR1END0" + ], + [ + "HCLK_NR1BEG1", + "NR1END1" + ], + [ + "HCLK_NR1BEG2", + "NR1END2" + ], + [ + "HCLK_NR1BEG3", + "NR1END3" + ], + [ + "HCLK_NW2A0", + "NW2A0" + ], + [ + "HCLK_NW2A1", + "NW2A1" + ], + [ + "HCLK_NW2A2", + "NW2A2" + ], + [ + "HCLK_NW2A3", + "NW2A3" + ], + [ + "HCLK_NW2END_S0_0", + "NW2END0" + ], + [ + "HCLK_NW6A0", + "NW6B0" + ], + [ + "HCLK_NW6A1", + "NW6B1" + ], + [ + "HCLK_NW6A2", + "NW6B2" + ], + [ + "HCLK_NW6A3", + "NW6B3" + ], + [ + "HCLK_NW6B0", + "NW6C0" + ], + [ + "HCLK_NW6B1", + "NW6C1" + ], + [ + "HCLK_NW6B2", + "NW6C2" + ], + [ + "HCLK_NW6B3", + "NW6C3" + ], + [ + "HCLK_NW6C0", + "NW6D0" + ], + [ + "HCLK_NW6C1", + "NW6D1" + ], + [ + "HCLK_NW6C2", + "NW6D2" + ], + [ + "HCLK_NW6C3", + "NW6D3" + ], + [ + "HCLK_NW6D0", + "NW6E0" + ], + [ + "HCLK_NW6D1", + "NW6E1" + ], + [ + "HCLK_NW6D2", + "NW6E2" + ], + [ + "HCLK_NW6D3", + "NW6E3" + ], + [ + "HCLK_NW6END_S0_0", + "NW6END0" + ], + [ + "HCLK_SE2A0", + "SE2BEG0" + ], + [ + "HCLK_SE2A1", + "SE2BEG1" + ], + [ + "HCLK_SE2A2", + "SE2BEG2" + ], + [ + "HCLK_SE2A3", + "SE2BEG3" + ], + [ + "HCLK_SE6B0", + "SE6A0" + ], + [ + "HCLK_SE6B1", + "SE6A1" + ], + [ + "HCLK_SE6B2", + "SE6A2" + ], + [ + "HCLK_SE6B3", + "SE6A3" + ], + [ + "HCLK_SE6C0", + "SE6B0" + ], + [ + "HCLK_SE6C1", + "SE6B1" + ], + [ + "HCLK_SE6C2", + "SE6B2" + ], + [ + "HCLK_SE6C3", + "SE6B3" + ], + [ + "HCLK_SE6D0", + "SE6C0" + ], + [ + "HCLK_SE6D1", + "SE6C1" + ], + [ + "HCLK_SE6D2", + "SE6C2" + ], + [ + "HCLK_SE6D3", + "SE6C3" + ], + [ + "HCLK_SE6E0", + "SE6D0" + ], + [ + "HCLK_SE6E1", + "SE6D1" + ], + [ + "HCLK_SE6E2", + "SE6D2" + ], + [ + "HCLK_SE6E3", + "SE6D3" + ], + [ + "HCLK_SL1END0", + "SL1BEG0" + ], + [ + "HCLK_SL1END1", + "SL1BEG1" + ], + [ + "HCLK_SL1END2", + "SL1BEG2" + ], + [ + "HCLK_SL1END3", + "SL1BEG3" + ], + [ + "HCLK_SR1BEG3", + "SR1BEG3" + ], + [ + "HCLK_SR1END1", + "SR1BEG1" + ], + [ + "HCLK_SR1END2", + "SR1BEG2" + ], + [ + "HCLK_SR1END_N3_3", + "SR1END_N3_3" + ], + [ + "HCLK_SS2A0", + "SS2BEG0" + ], + [ + "HCLK_SS2A1", + "SS2BEG1" + ], + [ + "HCLK_SS2A2", + "SS2BEG2" + ], + [ + "HCLK_SS2A3", + "SS2A3" + ], + [ + "HCLK_SS2BEG3", + "SS2BEG3" + ], + [ + "HCLK_SS2END0", + "SS2A0" + ], + [ + "HCLK_SS2END1", + "SS2A1" + ], + [ + "HCLK_SS2END2", + "SS2A2" + ], + [ + "HCLK_SS2END_N0_3", + "SS2END_N0_3" + ], + [ + "HCLK_SS6A0", + "SS6BEG0" + ], + [ + "HCLK_SS6A1", + "SS6BEG1" + ], + [ + "HCLK_SS6A2", + "SS6BEG2" + ], + [ + "HCLK_SS6A3", + "SS6BEG3" + ], + [ + "HCLK_SS6B0", + "SS6A0" + ], + [ + "HCLK_SS6B1", + "SS6A1" + ], + [ + "HCLK_SS6B2", + "SS6A2" + ], + [ + "HCLK_SS6B3", + "SS6A3" + ], + [ + "HCLK_SS6C0", + "SS6B0" + ], + [ + "HCLK_SS6C1", + "SS6B1" + ], + [ + "HCLK_SS6C2", + "SS6B2" + ], + [ + "HCLK_SS6C3", + "SS6B3" + ], + [ + "HCLK_SS6D0", + "SS6C0" + ], + [ + "HCLK_SS6D1", + "SS6C1" + ], + [ + "HCLK_SS6D2", + "SS6C2" + ], + [ + "HCLK_SS6D3", + "SS6C3" + ], + [ + "HCLK_SS6E0", + "SS6D0" + ], + [ + "HCLK_SS6E1", + "SS6D1" + ], + [ + "HCLK_SS6E2", + "SS6D2" + ], + [ + "HCLK_SS6E3", + "SS6D3" + ], + [ + "HCLK_SS6END0", + "SS6E0" + ], + [ + "HCLK_SS6END1", + "SS6E1" + ], + [ + "HCLK_SS6END2", + "SS6E2" + ], + [ + "HCLK_SS6END3", + "SS6E3" + ], + [ + "HCLK_SS6END_N0_3", + "SS6END_N0_3" + ], + [ + "HCLK_SW2A3", + "SW2BEG3" + ], + [ + "HCLK_SW2END0", + "SW2BEG0" + ], + [ + "HCLK_SW2END1", + "SW2BEG1" + ], + [ + "HCLK_SW2END2", + "SW2BEG2" + ], + [ + "HCLK_SW2END_N0_3", + "SW2END_N0_3" + ], + [ + "HCLK_SW6B0", + "SW6A0" + ], + [ + "HCLK_SW6B1", + "SW6A1" + ], + [ + "HCLK_SW6B2", + "SW6A2" + ], + [ + "HCLK_SW6B3", + "SW6A3" + ], + [ + "HCLK_SW6C0", + "SW6B0" + ], + [ + "HCLK_SW6C1", + "SW6B1" + ], + [ + "HCLK_SW6C2", + "SW6B2" + ], + [ + "HCLK_SW6C3", + "SW6B3" + ], + [ + "HCLK_SW6D0", + "SW6C0" + ], + [ + "HCLK_SW6D1", + "SW6C1" + ], + [ + "HCLK_SW6D2", + "SW6C2" + ], + [ + "HCLK_SW6D3", + "SW6C3" + ], + [ + "HCLK_SW6E0", + "SW6D0" + ], + [ + "HCLK_SW6E1", + "SW6D1" + ], + [ + "HCLK_SW6E2", + "SW6D2" + ], + [ + "HCLK_SW6E3", + "SW6D3" + ], + [ + "HCLK_SW6END3", + "SW6END_N0_3" + ], + [ + "HCLK_WL1BEG3", + "WL1BEG_N3" + ], + [ + "HCLK_WL1END3", + "WL1END_N1_3" + ], + [ + "HCLK_WR1BEG_S0", + "WR1BEG0" + ], + [ + "HCLK_WR1END_S1_0", + "WR1END0" + ], + [ + "HCLK_WW2END3", + "WW2END_N0_3" + ], + [ + "HCLK_WW4END_S0_0", + "WW4END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "HCLK_L", + "INT_L" + ], + "wire_pairs": [ + [ + "HCLK_BYP_BOUNCE2", + "BYP_BOUNCE2" + ], + [ + "HCLK_BYP_BOUNCE3", + "BYP_BOUNCE3" + ], + [ + "HCLK_BYP_BOUNCE6", + "BYP_BOUNCE6" + ], + [ + "HCLK_BYP_BOUNCE7", + "BYP_BOUNCE7" + ], + [ + "HCLK_EL1BEG3", + "EL1BEG3" + ], + [ + "HCLK_EL1END_S3_0", + "EL1END_S3_0" + ], + [ + "HCLK_ER1BEG_S0", + "ER1BEG_S0" + ], + [ + "HCLK_ER1END3", + "ER1END3" + ], + [ + "HCLK_FAN_BOUNCE_S3_0", + "FAN_BOUNCE_S3_0" + ], + [ + "HCLK_FAN_BOUNCE_S3_2", + "FAN_BOUNCE_S3_2" + ], + [ + "HCLK_FAN_BOUNCE_S3_4", + "FAN_BOUNCE_S3_4" + ], + [ + "HCLK_FAN_BOUNCE_S3_6", + "FAN_BOUNCE_S3_6" + ], + [ + "HCLK_LEAF_CLK_B_BOTL0", + "GCLK_L_B6" + ], + [ + "HCLK_LEAF_CLK_B_BOTL1", + "GCLK_L_B7" + ], + [ + "HCLK_LEAF_CLK_B_BOTL2", + "GCLK_L_B8" + ], + [ + "HCLK_LEAF_CLK_B_BOTL3", + "GCLK_L_B9" + ], + [ + "HCLK_LEAF_CLK_B_BOTL4", + "GCLK_L_B10" + ], + [ + "HCLK_LEAF_CLK_B_BOTL5", + "GCLK_L_B11" + ], + [ + "HCLK_LV0", + "LV_L0" + ], + [ + "HCLK_LV1", + "LV_L1" + ], + [ + "HCLK_LV2", + "LV_L2" + ], + [ + "HCLK_LV3", + "LV_L3" + ], + [ + "HCLK_LV4", + "LV_L4" + ], + [ + "HCLK_LV5", + "LV_L5" + ], + [ + "HCLK_LV6", + "LV_L6" + ], + [ + "HCLK_LV7", + "LV_L7" + ], + [ + "HCLK_LV8", + "LV_L8" + ], + [ + "HCLK_LV9", + "LV_L9" + ], + [ + "HCLK_LV10", + "LV_L10" + ], + [ + "HCLK_LV11", + "LV_L11" + ], + [ + "HCLK_LV12", + "LV_L12" + ], + [ + "HCLK_LV13", + "LV_L13" + ], + [ + "HCLK_LV14", + "LV_L14" + ], + [ + "HCLK_LV15", + "LV_L15" + ], + [ + "HCLK_LV16", + "LV_L16" + ], + [ + "HCLK_LV17", + "LV_L17" + ], + [ + "HCLK_LVB1", + "LVB_L0" + ], + [ + "HCLK_LVB2", + "LVB_L1" + ], + [ + "HCLK_LVB3", + "LVB_L2" + ], + [ + "HCLK_LVB4", + "LVB_L3" + ], + [ + "HCLK_LVB5", + "LVB_L4" + ], + [ + "HCLK_LVB6", + "LVB_L5" + ], + [ + "HCLK_LVB7", + "LVB_L6" + ], + [ + "HCLK_LVB8", + "LVB_L7" + ], + [ + "HCLK_LVB9", + "LVB_L8" + ], + [ + "HCLK_LVB10", + "LVB_L9" + ], + [ + "HCLK_LVB11", + "LVB_L10" + ], + [ + "HCLK_LVB12", + "LVB_L11" + ], + [ + "HCLK_NE2BEG0", + "NE2BEG0" + ], + [ + "HCLK_NE2BEG1", + "NE2BEG1" + ], + [ + "HCLK_NE2BEG2", + "NE2BEG2" + ], + [ + "HCLK_NE2BEG3", + "NE2BEG3" + ], + [ + "HCLK_NE2END_S3_0", + "NE2END_S3_0" + ], + [ + "HCLK_NE6A0", + "NE6A0" + ], + [ + "HCLK_NE6A1", + "NE6A1" + ], + [ + "HCLK_NE6A2", + "NE6A2" + ], + [ + "HCLK_NE6A3", + "NE6A3" + ], + [ + "HCLK_NE6B0", + "NE6B0" + ], + [ + "HCLK_NE6B1", + "NE6B1" + ], + [ + "HCLK_NE6B2", + "NE6B2" + ], + [ + "HCLK_NE6B3", + "NE6B3" + ], + [ + "HCLK_NE6C0", + "NE6C0" + ], + [ + "HCLK_NE6C1", + "NE6C1" + ], + [ + "HCLK_NE6C2", + "NE6C2" + ], + [ + "HCLK_NE6C3", + "NE6C3" + ], + [ + "HCLK_NE6D0", + "NE6D0" + ], + [ + "HCLK_NE6D1", + "NE6D1" + ], + [ + "HCLK_NE6D2", + "NE6D2" + ], + [ + "HCLK_NE6D3", + "NE6D3" + ], + [ + "HCLK_NL1BEG0", + "NL1BEG0" + ], + [ + "HCLK_NL1BEG1", + "NL1BEG1" + ], + [ + "HCLK_NL1BEG2", + "NL1BEG2" + ], + [ + "HCLK_NL1END_S3_0", + "NL1END_S3_0" + ], + [ + "HCLK_NN2A0", + "NN2A0" + ], + [ + "HCLK_NN2A1", + "NN2A1" + ], + [ + "HCLK_NN2A2", + "NN2A2" + ], + [ + "HCLK_NN2A3", + "NN2A3" + ], + [ + "HCLK_NN2BEG0", + "NN2BEG0" + ], + [ + "HCLK_NN2BEG1", + "NN2BEG1" + ], + [ + "HCLK_NN2BEG2", + "NN2BEG2" + ], + [ + "HCLK_NN2BEG3", + "NN2BEG3" + ], + [ + "HCLK_NN2END_S2_0", + "NN2END_S2_0" + ], + [ + "HCLK_NN6A0", + "NN6A0" + ], + [ + "HCLK_NN6A1", + "NN6A1" + ], + [ + "HCLK_NN6A2", + "NN6A2" + ], + [ + "HCLK_NN6A3", + "NN6A3" + ], + [ + "HCLK_NN6B0", + "NN6B0" + ], + [ + "HCLK_NN6B1", + "NN6B1" + ], + [ + "HCLK_NN6B2", + "NN6B2" + ], + [ + "HCLK_NN6B3", + "NN6B3" + ], + [ + "HCLK_NN6BEG0", + "NN6BEG0" + ], + [ + "HCLK_NN6BEG1", + "NN6BEG1" + ], + [ + "HCLK_NN6BEG2", + "NN6BEG2" + ], + [ + "HCLK_NN6BEG3", + "NN6BEG3" + ], + [ + "HCLK_NN6C0", + "NN6C0" + ], + [ + "HCLK_NN6C1", + "NN6C1" + ], + [ + "HCLK_NN6C2", + "NN6C2" + ], + [ + "HCLK_NN6C3", + "NN6C3" + ], + [ + "HCLK_NN6D0", + "NN6D0" + ], + [ + "HCLK_NN6D1", + "NN6D1" + ], + [ + "HCLK_NN6D2", + "NN6D2" + ], + [ + "HCLK_NN6D3", + "NN6D3" + ], + [ + "HCLK_NN6E0", + "NN6E0" + ], + [ + "HCLK_NN6E1", + "NN6E1" + ], + [ + "HCLK_NN6E2", + "NN6E2" + ], + [ + "HCLK_NN6E3", + "NN6E3" + ], + [ + "HCLK_NN6END_S1_0", + "NN6END_S1_0" + ], + [ + "HCLK_NR1BEG0", + "NR1BEG0" + ], + [ + "HCLK_NR1BEG1", + "NR1BEG1" + ], + [ + "HCLK_NR1BEG2", + "NR1BEG2" + ], + [ + "HCLK_NR1BEG3", + "NR1BEG3" + ], + [ + "HCLK_NW2A0", + "NW2BEG0" + ], + [ + "HCLK_NW2A1", + "NW2BEG1" + ], + [ + "HCLK_NW2A2", + "NW2BEG2" + ], + [ + "HCLK_NW2A3", + "NW2BEG3" + ], + [ + "HCLK_NW2END_S0_0", + "NW2END_S0_0" + ], + [ + "HCLK_NW6A0", + "NW6A0" + ], + [ + "HCLK_NW6A1", + "NW6A1" + ], + [ + "HCLK_NW6A2", + "NW6A2" + ], + [ + "HCLK_NW6A3", + "NW6A3" + ], + [ + "HCLK_NW6B0", + "NW6B0" + ], + [ + "HCLK_NW6B1", + "NW6B1" + ], + [ + "HCLK_NW6B2", + "NW6B2" + ], + [ + "HCLK_NW6B3", + "NW6B3" + ], + [ + "HCLK_NW6C0", + "NW6C0" + ], + [ + "HCLK_NW6C1", + "NW6C1" + ], + [ + "HCLK_NW6C2", + "NW6C2" + ], + [ + "HCLK_NW6C3", + "NW6C3" + ], + [ + "HCLK_NW6D0", + "NW6D0" + ], + [ + "HCLK_NW6D1", + "NW6D1" + ], + [ + "HCLK_NW6D2", + "NW6D2" + ], + [ + "HCLK_NW6D3", + "NW6D3" + ], + [ + "HCLK_NW6END_S0_0", + "NW6END_S0_0" + ], + [ + "HCLK_SE2A0", + "SE2A0" + ], + [ + "HCLK_SE2A1", + "SE2A1" + ], + [ + "HCLK_SE2A2", + "SE2A2" + ], + [ + "HCLK_SE2A3", + "SE2A3" + ], + [ + "HCLK_SE6B0", + "SE6B0" + ], + [ + "HCLK_SE6B1", + "SE6B1" + ], + [ + "HCLK_SE6B2", + "SE6B2" + ], + [ + "HCLK_SE6B3", + "SE6B3" + ], + [ + "HCLK_SE6C0", + "SE6C0" + ], + [ + "HCLK_SE6C1", + "SE6C1" + ], + [ + "HCLK_SE6C2", + "SE6C2" + ], + [ + "HCLK_SE6C3", + "SE6C3" + ], + [ + "HCLK_SE6D0", + "SE6D0" + ], + [ + "HCLK_SE6D1", + "SE6D1" + ], + [ + "HCLK_SE6D2", + "SE6D2" + ], + [ + "HCLK_SE6D3", + "SE6D3" + ], + [ + "HCLK_SE6E0", + "SE6E0" + ], + [ + "HCLK_SE6E1", + "SE6E1" + ], + [ + "HCLK_SE6E2", + "SE6E2" + ], + [ + "HCLK_SE6E3", + "SE6E3" + ], + [ + "HCLK_SL1END0", + "SL1END0" + ], + [ + "HCLK_SL1END1", + "SL1END1" + ], + [ + "HCLK_SL1END2", + "SL1END2" + ], + [ + "HCLK_SL1END3", + "SL1END3" + ], + [ + "HCLK_SR1BEG3", + "SR1END3" + ], + [ + "HCLK_SR1END1", + "SR1END1" + ], + [ + "HCLK_SR1END2", + "SR1END2" + ], + [ + "HCLK_SR1END_N3_3", + "SR1END3" + ], + [ + "HCLK_SS2A0", + "SS2A0" + ], + [ + "HCLK_SS2A1", + "SS2A1" + ], + [ + "HCLK_SS2A2", + "SS2A2" + ], + [ + "HCLK_SS2A3", + "SS2END3" + ], + [ + "HCLK_SS2BEG3", + "SS2A3" + ], + [ + "HCLK_SS2END0", + "SS2END0" + ], + [ + "HCLK_SS2END1", + "SS2END1" + ], + [ + "HCLK_SS2END2", + "SS2END2" + ], + [ + "HCLK_SS2END_N0_3", + "SS2END3" + ], + [ + "HCLK_SS6A0", + "SS6A0" + ], + [ + "HCLK_SS6A1", + "SS6A1" + ], + [ + "HCLK_SS6A2", + "SS6A2" + ], + [ + "HCLK_SS6A3", + "SS6A3" + ], + [ + "HCLK_SS6B0", + "SS6B0" + ], + [ + "HCLK_SS6B1", + "SS6B1" + ], + [ + "HCLK_SS6B2", + "SS6B2" + ], + [ + "HCLK_SS6B3", + "SS6B3" + ], + [ + "HCLK_SS6C0", + "SS6C0" + ], + [ + "HCLK_SS6C1", + "SS6C1" + ], + [ + "HCLK_SS6C2", + "SS6C2" + ], + [ + "HCLK_SS6C3", + "SS6C3" + ], + [ + "HCLK_SS6D0", + "SS6D0" + ], + [ + "HCLK_SS6D1", + "SS6D1" + ], + [ + "HCLK_SS6D2", + "SS6D2" + ], + [ + "HCLK_SS6D3", + "SS6D3" + ], + [ + "HCLK_SS6E0", + "SS6E0" + ], + [ + "HCLK_SS6E1", + "SS6E1" + ], + [ + "HCLK_SS6E2", + "SS6E2" + ], + [ + "HCLK_SS6E3", + "SS6E3" + ], + [ + "HCLK_SS6END0", + "SS6END0" + ], + [ + "HCLK_SS6END1", + "SS6END1" + ], + [ + "HCLK_SS6END2", + "SS6END2" + ], + [ + "HCLK_SS6END3", + "SS6END3" + ], + [ + "HCLK_SS6END_N0_3", + "SS6END3" + ], + [ + "HCLK_SW2A3", + "SW2A3" + ], + [ + "HCLK_SW2END0", + "SW2A0" + ], + [ + "HCLK_SW2END1", + "SW2A1" + ], + [ + "HCLK_SW2END2", + "SW2A2" + ], + [ + "HCLK_SW2END_N0_3", + "SW2END3" + ], + [ + "HCLK_SW6B0", + "SW6B0" + ], + [ + "HCLK_SW6B1", + "SW6B1" + ], + [ + "HCLK_SW6B2", + "SW6B2" + ], + [ + "HCLK_SW6B3", + "SW6B3" + ], + [ + "HCLK_SW6C0", + "SW6C0" + ], + [ + "HCLK_SW6C1", + "SW6C1" + ], + [ + "HCLK_SW6C2", + "SW6C2" + ], + [ + "HCLK_SW6C3", + "SW6C3" + ], + [ + "HCLK_SW6D0", + "SW6D0" + ], + [ + "HCLK_SW6D1", + "SW6D1" + ], + [ + "HCLK_SW6D2", + "SW6D2" + ], + [ + "HCLK_SW6D3", + "SW6D3" + ], + [ + "HCLK_SW6E0", + "SW6E0" + ], + [ + "HCLK_SW6E1", + "SW6E1" + ], + [ + "HCLK_SW6E2", + "SW6E2" + ], + [ + "HCLK_SW6E3", + "SW6E3" + ], + [ + "HCLK_SW6END3", + "SW6END3" + ], + [ + "HCLK_WL1BEG3", + "WL1BEG3" + ], + [ + "HCLK_WL1END3", + "WL1END3" + ], + [ + "HCLK_WR1BEG_S0", + "WR1BEG_S0" + ], + [ + "HCLK_WR1END_S1_0", + "WR1END_S1_0" + ], + [ + "HCLK_WW2END3", + "WW2END3" + ], + [ + "HCLK_WW4END_S0_0", + "WW4END_S0_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "HCLK_L_BOT_UTURN", + "HCLK_R_BOT_UTURN" + ], + "wire_pairs": [ + [ + "HCLK_CK_BUFHCLK0", + "HCLK_CK_BUFHCLK0" + ], + [ + "HCLK_CK_BUFHCLK1", + "HCLK_CK_BUFHCLK1" + ], + [ + "HCLK_CK_BUFHCLK2", + "HCLK_CK_BUFHCLK2" + ], + [ + "HCLK_CK_BUFHCLK3", + "HCLK_CK_BUFHCLK3" + ], + [ + "HCLK_CK_BUFHCLK4", + "HCLK_CK_BUFHCLK4" + ], + [ + "HCLK_CK_BUFHCLK5", + "HCLK_CK_BUFHCLK5" + ], + [ + "HCLK_CK_BUFHCLK6", + "HCLK_CK_BUFHCLK6" + ], + [ + "HCLK_CK_BUFHCLK7", + "HCLK_CK_BUFHCLK7" + ], + [ + "HCLK_CK_BUFHCLK8", + "HCLK_CK_BUFHCLK8" + ], + [ + "HCLK_CK_BUFHCLK9", + "HCLK_CK_BUFHCLK9" + ], + [ + "HCLK_CK_BUFHCLK10", + "HCLK_CK_BUFHCLK10" + ], + [ + "HCLK_CK_BUFHCLK11", + "HCLK_CK_BUFHCLK11" + ], + [ + "HCLK_CK_IN4", + "HCLK_CK_IN4" + ], + [ + "HCLK_CK_IN5", + "HCLK_CK_IN5" + ], + [ + "HCLK_CK_IN6", + "HCLK_CK_IN6" + ], + [ + "HCLK_CK_IN7", + "HCLK_CK_IN7" + ], + [ + "HCLK_CK_IN8", + "HCLK_CK_IN8" + ], + [ + "HCLK_CK_IN9", + "HCLK_CK_IN9" + ], + [ + "HCLK_CK_IN10", + "HCLK_CK_IN10" + ], + [ + "HCLK_CK_IN11", + "HCLK_CK_IN11" + ], + [ + "HCLK_CK_IN12", + "HCLK_CK_IN12" + ], + [ + "HCLK_CK_IN13", + "HCLK_CK_IN13" + ], + [ + "HCLK_CK_INOUT_L0", + "HCLK_CK_OUTIN_R4" + ], + [ + "HCLK_CK_INOUT_L1", + "HCLK_CK_OUTIN_R5" + ], + [ + "HCLK_CK_INOUT_L2", + "HCLK_CK_OUTIN_R6" + ], + [ + "HCLK_CK_INOUT_L3", + "HCLK_CK_OUTIN_R7" + ], + [ + "HCLK_CK_INOUT_L4", + "HCLK_CK_OUTIN_R0" + ], + [ + "HCLK_CK_INOUT_L5", + "HCLK_CK_OUTIN_R1" + ], + [ + "HCLK_CK_INOUT_L6", + "HCLK_CK_OUTIN_R2" + ], + [ + "HCLK_CK_INOUT_L7", + "HCLK_CK_OUTIN_R3" + ], + [ + "HCLK_CK_OUTIN_L0", + "HCLK_CK_INOUT_R0" + ], + [ + "HCLK_CK_OUTIN_L1", + "HCLK_CK_INOUT_R1" + ], + [ + "HCLK_CK_OUTIN_L2", + "HCLK_CK_INOUT_R2" + ], + [ + "HCLK_CK_OUTIN_L3", + "HCLK_CK_INOUT_R3" + ], + [ + "HCLK_CK_OUTIN_L4", + "HCLK_CK_INOUT_R4" + ], + [ + "HCLK_CK_OUTIN_L5", + "HCLK_CK_INOUT_R5" + ], + [ + "HCLK_CK_OUTIN_L6", + "HCLK_CK_INOUT_R6" + ], + [ + "HCLK_CK_OUTIN_L7", + "HCLK_CK_INOUT_R7" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "HCLK_L_BOT_UTURN", + "INT_L" + ], + "wire_pairs": [ + [ + "B_TERM_UTURN_INT_ER1BEG0", + "EL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_ER1BEG0", + "ER1BEG0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "EL1END0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "ER1END_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "BYP_BOUNCE_N3_7" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "FAN_BOUNCE0" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "BYP_BOUNCE_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "FAN_BOUNCE2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "BYP_BOUNCE_N3_6" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "FAN_BOUNCE4" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "BYP_BOUNCE_N3_2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "FAN_BOUNCE6" + ], + [ + "B_TERM_UTURN_INT_LVB_L0", + "LVB_L1" + ], + [ + "B_TERM_UTURN_INT_LVB_L0", + "LVB_L12" + ], + [ + "B_TERM_UTURN_INT_LVB_L1", + "LVB_L2" + ], + [ + "B_TERM_UTURN_INT_LVB_L1", + "LVB_L11" + ], + [ + "B_TERM_UTURN_INT_LVB_L2", + "LVB_L3" + ], + [ + "B_TERM_UTURN_INT_LVB_L2", + "LVB_L10" + ], + [ + "B_TERM_UTURN_INT_LVB_L3", + "LVB_L4" + ], + [ + "B_TERM_UTURN_INT_LVB_L3", + "LVB_L9" + ], + [ + "B_TERM_UTURN_INT_LVB_L4", + "LVB_L5" + ], + [ + "B_TERM_UTURN_INT_LVB_L4", + "LVB_L8" + ], + [ + "B_TERM_UTURN_INT_LVB_L5", + "LVB_L6" + ], + [ + "B_TERM_UTURN_INT_LVB_L5", + "LVB_L7" + ], + [ + "B_TERM_UTURN_INT_LV_L2", + "LV_L2" + ], + [ + "B_TERM_UTURN_INT_LV_L2", + "LV_L17" + ], + [ + "B_TERM_UTURN_INT_LV_L3", + "LV_L3" + ], + [ + "B_TERM_UTURN_INT_LV_L3", + "LV_L16" + ], + [ + "B_TERM_UTURN_INT_LV_L4", + "LV_L4" + ], + [ + "B_TERM_UTURN_INT_LV_L4", + "LV_L15" + ], + [ + "B_TERM_UTURN_INT_LV_L5", + "LV_L5" + ], + [ + "B_TERM_UTURN_INT_LV_L5", + "LV_L14" + ], + [ + "B_TERM_UTURN_INT_LV_L6", + "LV_L6" + ], + [ + "B_TERM_UTURN_INT_LV_L6", + "LV_L13" + ], + [ + "B_TERM_UTURN_INT_LV_L7", + "LV_L7" + ], + [ + "B_TERM_UTURN_INT_LV_L7", + "LV_L12" + ], + [ + "B_TERM_UTURN_INT_LV_L8", + "LV_L8" + ], + [ + "B_TERM_UTURN_INT_LV_L8", + "LV_L11" + ], + [ + "B_TERM_UTURN_INT_LV_L9", + "LV_L9" + ], + [ + "B_TERM_UTURN_INT_LV_L9", + "LV_L10" + ], + [ + "B_TERM_UTURN_INT_LV_L18", + "LV_L1" + ], + [ + "B_TERM_UTURN_INT_LV_L18", + "LV_L18" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "NE2A3" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "SE2BEG0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "NE2A2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "SE2BEG1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "NE2A1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "SE2BEG2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "NE2A0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "SE2BEG3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "NE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "SE6A0" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "NE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "SE6A1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "NE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "SE6A2" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "NE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "SE6A3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "NE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "NE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "NE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "NE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "NE6D3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "NE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "NE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "NE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "NE6E3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "NE6E2" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "NE6E1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "NE6E0" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "NR1END3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "SL1BEG0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "NR1END2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "SL1BEG1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "NR1END1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "SL1BEG2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "NR1END0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "SL1BEG3" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "NL1END2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "SR1BEG1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "NL1END1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "SR1BEG2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "NL1END0" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "SR1BEG3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "NN2END3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "NN2END2" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "NN2END1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "NN2END0" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "NN2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "SS2BEG0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "NN2A2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "SS2BEG1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "NN2A1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "SS2BEG2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "NN2A0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "SS2BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "NN6B3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "NN6B2" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "NN6B1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "NN6B0" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "NN6C3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "NN6C2" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "NN6C1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "NN6C0" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "NN6A3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "SS6BEG0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "NN6A2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "SS6BEG1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "NN6A1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "SS6BEG2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "NN6A0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "SS6BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "NN6D3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "NN6D2" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "NN6D1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "NN6D0" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "NN6E3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "NN6E2" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "NN6E1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "NN6E0" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "NN6END3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "NN6END2" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "NN6END1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "NN6END0" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "NW2A3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "SW2BEG0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "NW2A2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "SW2BEG1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "NW2A1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "SW2BEG2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "NW2A0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "SW2BEG3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "NW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "SW6A0" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "NW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "SW6A1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "NW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "SW6A2" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "NW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "SW6A3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "NW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "NW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "NW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "NW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "NW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "NW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "NW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "NW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "NW6E3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "NW6E2" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "NW6E1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "NW6E0" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "NW6END0" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "SW6END_N0_3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WR1BEG0" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WL1END_N1_3" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WR1END0" + ], + [ + "HCLK_LEAF_CLK_B_TOPL0", + "GCLK_L_B6" + ], + [ + "HCLK_LEAF_CLK_B_TOPL1", + "GCLK_L_B7" + ], + [ + "HCLK_LEAF_CLK_B_TOPL2", + "GCLK_L_B8" + ], + [ + "HCLK_LEAF_CLK_B_TOPL3", + "GCLK_L_B9" + ], + [ + "HCLK_LEAF_CLK_B_TOPL4", + "GCLK_L_B10" + ], + [ + "HCLK_LEAF_CLK_B_TOPL5", + "GCLK_L_B11" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "HCLK_R", + "INT_R" + ], + "wire_pairs": [ + [ + "HCLK_BYP_BOUNCE2", + "BYP_BOUNCE_N3_2" + ], + [ + "HCLK_BYP_BOUNCE3", + "BYP_BOUNCE_N3_3" + ], + [ + "HCLK_BYP_BOUNCE6", + "BYP_BOUNCE_N3_6" + ], + [ + "HCLK_BYP_BOUNCE7", + "BYP_BOUNCE_N3_7" + ], + [ + "HCLK_EL1BEG3", + "EL1BEG_N3" + ], + [ + "HCLK_EL1END_S3_0", + "EL1END0" + ], + [ + "HCLK_ER1BEG_S0", + "ER1BEG0" + ], + [ + "HCLK_ER1END3", + "ER1END_N3_3" + ], + [ + "HCLK_FAN_BOUNCE_S3_0", + "FAN_BOUNCE0" + ], + [ + "HCLK_FAN_BOUNCE_S3_2", + "FAN_BOUNCE2" + ], + [ + "HCLK_FAN_BOUNCE_S3_4", + "FAN_BOUNCE4" + ], + [ + "HCLK_FAN_BOUNCE_S3_6", + "FAN_BOUNCE6" + ], + [ + "HCLK_LEAF_CLK_B_TOP0", + "GCLK_B0" + ], + [ + "HCLK_LEAF_CLK_B_TOP1", + "GCLK_B1" + ], + [ + "HCLK_LEAF_CLK_B_TOP2", + "GCLK_B2" + ], + [ + "HCLK_LEAF_CLK_B_TOP3", + "GCLK_B3" + ], + [ + "HCLK_LEAF_CLK_B_TOP4", + "GCLK_B4" + ], + [ + "HCLK_LEAF_CLK_B_TOP5", + "GCLK_B5" + ], + [ + "HCLK_LV0", + "LV1" + ], + [ + "HCLK_LV1", + "LV2" + ], + [ + "HCLK_LV2", + "LV3" + ], + [ + "HCLK_LV3", + "LV4" + ], + [ + "HCLK_LV4", + "LV5" + ], + [ + "HCLK_LV5", + "LV6" + ], + [ + "HCLK_LV6", + "LV7" + ], + [ + "HCLK_LV7", + "LV8" + ], + [ + "HCLK_LV8", + "LV9" + ], + [ + "HCLK_LV9", + "LV10" + ], + [ + "HCLK_LV10", + "LV11" + ], + [ + "HCLK_LV11", + "LV12" + ], + [ + "HCLK_LV12", + "LV13" + ], + [ + "HCLK_LV13", + "LV14" + ], + [ + "HCLK_LV14", + "LV15" + ], + [ + "HCLK_LV15", + "LV16" + ], + [ + "HCLK_LV16", + "LV17" + ], + [ + "HCLK_LV17", + "LV18" + ], + [ + "HCLK_LVB1", + "LVB1" + ], + [ + "HCLK_LVB2", + "LVB2" + ], + [ + "HCLK_LVB3", + "LVB3" + ], + [ + "HCLK_LVB4", + "LVB4" + ], + [ + "HCLK_LVB5", + "LVB5" + ], + [ + "HCLK_LVB6", + "LVB6" + ], + [ + "HCLK_LVB7", + "LVB7" + ], + [ + "HCLK_LVB8", + "LVB8" + ], + [ + "HCLK_LVB9", + "LVB9" + ], + [ + "HCLK_LVB10", + "LVB10" + ], + [ + "HCLK_LVB11", + "LVB11" + ], + [ + "HCLK_LVB12", + "LVB12" + ], + [ + "HCLK_NE2BEG0", + "NE2A0" + ], + [ + "HCLK_NE2BEG1", + "NE2A1" + ], + [ + "HCLK_NE2BEG2", + "NE2A2" + ], + [ + "HCLK_NE2BEG3", + "NE2A3" + ], + [ + "HCLK_NE2END_S3_0", + "NE2END0" + ], + [ + "HCLK_NE6A0", + "NE6B0" + ], + [ + "HCLK_NE6A1", + "NE6B1" + ], + [ + "HCLK_NE6A2", + "NE6B2" + ], + [ + "HCLK_NE6A3", + "NE6B3" + ], + [ + "HCLK_NE6B0", + "NE6C0" + ], + [ + "HCLK_NE6B1", + "NE6C1" + ], + [ + "HCLK_NE6B2", + "NE6C2" + ], + [ + "HCLK_NE6B3", + "NE6C3" + ], + [ + "HCLK_NE6C0", + "NE6D0" + ], + [ + "HCLK_NE6C1", + "NE6D1" + ], + [ + "HCLK_NE6C2", + "NE6D2" + ], + [ + "HCLK_NE6C3", + "NE6D3" + ], + [ + "HCLK_NE6D0", + "NE6E0" + ], + [ + "HCLK_NE6D1", + "NE6E1" + ], + [ + "HCLK_NE6D2", + "NE6E2" + ], + [ + "HCLK_NE6D3", + "NE6E3" + ], + [ + "HCLK_NL1BEG0", + "NL1END0" + ], + [ + "HCLK_NL1BEG1", + "NL1END1" + ], + [ + "HCLK_NL1BEG2", + "NL1END2" + ], + [ + "HCLK_NL1END_S3_0", + "NL1END0" + ], + [ + "HCLK_NN2A0", + "NN2END0" + ], + [ + "HCLK_NN2A1", + "NN2END1" + ], + [ + "HCLK_NN2A2", + "NN2END2" + ], + [ + "HCLK_NN2A3", + "NN2END3" + ], + [ + "HCLK_NN2BEG0", + "NN2A0" + ], + [ + "HCLK_NN2BEG1", + "NN2A1" + ], + [ + "HCLK_NN2BEG2", + "NN2A2" + ], + [ + "HCLK_NN2BEG3", + "NN2A3" + ], + [ + "HCLK_NN2END_S2_0", + "NN2END0" + ], + [ + "HCLK_NN6A0", + "NN6B0" + ], + [ + "HCLK_NN6A1", + "NN6B1" + ], + [ + "HCLK_NN6A2", + "NN6B2" + ], + [ + "HCLK_NN6A3", + "NN6B3" + ], + [ + "HCLK_NN6B0", + "NN6C0" + ], + [ + "HCLK_NN6B1", + "NN6C1" + ], + [ + "HCLK_NN6B2", + "NN6C2" + ], + [ + "HCLK_NN6B3", + "NN6C3" + ], + [ + "HCLK_NN6BEG0", + "NN6A0" + ], + [ + "HCLK_NN6BEG1", + "NN6A1" + ], + [ + "HCLK_NN6BEG2", + "NN6A2" + ], + [ + "HCLK_NN6BEG3", + "NN6A3" + ], + [ + "HCLK_NN6C0", + "NN6D0" + ], + [ + "HCLK_NN6C1", + "NN6D1" + ], + [ + "HCLK_NN6C2", + "NN6D2" + ], + [ + "HCLK_NN6C3", + "NN6D3" + ], + [ + "HCLK_NN6D0", + "NN6E0" + ], + [ + "HCLK_NN6D1", + "NN6E1" + ], + [ + "HCLK_NN6D2", + "NN6E2" + ], + [ + "HCLK_NN6D3", + "NN6E3" + ], + [ + "HCLK_NN6E0", + "NN6END0" + ], + [ + "HCLK_NN6E1", + "NN6END1" + ], + [ + "HCLK_NN6E2", + "NN6END2" + ], + [ + "HCLK_NN6E3", + "NN6END3" + ], + [ + "HCLK_NN6END_S1_0", + "NN6END0" + ], + [ + "HCLK_NR1BEG0", + "NR1END0" + ], + [ + "HCLK_NR1BEG1", + "NR1END1" + ], + [ + "HCLK_NR1BEG2", + "NR1END2" + ], + [ + "HCLK_NR1BEG3", + "NR1END3" + ], + [ + "HCLK_NW2A0", + "NW2A0" + ], + [ + "HCLK_NW2A1", + "NW2A1" + ], + [ + "HCLK_NW2A2", + "NW2A2" + ], + [ + "HCLK_NW2A3", + "NW2A3" + ], + [ + "HCLK_NW2END_S0_0", + "NW2END0" + ], + [ + "HCLK_NW6A0", + "NW6B0" + ], + [ + "HCLK_NW6A1", + "NW6B1" + ], + [ + "HCLK_NW6A2", + "NW6B2" + ], + [ + "HCLK_NW6A3", + "NW6B3" + ], + [ + "HCLK_NW6B0", + "NW6C0" + ], + [ + "HCLK_NW6B1", + "NW6C1" + ], + [ + "HCLK_NW6B2", + "NW6C2" + ], + [ + "HCLK_NW6B3", + "NW6C3" + ], + [ + "HCLK_NW6C0", + "NW6D0" + ], + [ + "HCLK_NW6C1", + "NW6D1" + ], + [ + "HCLK_NW6C2", + "NW6D2" + ], + [ + "HCLK_NW6C3", + "NW6D3" + ], + [ + "HCLK_NW6D0", + "NW6E0" + ], + [ + "HCLK_NW6D1", + "NW6E1" + ], + [ + "HCLK_NW6D2", + "NW6E2" + ], + [ + "HCLK_NW6D3", + "NW6E3" + ], + [ + "HCLK_NW6END_S0_0", + "NW6END0" + ], + [ + "HCLK_SE2A0", + "SE2BEG0" + ], + [ + "HCLK_SE2A1", + "SE2BEG1" + ], + [ + "HCLK_SE2A2", + "SE2BEG2" + ], + [ + "HCLK_SE2A3", + "SE2BEG3" + ], + [ + "HCLK_SE6B0", + "SE6A0" + ], + [ + "HCLK_SE6B1", + "SE6A1" + ], + [ + "HCLK_SE6B2", + "SE6A2" + ], + [ + "HCLK_SE6B3", + "SE6A3" + ], + [ + "HCLK_SE6C0", + "SE6B0" + ], + [ + "HCLK_SE6C1", + "SE6B1" + ], + [ + "HCLK_SE6C2", + "SE6B2" + ], + [ + "HCLK_SE6C3", + "SE6B3" + ], + [ + "HCLK_SE6D0", + "SE6C0" + ], + [ + "HCLK_SE6D1", + "SE6C1" + ], + [ + "HCLK_SE6D2", + "SE6C2" + ], + [ + "HCLK_SE6D3", + "SE6C3" + ], + [ + "HCLK_SE6E0", + "SE6D0" + ], + [ + "HCLK_SE6E1", + "SE6D1" + ], + [ + "HCLK_SE6E2", + "SE6D2" + ], + [ + "HCLK_SE6E3", + "SE6D3" + ], + [ + "HCLK_SL1END0", + "SL1BEG0" + ], + [ + "HCLK_SL1END1", + "SL1BEG1" + ], + [ + "HCLK_SL1END2", + "SL1BEG2" + ], + [ + "HCLK_SL1END3", + "SL1BEG3" + ], + [ + "HCLK_SR1BEG3", + "SR1BEG3" + ], + [ + "HCLK_SR1END1", + "SR1BEG1" + ], + [ + "HCLK_SR1END2", + "SR1BEG2" + ], + [ + "HCLK_SR1END_N3_3", + "SR1END_N3_3" + ], + [ + "HCLK_SS2A0", + "SS2BEG0" + ], + [ + "HCLK_SS2A1", + "SS2BEG1" + ], + [ + "HCLK_SS2A2", + "SS2BEG2" + ], + [ + "HCLK_SS2A3", + "SS2A3" + ], + [ + "HCLK_SS2BEG3", + "SS2BEG3" + ], + [ + "HCLK_SS2END0", + "SS2A0" + ], + [ + "HCLK_SS2END1", + "SS2A1" + ], + [ + "HCLK_SS2END2", + "SS2A2" + ], + [ + "HCLK_SS2END_N0_3", + "SS2END_N0_3" + ], + [ + "HCLK_SS6A0", + "SS6BEG0" + ], + [ + "HCLK_SS6A1", + "SS6BEG1" + ], + [ + "HCLK_SS6A2", + "SS6BEG2" + ], + [ + "HCLK_SS6A3", + "SS6BEG3" + ], + [ + "HCLK_SS6B0", + "SS6A0" + ], + [ + "HCLK_SS6B1", + "SS6A1" + ], + [ + "HCLK_SS6B2", + "SS6A2" + ], + [ + "HCLK_SS6B3", + "SS6A3" + ], + [ + "HCLK_SS6C0", + "SS6B0" + ], + [ + "HCLK_SS6C1", + "SS6B1" + ], + [ + "HCLK_SS6C2", + "SS6B2" + ], + [ + "HCLK_SS6C3", + "SS6B3" + ], + [ + "HCLK_SS6D0", + "SS6C0" + ], + [ + "HCLK_SS6D1", + "SS6C1" + ], + [ + "HCLK_SS6D2", + "SS6C2" + ], + [ + "HCLK_SS6D3", + "SS6C3" + ], + [ + "HCLK_SS6E0", + "SS6D0" + ], + [ + "HCLK_SS6E1", + "SS6D1" + ], + [ + "HCLK_SS6E2", + "SS6D2" + ], + [ + "HCLK_SS6E3", + "SS6D3" + ], + [ + "HCLK_SS6END0", + "SS6E0" + ], + [ + "HCLK_SS6END1", + "SS6E1" + ], + [ + "HCLK_SS6END2", + "SS6E2" + ], + [ + "HCLK_SS6END3", + "SS6E3" + ], + [ + "HCLK_SS6END_N0_3", + "SS6END_N0_3" + ], + [ + "HCLK_SW2A3", + "SW2BEG3" + ], + [ + "HCLK_SW2END0", + "SW2BEG0" + ], + [ + "HCLK_SW2END1", + "SW2BEG1" + ], + [ + "HCLK_SW2END2", + "SW2BEG2" + ], + [ + "HCLK_SW2END_N0_3", + "SW2END_N0_3" + ], + [ + "HCLK_SW6B0", + "SW6A0" + ], + [ + "HCLK_SW6B1", + "SW6A1" + ], + [ + "HCLK_SW6B2", + "SW6A2" + ], + [ + "HCLK_SW6B3", + "SW6A3" + ], + [ + "HCLK_SW6C0", + "SW6B0" + ], + [ + "HCLK_SW6C1", + "SW6B1" + ], + [ + "HCLK_SW6C2", + "SW6B2" + ], + [ + "HCLK_SW6C3", + "SW6B3" + ], + [ + "HCLK_SW6D0", + "SW6C0" + ], + [ + "HCLK_SW6D1", + "SW6C1" + ], + [ + "HCLK_SW6D2", + "SW6C2" + ], + [ + "HCLK_SW6D3", + "SW6C3" + ], + [ + "HCLK_SW6E0", + "SW6D0" + ], + [ + "HCLK_SW6E1", + "SW6D1" + ], + [ + "HCLK_SW6E2", + "SW6D2" + ], + [ + "HCLK_SW6E3", + "SW6D3" + ], + [ + "HCLK_SW6END3", + "SW6END_N0_3" + ], + [ + "HCLK_WL1BEG3", + "WL1BEG_N3" + ], + [ + "HCLK_WL1END3", + "WL1END_N1_3" + ], + [ + "HCLK_WR1BEG_S0", + "WR1BEG0" + ], + [ + "HCLK_WR1END_S1_0", + "WR1END0" + ], + [ + "HCLK_WW2END3", + "WW2END_N0_3" + ], + [ + "HCLK_WW4END_S0_0", + "WW4END0" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "HCLK_R", + "INT_R" + ], + "wire_pairs": [ + [ + "HCLK_BYP_BOUNCE2", + "BYP_BOUNCE2" + ], + [ + "HCLK_BYP_BOUNCE3", + "BYP_BOUNCE3" + ], + [ + "HCLK_BYP_BOUNCE6", + "BYP_BOUNCE6" + ], + [ + "HCLK_BYP_BOUNCE7", + "BYP_BOUNCE7" + ], + [ + "HCLK_EL1BEG3", + "EL1BEG3" + ], + [ + "HCLK_EL1END_S3_0", + "EL1END_S3_0" + ], + [ + "HCLK_ER1BEG_S0", + "ER1BEG_S0" + ], + [ + "HCLK_ER1END3", + "ER1END3" + ], + [ + "HCLK_FAN_BOUNCE_S3_0", + "FAN_BOUNCE_S3_0" + ], + [ + "HCLK_FAN_BOUNCE_S3_2", + "FAN_BOUNCE_S3_2" + ], + [ + "HCLK_FAN_BOUNCE_S3_4", + "FAN_BOUNCE_S3_4" + ], + [ + "HCLK_FAN_BOUNCE_S3_6", + "FAN_BOUNCE_S3_6" + ], + [ + "HCLK_LEAF_CLK_B_BOT0", + "GCLK_B0" + ], + [ + "HCLK_LEAF_CLK_B_BOT1", + "GCLK_B1" + ], + [ + "HCLK_LEAF_CLK_B_BOT2", + "GCLK_B2" + ], + [ + "HCLK_LEAF_CLK_B_BOT3", + "GCLK_B3" + ], + [ + "HCLK_LEAF_CLK_B_BOT4", + "GCLK_B4" + ], + [ + "HCLK_LEAF_CLK_B_BOT5", + "GCLK_B5" + ], + [ + "HCLK_LV0", + "LV0" + ], + [ + "HCLK_LV1", + "LV1" + ], + [ + "HCLK_LV2", + "LV2" + ], + [ + "HCLK_LV3", + "LV3" + ], + [ + "HCLK_LV4", + "LV4" + ], + [ + "HCLK_LV5", + "LV5" + ], + [ + "HCLK_LV6", + "LV6" + ], + [ + "HCLK_LV7", + "LV7" + ], + [ + "HCLK_LV8", + "LV8" + ], + [ + "HCLK_LV9", + "LV9" + ], + [ + "HCLK_LV10", + "LV10" + ], + [ + "HCLK_LV11", + "LV11" + ], + [ + "HCLK_LV12", + "LV12" + ], + [ + "HCLK_LV13", + "LV13" + ], + [ + "HCLK_LV14", + "LV14" + ], + [ + "HCLK_LV15", + "LV15" + ], + [ + "HCLK_LV16", + "LV16" + ], + [ + "HCLK_LV17", + "LV17" + ], + [ + "HCLK_LVB1", + "LVB0" + ], + [ + "HCLK_LVB2", + "LVB1" + ], + [ + "HCLK_LVB3", + "LVB2" + ], + [ + "HCLK_LVB4", + "LVB3" + ], + [ + "HCLK_LVB5", + "LVB4" + ], + [ + "HCLK_LVB6", + "LVB5" + ], + [ + "HCLK_LVB7", + "LVB6" + ], + [ + "HCLK_LVB8", + "LVB7" + ], + [ + "HCLK_LVB9", + "LVB8" + ], + [ + "HCLK_LVB10", + "LVB9" + ], + [ + "HCLK_LVB11", + "LVB10" + ], + [ + "HCLK_LVB12", + "LVB11" + ], + [ + "HCLK_NE2BEG0", + "NE2BEG0" + ], + [ + "HCLK_NE2BEG1", + "NE2BEG1" + ], + [ + "HCLK_NE2BEG2", + "NE2BEG2" + ], + [ + "HCLK_NE2BEG3", + "NE2BEG3" + ], + [ + "HCLK_NE2END_S3_0", + "NE2END_S3_0" + ], + [ + "HCLK_NE6A0", + "NE6A0" + ], + [ + "HCLK_NE6A1", + "NE6A1" + ], + [ + "HCLK_NE6A2", + "NE6A2" + ], + [ + "HCLK_NE6A3", + "NE6A3" + ], + [ + "HCLK_NE6B0", + "NE6B0" + ], + [ + "HCLK_NE6B1", + "NE6B1" + ], + [ + "HCLK_NE6B2", + "NE6B2" + ], + [ + "HCLK_NE6B3", + "NE6B3" + ], + [ + "HCLK_NE6C0", + "NE6C0" + ], + [ + "HCLK_NE6C1", + "NE6C1" + ], + [ + "HCLK_NE6C2", + "NE6C2" + ], + [ + "HCLK_NE6C3", + "NE6C3" + ], + [ + "HCLK_NE6D0", + "NE6D0" + ], + [ + "HCLK_NE6D1", + "NE6D1" + ], + [ + "HCLK_NE6D2", + "NE6D2" + ], + [ + "HCLK_NE6D3", + "NE6D3" + ], + [ + "HCLK_NL1BEG0", + "NL1BEG0" + ], + [ + "HCLK_NL1BEG1", + "NL1BEG1" + ], + [ + "HCLK_NL1BEG2", + "NL1BEG2" + ], + [ + "HCLK_NL1END_S3_0", + "NL1END_S3_0" + ], + [ + "HCLK_NN2A0", + "NN2A0" + ], + [ + "HCLK_NN2A1", + "NN2A1" + ], + [ + "HCLK_NN2A2", + "NN2A2" + ], + [ + "HCLK_NN2A3", + "NN2A3" + ], + [ + "HCLK_NN2BEG0", + "NN2BEG0" + ], + [ + "HCLK_NN2BEG1", + "NN2BEG1" + ], + [ + "HCLK_NN2BEG2", + "NN2BEG2" + ], + [ + "HCLK_NN2BEG3", + "NN2BEG3" + ], + [ + "HCLK_NN2END_S2_0", + "NN2END_S2_0" + ], + [ + "HCLK_NN6A0", + "NN6A0" + ], + [ + "HCLK_NN6A1", + "NN6A1" + ], + [ + "HCLK_NN6A2", + "NN6A2" + ], + [ + "HCLK_NN6A3", + "NN6A3" + ], + [ + "HCLK_NN6B0", + "NN6B0" + ], + [ + "HCLK_NN6B1", + "NN6B1" + ], + [ + "HCLK_NN6B2", + "NN6B2" + ], + [ + "HCLK_NN6B3", + "NN6B3" + ], + [ + "HCLK_NN6BEG0", + "NN6BEG0" + ], + [ + "HCLK_NN6BEG1", + "NN6BEG1" + ], + [ + "HCLK_NN6BEG2", + "NN6BEG2" + ], + [ + "HCLK_NN6BEG3", + "NN6BEG3" + ], + [ + "HCLK_NN6C0", + "NN6C0" + ], + [ + "HCLK_NN6C1", + "NN6C1" + ], + [ + "HCLK_NN6C2", + "NN6C2" + ], + [ + "HCLK_NN6C3", + "NN6C3" + ], + [ + "HCLK_NN6D0", + "NN6D0" + ], + [ + "HCLK_NN6D1", + "NN6D1" + ], + [ + "HCLK_NN6D2", + "NN6D2" + ], + [ + "HCLK_NN6D3", + "NN6D3" + ], + [ + "HCLK_NN6E0", + "NN6E0" + ], + [ + "HCLK_NN6E1", + "NN6E1" + ], + [ + "HCLK_NN6E2", + "NN6E2" + ], + [ + "HCLK_NN6E3", + "NN6E3" + ], + [ + "HCLK_NN6END_S1_0", + "NN6END_S1_0" + ], + [ + "HCLK_NR1BEG0", + "NR1BEG0" + ], + [ + "HCLK_NR1BEG1", + "NR1BEG1" + ], + [ + "HCLK_NR1BEG2", + "NR1BEG2" + ], + [ + "HCLK_NR1BEG3", + "NR1BEG3" + ], + [ + "HCLK_NW2A0", + "NW2BEG0" + ], + [ + "HCLK_NW2A1", + "NW2BEG1" + ], + [ + "HCLK_NW2A2", + "NW2BEG2" + ], + [ + "HCLK_NW2A3", + "NW2BEG3" + ], + [ + "HCLK_NW2END_S0_0", + "NW2END_S0_0" + ], + [ + "HCLK_NW6A0", + "NW6A0" + ], + [ + "HCLK_NW6A1", + "NW6A1" + ], + [ + "HCLK_NW6A2", + "NW6A2" + ], + [ + "HCLK_NW6A3", + "NW6A3" + ], + [ + "HCLK_NW6B0", + "NW6B0" + ], + [ + "HCLK_NW6B1", + "NW6B1" + ], + [ + "HCLK_NW6B2", + "NW6B2" + ], + [ + "HCLK_NW6B3", + "NW6B3" + ], + [ + "HCLK_NW6C0", + "NW6C0" + ], + [ + "HCLK_NW6C1", + "NW6C1" + ], + [ + "HCLK_NW6C2", + "NW6C2" + ], + [ + "HCLK_NW6C3", + "NW6C3" + ], + [ + "HCLK_NW6D0", + "NW6D0" + ], + [ + "HCLK_NW6D1", + "NW6D1" + ], + [ + "HCLK_NW6D2", + "NW6D2" + ], + [ + "HCLK_NW6D3", + "NW6D3" + ], + [ + "HCLK_NW6END_S0_0", + "NW6END_S0_0" + ], + [ + "HCLK_SE2A0", + "SE2A0" + ], + [ + "HCLK_SE2A1", + "SE2A1" + ], + [ + "HCLK_SE2A2", + "SE2A2" + ], + [ + "HCLK_SE2A3", + "SE2A3" + ], + [ + "HCLK_SE6B0", + "SE6B0" + ], + [ + "HCLK_SE6B1", + "SE6B1" + ], + [ + "HCLK_SE6B2", + "SE6B2" + ], + [ + "HCLK_SE6B3", + "SE6B3" + ], + [ + "HCLK_SE6C0", + "SE6C0" + ], + [ + "HCLK_SE6C1", + "SE6C1" + ], + [ + "HCLK_SE6C2", + "SE6C2" + ], + [ + "HCLK_SE6C3", + "SE6C3" + ], + [ + "HCLK_SE6D0", + "SE6D0" + ], + [ + "HCLK_SE6D1", + "SE6D1" + ], + [ + "HCLK_SE6D2", + "SE6D2" + ], + [ + "HCLK_SE6D3", + "SE6D3" + ], + [ + "HCLK_SE6E0", + "SE6E0" + ], + [ + "HCLK_SE6E1", + "SE6E1" + ], + [ + "HCLK_SE6E2", + "SE6E2" + ], + [ + "HCLK_SE6E3", + "SE6E3" + ], + [ + "HCLK_SL1END0", + "SL1END0" + ], + [ + "HCLK_SL1END1", + "SL1END1" + ], + [ + "HCLK_SL1END2", + "SL1END2" + ], + [ + "HCLK_SL1END3", + "SL1END3" + ], + [ + "HCLK_SR1BEG3", + "SR1END3" + ], + [ + "HCLK_SR1END1", + "SR1END1" + ], + [ + "HCLK_SR1END2", + "SR1END2" + ], + [ + "HCLK_SR1END_N3_3", + "SR1END3" + ], + [ + "HCLK_SS2A0", + "SS2A0" + ], + [ + "HCLK_SS2A1", + "SS2A1" + ], + [ + "HCLK_SS2A2", + "SS2A2" + ], + [ + "HCLK_SS2A3", + "SS2END3" + ], + [ + "HCLK_SS2BEG3", + "SS2A3" + ], + [ + "HCLK_SS2END0", + "SS2END0" + ], + [ + "HCLK_SS2END1", + "SS2END1" + ], + [ + "HCLK_SS2END2", + "SS2END2" + ], + [ + "HCLK_SS2END_N0_3", + "SS2END3" + ], + [ + "HCLK_SS6A0", + "SS6A0" + ], + [ + "HCLK_SS6A1", + "SS6A1" + ], + [ + "HCLK_SS6A2", + "SS6A2" + ], + [ + "HCLK_SS6A3", + "SS6A3" + ], + [ + "HCLK_SS6B0", + "SS6B0" + ], + [ + "HCLK_SS6B1", + "SS6B1" + ], + [ + "HCLK_SS6B2", + "SS6B2" + ], + [ + "HCLK_SS6B3", + "SS6B3" + ], + [ + "HCLK_SS6C0", + "SS6C0" + ], + [ + "HCLK_SS6C1", + "SS6C1" + ], + [ + "HCLK_SS6C2", + "SS6C2" + ], + [ + "HCLK_SS6C3", + "SS6C3" + ], + [ + "HCLK_SS6D0", + "SS6D0" + ], + [ + "HCLK_SS6D1", + "SS6D1" + ], + [ + "HCLK_SS6D2", + "SS6D2" + ], + [ + "HCLK_SS6D3", + "SS6D3" + ], + [ + "HCLK_SS6E0", + "SS6E0" + ], + [ + "HCLK_SS6E1", + "SS6E1" + ], + [ + "HCLK_SS6E2", + "SS6E2" + ], + [ + "HCLK_SS6E3", + "SS6E3" + ], + [ + "HCLK_SS6END0", + "SS6END0" + ], + [ + "HCLK_SS6END1", + "SS6END1" + ], + [ + "HCLK_SS6END2", + "SS6END2" + ], + [ + "HCLK_SS6END3", + "SS6END3" + ], + [ + "HCLK_SS6END_N0_3", + "SS6END3" + ], + [ + "HCLK_SW2A3", + "SW2A3" + ], + [ + "HCLK_SW2END0", + "SW2A0" + ], + [ + "HCLK_SW2END1", + "SW2A1" + ], + [ + "HCLK_SW2END2", + "SW2A2" + ], + [ + "HCLK_SW2END_N0_3", + "SW2END3" + ], + [ + "HCLK_SW6B0", + "SW6B0" + ], + [ + "HCLK_SW6B1", + "SW6B1" + ], + [ + "HCLK_SW6B2", + "SW6B2" + ], + [ + "HCLK_SW6B3", + "SW6B3" + ], + [ + "HCLK_SW6C0", + "SW6C0" + ], + [ + "HCLK_SW6C1", + "SW6C1" + ], + [ + "HCLK_SW6C2", + "SW6C2" + ], + [ + "HCLK_SW6C3", + "SW6C3" + ], + [ + "HCLK_SW6D0", + "SW6D0" + ], + [ + "HCLK_SW6D1", + "SW6D1" + ], + [ + "HCLK_SW6D2", + "SW6D2" + ], + [ + "HCLK_SW6D3", + "SW6D3" + ], + [ + "HCLK_SW6E0", + "SW6E0" + ], + [ + "HCLK_SW6E1", + "SW6E1" + ], + [ + "HCLK_SW6E2", + "SW6E2" + ], + [ + "HCLK_SW6E3", + "SW6E3" + ], + [ + "HCLK_SW6END3", + "SW6END3" + ], + [ + "HCLK_WL1BEG3", + "WL1BEG3" + ], + [ + "HCLK_WL1END3", + "WL1END3" + ], + [ + "HCLK_WR1BEG_S0", + "WR1BEG_S0" + ], + [ + "HCLK_WR1END_S1_0", + "WR1END_S1_0" + ], + [ + "HCLK_WW2END3", + "WW2END3" + ], + [ + "HCLK_WW4END_S0_0", + "WW4END_S0_0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "HCLK_R_BOT_UTURN", + "INT_R" + ], + "wire_pairs": [ + [ + "B_TERM_UTURN_INT_ER1BEG0", + "EL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_ER1BEG0", + "ER1BEG0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "EL1END0" + ], + [ + "B_TERM_UTURN_INT_ER1END_N3_3", + "ER1END_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "BYP_BOUNCE_N3_7" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE0", + "FAN_BOUNCE0" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "BYP_BOUNCE_N3_3" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE2", + "FAN_BOUNCE2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "BYP_BOUNCE_N3_6" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE4", + "FAN_BOUNCE4" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "BYP_BOUNCE_N3_2" + ], + [ + "B_TERM_UTURN_INT_FAN_BOUNCE6", + "FAN_BOUNCE6" + ], + [ + "B_TERM_UTURN_INT_LV2", + "LV2" + ], + [ + "B_TERM_UTURN_INT_LV2", + "LV17" + ], + [ + "B_TERM_UTURN_INT_LV3", + "LV3" + ], + [ + "B_TERM_UTURN_INT_LV3", + "LV16" + ], + [ + "B_TERM_UTURN_INT_LV4", + "LV4" + ], + [ + "B_TERM_UTURN_INT_LV4", + "LV15" + ], + [ + "B_TERM_UTURN_INT_LV5", + "LV5" + ], + [ + "B_TERM_UTURN_INT_LV5", + "LV14" + ], + [ + "B_TERM_UTURN_INT_LV6", + "LV6" + ], + [ + "B_TERM_UTURN_INT_LV6", + "LV13" + ], + [ + "B_TERM_UTURN_INT_LV7", + "LV7" + ], + [ + "B_TERM_UTURN_INT_LV7", + "LV12" + ], + [ + "B_TERM_UTURN_INT_LV8", + "LV8" + ], + [ + "B_TERM_UTURN_INT_LV8", + "LV11" + ], + [ + "B_TERM_UTURN_INT_LV9", + "LV9" + ], + [ + "B_TERM_UTURN_INT_LV9", + "LV10" + ], + [ + "B_TERM_UTURN_INT_LV18", + "LV1" + ], + [ + "B_TERM_UTURN_INT_LV18", + "LV18" + ], + [ + "B_TERM_UTURN_INT_LVB0", + "LVB1" + ], + [ + "B_TERM_UTURN_INT_LVB0", + "LVB12" + ], + [ + "B_TERM_UTURN_INT_LVB1", + "LVB2" + ], + [ + "B_TERM_UTURN_INT_LVB1", + "LVB11" + ], + [ + "B_TERM_UTURN_INT_LVB2", + "LVB3" + ], + [ + "B_TERM_UTURN_INT_LVB2", + "LVB10" + ], + [ + "B_TERM_UTURN_INT_LVB3", + "LVB4" + ], + [ + "B_TERM_UTURN_INT_LVB3", + "LVB9" + ], + [ + "B_TERM_UTURN_INT_LVB4", + "LVB5" + ], + [ + "B_TERM_UTURN_INT_LVB4", + "LVB8" + ], + [ + "B_TERM_UTURN_INT_LVB5", + "LVB6" + ], + [ + "B_TERM_UTURN_INT_LVB5", + "LVB7" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "NE2A3" + ], + [ + "B_TERM_UTURN_INT_SE2BEG0", + "SE2BEG0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "NE2A2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG1", + "SE2BEG1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "NE2A1" + ], + [ + "B_TERM_UTURN_INT_SE2BEG2", + "SE2BEG2" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "NE2A0" + ], + [ + "B_TERM_UTURN_INT_SE2BEG3", + "SE2BEG3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "NE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6A0", + "SE6A0" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "NE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6A1", + "SE6A1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "NE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6A2", + "SE6A2" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "NE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6A3", + "SE6A3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "NE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6B0", + "SE6B0" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "NE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6B1", + "SE6B1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "NE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6B2", + "SE6B2" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "NE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6B3", + "SE6B3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "NE6D3" + ], + [ + "B_TERM_UTURN_INT_SE6C0", + "SE6C0" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "NE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6C1", + "SE6C1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "NE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6C2", + "SE6C2" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "NE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6C3", + "SE6C3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "NE6E3" + ], + [ + "B_TERM_UTURN_INT_SE6D0", + "SE6D0" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "NE6E2" + ], + [ + "B_TERM_UTURN_INT_SE6D1", + "SE6D1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "NE6E1" + ], + [ + "B_TERM_UTURN_INT_SE6D2", + "SE6D2" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "NE6E0" + ], + [ + "B_TERM_UTURN_INT_SE6D3", + "SE6D3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "NR1END3" + ], + [ + "B_TERM_UTURN_INT_SL1BEG0", + "SL1BEG0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "NR1END2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG1", + "SL1BEG1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "NR1END1" + ], + [ + "B_TERM_UTURN_INT_SL1BEG2", + "SL1BEG2" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "NR1END0" + ], + [ + "B_TERM_UTURN_INT_SL1BEG3", + "SL1BEG3" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "NL1END2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG1", + "SR1BEG1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "NL1END1" + ], + [ + "B_TERM_UTURN_INT_SR1BEG2", + "SR1BEG2" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "NL1END0" + ], + [ + "B_TERM_UTURN_INT_SR1BEG3", + "SR1BEG3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "NN2END3" + ], + [ + "B_TERM_UTURN_INT_SS2A0", + "SS2A0" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "NN2END2" + ], + [ + "B_TERM_UTURN_INT_SS2A1", + "SS2A1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "NN2END1" + ], + [ + "B_TERM_UTURN_INT_SS2A2", + "SS2A2" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "NN2END0" + ], + [ + "B_TERM_UTURN_INT_SS2A3", + "SS2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "NN2A3" + ], + [ + "B_TERM_UTURN_INT_SS2BEG0", + "SS2BEG0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "NN2A2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG1", + "SS2BEG1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "NN2A1" + ], + [ + "B_TERM_UTURN_INT_SS2BEG2", + "SS2BEG2" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "NN2A0" + ], + [ + "B_TERM_UTURN_INT_SS2BEG3", + "SS2BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "NN6B3" + ], + [ + "B_TERM_UTURN_INT_SS6A0", + "SS6A0" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "NN6B2" + ], + [ + "B_TERM_UTURN_INT_SS6A1", + "SS6A1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "NN6B1" + ], + [ + "B_TERM_UTURN_INT_SS6A2", + "SS6A2" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "NN6B0" + ], + [ + "B_TERM_UTURN_INT_SS6A3", + "SS6A3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "NN6C3" + ], + [ + "B_TERM_UTURN_INT_SS6B0", + "SS6B0" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "NN6C2" + ], + [ + "B_TERM_UTURN_INT_SS6B1", + "SS6B1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "NN6C1" + ], + [ + "B_TERM_UTURN_INT_SS6B2", + "SS6B2" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "NN6C0" + ], + [ + "B_TERM_UTURN_INT_SS6B3", + "SS6B3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "NN6A3" + ], + [ + "B_TERM_UTURN_INT_SS6BEG0", + "SS6BEG0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "NN6A2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG1", + "SS6BEG1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "NN6A1" + ], + [ + "B_TERM_UTURN_INT_SS6BEG2", + "SS6BEG2" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "NN6A0" + ], + [ + "B_TERM_UTURN_INT_SS6BEG3", + "SS6BEG3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "NN6D3" + ], + [ + "B_TERM_UTURN_INT_SS6C0", + "SS6C0" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "NN6D2" + ], + [ + "B_TERM_UTURN_INT_SS6C1", + "SS6C1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "NN6D1" + ], + [ + "B_TERM_UTURN_INT_SS6C2", + "SS6C2" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "NN6D0" + ], + [ + "B_TERM_UTURN_INT_SS6C3", + "SS6C3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "NN6E3" + ], + [ + "B_TERM_UTURN_INT_SS6D0", + "SS6D0" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "NN6E2" + ], + [ + "B_TERM_UTURN_INT_SS6D1", + "SS6D1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "NN6E1" + ], + [ + "B_TERM_UTURN_INT_SS6D2", + "SS6D2" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "NN6E0" + ], + [ + "B_TERM_UTURN_INT_SS6D3", + "SS6D3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "NN6END3" + ], + [ + "B_TERM_UTURN_INT_SS6E0", + "SS6E0" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "NN6END2" + ], + [ + "B_TERM_UTURN_INT_SS6E1", + "SS6E1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "NN6END1" + ], + [ + "B_TERM_UTURN_INT_SS6E2", + "SS6E2" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "NN6END0" + ], + [ + "B_TERM_UTURN_INT_SS6E3", + "SS6E3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "NW2A3" + ], + [ + "B_TERM_UTURN_INT_SW2BEG0", + "SW2BEG0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "NW2A2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG1", + "SW2BEG1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "NW2A1" + ], + [ + "B_TERM_UTURN_INT_SW2BEG2", + "SW2BEG2" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "NW2A0" + ], + [ + "B_TERM_UTURN_INT_SW2BEG3", + "SW2BEG3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "NW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6A0", + "SW6A0" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "NW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6A1", + "SW6A1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "NW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6A2", + "SW6A2" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "NW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6A3", + "SW6A3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "NW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6B0", + "SW6B0" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "NW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6B1", + "SW6B1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "NW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6B2", + "SW6B2" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "NW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6B3", + "SW6B3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "NW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6C0", + "SW6C0" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "NW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6C1", + "SW6C1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "NW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6C2", + "SW6C2" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "NW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6C3", + "SW6C3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "NW6E3" + ], + [ + "B_TERM_UTURN_INT_SW6D0", + "SW6D0" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "NW6E2" + ], + [ + "B_TERM_UTURN_INT_SW6D1", + "SW6D1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "NW6E1" + ], + [ + "B_TERM_UTURN_INT_SW6D2", + "SW6D2" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "NW6E0" + ], + [ + "B_TERM_UTURN_INT_SW6D3", + "SW6D3" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "NW6END0" + ], + [ + "B_TERM_UTURN_INT_SW6END_N0_3", + "SW6END_N0_3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WL1BEG_N3" + ], + [ + "B_TERM_UTURN_INT_WR1BEG0", + "WR1BEG0" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WL1END_N1_3" + ], + [ + "B_TERM_UTURN_INT_WR1END0", + "WR1END0" + ], + [ + "HCLK_LEAF_CLK_B_TOP0", + "GCLK_B0" + ], + [ + "HCLK_LEAF_CLK_B_TOP1", + "GCLK_B1" + ], + [ + "HCLK_LEAF_CLK_B_TOP2", + "GCLK_B2" + ], + [ + "HCLK_LEAF_CLK_B_TOP3", + "GCLK_B3" + ], + [ + "HCLK_LEAF_CLK_B_TOP4", + "GCLK_B4" + ], + [ + "HCLK_LEAF_CLK_B_TOP5", + "GCLK_B5" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_1", + "INT_FEEDTHRU_1" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_1_EE2A0", + "INT_FEEDTHRU_1_EE2A0" + ], + [ + "INT_FEEDTHRU_1_EE2A1", + "INT_FEEDTHRU_1_EE2A1" + ], + [ + "INT_FEEDTHRU_1_EE2A2", + "INT_FEEDTHRU_1_EE2A2" + ], + [ + "INT_FEEDTHRU_1_EE2A3", + "INT_FEEDTHRU_1_EE2A3" + ], + [ + "INT_FEEDTHRU_1_EE2BEG0", + "INT_FEEDTHRU_1_EE2BEG0" + ], + [ + "INT_FEEDTHRU_1_EE2BEG1", + "INT_FEEDTHRU_1_EE2BEG1" + ], + [ + "INT_FEEDTHRU_1_EE2BEG2", + "INT_FEEDTHRU_1_EE2BEG2" + ], + [ + "INT_FEEDTHRU_1_EE2BEG3", + "INT_FEEDTHRU_1_EE2BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4A0", + "INT_FEEDTHRU_1_EE4A0" + ], + [ + "INT_FEEDTHRU_1_EE4A1", + "INT_FEEDTHRU_1_EE4A1" + ], + [ + "INT_FEEDTHRU_1_EE4A2", + "INT_FEEDTHRU_1_EE4A2" + ], + [ + "INT_FEEDTHRU_1_EE4A3", + "INT_FEEDTHRU_1_EE4A3" + ], + [ + "INT_FEEDTHRU_1_EE4B0", + "INT_FEEDTHRU_1_EE4B0" + ], + [ + "INT_FEEDTHRU_1_EE4B1", + "INT_FEEDTHRU_1_EE4B1" + ], + [ + "INT_FEEDTHRU_1_EE4B2", + "INT_FEEDTHRU_1_EE4B2" + ], + [ + "INT_FEEDTHRU_1_EE4B3", + "INT_FEEDTHRU_1_EE4B3" + ], + [ + "INT_FEEDTHRU_1_EE4BEG0", + "INT_FEEDTHRU_1_EE4BEG0" + ], + [ + "INT_FEEDTHRU_1_EE4BEG1", + "INT_FEEDTHRU_1_EE4BEG1" + ], + [ + "INT_FEEDTHRU_1_EE4BEG2", + "INT_FEEDTHRU_1_EE4BEG2" + ], + [ + "INT_FEEDTHRU_1_EE4BEG3", + "INT_FEEDTHRU_1_EE4BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4C0", + "INT_FEEDTHRU_1_EE4C0" + ], + [ + "INT_FEEDTHRU_1_EE4C1", + "INT_FEEDTHRU_1_EE4C1" + ], + [ + "INT_FEEDTHRU_1_EE4C2", + "INT_FEEDTHRU_1_EE4C2" + ], + [ + "INT_FEEDTHRU_1_EE4C3", + "INT_FEEDTHRU_1_EE4C3" + ], + [ + "INT_FEEDTHRU_1_EL1BEG0", + "INT_FEEDTHRU_1_EL1BEG0" + ], + [ + "INT_FEEDTHRU_1_EL1BEG1", + "INT_FEEDTHRU_1_EL1BEG1" + ], + [ + "INT_FEEDTHRU_1_EL1BEG2", + "INT_FEEDTHRU_1_EL1BEG2" + ], + [ + "INT_FEEDTHRU_1_EL1BEG3", + "INT_FEEDTHRU_1_EL1BEG3" + ], + [ + "INT_FEEDTHRU_1_ER1BEG0", + "INT_FEEDTHRU_1_ER1BEG0" + ], + [ + "INT_FEEDTHRU_1_ER1BEG1", + "INT_FEEDTHRU_1_ER1BEG1" + ], + [ + "INT_FEEDTHRU_1_ER1BEG2", + "INT_FEEDTHRU_1_ER1BEG2" + ], + [ + "INT_FEEDTHRU_1_ER1BEG3", + "INT_FEEDTHRU_1_ER1BEG3" + ], + [ + "INT_FEEDTHRU_1_LH1", + "INT_FEEDTHRU_1_LH1" + ], + [ + "INT_FEEDTHRU_1_LH2", + "INT_FEEDTHRU_1_LH2" + ], + [ + "INT_FEEDTHRU_1_LH3", + "INT_FEEDTHRU_1_LH3" + ], + [ + "INT_FEEDTHRU_1_LH4", + "INT_FEEDTHRU_1_LH4" + ], + [ + "INT_FEEDTHRU_1_LH5", + "INT_FEEDTHRU_1_LH5" + ], + [ + "INT_FEEDTHRU_1_LH6", + "INT_FEEDTHRU_1_LH6" + ], + [ + "INT_FEEDTHRU_1_LH7", + "INT_FEEDTHRU_1_LH7" + ], + [ + "INT_FEEDTHRU_1_LH8", + "INT_FEEDTHRU_1_LH8" + ], + [ + "INT_FEEDTHRU_1_LH9", + "INT_FEEDTHRU_1_LH9" + ], + [ + "INT_FEEDTHRU_1_LH10", + "INT_FEEDTHRU_1_LH10" + ], + [ + "INT_FEEDTHRU_1_LH11", + "INT_FEEDTHRU_1_LH11" + ], + [ + "INT_FEEDTHRU_1_LH12", + "INT_FEEDTHRU_1_LH12" + ], + [ + "INT_FEEDTHRU_1_MONITOR_N", + "INT_FEEDTHRU_1_MONITOR_N" + ], + [ + "INT_FEEDTHRU_1_MONITOR_P", + "INT_FEEDTHRU_1_MONITOR_P" + ], + [ + "INT_FEEDTHRU_1_NE2A0", + "INT_FEEDTHRU_1_NE2A0" + ], + [ + "INT_FEEDTHRU_1_NE2A1", + "INT_FEEDTHRU_1_NE2A1" + ], + [ + "INT_FEEDTHRU_1_NE2A2", + "INT_FEEDTHRU_1_NE2A2" + ], + [ + "INT_FEEDTHRU_1_NE2A3", + "INT_FEEDTHRU_1_NE2A3" + ], + [ + "INT_FEEDTHRU_1_NE4BEG0", + "INT_FEEDTHRU_1_NE4BEG0" + ], + [ + "INT_FEEDTHRU_1_NE4BEG1", + "INT_FEEDTHRU_1_NE4BEG1" + ], + [ + "INT_FEEDTHRU_1_NE4BEG2", + "INT_FEEDTHRU_1_NE4BEG2" + ], + [ + "INT_FEEDTHRU_1_NE4BEG3", + "INT_FEEDTHRU_1_NE4BEG3" + ], + [ + "INT_FEEDTHRU_1_NE4C0", + "INT_FEEDTHRU_1_NE4C0" + ], + [ + "INT_FEEDTHRU_1_NE4C1", + "INT_FEEDTHRU_1_NE4C1" + ], + [ + "INT_FEEDTHRU_1_NE4C2", + "INT_FEEDTHRU_1_NE4C2" + ], + [ + "INT_FEEDTHRU_1_NE4C3", + "INT_FEEDTHRU_1_NE4C3" + ], + [ + "INT_FEEDTHRU_1_NW2A0", + "INT_FEEDTHRU_1_NW2A0" + ], + [ + "INT_FEEDTHRU_1_NW2A1", + "INT_FEEDTHRU_1_NW2A1" + ], + [ + "INT_FEEDTHRU_1_NW2A2", + "INT_FEEDTHRU_1_NW2A2" + ], + [ + "INT_FEEDTHRU_1_NW2A3", + "INT_FEEDTHRU_1_NW2A3" + ], + [ + "INT_FEEDTHRU_1_NW4A0", + "INT_FEEDTHRU_1_NW4A0" + ], + [ + "INT_FEEDTHRU_1_NW4A1", + "INT_FEEDTHRU_1_NW4A1" + ], + [ + "INT_FEEDTHRU_1_NW4A2", + "INT_FEEDTHRU_1_NW4A2" + ], + [ + "INT_FEEDTHRU_1_NW4A3", + "INT_FEEDTHRU_1_NW4A3" + ], + [ + "INT_FEEDTHRU_1_NW4END0", + "INT_FEEDTHRU_1_NW4END0" + ], + [ + "INT_FEEDTHRU_1_NW4END1", + "INT_FEEDTHRU_1_NW4END1" + ], + [ + "INT_FEEDTHRU_1_NW4END2", + "INT_FEEDTHRU_1_NW4END2" + ], + [ + "INT_FEEDTHRU_1_NW4END3", + "INT_FEEDTHRU_1_NW4END3" + ], + [ + "INT_FEEDTHRU_1_SE2A0", + "INT_FEEDTHRU_1_SE2A0" + ], + [ + "INT_FEEDTHRU_1_SE2A1", + "INT_FEEDTHRU_1_SE2A1" + ], + [ + "INT_FEEDTHRU_1_SE2A2", + "INT_FEEDTHRU_1_SE2A2" + ], + [ + "INT_FEEDTHRU_1_SE2A3", + "INT_FEEDTHRU_1_SE2A3" + ], + [ + "INT_FEEDTHRU_1_SE4BEG0", + "INT_FEEDTHRU_1_SE4BEG0" + ], + [ + "INT_FEEDTHRU_1_SE4BEG1", + "INT_FEEDTHRU_1_SE4BEG1" + ], + [ + "INT_FEEDTHRU_1_SE4BEG2", + "INT_FEEDTHRU_1_SE4BEG2" + ], + [ + "INT_FEEDTHRU_1_SE4BEG3", + "INT_FEEDTHRU_1_SE4BEG3" + ], + [ + "INT_FEEDTHRU_1_SE4C0", + "INT_FEEDTHRU_1_SE4C0" + ], + [ + "INT_FEEDTHRU_1_SE4C1", + "INT_FEEDTHRU_1_SE4C1" + ], + [ + "INT_FEEDTHRU_1_SE4C2", + "INT_FEEDTHRU_1_SE4C2" + ], + [ + "INT_FEEDTHRU_1_SE4C3", + "INT_FEEDTHRU_1_SE4C3" + ], + [ + "INT_FEEDTHRU_1_SW2A0", + "INT_FEEDTHRU_1_SW2A0" + ], + [ + "INT_FEEDTHRU_1_SW2A1", + "INT_FEEDTHRU_1_SW2A1" + ], + [ + "INT_FEEDTHRU_1_SW2A2", + "INT_FEEDTHRU_1_SW2A2" + ], + [ + "INT_FEEDTHRU_1_SW2A3", + "INT_FEEDTHRU_1_SW2A3" + ], + [ + "INT_FEEDTHRU_1_SW4A0", + "INT_FEEDTHRU_1_SW4A0" + ], + [ + "INT_FEEDTHRU_1_SW4A1", + "INT_FEEDTHRU_1_SW4A1" + ], + [ + "INT_FEEDTHRU_1_SW4A2", + "INT_FEEDTHRU_1_SW4A2" + ], + [ + "INT_FEEDTHRU_1_SW4A3", + "INT_FEEDTHRU_1_SW4A3" + ], + [ + "INT_FEEDTHRU_1_SW4END0", + "INT_FEEDTHRU_1_SW4END0" + ], + [ + "INT_FEEDTHRU_1_SW4END1", + "INT_FEEDTHRU_1_SW4END1" + ], + [ + "INT_FEEDTHRU_1_SW4END2", + "INT_FEEDTHRU_1_SW4END2" + ], + [ + "INT_FEEDTHRU_1_SW4END3", + "INT_FEEDTHRU_1_SW4END3" + ], + [ + "INT_FEEDTHRU_1_WL1END0", + "INT_FEEDTHRU_1_WL1END0" + ], + [ + "INT_FEEDTHRU_1_WL1END1", + "INT_FEEDTHRU_1_WL1END1" + ], + [ + "INT_FEEDTHRU_1_WL1END2", + "INT_FEEDTHRU_1_WL1END2" + ], + [ + "INT_FEEDTHRU_1_WL1END3", + "INT_FEEDTHRU_1_WL1END3" + ], + [ + "INT_FEEDTHRU_1_WR1END0", + "INT_FEEDTHRU_1_WR1END0" + ], + [ + "INT_FEEDTHRU_1_WR1END1", + "INT_FEEDTHRU_1_WR1END1" + ], + [ + "INT_FEEDTHRU_1_WR1END2", + "INT_FEEDTHRU_1_WR1END2" + ], + [ + "INT_FEEDTHRU_1_WR1END3", + "INT_FEEDTHRU_1_WR1END3" + ], + [ + "INT_FEEDTHRU_1_WW2A0", + "INT_FEEDTHRU_1_WW2A0" + ], + [ + "INT_FEEDTHRU_1_WW2A1", + "INT_FEEDTHRU_1_WW2A1" + ], + [ + "INT_FEEDTHRU_1_WW2A2", + "INT_FEEDTHRU_1_WW2A2" + ], + [ + "INT_FEEDTHRU_1_WW2A3", + "INT_FEEDTHRU_1_WW2A3" + ], + [ + "INT_FEEDTHRU_1_WW2END0", + "INT_FEEDTHRU_1_WW2END0" + ], + [ + "INT_FEEDTHRU_1_WW2END1", + "INT_FEEDTHRU_1_WW2END1" + ], + [ + "INT_FEEDTHRU_1_WW2END2", + "INT_FEEDTHRU_1_WW2END2" + ], + [ + "INT_FEEDTHRU_1_WW2END3", + "INT_FEEDTHRU_1_WW2END3" + ], + [ + "INT_FEEDTHRU_1_WW4A0", + "INT_FEEDTHRU_1_WW4A0" + ], + [ + "INT_FEEDTHRU_1_WW4A1", + "INT_FEEDTHRU_1_WW4A1" + ], + [ + "INT_FEEDTHRU_1_WW4A2", + "INT_FEEDTHRU_1_WW4A2" + ], + [ + "INT_FEEDTHRU_1_WW4A3", + "INT_FEEDTHRU_1_WW4A3" + ], + [ + "INT_FEEDTHRU_1_WW4B0", + "INT_FEEDTHRU_1_WW4B0" + ], + [ + "INT_FEEDTHRU_1_WW4B1", + "INT_FEEDTHRU_1_WW4B1" + ], + [ + "INT_FEEDTHRU_1_WW4B2", + "INT_FEEDTHRU_1_WW4B2" + ], + [ + "INT_FEEDTHRU_1_WW4B3", + "INT_FEEDTHRU_1_WW4B3" + ], + [ + "INT_FEEDTHRU_1_WW4C0", + "INT_FEEDTHRU_1_WW4C0" + ], + [ + "INT_FEEDTHRU_1_WW4C1", + "INT_FEEDTHRU_1_WW4C1" + ], + [ + "INT_FEEDTHRU_1_WW4C2", + "INT_FEEDTHRU_1_WW4C2" + ], + [ + "INT_FEEDTHRU_1_WW4C3", + "INT_FEEDTHRU_1_WW4C3" + ], + [ + "INT_FEEDTHRU_1_WW4END0", + "INT_FEEDTHRU_1_WW4END0" + ], + [ + "INT_FEEDTHRU_1_WW4END1", + "INT_FEEDTHRU_1_WW4END1" + ], + [ + "INT_FEEDTHRU_1_WW4END2", + "INT_FEEDTHRU_1_WW4END2" + ], + [ + "INT_FEEDTHRU_1_WW4END3", + "INT_FEEDTHRU_1_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_1", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_1_EE2A0", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "INT_FEEDTHRU_1_EE2A1", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "INT_FEEDTHRU_1_EE2A2", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "INT_FEEDTHRU_1_EE2A3", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "INT_FEEDTHRU_1_EE2BEG0", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "INT_FEEDTHRU_1_EE2BEG1", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "INT_FEEDTHRU_1_EE2BEG2", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "INT_FEEDTHRU_1_EE2BEG3", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4A0", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "INT_FEEDTHRU_1_EE4A1", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "INT_FEEDTHRU_1_EE4A2", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "INT_FEEDTHRU_1_EE4A3", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "INT_FEEDTHRU_1_EE4B0", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "INT_FEEDTHRU_1_EE4B1", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "INT_FEEDTHRU_1_EE4B2", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "INT_FEEDTHRU_1_EE4B3", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "INT_FEEDTHRU_1_EE4BEG0", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "INT_FEEDTHRU_1_EE4BEG1", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "INT_FEEDTHRU_1_EE4BEG2", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "INT_FEEDTHRU_1_EE4BEG3", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4C0", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "INT_FEEDTHRU_1_EE4C1", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "INT_FEEDTHRU_1_EE4C2", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "INT_FEEDTHRU_1_EE4C3", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "INT_FEEDTHRU_1_EL1BEG0", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "INT_FEEDTHRU_1_EL1BEG1", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "INT_FEEDTHRU_1_EL1BEG2", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "INT_FEEDTHRU_1_EL1BEG3", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "INT_FEEDTHRU_1_ER1BEG0", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "INT_FEEDTHRU_1_ER1BEG1", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "INT_FEEDTHRU_1_ER1BEG2", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "INT_FEEDTHRU_1_ER1BEG3", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "INT_FEEDTHRU_1_LH1", + "INT_FEEDTHRU_2_LH1" + ], + [ + "INT_FEEDTHRU_1_LH2", + "INT_FEEDTHRU_2_LH2" + ], + [ + "INT_FEEDTHRU_1_LH3", + "INT_FEEDTHRU_2_LH3" + ], + [ + "INT_FEEDTHRU_1_LH4", + "INT_FEEDTHRU_2_LH4" + ], + [ + "INT_FEEDTHRU_1_LH5", + "INT_FEEDTHRU_2_LH5" + ], + [ + "INT_FEEDTHRU_1_LH6", + "INT_FEEDTHRU_2_LH6" + ], + [ + "INT_FEEDTHRU_1_LH7", + "INT_FEEDTHRU_2_LH7" + ], + [ + "INT_FEEDTHRU_1_LH8", + "INT_FEEDTHRU_2_LH8" + ], + [ + "INT_FEEDTHRU_1_LH9", + "INT_FEEDTHRU_2_LH9" + ], + [ + "INT_FEEDTHRU_1_LH10", + "INT_FEEDTHRU_2_LH10" + ], + [ + "INT_FEEDTHRU_1_LH11", + "INT_FEEDTHRU_2_LH11" + ], + [ + "INT_FEEDTHRU_1_LH12", + "INT_FEEDTHRU_2_LH12" + ], + [ + "INT_FEEDTHRU_1_MONITOR_N", + "INT_FEEDTHRU_2_MONITOR_N" + ], + [ + "INT_FEEDTHRU_1_MONITOR_P", + "INT_FEEDTHRU_2_MONITOR_P" + ], + [ + "INT_FEEDTHRU_1_NE2A0", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "INT_FEEDTHRU_1_NE2A1", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "INT_FEEDTHRU_1_NE2A2", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "INT_FEEDTHRU_1_NE2A3", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "INT_FEEDTHRU_1_NE4BEG0", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "INT_FEEDTHRU_1_NE4BEG1", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "INT_FEEDTHRU_1_NE4BEG2", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "INT_FEEDTHRU_1_NE4BEG3", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "INT_FEEDTHRU_1_NE4C0", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "INT_FEEDTHRU_1_NE4C1", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "INT_FEEDTHRU_1_NE4C2", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "INT_FEEDTHRU_1_NE4C3", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "INT_FEEDTHRU_1_NW2A0", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "INT_FEEDTHRU_1_NW2A1", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "INT_FEEDTHRU_1_NW2A2", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "INT_FEEDTHRU_1_NW2A3", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "INT_FEEDTHRU_1_NW4A0", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "INT_FEEDTHRU_1_NW4A1", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "INT_FEEDTHRU_1_NW4A2", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "INT_FEEDTHRU_1_NW4A3", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "INT_FEEDTHRU_1_NW4END0", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "INT_FEEDTHRU_1_NW4END1", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "INT_FEEDTHRU_1_NW4END2", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "INT_FEEDTHRU_1_NW4END3", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "INT_FEEDTHRU_1_SE2A0", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "INT_FEEDTHRU_1_SE2A1", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "INT_FEEDTHRU_1_SE2A2", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "INT_FEEDTHRU_1_SE2A3", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "INT_FEEDTHRU_1_SE4BEG0", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "INT_FEEDTHRU_1_SE4BEG1", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "INT_FEEDTHRU_1_SE4BEG2", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "INT_FEEDTHRU_1_SE4BEG3", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "INT_FEEDTHRU_1_SE4C0", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "INT_FEEDTHRU_1_SE4C1", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "INT_FEEDTHRU_1_SE4C2", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "INT_FEEDTHRU_1_SE4C3", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "INT_FEEDTHRU_1_SW2A0", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "INT_FEEDTHRU_1_SW2A1", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "INT_FEEDTHRU_1_SW2A2", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "INT_FEEDTHRU_1_SW2A3", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "INT_FEEDTHRU_1_SW4A0", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "INT_FEEDTHRU_1_SW4A1", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "INT_FEEDTHRU_1_SW4A2", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "INT_FEEDTHRU_1_SW4A3", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "INT_FEEDTHRU_1_SW4END0", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "INT_FEEDTHRU_1_SW4END1", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "INT_FEEDTHRU_1_SW4END2", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "INT_FEEDTHRU_1_SW4END3", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "INT_FEEDTHRU_1_WL1END0", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "INT_FEEDTHRU_1_WL1END1", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "INT_FEEDTHRU_1_WL1END2", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "INT_FEEDTHRU_1_WL1END3", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "INT_FEEDTHRU_1_WR1END0", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "INT_FEEDTHRU_1_WR1END1", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "INT_FEEDTHRU_1_WR1END2", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "INT_FEEDTHRU_1_WR1END3", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "INT_FEEDTHRU_1_WW2A0", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "INT_FEEDTHRU_1_WW2A1", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "INT_FEEDTHRU_1_WW2A2", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "INT_FEEDTHRU_1_WW2A3", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "INT_FEEDTHRU_1_WW2END0", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "INT_FEEDTHRU_1_WW2END1", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "INT_FEEDTHRU_1_WW2END2", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "INT_FEEDTHRU_1_WW2END3", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "INT_FEEDTHRU_1_WW4A0", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "INT_FEEDTHRU_1_WW4A1", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "INT_FEEDTHRU_1_WW4A2", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "INT_FEEDTHRU_1_WW4A3", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "INT_FEEDTHRU_1_WW4B0", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "INT_FEEDTHRU_1_WW4B1", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "INT_FEEDTHRU_1_WW4B2", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "INT_FEEDTHRU_1_WW4B3", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "INT_FEEDTHRU_1_WW4C0", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "INT_FEEDTHRU_1_WW4C1", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "INT_FEEDTHRU_1_WW4C2", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "INT_FEEDTHRU_1_WW4C3", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "INT_FEEDTHRU_1_WW4END0", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "INT_FEEDTHRU_1_WW4END1", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "INT_FEEDTHRU_1_WW4END2", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "INT_FEEDTHRU_1_WW4END3", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_1", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_1_EE2A0", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "INT_FEEDTHRU_1_EE2A1", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "INT_FEEDTHRU_1_EE2A2", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "INT_FEEDTHRU_1_EE2A3", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "INT_FEEDTHRU_1_EE2BEG0", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "INT_FEEDTHRU_1_EE2BEG1", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "INT_FEEDTHRU_1_EE2BEG2", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "INT_FEEDTHRU_1_EE2BEG3", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4A0", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "INT_FEEDTHRU_1_EE4A1", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "INT_FEEDTHRU_1_EE4A2", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "INT_FEEDTHRU_1_EE4A3", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "INT_FEEDTHRU_1_EE4B0", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "INT_FEEDTHRU_1_EE4B1", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "INT_FEEDTHRU_1_EE4B2", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "INT_FEEDTHRU_1_EE4B3", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "INT_FEEDTHRU_1_EE4BEG0", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "INT_FEEDTHRU_1_EE4BEG1", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "INT_FEEDTHRU_1_EE4BEG2", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "INT_FEEDTHRU_1_EE4BEG3", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4C0", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "INT_FEEDTHRU_1_EE4C1", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "INT_FEEDTHRU_1_EE4C2", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "INT_FEEDTHRU_1_EE4C3", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "INT_FEEDTHRU_1_EL1BEG0", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "INT_FEEDTHRU_1_EL1BEG1", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "INT_FEEDTHRU_1_EL1BEG2", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "INT_FEEDTHRU_1_EL1BEG3", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "INT_FEEDTHRU_1_ER1BEG0", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "INT_FEEDTHRU_1_ER1BEG1", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "INT_FEEDTHRU_1_ER1BEG2", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "INT_FEEDTHRU_1_ER1BEG3", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "INT_FEEDTHRU_1_LH1", + "INT_FEEDTHRU_2_LH1" + ], + [ + "INT_FEEDTHRU_1_LH2", + "INT_FEEDTHRU_2_LH2" + ], + [ + "INT_FEEDTHRU_1_LH3", + "INT_FEEDTHRU_2_LH3" + ], + [ + "INT_FEEDTHRU_1_LH4", + "INT_FEEDTHRU_2_LH4" + ], + [ + "INT_FEEDTHRU_1_LH5", + "INT_FEEDTHRU_2_LH5" + ], + [ + "INT_FEEDTHRU_1_LH6", + "INT_FEEDTHRU_2_LH6" + ], + [ + "INT_FEEDTHRU_1_LH7", + "INT_FEEDTHRU_2_LH7" + ], + [ + "INT_FEEDTHRU_1_LH8", + "INT_FEEDTHRU_2_LH8" + ], + [ + "INT_FEEDTHRU_1_LH9", + "INT_FEEDTHRU_2_LH9" + ], + [ + "INT_FEEDTHRU_1_LH10", + "INT_FEEDTHRU_2_LH10" + ], + [ + "INT_FEEDTHRU_1_LH11", + "INT_FEEDTHRU_2_LH11" + ], + [ + "INT_FEEDTHRU_1_LH12", + "INT_FEEDTHRU_2_LH12" + ], + [ + "INT_FEEDTHRU_1_MONITOR_N", + "INT_FEEDTHRU_2_MONITOR_N" + ], + [ + "INT_FEEDTHRU_1_MONITOR_P", + "INT_FEEDTHRU_2_MONITOR_P" + ], + [ + "INT_FEEDTHRU_1_NE2A0", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "INT_FEEDTHRU_1_NE2A1", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "INT_FEEDTHRU_1_NE2A2", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "INT_FEEDTHRU_1_NE2A3", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "INT_FEEDTHRU_1_NE4BEG0", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "INT_FEEDTHRU_1_NE4BEG1", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "INT_FEEDTHRU_1_NE4BEG2", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "INT_FEEDTHRU_1_NE4BEG3", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "INT_FEEDTHRU_1_NE4C0", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "INT_FEEDTHRU_1_NE4C1", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "INT_FEEDTHRU_1_NE4C2", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "INT_FEEDTHRU_1_NE4C3", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "INT_FEEDTHRU_1_NW2A0", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "INT_FEEDTHRU_1_NW2A1", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "INT_FEEDTHRU_1_NW2A2", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "INT_FEEDTHRU_1_NW2A3", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "INT_FEEDTHRU_1_NW4A0", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "INT_FEEDTHRU_1_NW4A1", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "INT_FEEDTHRU_1_NW4A2", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "INT_FEEDTHRU_1_NW4A3", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "INT_FEEDTHRU_1_NW4END0", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "INT_FEEDTHRU_1_NW4END1", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "INT_FEEDTHRU_1_NW4END2", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "INT_FEEDTHRU_1_NW4END3", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "INT_FEEDTHRU_1_SE2A0", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "INT_FEEDTHRU_1_SE2A1", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "INT_FEEDTHRU_1_SE2A2", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "INT_FEEDTHRU_1_SE2A3", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "INT_FEEDTHRU_1_SE4BEG0", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "INT_FEEDTHRU_1_SE4BEG1", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "INT_FEEDTHRU_1_SE4BEG2", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "INT_FEEDTHRU_1_SE4BEG3", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "INT_FEEDTHRU_1_SE4C0", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "INT_FEEDTHRU_1_SE4C1", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "INT_FEEDTHRU_1_SE4C2", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "INT_FEEDTHRU_1_SE4C3", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "INT_FEEDTHRU_1_SW2A0", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "INT_FEEDTHRU_1_SW2A1", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "INT_FEEDTHRU_1_SW2A2", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "INT_FEEDTHRU_1_SW2A3", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "INT_FEEDTHRU_1_SW4A0", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "INT_FEEDTHRU_1_SW4A1", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "INT_FEEDTHRU_1_SW4A2", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "INT_FEEDTHRU_1_SW4A3", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "INT_FEEDTHRU_1_SW4END0", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "INT_FEEDTHRU_1_SW4END1", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "INT_FEEDTHRU_1_SW4END2", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "INT_FEEDTHRU_1_SW4END3", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "INT_FEEDTHRU_1_WL1END0", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "INT_FEEDTHRU_1_WL1END1", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "INT_FEEDTHRU_1_WL1END2", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "INT_FEEDTHRU_1_WL1END3", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "INT_FEEDTHRU_1_WR1END0", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "INT_FEEDTHRU_1_WR1END1", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "INT_FEEDTHRU_1_WR1END2", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "INT_FEEDTHRU_1_WR1END3", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "INT_FEEDTHRU_1_WW2A0", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "INT_FEEDTHRU_1_WW2A1", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "INT_FEEDTHRU_1_WW2A2", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "INT_FEEDTHRU_1_WW2A3", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "INT_FEEDTHRU_1_WW2END0", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "INT_FEEDTHRU_1_WW2END1", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "INT_FEEDTHRU_1_WW2END2", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "INT_FEEDTHRU_1_WW2END3", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "INT_FEEDTHRU_1_WW4A0", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "INT_FEEDTHRU_1_WW4A1", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "INT_FEEDTHRU_1_WW4A2", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "INT_FEEDTHRU_1_WW4A3", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "INT_FEEDTHRU_1_WW4B0", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "INT_FEEDTHRU_1_WW4B1", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "INT_FEEDTHRU_1_WW4B2", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "INT_FEEDTHRU_1_WW4B3", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "INT_FEEDTHRU_1_WW4C0", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "INT_FEEDTHRU_1_WW4C1", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "INT_FEEDTHRU_1_WW4C2", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "INT_FEEDTHRU_1_WW4C3", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "INT_FEEDTHRU_1_WW4END0", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "INT_FEEDTHRU_1_WW4END1", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "INT_FEEDTHRU_1_WW4END2", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "INT_FEEDTHRU_1_WW4END3", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_1", + "VBRK" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_1_EE2A0", + "VBRK_EE2A0" + ], + [ + "INT_FEEDTHRU_1_EE2A1", + "VBRK_EE2A1" + ], + [ + "INT_FEEDTHRU_1_EE2A2", + "VBRK_EE2A2" + ], + [ + "INT_FEEDTHRU_1_EE2A3", + "VBRK_EE2A3" + ], + [ + "INT_FEEDTHRU_1_EE2BEG0", + "VBRK_EE2BEG0" + ], + [ + "INT_FEEDTHRU_1_EE2BEG1", + "VBRK_EE2BEG1" + ], + [ + "INT_FEEDTHRU_1_EE2BEG2", + "VBRK_EE2BEG2" + ], + [ + "INT_FEEDTHRU_1_EE2BEG3", + "VBRK_EE2BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4A0", + "VBRK_EE4A0" + ], + [ + "INT_FEEDTHRU_1_EE4A1", + "VBRK_EE4A1" + ], + [ + "INT_FEEDTHRU_1_EE4A2", + "VBRK_EE4A2" + ], + [ + "INT_FEEDTHRU_1_EE4A3", + "VBRK_EE4A3" + ], + [ + "INT_FEEDTHRU_1_EE4B0", + "VBRK_EE4B0" + ], + [ + "INT_FEEDTHRU_1_EE4B1", + "VBRK_EE4B1" + ], + [ + "INT_FEEDTHRU_1_EE4B2", + "VBRK_EE4B2" + ], + [ + "INT_FEEDTHRU_1_EE4B3", + "VBRK_EE4B3" + ], + [ + "INT_FEEDTHRU_1_EE4BEG0", + "VBRK_EE4BEG0" + ], + [ + "INT_FEEDTHRU_1_EE4BEG1", + "VBRK_EE4BEG1" + ], + [ + "INT_FEEDTHRU_1_EE4BEG2", + "VBRK_EE4BEG2" + ], + [ + "INT_FEEDTHRU_1_EE4BEG3", + "VBRK_EE4BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4C0", + "VBRK_EE4C0" + ], + [ + "INT_FEEDTHRU_1_EE4C1", + "VBRK_EE4C1" + ], + [ + "INT_FEEDTHRU_1_EE4C2", + "VBRK_EE4C2" + ], + [ + "INT_FEEDTHRU_1_EE4C3", + "VBRK_EE4C3" + ], + [ + "INT_FEEDTHRU_1_EL1BEG0", + "VBRK_EL1BEG0" + ], + [ + "INT_FEEDTHRU_1_EL1BEG1", + "VBRK_EL1BEG1" + ], + [ + "INT_FEEDTHRU_1_EL1BEG2", + "VBRK_EL1BEG2" + ], + [ + "INT_FEEDTHRU_1_EL1BEG3", + "VBRK_EL1BEG3" + ], + [ + "INT_FEEDTHRU_1_ER1BEG0", + "VBRK_ER1BEG0" + ], + [ + "INT_FEEDTHRU_1_ER1BEG1", + "VBRK_ER1BEG1" + ], + [ + "INT_FEEDTHRU_1_ER1BEG2", + "VBRK_ER1BEG2" + ], + [ + "INT_FEEDTHRU_1_ER1BEG3", + "VBRK_ER1BEG3" + ], + [ + "INT_FEEDTHRU_1_LH1", + "VBRK_LH1" + ], + [ + "INT_FEEDTHRU_1_LH2", + "VBRK_LH2" + ], + [ + "INT_FEEDTHRU_1_LH3", + "VBRK_LH3" + ], + [ + "INT_FEEDTHRU_1_LH4", + "VBRK_LH4" + ], + [ + "INT_FEEDTHRU_1_LH5", + "VBRK_LH5" + ], + [ + "INT_FEEDTHRU_1_LH6", + "VBRK_LH6" + ], + [ + "INT_FEEDTHRU_1_LH7", + "VBRK_LH7" + ], + [ + "INT_FEEDTHRU_1_LH8", + "VBRK_LH8" + ], + [ + "INT_FEEDTHRU_1_LH9", + "VBRK_LH9" + ], + [ + "INT_FEEDTHRU_1_LH10", + "VBRK_LH10" + ], + [ + "INT_FEEDTHRU_1_LH11", + "VBRK_LH11" + ], + [ + "INT_FEEDTHRU_1_LH12", + "VBRK_LH12" + ], + [ + "INT_FEEDTHRU_1_MONITOR_N", + "VBRK_MONITOR_N" + ], + [ + "INT_FEEDTHRU_1_MONITOR_P", + "VBRK_MONITOR_P" + ], + [ + "INT_FEEDTHRU_1_NE2A0", + "VBRK_NE2A0" + ], + [ + "INT_FEEDTHRU_1_NE2A1", + "VBRK_NE2A1" + ], + [ + "INT_FEEDTHRU_1_NE2A2", + "VBRK_NE2A2" + ], + [ + "INT_FEEDTHRU_1_NE2A3", + "VBRK_NE2A3" + ], + [ + "INT_FEEDTHRU_1_NE4BEG0", + "VBRK_NE4BEG0" + ], + [ + "INT_FEEDTHRU_1_NE4BEG1", + "VBRK_NE4BEG1" + ], + [ + "INT_FEEDTHRU_1_NE4BEG2", + "VBRK_NE4BEG2" + ], + [ + "INT_FEEDTHRU_1_NE4BEG3", + "VBRK_NE4BEG3" + ], + [ + "INT_FEEDTHRU_1_NE4C0", + "VBRK_NE4C0" + ], + [ + "INT_FEEDTHRU_1_NE4C1", + "VBRK_NE4C1" + ], + [ + "INT_FEEDTHRU_1_NE4C2", + "VBRK_NE4C2" + ], + [ + "INT_FEEDTHRU_1_NE4C3", + "VBRK_NE4C3" + ], + [ + "INT_FEEDTHRU_1_NW2A0", + "VBRK_NW2A0" + ], + [ + "INT_FEEDTHRU_1_NW2A1", + "VBRK_NW2A1" + ], + [ + "INT_FEEDTHRU_1_NW2A2", + "VBRK_NW2A2" + ], + [ + "INT_FEEDTHRU_1_NW2A3", + "VBRK_NW2A3" + ], + [ + "INT_FEEDTHRU_1_NW4A0", + "VBRK_NW4A0" + ], + [ + "INT_FEEDTHRU_1_NW4A1", + "VBRK_NW4A1" + ], + [ + "INT_FEEDTHRU_1_NW4A2", + "VBRK_NW4A2" + ], + [ + "INT_FEEDTHRU_1_NW4A3", + "VBRK_NW4A3" + ], + [ + "INT_FEEDTHRU_1_NW4END0", + "VBRK_NW4END0" + ], + [ + "INT_FEEDTHRU_1_NW4END1", + "VBRK_NW4END1" + ], + [ + "INT_FEEDTHRU_1_NW4END2", + "VBRK_NW4END2" + ], + [ + "INT_FEEDTHRU_1_NW4END3", + "VBRK_NW4END3" + ], + [ + "INT_FEEDTHRU_1_SE2A0", + "VBRK_SE2A0" + ], + [ + "INT_FEEDTHRU_1_SE2A1", + "VBRK_SE2A1" + ], + [ + "INT_FEEDTHRU_1_SE2A2", + "VBRK_SE2A2" + ], + [ + "INT_FEEDTHRU_1_SE2A3", + "VBRK_SE2A3" + ], + [ + "INT_FEEDTHRU_1_SE4BEG0", + "VBRK_SE4BEG0" + ], + [ + "INT_FEEDTHRU_1_SE4BEG1", + "VBRK_SE4BEG1" + ], + [ + "INT_FEEDTHRU_1_SE4BEG2", + "VBRK_SE4BEG2" + ], + [ + "INT_FEEDTHRU_1_SE4BEG3", + "VBRK_SE4BEG3" + ], + [ + "INT_FEEDTHRU_1_SE4C0", + "VBRK_SE4C0" + ], + [ + "INT_FEEDTHRU_1_SE4C1", + "VBRK_SE4C1" + ], + [ + "INT_FEEDTHRU_1_SE4C2", + "VBRK_SE4C2" + ], + [ + "INT_FEEDTHRU_1_SE4C3", + "VBRK_SE4C3" + ], + [ + "INT_FEEDTHRU_1_SW2A0", + "VBRK_SW2A0" + ], + [ + "INT_FEEDTHRU_1_SW2A1", + "VBRK_SW2A1" + ], + [ + "INT_FEEDTHRU_1_SW2A2", + "VBRK_SW2A2" + ], + [ + "INT_FEEDTHRU_1_SW2A3", + "VBRK_SW2A3" + ], + [ + "INT_FEEDTHRU_1_SW4A0", + "VBRK_SW4A0" + ], + [ + "INT_FEEDTHRU_1_SW4A1", + "VBRK_SW4A1" + ], + [ + "INT_FEEDTHRU_1_SW4A2", + "VBRK_SW4A2" + ], + [ + "INT_FEEDTHRU_1_SW4A3", + "VBRK_SW4A3" + ], + [ + "INT_FEEDTHRU_1_SW4END0", + "VBRK_SW4END0" + ], + [ + "INT_FEEDTHRU_1_SW4END1", + "VBRK_SW4END1" + ], + [ + "INT_FEEDTHRU_1_SW4END2", + "VBRK_SW4END2" + ], + [ + "INT_FEEDTHRU_1_SW4END3", + "VBRK_SW4END3" + ], + [ + "INT_FEEDTHRU_1_WL1END0", + "VBRK_WL1END0" + ], + [ + "INT_FEEDTHRU_1_WL1END1", + "VBRK_WL1END1" + ], + [ + "INT_FEEDTHRU_1_WL1END2", + "VBRK_WL1END2" + ], + [ + "INT_FEEDTHRU_1_WL1END3", + "VBRK_WL1END3" + ], + [ + "INT_FEEDTHRU_1_WR1END0", + "VBRK_WR1END0" + ], + [ + "INT_FEEDTHRU_1_WR1END1", + "VBRK_WR1END1" + ], + [ + "INT_FEEDTHRU_1_WR1END2", + "VBRK_WR1END2" + ], + [ + "INT_FEEDTHRU_1_WR1END3", + "VBRK_WR1END3" + ], + [ + "INT_FEEDTHRU_1_WW2A0", + "VBRK_WW2A0" + ], + [ + "INT_FEEDTHRU_1_WW2A1", + "VBRK_WW2A1" + ], + [ + "INT_FEEDTHRU_1_WW2A2", + "VBRK_WW2A2" + ], + [ + "INT_FEEDTHRU_1_WW2A3", + "VBRK_WW2A3" + ], + [ + "INT_FEEDTHRU_1_WW2END0", + "VBRK_WW2END0" + ], + [ + "INT_FEEDTHRU_1_WW2END1", + "VBRK_WW2END1" + ], + [ + "INT_FEEDTHRU_1_WW2END2", + "VBRK_WW2END2" + ], + [ + "INT_FEEDTHRU_1_WW2END3", + "VBRK_WW2END3" + ], + [ + "INT_FEEDTHRU_1_WW4A0", + "VBRK_WW4A0" + ], + [ + "INT_FEEDTHRU_1_WW4A1", + "VBRK_WW4A1" + ], + [ + "INT_FEEDTHRU_1_WW4A2", + "VBRK_WW4A2" + ], + [ + "INT_FEEDTHRU_1_WW4A3", + "VBRK_WW4A3" + ], + [ + "INT_FEEDTHRU_1_WW4B0", + "VBRK_WW4B0" + ], + [ + "INT_FEEDTHRU_1_WW4B1", + "VBRK_WW4B1" + ], + [ + "INT_FEEDTHRU_1_WW4B2", + "VBRK_WW4B2" + ], + [ + "INT_FEEDTHRU_1_WW4B3", + "VBRK_WW4B3" + ], + [ + "INT_FEEDTHRU_1_WW4C0", + "VBRK_WW4C0" + ], + [ + "INT_FEEDTHRU_1_WW4C1", + "VBRK_WW4C1" + ], + [ + "INT_FEEDTHRU_1_WW4C2", + "VBRK_WW4C2" + ], + [ + "INT_FEEDTHRU_1_WW4C3", + "VBRK_WW4C3" + ], + [ + "INT_FEEDTHRU_1_WW4END0", + "VBRK_WW4END0" + ], + [ + "INT_FEEDTHRU_1_WW4END1", + "VBRK_WW4END1" + ], + [ + "INT_FEEDTHRU_1_WW4END2", + "VBRK_WW4END2" + ], + [ + "INT_FEEDTHRU_1_WW4END3", + "VBRK_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_1", + "VFRAME" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_1_EE2A0", + "VFRAME_EE2A0" + ], + [ + "INT_FEEDTHRU_1_EE2A1", + "VFRAME_EE2A1" + ], + [ + "INT_FEEDTHRU_1_EE2A2", + "VFRAME_EE2A2" + ], + [ + "INT_FEEDTHRU_1_EE2A3", + "VFRAME_EE2A3" + ], + [ + "INT_FEEDTHRU_1_EE2BEG0", + "VFRAME_EE2BEG0" + ], + [ + "INT_FEEDTHRU_1_EE2BEG1", + "VFRAME_EE2BEG1" + ], + [ + "INT_FEEDTHRU_1_EE2BEG2", + "VFRAME_EE2BEG2" + ], + [ + "INT_FEEDTHRU_1_EE2BEG3", + "VFRAME_EE2BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4A0", + "VFRAME_EE4A0" + ], + [ + "INT_FEEDTHRU_1_EE4A1", + "VFRAME_EE4A1" + ], + [ + "INT_FEEDTHRU_1_EE4A2", + "VFRAME_EE4A2" + ], + [ + "INT_FEEDTHRU_1_EE4A3", + "VFRAME_EE4A3" + ], + [ + "INT_FEEDTHRU_1_EE4B0", + "VFRAME_EE4B0" + ], + [ + "INT_FEEDTHRU_1_EE4B1", + "VFRAME_EE4B1" + ], + [ + "INT_FEEDTHRU_1_EE4B2", + "VFRAME_EE4B2" + ], + [ + "INT_FEEDTHRU_1_EE4B3", + "VFRAME_EE4B3" + ], + [ + "INT_FEEDTHRU_1_EE4BEG0", + "VFRAME_EE4BEG0" + ], + [ + "INT_FEEDTHRU_1_EE4BEG1", + "VFRAME_EE4BEG1" + ], + [ + "INT_FEEDTHRU_1_EE4BEG2", + "VFRAME_EE4BEG2" + ], + [ + "INT_FEEDTHRU_1_EE4BEG3", + "VFRAME_EE4BEG3" + ], + [ + "INT_FEEDTHRU_1_EE4C0", + "VFRAME_EE4C0" + ], + [ + "INT_FEEDTHRU_1_EE4C1", + "VFRAME_EE4C1" + ], + [ + "INT_FEEDTHRU_1_EE4C2", + "VFRAME_EE4C2" + ], + [ + "INT_FEEDTHRU_1_EE4C3", + "VFRAME_EE4C3" + ], + [ + "INT_FEEDTHRU_1_EL1BEG0", + "VFRAME_EL1BEG0" + ], + [ + "INT_FEEDTHRU_1_EL1BEG1", + "VFRAME_EL1BEG1" + ], + [ + "INT_FEEDTHRU_1_EL1BEG2", + "VFRAME_EL1BEG2" + ], + [ + "INT_FEEDTHRU_1_EL1BEG3", + "VFRAME_EL1BEG3" + ], + [ + "INT_FEEDTHRU_1_ER1BEG0", + "VFRAME_ER1BEG0" + ], + [ + "INT_FEEDTHRU_1_ER1BEG1", + "VFRAME_ER1BEG1" + ], + [ + "INT_FEEDTHRU_1_ER1BEG2", + "VFRAME_ER1BEG2" + ], + [ + "INT_FEEDTHRU_1_ER1BEG3", + "VFRAME_ER1BEG3" + ], + [ + "INT_FEEDTHRU_1_LH1", + "VFRAME_LH1" + ], + [ + "INT_FEEDTHRU_1_LH2", + "VFRAME_LH2" + ], + [ + "INT_FEEDTHRU_1_LH3", + "VFRAME_LH3" + ], + [ + "INT_FEEDTHRU_1_LH4", + "VFRAME_LH4" + ], + [ + "INT_FEEDTHRU_1_LH5", + "VFRAME_LH5" + ], + [ + "INT_FEEDTHRU_1_LH6", + "VFRAME_LH6" + ], + [ + "INT_FEEDTHRU_1_LH7", + "VFRAME_LH7" + ], + [ + "INT_FEEDTHRU_1_LH8", + "VFRAME_LH8" + ], + [ + "INT_FEEDTHRU_1_LH9", + "VFRAME_LH9" + ], + [ + "INT_FEEDTHRU_1_LH10", + "VFRAME_LH10" + ], + [ + "INT_FEEDTHRU_1_LH11", + "VFRAME_LH11" + ], + [ + "INT_FEEDTHRU_1_LH12", + "VFRAME_LH12" + ], + [ + "INT_FEEDTHRU_1_MONITOR_N", + "VFRAME_MONITOR_N" + ], + [ + "INT_FEEDTHRU_1_MONITOR_P", + "VFRAME_MONITOR_P" + ], + [ + "INT_FEEDTHRU_1_NE2A0", + "VFRAME_NE2A0" + ], + [ + "INT_FEEDTHRU_1_NE2A1", + "VFRAME_NE2A1" + ], + [ + "INT_FEEDTHRU_1_NE2A2", + "VFRAME_NE2A2" + ], + [ + "INT_FEEDTHRU_1_NE2A3", + "VFRAME_NE2A3" + ], + [ + "INT_FEEDTHRU_1_NE4BEG0", + "VFRAME_NE4BEG0" + ], + [ + "INT_FEEDTHRU_1_NE4BEG1", + "VFRAME_NE4BEG1" + ], + [ + "INT_FEEDTHRU_1_NE4BEG2", + "VFRAME_NE4BEG2" + ], + [ + "INT_FEEDTHRU_1_NE4BEG3", + "VFRAME_NE4BEG3" + ], + [ + "INT_FEEDTHRU_1_NE4C0", + "VFRAME_NE4C0" + ], + [ + "INT_FEEDTHRU_1_NE4C1", + "VFRAME_NE4C1" + ], + [ + "INT_FEEDTHRU_1_NE4C2", + "VFRAME_NE4C2" + ], + [ + "INT_FEEDTHRU_1_NE4C3", + "VFRAME_NE4C3" + ], + [ + "INT_FEEDTHRU_1_NW2A0", + "VFRAME_NW2A0" + ], + [ + "INT_FEEDTHRU_1_NW2A1", + "VFRAME_NW2A1" + ], + [ + "INT_FEEDTHRU_1_NW2A2", + "VFRAME_NW2A2" + ], + [ + "INT_FEEDTHRU_1_NW2A3", + "VFRAME_NW2A3" + ], + [ + "INT_FEEDTHRU_1_NW4A0", + "VFRAME_NW4A0" + ], + [ + "INT_FEEDTHRU_1_NW4A1", + "VFRAME_NW4A1" + ], + [ + "INT_FEEDTHRU_1_NW4A2", + "VFRAME_NW4A2" + ], + [ + "INT_FEEDTHRU_1_NW4A3", + "VFRAME_NW4A3" + ], + [ + "INT_FEEDTHRU_1_NW4END0", + "VFRAME_NW4END0" + ], + [ + "INT_FEEDTHRU_1_NW4END1", + "VFRAME_NW4END1" + ], + [ + "INT_FEEDTHRU_1_NW4END2", + "VFRAME_NW4END2" + ], + [ + "INT_FEEDTHRU_1_NW4END3", + "VFRAME_NW4END3" + ], + [ + "INT_FEEDTHRU_1_SE2A0", + "VFRAME_SE2A0" + ], + [ + "INT_FEEDTHRU_1_SE2A1", + "VFRAME_SE2A1" + ], + [ + "INT_FEEDTHRU_1_SE2A2", + "VFRAME_SE2A2" + ], + [ + "INT_FEEDTHRU_1_SE2A3", + "VFRAME_SE2A3" + ], + [ + "INT_FEEDTHRU_1_SE4BEG0", + "VFRAME_SE4BEG0" + ], + [ + "INT_FEEDTHRU_1_SE4BEG1", + "VFRAME_SE4BEG1" + ], + [ + "INT_FEEDTHRU_1_SE4BEG2", + "VFRAME_SE4BEG2" + ], + [ + "INT_FEEDTHRU_1_SE4BEG3", + "VFRAME_SE4BEG3" + ], + [ + "INT_FEEDTHRU_1_SE4C0", + "VFRAME_SE4C0" + ], + [ + "INT_FEEDTHRU_1_SE4C1", + "VFRAME_SE4C1" + ], + [ + "INT_FEEDTHRU_1_SE4C2", + "VFRAME_SE4C2" + ], + [ + "INT_FEEDTHRU_1_SE4C3", + "VFRAME_SE4C3" + ], + [ + "INT_FEEDTHRU_1_SW2A0", + "VFRAME_SW2A0" + ], + [ + "INT_FEEDTHRU_1_SW2A1", + "VFRAME_SW2A1" + ], + [ + "INT_FEEDTHRU_1_SW2A2", + "VFRAME_SW2A2" + ], + [ + "INT_FEEDTHRU_1_SW2A3", + "VFRAME_SW2A3" + ], + [ + "INT_FEEDTHRU_1_SW4A0", + "VFRAME_SW4A0" + ], + [ + "INT_FEEDTHRU_1_SW4A1", + "VFRAME_SW4A1" + ], + [ + "INT_FEEDTHRU_1_SW4A2", + "VFRAME_SW4A2" + ], + [ + "INT_FEEDTHRU_1_SW4A3", + "VFRAME_SW4A3" + ], + [ + "INT_FEEDTHRU_1_SW4END0", + "VFRAME_SW4END0" + ], + [ + "INT_FEEDTHRU_1_SW4END1", + "VFRAME_SW4END1" + ], + [ + "INT_FEEDTHRU_1_SW4END2", + "VFRAME_SW4END2" + ], + [ + "INT_FEEDTHRU_1_SW4END3", + "VFRAME_SW4END3" + ], + [ + "INT_FEEDTHRU_1_WL1END0", + "VFRAME_WL1END0" + ], + [ + "INT_FEEDTHRU_1_WL1END1", + "VFRAME_WL1END1" + ], + [ + "INT_FEEDTHRU_1_WL1END2", + "VFRAME_WL1END2" + ], + [ + "INT_FEEDTHRU_1_WL1END3", + "VFRAME_WL1END3" + ], + [ + "INT_FEEDTHRU_1_WR1END0", + "VFRAME_WR1END0" + ], + [ + "INT_FEEDTHRU_1_WR1END1", + "VFRAME_WR1END1" + ], + [ + "INT_FEEDTHRU_1_WR1END2", + "VFRAME_WR1END2" + ], + [ + "INT_FEEDTHRU_1_WR1END3", + "VFRAME_WR1END3" + ], + [ + "INT_FEEDTHRU_1_WW2A0", + "VFRAME_WW2A0" + ], + [ + "INT_FEEDTHRU_1_WW2A1", + "VFRAME_WW2A1" + ], + [ + "INT_FEEDTHRU_1_WW2A2", + "VFRAME_WW2A2" + ], + [ + "INT_FEEDTHRU_1_WW2A3", + "VFRAME_WW2A3" + ], + [ + "INT_FEEDTHRU_1_WW2END0", + "VFRAME_WW2END0" + ], + [ + "INT_FEEDTHRU_1_WW2END1", + "VFRAME_WW2END1" + ], + [ + "INT_FEEDTHRU_1_WW2END2", + "VFRAME_WW2END2" + ], + [ + "INT_FEEDTHRU_1_WW2END3", + "VFRAME_WW2END3" + ], + [ + "INT_FEEDTHRU_1_WW4A0", + "VFRAME_WW4A0" + ], + [ + "INT_FEEDTHRU_1_WW4A1", + "VFRAME_WW4A1" + ], + [ + "INT_FEEDTHRU_1_WW4A2", + "VFRAME_WW4A2" + ], + [ + "INT_FEEDTHRU_1_WW4A3", + "VFRAME_WW4A3" + ], + [ + "INT_FEEDTHRU_1_WW4B0", + "VFRAME_WW4B0" + ], + [ + "INT_FEEDTHRU_1_WW4B1", + "VFRAME_WW4B1" + ], + [ + "INT_FEEDTHRU_1_WW4B2", + "VFRAME_WW4B2" + ], + [ + "INT_FEEDTHRU_1_WW4B3", + "VFRAME_WW4B3" + ], + [ + "INT_FEEDTHRU_1_WW4C0", + "VFRAME_WW4C0" + ], + [ + "INT_FEEDTHRU_1_WW4C1", + "VFRAME_WW4C1" + ], + [ + "INT_FEEDTHRU_1_WW4C2", + "VFRAME_WW4C2" + ], + [ + "INT_FEEDTHRU_1_WW4C3", + "VFRAME_WW4C3" + ], + [ + "INT_FEEDTHRU_1_WW4END0", + "VFRAME_WW4END0" + ], + [ + "INT_FEEDTHRU_1_WW4END1", + "VFRAME_WW4END1" + ], + [ + "INT_FEEDTHRU_1_WW4END2", + "VFRAME_WW4END2" + ], + [ + "INT_FEEDTHRU_1_WW4END3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "INT_FEEDTHRU_2" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "INT_FEEDTHRU_2_EE2A0" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "INT_FEEDTHRU_2_EE2A1" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "INT_FEEDTHRU_2_EE2A2" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "INT_FEEDTHRU_2_EE2A3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "INT_FEEDTHRU_2_EE2BEG0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "INT_FEEDTHRU_2_EE2BEG1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "INT_FEEDTHRU_2_EE2BEG2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "INT_FEEDTHRU_2_EE2BEG3" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "INT_FEEDTHRU_2_EE4A0" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "INT_FEEDTHRU_2_EE4A1" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "INT_FEEDTHRU_2_EE4A2" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "INT_FEEDTHRU_2_EE4A3" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "INT_FEEDTHRU_2_EE4B0" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "INT_FEEDTHRU_2_EE4B1" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "INT_FEEDTHRU_2_EE4B2" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "INT_FEEDTHRU_2_EE4B3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "INT_FEEDTHRU_2_EE4BEG0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "INT_FEEDTHRU_2_EE4BEG1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "INT_FEEDTHRU_2_EE4BEG2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "INT_FEEDTHRU_2_EE4BEG3" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "INT_FEEDTHRU_2_EE4C0" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "INT_FEEDTHRU_2_EE4C1" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "INT_FEEDTHRU_2_EE4C2" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "INT_FEEDTHRU_2_EE4C3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "INT_FEEDTHRU_2_EL1BEG0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "INT_FEEDTHRU_2_EL1BEG1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "INT_FEEDTHRU_2_EL1BEG2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "INT_FEEDTHRU_2_EL1BEG3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "INT_FEEDTHRU_2_ER1BEG0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "INT_FEEDTHRU_2_ER1BEG1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "INT_FEEDTHRU_2_ER1BEG2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "INT_FEEDTHRU_2_ER1BEG3" + ], + [ + "INT_FEEDTHRU_2_LH1", + "INT_FEEDTHRU_2_LH1" + ], + [ + "INT_FEEDTHRU_2_LH2", + "INT_FEEDTHRU_2_LH2" + ], + [ + "INT_FEEDTHRU_2_LH3", + "INT_FEEDTHRU_2_LH3" + ], + [ + "INT_FEEDTHRU_2_LH4", + "INT_FEEDTHRU_2_LH4" + ], + [ + "INT_FEEDTHRU_2_LH5", + "INT_FEEDTHRU_2_LH5" + ], + [ + "INT_FEEDTHRU_2_LH6", + "INT_FEEDTHRU_2_LH6" + ], + [ + "INT_FEEDTHRU_2_LH7", + "INT_FEEDTHRU_2_LH7" + ], + [ + "INT_FEEDTHRU_2_LH8", + "INT_FEEDTHRU_2_LH8" + ], + [ + "INT_FEEDTHRU_2_LH9", + "INT_FEEDTHRU_2_LH9" + ], + [ + "INT_FEEDTHRU_2_LH10", + "INT_FEEDTHRU_2_LH10" + ], + [ + "INT_FEEDTHRU_2_LH11", + "INT_FEEDTHRU_2_LH11" + ], + [ + "INT_FEEDTHRU_2_LH12", + "INT_FEEDTHRU_2_LH12" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "INT_FEEDTHRU_2_MONITOR_N" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "INT_FEEDTHRU_2_MONITOR_P" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "INT_FEEDTHRU_2_NE2A0" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "INT_FEEDTHRU_2_NE2A1" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "INT_FEEDTHRU_2_NE2A2" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "INT_FEEDTHRU_2_NE2A3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "INT_FEEDTHRU_2_NE4BEG0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "INT_FEEDTHRU_2_NE4BEG1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "INT_FEEDTHRU_2_NE4BEG2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "INT_FEEDTHRU_2_NE4BEG3" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "INT_FEEDTHRU_2_NE4C0" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "INT_FEEDTHRU_2_NE4C1" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "INT_FEEDTHRU_2_NE4C2" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "INT_FEEDTHRU_2_NE4C3" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "INT_FEEDTHRU_2_NW2A0" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "INT_FEEDTHRU_2_NW2A1" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "INT_FEEDTHRU_2_NW2A2" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "INT_FEEDTHRU_2_NW2A3" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "INT_FEEDTHRU_2_NW4A0" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "INT_FEEDTHRU_2_NW4A1" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "INT_FEEDTHRU_2_NW4A2" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "INT_FEEDTHRU_2_NW4A3" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "INT_FEEDTHRU_2_NW4END0" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "INT_FEEDTHRU_2_NW4END1" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "INT_FEEDTHRU_2_NW4END2" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "INT_FEEDTHRU_2_NW4END3" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "INT_FEEDTHRU_2_SE2A0" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "INT_FEEDTHRU_2_SE2A1" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "INT_FEEDTHRU_2_SE2A2" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "INT_FEEDTHRU_2_SE2A3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "INT_FEEDTHRU_2_SE4BEG0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "INT_FEEDTHRU_2_SE4BEG1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "INT_FEEDTHRU_2_SE4BEG2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "INT_FEEDTHRU_2_SE4BEG3" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "INT_FEEDTHRU_2_SE4C0" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "INT_FEEDTHRU_2_SE4C1" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "INT_FEEDTHRU_2_SE4C2" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "INT_FEEDTHRU_2_SE4C3" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "INT_FEEDTHRU_2_SW2A0" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "INT_FEEDTHRU_2_SW2A1" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "INT_FEEDTHRU_2_SW2A2" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "INT_FEEDTHRU_2_SW2A3" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "INT_FEEDTHRU_2_SW4A0" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "INT_FEEDTHRU_2_SW4A1" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "INT_FEEDTHRU_2_SW4A2" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "INT_FEEDTHRU_2_SW4A3" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "INT_FEEDTHRU_2_SW4END0" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "INT_FEEDTHRU_2_SW4END1" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "INT_FEEDTHRU_2_SW4END2" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "INT_FEEDTHRU_2_SW4END3" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "INT_FEEDTHRU_2_WL1END0" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "INT_FEEDTHRU_2_WL1END1" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "INT_FEEDTHRU_2_WL1END2" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "INT_FEEDTHRU_2_WL1END3" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "INT_FEEDTHRU_2_WR1END0" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "INT_FEEDTHRU_2_WR1END1" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "INT_FEEDTHRU_2_WR1END2" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "INT_FEEDTHRU_2_WR1END3" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "INT_FEEDTHRU_2_WW2A0" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "INT_FEEDTHRU_2_WW2A1" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "INT_FEEDTHRU_2_WW2A2" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "INT_FEEDTHRU_2_WW2A3" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "INT_FEEDTHRU_2_WW2END0" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "INT_FEEDTHRU_2_WW2END1" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "INT_FEEDTHRU_2_WW2END2" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "INT_FEEDTHRU_2_WW2END3" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "INT_FEEDTHRU_2_WW4A0" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "INT_FEEDTHRU_2_WW4A1" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "INT_FEEDTHRU_2_WW4A2" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "INT_FEEDTHRU_2_WW4A3" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "INT_FEEDTHRU_2_WW4B0" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "INT_FEEDTHRU_2_WW4B1" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "INT_FEEDTHRU_2_WW4B2" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "INT_FEEDTHRU_2_WW4B3" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "INT_FEEDTHRU_2_WW4C0" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "INT_FEEDTHRU_2_WW4C1" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "INT_FEEDTHRU_2_WW4C2" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "INT_FEEDTHRU_2_WW4C3" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "INT_FEEDTHRU_2_WW4END0" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "INT_FEEDTHRU_2_WW4END1" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "INT_FEEDTHRU_2_WW4END2" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "INT_FEEDTHRU_2_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_0" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_0" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_0" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_0" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_0" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_0" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_0" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_0" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_0" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_0" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_0" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_0" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_0" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_0" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_0" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_0" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_0" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_0" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_0" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_0" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_0" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_0" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_0" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_0" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_0" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_0" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_0" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_0" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_0" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_0" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_0" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_0" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_0" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_0" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_0" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_0" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_0" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_0" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_0" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_0" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_0" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_0" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_0" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_0" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_0" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_0" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_0" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_0" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_0" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_0" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_0" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_0" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_0" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_0" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_0" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_0" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_0" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_0" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_0" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_0" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_0" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_0" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_0" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_0" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_0" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_0" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_0" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_0" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_0" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_0" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_0" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_0" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_0" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_0" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_0" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_0" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_0" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_0" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_0" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_0" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_0" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_0" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_0" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_0" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_0" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_0" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_0" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_0" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_0" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_0" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_0" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_0" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_0" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_0" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_0" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_0" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_1" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_1" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_1" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_1" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_1" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_1" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_1" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_1" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_1" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_1" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_1" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_1" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_1" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_1" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_1" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_1" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_1" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_1" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_1" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_1" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_1" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_1" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_1" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_1" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_1" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_1" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_1" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_1" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_1" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_1" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_1" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_1" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_1" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_1" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_1" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_1" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_1" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_1" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_1" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_1" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_1" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_1" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_1" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_1" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_1" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_1" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_1" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_1" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_1" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_1" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_1" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_1" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_1" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_1" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_1" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_1" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_1" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_1" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_1" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_1" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_1" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_1" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_1" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_1" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_1" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_1" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_1" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_1" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_1" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_1" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_1" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_1" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_1" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_1" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_1" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_1" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_1" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_1" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_1" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_1" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_1" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_1" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_1" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_1" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_1" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_1" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_1" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_1" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_1" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_1" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_1" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_1" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_1" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_1" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_1" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_1" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_1" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_2" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_2" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_2" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_2" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_2" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_2" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_2" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_2" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_2" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_2" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_2" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_2" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_2" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_2" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_2" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_2" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_2" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_2" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_2" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_2" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_2" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_2" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_2" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_2" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_2" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_2" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_2" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_2" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_2" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_2" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_2" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_2" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_2" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_2" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_2" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_2" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_2" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_2" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_2" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_2" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_2" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_2" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_2" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_2" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_2" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_2" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_2" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_2" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_2" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_2" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_2" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_2" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_2" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_2" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_2" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_2" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_2" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_2" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_2" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_2" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_2" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_2" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_2" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_2" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_2" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_2" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_2" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_2" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_2" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_2" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_2" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_2" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_2" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_2" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_2" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_2" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_2" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_2" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_2" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_2" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_2" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_2" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_2" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_2" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_2" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_2" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_2" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_2" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_2" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_2" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_2" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_2" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_2" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_2" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_2" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_2" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_2" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_3" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_3" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_3" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_3" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_3" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_3" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_3" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_3" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_3" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_3" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_3" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_3" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_3" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_3" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_3" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_3" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_3" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_3" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_3" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_3" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_3" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_3" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_3" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_3" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_3" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_3" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_3" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_3" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_3" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_3" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_3" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_3" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_3" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_3" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_3" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_3" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_3" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_3" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_3" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_3" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_3" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_3" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_3" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_3" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_3" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_3" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_3" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_3" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_3" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_3" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_3" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_3" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_3" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_3" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_3" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_3" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_3" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_3" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_3" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_3" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_3" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_3" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_3" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_3" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_3" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_3" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_3" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_3" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_3" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_3" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_3" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_3" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_3" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_3" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_3" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_3" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_3" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_3" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_3" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_3" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_3" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_3" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_3" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_3" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_3" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_3" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_3" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_3" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_3" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_3" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_3" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_3" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_3" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_3" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_3" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_3" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_4" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_4" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_4" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_4" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_4" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_4" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_4" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_4" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_4" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_4" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_4" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_4" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_4" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_4" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_4" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_4" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_4" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_4" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_4" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_4" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_4" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_4" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_4" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_4" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_4" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_4" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_4" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN11" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP11" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_4" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_4" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_4" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_4" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_4" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_4" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_4" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_4" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_4" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_4" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_4" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_4" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_4" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_4" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_4" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_4" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_4" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_4" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_4" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_4" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_4" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_4" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_4" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_4" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_4" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_4" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_4" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_4" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_4" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_4" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_4" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_4" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_4" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_4" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_4" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_4" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_4" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_4" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_4" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_4" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_4" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_4" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_4" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_4" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_4" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_4" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_4" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_4" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_4" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_4" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_4" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_4" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_4" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_4" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_4" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_4" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_4" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_4" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_4" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_4" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_4" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_4" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_4" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_4" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_4" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_4" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_4" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_4" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_4" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_4" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_5" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_5" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_5" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_5" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_5" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_5" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_5" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_5" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_5" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_5" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_5" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_5" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_5" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_5" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_5" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_5" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_5" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_5" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_5" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_5" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_5" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_5" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_5" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_5" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_5" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_5" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_5" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_5" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_5" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_5" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_5" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_5" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_5" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_5" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_5" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_5" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_5" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_5" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_5" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_5" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_5" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_5" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_5" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_5" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_5" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_5" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_5" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_5" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_5" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_5" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_5" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_5" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_5" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_5" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_5" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_5" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_5" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_5" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_5" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_5" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_5" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_5" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_5" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_5" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_5" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_5" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_5" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_5" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_5" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_5" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_5" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_5" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_5" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_5" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_5" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_5" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_5" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_5" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_5" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_5" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_5" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_5" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_5" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_5" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_5" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_5" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_5" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_5" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_5" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_5" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_5" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_5" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_5" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_5" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_5" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_5" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_5" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_5" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_5" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_5" + ] + ] + }, + { + "grid_deltas": [ + 1, + 6 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_6" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_6" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_6" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_6" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_6" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_6" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_6" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_6" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_6" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_6" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_6" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_6" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_6" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_6" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_6" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_6" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_6" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_6" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_6" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_6" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_6" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_6" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_6" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_6" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_6" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_6" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_6" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_6" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN3" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP3" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_6" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_6" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_6" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_6" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_6" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_6" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_6" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_6" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_6" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_6" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_6" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_6" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_6" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_6" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_6" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_6" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_6" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_6" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_6" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_6" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_6" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_6" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_6" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_6" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_6" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_6" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_6" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_6" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_6" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_6" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_6" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_6" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_6" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_6" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_6" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_6" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_6" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_6" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_6" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_6" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_6" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_6" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_6" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_6" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_6" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_6" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_6" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_6" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_6" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_6" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_6" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_6" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_6" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_6" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_6" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_6" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_6" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_6" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_6" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_6" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_6" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_6" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_6" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_6" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_6" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_6" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_6" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_6" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_6" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_6" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_6" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_6" + ] + ] + }, + { + "grid_deltas": [ + 1, + 7 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_7" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_7" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_7" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_7" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_7" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_7" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_7" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_7" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_7" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_7" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_7" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_7" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_7" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_7" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_7" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_7" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_7" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_7" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_7" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_7" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_7" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_7" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_7" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_7" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_7" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_7" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_7" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_7" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_7" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_7" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_7" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_7" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_7" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_7" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_7" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_7" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_7" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_7" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_7" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_7" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_7" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_7" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_7" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_7" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_7" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_7" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_7" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_7" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_7" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_7" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_7" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_7" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_7" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_7" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_7" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_7" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_7" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_7" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_7" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_7" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_7" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_7" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_7" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_7" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_7" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_7" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_7" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_7" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_7" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_7" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_7" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_7" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_7" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_7" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_7" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_7" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_7" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_7" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_7" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_7" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_7" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_7" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_7" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_7" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_7" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_7" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_7" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_7" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_7" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_7" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_7" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_7" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_7" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_7" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_7" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_7" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_7" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_7" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_7" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_7" + ] + ] + }, + { + "grid_deltas": [ + 1, + 8 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_8" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_8" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_8" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_8" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_8" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_8" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_8" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_8" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_8" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_8" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_8" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_8" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_8" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_8" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_8" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_8" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_8" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_8" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_8" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_8" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_8" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_8" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_8" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_8" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_8" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_8" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_8" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_8" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN10" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP10" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_8" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_8" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_8" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_8" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_8" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_8" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_8" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_8" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_8" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_8" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_8" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_8" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_8" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_8" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_8" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_8" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_8" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_8" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_8" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_8" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_8" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_8" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_8" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_8" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_8" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_8" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_8" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_8" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_8" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_8" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_8" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_8" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_8" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_8" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_8" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_8" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_8" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_8" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_8" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_8" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_8" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_8" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_8" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_8" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_8" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_8" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_8" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_8" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_8" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_8" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_8" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_8" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_8" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_8" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_8" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_8" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_8" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_8" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_8" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_8" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_8" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_8" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_8" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_8" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_8" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_8" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_8" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_8" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_8" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_8" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_8" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_8" + ] + ] + }, + { + "grid_deltas": [ + 1, + 9 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_BOT" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_9" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_9" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_9" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_9" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_9" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_9" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_9" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_9" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_9" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_9" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_9" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_9" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_9" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_9" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_9" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_9" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_9" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_9" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_9" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_9" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_9" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_9" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_9" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_9" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_9" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_9" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_9" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_9" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_9" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_9" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_9" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_9" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_9" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_9" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_9" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_9" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_9" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_9" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_9" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_9" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_9" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_9" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_9" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_9" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_9" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_9" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_9" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_9" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_9" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_9" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_9" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_9" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_9" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_9" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_9" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_9" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_9" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_9" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_9" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_9" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_9" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_9" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_9" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_9" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_9" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_9" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_9" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_9" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_9" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_9" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_9" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_9" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_9" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_9" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_9" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_9" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_9" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_9" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_9" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_9" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_9" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_9" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_9" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_9" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_9" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_9" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_9" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_9" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_9" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_9" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_9" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_9" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_9" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_9" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_9" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_9" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_9" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_9" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_9" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_9" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_0" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_0" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_0" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_0" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_0" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_0" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_0" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_0" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_0" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_0" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_0" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_0" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_0" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_0" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_0" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_0" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_0" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_0" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_0" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_0" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_0" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_0" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_0" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_0" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_0" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_0" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_0" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN2" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP2" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_0" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_0" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_0" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_0" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_0" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_0" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_0" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_0" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_0" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_0" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_0" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_0" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_0" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_0" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_0" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_0" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_0" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_0" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_0" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_0" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_0" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_0" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_0" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_0" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_0" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_0" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_0" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_0" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_0" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_0" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_0" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_0" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_0" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_0" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_0" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_0" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_0" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_0" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_0" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_0" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_0" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_0" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_0" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_0" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_0" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_0" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_0" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_0" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_0" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_0" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_0" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_0" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_0" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_0" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_0" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_0" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_0" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_0" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_0" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_0" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_0" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_0" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_0" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_0" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_0" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_0" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_0" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_0" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_0" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_1" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_1" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_1" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_1" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_1" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_1" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_1" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_1" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_1" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_1" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_1" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_1" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_1" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_1" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_1" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_1" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_1" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_1" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_1" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_1" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_1" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_1" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_1" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_1" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_1" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_1" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_1" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_1" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_1" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_1" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_1" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_1" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_1" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_1" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_1" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_1" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_1" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_1" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_1" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_1" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_1" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_1" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_1" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_1" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_1" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_1" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_1" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_1" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_1" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_1" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_1" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_1" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_1" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_1" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_1" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_1" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_1" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_1" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_1" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_1" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_1" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_1" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_1" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_1" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_1" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_1" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_1" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_1" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_1" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_1" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_1" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_1" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_1" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_1" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_1" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_1" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_1" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_1" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_1" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_1" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_1" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_1" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_1" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_1" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_1" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_1" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_1" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_1" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_1" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_1" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_1" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_1" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_1" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_1" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_1" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_1" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_1" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_2" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_2" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_2" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_2" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_2" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_2" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_2" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_2" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_2" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_2" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_2" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_2" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_2" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_2" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_2" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_2" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_2" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_2" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_2" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_2" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_2" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_2" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_2" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_2" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_2" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_2" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_2" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_2" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_2" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_2" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_2" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_2" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_2" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_2" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_2" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_2" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_2" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_2" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_2" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_2" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_2" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_2" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_2" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_2" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_2" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_2" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_2" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_2" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_2" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_2" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_2" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_2" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_2" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_2" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_2" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_2" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_2" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_2" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_2" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_2" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_2" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_2" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_2" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_2" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_2" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_2" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_2" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_2" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_2" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_2" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_2" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_2" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_2" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_2" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_2" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_2" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_2" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_2" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_2" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_2" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_2" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_2" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_2" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_2" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_2" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_2" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_2" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_2" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_2" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_2" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_2" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_2" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_2" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_2" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_2" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_2" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_2" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_3" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_3" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_3" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_3" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_3" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_3" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_3" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_3" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_3" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_3" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_3" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_3" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_3" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_3" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_3" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_3" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_3" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_3" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_3" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_3" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_3" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_3" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_3" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_3" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_3" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_3" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_3" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_3" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_3" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_3" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_3" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_3" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_3" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_3" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_3" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_3" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_3" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_3" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_3" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_3" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_3" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_3" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_3" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_3" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_3" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_3" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_3" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_3" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_3" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_3" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_3" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_3" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_3" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_3" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_3" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_3" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_3" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_3" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_3" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_3" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_3" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_3" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_3" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_3" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_3" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_3" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_3" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_3" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_3" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_3" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_3" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_3" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_3" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_3" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_3" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_3" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_3" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_3" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_3" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_3" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_3" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_3" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_3" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_3" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_3" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_3" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_3" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_3" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_3" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_3" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_3" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_3" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_3" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_3" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_3" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_3" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_4" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_4" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_4" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_4" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_4" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_4" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_4" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_4" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_4" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_4" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_4" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_4" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_4" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_4" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_4" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_4" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_4" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_4" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_4" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_4" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_4" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_4" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_4" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_4" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_4" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_4" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_4" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN9" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP9" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_4" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_4" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_4" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_4" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_4" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_4" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_4" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_4" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_4" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_4" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_4" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_4" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_4" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_4" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_4" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_4" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_4" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_4" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_4" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_4" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_4" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_4" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_4" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_4" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_4" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_4" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_4" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_4" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_4" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_4" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_4" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_4" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_4" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_4" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_4" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_4" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_4" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_4" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_4" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_4" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_4" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_4" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_4" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_4" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_4" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_4" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_4" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_4" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_4" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_4" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_4" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_4" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_4" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_4" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_4" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_4" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_4" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_4" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_4" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_4" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_4" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_4" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_4" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_4" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_4" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_4" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_4" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_4" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_4" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_4" + ] + ] + }, + { + "grid_deltas": [ + 1, + 5 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_5" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_5" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_5" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_5" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_5" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_5" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_5" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_5" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_5" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_5" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_5" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_5" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_5" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_5" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_5" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_5" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_5" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_5" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_5" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_5" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_5" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_5" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_5" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_5" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_5" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_5" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_5" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_5" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_5" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_5" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_5" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_5" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_5" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_5" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_5" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_5" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_5" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_5" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_5" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_5" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_5" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_5" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_5" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_5" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_5" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_5" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_5" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_5" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_5" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_5" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_5" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_5" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_5" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_5" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_5" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_5" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_5" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_5" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_5" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_5" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_5" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_5" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_5" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_5" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_5" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_5" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_5" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_5" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_5" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_5" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_5" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_5" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_5" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_5" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_5" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_5" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_5" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_5" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_5" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_5" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_5" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_5" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_5" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_5" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_5" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_5" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_5" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_5" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_5" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_5" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_5" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_5" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_5" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_5" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_5" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_5" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_5" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_5" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_5" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_5" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_5" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_5" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_5" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_5" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_5" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_5" + ] + ] + }, + { + "grid_deltas": [ + 1, + 6 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_6" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_6" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_6" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_6" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_6" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_6" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_6" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_6" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_6" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_6" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_6" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_6" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_6" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_6" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_6" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_6" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_6" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_6" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_6" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_6" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_6" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_6" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_6" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_6" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_6" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_6" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_6" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_6" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_6" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_6" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_6" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_6" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_6" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_6" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_6" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_6" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_6" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_6" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_6" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_6" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_6" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_6" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_6" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_6" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_6" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_6" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_6" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_6" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_6" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_6" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_6" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_6" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_6" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_6" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_6" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_6" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_6" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_6" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_6" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_6" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_6" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_6" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_6" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_6" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_6" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_6" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_6" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_6" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_6" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_6" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_6" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_6" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_6" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_6" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_6" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_6" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_6" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_6" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_6" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_6" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_6" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_6" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_6" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_6" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_6" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_6" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_6" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_6" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_6" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_6" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_6" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_6" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_6" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_6" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_6" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_6" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_6" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_6" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_6" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_6" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_6" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_6" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_6" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_6" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_6" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_6" + ] + ] + }, + { + "grid_deltas": [ + 1, + 7 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_7" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_7" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_7" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_7" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_7" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_7" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_7" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_7" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_7" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_7" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_7" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_7" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_7" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_7" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_7" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_7" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_7" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_7" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_7" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_7" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_7" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_7" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_7" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_7" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_7" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_7" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_7" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_7" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_7" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_7" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_7" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_7" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_7" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_7" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_7" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_7" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_7" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_7" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_7" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_7" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_7" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_7" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_7" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_7" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_7" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_7" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_7" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_7" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_7" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_7" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_7" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_7" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_7" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_7" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_7" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_7" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_7" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_7" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_7" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_7" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_7" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_7" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_7" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_7" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_7" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_7" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_7" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_7" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_7" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_7" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_7" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_7" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_7" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_7" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_7" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_7" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_7" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_7" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_7" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_7" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_7" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_7" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_7" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_7" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_7" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_7" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_7" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_7" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_7" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_7" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_7" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_7" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_7" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_7" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_7" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_7" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_7" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_7" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_7" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_7" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_7" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_7" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_7" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_7" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_7" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_7" + ] + ] + }, + { + "grid_deltas": [ + 1, + 8 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_8" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_8" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_8" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_8" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_8" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_8" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_8" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_8" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_8" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_8" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_8" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_8" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_8" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_8" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_8" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_8" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_8" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_8" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_8" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_8" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_8" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_8" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_8" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_8" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_8" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_8" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_8" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_8" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_8" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_8" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_8" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_8" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN1" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP1" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_8" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_8" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_8" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_8" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_8" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_8" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_8" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_8" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_8" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_8" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_8" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_8" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_8" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_8" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_8" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_8" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_8" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_8" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_8" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_8" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_8" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_8" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_8" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_8" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_8" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_8" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_8" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_8" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_8" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_8" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_8" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_8" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_8" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_8" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_8" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_8" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_8" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_8" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_8" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_8" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_8" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_8" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_8" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_8" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_8" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_8" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_8" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_8" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_8" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_8" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_8" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_8" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_8" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_8" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_8" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_8" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_8" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_8" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_8" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_8" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_8" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_8" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_8" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_8" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_8" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_8" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_8" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_8" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_8" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_8" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_8" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_8" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_8" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_8" + ] + ] + }, + { + "grid_deltas": [ + 1, + 9 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_9" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_9" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_9" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_9" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_9" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_9" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_9" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_9" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_9" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_9" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_9" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_9" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_9" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_9" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_9" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_9" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_9" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_9" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_9" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_9" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_9" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_9" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_9" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_9" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_9" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_9" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_9" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_9" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_9" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_9" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_9" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_9" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_9" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_9" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_9" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_9" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_9" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_9" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_9" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_9" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_9" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_9" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_9" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_9" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_9" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_9" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_9" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_9" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_9" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_9" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_9" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_9" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_9" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_9" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_9" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_9" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_9" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_9" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_9" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_9" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_9" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_9" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_9" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_9" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_9" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_9" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_9" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_9" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_9" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_9" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_9" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_9" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_9" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_9" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_9" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_9" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_9" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_9" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_9" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_9" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_9" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_9" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_9" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_9" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_9" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_9" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_9" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_9" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_9" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_9" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_9" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_9" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_9" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_9" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_9" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_9" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_9" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_9" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_9" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_9" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_9" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_9" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_9" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_9" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_9" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_9" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_TOP" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_0" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_0" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_0" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_0" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_0" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_0" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_0" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_0" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_0" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_0" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_0" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_0" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_0" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_0" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_0" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_0" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_0" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_0" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_0" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_0" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_0" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_0" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_0" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_0" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_0" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_0" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_0" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_0" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_0" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN8" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP8" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_0" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_0" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_0" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_0" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_0" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_0" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_0" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_0" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_0" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_0" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_0" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_0" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_0" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_0" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_0" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_0" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_0" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_0" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_0" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_0" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_0" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_0" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_0" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_0" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_0" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_0" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_0" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_0" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_0" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_0" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_0" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_0" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_0" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_0" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_0" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_0" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_0" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_0" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_0" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_0" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_0" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_0" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_0" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_0" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_0" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_0" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_0" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_0" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_0" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_0" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_0" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_0" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_0" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_0" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_0" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_0" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_0" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_0" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_0" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_0" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_0" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_0" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_0" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_0" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_0" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_0" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_0" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_0" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_0" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_0" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_0" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_TOP" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_1" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_1" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_1" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_1" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_1" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_1" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_1" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_1" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_1" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_1" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_1" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_1" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_1" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_1" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_1" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_1" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_1" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_1" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_1" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_1" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_1" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_1" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_1" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_1" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_1" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_1" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_1" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_1" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_1" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_1" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_1" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_1" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_1" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_1" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_1" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_1" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_1" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_1" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_1" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_1" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_1" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_1" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_1" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_1" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_1" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_1" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_1" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_1" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_1" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_1" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_1" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_1" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_1" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_1" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_1" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_1" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_1" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_1" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_1" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_1" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_1" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_1" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_1" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_1" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_1" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_1" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_1" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_1" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_1" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_1" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_1" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_1" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_1" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_1" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_1" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_1" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_1" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_1" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_1" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_1" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_1" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_1" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_1" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_1" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_1" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_1" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_1" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_1" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_1" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_1" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_1" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_1" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_1" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_1" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_1" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_1" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_1" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_1" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_1" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_1" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_1" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_TOP" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_2" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_2" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_2" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_2" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_2" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_2" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_2" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_2" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_2" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_2" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_2" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_2" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_2" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_2" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_2" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_2" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_2" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_2" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_2" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_2" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_2" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_2" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_2" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_2" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_2" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_2" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_2" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_2" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_2" + ], + [ + "INT_FEEDTHRU_2_MONITOR_N", + "MONITOR_HORIZ_VAUXN0" + ], + [ + "INT_FEEDTHRU_2_MONITOR_P", + "MONITOR_HORIZ_VAUXP0" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_2" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_2" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_2" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_2" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_2" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_2" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_2" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_2" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_2" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_2" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_2" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_2" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_2" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_2" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_2" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_2" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_2" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_2" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_2" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_2" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_2" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_2" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_2" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_2" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_2" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_2" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_2" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_2" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_2" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_2" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_2" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_2" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_2" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_2" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_2" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_2" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_2" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_2" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_2" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_2" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_2" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_2" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_2" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_2" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_2" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_2" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_2" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_2" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_2" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_2" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_2" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_2" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_2" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_2" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_2" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_2" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_2" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_2" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_2" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_2" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_2" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_2" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_2" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_2" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_2" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_2" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_2" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_2" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_2" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_2" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_2" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_2" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_TOP" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_3" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_3" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_3" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_3" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_3" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_3" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_3" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_3" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_3" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_3" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_3" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_3" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_3" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_3" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_3" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_3" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_3" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_3" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_3" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_3" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_3" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_3" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_3" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_3" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_3" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_3" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_3" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_3" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_3" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_3" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_3" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_3" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_3" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_3" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_3" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_3" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_3" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_3" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_3" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_3" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_3" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_3" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_3" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_3" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_3" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_3" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_3" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_3" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_3" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_3" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_3" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_3" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_3" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_3" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_3" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_3" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_3" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_3" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_3" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_3" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_3" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_3" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_3" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_3" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_3" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_3" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_3" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_3" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_3" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_3" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_3" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_3" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_3" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_3" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_3" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_3" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_3" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_3" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_3" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_3" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_3" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_3" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_3" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_3" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_3" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_3" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_3" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_3" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_3" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_3" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_3" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_3" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_3" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_3" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_3" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_3" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_3" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_3" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_3" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_3" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "INT_FEEDTHRU_2", + "MONITOR_TOP" + ], + "wire_pairs": [ + [ + "INT_FEEDTHRU_2_EE2A0", + "MONITOR_EE2A0_4" + ], + [ + "INT_FEEDTHRU_2_EE2A1", + "MONITOR_EE2A1_4" + ], + [ + "INT_FEEDTHRU_2_EE2A2", + "MONITOR_EE2A2_4" + ], + [ + "INT_FEEDTHRU_2_EE2A3", + "MONITOR_EE2A3_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG0", + "MONITOR_EE2BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG1", + "MONITOR_EE2BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG2", + "MONITOR_EE2BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EE2BEG3", + "MONITOR_EE2BEG3_4" + ], + [ + "INT_FEEDTHRU_2_EE4A0", + "MONITOR_EE4A0_4" + ], + [ + "INT_FEEDTHRU_2_EE4A1", + "MONITOR_EE4A1_4" + ], + [ + "INT_FEEDTHRU_2_EE4A2", + "MONITOR_EE4A2_4" + ], + [ + "INT_FEEDTHRU_2_EE4A3", + "MONITOR_EE4A3_4" + ], + [ + "INT_FEEDTHRU_2_EE4B0", + "MONITOR_EE4B0_4" + ], + [ + "INT_FEEDTHRU_2_EE4B1", + "MONITOR_EE4B1_4" + ], + [ + "INT_FEEDTHRU_2_EE4B2", + "MONITOR_EE4B2_4" + ], + [ + "INT_FEEDTHRU_2_EE4B3", + "MONITOR_EE4B3_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG0", + "MONITOR_EE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG1", + "MONITOR_EE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG2", + "MONITOR_EE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EE4BEG3", + "MONITOR_EE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_EE4C0", + "MONITOR_EE4C0_4" + ], + [ + "INT_FEEDTHRU_2_EE4C1", + "MONITOR_EE4C1_4" + ], + [ + "INT_FEEDTHRU_2_EE4C2", + "MONITOR_EE4C2_4" + ], + [ + "INT_FEEDTHRU_2_EE4C3", + "MONITOR_EE4C3_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG0", + "MONITOR_EL1BEG0_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG1", + "MONITOR_EL1BEG1_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG2", + "MONITOR_EL1BEG2_4" + ], + [ + "INT_FEEDTHRU_2_EL1BEG3", + "MONITOR_EL1BEG3_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG0", + "MONITOR_ER1BEG0_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG1", + "MONITOR_ER1BEG1_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG2", + "MONITOR_ER1BEG2_4" + ], + [ + "INT_FEEDTHRU_2_ER1BEG3", + "MONITOR_ER1BEG3_4" + ], + [ + "INT_FEEDTHRU_2_LH1", + "MONITOR_LH1_4" + ], + [ + "INT_FEEDTHRU_2_LH2", + "MONITOR_LH2_4" + ], + [ + "INT_FEEDTHRU_2_LH3", + "MONITOR_LH3_4" + ], + [ + "INT_FEEDTHRU_2_LH4", + "MONITOR_LH4_4" + ], + [ + "INT_FEEDTHRU_2_LH5", + "MONITOR_LH5_4" + ], + [ + "INT_FEEDTHRU_2_LH6", + "MONITOR_LH6_4" + ], + [ + "INT_FEEDTHRU_2_LH7", + "MONITOR_LH7_4" + ], + [ + "INT_FEEDTHRU_2_LH8", + "MONITOR_LH8_4" + ], + [ + "INT_FEEDTHRU_2_LH9", + "MONITOR_LH9_4" + ], + [ + "INT_FEEDTHRU_2_LH10", + "MONITOR_LH10_4" + ], + [ + "INT_FEEDTHRU_2_LH11", + "MONITOR_LH11_4" + ], + [ + "INT_FEEDTHRU_2_LH12", + "MONITOR_LH12_4" + ], + [ + "INT_FEEDTHRU_2_NE2A0", + "MONITOR_NE2A0_4" + ], + [ + "INT_FEEDTHRU_2_NE2A1", + "MONITOR_NE2A1_4" + ], + [ + "INT_FEEDTHRU_2_NE2A2", + "MONITOR_NE2A2_4" + ], + [ + "INT_FEEDTHRU_2_NE2A3", + "MONITOR_NE2A3_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG0", + "MONITOR_NE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG1", + "MONITOR_NE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG2", + "MONITOR_NE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_NE4BEG3", + "MONITOR_NE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_NE4C0", + "MONITOR_NE4C0_4" + ], + [ + "INT_FEEDTHRU_2_NE4C1", + "MONITOR_NE4C1_4" + ], + [ + "INT_FEEDTHRU_2_NE4C2", + "MONITOR_NE4C2_4" + ], + [ + "INT_FEEDTHRU_2_NE4C3", + "MONITOR_NE4C3_4" + ], + [ + "INT_FEEDTHRU_2_NW2A0", + "MONITOR_NW2A0_4" + ], + [ + "INT_FEEDTHRU_2_NW2A1", + "MONITOR_NW2A1_4" + ], + [ + "INT_FEEDTHRU_2_NW2A2", + "MONITOR_NW2A2_4" + ], + [ + "INT_FEEDTHRU_2_NW2A3", + "MONITOR_NW2A3_4" + ], + [ + "INT_FEEDTHRU_2_NW4A0", + "MONITOR_NW4A0_4" + ], + [ + "INT_FEEDTHRU_2_NW4A1", + "MONITOR_NW4A1_4" + ], + [ + "INT_FEEDTHRU_2_NW4A2", + "MONITOR_NW4A2_4" + ], + [ + "INT_FEEDTHRU_2_NW4A3", + "MONITOR_NW4A3_4" + ], + [ + "INT_FEEDTHRU_2_NW4END0", + "MONITOR_NW4END0_4" + ], + [ + "INT_FEEDTHRU_2_NW4END1", + "MONITOR_NW4END1_4" + ], + [ + "INT_FEEDTHRU_2_NW4END2", + "MONITOR_NW4END2_4" + ], + [ + "INT_FEEDTHRU_2_NW4END3", + "MONITOR_NW4END3_4" + ], + [ + "INT_FEEDTHRU_2_SE2A0", + "MONITOR_SE2A0_4" + ], + [ + "INT_FEEDTHRU_2_SE2A1", + "MONITOR_SE2A1_4" + ], + [ + "INT_FEEDTHRU_2_SE2A2", + "MONITOR_SE2A2_4" + ], + [ + "INT_FEEDTHRU_2_SE2A3", + "MONITOR_SE2A3_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG0", + "MONITOR_SE4BEG0_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG1", + "MONITOR_SE4BEG1_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG2", + "MONITOR_SE4BEG2_4" + ], + [ + "INT_FEEDTHRU_2_SE4BEG3", + "MONITOR_SE4BEG3_4" + ], + [ + "INT_FEEDTHRU_2_SE4C0", + "MONITOR_SE4C0_4" + ], + [ + "INT_FEEDTHRU_2_SE4C1", + "MONITOR_SE4C1_4" + ], + [ + "INT_FEEDTHRU_2_SE4C2", + "MONITOR_SE4C2_4" + ], + [ + "INT_FEEDTHRU_2_SE4C3", + "MONITOR_SE4C3_4" + ], + [ + "INT_FEEDTHRU_2_SW2A0", + "MONITOR_SW2A0_4" + ], + [ + "INT_FEEDTHRU_2_SW2A1", + "MONITOR_SW2A1_4" + ], + [ + "INT_FEEDTHRU_2_SW2A2", + "MONITOR_SW2A2_4" + ], + [ + "INT_FEEDTHRU_2_SW2A3", + "MONITOR_SW2A3_4" + ], + [ + "INT_FEEDTHRU_2_SW4A0", + "MONITOR_SW4A0_4" + ], + [ + "INT_FEEDTHRU_2_SW4A1", + "MONITOR_SW4A1_4" + ], + [ + "INT_FEEDTHRU_2_SW4A2", + "MONITOR_SW4A2_4" + ], + [ + "INT_FEEDTHRU_2_SW4A3", + "MONITOR_SW4A3_4" + ], + [ + "INT_FEEDTHRU_2_SW4END0", + "MONITOR_SW4END0_4" + ], + [ + "INT_FEEDTHRU_2_SW4END1", + "MONITOR_SW4END1_4" + ], + [ + "INT_FEEDTHRU_2_SW4END2", + "MONITOR_SW4END2_4" + ], + [ + "INT_FEEDTHRU_2_SW4END3", + "MONITOR_SW4END3_4" + ], + [ + "INT_FEEDTHRU_2_WL1END0", + "MONITOR_WL1END0_4" + ], + [ + "INT_FEEDTHRU_2_WL1END1", + "MONITOR_WL1END1_4" + ], + [ + "INT_FEEDTHRU_2_WL1END2", + "MONITOR_WL1END2_4" + ], + [ + "INT_FEEDTHRU_2_WL1END3", + "MONITOR_WL1END3_4" + ], + [ + "INT_FEEDTHRU_2_WR1END0", + "MONITOR_WR1END0_4" + ], + [ + "INT_FEEDTHRU_2_WR1END1", + "MONITOR_WR1END1_4" + ], + [ + "INT_FEEDTHRU_2_WR1END2", + "MONITOR_WR1END2_4" + ], + [ + "INT_FEEDTHRU_2_WR1END3", + "MONITOR_WR1END3_4" + ], + [ + "INT_FEEDTHRU_2_WW2A0", + "MONITOR_WW2A0_4" + ], + [ + "INT_FEEDTHRU_2_WW2A1", + "MONITOR_WW2A1_4" + ], + [ + "INT_FEEDTHRU_2_WW2A2", + "MONITOR_WW2A2_4" + ], + [ + "INT_FEEDTHRU_2_WW2A3", + "MONITOR_WW2A3_4" + ], + [ + "INT_FEEDTHRU_2_WW2END0", + "MONITOR_WW2END0_4" + ], + [ + "INT_FEEDTHRU_2_WW2END1", + "MONITOR_WW2END1_4" + ], + [ + "INT_FEEDTHRU_2_WW2END2", + "MONITOR_WW2END2_4" + ], + [ + "INT_FEEDTHRU_2_WW2END3", + "MONITOR_WW2END3_4" + ], + [ + "INT_FEEDTHRU_2_WW4A0", + "MONITOR_WW4A0_4" + ], + [ + "INT_FEEDTHRU_2_WW4A1", + "MONITOR_WW4A1_4" + ], + [ + "INT_FEEDTHRU_2_WW4A2", + "MONITOR_WW4A2_4" + ], + [ + "INT_FEEDTHRU_2_WW4A3", + "MONITOR_WW4A3_4" + ], + [ + "INT_FEEDTHRU_2_WW4B0", + "MONITOR_WW4B0_4" + ], + [ + "INT_FEEDTHRU_2_WW4B1", + "MONITOR_WW4B1_4" + ], + [ + "INT_FEEDTHRU_2_WW4B2", + "MONITOR_WW4B2_4" + ], + [ + "INT_FEEDTHRU_2_WW4B3", + "MONITOR_WW4B3_4" + ], + [ + "INT_FEEDTHRU_2_WW4C0", + "MONITOR_WW4C0_4" + ], + [ + "INT_FEEDTHRU_2_WW4C1", + "MONITOR_WW4C1_4" + ], + [ + "INT_FEEDTHRU_2_WW4C2", + "MONITOR_WW4C2_4" + ], + [ + "INT_FEEDTHRU_2_WW4C3", + "MONITOR_WW4C3_4" + ], + [ + "INT_FEEDTHRU_2_WW4END0", + "MONITOR_WW4END0_4" + ], + [ + "INT_FEEDTHRU_2_WW4END1", + "MONITOR_WW4END1_4" + ], + [ + "INT_FEEDTHRU_2_WW4END2", + "MONITOR_WW4END2_4" + ], + [ + "INT_FEEDTHRU_2_WW4END3", + "MONITOR_WW4END3_4" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_INTERFACE_L", + "INT_L" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "BYP_L0" + ], + [ + "INT_INTERFACE_BYP1", + "BYP_L1" + ], + [ + "INT_INTERFACE_BYP2", + "BYP_L2" + ], + [ + "INT_INTERFACE_BYP3", + "BYP_L3" + ], + [ + "INT_INTERFACE_BYP4", + "BYP_L4" + ], + [ + "INT_INTERFACE_BYP5", + "BYP_L5" + ], + [ + "INT_INTERFACE_BYP6", + "BYP_L6" + ], + [ + "INT_INTERFACE_BYP7", + "BYP_L7" + ], + [ + "INT_INTERFACE_CLK0", + "CLK_L0" + ], + [ + "INT_INTERFACE_CLK1", + "CLK_L1" + ], + [ + "INT_INTERFACE_CTRL0", + "CTRL_L0" + ], + [ + "INT_INTERFACE_CTRL1", + "CTRL_L1" + ], + [ + "INT_INTERFACE_EE2A0", + "EE2END0" + ], + [ + "INT_INTERFACE_EE2A1", + "EE2END1" + ], + [ + "INT_INTERFACE_EE2A2", + "EE2END2" + ], + [ + "INT_INTERFACE_EE2A3", + "EE2END3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "EE2A0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "EE2A1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "EE2A2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "EE2A3" + ], + [ + "INT_INTERFACE_EE4A0", + "EE4B0" + ], + [ + "INT_INTERFACE_EE4A1", + "EE4B1" + ], + [ + "INT_INTERFACE_EE4A2", + "EE4B2" + ], + [ + "INT_INTERFACE_EE4A3", + "EE4B3" + ], + [ + "INT_INTERFACE_EE4B0", + "EE4C0" + ], + [ + "INT_INTERFACE_EE4B1", + "EE4C1" + ], + [ + "INT_INTERFACE_EE4B2", + "EE4C2" + ], + [ + "INT_INTERFACE_EE4B3", + "EE4C3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "EE4A0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "EE4A1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "EE4A2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "EE4A3" + ], + [ + "INT_INTERFACE_EE4C0", + "EE4END0" + ], + [ + "INT_INTERFACE_EE4C1", + "EE4END1" + ], + [ + "INT_INTERFACE_EE4C2", + "EE4END2" + ], + [ + "INT_INTERFACE_EE4C3", + "EE4END3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "EL1END0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "EL1END1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "EL1END2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "EL1END3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "ER1END0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "ER1END1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "ER1END2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "ER1END3" + ], + [ + "INT_INTERFACE_FAN0", + "FAN_L0" + ], + [ + "INT_INTERFACE_FAN1", + "FAN_L1" + ], + [ + "INT_INTERFACE_FAN2", + "FAN_L2" + ], + [ + "INT_INTERFACE_FAN3", + "FAN_L3" + ], + [ + "INT_INTERFACE_FAN4", + "FAN_L4" + ], + [ + "INT_INTERFACE_FAN5", + "FAN_L5" + ], + [ + "INT_INTERFACE_FAN6", + "FAN_L6" + ], + [ + "INT_INTERFACE_FAN7", + "FAN_L7" + ], + [ + "INT_INTERFACE_IMUX0", + "IMUX_L0" + ], + [ + "INT_INTERFACE_IMUX1", + "IMUX_L1" + ], + [ + "INT_INTERFACE_IMUX2", + "IMUX_L2" + ], + [ + "INT_INTERFACE_IMUX3", + "IMUX_L3" + ], + [ + "INT_INTERFACE_IMUX4", + "IMUX_L4" + ], + [ + "INT_INTERFACE_IMUX5", + "IMUX_L5" + ], + [ + "INT_INTERFACE_IMUX6", + "IMUX_L6" + ], + [ + "INT_INTERFACE_IMUX7", + "IMUX_L7" + ], + [ + "INT_INTERFACE_IMUX8", + "IMUX_L8" + ], + [ + "INT_INTERFACE_IMUX9", + "IMUX_L9" + ], + [ + "INT_INTERFACE_IMUX10", + "IMUX_L10" + ], + [ + "INT_INTERFACE_IMUX11", + "IMUX_L11" + ], + [ + "INT_INTERFACE_IMUX12", + "IMUX_L12" + ], + [ + "INT_INTERFACE_IMUX13", + "IMUX_L13" + ], + [ + "INT_INTERFACE_IMUX14", + "IMUX_L14" + ], + [ + "INT_INTERFACE_IMUX15", + "IMUX_L15" + ], + [ + "INT_INTERFACE_IMUX16", + "IMUX_L16" + ], + [ + "INT_INTERFACE_IMUX17", + "IMUX_L17" + ], + [ + "INT_INTERFACE_IMUX18", + "IMUX_L18" + ], + [ + "INT_INTERFACE_IMUX19", + "IMUX_L19" + ], + [ + "INT_INTERFACE_IMUX20", + "IMUX_L20" + ], + [ + "INT_INTERFACE_IMUX21", + "IMUX_L21" + ], + [ + "INT_INTERFACE_IMUX22", + "IMUX_L22" + ], + [ + "INT_INTERFACE_IMUX23", + "IMUX_L23" + ], + [ + "INT_INTERFACE_IMUX24", + "IMUX_L24" + ], + [ + "INT_INTERFACE_IMUX25", + "IMUX_L25" + ], + [ + "INT_INTERFACE_IMUX26", + "IMUX_L26" + ], + [ + "INT_INTERFACE_IMUX27", + "IMUX_L27" + ], + [ + "INT_INTERFACE_IMUX28", + "IMUX_L28" + ], + [ + "INT_INTERFACE_IMUX29", + "IMUX_L29" + ], + [ + "INT_INTERFACE_IMUX30", + "IMUX_L30" + ], + [ + "INT_INTERFACE_IMUX31", + "IMUX_L31" + ], + [ + "INT_INTERFACE_IMUX32", + "IMUX_L32" + ], + [ + "INT_INTERFACE_IMUX33", + "IMUX_L33" + ], + [ + "INT_INTERFACE_IMUX34", + "IMUX_L34" + ], + [ + "INT_INTERFACE_IMUX35", + "IMUX_L35" + ], + [ + "INT_INTERFACE_IMUX36", + "IMUX_L36" + ], + [ + "INT_INTERFACE_IMUX37", + "IMUX_L37" + ], + [ + "INT_INTERFACE_IMUX38", + "IMUX_L38" + ], + [ + "INT_INTERFACE_IMUX39", + "IMUX_L39" + ], + [ + "INT_INTERFACE_IMUX40", + "IMUX_L40" + ], + [ + "INT_INTERFACE_IMUX41", + "IMUX_L41" + ], + [ + "INT_INTERFACE_IMUX42", + "IMUX_L42" + ], + [ + "INT_INTERFACE_IMUX43", + "IMUX_L43" + ], + [ + "INT_INTERFACE_IMUX44", + "IMUX_L44" + ], + [ + "INT_INTERFACE_IMUX45", + "IMUX_L45" + ], + [ + "INT_INTERFACE_IMUX46", + "IMUX_L46" + ], + [ + "INT_INTERFACE_IMUX47", + "IMUX_L47" + ], + [ + "INT_INTERFACE_LH1", + "LH0" + ], + [ + "INT_INTERFACE_LH2", + "LH1" + ], + [ + "INT_INTERFACE_LH3", + "LH2" + ], + [ + "INT_INTERFACE_LH4", + "LH3" + ], + [ + "INT_INTERFACE_LH5", + "LH4" + ], + [ + "INT_INTERFACE_LH6", + "LH5" + ], + [ + "INT_INTERFACE_LH7", + "LH6" + ], + [ + "INT_INTERFACE_LH8", + "LH7" + ], + [ + "INT_INTERFACE_LH9", + "LH8" + ], + [ + "INT_INTERFACE_LH10", + "LH9" + ], + [ + "INT_INTERFACE_LH11", + "LH10" + ], + [ + "INT_INTERFACE_LH12", + "LH11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L0", + "LOGIC_OUTS_L0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L1", + "LOGIC_OUTS_L1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L2", + "LOGIC_OUTS_L2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L3", + "LOGIC_OUTS_L3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L4", + "LOGIC_OUTS_L4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L5", + "LOGIC_OUTS_L5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L6", + "LOGIC_OUTS_L6" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L7", + "LOGIC_OUTS_L7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L8", + "LOGIC_OUTS_L8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L9", + "LOGIC_OUTS_L9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L10", + "LOGIC_OUTS_L10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L11", + "LOGIC_OUTS_L11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L12", + "LOGIC_OUTS_L12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L13", + "LOGIC_OUTS_L13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L14", + "LOGIC_OUTS_L14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L15", + "LOGIC_OUTS_L15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L16", + "LOGIC_OUTS_L16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L17", + "LOGIC_OUTS_L17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L18", + "LOGIC_OUTS_L18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L19", + "LOGIC_OUTS_L19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L20", + "LOGIC_OUTS_L20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L21", + "LOGIC_OUTS_L21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L22", + "LOGIC_OUTS_L22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L23", + "LOGIC_OUTS_L23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "NE2END0" + ], + [ + "INT_INTERFACE_NE2A1", + "NE2END1" + ], + [ + "INT_INTERFACE_NE2A2", + "NE2END2" + ], + [ + "INT_INTERFACE_NE2A3", + "NE2END3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "NE6A0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "NE6A1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "NE6A2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "NE6A3" + ], + [ + "INT_INTERFACE_NE4C0", + "NE6END0" + ], + [ + "INT_INTERFACE_NE4C1", + "NE6END1" + ], + [ + "INT_INTERFACE_NE4C2", + "NE6END2" + ], + [ + "INT_INTERFACE_NE4C3", + "NE6END3" + ], + [ + "INT_INTERFACE_NW2A0", + "NW2A0" + ], + [ + "INT_INTERFACE_NW2A1", + "NW2A1" + ], + [ + "INT_INTERFACE_NW2A2", + "NW2A2" + ], + [ + "INT_INTERFACE_NW2A3", + "NW2A3" + ], + [ + "INT_INTERFACE_NW4A0", + "NW6BEG0" + ], + [ + "INT_INTERFACE_NW4A1", + "NW6BEG1" + ], + [ + "INT_INTERFACE_NW4A2", + "NW6BEG2" + ], + [ + "INT_INTERFACE_NW4A3", + "NW6BEG3" + ], + [ + "INT_INTERFACE_NW4END0", + "NW6E0" + ], + [ + "INT_INTERFACE_NW4END1", + "NW6E1" + ], + [ + "INT_INTERFACE_NW4END2", + "NW6E2" + ], + [ + "INT_INTERFACE_NW4END3", + "NW6E3" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLK", + "INT_PHASER_TO_IO_ICLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV", + "INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK", + "INT_PHASER_TO_IO_OCLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90", + "INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV", + "INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "INT_INTERFACE_SE2A0", + "SE2END0" + ], + [ + "INT_INTERFACE_SE2A1", + "SE2END1" + ], + [ + "INT_INTERFACE_SE2A2", + "SE2END2" + ], + [ + "INT_INTERFACE_SE2A3", + "SE2END3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "SE6A0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "SE6A1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "SE6A2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "SE6A3" + ], + [ + "INT_INTERFACE_SE4C0", + "SE6END0" + ], + [ + "INT_INTERFACE_SE4C1", + "SE6END1" + ], + [ + "INT_INTERFACE_SE4C2", + "SE6END2" + ], + [ + "INT_INTERFACE_SE4C3", + "SE6END3" + ], + [ + "INT_INTERFACE_SW2A0", + "SW2A0" + ], + [ + "INT_INTERFACE_SW2A1", + "SW2A1" + ], + [ + "INT_INTERFACE_SW2A2", + "SW2A2" + ], + [ + "INT_INTERFACE_SW2A3", + "SW2A3" + ], + [ + "INT_INTERFACE_SW4A0", + "SW6BEG0" + ], + [ + "INT_INTERFACE_SW4A1", + "SW6BEG1" + ], + [ + "INT_INTERFACE_SW4A2", + "SW6BEG2" + ], + [ + "INT_INTERFACE_SW4A3", + "SW6BEG3" + ], + [ + "INT_INTERFACE_SW4END0", + "SW6E0" + ], + [ + "INT_INTERFACE_SW4END1", + "SW6E1" + ], + [ + "INT_INTERFACE_SW4END2", + "SW6E2" + ], + [ + "INT_INTERFACE_SW4END3", + "SW6E3" + ], + [ + "INT_INTERFACE_WL1END0", + "WL1BEG0" + ], + [ + "INT_INTERFACE_WL1END1", + "WL1BEG1" + ], + [ + "INT_INTERFACE_WL1END2", + "WL1BEG2" + ], + [ + "INT_INTERFACE_WL1END3", + "WL1BEG3" + ], + [ + "INT_INTERFACE_WR1END0", + "WR1BEG0" + ], + [ + "INT_INTERFACE_WR1END1", + "WR1BEG1" + ], + [ + "INT_INTERFACE_WR1END2", + "WR1BEG2" + ], + [ + "INT_INTERFACE_WR1END3", + "WR1BEG3" + ], + [ + "INT_INTERFACE_WW2A0", + "WW2BEG0" + ], + [ + "INT_INTERFACE_WW2A1", + "WW2BEG1" + ], + [ + "INT_INTERFACE_WW2A2", + "WW2BEG2" + ], + [ + "INT_INTERFACE_WW2A3", + "WW2BEG3" + ], + [ + "INT_INTERFACE_WW2END0", + "WW2A0" + ], + [ + "INT_INTERFACE_WW2END1", + "WW2A1" + ], + [ + "INT_INTERFACE_WW2END2", + "WW2A2" + ], + [ + "INT_INTERFACE_WW2END3", + "WW2A3" + ], + [ + "INT_INTERFACE_WW4A0", + "WW4BEG0" + ], + [ + "INT_INTERFACE_WW4A1", + "WW4BEG1" + ], + [ + "INT_INTERFACE_WW4A2", + "WW4BEG2" + ], + [ + "INT_INTERFACE_WW4A3", + "WW4BEG3" + ], + [ + "INT_INTERFACE_WW4B0", + "WW4A0" + ], + [ + "INT_INTERFACE_WW4B1", + "WW4A1" + ], + [ + "INT_INTERFACE_WW4B2", + "WW4A2" + ], + [ + "INT_INTERFACE_WW4B3", + "WW4A3" + ], + [ + "INT_INTERFACE_WW4C0", + "WW4B0" + ], + [ + "INT_INTERFACE_WW4C1", + "WW4B1" + ], + [ + "INT_INTERFACE_WW4C2", + "WW4B2" + ], + [ + "INT_INTERFACE_WW4C3", + "WW4B3" + ], + [ + "INT_INTERFACE_WW4END0", + "WW4C0" + ], + [ + "INT_INTERFACE_WW4END1", + "WW4C1" + ], + [ + "INT_INTERFACE_WW4END2", + "WW4C2" + ], + [ + "INT_INTERFACE_WW4END3", + "WW4C3" + ], + [ + "L_INT_INTER_DQS_IOTOPHASER", + "INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "INT_INTERFACE_L", + "VFRAME" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "VFRAME_BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "VFRAME_BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "VFRAME_BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "VFRAME_BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "VFRAME_BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "VFRAME_BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "VFRAME_BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "VFRAME_BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "VFRAME_CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "VFRAME_CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "VFRAME_CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "VFRAME_CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "VFRAME_EE2A0" + ], + [ + "INT_INTERFACE_EE2A1", + "VFRAME_EE2A1" + ], + [ + "INT_INTERFACE_EE2A2", + "VFRAME_EE2A2" + ], + [ + "INT_INTERFACE_EE2A3", + "VFRAME_EE2A3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "VFRAME_EE2BEG0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "VFRAME_EE2BEG1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "VFRAME_EE2BEG2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "VFRAME_EE2BEG3" + ], + [ + "INT_INTERFACE_EE4A0", + "VFRAME_EE4A0" + ], + [ + "INT_INTERFACE_EE4A1", + "VFRAME_EE4A1" + ], + [ + "INT_INTERFACE_EE4A2", + "VFRAME_EE4A2" + ], + [ + "INT_INTERFACE_EE4A3", + "VFRAME_EE4A3" + ], + [ + "INT_INTERFACE_EE4B0", + "VFRAME_EE4B0" + ], + [ + "INT_INTERFACE_EE4B1", + "VFRAME_EE4B1" + ], + [ + "INT_INTERFACE_EE4B2", + "VFRAME_EE4B2" + ], + [ + "INT_INTERFACE_EE4B3", + "VFRAME_EE4B3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "VFRAME_EE4BEG0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "VFRAME_EE4BEG1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "VFRAME_EE4BEG2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "VFRAME_EE4BEG3" + ], + [ + "INT_INTERFACE_EE4C0", + "VFRAME_EE4C0" + ], + [ + "INT_INTERFACE_EE4C1", + "VFRAME_EE4C1" + ], + [ + "INT_INTERFACE_EE4C2", + "VFRAME_EE4C2" + ], + [ + "INT_INTERFACE_EE4C3", + "VFRAME_EE4C3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "VFRAME_EL1BEG0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "VFRAME_EL1BEG1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "VFRAME_EL1BEG2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "VFRAME_EL1BEG3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "VFRAME_ER1BEG0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "VFRAME_ER1BEG1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "VFRAME_ER1BEG2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "VFRAME_ER1BEG3" + ], + [ + "INT_INTERFACE_FAN0", + "VFRAME_FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "VFRAME_FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "VFRAME_FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "VFRAME_FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "VFRAME_FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "VFRAME_FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "VFRAME_FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "VFRAME_FAN7" + ], + [ + "INT_INTERFACE_IMUX0", + "VFRAME_IMUX0" + ], + [ + "INT_INTERFACE_IMUX1", + "VFRAME_IMUX1" + ], + [ + "INT_INTERFACE_IMUX2", + "VFRAME_IMUX2" + ], + [ + "INT_INTERFACE_IMUX3", + "VFRAME_IMUX3" + ], + [ + "INT_INTERFACE_IMUX4", + "VFRAME_IMUX4" + ], + [ + "INT_INTERFACE_IMUX5", + "VFRAME_IMUX5" + ], + [ + "INT_INTERFACE_IMUX6", + "VFRAME_IMUX6" + ], + [ + "INT_INTERFACE_IMUX7", + "VFRAME_IMUX7" + ], + [ + "INT_INTERFACE_IMUX8", + "VFRAME_IMUX8" + ], + [ + "INT_INTERFACE_IMUX9", + "VFRAME_IMUX9" + ], + [ + "INT_INTERFACE_IMUX10", + "VFRAME_IMUX10" + ], + [ + "INT_INTERFACE_IMUX11", + "VFRAME_IMUX11" + ], + [ + "INT_INTERFACE_IMUX12", + "VFRAME_IMUX12" + ], + [ + "INT_INTERFACE_IMUX13", + "VFRAME_IMUX13" + ], + [ + "INT_INTERFACE_IMUX14", + "VFRAME_IMUX14" + ], + [ + "INT_INTERFACE_IMUX15", + "VFRAME_IMUX15" + ], + [ + "INT_INTERFACE_IMUX16", + "VFRAME_IMUX16" + ], + [ + "INT_INTERFACE_IMUX17", + "VFRAME_IMUX17" + ], + [ + "INT_INTERFACE_IMUX18", + "VFRAME_IMUX18" + ], + [ + "INT_INTERFACE_IMUX19", + "VFRAME_IMUX19" + ], + [ + "INT_INTERFACE_IMUX20", + "VFRAME_IMUX20" + ], + [ + "INT_INTERFACE_IMUX21", + "VFRAME_IMUX21" + ], + [ + "INT_INTERFACE_IMUX22", + "VFRAME_IMUX22" + ], + [ + "INT_INTERFACE_IMUX23", + "VFRAME_IMUX23" + ], + [ + "INT_INTERFACE_IMUX24", + "VFRAME_IMUX24" + ], + [ + "INT_INTERFACE_IMUX25", + "VFRAME_IMUX25" + ], + [ + "INT_INTERFACE_IMUX26", + "VFRAME_IMUX26" + ], + [ + "INT_INTERFACE_IMUX27", + "VFRAME_IMUX27" + ], + [ + "INT_INTERFACE_IMUX28", + "VFRAME_IMUX28" + ], + [ + "INT_INTERFACE_IMUX29", + "VFRAME_IMUX29" + ], + [ + "INT_INTERFACE_IMUX30", + "VFRAME_IMUX30" + ], + [ + "INT_INTERFACE_IMUX31", + "VFRAME_IMUX31" + ], + [ + "INT_INTERFACE_IMUX32", + "VFRAME_IMUX32" + ], + [ + "INT_INTERFACE_IMUX33", + "VFRAME_IMUX33" + ], + [ + "INT_INTERFACE_IMUX34", + "VFRAME_IMUX34" + ], + [ + "INT_INTERFACE_IMUX35", + "VFRAME_IMUX35" + ], + [ + "INT_INTERFACE_IMUX36", + "VFRAME_IMUX36" + ], + [ + "INT_INTERFACE_IMUX37", + "VFRAME_IMUX37" + ], + [ + "INT_INTERFACE_IMUX38", + "VFRAME_IMUX38" + ], + [ + "INT_INTERFACE_IMUX39", + "VFRAME_IMUX39" + ], + [ + "INT_INTERFACE_IMUX40", + "VFRAME_IMUX40" + ], + [ + "INT_INTERFACE_IMUX41", + "VFRAME_IMUX41" + ], + [ + "INT_INTERFACE_IMUX42", + "VFRAME_IMUX42" + ], + [ + "INT_INTERFACE_IMUX43", + "VFRAME_IMUX43" + ], + [ + "INT_INTERFACE_IMUX44", + "VFRAME_IMUX44" + ], + [ + "INT_INTERFACE_IMUX45", + "VFRAME_IMUX45" + ], + [ + "INT_INTERFACE_IMUX46", + "VFRAME_IMUX46" + ], + [ + "INT_INTERFACE_IMUX47", + "VFRAME_IMUX47" + ], + [ + "INT_INTERFACE_LH1", + "VFRAME_LH1" + ], + [ + "INT_INTERFACE_LH2", + "VFRAME_LH2" + ], + [ + "INT_INTERFACE_LH3", + "VFRAME_LH3" + ], + [ + "INT_INTERFACE_LH4", + "VFRAME_LH4" + ], + [ + "INT_INTERFACE_LH5", + "VFRAME_LH5" + ], + [ + "INT_INTERFACE_LH6", + "VFRAME_LH6" + ], + [ + "INT_INTERFACE_LH7", + "VFRAME_LH7" + ], + [ + "INT_INTERFACE_LH8", + "VFRAME_LH8" + ], + [ + "INT_INTERFACE_LH9", + "VFRAME_LH9" + ], + [ + "INT_INTERFACE_LH10", + "VFRAME_LH10" + ], + [ + "INT_INTERFACE_LH11", + "VFRAME_LH11" + ], + [ + "INT_INTERFACE_LH12", + "VFRAME_LH12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "VFRAME_MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "VFRAME_MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "VFRAME_NE2A0" + ], + [ + "INT_INTERFACE_NE2A1", + "VFRAME_NE2A1" + ], + [ + "INT_INTERFACE_NE2A2", + "VFRAME_NE2A2" + ], + [ + "INT_INTERFACE_NE2A3", + "VFRAME_NE2A3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "VFRAME_NE4BEG0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "VFRAME_NE4BEG1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "VFRAME_NE4BEG2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "VFRAME_NE4BEG3" + ], + [ + "INT_INTERFACE_NE4C0", + "VFRAME_NE4C0" + ], + [ + "INT_INTERFACE_NE4C1", + "VFRAME_NE4C1" + ], + [ + "INT_INTERFACE_NE4C2", + "VFRAME_NE4C2" + ], + [ + "INT_INTERFACE_NE4C3", + "VFRAME_NE4C3" + ], + [ + "INT_INTERFACE_NW2A0", + "VFRAME_NW2A0" + ], + [ + "INT_INTERFACE_NW2A1", + "VFRAME_NW2A1" + ], + [ + "INT_INTERFACE_NW2A2", + "VFRAME_NW2A2" + ], + [ + "INT_INTERFACE_NW2A3", + "VFRAME_NW2A3" + ], + [ + "INT_INTERFACE_NW4A0", + "VFRAME_NW4A0" + ], + [ + "INT_INTERFACE_NW4A1", + "VFRAME_NW4A1" + ], + [ + "INT_INTERFACE_NW4A2", + "VFRAME_NW4A2" + ], + [ + "INT_INTERFACE_NW4A3", + "VFRAME_NW4A3" + ], + [ + "INT_INTERFACE_NW4END0", + "VFRAME_NW4END0" + ], + [ + "INT_INTERFACE_NW4END1", + "VFRAME_NW4END1" + ], + [ + "INT_INTERFACE_NW4END2", + "VFRAME_NW4END2" + ], + [ + "INT_INTERFACE_NW4END3", + "VFRAME_NW4END3" + ], + [ + "INT_INTERFACE_SE2A0", + "VFRAME_SE2A0" + ], + [ + "INT_INTERFACE_SE2A1", + "VFRAME_SE2A1" + ], + [ + "INT_INTERFACE_SE2A2", + "VFRAME_SE2A2" + ], + [ + "INT_INTERFACE_SE2A3", + "VFRAME_SE2A3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "VFRAME_SE4BEG0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "VFRAME_SE4BEG1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "VFRAME_SE4BEG2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "VFRAME_SE4BEG3" + ], + [ + "INT_INTERFACE_SE4C0", + "VFRAME_SE4C0" + ], + [ + "INT_INTERFACE_SE4C1", + "VFRAME_SE4C1" + ], + [ + "INT_INTERFACE_SE4C2", + "VFRAME_SE4C2" + ], + [ + "INT_INTERFACE_SE4C3", + "VFRAME_SE4C3" + ], + [ + "INT_INTERFACE_SW2A0", + "VFRAME_SW2A0" + ], + [ + "INT_INTERFACE_SW2A1", + "VFRAME_SW2A1" + ], + [ + "INT_INTERFACE_SW2A2", + "VFRAME_SW2A2" + ], + [ + "INT_INTERFACE_SW2A3", + "VFRAME_SW2A3" + ], + [ + "INT_INTERFACE_SW4A0", + "VFRAME_SW4A0" + ], + [ + "INT_INTERFACE_SW4A1", + "VFRAME_SW4A1" + ], + [ + "INT_INTERFACE_SW4A2", + "VFRAME_SW4A2" + ], + [ + "INT_INTERFACE_SW4A3", + "VFRAME_SW4A3" + ], + [ + "INT_INTERFACE_SW4END0", + "VFRAME_SW4END0" + ], + [ + "INT_INTERFACE_SW4END1", + "VFRAME_SW4END1" + ], + [ + "INT_INTERFACE_SW4END2", + "VFRAME_SW4END2" + ], + [ + "INT_INTERFACE_SW4END3", + "VFRAME_SW4END3" + ], + [ + "INT_INTERFACE_WL1END0", + "VFRAME_WL1END0" + ], + [ + "INT_INTERFACE_WL1END1", + "VFRAME_WL1END1" + ], + [ + "INT_INTERFACE_WL1END2", + "VFRAME_WL1END2" + ], + [ + "INT_INTERFACE_WL1END3", + "VFRAME_WL1END3" + ], + [ + "INT_INTERFACE_WR1END0", + "VFRAME_WR1END0" + ], + [ + "INT_INTERFACE_WR1END1", + "VFRAME_WR1END1" + ], + [ + "INT_INTERFACE_WR1END2", + "VFRAME_WR1END2" + ], + [ + "INT_INTERFACE_WR1END3", + "VFRAME_WR1END3" + ], + [ + "INT_INTERFACE_WW2A0", + "VFRAME_WW2A0" + ], + [ + "INT_INTERFACE_WW2A1", + "VFRAME_WW2A1" + ], + [ + "INT_INTERFACE_WW2A2", + "VFRAME_WW2A2" + ], + [ + "INT_INTERFACE_WW2A3", + "VFRAME_WW2A3" + ], + [ + "INT_INTERFACE_WW2END0", + "VFRAME_WW2END0" + ], + [ + "INT_INTERFACE_WW2END1", + "VFRAME_WW2END1" + ], + [ + "INT_INTERFACE_WW2END2", + "VFRAME_WW2END2" + ], + [ + "INT_INTERFACE_WW2END3", + "VFRAME_WW2END3" + ], + [ + "INT_INTERFACE_WW4A0", + "VFRAME_WW4A0" + ], + [ + "INT_INTERFACE_WW4A1", + "VFRAME_WW4A1" + ], + [ + "INT_INTERFACE_WW4A2", + "VFRAME_WW4A2" + ], + [ + "INT_INTERFACE_WW4A3", + "VFRAME_WW4A3" + ], + [ + "INT_INTERFACE_WW4B0", + "VFRAME_WW4B0" + ], + [ + "INT_INTERFACE_WW4B1", + "VFRAME_WW4B1" + ], + [ + "INT_INTERFACE_WW4B2", + "VFRAME_WW4B2" + ], + [ + "INT_INTERFACE_WW4B3", + "VFRAME_WW4B3" + ], + [ + "INT_INTERFACE_WW4C0", + "VFRAME_WW4C0" + ], + [ + "INT_INTERFACE_WW4C1", + "VFRAME_WW4C1" + ], + [ + "INT_INTERFACE_WW4C2", + "VFRAME_WW4C2" + ], + [ + "INT_INTERFACE_WW4C3", + "VFRAME_WW4C3" + ], + [ + "INT_INTERFACE_WW4END0", + "VFRAME_WW4END0" + ], + [ + "INT_INTERFACE_WW4END1", + "VFRAME_WW4END1" + ], + [ + "INT_INTERFACE_WW4END2", + "VFRAME_WW4END2" + ], + [ + "INT_INTERFACE_WW4END3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "INT_INTERFACE_R", + "INT_R" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "EE2A0" + ], + [ + "INT_INTERFACE_EE2A1", + "EE2A1" + ], + [ + "INT_INTERFACE_EE2A2", + "EE2A2" + ], + [ + "INT_INTERFACE_EE2A3", + "EE2A3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "EE2BEG0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "EE2BEG1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "EE2BEG2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "EE2BEG3" + ], + [ + "INT_INTERFACE_EE4A0", + "EE4A0" + ], + [ + "INT_INTERFACE_EE4A1", + "EE4A1" + ], + [ + "INT_INTERFACE_EE4A2", + "EE4A2" + ], + [ + "INT_INTERFACE_EE4A3", + "EE4A3" + ], + [ + "INT_INTERFACE_EE4B0", + "EE4B0" + ], + [ + "INT_INTERFACE_EE4B1", + "EE4B1" + ], + [ + "INT_INTERFACE_EE4B2", + "EE4B2" + ], + [ + "INT_INTERFACE_EE4B3", + "EE4B3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "EE4BEG0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "EE4BEG1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "EE4BEG2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "EE4BEG3" + ], + [ + "INT_INTERFACE_EE4C0", + "EE4C0" + ], + [ + "INT_INTERFACE_EE4C1", + "EE4C1" + ], + [ + "INT_INTERFACE_EE4C2", + "EE4C2" + ], + [ + "INT_INTERFACE_EE4C3", + "EE4C3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "EL1BEG0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "EL1BEG1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "EL1BEG2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "EL1BEG3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "ER1BEG0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "ER1BEG1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "ER1BEG2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "ER1BEG3" + ], + [ + "INT_INTERFACE_FAN0", + "FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "FAN7" + ], + [ + "INT_INTERFACE_IMUX0", + "IMUX0" + ], + [ + "INT_INTERFACE_IMUX1", + "IMUX1" + ], + [ + "INT_INTERFACE_IMUX2", + "IMUX2" + ], + [ + "INT_INTERFACE_IMUX3", + "IMUX3" + ], + [ + "INT_INTERFACE_IMUX4", + "IMUX4" + ], + [ + "INT_INTERFACE_IMUX5", + "IMUX5" + ], + [ + "INT_INTERFACE_IMUX6", + "IMUX6" + ], + [ + "INT_INTERFACE_IMUX7", + "IMUX7" + ], + [ + "INT_INTERFACE_IMUX8", + "IMUX8" + ], + [ + "INT_INTERFACE_IMUX9", + "IMUX9" + ], + [ + "INT_INTERFACE_IMUX10", + "IMUX10" + ], + [ + "INT_INTERFACE_IMUX11", + "IMUX11" + ], + [ + "INT_INTERFACE_IMUX12", + "IMUX12" + ], + [ + "INT_INTERFACE_IMUX13", + "IMUX13" + ], + [ + "INT_INTERFACE_IMUX14", + "IMUX14" + ], + [ + "INT_INTERFACE_IMUX15", + "IMUX15" + ], + [ + "INT_INTERFACE_IMUX16", + "IMUX16" + ], + [ + "INT_INTERFACE_IMUX17", + "IMUX17" + ], + [ + "INT_INTERFACE_IMUX18", + "IMUX18" + ], + [ + "INT_INTERFACE_IMUX19", + "IMUX19" + ], + [ + "INT_INTERFACE_IMUX20", + "IMUX20" + ], + [ + "INT_INTERFACE_IMUX21", + "IMUX21" + ], + [ + "INT_INTERFACE_IMUX22", + "IMUX22" + ], + [ + "INT_INTERFACE_IMUX23", + "IMUX23" + ], + [ + "INT_INTERFACE_IMUX24", + "IMUX24" + ], + [ + "INT_INTERFACE_IMUX25", + "IMUX25" + ], + [ + "INT_INTERFACE_IMUX26", + "IMUX26" + ], + [ + "INT_INTERFACE_IMUX27", + "IMUX27" + ], + [ + "INT_INTERFACE_IMUX28", + "IMUX28" + ], + [ + "INT_INTERFACE_IMUX29", + "IMUX29" + ], + [ + "INT_INTERFACE_IMUX30", + "IMUX30" + ], + [ + "INT_INTERFACE_IMUX31", + "IMUX31" + ], + [ + "INT_INTERFACE_IMUX32", + "IMUX32" + ], + [ + "INT_INTERFACE_IMUX33", + "IMUX33" + ], + [ + "INT_INTERFACE_IMUX34", + "IMUX34" + ], + [ + "INT_INTERFACE_IMUX35", + "IMUX35" + ], + [ + "INT_INTERFACE_IMUX36", + "IMUX36" + ], + [ + "INT_INTERFACE_IMUX37", + "IMUX37" + ], + [ + "INT_INTERFACE_IMUX38", + "IMUX38" + ], + [ + "INT_INTERFACE_IMUX39", + "IMUX39" + ], + [ + "INT_INTERFACE_IMUX40", + "IMUX40" + ], + [ + "INT_INTERFACE_IMUX41", + "IMUX41" + ], + [ + "INT_INTERFACE_IMUX42", + "IMUX42" + ], + [ + "INT_INTERFACE_IMUX43", + "IMUX43" + ], + [ + "INT_INTERFACE_IMUX44", + "IMUX44" + ], + [ + "INT_INTERFACE_IMUX45", + "IMUX45" + ], + [ + "INT_INTERFACE_IMUX46", + "IMUX46" + ], + [ + "INT_INTERFACE_IMUX47", + "IMUX47" + ], + [ + "INT_INTERFACE_LH1", + "LH1" + ], + [ + "INT_INTERFACE_LH2", + "LH2" + ], + [ + "INT_INTERFACE_LH3", + "LH3" + ], + [ + "INT_INTERFACE_LH4", + "LH4" + ], + [ + "INT_INTERFACE_LH5", + "LH5" + ], + [ + "INT_INTERFACE_LH6", + "LH6" + ], + [ + "INT_INTERFACE_LH7", + "LH7" + ], + [ + "INT_INTERFACE_LH8", + "LH8" + ], + [ + "INT_INTERFACE_LH9", + "LH9" + ], + [ + "INT_INTERFACE_LH10", + "LH10" + ], + [ + "INT_INTERFACE_LH11", + "LH11" + ], + [ + "INT_INTERFACE_LH12", + "LH12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS0", + "LOGIC_OUTS0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS1", + "LOGIC_OUTS1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS2", + "LOGIC_OUTS2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS3", + "LOGIC_OUTS3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS4", + "LOGIC_OUTS4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS5", + "LOGIC_OUTS5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS6", + "LOGIC_OUTS6" + ], + [ + "INT_INTERFACE_LOGIC_OUTS7", + "LOGIC_OUTS7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS8", + "LOGIC_OUTS8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS9", + "LOGIC_OUTS9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS10", + "LOGIC_OUTS10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS11", + "LOGIC_OUTS11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS12", + "LOGIC_OUTS12" + ], + [ + "INT_INTERFACE_LOGIC_OUTS13", + "LOGIC_OUTS13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS14", + "LOGIC_OUTS14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS15", + "LOGIC_OUTS15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS16", + "LOGIC_OUTS16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS17", + "LOGIC_OUTS17" + ], + [ + "INT_INTERFACE_LOGIC_OUTS18", + "LOGIC_OUTS18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS19", + "LOGIC_OUTS19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS20", + "LOGIC_OUTS20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS21", + "LOGIC_OUTS21" + ], + [ + "INT_INTERFACE_LOGIC_OUTS22", + "LOGIC_OUTS22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS23", + "LOGIC_OUTS23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "NE2A0" + ], + [ + "INT_INTERFACE_NE2A1", + "NE2A1" + ], + [ + "INT_INTERFACE_NE2A2", + "NE2A2" + ], + [ + "INT_INTERFACE_NE2A3", + "NE2A3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "NE6BEG0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "NE6BEG1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "NE6BEG2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "NE6BEG3" + ], + [ + "INT_INTERFACE_NE4C0", + "NE6E0" + ], + [ + "INT_INTERFACE_NE4C1", + "NE6E1" + ], + [ + "INT_INTERFACE_NE4C2", + "NE6E2" + ], + [ + "INT_INTERFACE_NE4C3", + "NE6E3" + ], + [ + "INT_INTERFACE_NW2A0", + "NW2END0" + ], + [ + "INT_INTERFACE_NW2A1", + "NW2END1" + ], + [ + "INT_INTERFACE_NW2A2", + "NW2END2" + ], + [ + "INT_INTERFACE_NW2A3", + "NW2END3" + ], + [ + "INT_INTERFACE_NW4A0", + "NW6A0" + ], + [ + "INT_INTERFACE_NW4A1", + "NW6A1" + ], + [ + "INT_INTERFACE_NW4A2", + "NW6A2" + ], + [ + "INT_INTERFACE_NW4A3", + "NW6A3" + ], + [ + "INT_INTERFACE_NW4END0", + "NW6END0" + ], + [ + "INT_INTERFACE_NW4END1", + "NW6END1" + ], + [ + "INT_INTERFACE_NW4END2", + "NW6END2" + ], + [ + "INT_INTERFACE_NW4END3", + "NW6END3" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLK", + "INT_PHASER_TO_IO_ICLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV", + "INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK", + "INT_PHASER_TO_IO_OCLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90", + "INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV", + "INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "INT_INTERFACE_SE2A0", + "SE2A0" + ], + [ + "INT_INTERFACE_SE2A1", + "SE2A1" + ], + [ + "INT_INTERFACE_SE2A2", + "SE2A2" + ], + [ + "INT_INTERFACE_SE2A3", + "SE2A3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "SE6BEG0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "SE6BEG1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "SE6BEG2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "SE6BEG3" + ], + [ + "INT_INTERFACE_SE4C0", + "SE6E0" + ], + [ + "INT_INTERFACE_SE4C1", + "SE6E1" + ], + [ + "INT_INTERFACE_SE4C2", + "SE6E2" + ], + [ + "INT_INTERFACE_SE4C3", + "SE6E3" + ], + [ + "INT_INTERFACE_SW2A0", + "SW2END0" + ], + [ + "INT_INTERFACE_SW2A1", + "SW2END1" + ], + [ + "INT_INTERFACE_SW2A2", + "SW2END2" + ], + [ + "INT_INTERFACE_SW2A3", + "SW2END3" + ], + [ + "INT_INTERFACE_SW4A0", + "SW6A0" + ], + [ + "INT_INTERFACE_SW4A1", + "SW6A1" + ], + [ + "INT_INTERFACE_SW4A2", + "SW6A2" + ], + [ + "INT_INTERFACE_SW4A3", + "SW6A3" + ], + [ + "INT_INTERFACE_SW4END0", + "SW6END0" + ], + [ + "INT_INTERFACE_SW4END1", + "SW6END1" + ], + [ + "INT_INTERFACE_SW4END2", + "SW6END2" + ], + [ + "INT_INTERFACE_SW4END3", + "SW6END3" + ], + [ + "INT_INTERFACE_WL1END0", + "WL1END0" + ], + [ + "INT_INTERFACE_WL1END1", + "WL1END1" + ], + [ + "INT_INTERFACE_WL1END2", + "WL1END2" + ], + [ + "INT_INTERFACE_WL1END3", + "WL1END3" + ], + [ + "INT_INTERFACE_WR1END0", + "WR1END0" + ], + [ + "INT_INTERFACE_WR1END1", + "WR1END1" + ], + [ + "INT_INTERFACE_WR1END2", + "WR1END2" + ], + [ + "INT_INTERFACE_WR1END3", + "WR1END3" + ], + [ + "INT_INTERFACE_WW2A0", + "WW2A0" + ], + [ + "INT_INTERFACE_WW2A1", + "WW2A1" + ], + [ + "INT_INTERFACE_WW2A2", + "WW2A2" + ], + [ + "INT_INTERFACE_WW2A3", + "WW2A3" + ], + [ + "INT_INTERFACE_WW2END0", + "WW2END0" + ], + [ + "INT_INTERFACE_WW2END1", + "WW2END1" + ], + [ + "INT_INTERFACE_WW2END2", + "WW2END2" + ], + [ + "INT_INTERFACE_WW2END3", + "WW2END3" + ], + [ + "INT_INTERFACE_WW4A0", + "WW4A0" + ], + [ + "INT_INTERFACE_WW4A1", + "WW4A1" + ], + [ + "INT_INTERFACE_WW4A2", + "WW4A2" + ], + [ + "INT_INTERFACE_WW4A3", + "WW4A3" + ], + [ + "INT_INTERFACE_WW4B0", + "WW4B0" + ], + [ + "INT_INTERFACE_WW4B1", + "WW4B1" + ], + [ + "INT_INTERFACE_WW4B2", + "WW4B2" + ], + [ + "INT_INTERFACE_WW4B3", + "WW4B3" + ], + [ + "INT_INTERFACE_WW4C0", + "WW4C0" + ], + [ + "INT_INTERFACE_WW4C1", + "WW4C1" + ], + [ + "INT_INTERFACE_WW4C2", + "WW4C2" + ], + [ + "INT_INTERFACE_WW4C3", + "WW4C3" + ], + [ + "INT_INTERFACE_WW4END0", + "WW4END0" + ], + [ + "INT_INTERFACE_WW4END1", + "WW4END1" + ], + [ + "INT_INTERFACE_WW4END2", + "WW4END2" + ], + [ + "INT_INTERFACE_WW4END3", + "WW4END3" + ], + [ + "L_INT_INTER_DQS_IOTOPHASER", + "INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "INT_L", + "INT_L" + ], + "wire_pairs": [ + [ + "BYP_BOUNCE2", + "BYP_BOUNCE_N3_2" + ], + [ + "BYP_BOUNCE3", + "BYP_BOUNCE_N3_3" + ], + [ + "BYP_BOUNCE6", + "BYP_BOUNCE_N3_6" + ], + [ + "BYP_BOUNCE7", + "BYP_BOUNCE_N3_7" + ], + [ + "EL1BEG3", + "EL1BEG_N3" + ], + [ + "ER1END3", + "ER1END_N3_3" + ], + [ + "LVB_L0", + "LVB_L1" + ], + [ + "LVB_L1", + "LVB_L2" + ], + [ + "LVB_L2", + "LVB_L3" + ], + [ + "LVB_L3", + "LVB_L4" + ], + [ + "LVB_L4", + "LVB_L5" + ], + [ + "LVB_L5", + "LVB_L6" + ], + [ + "LVB_L6", + "LVB_L7" + ], + [ + "LVB_L7", + "LVB_L8" + ], + [ + "LVB_L8", + "LVB_L9" + ], + [ + "LVB_L10", + "LVB_L11" + ], + [ + "LVB_L11", + "LVB_L12" + ], + [ + "LV_L0", + "LV_L1" + ], + [ + "LV_L1", + "LV_L2" + ], + [ + "LV_L2", + "LV_L3" + ], + [ + "LV_L3", + "LV_L4" + ], + [ + "LV_L4", + "LV_L5" + ], + [ + "LV_L5", + "LV_L6" + ], + [ + "LV_L6", + "LV_L7" + ], + [ + "LV_L7", + "LV_L8" + ], + [ + "LV_L8", + "LV_L9" + ], + [ + "LV_L10", + "LV_L11" + ], + [ + "LV_L11", + "LV_L12" + ], + [ + "LV_L12", + "LV_L13" + ], + [ + "LV_L13", + "LV_L14" + ], + [ + "LV_L14", + "LV_L15" + ], + [ + "LV_L15", + "LV_L16" + ], + [ + "LV_L16", + "LV_L17" + ], + [ + "LV_L17", + "LV_L18" + ], + [ + "NE6A0", + "NE6B0" + ], + [ + "NE6A1", + "NE6B1" + ], + [ + "NE6A2", + "NE6B2" + ], + [ + "NE6A3", + "NE6B3" + ], + [ + "NE6B0", + "NE6C0" + ], + [ + "NE6B1", + "NE6C1" + ], + [ + "NE6B2", + "NE6C2" + ], + [ + "NE6B3", + "NE6C3" + ], + [ + "NE6C0", + "NE6D0" + ], + [ + "NE6C1", + "NE6D1" + ], + [ + "NE6C2", + "NE6D2" + ], + [ + "NE6C3", + "NE6D3" + ], + [ + "NE6D0", + "NE6E0" + ], + [ + "NE6D1", + "NE6E1" + ], + [ + "NE6D2", + "NE6E2" + ], + [ + "NE6D3", + "NE6E3" + ], + [ + "NL1BEG0", + "NL1END0" + ], + [ + "NL1BEG1", + "NL1END1" + ], + [ + "NL1BEG2", + "NL1END2" + ], + [ + "NN2A0", + "NN2END0" + ], + [ + "NN2A1", + "NN2END1" + ], + [ + "NN2A2", + "NN2END2" + ], + [ + "NN2A3", + "NN2END3" + ], + [ + "NN6A0", + "NN6B0" + ], + [ + "NN6A1", + "NN6B1" + ], + [ + "NN6A2", + "NN6B2" + ], + [ + "NN6A3", + "NN6B3" + ], + [ + "NN6B0", + "NN6C0" + ], + [ + "NN6B1", + "NN6C1" + ], + [ + "NN6B2", + "NN6C2" + ], + [ + "NN6B3", + "NN6C3" + ], + [ + "NN6C0", + "NN6D0" + ], + [ + "NN6C1", + "NN6D1" + ], + [ + "NN6C2", + "NN6D2" + ], + [ + "NN6C3", + "NN6D3" + ], + [ + "NN6D0", + "NN6E0" + ], + [ + "NN6D1", + "NN6E1" + ], + [ + "NN6D2", + "NN6E2" + ], + [ + "NN6D3", + "NN6E3" + ], + [ + "NN6E0", + "NN6END0" + ], + [ + "NN6E1", + "NN6END1" + ], + [ + "NN6E2", + "NN6END2" + ], + [ + "NN6E3", + "NN6END3" + ], + [ + "NR1BEG0", + "NR1END0" + ], + [ + "NR1BEG1", + "NR1END1" + ], + [ + "NR1BEG2", + "NR1END2" + ], + [ + "NR1BEG3", + "NR1END3" + ], + [ + "NW6A0", + "NW6B0" + ], + [ + "NW6A1", + "NW6B1" + ], + [ + "NW6A2", + "NW6B2" + ], + [ + "NW6A3", + "NW6B3" + ], + [ + "NW6B0", + "NW6C0" + ], + [ + "NW6B1", + "NW6C1" + ], + [ + "NW6B2", + "NW6C2" + ], + [ + "NW6B3", + "NW6C3" + ], + [ + "NW6C0", + "NW6D0" + ], + [ + "NW6C1", + "NW6D1" + ], + [ + "NW6C2", + "NW6D2" + ], + [ + "NW6C3", + "NW6D3" + ], + [ + "NW6D0", + "NW6E0" + ], + [ + "NW6D1", + "NW6E1" + ], + [ + "NW6D2", + "NW6E2" + ], + [ + "NW6D3", + "NW6E3" + ], + [ + "SE2A0", + "SE2BEG0" + ], + [ + "SE2A1", + "SE2BEG1" + ], + [ + "SE2A2", + "SE2BEG2" + ], + [ + "SE2A3", + "SE2BEG3" + ], + [ + "SR1END3", + "SR1END_N3_3" + ], + [ + "SS2A0", + "SS2BEG0" + ], + [ + "SS2A1", + "SS2BEG1" + ], + [ + "SS2A2", + "SS2BEG2" + ], + [ + "SS2A3", + "SS2BEG3" + ], + [ + "SS2END3", + "SS2END_N0_3" + ], + [ + "SS6A0", + "SS6BEG0" + ], + [ + "SS6A1", + "SS6BEG1" + ], + [ + "SS6A2", + "SS6BEG2" + ], + [ + "SS6A3", + "SS6BEG3" + ], + [ + "SS6END3", + "SS6END_N0_3" + ], + [ + "SW2A0", + "SW2BEG0" + ], + [ + "SW2A1", + "SW2BEG1" + ], + [ + "SW2A2", + "SW2BEG2" + ], + [ + "SW2A3", + "SW2BEG3" + ], + [ + "SW2END3", + "SW2END_N0_3" + ], + [ + "SW6END3", + "SW6END_N0_3" + ], + [ + "WL1BEG3", + "WL1BEG_N3" + ], + [ + "WL1END3", + "WL1END_N1_3" + ], + [ + "WW2END3", + "WW2END_N0_3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "INT_L", + "INT_L" + ], + "wire_pairs": [ + [ + "EL1END0", + "EL1END_S3_0" + ], + [ + "ER1BEG0", + "ER1BEG_S0" + ], + [ + "FAN_BOUNCE0", + "FAN_BOUNCE_S3_0" + ], + [ + "FAN_BOUNCE2", + "FAN_BOUNCE_S3_2" + ], + [ + "FAN_BOUNCE4", + "FAN_BOUNCE_S3_4" + ], + [ + "FAN_BOUNCE6", + "FAN_BOUNCE_S3_6" + ], + [ + "GCLK_L_B6", + "GCLK_L_B6" + ], + [ + "GCLK_L_B7", + "GCLK_L_B7" + ], + [ + "GCLK_L_B8", + "GCLK_L_B8" + ], + [ + "GCLK_L_B9", + "GCLK_L_B9" + ], + [ + "GCLK_L_B10", + "GCLK_L_B10" + ], + [ + "GCLK_L_B11", + "GCLK_L_B11" + ], + [ + "LVB_L10", + "LVB_L9" + ], + [ + "LV_L10", + "LV_L9" + ], + [ + "NE2A0", + "NE2BEG0" + ], + [ + "NE2A1", + "NE2BEG1" + ], + [ + "NE2A2", + "NE2BEG2" + ], + [ + "NE2A3", + "NE2BEG3" + ], + [ + "NE2END0", + "NE2END_S3_0" + ], + [ + "NL1END0", + "NL1END_S3_0" + ], + [ + "NN2A0", + "NN2BEG0" + ], + [ + "NN2A1", + "NN2BEG1" + ], + [ + "NN2A2", + "NN2BEG2" + ], + [ + "NN2A3", + "NN2BEG3" + ], + [ + "NN2END0", + "NN2END_S2_0" + ], + [ + "NN6A0", + "NN6BEG0" + ], + [ + "NN6A1", + "NN6BEG1" + ], + [ + "NN6A2", + "NN6BEG2" + ], + [ + "NN6A3", + "NN6BEG3" + ], + [ + "NN6END0", + "NN6END_S1_0" + ], + [ + "NW2A0", + "NW2BEG0" + ], + [ + "NW2A1", + "NW2BEG1" + ], + [ + "NW2A2", + "NW2BEG2" + ], + [ + "NW2A3", + "NW2BEG3" + ], + [ + "NW2END0", + "NW2END_S0_0" + ], + [ + "NW6END0", + "NW6END_S0_0" + ], + [ + "SE6A0", + "SE6B0" + ], + [ + "SE6A1", + "SE6B1" + ], + [ + "SE6A2", + "SE6B2" + ], + [ + "SE6A3", + "SE6B3" + ], + [ + "SE6B0", + "SE6C0" + ], + [ + "SE6B1", + "SE6C1" + ], + [ + "SE6B2", + "SE6C2" + ], + [ + "SE6B3", + "SE6C3" + ], + [ + "SE6C0", + "SE6D0" + ], + [ + "SE6C1", + "SE6D1" + ], + [ + "SE6C2", + "SE6D2" + ], + [ + "SE6C3", + "SE6D3" + ], + [ + "SE6D0", + "SE6E0" + ], + [ + "SE6D1", + "SE6E1" + ], + [ + "SE6D2", + "SE6E2" + ], + [ + "SE6D3", + "SE6E3" + ], + [ + "SL1BEG0", + "SL1END0" + ], + [ + "SL1BEG1", + "SL1END1" + ], + [ + "SL1BEG2", + "SL1END2" + ], + [ + "SL1BEG3", + "SL1END3" + ], + [ + "SR1BEG1", + "SR1END1" + ], + [ + "SR1BEG2", + "SR1END2" + ], + [ + "SR1BEG3", + "SR1END3" + ], + [ + "SS2A0", + "SS2END0" + ], + [ + "SS2A1", + "SS2END1" + ], + [ + "SS2A2", + "SS2END2" + ], + [ + "SS2A3", + "SS2END3" + ], + [ + "SS6A0", + "SS6B0" + ], + [ + "SS6A1", + "SS6B1" + ], + [ + "SS6A2", + "SS6B2" + ], + [ + "SS6A3", + "SS6B3" + ], + [ + "SS6B0", + "SS6C0" + ], + [ + "SS6B1", + "SS6C1" + ], + [ + "SS6B2", + "SS6C2" + ], + [ + "SS6B3", + "SS6C3" + ], + [ + "SS6C0", + "SS6D0" + ], + [ + "SS6C1", + "SS6D1" + ], + [ + "SS6C2", + "SS6D2" + ], + [ + "SS6C3", + "SS6D3" + ], + [ + "SS6D0", + "SS6E0" + ], + [ + "SS6D1", + "SS6E1" + ], + [ + "SS6D2", + "SS6E2" + ], + [ + "SS6D3", + "SS6E3" + ], + [ + "SS6E0", + "SS6END0" + ], + [ + "SS6E1", + "SS6END1" + ], + [ + "SS6E2", + "SS6END2" + ], + [ + "SS6E3", + "SS6END3" + ], + [ + "SW6A0", + "SW6B0" + ], + [ + "SW6A1", + "SW6B1" + ], + [ + "SW6A2", + "SW6B2" + ], + [ + "SW6A3", + "SW6B3" + ], + [ + "SW6B0", + "SW6C0" + ], + [ + "SW6B1", + "SW6C1" + ], + [ + "SW6B2", + "SW6C2" + ], + [ + "SW6B3", + "SW6C3" + ], + [ + "SW6C0", + "SW6D0" + ], + [ + "SW6C1", + "SW6D1" + ], + [ + "SW6C2", + "SW6D2" + ], + [ + "SW6C3", + "SW6D3" + ], + [ + "SW6D0", + "SW6E0" + ], + [ + "SW6D1", + "SW6E1" + ], + [ + "SW6D2", + "SW6E2" + ], + [ + "SW6D3", + "SW6E3" + ], + [ + "WR1BEG0", + "WR1BEG_S0" + ], + [ + "WR1END0", + "WR1END_S1_0" + ], + [ + "WW4END0", + "WW4END_S0_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_L", + "INT_R" + ], + "wire_pairs": [ + [ + "EE2A0", + "EE2END0" + ], + [ + "EE2A1", + "EE2END1" + ], + [ + "EE2A2", + "EE2END2" + ], + [ + "EE2A3", + "EE2END3" + ], + [ + "EE2BEG0", + "EE2A0" + ], + [ + "EE2BEG1", + "EE2A1" + ], + [ + "EE2BEG2", + "EE2A2" + ], + [ + "EE2BEG3", + "EE2A3" + ], + [ + "EE4A0", + "EE4B0" + ], + [ + "EE4A1", + "EE4B1" + ], + [ + "EE4A2", + "EE4B2" + ], + [ + "EE4A3", + "EE4B3" + ], + [ + "EE4B0", + "EE4C0" + ], + [ + "EE4B1", + "EE4C1" + ], + [ + "EE4B2", + "EE4C2" + ], + [ + "EE4B3", + "EE4C3" + ], + [ + "EE4BEG0", + "EE4A0" + ], + [ + "EE4BEG1", + "EE4A1" + ], + [ + "EE4BEG2", + "EE4A2" + ], + [ + "EE4BEG3", + "EE4A3" + ], + [ + "EE4C0", + "EE4END0" + ], + [ + "EE4C1", + "EE4END1" + ], + [ + "EE4C2", + "EE4END2" + ], + [ + "EE4C3", + "EE4END3" + ], + [ + "EL1BEG0", + "EL1END0" + ], + [ + "EL1BEG1", + "EL1END1" + ], + [ + "EL1BEG2", + "EL1END2" + ], + [ + "EL1BEG3", + "EL1END3" + ], + [ + "ER1BEG0", + "ER1END0" + ], + [ + "ER1BEG1", + "ER1END1" + ], + [ + "ER1BEG2", + "ER1END2" + ], + [ + "ER1BEG3", + "ER1END3" + ], + [ + "GCLK_L_B0", + "GCLK_B0_WEST" + ], + [ + "GCLK_L_B1", + "GCLK_B1_WEST" + ], + [ + "GCLK_L_B2", + "GCLK_B2_WEST" + ], + [ + "GCLK_L_B3", + "GCLK_B3_WEST" + ], + [ + "GCLK_L_B4", + "GCLK_B4_WEST" + ], + [ + "GCLK_L_B5", + "GCLK_B5_WEST" + ], + [ + "GCLK_L_B6_EAST", + "GCLK_B6" + ], + [ + "GCLK_L_B7_EAST", + "GCLK_B7" + ], + [ + "GCLK_L_B8_EAST", + "GCLK_B8" + ], + [ + "GCLK_L_B9_EAST", + "GCLK_B9" + ], + [ + "GCLK_L_B10_EAST", + "GCLK_B10" + ], + [ + "GCLK_L_B11_EAST", + "GCLK_B11" + ], + [ + "INT_DQS_IOTOPHASER", + "INT_DQS_IOTOPHASER" + ], + [ + "INT_PHASER_TO_IO_ICLK", + "INT_PHASER_TO_IO_ICLK" + ], + [ + "INT_PHASER_TO_IO_ICLKDIV", + "INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_PHASER_TO_IO_OCLK", + "INT_PHASER_TO_IO_OCLK" + ], + [ + "INT_PHASER_TO_IO_OCLK1X_90", + "INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_PHASER_TO_IO_OCLKDIV", + "INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "LH1", + "LH0" + ], + [ + "LH2", + "LH1" + ], + [ + "LH3", + "LH2" + ], + [ + "LH4", + "LH3" + ], + [ + "LH5", + "LH4" + ], + [ + "LH6", + "LH5" + ], + [ + "LH7", + "LH6" + ], + [ + "LH8", + "LH7" + ], + [ + "LH9", + "LH8" + ], + [ + "LH10", + "LH9" + ], + [ + "LH11", + "LH10" + ], + [ + "LH12", + "LH11" + ], + [ + "MONITOR_N", + "MONITOR_N" + ], + [ + "MONITOR_P", + "MONITOR_P" + ], + [ + "NE2A0", + "NE2END0" + ], + [ + "NE2A1", + "NE2END1" + ], + [ + "NE2A2", + "NE2END2" + ], + [ + "NE2A3", + "NE2END3" + ], + [ + "NE6BEG0", + "NE6A0" + ], + [ + "NE6BEG1", + "NE6A1" + ], + [ + "NE6BEG2", + "NE6A2" + ], + [ + "NE6BEG3", + "NE6A3" + ], + [ + "NE6E0", + "NE6END0" + ], + [ + "NE6E1", + "NE6END1" + ], + [ + "NE6E2", + "NE6END2" + ], + [ + "NE6E3", + "NE6END3" + ], + [ + "NW2END0", + "NW2A0" + ], + [ + "NW2END1", + "NW2A1" + ], + [ + "NW2END2", + "NW2A2" + ], + [ + "NW2END3", + "NW2A3" + ], + [ + "NW6A0", + "NW6BEG0" + ], + [ + "NW6A1", + "NW6BEG1" + ], + [ + "NW6A2", + "NW6BEG2" + ], + [ + "NW6A3", + "NW6BEG3" + ], + [ + "NW6END0", + "NW6E0" + ], + [ + "NW6END1", + "NW6E1" + ], + [ + "NW6END2", + "NW6E2" + ], + [ + "NW6END3", + "NW6E3" + ], + [ + "SE2A0", + "SE2END0" + ], + [ + "SE2A1", + "SE2END1" + ], + [ + "SE2A2", + "SE2END2" + ], + [ + "SE2A3", + "SE2END3" + ], + [ + "SE6BEG0", + "SE6A0" + ], + [ + "SE6BEG1", + "SE6A1" + ], + [ + "SE6BEG2", + "SE6A2" + ], + [ + "SE6BEG3", + "SE6A3" + ], + [ + "SE6E0", + "SE6END0" + ], + [ + "SE6E1", + "SE6END1" + ], + [ + "SE6E2", + "SE6END2" + ], + [ + "SE6E3", + "SE6END3" + ], + [ + "SW2END0", + "SW2A0" + ], + [ + "SW2END1", + "SW2A1" + ], + [ + "SW2END2", + "SW2A2" + ], + [ + "SW2END3", + "SW2A3" + ], + [ + "SW6A0", + "SW6BEG0" + ], + [ + "SW6A1", + "SW6BEG1" + ], + [ + "SW6A2", + "SW6BEG2" + ], + [ + "SW6A3", + "SW6BEG3" + ], + [ + "SW6END0", + "SW6E0" + ], + [ + "SW6END1", + "SW6E1" + ], + [ + "SW6END2", + "SW6E2" + ], + [ + "SW6END3", + "SW6E3" + ], + [ + "WL1END0", + "WL1BEG0" + ], + [ + "WL1END1", + "WL1BEG1" + ], + [ + "WL1END2", + "WL1BEG2" + ], + [ + "WL1END3", + "WL1BEG3" + ], + [ + "WR1END0", + "WR1BEG0" + ], + [ + "WR1END1", + "WR1BEG1" + ], + [ + "WR1END2", + "WR1BEG2" + ], + [ + "WR1END3", + "WR1BEG3" + ], + [ + "WW2A0", + "WW2BEG0" + ], + [ + "WW2A1", + "WW2BEG1" + ], + [ + "WW2A2", + "WW2BEG2" + ], + [ + "WW2A3", + "WW2BEG3" + ], + [ + "WW2END0", + "WW2A0" + ], + [ + "WW2END1", + "WW2A1" + ], + [ + "WW2END2", + "WW2A2" + ], + [ + "WW2END3", + "WW2A3" + ], + [ + "WW4A0", + "WW4BEG0" + ], + [ + "WW4A1", + "WW4BEG1" + ], + [ + "WW4A2", + "WW4BEG2" + ], + [ + "WW4A3", + "WW4BEG3" + ], + [ + "WW4B0", + "WW4A0" + ], + [ + "WW4B1", + "WW4A1" + ], + [ + "WW4B2", + "WW4A2" + ], + [ + "WW4B3", + "WW4A3" + ], + [ + "WW4C0", + "WW4B0" + ], + [ + "WW4C1", + "WW4B1" + ], + [ + "WW4C2", + "WW4B2" + ], + [ + "WW4C3", + "WW4B3" + ], + [ + "WW4END0", + "WW4C0" + ], + [ + "WW4END1", + "WW4C1" + ], + [ + "WW4END2", + "WW4C2" + ], + [ + "WW4END3", + "WW4C3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "INT_L", + "IO_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "BYP_L0", + "INT_INTERFACE_BYP0" + ], + [ + "BYP_L1", + "INT_INTERFACE_BYP1" + ], + [ + "BYP_L2", + "INT_INTERFACE_BYP2" + ], + [ + "BYP_L3", + "INT_INTERFACE_BYP3" + ], + [ + "BYP_L4", + "INT_INTERFACE_BYP4" + ], + [ + "BYP_L5", + "INT_INTERFACE_BYP5" + ], + [ + "BYP_L6", + "INT_INTERFACE_BYP6" + ], + [ + "BYP_L7", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_L0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_L1", + "INT_INTERFACE_CLK1" + ], + [ + "CTRL_L0", + "INT_INTERFACE_CTRL0" + ], + [ + "CTRL_L1", + "INT_INTERFACE_CTRL1" + ], + [ + "EE2A0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "EE2A1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "EE2A2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "EE2A3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "EE2END0", + "INT_INTERFACE_EE2A0" + ], + [ + "EE2END1", + "INT_INTERFACE_EE2A1" + ], + [ + "EE2END2", + "INT_INTERFACE_EE2A2" + ], + [ + "EE2END3", + "INT_INTERFACE_EE2A3" + ], + [ + "EE4A0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "EE4A1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "EE4A2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "EE4A3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "EE4B0", + "INT_INTERFACE_EE4A0" + ], + [ + "EE4B1", + "INT_INTERFACE_EE4A1" + ], + [ + "EE4B2", + "INT_INTERFACE_EE4A2" + ], + [ + "EE4B3", + "INT_INTERFACE_EE4A3" + ], + [ + "EE4C0", + "INT_INTERFACE_EE4B0" + ], + [ + "EE4C1", + "INT_INTERFACE_EE4B1" + ], + [ + "EE4C2", + "INT_INTERFACE_EE4B2" + ], + [ + "EE4C3", + "INT_INTERFACE_EE4B3" + ], + [ + "EE4END0", + "INT_INTERFACE_EE4C0" + ], + [ + "EE4END1", + "INT_INTERFACE_EE4C1" + ], + [ + "EE4END2", + "INT_INTERFACE_EE4C2" + ], + [ + "EE4END3", + "INT_INTERFACE_EE4C3" + ], + [ + "EL1END0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "EL1END1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "EL1END2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "EL1END3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "ER1END0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "ER1END1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "ER1END2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "ER1END3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "FAN_L0", + "INT_INTERFACE_FAN0" + ], + [ + "FAN_L1", + "INT_INTERFACE_FAN1" + ], + [ + "FAN_L2", + "INT_INTERFACE_FAN2" + ], + [ + "FAN_L3", + "INT_INTERFACE_FAN3" + ], + [ + "FAN_L4", + "INT_INTERFACE_FAN4" + ], + [ + "FAN_L5", + "INT_INTERFACE_FAN5" + ], + [ + "FAN_L6", + "INT_INTERFACE_FAN6" + ], + [ + "FAN_L7", + "INT_INTERFACE_FAN7" + ], + [ + "IMUX_L0", + "INT_INTERFACE_IMUX0" + ], + [ + "IMUX_L1", + "INT_INTERFACE_IMUX1" + ], + [ + "IMUX_L2", + "INT_INTERFACE_IMUX2" + ], + [ + "IMUX_L3", + "INT_INTERFACE_IMUX3" + ], + [ + "IMUX_L4", + "INT_INTERFACE_IMUX4" + ], + [ + "IMUX_L5", + "INT_INTERFACE_IMUX5" + ], + [ + "IMUX_L6", + "INT_INTERFACE_IMUX6" + ], + [ + "IMUX_L7", + "INT_INTERFACE_IMUX7" + ], + [ + "IMUX_L8", + "INT_INTERFACE_IMUX8" + ], + [ + "IMUX_L9", + "INT_INTERFACE_IMUX9" + ], + [ + "IMUX_L10", + "INT_INTERFACE_IMUX10" + ], + [ + "IMUX_L11", + "INT_INTERFACE_IMUX11" + ], + [ + "IMUX_L12", + "INT_INTERFACE_IMUX12" + ], + [ + "IMUX_L13", + "INT_INTERFACE_IMUX13" + ], + [ + "IMUX_L14", + "INT_INTERFACE_IMUX14" + ], + [ + "IMUX_L15", + "INT_INTERFACE_IMUX15" + ], + [ + "IMUX_L16", + "INT_INTERFACE_IMUX16" + ], + [ + "IMUX_L17", + "INT_INTERFACE_IMUX17" + ], + [ + "IMUX_L18", + "INT_INTERFACE_IMUX18" + ], + [ + "IMUX_L19", + "INT_INTERFACE_IMUX19" + ], + [ + "IMUX_L20", + "INT_INTERFACE_IMUX20" + ], + [ + "IMUX_L21", + "INT_INTERFACE_IMUX21" + ], + [ + "IMUX_L22", + "INT_INTERFACE_IMUX22" + ], + [ + "IMUX_L23", + "INT_INTERFACE_IMUX23" + ], + [ + "IMUX_L24", + "INT_INTERFACE_IMUX24" + ], + [ + "IMUX_L25", + "INT_INTERFACE_IMUX25" + ], + [ + "IMUX_L26", + "INT_INTERFACE_IMUX26" + ], + [ + "IMUX_L27", + "INT_INTERFACE_IMUX27" + ], + [ + "IMUX_L28", + "INT_INTERFACE_IMUX28" + ], + [ + "IMUX_L29", + "INT_INTERFACE_IMUX29" + ], + [ + "IMUX_L30", + "INT_INTERFACE_IMUX30" + ], + [ + "IMUX_L31", + "INT_INTERFACE_IMUX31" + ], + [ + "IMUX_L32", + "INT_INTERFACE_IMUX32" + ], + [ + "IMUX_L33", + "INT_INTERFACE_IMUX33" + ], + [ + "IMUX_L34", + "INT_INTERFACE_IMUX34" + ], + [ + "IMUX_L35", + "INT_INTERFACE_IMUX35" + ], + [ + "IMUX_L36", + "INT_INTERFACE_IMUX36" + ], + [ + "IMUX_L37", + "INT_INTERFACE_IMUX37" + ], + [ + "IMUX_L38", + "INT_INTERFACE_IMUX38" + ], + [ + "IMUX_L39", + "INT_INTERFACE_IMUX39" + ], + [ + "IMUX_L40", + "INT_INTERFACE_IMUX40" + ], + [ + "IMUX_L41", + "INT_INTERFACE_IMUX41" + ], + [ + "IMUX_L42", + "INT_INTERFACE_IMUX42" + ], + [ + "IMUX_L43", + "INT_INTERFACE_IMUX43" + ], + [ + "IMUX_L44", + "INT_INTERFACE_IMUX44" + ], + [ + "IMUX_L45", + "INT_INTERFACE_IMUX45" + ], + [ + "IMUX_L46", + "INT_INTERFACE_IMUX46" + ], + [ + "IMUX_L47", + "INT_INTERFACE_IMUX47" + ], + [ + "INT_DQS_IOTOPHASER", + "L_INT_INTER_DQS_IOTOPHASER" + ], + [ + "INT_PHASER_TO_IO_ICLK", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "INT_PHASER_TO_IO_ICLKDIV", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_PHASER_TO_IO_OCLK", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "INT_PHASER_TO_IO_OCLK1X_90", + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_PHASER_TO_IO_OCLKDIV", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "LH0", + "INT_INTERFACE_LH1" + ], + [ + "LH1", + "INT_INTERFACE_LH2" + ], + [ + "LH2", + "INT_INTERFACE_LH3" + ], + [ + "LH3", + "INT_INTERFACE_LH4" + ], + [ + "LH4", + "INT_INTERFACE_LH5" + ], + [ + "LH5", + "INT_INTERFACE_LH6" + ], + [ + "LH6", + "INT_INTERFACE_LH7" + ], + [ + "LH7", + "INT_INTERFACE_LH8" + ], + [ + "LH8", + "INT_INTERFACE_LH9" + ], + [ + "LH9", + "INT_INTERFACE_LH10" + ], + [ + "LH10", + "INT_INTERFACE_LH11" + ], + [ + "LH11", + "INT_INTERFACE_LH12" + ], + [ + "LOGIC_OUTS_L0", + "INT_INTERFACE_LOGIC_OUTS_L0" + ], + [ + "LOGIC_OUTS_L1", + "INT_INTERFACE_LOGIC_OUTS_L1" + ], + [ + "LOGIC_OUTS_L2", + "INT_INTERFACE_LOGIC_OUTS_L2" + ], + [ + "LOGIC_OUTS_L3", + "INT_INTERFACE_LOGIC_OUTS_L3" + ], + [ + "LOGIC_OUTS_L4", + "INT_INTERFACE_LOGIC_OUTS_L4" + ], + [ + "LOGIC_OUTS_L5", + "INT_INTERFACE_LOGIC_OUTS_L5" + ], + [ + "LOGIC_OUTS_L6", + "INT_INTERFACE_LOGIC_OUTS_L6" + ], + [ + "LOGIC_OUTS_L7", + "INT_INTERFACE_LOGIC_OUTS_L7" + ], + [ + "LOGIC_OUTS_L8", + "INT_INTERFACE_LOGIC_OUTS_L8" + ], + [ + "LOGIC_OUTS_L9", + "INT_INTERFACE_LOGIC_OUTS_L9" + ], + [ + "LOGIC_OUTS_L10", + "INT_INTERFACE_LOGIC_OUTS_L10" + ], + [ + "LOGIC_OUTS_L11", + "INT_INTERFACE_LOGIC_OUTS_L11" + ], + [ + "LOGIC_OUTS_L12", + "INT_INTERFACE_LOGIC_OUTS_L12" + ], + [ + "LOGIC_OUTS_L13", + "INT_INTERFACE_LOGIC_OUTS_L13" + ], + [ + "LOGIC_OUTS_L14", + "INT_INTERFACE_LOGIC_OUTS_L14" + ], + [ + "LOGIC_OUTS_L15", + "INT_INTERFACE_LOGIC_OUTS_L15" + ], + [ + "LOGIC_OUTS_L16", + "INT_INTERFACE_LOGIC_OUTS_L16" + ], + [ + "LOGIC_OUTS_L17", + "INT_INTERFACE_LOGIC_OUTS_L17" + ], + [ + "LOGIC_OUTS_L18", + "INT_INTERFACE_LOGIC_OUTS_L18" + ], + [ + "LOGIC_OUTS_L19", + "INT_INTERFACE_LOGIC_OUTS_L19" + ], + [ + "LOGIC_OUTS_L20", + "INT_INTERFACE_LOGIC_OUTS_L20" + ], + [ + "LOGIC_OUTS_L21", + "INT_INTERFACE_LOGIC_OUTS_L21" + ], + [ + "LOGIC_OUTS_L22", + "INT_INTERFACE_LOGIC_OUTS_L22" + ], + [ + "LOGIC_OUTS_L23", + "INT_INTERFACE_LOGIC_OUTS_L23" + ], + [ + "MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "NE2END0", + "INT_INTERFACE_NE2A0" + ], + [ + "NE2END1", + "INT_INTERFACE_NE2A1" + ], + [ + "NE2END2", + "INT_INTERFACE_NE2A2" + ], + [ + "NE2END3", + "INT_INTERFACE_NE2A3" + ], + [ + "NE6A0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "NE6A1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "NE6A2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "NE6A3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "NE6END0", + "INT_INTERFACE_NE4C0" + ], + [ + "NE6END1", + "INT_INTERFACE_NE4C1" + ], + [ + "NE6END2", + "INT_INTERFACE_NE4C2" + ], + [ + "NE6END3", + "INT_INTERFACE_NE4C3" + ], + [ + "NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "NW6BEG0", + "INT_INTERFACE_NW4A0" + ], + [ + "NW6BEG1", + "INT_INTERFACE_NW4A1" + ], + [ + "NW6BEG2", + "INT_INTERFACE_NW4A2" + ], + [ + "NW6BEG3", + "INT_INTERFACE_NW4A3" + ], + [ + "NW6E0", + "INT_INTERFACE_NW4END0" + ], + [ + "NW6E1", + "INT_INTERFACE_NW4END1" + ], + [ + "NW6E2", + "INT_INTERFACE_NW4END2" + ], + [ + "NW6E3", + "INT_INTERFACE_NW4END3" + ], + [ + "SE2END0", + "INT_INTERFACE_SE2A0" + ], + [ + "SE2END1", + "INT_INTERFACE_SE2A1" + ], + [ + "SE2END2", + "INT_INTERFACE_SE2A2" + ], + [ + "SE2END3", + "INT_INTERFACE_SE2A3" + ], + [ + "SE6A0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "SE6A1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "SE6A2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "SE6A3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "SE6END0", + "INT_INTERFACE_SE4C0" + ], + [ + "SE6END1", + "INT_INTERFACE_SE4C1" + ], + [ + "SE6END2", + "INT_INTERFACE_SE4C2" + ], + [ + "SE6END3", + "INT_INTERFACE_SE4C3" + ], + [ + "SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "SW6BEG0", + "INT_INTERFACE_SW4A0" + ], + [ + "SW6BEG1", + "INT_INTERFACE_SW4A1" + ], + [ + "SW6BEG2", + "INT_INTERFACE_SW4A2" + ], + [ + "SW6BEG3", + "INT_INTERFACE_SW4A3" + ], + [ + "SW6E0", + "INT_INTERFACE_SW4END0" + ], + [ + "SW6E1", + "INT_INTERFACE_SW4END1" + ], + [ + "SW6E2", + "INT_INTERFACE_SW4END2" + ], + [ + "SW6E3", + "INT_INTERFACE_SW4END3" + ], + [ + "WL1BEG0", + "INT_INTERFACE_WL1END0" + ], + [ + "WL1BEG1", + "INT_INTERFACE_WL1END1" + ], + [ + "WL1BEG2", + "INT_INTERFACE_WL1END2" + ], + [ + "WL1BEG3", + "INT_INTERFACE_WL1END3" + ], + [ + "WR1BEG0", + "INT_INTERFACE_WR1END0" + ], + [ + "WR1BEG1", + "INT_INTERFACE_WR1END1" + ], + [ + "WR1BEG2", + "INT_INTERFACE_WR1END2" + ], + [ + "WR1BEG3", + "INT_INTERFACE_WR1END3" + ], + [ + "WW2A0", + "INT_INTERFACE_WW2END0" + ], + [ + "WW2A1", + "INT_INTERFACE_WW2END1" + ], + [ + "WW2A2", + "INT_INTERFACE_WW2END2" + ], + [ + "WW2A3", + "INT_INTERFACE_WW2END3" + ], + [ + "WW2BEG0", + "INT_INTERFACE_WW2A0" + ], + [ + "WW2BEG1", + "INT_INTERFACE_WW2A1" + ], + [ + "WW2BEG2", + "INT_INTERFACE_WW2A2" + ], + [ + "WW2BEG3", + "INT_INTERFACE_WW2A3" + ], + [ + "WW4A0", + "INT_INTERFACE_WW4B0" + ], + [ + "WW4A1", + "INT_INTERFACE_WW4B1" + ], + [ + "WW4A2", + "INT_INTERFACE_WW4B2" + ], + [ + "WW4A3", + "INT_INTERFACE_WW4B3" + ], + [ + "WW4B0", + "INT_INTERFACE_WW4C0" + ], + [ + "WW4B1", + "INT_INTERFACE_WW4C1" + ], + [ + "WW4B2", + "INT_INTERFACE_WW4C2" + ], + [ + "WW4B3", + "INT_INTERFACE_WW4C3" + ], + [ + "WW4BEG0", + "INT_INTERFACE_WW4A0" + ], + [ + "WW4BEG1", + "INT_INTERFACE_WW4A1" + ], + [ + "WW4BEG2", + "INT_INTERFACE_WW4A2" + ], + [ + "WW4BEG3", + "INT_INTERFACE_WW4A3" + ], + [ + "WW4C0", + "INT_INTERFACE_WW4END0" + ], + [ + "WW4C1", + "INT_INTERFACE_WW4END1" + ], + [ + "WW4C2", + "INT_INTERFACE_WW4END2" + ], + [ + "WW4C3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "INT_L", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "BYP_L0", + "INT_INTERFACE_BYP0" + ], + [ + "BYP_L1", + "INT_INTERFACE_BYP1" + ], + [ + "BYP_L2", + "INT_INTERFACE_BYP2" + ], + [ + "BYP_L3", + "INT_INTERFACE_BYP3" + ], + [ + "BYP_L4", + "INT_INTERFACE_BYP4" + ], + [ + "BYP_L5", + "INT_INTERFACE_BYP5" + ], + [ + "BYP_L6", + "INT_INTERFACE_BYP6" + ], + [ + "BYP_L7", + "INT_INTERFACE_BYP7" + ], + [ + "CLK_L0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK_L1", + "INT_INTERFACE_CLK1" + ], + [ + "CTRL_L0", + "INT_INTERFACE_CTRL0" + ], + [ + "CTRL_L1", + "INT_INTERFACE_CTRL1" + ], + [ + "EE2A0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "EE2A1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "EE2A2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "EE2A3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "EE2END0", + "INT_INTERFACE_EE2A0" + ], + [ + "EE2END1", + "INT_INTERFACE_EE2A1" + ], + [ + "EE2END2", + "INT_INTERFACE_EE2A2" + ], + [ + "EE2END3", + "INT_INTERFACE_EE2A3" + ], + [ + "EE4A0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "EE4A1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "EE4A2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "EE4A3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "EE4B0", + "INT_INTERFACE_EE4A0" + ], + [ + "EE4B1", + "INT_INTERFACE_EE4A1" + ], + [ + "EE4B2", + "INT_INTERFACE_EE4A2" + ], + [ + "EE4B3", + "INT_INTERFACE_EE4A3" + ], + [ + "EE4C0", + "INT_INTERFACE_EE4B0" + ], + [ + "EE4C1", + "INT_INTERFACE_EE4B1" + ], + [ + "EE4C2", + "INT_INTERFACE_EE4B2" + ], + [ + "EE4C3", + "INT_INTERFACE_EE4B3" + ], + [ + "EE4END0", + "INT_INTERFACE_EE4C0" + ], + [ + "EE4END1", + "INT_INTERFACE_EE4C1" + ], + [ + "EE4END2", + "INT_INTERFACE_EE4C2" + ], + [ + "EE4END3", + "INT_INTERFACE_EE4C3" + ], + [ + "EL1END0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "EL1END1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "EL1END2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "EL1END3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "ER1END0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "ER1END1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "ER1END2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "ER1END3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "FAN_L0", + "INT_INTERFACE_FAN0" + ], + [ + "FAN_L1", + "INT_INTERFACE_FAN1" + ], + [ + "FAN_L2", + "INT_INTERFACE_FAN2" + ], + [ + "FAN_L3", + "INT_INTERFACE_FAN3" + ], + [ + "FAN_L4", + "INT_INTERFACE_FAN4" + ], + [ + "FAN_L5", + "INT_INTERFACE_FAN5" + ], + [ + "FAN_L6", + "INT_INTERFACE_FAN6" + ], + [ + "FAN_L7", + "INT_INTERFACE_FAN7" + ], + [ + "IMUX_L0", + "PCIE_INT_INTERFACE_IMUX_L0" + ], + [ + "IMUX_L1", + "PCIE_INT_INTERFACE_IMUX_L1" + ], + [ + "IMUX_L2", + "PCIE_INT_INTERFACE_IMUX_L2" + ], + [ + "IMUX_L3", + "PCIE_INT_INTERFACE_IMUX_L3" + ], + [ + "IMUX_L4", + "PCIE_INT_INTERFACE_IMUX_L4" + ], + [ + "IMUX_L5", + "PCIE_INT_INTERFACE_IMUX_L5" + ], + [ + "IMUX_L6", + "PCIE_INT_INTERFACE_IMUX_L6" + ], + [ + "IMUX_L7", + "PCIE_INT_INTERFACE_IMUX_L7" + ], + [ + "IMUX_L8", + "PCIE_INT_INTERFACE_IMUX_L8" + ], + [ + "IMUX_L9", + "PCIE_INT_INTERFACE_IMUX_L9" + ], + [ + "IMUX_L10", + "PCIE_INT_INTERFACE_IMUX_L10" + ], + [ + "IMUX_L11", + "PCIE_INT_INTERFACE_IMUX_L11" + ], + [ + "IMUX_L12", + "PCIE_INT_INTERFACE_IMUX_L12" + ], + [ + "IMUX_L13", + "PCIE_INT_INTERFACE_IMUX_L13" + ], + [ + "IMUX_L14", + "PCIE_INT_INTERFACE_IMUX_L14" + ], + [ + "IMUX_L15", + "PCIE_INT_INTERFACE_IMUX_L15" + ], + [ + "IMUX_L16", + "PCIE_INT_INTERFACE_IMUX_L16" + ], + [ + "IMUX_L17", + "PCIE_INT_INTERFACE_IMUX_L17" + ], + [ + "IMUX_L18", + "PCIE_INT_INTERFACE_IMUX_L18" + ], + [ + "IMUX_L19", + "PCIE_INT_INTERFACE_IMUX_L19" + ], + [ + "IMUX_L20", + "PCIE_INT_INTERFACE_IMUX_L20" + ], + [ + "IMUX_L21", + "PCIE_INT_INTERFACE_IMUX_L21" + ], + [ + "IMUX_L22", + "PCIE_INT_INTERFACE_IMUX_L22" + ], + [ + "IMUX_L23", + "PCIE_INT_INTERFACE_IMUX_L23" + ], + [ + "IMUX_L24", + "PCIE_INT_INTERFACE_IMUX_L24" + ], + [ + "IMUX_L25", + "PCIE_INT_INTERFACE_IMUX_L25" + ], + [ + "IMUX_L26", + "PCIE_INT_INTERFACE_IMUX_L26" + ], + [ + "IMUX_L27", + "PCIE_INT_INTERFACE_IMUX_L27" + ], + [ + "IMUX_L28", + "PCIE_INT_INTERFACE_IMUX_L28" + ], + [ + "IMUX_L29", + "PCIE_INT_INTERFACE_IMUX_L29" + ], + [ + "IMUX_L30", + "PCIE_INT_INTERFACE_IMUX_L30" + ], + [ + "IMUX_L31", + "PCIE_INT_INTERFACE_IMUX_L31" + ], + [ + "IMUX_L32", + "PCIE_INT_INTERFACE_IMUX_L32" + ], + [ + "IMUX_L33", + "PCIE_INT_INTERFACE_IMUX_L33" + ], + [ + "IMUX_L34", + "PCIE_INT_INTERFACE_IMUX_L34" + ], + [ + "IMUX_L35", + "PCIE_INT_INTERFACE_IMUX_L35" + ], + [ + "IMUX_L36", + "PCIE_INT_INTERFACE_IMUX_L36" + ], + [ + "IMUX_L37", + "PCIE_INT_INTERFACE_IMUX_L37" + ], + [ + "IMUX_L38", + "PCIE_INT_INTERFACE_IMUX_L38" + ], + [ + "IMUX_L39", + "PCIE_INT_INTERFACE_IMUX_L39" + ], + [ + "IMUX_L40", + "PCIE_INT_INTERFACE_IMUX_L40" + ], + [ + "IMUX_L41", + "PCIE_INT_INTERFACE_IMUX_L41" + ], + [ + "IMUX_L42", + "PCIE_INT_INTERFACE_IMUX_L42" + ], + [ + "IMUX_L43", + "PCIE_INT_INTERFACE_IMUX_L43" + ], + [ + "IMUX_L44", + "PCIE_INT_INTERFACE_IMUX_L44" + ], + [ + "IMUX_L45", + "PCIE_INT_INTERFACE_IMUX_L45" + ], + [ + "IMUX_L46", + "PCIE_INT_INTERFACE_IMUX_L46" + ], + [ + "IMUX_L47", + "PCIE_INT_INTERFACE_IMUX_L47" + ], + [ + "LH0", + "INT_INTERFACE_LH1" + ], + [ + "LH1", + "INT_INTERFACE_LH2" + ], + [ + "LH2", + "INT_INTERFACE_LH3" + ], + [ + "LH3", + "INT_INTERFACE_LH4" + ], + [ + "LH4", + "INT_INTERFACE_LH5" + ], + [ + "LH5", + "INT_INTERFACE_LH6" + ], + [ + "LH6", + "INT_INTERFACE_LH7" + ], + [ + "LH7", + "INT_INTERFACE_LH8" + ], + [ + "LH8", + "INT_INTERFACE_LH9" + ], + [ + "LH9", + "INT_INTERFACE_LH10" + ], + [ + "LH10", + "INT_INTERFACE_LH11" + ], + [ + "LH11", + "INT_INTERFACE_LH12" + ], + [ + "LOGIC_OUTS_L0", + "INT_INTERFACE_LOGIC_OUTS_L0" + ], + [ + "LOGIC_OUTS_L1", + "INT_INTERFACE_LOGIC_OUTS_L1" + ], + [ + "LOGIC_OUTS_L2", + "INT_INTERFACE_LOGIC_OUTS_L2" + ], + [ + "LOGIC_OUTS_L3", + "INT_INTERFACE_LOGIC_OUTS_L3" + ], + [ + "LOGIC_OUTS_L4", + "INT_INTERFACE_LOGIC_OUTS_L4" + ], + [ + "LOGIC_OUTS_L5", + "INT_INTERFACE_LOGIC_OUTS_L5" + ], + [ + "LOGIC_OUTS_L6", + "INT_INTERFACE_LOGIC_OUTS_L6" + ], + [ + "LOGIC_OUTS_L7", + "INT_INTERFACE_LOGIC_OUTS_L7" + ], + [ + "LOGIC_OUTS_L8", + "INT_INTERFACE_LOGIC_OUTS_L8" + ], + [ + "LOGIC_OUTS_L9", + "INT_INTERFACE_LOGIC_OUTS_L9" + ], + [ + "LOGIC_OUTS_L10", + "INT_INTERFACE_LOGIC_OUTS_L10" + ], + [ + "LOGIC_OUTS_L11", + "INT_INTERFACE_LOGIC_OUTS_L11" + ], + [ + "LOGIC_OUTS_L12", + "INT_INTERFACE_LOGIC_OUTS_L12" + ], + [ + "LOGIC_OUTS_L13", + "INT_INTERFACE_LOGIC_OUTS_L13" + ], + [ + "LOGIC_OUTS_L14", + "INT_INTERFACE_LOGIC_OUTS_L14" + ], + [ + "LOGIC_OUTS_L15", + "INT_INTERFACE_LOGIC_OUTS_L15" + ], + [ + "LOGIC_OUTS_L16", + "INT_INTERFACE_LOGIC_OUTS_L16" + ], + [ + "LOGIC_OUTS_L17", + "INT_INTERFACE_LOGIC_OUTS_L17" + ], + [ + "LOGIC_OUTS_L18", + "INT_INTERFACE_LOGIC_OUTS_L18" + ], + [ + "LOGIC_OUTS_L19", + "INT_INTERFACE_LOGIC_OUTS_L19" + ], + [ + "LOGIC_OUTS_L20", + "INT_INTERFACE_LOGIC_OUTS_L20" + ], + [ + "LOGIC_OUTS_L21", + "INT_INTERFACE_LOGIC_OUTS_L21" + ], + [ + "LOGIC_OUTS_L22", + "INT_INTERFACE_LOGIC_OUTS_L22" + ], + [ + "LOGIC_OUTS_L23", + "INT_INTERFACE_LOGIC_OUTS_L23" + ], + [ + "MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "NE2END0", + "INT_INTERFACE_NE2A0" + ], + [ + "NE2END1", + "INT_INTERFACE_NE2A1" + ], + [ + "NE2END2", + "INT_INTERFACE_NE2A2" + ], + [ + "NE2END3", + "INT_INTERFACE_NE2A3" + ], + [ + "NE6A0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "NE6A1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "NE6A2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "NE6A3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "NE6END0", + "INT_INTERFACE_NE4C0" + ], + [ + "NE6END1", + "INT_INTERFACE_NE4C1" + ], + [ + "NE6END2", + "INT_INTERFACE_NE4C2" + ], + [ + "NE6END3", + "INT_INTERFACE_NE4C3" + ], + [ + "NW2A0", + "INT_INTERFACE_NW2A0" + ], + [ + "NW2A1", + "INT_INTERFACE_NW2A1" + ], + [ + "NW2A2", + "INT_INTERFACE_NW2A2" + ], + [ + "NW2A3", + "INT_INTERFACE_NW2A3" + ], + [ + "NW6BEG0", + "INT_INTERFACE_NW4A0" + ], + [ + "NW6BEG1", + "INT_INTERFACE_NW4A1" + ], + [ + "NW6BEG2", + "INT_INTERFACE_NW4A2" + ], + [ + "NW6BEG3", + "INT_INTERFACE_NW4A3" + ], + [ + "NW6E0", + "INT_INTERFACE_NW4END0" + ], + [ + "NW6E1", + "INT_INTERFACE_NW4END1" + ], + [ + "NW6E2", + "INT_INTERFACE_NW4END2" + ], + [ + "NW6E3", + "INT_INTERFACE_NW4END3" + ], + [ + "SE2END0", + "INT_INTERFACE_SE2A0" + ], + [ + "SE2END1", + "INT_INTERFACE_SE2A1" + ], + [ + "SE2END2", + "INT_INTERFACE_SE2A2" + ], + [ + "SE2END3", + "INT_INTERFACE_SE2A3" + ], + [ + "SE6A0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "SE6A1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "SE6A2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "SE6A3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "SE6END0", + "INT_INTERFACE_SE4C0" + ], + [ + "SE6END1", + "INT_INTERFACE_SE4C1" + ], + [ + "SE6END2", + "INT_INTERFACE_SE4C2" + ], + [ + "SE6END3", + "INT_INTERFACE_SE4C3" + ], + [ + "SW2A0", + "INT_INTERFACE_SW2A0" + ], + [ + "SW2A1", + "INT_INTERFACE_SW2A1" + ], + [ + "SW2A2", + "INT_INTERFACE_SW2A2" + ], + [ + "SW2A3", + "INT_INTERFACE_SW2A3" + ], + [ + "SW6BEG0", + "INT_INTERFACE_SW4A0" + ], + [ + "SW6BEG1", + "INT_INTERFACE_SW4A1" + ], + [ + "SW6BEG2", + "INT_INTERFACE_SW4A2" + ], + [ + "SW6BEG3", + "INT_INTERFACE_SW4A3" + ], + [ + "SW6E0", + "INT_INTERFACE_SW4END0" + ], + [ + "SW6E1", + "INT_INTERFACE_SW4END1" + ], + [ + "SW6E2", + "INT_INTERFACE_SW4END2" + ], + [ + "SW6E3", + "INT_INTERFACE_SW4END3" + ], + [ + "WL1BEG0", + "INT_INTERFACE_WL1END0" + ], + [ + "WL1BEG1", + "INT_INTERFACE_WL1END1" + ], + [ + "WL1BEG2", + "INT_INTERFACE_WL1END2" + ], + [ + "WL1BEG3", + "INT_INTERFACE_WL1END3" + ], + [ + "WR1BEG0", + "INT_INTERFACE_WR1END0" + ], + [ + "WR1BEG1", + "INT_INTERFACE_WR1END1" + ], + [ + "WR1BEG2", + "INT_INTERFACE_WR1END2" + ], + [ + "WR1BEG3", + "INT_INTERFACE_WR1END3" + ], + [ + "WW2A0", + "INT_INTERFACE_WW2END0" + ], + [ + "WW2A1", + "INT_INTERFACE_WW2END1" + ], + [ + "WW2A2", + "INT_INTERFACE_WW2END2" + ], + [ + "WW2A3", + "INT_INTERFACE_WW2END3" + ], + [ + "WW2BEG0", + "INT_INTERFACE_WW2A0" + ], + [ + "WW2BEG1", + "INT_INTERFACE_WW2A1" + ], + [ + "WW2BEG2", + "INT_INTERFACE_WW2A2" + ], + [ + "WW2BEG3", + "INT_INTERFACE_WW2A3" + ], + [ + "WW4A0", + "INT_INTERFACE_WW4B0" + ], + [ + "WW4A1", + "INT_INTERFACE_WW4B1" + ], + [ + "WW4A2", + "INT_INTERFACE_WW4B2" + ], + [ + "WW4A3", + "INT_INTERFACE_WW4B3" + ], + [ + "WW4B0", + "INT_INTERFACE_WW4C0" + ], + [ + "WW4B1", + "INT_INTERFACE_WW4C1" + ], + [ + "WW4B2", + "INT_INTERFACE_WW4C2" + ], + [ + "WW4B3", + "INT_INTERFACE_WW4C3" + ], + [ + "WW4BEG0", + "INT_INTERFACE_WW4A0" + ], + [ + "WW4BEG1", + "INT_INTERFACE_WW4A1" + ], + [ + "WW4BEG2", + "INT_INTERFACE_WW4A2" + ], + [ + "WW4BEG3", + "INT_INTERFACE_WW4A3" + ], + [ + "WW4C0", + "INT_INTERFACE_WW4END0" + ], + [ + "WW4C1", + "INT_INTERFACE_WW4END1" + ], + [ + "WW4C2", + "INT_INTERFACE_WW4END2" + ], + [ + "WW4C3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "INT_L", + "T_TERM_INT" + ], + "wire_pairs": [ + [ + "BYP_BOUNCE2", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6" + ], + [ + "BYP_BOUNCE3", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2" + ], + [ + "BYP_BOUNCE6", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4" + ], + [ + "BYP_BOUNCE7", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0" + ], + [ + "EL1BEG3", + "T_TERM_UTURN_INT_ER1BEG_S0" + ], + [ + "EL1END_S3_0", + "T_TERM_UTURN_INT_ER1END3" + ], + [ + "ER1BEG_S0", + "T_TERM_UTURN_INT_ER1BEG_S0" + ], + [ + "ER1END3", + "T_TERM_UTURN_INT_ER1END3" + ], + [ + "FAN_BOUNCE_S3_0", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0" + ], + [ + "FAN_BOUNCE_S3_2", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2" + ], + [ + "FAN_BOUNCE_S3_4", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4" + ], + [ + "FAN_BOUNCE_S3_6", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6" + ], + [ + "LVB_L0", + "T_TERM_UTURN_INT_LVB_L0" + ], + [ + "LVB_L1", + "T_TERM_UTURN_INT_LVB_L1" + ], + [ + "LVB_L2", + "T_TERM_UTURN_INT_LVB_L2" + ], + [ + "LVB_L3", + "T_TERM_UTURN_INT_LVB_L3" + ], + [ + "LVB_L4", + "T_TERM_UTURN_INT_LVB_L4" + ], + [ + "LVB_L5", + "T_TERM_UTURN_INT_LVB_L5" + ], + [ + "LVB_L6", + "T_TERM_UTURN_INT_LVB_L5" + ], + [ + "LVB_L7", + "T_TERM_UTURN_INT_LVB_L4" + ], + [ + "LVB_L8", + "T_TERM_UTURN_INT_LVB_L3" + ], + [ + "LVB_L9", + "T_TERM_UTURN_INT_LVB_L2" + ], + [ + "LVB_L10", + "T_TERM_UTURN_INT_LVB_L1" + ], + [ + "LVB_L11", + "T_TERM_UTURN_INT_LVB_L0" + ], + [ + "LV_L0", + "T_TERM_UTURN_INT_LV_L17" + ], + [ + "LV_L1", + "T_TERM_UTURN_INT_LV_L16" + ], + [ + "LV_L2", + "T_TERM_UTURN_INT_LV_L2" + ], + [ + "LV_L3", + "T_TERM_UTURN_INT_LV_L3" + ], + [ + "LV_L4", + "T_TERM_UTURN_INT_LV_L4" + ], + [ + "LV_L5", + "T_TERM_UTURN_INT_LV_L5" + ], + [ + "LV_L6", + "T_TERM_UTURN_INT_LV_L6" + ], + [ + "LV_L7", + "T_TERM_UTURN_INT_LV_L7" + ], + [ + "LV_L8", + "T_TERM_UTURN_INT_LV_L9" + ], + [ + "LV_L9", + "T_TERM_UTURN_INT_LV_L9" + ], + [ + "LV_L10", + "T_TERM_UTURN_INT_LV_L7" + ], + [ + "LV_L11", + "T_TERM_UTURN_INT_LV_L6" + ], + [ + "LV_L12", + "T_TERM_UTURN_INT_LV_L5" + ], + [ + "LV_L13", + "T_TERM_UTURN_INT_LV_L4" + ], + [ + "LV_L14", + "T_TERM_UTURN_INT_LV_L3" + ], + [ + "LV_L15", + "T_TERM_UTURN_INT_LV_L2" + ], + [ + "LV_L16", + "T_TERM_UTURN_INT_LV_L16" + ], + [ + "LV_L17", + "T_TERM_UTURN_INT_LV_L17" + ], + [ + "NE2BEG0", + "T_TERM_UTURN_INT_SE2A3" + ], + [ + "NE2BEG1", + "T_TERM_UTURN_INT_SE2A2" + ], + [ + "NE2BEG2", + "T_TERM_UTURN_INT_SE2A1" + ], + [ + "NE2BEG3", + "T_TERM_UTURN_INT_SE2A0" + ], + [ + "NE6A0", + "T_TERM_UTURN_INT_SE6B3" + ], + [ + "NE6A1", + "T_TERM_UTURN_INT_SE6B2" + ], + [ + "NE6A2", + "T_TERM_UTURN_INT_SE6B1" + ], + [ + "NE6A3", + "T_TERM_UTURN_INT_SE6B0" + ], + [ + "NE6B0", + "T_TERM_UTURN_INT_SE6C3" + ], + [ + "NE6B1", + "T_TERM_UTURN_INT_SE6C2" + ], + [ + "NE6B2", + "T_TERM_UTURN_INT_SE6C1" + ], + [ + "NE6B3", + "T_TERM_UTURN_INT_SE6C0" + ], + [ + "NE6C0", + "T_TERM_UTURN_INT_SE6D3" + ], + [ + "NE6C1", + "T_TERM_UTURN_INT_SE6D2" + ], + [ + "NE6C2", + "T_TERM_UTURN_INT_SE6D1" + ], + [ + "NE6C3", + "T_TERM_UTURN_INT_SE6D0" + ], + [ + "NE6D0", + "T_TERM_UTURN_INT_SE6E3" + ], + [ + "NE6D1", + "T_TERM_UTURN_INT_SE6E2" + ], + [ + "NE6D2", + "T_TERM_UTURN_INT_SE6E1" + ], + [ + "NE6D3", + "T_TERM_UTURN_INT_SE6E0" + ], + [ + "NL1BEG0", + "T_TERM_UTURN_INT_SR1END3" + ], + [ + "NL1BEG1", + "T_TERM_UTURN_INT_SR1END2" + ], + [ + "NL1BEG2", + "T_TERM_UTURN_INT_SR1END1" + ], + [ + "NN2A0", + "T_TERM_UTURN_INT_SS2END3" + ], + [ + "NN2A1", + "T_TERM_UTURN_INT_SS2END2" + ], + [ + "NN2A2", + "T_TERM_UTURN_INT_SS2END1" + ], + [ + "NN2A3", + "T_TERM_UTURN_INT_SS2END0" + ], + [ + "NN2BEG0", + "T_TERM_UTURN_INT_SS2A3" + ], + [ + "NN2BEG1", + "T_TERM_UTURN_INT_SS2A2" + ], + [ + "NN2BEG2", + "T_TERM_UTURN_INT_SS2A1" + ], + [ + "NN2BEG3", + "T_TERM_UTURN_INT_SS2A0" + ], + [ + "NN6A0", + "T_TERM_UTURN_INT_SS6B3" + ], + [ + "NN6A1", + "T_TERM_UTURN_INT_SS6B2" + ], + [ + "NN6A2", + "T_TERM_UTURN_INT_SS6B1" + ], + [ + "NN6A3", + "T_TERM_UTURN_INT_SS6B0" + ], + [ + "NN6B0", + "T_TERM_UTURN_INT_SS6C3" + ], + [ + "NN6B1", + "T_TERM_UTURN_INT_SS6C2" + ], + [ + "NN6B2", + "T_TERM_UTURN_INT_SS6C1" + ], + [ + "NN6B3", + "T_TERM_UTURN_INT_SS6C0" + ], + [ + "NN6BEG0", + "T_TERM_UTURN_INT_SS6A3" + ], + [ + "NN6BEG1", + "T_TERM_UTURN_INT_SS6A2" + ], + [ + "NN6BEG2", + "T_TERM_UTURN_INT_SS6A1" + ], + [ + "NN6BEG3", + "T_TERM_UTURN_INT_SS6A0" + ], + [ + "NN6C0", + "T_TERM_UTURN_INT_SS6D3" + ], + [ + "NN6C1", + "T_TERM_UTURN_INT_SS6D2" + ], + [ + "NN6C2", + "T_TERM_UTURN_INT_SS6D1" + ], + [ + "NN6C3", + "T_TERM_UTURN_INT_SS6D0" + ], + [ + "NN6D0", + "T_TERM_UTURN_INT_SS6E3" + ], + [ + "NN6D1", + "T_TERM_UTURN_INT_SS6E2" + ], + [ + "NN6D2", + "T_TERM_UTURN_INT_SS6E1" + ], + [ + "NN6D3", + "T_TERM_UTURN_INT_SS6E0" + ], + [ + "NN6E0", + "T_TERM_UTURN_INT_SS6END3" + ], + [ + "NN6E1", + "T_TERM_UTURN_INT_SS6END2" + ], + [ + "NN6E2", + "T_TERM_UTURN_INT_SS6END1" + ], + [ + "NN6E3", + "T_TERM_UTURN_INT_SS6END0" + ], + [ + "NR1BEG0", + "T_TERM_UTURN_INT_SL1END3" + ], + [ + "NR1BEG1", + "T_TERM_UTURN_INT_SL1END2" + ], + [ + "NR1BEG2", + "T_TERM_UTURN_INT_SL1END1" + ], + [ + "NR1BEG3", + "T_TERM_UTURN_INT_SL1END0" + ], + [ + "NW2BEG0", + "T_TERM_UTURN_INT_SW2A3" + ], + [ + "NW2BEG1", + "T_TERM_UTURN_INT_SW2A2" + ], + [ + "NW2BEG2", + "T_TERM_UTURN_INT_SW2A1" + ], + [ + "NW2BEG3", + "T_TERM_UTURN_INT_SW2A0" + ], + [ + "NW6A0", + "T_TERM_UTURN_INT_SW6B3" + ], + [ + "NW6A1", + "T_TERM_UTURN_INT_SW6B2" + ], + [ + "NW6A2", + "T_TERM_UTURN_INT_SW6B1" + ], + [ + "NW6A3", + "T_TERM_UTURN_INT_SW6B0" + ], + [ + "NW6B0", + "T_TERM_UTURN_INT_SW6C3" + ], + [ + "NW6B1", + "T_TERM_UTURN_INT_SW6C2" + ], + [ + "NW6B2", + "T_TERM_UTURN_INT_SW6C1" + ], + [ + "NW6B3", + "T_TERM_UTURN_INT_SW6C0" + ], + [ + "NW6C0", + "T_TERM_UTURN_INT_SW6D3" + ], + [ + "NW6C1", + "T_TERM_UTURN_INT_SW6D2" + ], + [ + "NW6C2", + "T_TERM_UTURN_INT_SW6D1" + ], + [ + "NW6C3", + "T_TERM_UTURN_INT_SW6D0" + ], + [ + "NW6D0", + "T_TERM_UTURN_INT_SW6E3" + ], + [ + "NW6D1", + "T_TERM_UTURN_INT_SW6E2" + ], + [ + "NW6D2", + "T_TERM_UTURN_INT_SW6E1" + ], + [ + "NW6D3", + "T_TERM_UTURN_INT_SW6E0" + ], + [ + "SE2A0", + "T_TERM_UTURN_INT_SE2A0" + ], + [ + "SE2A1", + "T_TERM_UTURN_INT_SE2A1" + ], + [ + "SE2A2", + "T_TERM_UTURN_INT_SE2A2" + ], + [ + "SE2A3", + "T_TERM_UTURN_INT_SE2A3" + ], + [ + "SE6B0", + "T_TERM_UTURN_INT_SE6B0" + ], + [ + "SE6B1", + "T_TERM_UTURN_INT_SE6B1" + ], + [ + "SE6B2", + "T_TERM_UTURN_INT_SE6B2" + ], + [ + "SE6B3", + "T_TERM_UTURN_INT_SE6B3" + ], + [ + "SE6C0", + "T_TERM_UTURN_INT_SE6C0" + ], + [ + "SE6C1", + "T_TERM_UTURN_INT_SE6C1" + ], + [ + "SE6C2", + "T_TERM_UTURN_INT_SE6C2" + ], + [ + "SE6C3", + "T_TERM_UTURN_INT_SE6C3" + ], + [ + "SE6D0", + "T_TERM_UTURN_INT_SE6D0" + ], + [ + "SE6D1", + "T_TERM_UTURN_INT_SE6D1" + ], + [ + "SE6D2", + "T_TERM_UTURN_INT_SE6D2" + ], + [ + "SE6D3", + "T_TERM_UTURN_INT_SE6D3" + ], + [ + "SE6E0", + "T_TERM_UTURN_INT_SE6E0" + ], + [ + "SE6E1", + "T_TERM_UTURN_INT_SE6E1" + ], + [ + "SE6E2", + "T_TERM_UTURN_INT_SE6E2" + ], + [ + "SE6E3", + "T_TERM_UTURN_INT_SE6E3" + ], + [ + "SL1END0", + "T_TERM_UTURN_INT_SL1END0" + ], + [ + "SL1END1", + "T_TERM_UTURN_INT_SL1END1" + ], + [ + "SL1END2", + "T_TERM_UTURN_INT_SL1END2" + ], + [ + "SL1END3", + "T_TERM_UTURN_INT_SL1END3" + ], + [ + "SR1END1", + "T_TERM_UTURN_INT_SR1END1" + ], + [ + "SR1END2", + "T_TERM_UTURN_INT_SR1END2" + ], + [ + "SR1END3", + "T_TERM_UTURN_INT_SR1END3" + ], + [ + "SS2A0", + "T_TERM_UTURN_INT_SS2A0" + ], + [ + "SS2A1", + "T_TERM_UTURN_INT_SS2A1" + ], + [ + "SS2A2", + "T_TERM_UTURN_INT_SS2A2" + ], + [ + "SS2A3", + "T_TERM_UTURN_INT_SS2A3" + ], + [ + "SS2END0", + "T_TERM_UTURN_INT_SS2END0" + ], + [ + "SS2END1", + "T_TERM_UTURN_INT_SS2END1" + ], + [ + "SS2END2", + "T_TERM_UTURN_INT_SS2END2" + ], + [ + "SS2END3", + "T_TERM_UTURN_INT_SS2END3" + ], + [ + "SS6A0", + "T_TERM_UTURN_INT_SS6A0" + ], + [ + "SS6A1", + "T_TERM_UTURN_INT_SS6A1" + ], + [ + "SS6A2", + "T_TERM_UTURN_INT_SS6A2" + ], + [ + "SS6A3", + "T_TERM_UTURN_INT_SS6A3" + ], + [ + "SS6B0", + "T_TERM_UTURN_INT_SS6B0" + ], + [ + "SS6B1", + "T_TERM_UTURN_INT_SS6B1" + ], + [ + "SS6B2", + "T_TERM_UTURN_INT_SS6B2" + ], + [ + "SS6B3", + "T_TERM_UTURN_INT_SS6B3" + ], + [ + "SS6C0", + "T_TERM_UTURN_INT_SS6C0" + ], + [ + "SS6C1", + "T_TERM_UTURN_INT_SS6C1" + ], + [ + "SS6C2", + "T_TERM_UTURN_INT_SS6C2" + ], + [ + "SS6C3", + "T_TERM_UTURN_INT_SS6C3" + ], + [ + "SS6D0", + "T_TERM_UTURN_INT_SS6D0" + ], + [ + "SS6D1", + "T_TERM_UTURN_INT_SS6D1" + ], + [ + "SS6D2", + "T_TERM_UTURN_INT_SS6D2" + ], + [ + "SS6D3", + "T_TERM_UTURN_INT_SS6D3" + ], + [ + "SS6E0", + "T_TERM_UTURN_INT_SS6E0" + ], + [ + "SS6E1", + "T_TERM_UTURN_INT_SS6E1" + ], + [ + "SS6E2", + "T_TERM_UTURN_INT_SS6E2" + ], + [ + "SS6E3", + "T_TERM_UTURN_INT_SS6E3" + ], + [ + "SS6END0", + "T_TERM_UTURN_INT_SS6END0" + ], + [ + "SS6END1", + "T_TERM_UTURN_INT_SS6END1" + ], + [ + "SS6END2", + "T_TERM_UTURN_INT_SS6END2" + ], + [ + "SS6END3", + "T_TERM_UTURN_INT_SS6END3" + ], + [ + "SW2A0", + "T_TERM_UTURN_INT_SW2A0" + ], + [ + "SW2A1", + "T_TERM_UTURN_INT_SW2A1" + ], + [ + "SW2A2", + "T_TERM_UTURN_INT_SW2A2" + ], + [ + "SW2A3", + "T_TERM_UTURN_INT_SW2A3" + ], + [ + "SW6B0", + "T_TERM_UTURN_INT_SW6B0" + ], + [ + "SW6B1", + "T_TERM_UTURN_INT_SW6B1" + ], + [ + "SW6B2", + "T_TERM_UTURN_INT_SW6B2" + ], + [ + "SW6B3", + "T_TERM_UTURN_INT_SW6B3" + ], + [ + "SW6C0", + "T_TERM_UTURN_INT_SW6C0" + ], + [ + "SW6C1", + "T_TERM_UTURN_INT_SW6C1" + ], + [ + "SW6C2", + "T_TERM_UTURN_INT_SW6C2" + ], + [ + "SW6C3", + "T_TERM_UTURN_INT_SW6C3" + ], + [ + "SW6D0", + "T_TERM_UTURN_INT_SW6D0" + ], + [ + "SW6D1", + "T_TERM_UTURN_INT_SW6D1" + ], + [ + "SW6D2", + "T_TERM_UTURN_INT_SW6D2" + ], + [ + "SW6D3", + "T_TERM_UTURN_INT_SW6D3" + ], + [ + "SW6E0", + "T_TERM_UTURN_INT_SW6E0" + ], + [ + "SW6E1", + "T_TERM_UTURN_INT_SW6E1" + ], + [ + "SW6E2", + "T_TERM_UTURN_INT_SW6E2" + ], + [ + "SW6E3", + "T_TERM_UTURN_INT_SW6E3" + ], + [ + "WL1BEG3", + "T_TERM_UTURN_INT_WR1BEG_S0" + ], + [ + "WL1END3", + "T_TERM_UTURN_INT_WR1END_S1_0" + ], + [ + "WR1BEG_S0", + "T_TERM_UTURN_INT_WR1BEG_S0" + ], + [ + "WR1END_S1_0", + "T_TERM_UTURN_INT_WR1END_S1_0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "INT_R", + "INT_R" + ], + "wire_pairs": [ + [ + "BYP_BOUNCE2", + "BYP_BOUNCE_N3_2" + ], + [ + "BYP_BOUNCE3", + "BYP_BOUNCE_N3_3" + ], + [ + "BYP_BOUNCE6", + "BYP_BOUNCE_N3_6" + ], + [ + "BYP_BOUNCE7", + "BYP_BOUNCE_N3_7" + ], + [ + "EL1BEG3", + "EL1BEG_N3" + ], + [ + "ER1END3", + "ER1END_N3_3" + ], + [ + "LV0", + "LV1" + ], + [ + "LV1", + "LV2" + ], + [ + "LV2", + "LV3" + ], + [ + "LV3", + "LV4" + ], + [ + "LV4", + "LV5" + ], + [ + "LV5", + "LV6" + ], + [ + "LV6", + "LV7" + ], + [ + "LV7", + "LV8" + ], + [ + "LV8", + "LV9" + ], + [ + "LV10", + "LV11" + ], + [ + "LV11", + "LV12" + ], + [ + "LV12", + "LV13" + ], + [ + "LV13", + "LV14" + ], + [ + "LV14", + "LV15" + ], + [ + "LV15", + "LV16" + ], + [ + "LV16", + "LV17" + ], + [ + "LV17", + "LV18" + ], + [ + "LVB0", + "LVB1" + ], + [ + "LVB1", + "LVB2" + ], + [ + "LVB2", + "LVB3" + ], + [ + "LVB3", + "LVB4" + ], + [ + "LVB4", + "LVB5" + ], + [ + "LVB5", + "LVB6" + ], + [ + "LVB6", + "LVB7" + ], + [ + "LVB7", + "LVB8" + ], + [ + "LVB8", + "LVB9" + ], + [ + "LVB10", + "LVB11" + ], + [ + "LVB11", + "LVB12" + ], + [ + "NE6A0", + "NE6B0" + ], + [ + "NE6A1", + "NE6B1" + ], + [ + "NE6A2", + "NE6B2" + ], + [ + "NE6A3", + "NE6B3" + ], + [ + "NE6B0", + "NE6C0" + ], + [ + "NE6B1", + "NE6C1" + ], + [ + "NE6B2", + "NE6C2" + ], + [ + "NE6B3", + "NE6C3" + ], + [ + "NE6C0", + "NE6D0" + ], + [ + "NE6C1", + "NE6D1" + ], + [ + "NE6C2", + "NE6D2" + ], + [ + "NE6C3", + "NE6D3" + ], + [ + "NE6D0", + "NE6E0" + ], + [ + "NE6D1", + "NE6E1" + ], + [ + "NE6D2", + "NE6E2" + ], + [ + "NE6D3", + "NE6E3" + ], + [ + "NL1BEG0", + "NL1END0" + ], + [ + "NL1BEG1", + "NL1END1" + ], + [ + "NL1BEG2", + "NL1END2" + ], + [ + "NN2A0", + "NN2END0" + ], + [ + "NN2A1", + "NN2END1" + ], + [ + "NN2A2", + "NN2END2" + ], + [ + "NN2A3", + "NN2END3" + ], + [ + "NN6A0", + "NN6B0" + ], + [ + "NN6A1", + "NN6B1" + ], + [ + "NN6A2", + "NN6B2" + ], + [ + "NN6A3", + "NN6B3" + ], + [ + "NN6B0", + "NN6C0" + ], + [ + "NN6B1", + "NN6C1" + ], + [ + "NN6B2", + "NN6C2" + ], + [ + "NN6B3", + "NN6C3" + ], + [ + "NN6C0", + "NN6D0" + ], + [ + "NN6C1", + "NN6D1" + ], + [ + "NN6C2", + "NN6D2" + ], + [ + "NN6C3", + "NN6D3" + ], + [ + "NN6D0", + "NN6E0" + ], + [ + "NN6D1", + "NN6E1" + ], + [ + "NN6D2", + "NN6E2" + ], + [ + "NN6D3", + "NN6E3" + ], + [ + "NN6E0", + "NN6END0" + ], + [ + "NN6E1", + "NN6END1" + ], + [ + "NN6E2", + "NN6END2" + ], + [ + "NN6E3", + "NN6END3" + ], + [ + "NR1BEG0", + "NR1END0" + ], + [ + "NR1BEG1", + "NR1END1" + ], + [ + "NR1BEG2", + "NR1END2" + ], + [ + "NR1BEG3", + "NR1END3" + ], + [ + "NW6A0", + "NW6B0" + ], + [ + "NW6A1", + "NW6B1" + ], + [ + "NW6A2", + "NW6B2" + ], + [ + "NW6A3", + "NW6B3" + ], + [ + "NW6B0", + "NW6C0" + ], + [ + "NW6B1", + "NW6C1" + ], + [ + "NW6B2", + "NW6C2" + ], + [ + "NW6B3", + "NW6C3" + ], + [ + "NW6C0", + "NW6D0" + ], + [ + "NW6C1", + "NW6D1" + ], + [ + "NW6C2", + "NW6D2" + ], + [ + "NW6C3", + "NW6D3" + ], + [ + "NW6D0", + "NW6E0" + ], + [ + "NW6D1", + "NW6E1" + ], + [ + "NW6D2", + "NW6E2" + ], + [ + "NW6D3", + "NW6E3" + ], + [ + "SE2A0", + "SE2BEG0" + ], + [ + "SE2A1", + "SE2BEG1" + ], + [ + "SE2A2", + "SE2BEG2" + ], + [ + "SE2A3", + "SE2BEG3" + ], + [ + "SR1END3", + "SR1END_N3_3" + ], + [ + "SS2A0", + "SS2BEG0" + ], + [ + "SS2A1", + "SS2BEG1" + ], + [ + "SS2A2", + "SS2BEG2" + ], + [ + "SS2A3", + "SS2BEG3" + ], + [ + "SS2END3", + "SS2END_N0_3" + ], + [ + "SS6A0", + "SS6BEG0" + ], + [ + "SS6A1", + "SS6BEG1" + ], + [ + "SS6A2", + "SS6BEG2" + ], + [ + "SS6A3", + "SS6BEG3" + ], + [ + "SS6END3", + "SS6END_N0_3" + ], + [ + "SW2A0", + "SW2BEG0" + ], + [ + "SW2A1", + "SW2BEG1" + ], + [ + "SW2A2", + "SW2BEG2" + ], + [ + "SW2A3", + "SW2BEG3" + ], + [ + "SW2END3", + "SW2END_N0_3" + ], + [ + "SW6END3", + "SW6END_N0_3" + ], + [ + "WL1BEG3", + "WL1BEG_N3" + ], + [ + "WL1END3", + "WL1END_N1_3" + ], + [ + "WW2END3", + "WW2END_N0_3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "INT_R", + "INT_R" + ], + "wire_pairs": [ + [ + "EL1END0", + "EL1END_S3_0" + ], + [ + "ER1BEG0", + "ER1BEG_S0" + ], + [ + "FAN_BOUNCE0", + "FAN_BOUNCE_S3_0" + ], + [ + "FAN_BOUNCE2", + "FAN_BOUNCE_S3_2" + ], + [ + "FAN_BOUNCE4", + "FAN_BOUNCE_S3_4" + ], + [ + "FAN_BOUNCE6", + "FAN_BOUNCE_S3_6" + ], + [ + "GCLK_B0", + "GCLK_B0" + ], + [ + "GCLK_B1", + "GCLK_B1" + ], + [ + "GCLK_B2", + "GCLK_B2" + ], + [ + "GCLK_B3", + "GCLK_B3" + ], + [ + "GCLK_B4", + "GCLK_B4" + ], + [ + "GCLK_B5", + "GCLK_B5" + ], + [ + "LV10", + "LV9" + ], + [ + "LVB10", + "LVB9" + ], + [ + "NE2A0", + "NE2BEG0" + ], + [ + "NE2A1", + "NE2BEG1" + ], + [ + "NE2A2", + "NE2BEG2" + ], + [ + "NE2A3", + "NE2BEG3" + ], + [ + "NE2END0", + "NE2END_S3_0" + ], + [ + "NL1END0", + "NL1END_S3_0" + ], + [ + "NN2A0", + "NN2BEG0" + ], + [ + "NN2A1", + "NN2BEG1" + ], + [ + "NN2A2", + "NN2BEG2" + ], + [ + "NN2A3", + "NN2BEG3" + ], + [ + "NN2END0", + "NN2END_S2_0" + ], + [ + "NN6A0", + "NN6BEG0" + ], + [ + "NN6A1", + "NN6BEG1" + ], + [ + "NN6A2", + "NN6BEG2" + ], + [ + "NN6A3", + "NN6BEG3" + ], + [ + "NN6END0", + "NN6END_S1_0" + ], + [ + "NW2A0", + "NW2BEG0" + ], + [ + "NW2A1", + "NW2BEG1" + ], + [ + "NW2A2", + "NW2BEG2" + ], + [ + "NW2A3", + "NW2BEG3" + ], + [ + "NW2END0", + "NW2END_S0_0" + ], + [ + "NW6END0", + "NW6END_S0_0" + ], + [ + "SE6A0", + "SE6B0" + ], + [ + "SE6A1", + "SE6B1" + ], + [ + "SE6A2", + "SE6B2" + ], + [ + "SE6A3", + "SE6B3" + ], + [ + "SE6B0", + "SE6C0" + ], + [ + "SE6B1", + "SE6C1" + ], + [ + "SE6B2", + "SE6C2" + ], + [ + "SE6B3", + "SE6C3" + ], + [ + "SE6C0", + "SE6D0" + ], + [ + "SE6C1", + "SE6D1" + ], + [ + "SE6C2", + "SE6D2" + ], + [ + "SE6C3", + "SE6D3" + ], + [ + "SE6D0", + "SE6E0" + ], + [ + "SE6D1", + "SE6E1" + ], + [ + "SE6D2", + "SE6E2" + ], + [ + "SE6D3", + "SE6E3" + ], + [ + "SL1BEG0", + "SL1END0" + ], + [ + "SL1BEG1", + "SL1END1" + ], + [ + "SL1BEG2", + "SL1END2" + ], + [ + "SL1BEG3", + "SL1END3" + ], + [ + "SR1BEG1", + "SR1END1" + ], + [ + "SR1BEG2", + "SR1END2" + ], + [ + "SR1BEG3", + "SR1END3" + ], + [ + "SS2A0", + "SS2END0" + ], + [ + "SS2A1", + "SS2END1" + ], + [ + "SS2A2", + "SS2END2" + ], + [ + "SS2A3", + "SS2END3" + ], + [ + "SS6A0", + "SS6B0" + ], + [ + "SS6A1", + "SS6B1" + ], + [ + "SS6A2", + "SS6B2" + ], + [ + "SS6A3", + "SS6B3" + ], + [ + "SS6B0", + "SS6C0" + ], + [ + "SS6B1", + "SS6C1" + ], + [ + "SS6B2", + "SS6C2" + ], + [ + "SS6B3", + "SS6C3" + ], + [ + "SS6C0", + "SS6D0" + ], + [ + "SS6C1", + "SS6D1" + ], + [ + "SS6C2", + "SS6D2" + ], + [ + "SS6C3", + "SS6D3" + ], + [ + "SS6D0", + "SS6E0" + ], + [ + "SS6D1", + "SS6E1" + ], + [ + "SS6D2", + "SS6E2" + ], + [ + "SS6D3", + "SS6E3" + ], + [ + "SS6E0", + "SS6END0" + ], + [ + "SS6E1", + "SS6END1" + ], + [ + "SS6E2", + "SS6END2" + ], + [ + "SS6E3", + "SS6END3" + ], + [ + "SW6A0", + "SW6B0" + ], + [ + "SW6A1", + "SW6B1" + ], + [ + "SW6A2", + "SW6B2" + ], + [ + "SW6A3", + "SW6B3" + ], + [ + "SW6B0", + "SW6C0" + ], + [ + "SW6B1", + "SW6C1" + ], + [ + "SW6B2", + "SW6C2" + ], + [ + "SW6B3", + "SW6C3" + ], + [ + "SW6C0", + "SW6D0" + ], + [ + "SW6C1", + "SW6D1" + ], + [ + "SW6C2", + "SW6D2" + ], + [ + "SW6C3", + "SW6D3" + ], + [ + "SW6D0", + "SW6E0" + ], + [ + "SW6D1", + "SW6E1" + ], + [ + "SW6D2", + "SW6E2" + ], + [ + "SW6D3", + "SW6E3" + ], + [ + "WR1BEG0", + "WR1BEG_S0" + ], + [ + "WR1END0", + "WR1END_S1_0" + ], + [ + "WW4END0", + "WW4END_S0_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_R", + "IO_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "BYP0", + "INT_INTERFACE_BYP0" + ], + [ + "BYP1", + "INT_INTERFACE_BYP1" + ], + [ + "BYP2", + "INT_INTERFACE_BYP2" + ], + [ + "BYP3", + "INT_INTERFACE_BYP3" + ], + [ + "BYP4", + "INT_INTERFACE_BYP4" + ], + [ + "BYP5", + "INT_INTERFACE_BYP5" + ], + [ + "BYP6", + "INT_INTERFACE_BYP6" + ], + [ + "BYP7", + "INT_INTERFACE_BYP7" + ], + [ + "CLK0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK1", + "INT_INTERFACE_CLK1" + ], + [ + "CTRL0", + "INT_INTERFACE_CTRL0" + ], + [ + "CTRL1", + "INT_INTERFACE_CTRL1" + ], + [ + "EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "FAN0", + "INT_INTERFACE_FAN0" + ], + [ + "FAN1", + "INT_INTERFACE_FAN1" + ], + [ + "FAN2", + "INT_INTERFACE_FAN2" + ], + [ + "FAN3", + "INT_INTERFACE_FAN3" + ], + [ + "FAN4", + "INT_INTERFACE_FAN4" + ], + [ + "FAN5", + "INT_INTERFACE_FAN5" + ], + [ + "FAN6", + "INT_INTERFACE_FAN6" + ], + [ + "FAN7", + "INT_INTERFACE_FAN7" + ], + [ + "IMUX0", + "INT_INTERFACE_IMUX0" + ], + [ + "IMUX1", + "INT_INTERFACE_IMUX1" + ], + [ + "IMUX2", + "INT_INTERFACE_IMUX2" + ], + [ + "IMUX3", + "INT_INTERFACE_IMUX3" + ], + [ + "IMUX4", + "INT_INTERFACE_IMUX4" + ], + [ + "IMUX5", + "INT_INTERFACE_IMUX5" + ], + [ + "IMUX6", + "INT_INTERFACE_IMUX6" + ], + [ + "IMUX7", + "INT_INTERFACE_IMUX7" + ], + [ + "IMUX8", + "INT_INTERFACE_IMUX8" + ], + [ + "IMUX9", + "INT_INTERFACE_IMUX9" + ], + [ + "IMUX10", + "INT_INTERFACE_IMUX10" + ], + [ + "IMUX11", + "INT_INTERFACE_IMUX11" + ], + [ + "IMUX12", + "INT_INTERFACE_IMUX12" + ], + [ + "IMUX13", + "INT_INTERFACE_IMUX13" + ], + [ + "IMUX14", + "INT_INTERFACE_IMUX14" + ], + [ + "IMUX15", + "INT_INTERFACE_IMUX15" + ], + [ + "IMUX16", + "INT_INTERFACE_IMUX16" + ], + [ + "IMUX17", + "INT_INTERFACE_IMUX17" + ], + [ + "IMUX18", + "INT_INTERFACE_IMUX18" + ], + [ + "IMUX19", + "INT_INTERFACE_IMUX19" + ], + [ + "IMUX20", + "INT_INTERFACE_IMUX20" + ], + [ + "IMUX21", + "INT_INTERFACE_IMUX21" + ], + [ + "IMUX22", + "INT_INTERFACE_IMUX22" + ], + [ + "IMUX23", + "INT_INTERFACE_IMUX23" + ], + [ + "IMUX24", + "INT_INTERFACE_IMUX24" + ], + [ + "IMUX25", + "INT_INTERFACE_IMUX25" + ], + [ + "IMUX26", + "INT_INTERFACE_IMUX26" + ], + [ + "IMUX27", + "INT_INTERFACE_IMUX27" + ], + [ + "IMUX28", + "INT_INTERFACE_IMUX28" + ], + [ + "IMUX29", + "INT_INTERFACE_IMUX29" + ], + [ + "IMUX30", + "INT_INTERFACE_IMUX30" + ], + [ + "IMUX31", + "INT_INTERFACE_IMUX31" + ], + [ + "IMUX32", + "INT_INTERFACE_IMUX32" + ], + [ + "IMUX33", + "INT_INTERFACE_IMUX33" + ], + [ + "IMUX34", + "INT_INTERFACE_IMUX34" + ], + [ + "IMUX35", + "INT_INTERFACE_IMUX35" + ], + [ + "IMUX36", + "INT_INTERFACE_IMUX36" + ], + [ + "IMUX37", + "INT_INTERFACE_IMUX37" + ], + [ + "IMUX38", + "INT_INTERFACE_IMUX38" + ], + [ + "IMUX39", + "INT_INTERFACE_IMUX39" + ], + [ + "IMUX40", + "INT_INTERFACE_IMUX40" + ], + [ + "IMUX41", + "INT_INTERFACE_IMUX41" + ], + [ + "IMUX42", + "INT_INTERFACE_IMUX42" + ], + [ + "IMUX43", + "INT_INTERFACE_IMUX43" + ], + [ + "IMUX44", + "INT_INTERFACE_IMUX44" + ], + [ + "IMUX45", + "INT_INTERFACE_IMUX45" + ], + [ + "IMUX46", + "INT_INTERFACE_IMUX46" + ], + [ + "IMUX47", + "INT_INTERFACE_IMUX47" + ], + [ + "INT_DQS_IOTOPHASER", + "L_INT_INTER_DQS_IOTOPHASER" + ], + [ + "INT_PHASER_TO_IO_ICLK", + "INT_INTERFACE_PHASER_TO_IO_ICLK" + ], + [ + "INT_PHASER_TO_IO_ICLKDIV", + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_PHASER_TO_IO_OCLK", + "INT_INTERFACE_PHASER_TO_IO_OCLK" + ], + [ + "INT_PHASER_TO_IO_OCLK1X_90", + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_PHASER_TO_IO_OCLKDIV", + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV" + ], + [ + "LH1", + "INT_INTERFACE_LH1" + ], + [ + "LH2", + "INT_INTERFACE_LH2" + ], + [ + "LH3", + "INT_INTERFACE_LH3" + ], + [ + "LH4", + "INT_INTERFACE_LH4" + ], + [ + "LH5", + "INT_INTERFACE_LH5" + ], + [ + "LH6", + "INT_INTERFACE_LH6" + ], + [ + "LH7", + "INT_INTERFACE_LH7" + ], + [ + "LH8", + "INT_INTERFACE_LH8" + ], + [ + "LH9", + "INT_INTERFACE_LH9" + ], + [ + "LH10", + "INT_INTERFACE_LH10" + ], + [ + "LH11", + "INT_INTERFACE_LH11" + ], + [ + "LH12", + "INT_INTERFACE_LH12" + ], + [ + "LOGIC_OUTS0", + "INT_INTERFACE_LOGIC_OUTS0" + ], + [ + "LOGIC_OUTS1", + "INT_INTERFACE_LOGIC_OUTS1" + ], + [ + "LOGIC_OUTS2", + "INT_INTERFACE_LOGIC_OUTS2" + ], + [ + "LOGIC_OUTS3", + "INT_INTERFACE_LOGIC_OUTS3" + ], + [ + "LOGIC_OUTS4", + "INT_INTERFACE_LOGIC_OUTS4" + ], + [ + "LOGIC_OUTS5", + "INT_INTERFACE_LOGIC_OUTS5" + ], + [ + "LOGIC_OUTS6", + "INT_INTERFACE_LOGIC_OUTS6" + ], + [ + "LOGIC_OUTS7", + "INT_INTERFACE_LOGIC_OUTS7" + ], + [ + "LOGIC_OUTS8", + "INT_INTERFACE_LOGIC_OUTS8" + ], + [ + "LOGIC_OUTS9", + "INT_INTERFACE_LOGIC_OUTS9" + ], + [ + "LOGIC_OUTS10", + "INT_INTERFACE_LOGIC_OUTS10" + ], + [ + "LOGIC_OUTS11", + "INT_INTERFACE_LOGIC_OUTS11" + ], + [ + "LOGIC_OUTS12", + "INT_INTERFACE_LOGIC_OUTS12" + ], + [ + "LOGIC_OUTS13", + "INT_INTERFACE_LOGIC_OUTS13" + ], + [ + "LOGIC_OUTS14", + "INT_INTERFACE_LOGIC_OUTS14" + ], + [ + "LOGIC_OUTS15", + "INT_INTERFACE_LOGIC_OUTS15" + ], + [ + "LOGIC_OUTS16", + "INT_INTERFACE_LOGIC_OUTS16" + ], + [ + "LOGIC_OUTS17", + "INT_INTERFACE_LOGIC_OUTS17" + ], + [ + "LOGIC_OUTS18", + "INT_INTERFACE_LOGIC_OUTS18" + ], + [ + "LOGIC_OUTS19", + "INT_INTERFACE_LOGIC_OUTS19" + ], + [ + "LOGIC_OUTS20", + "INT_INTERFACE_LOGIC_OUTS20" + ], + [ + "LOGIC_OUTS21", + "INT_INTERFACE_LOGIC_OUTS21" + ], + [ + "LOGIC_OUTS22", + "INT_INTERFACE_LOGIC_OUTS22" + ], + [ + "LOGIC_OUTS23", + "INT_INTERFACE_LOGIC_OUTS23" + ], + [ + "MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "NE6BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "NE6BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "NE6BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "NE6BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "NE6E0", + "INT_INTERFACE_NE4C0" + ], + [ + "NE6E1", + "INT_INTERFACE_NE4C1" + ], + [ + "NE6E2", + "INT_INTERFACE_NE4C2" + ], + [ + "NE6E3", + "INT_INTERFACE_NE4C3" + ], + [ + "NW2END0", + "INT_INTERFACE_NW2A0" + ], + [ + "NW2END1", + "INT_INTERFACE_NW2A1" + ], + [ + "NW2END2", + "INT_INTERFACE_NW2A2" + ], + [ + "NW2END3", + "INT_INTERFACE_NW2A3" + ], + [ + "NW6A0", + "INT_INTERFACE_NW4A0" + ], + [ + "NW6A1", + "INT_INTERFACE_NW4A1" + ], + [ + "NW6A2", + "INT_INTERFACE_NW4A2" + ], + [ + "NW6A3", + "INT_INTERFACE_NW4A3" + ], + [ + "NW6END0", + "INT_INTERFACE_NW4END0" + ], + [ + "NW6END1", + "INT_INTERFACE_NW4END1" + ], + [ + "NW6END2", + "INT_INTERFACE_NW4END2" + ], + [ + "NW6END3", + "INT_INTERFACE_NW4END3" + ], + [ + "SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "SE6BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "SE6BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "SE6BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "SE6BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "SE6E0", + "INT_INTERFACE_SE4C0" + ], + [ + "SE6E1", + "INT_INTERFACE_SE4C1" + ], + [ + "SE6E2", + "INT_INTERFACE_SE4C2" + ], + [ + "SE6E3", + "INT_INTERFACE_SE4C3" + ], + [ + "SW2END0", + "INT_INTERFACE_SW2A0" + ], + [ + "SW2END1", + "INT_INTERFACE_SW2A1" + ], + [ + "SW2END2", + "INT_INTERFACE_SW2A2" + ], + [ + "SW2END3", + "INT_INTERFACE_SW2A3" + ], + [ + "SW6A0", + "INT_INTERFACE_SW4A0" + ], + [ + "SW6A1", + "INT_INTERFACE_SW4A1" + ], + [ + "SW6A2", + "INT_INTERFACE_SW4A2" + ], + [ + "SW6A3", + "INT_INTERFACE_SW4A3" + ], + [ + "SW6END0", + "INT_INTERFACE_SW4END0" + ], + [ + "SW6END1", + "INT_INTERFACE_SW4END1" + ], + [ + "SW6END2", + "INT_INTERFACE_SW4END2" + ], + [ + "SW6END3", + "INT_INTERFACE_SW4END3" + ], + [ + "WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "WW4END3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "INT_R", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "BYP0", + "INT_INTERFACE_BYP0" + ], + [ + "BYP1", + "INT_INTERFACE_BYP1" + ], + [ + "BYP2", + "INT_INTERFACE_BYP2" + ], + [ + "BYP3", + "INT_INTERFACE_BYP3" + ], + [ + "BYP4", + "INT_INTERFACE_BYP4" + ], + [ + "BYP5", + "INT_INTERFACE_BYP5" + ], + [ + "BYP6", + "INT_INTERFACE_BYP6" + ], + [ + "BYP7", + "INT_INTERFACE_BYP7" + ], + [ + "CLK0", + "INT_INTERFACE_CLK0" + ], + [ + "CLK1", + "INT_INTERFACE_CLK1" + ], + [ + "CTRL0", + "INT_INTERFACE_CTRL0" + ], + [ + "CTRL1", + "INT_INTERFACE_CTRL1" + ], + [ + "EE2A0", + "INT_INTERFACE_EE2A0" + ], + [ + "EE2A1", + "INT_INTERFACE_EE2A1" + ], + [ + "EE2A2", + "INT_INTERFACE_EE2A2" + ], + [ + "EE2A3", + "INT_INTERFACE_EE2A3" + ], + [ + "EE2BEG0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "EE2BEG1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "EE2BEG2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "EE2BEG3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "EE4A0", + "INT_INTERFACE_EE4A0" + ], + [ + "EE4A1", + "INT_INTERFACE_EE4A1" + ], + [ + "EE4A2", + "INT_INTERFACE_EE4A2" + ], + [ + "EE4A3", + "INT_INTERFACE_EE4A3" + ], + [ + "EE4B0", + "INT_INTERFACE_EE4B0" + ], + [ + "EE4B1", + "INT_INTERFACE_EE4B1" + ], + [ + "EE4B2", + "INT_INTERFACE_EE4B2" + ], + [ + "EE4B3", + "INT_INTERFACE_EE4B3" + ], + [ + "EE4BEG0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "EE4BEG1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "EE4BEG2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "EE4BEG3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "EE4C0", + "INT_INTERFACE_EE4C0" + ], + [ + "EE4C1", + "INT_INTERFACE_EE4C1" + ], + [ + "EE4C2", + "INT_INTERFACE_EE4C2" + ], + [ + "EE4C3", + "INT_INTERFACE_EE4C3" + ], + [ + "EL1BEG0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "EL1BEG1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "EL1BEG2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "EL1BEG3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "ER1BEG0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "ER1BEG1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "ER1BEG2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "ER1BEG3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "FAN0", + "INT_INTERFACE_FAN0" + ], + [ + "FAN1", + "INT_INTERFACE_FAN1" + ], + [ + "FAN2", + "INT_INTERFACE_FAN2" + ], + [ + "FAN3", + "INT_INTERFACE_FAN3" + ], + [ + "FAN4", + "INT_INTERFACE_FAN4" + ], + [ + "FAN5", + "INT_INTERFACE_FAN5" + ], + [ + "FAN6", + "INT_INTERFACE_FAN6" + ], + [ + "FAN7", + "INT_INTERFACE_FAN7" + ], + [ + "IMUX0", + "PCIE_INT_INTERFACE_IMUX0" + ], + [ + "IMUX1", + "PCIE_INT_INTERFACE_IMUX1" + ], + [ + "IMUX2", + "PCIE_INT_INTERFACE_IMUX2" + ], + [ + "IMUX3", + "PCIE_INT_INTERFACE_IMUX3" + ], + [ + "IMUX4", + "PCIE_INT_INTERFACE_IMUX4" + ], + [ + "IMUX5", + "PCIE_INT_INTERFACE_IMUX5" + ], + [ + "IMUX6", + "PCIE_INT_INTERFACE_IMUX6" + ], + [ + "IMUX7", + "PCIE_INT_INTERFACE_IMUX7" + ], + [ + "IMUX8", + "PCIE_INT_INTERFACE_IMUX8" + ], + [ + "IMUX9", + "PCIE_INT_INTERFACE_IMUX9" + ], + [ + "IMUX10", + "PCIE_INT_INTERFACE_IMUX10" + ], + [ + "IMUX11", + "PCIE_INT_INTERFACE_IMUX11" + ], + [ + "IMUX12", + "PCIE_INT_INTERFACE_IMUX12" + ], + [ + "IMUX13", + "PCIE_INT_INTERFACE_IMUX13" + ], + [ + "IMUX14", + "PCIE_INT_INTERFACE_IMUX14" + ], + [ + "IMUX15", + "PCIE_INT_INTERFACE_IMUX15" + ], + [ + "IMUX16", + "PCIE_INT_INTERFACE_IMUX16" + ], + [ + "IMUX17", + "PCIE_INT_INTERFACE_IMUX17" + ], + [ + "IMUX18", + "PCIE_INT_INTERFACE_IMUX18" + ], + [ + "IMUX19", + "PCIE_INT_INTERFACE_IMUX19" + ], + [ + "IMUX20", + "PCIE_INT_INTERFACE_IMUX20" + ], + [ + "IMUX21", + "PCIE_INT_INTERFACE_IMUX21" + ], + [ + "IMUX22", + "PCIE_INT_INTERFACE_IMUX22" + ], + [ + "IMUX23", + "PCIE_INT_INTERFACE_IMUX23" + ], + [ + "IMUX24", + "PCIE_INT_INTERFACE_IMUX24" + ], + [ + "IMUX25", + "PCIE_INT_INTERFACE_IMUX25" + ], + [ + "IMUX26", + "PCIE_INT_INTERFACE_IMUX26" + ], + [ + "IMUX27", + "PCIE_INT_INTERFACE_IMUX27" + ], + [ + "IMUX28", + "PCIE_INT_INTERFACE_IMUX28" + ], + [ + "IMUX29", + "PCIE_INT_INTERFACE_IMUX29" + ], + [ + "IMUX30", + "PCIE_INT_INTERFACE_IMUX30" + ], + [ + "IMUX31", + "PCIE_INT_INTERFACE_IMUX31" + ], + [ + "IMUX32", + "PCIE_INT_INTERFACE_IMUX32" + ], + [ + "IMUX33", + "PCIE_INT_INTERFACE_IMUX33" + ], + [ + "IMUX34", + "PCIE_INT_INTERFACE_IMUX34" + ], + [ + "IMUX35", + "PCIE_INT_INTERFACE_IMUX35" + ], + [ + "IMUX36", + "PCIE_INT_INTERFACE_IMUX36" + ], + [ + "IMUX37", + "PCIE_INT_INTERFACE_IMUX37" + ], + [ + "IMUX38", + "PCIE_INT_INTERFACE_IMUX38" + ], + [ + "IMUX39", + "PCIE_INT_INTERFACE_IMUX39" + ], + [ + "IMUX40", + "PCIE_INT_INTERFACE_IMUX40" + ], + [ + "IMUX41", + "PCIE_INT_INTERFACE_IMUX41" + ], + [ + "IMUX42", + "PCIE_INT_INTERFACE_IMUX42" + ], + [ + "IMUX43", + "PCIE_INT_INTERFACE_IMUX43" + ], + [ + "IMUX44", + "PCIE_INT_INTERFACE_IMUX44" + ], + [ + "IMUX45", + "PCIE_INT_INTERFACE_IMUX45" + ], + [ + "IMUX46", + "PCIE_INT_INTERFACE_IMUX46" + ], + [ + "IMUX47", + "PCIE_INT_INTERFACE_IMUX47" + ], + [ + "LH1", + "INT_INTERFACE_LH1" + ], + [ + "LH2", + "INT_INTERFACE_LH2" + ], + [ + "LH3", + "INT_INTERFACE_LH3" + ], + [ + "LH4", + "INT_INTERFACE_LH4" + ], + [ + "LH5", + "INT_INTERFACE_LH5" + ], + [ + "LH6", + "INT_INTERFACE_LH6" + ], + [ + "LH7", + "INT_INTERFACE_LH7" + ], + [ + "LH8", + "INT_INTERFACE_LH8" + ], + [ + "LH9", + "INT_INTERFACE_LH9" + ], + [ + "LH10", + "INT_INTERFACE_LH10" + ], + [ + "LH11", + "INT_INTERFACE_LH11" + ], + [ + "LH12", + "INT_INTERFACE_LH12" + ], + [ + "LOGIC_OUTS0", + "INT_INTERFACE_LOGIC_OUTS0" + ], + [ + "LOGIC_OUTS1", + "INT_INTERFACE_LOGIC_OUTS1" + ], + [ + "LOGIC_OUTS2", + "INT_INTERFACE_LOGIC_OUTS2" + ], + [ + "LOGIC_OUTS3", + "INT_INTERFACE_LOGIC_OUTS3" + ], + [ + "LOGIC_OUTS4", + "INT_INTERFACE_LOGIC_OUTS4" + ], + [ + "LOGIC_OUTS5", + "INT_INTERFACE_LOGIC_OUTS5" + ], + [ + "LOGIC_OUTS6", + "INT_INTERFACE_LOGIC_OUTS6" + ], + [ + "LOGIC_OUTS7", + "INT_INTERFACE_LOGIC_OUTS7" + ], + [ + "LOGIC_OUTS8", + "INT_INTERFACE_LOGIC_OUTS8" + ], + [ + "LOGIC_OUTS9", + "INT_INTERFACE_LOGIC_OUTS9" + ], + [ + "LOGIC_OUTS10", + "INT_INTERFACE_LOGIC_OUTS10" + ], + [ + "LOGIC_OUTS11", + "INT_INTERFACE_LOGIC_OUTS11" + ], + [ + "LOGIC_OUTS12", + "INT_INTERFACE_LOGIC_OUTS12" + ], + [ + "LOGIC_OUTS13", + "INT_INTERFACE_LOGIC_OUTS13" + ], + [ + "LOGIC_OUTS14", + "INT_INTERFACE_LOGIC_OUTS14" + ], + [ + "LOGIC_OUTS15", + "INT_INTERFACE_LOGIC_OUTS15" + ], + [ + "LOGIC_OUTS16", + "INT_INTERFACE_LOGIC_OUTS16" + ], + [ + "LOGIC_OUTS17", + "INT_INTERFACE_LOGIC_OUTS17" + ], + [ + "LOGIC_OUTS18", + "INT_INTERFACE_LOGIC_OUTS18" + ], + [ + "LOGIC_OUTS19", + "INT_INTERFACE_LOGIC_OUTS19" + ], + [ + "LOGIC_OUTS20", + "INT_INTERFACE_LOGIC_OUTS20" + ], + [ + "LOGIC_OUTS21", + "INT_INTERFACE_LOGIC_OUTS21" + ], + [ + "LOGIC_OUTS22", + "INT_INTERFACE_LOGIC_OUTS22" + ], + [ + "LOGIC_OUTS23", + "INT_INTERFACE_LOGIC_OUTS23" + ], + [ + "MONITOR_N", + "INT_INTERFACE_MONITOR_N" + ], + [ + "MONITOR_P", + "INT_INTERFACE_MONITOR_P" + ], + [ + "NE2A0", + "INT_INTERFACE_NE2A0" + ], + [ + "NE2A1", + "INT_INTERFACE_NE2A1" + ], + [ + "NE2A2", + "INT_INTERFACE_NE2A2" + ], + [ + "NE2A3", + "INT_INTERFACE_NE2A3" + ], + [ + "NE6BEG0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "NE6BEG1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "NE6BEG2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "NE6BEG3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "NE6E0", + "INT_INTERFACE_NE4C0" + ], + [ + "NE6E1", + "INT_INTERFACE_NE4C1" + ], + [ + "NE6E2", + "INT_INTERFACE_NE4C2" + ], + [ + "NE6E3", + "INT_INTERFACE_NE4C3" + ], + [ + "NW2END0", + "INT_INTERFACE_NW2A0" + ], + [ + "NW2END1", + "INT_INTERFACE_NW2A1" + ], + [ + "NW2END2", + "INT_INTERFACE_NW2A2" + ], + [ + "NW2END3", + "INT_INTERFACE_NW2A3" + ], + [ + "NW6A0", + "INT_INTERFACE_NW4A0" + ], + [ + "NW6A1", + "INT_INTERFACE_NW4A1" + ], + [ + "NW6A2", + "INT_INTERFACE_NW4A2" + ], + [ + "NW6A3", + "INT_INTERFACE_NW4A3" + ], + [ + "NW6END0", + "INT_INTERFACE_NW4END0" + ], + [ + "NW6END1", + "INT_INTERFACE_NW4END1" + ], + [ + "NW6END2", + "INT_INTERFACE_NW4END2" + ], + [ + "NW6END3", + "INT_INTERFACE_NW4END3" + ], + [ + "SE2A0", + "INT_INTERFACE_SE2A0" + ], + [ + "SE2A1", + "INT_INTERFACE_SE2A1" + ], + [ + "SE2A2", + "INT_INTERFACE_SE2A2" + ], + [ + "SE2A3", + "INT_INTERFACE_SE2A3" + ], + [ + "SE6BEG0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "SE6BEG1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "SE6BEG2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "SE6BEG3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "SE6E0", + "INT_INTERFACE_SE4C0" + ], + [ + "SE6E1", + "INT_INTERFACE_SE4C1" + ], + [ + "SE6E2", + "INT_INTERFACE_SE4C2" + ], + [ + "SE6E3", + "INT_INTERFACE_SE4C3" + ], + [ + "SW2END0", + "INT_INTERFACE_SW2A0" + ], + [ + "SW2END1", + "INT_INTERFACE_SW2A1" + ], + [ + "SW2END2", + "INT_INTERFACE_SW2A2" + ], + [ + "SW2END3", + "INT_INTERFACE_SW2A3" + ], + [ + "SW6A0", + "INT_INTERFACE_SW4A0" + ], + [ + "SW6A1", + "INT_INTERFACE_SW4A1" + ], + [ + "SW6A2", + "INT_INTERFACE_SW4A2" + ], + [ + "SW6A3", + "INT_INTERFACE_SW4A3" + ], + [ + "SW6END0", + "INT_INTERFACE_SW4END0" + ], + [ + "SW6END1", + "INT_INTERFACE_SW4END1" + ], + [ + "SW6END2", + "INT_INTERFACE_SW4END2" + ], + [ + "SW6END3", + "INT_INTERFACE_SW4END3" + ], + [ + "WL1END0", + "INT_INTERFACE_WL1END0" + ], + [ + "WL1END1", + "INT_INTERFACE_WL1END1" + ], + [ + "WL1END2", + "INT_INTERFACE_WL1END2" + ], + [ + "WL1END3", + "INT_INTERFACE_WL1END3" + ], + [ + "WR1END0", + "INT_INTERFACE_WR1END0" + ], + [ + "WR1END1", + "INT_INTERFACE_WR1END1" + ], + [ + "WR1END2", + "INT_INTERFACE_WR1END2" + ], + [ + "WR1END3", + "INT_INTERFACE_WR1END3" + ], + [ + "WW2A0", + "INT_INTERFACE_WW2A0" + ], + [ + "WW2A1", + "INT_INTERFACE_WW2A1" + ], + [ + "WW2A2", + "INT_INTERFACE_WW2A2" + ], + [ + "WW2A3", + "INT_INTERFACE_WW2A3" + ], + [ + "WW2END0", + "INT_INTERFACE_WW2END0" + ], + [ + "WW2END1", + "INT_INTERFACE_WW2END1" + ], + [ + "WW2END2", + "INT_INTERFACE_WW2END2" + ], + [ + "WW2END3", + "INT_INTERFACE_WW2END3" + ], + [ + "WW4A0", + "INT_INTERFACE_WW4A0" + ], + [ + "WW4A1", + "INT_INTERFACE_WW4A1" + ], + [ + "WW4A2", + "INT_INTERFACE_WW4A2" + ], + [ + "WW4A3", + "INT_INTERFACE_WW4A3" + ], + [ + "WW4B0", + "INT_INTERFACE_WW4B0" + ], + [ + "WW4B1", + "INT_INTERFACE_WW4B1" + ], + [ + "WW4B2", + "INT_INTERFACE_WW4B2" + ], + [ + "WW4B3", + "INT_INTERFACE_WW4B3" + ], + [ + "WW4C0", + "INT_INTERFACE_WW4C0" + ], + [ + "WW4C1", + "INT_INTERFACE_WW4C1" + ], + [ + "WW4C2", + "INT_INTERFACE_WW4C2" + ], + [ + "WW4C3", + "INT_INTERFACE_WW4C3" + ], + [ + "WW4END0", + "INT_INTERFACE_WW4END0" + ], + [ + "WW4END1", + "INT_INTERFACE_WW4END1" + ], + [ + "WW4END2", + "INT_INTERFACE_WW4END2" + ], + [ + "WW4END3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -1 + ], + "tile_types": [ + "INT_R", + "T_TERM_INT" + ], + "wire_pairs": [ + [ + "BYP_BOUNCE2", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6" + ], + [ + "BYP_BOUNCE3", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2" + ], + [ + "BYP_BOUNCE6", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4" + ], + [ + "BYP_BOUNCE7", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0" + ], + [ + "EL1BEG3", + "T_TERM_UTURN_INT_ER1BEG_S0" + ], + [ + "EL1END_S3_0", + "T_TERM_UTURN_INT_ER1END3" + ], + [ + "ER1BEG_S0", + "T_TERM_UTURN_INT_ER1BEG_S0" + ], + [ + "ER1END3", + "T_TERM_UTURN_INT_ER1END3" + ], + [ + "FAN_BOUNCE_S3_0", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_0" + ], + [ + "FAN_BOUNCE_S3_2", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_2" + ], + [ + "FAN_BOUNCE_S3_4", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_4" + ], + [ + "FAN_BOUNCE_S3_6", + "T_TERM_UTURN_INT_FAN_BOUNCE_S3_6" + ], + [ + "LV0", + "T_TERM_INT_UTURN_LV_R17" + ], + [ + "LV1", + "T_TERM_INT_UTURN_LV_R16" + ], + [ + "LV2", + "T_TERM_INT_UTURN_LV_R2" + ], + [ + "LV3", + "T_TERM_INT_UTURN_LV_R3" + ], + [ + "LV4", + "T_TERM_INT_UTURN_LV_R4" + ], + [ + "LV5", + "T_TERM_INT_UTURN_LV_R5" + ], + [ + "LV6", + "T_TERM_INT_UTURN_LV_R6" + ], + [ + "LV7", + "T_TERM_INT_UTURN_LV_R7" + ], + [ + "LV8", + "T_TERM_INT_UTURN_LV_R9" + ], + [ + "LV9", + "T_TERM_INT_UTURN_LV_R9" + ], + [ + "LV10", + "T_TERM_INT_UTURN_LV_R7" + ], + [ + "LV11", + "T_TERM_INT_UTURN_LV_R6" + ], + [ + "LV12", + "T_TERM_INT_UTURN_LV_R5" + ], + [ + "LV13", + "T_TERM_INT_UTURN_LV_R4" + ], + [ + "LV14", + "T_TERM_INT_UTURN_LV_R3" + ], + [ + "LV15", + "T_TERM_INT_UTURN_LV_R2" + ], + [ + "LV16", + "T_TERM_INT_UTURN_LV_R16" + ], + [ + "LV17", + "T_TERM_INT_UTURN_LV_R17" + ], + [ + "LVB0", + "T_TERM_UTURN_INT_LVB0" + ], + [ + "LVB1", + "T_TERM_UTURN_INT_LVB1" + ], + [ + "LVB2", + "T_TERM_UTURN_INT_LVB2" + ], + [ + "LVB3", + "T_TERM_UTURN_INT_LVB3" + ], + [ + "LVB4", + "T_TERM_UTURN_INT_LVB4" + ], + [ + "LVB5", + "T_TERM_UTURN_INT_LVB5" + ], + [ + "LVB6", + "T_TERM_UTURN_INT_LVB5" + ], + [ + "LVB7", + "T_TERM_UTURN_INT_LVB4" + ], + [ + "LVB8", + "T_TERM_UTURN_INT_LVB3" + ], + [ + "LVB9", + "T_TERM_UTURN_INT_LVB2" + ], + [ + "LVB10", + "T_TERM_UTURN_INT_LVB1" + ], + [ + "LVB11", + "T_TERM_UTURN_INT_LVB0" + ], + [ + "NE2BEG0", + "T_TERM_UTURN_INT_SE2A3" + ], + [ + "NE2BEG1", + "T_TERM_UTURN_INT_SE2A2" + ], + [ + "NE2BEG2", + "T_TERM_UTURN_INT_SE2A1" + ], + [ + "NE2BEG3", + "T_TERM_UTURN_INT_SE2A0" + ], + [ + "NE6A0", + "T_TERM_UTURN_INT_SE6B3" + ], + [ + "NE6A1", + "T_TERM_UTURN_INT_SE6B2" + ], + [ + "NE6A2", + "T_TERM_UTURN_INT_SE6B1" + ], + [ + "NE6A3", + "T_TERM_UTURN_INT_SE6B0" + ], + [ + "NE6B0", + "T_TERM_UTURN_INT_SE6C3" + ], + [ + "NE6B1", + "T_TERM_UTURN_INT_SE6C2" + ], + [ + "NE6B2", + "T_TERM_UTURN_INT_SE6C1" + ], + [ + "NE6B3", + "T_TERM_UTURN_INT_SE6C0" + ], + [ + "NE6C0", + "T_TERM_UTURN_INT_SE6D3" + ], + [ + "NE6C1", + "T_TERM_UTURN_INT_SE6D2" + ], + [ + "NE6C2", + "T_TERM_UTURN_INT_SE6D1" + ], + [ + "NE6C3", + "T_TERM_UTURN_INT_SE6D0" + ], + [ + "NE6D0", + "T_TERM_UTURN_INT_SE6E3" + ], + [ + "NE6D1", + "T_TERM_UTURN_INT_SE6E2" + ], + [ + "NE6D2", + "T_TERM_UTURN_INT_SE6E1" + ], + [ + "NE6D3", + "T_TERM_UTURN_INT_SE6E0" + ], + [ + "NL1BEG0", + "T_TERM_UTURN_INT_SR1END3" + ], + [ + "NL1BEG1", + "T_TERM_UTURN_INT_SR1END2" + ], + [ + "NL1BEG2", + "T_TERM_UTURN_INT_SR1END1" + ], + [ + "NN2A0", + "T_TERM_UTURN_INT_SS2END3" + ], + [ + "NN2A1", + "T_TERM_UTURN_INT_SS2END2" + ], + [ + "NN2A2", + "T_TERM_UTURN_INT_SS2END1" + ], + [ + "NN2A3", + "T_TERM_UTURN_INT_SS2END0" + ], + [ + "NN2BEG0", + "T_TERM_UTURN_INT_SS2A3" + ], + [ + "NN2BEG1", + "T_TERM_UTURN_INT_SS2A2" + ], + [ + "NN2BEG2", + "T_TERM_UTURN_INT_SS2A1" + ], + [ + "NN2BEG3", + "T_TERM_UTURN_INT_SS2A0" + ], + [ + "NN6A0", + "T_TERM_UTURN_INT_SS6B3" + ], + [ + "NN6A1", + "T_TERM_UTURN_INT_SS6B2" + ], + [ + "NN6A2", + "T_TERM_UTURN_INT_SS6B1" + ], + [ + "NN6A3", + "T_TERM_UTURN_INT_SS6B0" + ], + [ + "NN6B0", + "T_TERM_UTURN_INT_SS6C3" + ], + [ + "NN6B1", + "T_TERM_UTURN_INT_SS6C2" + ], + [ + "NN6B2", + "T_TERM_UTURN_INT_SS6C1" + ], + [ + "NN6B3", + "T_TERM_UTURN_INT_SS6C0" + ], + [ + "NN6BEG0", + "T_TERM_UTURN_INT_SS6A3" + ], + [ + "NN6BEG1", + "T_TERM_UTURN_INT_SS6A2" + ], + [ + "NN6BEG2", + "T_TERM_UTURN_INT_SS6A1" + ], + [ + "NN6BEG3", + "T_TERM_UTURN_INT_SS6A0" + ], + [ + "NN6C0", + "T_TERM_UTURN_INT_SS6D3" + ], + [ + "NN6C1", + "T_TERM_UTURN_INT_SS6D2" + ], + [ + "NN6C2", + "T_TERM_UTURN_INT_SS6D1" + ], + [ + "NN6C3", + "T_TERM_UTURN_INT_SS6D0" + ], + [ + "NN6D0", + "T_TERM_UTURN_INT_SS6E3" + ], + [ + "NN6D1", + "T_TERM_UTURN_INT_SS6E2" + ], + [ + "NN6D2", + "T_TERM_UTURN_INT_SS6E1" + ], + [ + "NN6D3", + "T_TERM_UTURN_INT_SS6E0" + ], + [ + "NN6E0", + "T_TERM_UTURN_INT_SS6END3" + ], + [ + "NN6E1", + "T_TERM_UTURN_INT_SS6END2" + ], + [ + "NN6E2", + "T_TERM_UTURN_INT_SS6END1" + ], + [ + "NN6E3", + "T_TERM_UTURN_INT_SS6END0" + ], + [ + "NR1BEG0", + "T_TERM_UTURN_INT_SL1END3" + ], + [ + "NR1BEG1", + "T_TERM_UTURN_INT_SL1END2" + ], + [ + "NR1BEG2", + "T_TERM_UTURN_INT_SL1END1" + ], + [ + "NR1BEG3", + "T_TERM_UTURN_INT_SL1END0" + ], + [ + "NW2BEG0", + "T_TERM_UTURN_INT_SW2A3" + ], + [ + "NW2BEG1", + "T_TERM_UTURN_INT_SW2A2" + ], + [ + "NW2BEG2", + "T_TERM_UTURN_INT_SW2A1" + ], + [ + "NW2BEG3", + "T_TERM_UTURN_INT_SW2A0" + ], + [ + "NW6A0", + "T_TERM_UTURN_INT_SW6B3" + ], + [ + "NW6A1", + "T_TERM_UTURN_INT_SW6B2" + ], + [ + "NW6A2", + "T_TERM_UTURN_INT_SW6B1" + ], + [ + "NW6A3", + "T_TERM_UTURN_INT_SW6B0" + ], + [ + "NW6B0", + "T_TERM_UTURN_INT_SW6C3" + ], + [ + "NW6B1", + "T_TERM_UTURN_INT_SW6C2" + ], + [ + "NW6B2", + "T_TERM_UTURN_INT_SW6C1" + ], + [ + "NW6B3", + "T_TERM_UTURN_INT_SW6C0" + ], + [ + "NW6C0", + "T_TERM_UTURN_INT_SW6D3" + ], + [ + "NW6C1", + "T_TERM_UTURN_INT_SW6D2" + ], + [ + "NW6C2", + "T_TERM_UTURN_INT_SW6D1" + ], + [ + "NW6C3", + "T_TERM_UTURN_INT_SW6D0" + ], + [ + "NW6D0", + "T_TERM_UTURN_INT_SW6E3" + ], + [ + "NW6D1", + "T_TERM_UTURN_INT_SW6E2" + ], + [ + "NW6D2", + "T_TERM_UTURN_INT_SW6E1" + ], + [ + "NW6D3", + "T_TERM_UTURN_INT_SW6E0" + ], + [ + "SE2A0", + "T_TERM_UTURN_INT_SE2A0" + ], + [ + "SE2A1", + "T_TERM_UTURN_INT_SE2A1" + ], + [ + "SE2A2", + "T_TERM_UTURN_INT_SE2A2" + ], + [ + "SE2A3", + "T_TERM_UTURN_INT_SE2A3" + ], + [ + "SE6B0", + "T_TERM_UTURN_INT_SE6B0" + ], + [ + "SE6B1", + "T_TERM_UTURN_INT_SE6B1" + ], + [ + "SE6B2", + "T_TERM_UTURN_INT_SE6B2" + ], + [ + "SE6B3", + "T_TERM_UTURN_INT_SE6B3" + ], + [ + "SE6C0", + "T_TERM_UTURN_INT_SE6C0" + ], + [ + "SE6C1", + "T_TERM_UTURN_INT_SE6C1" + ], + [ + "SE6C2", + "T_TERM_UTURN_INT_SE6C2" + ], + [ + "SE6C3", + "T_TERM_UTURN_INT_SE6C3" + ], + [ + "SE6D0", + "T_TERM_UTURN_INT_SE6D0" + ], + [ + "SE6D1", + "T_TERM_UTURN_INT_SE6D1" + ], + [ + "SE6D2", + "T_TERM_UTURN_INT_SE6D2" + ], + [ + "SE6D3", + "T_TERM_UTURN_INT_SE6D3" + ], + [ + "SE6E0", + "T_TERM_UTURN_INT_SE6E0" + ], + [ + "SE6E1", + "T_TERM_UTURN_INT_SE6E1" + ], + [ + "SE6E2", + "T_TERM_UTURN_INT_SE6E2" + ], + [ + "SE6E3", + "T_TERM_UTURN_INT_SE6E3" + ], + [ + "SL1END0", + "T_TERM_UTURN_INT_SL1END0" + ], + [ + "SL1END1", + "T_TERM_UTURN_INT_SL1END1" + ], + [ + "SL1END2", + "T_TERM_UTURN_INT_SL1END2" + ], + [ + "SL1END3", + "T_TERM_UTURN_INT_SL1END3" + ], + [ + "SR1END1", + "T_TERM_UTURN_INT_SR1END1" + ], + [ + "SR1END2", + "T_TERM_UTURN_INT_SR1END2" + ], + [ + "SR1END3", + "T_TERM_UTURN_INT_SR1END3" + ], + [ + "SS2A0", + "T_TERM_UTURN_INT_SS2A0" + ], + [ + "SS2A1", + "T_TERM_UTURN_INT_SS2A1" + ], + [ + "SS2A2", + "T_TERM_UTURN_INT_SS2A2" + ], + [ + "SS2A3", + "T_TERM_UTURN_INT_SS2A3" + ], + [ + "SS2END0", + "T_TERM_UTURN_INT_SS2END0" + ], + [ + "SS2END1", + "T_TERM_UTURN_INT_SS2END1" + ], + [ + "SS2END2", + "T_TERM_UTURN_INT_SS2END2" + ], + [ + "SS2END3", + "T_TERM_UTURN_INT_SS2END3" + ], + [ + "SS6A0", + "T_TERM_UTURN_INT_SS6A0" + ], + [ + "SS6A1", + "T_TERM_UTURN_INT_SS6A1" + ], + [ + "SS6A2", + "T_TERM_UTURN_INT_SS6A2" + ], + [ + "SS6A3", + "T_TERM_UTURN_INT_SS6A3" + ], + [ + "SS6B0", + "T_TERM_UTURN_INT_SS6B0" + ], + [ + "SS6B1", + "T_TERM_UTURN_INT_SS6B1" + ], + [ + "SS6B2", + "T_TERM_UTURN_INT_SS6B2" + ], + [ + "SS6B3", + "T_TERM_UTURN_INT_SS6B3" + ], + [ + "SS6C0", + "T_TERM_UTURN_INT_SS6C0" + ], + [ + "SS6C1", + "T_TERM_UTURN_INT_SS6C1" + ], + [ + "SS6C2", + "T_TERM_UTURN_INT_SS6C2" + ], + [ + "SS6C3", + "T_TERM_UTURN_INT_SS6C3" + ], + [ + "SS6D0", + "T_TERM_UTURN_INT_SS6D0" + ], + [ + "SS6D1", + "T_TERM_UTURN_INT_SS6D1" + ], + [ + "SS6D2", + "T_TERM_UTURN_INT_SS6D2" + ], + [ + "SS6D3", + "T_TERM_UTURN_INT_SS6D3" + ], + [ + "SS6E0", + "T_TERM_UTURN_INT_SS6E0" + ], + [ + "SS6E1", + "T_TERM_UTURN_INT_SS6E1" + ], + [ + "SS6E2", + "T_TERM_UTURN_INT_SS6E2" + ], + [ + "SS6E3", + "T_TERM_UTURN_INT_SS6E3" + ], + [ + "SS6END0", + "T_TERM_UTURN_INT_SS6END0" + ], + [ + "SS6END1", + "T_TERM_UTURN_INT_SS6END1" + ], + [ + "SS6END2", + "T_TERM_UTURN_INT_SS6END2" + ], + [ + "SS6END3", + "T_TERM_UTURN_INT_SS6END3" + ], + [ + "SW2A0", + "T_TERM_UTURN_INT_SW2A0" + ], + [ + "SW2A1", + "T_TERM_UTURN_INT_SW2A1" + ], + [ + "SW2A2", + "T_TERM_UTURN_INT_SW2A2" + ], + [ + "SW2A3", + "T_TERM_UTURN_INT_SW2A3" + ], + [ + "SW6B0", + "T_TERM_UTURN_INT_SW6B0" + ], + [ + "SW6B1", + "T_TERM_UTURN_INT_SW6B1" + ], + [ + "SW6B2", + "T_TERM_UTURN_INT_SW6B2" + ], + [ + "SW6B3", + "T_TERM_UTURN_INT_SW6B3" + ], + [ + "SW6C0", + "T_TERM_UTURN_INT_SW6C0" + ], + [ + "SW6C1", + "T_TERM_UTURN_INT_SW6C1" + ], + [ + "SW6C2", + "T_TERM_UTURN_INT_SW6C2" + ], + [ + "SW6C3", + "T_TERM_UTURN_INT_SW6C3" + ], + [ + "SW6D0", + "T_TERM_UTURN_INT_SW6D0" + ], + [ + "SW6D1", + "T_TERM_UTURN_INT_SW6D1" + ], + [ + "SW6D2", + "T_TERM_UTURN_INT_SW6D2" + ], + [ + "SW6D3", + "T_TERM_UTURN_INT_SW6D3" + ], + [ + "SW6E0", + "T_TERM_UTURN_INT_SW6E0" + ], + [ + "SW6E1", + "T_TERM_UTURN_INT_SW6E1" + ], + [ + "SW6E2", + "T_TERM_UTURN_INT_SW6E2" + ], + [ + "SW6E3", + "T_TERM_UTURN_INT_SW6E3" + ], + [ + "WL1BEG3", + "T_TERM_UTURN_INT_WR1BEG_S0" + ], + [ + "WL1END3", + "T_TERM_UTURN_INT_WR1END_S1_0" + ], + [ + "WR1BEG_S0", + "T_TERM_UTURN_INT_WR1BEG_S0" + ], + [ + "WR1END_S1_0", + "T_TERM_UTURN_INT_WR1END_S1_0" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "IO_INT_INTERFACE_L", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BLOCK_OUTS_L_B0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "INT_INTERFACE_BLOCK_OUTS_L_B2", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "INT_INTERFACE_BYP0", + "TERM_INT_BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "TERM_INT_BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "TERM_INT_BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "TERM_INT_BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "TERM_INT_BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "TERM_INT_BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "TERM_INT_BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "TERM_INT_BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "TERM_INT_CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "TERM_INT_CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "TERM_INT_CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "TERM_INT_CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "L_TERM_INT_WW2A0" + ], + [ + "INT_INTERFACE_EE2A1", + "L_TERM_INT_WW2A1" + ], + [ + "INT_INTERFACE_EE2A2", + "L_TERM_INT_WW2A2" + ], + [ + "INT_INTERFACE_EE2A3", + "L_TERM_INT_WW2A3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "L_TERM_INT_WW2BEG0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "L_TERM_INT_WW2BEG1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "L_TERM_INT_WW2BEG2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "L_TERM_INT_WW2BEG3" + ], + [ + "INT_INTERFACE_EE4A0", + "L_TERM_INT_WW4A0" + ], + [ + "INT_INTERFACE_EE4A1", + "L_TERM_INT_WW4A1" + ], + [ + "INT_INTERFACE_EE4A2", + "L_TERM_INT_WW4A2" + ], + [ + "INT_INTERFACE_EE4A3", + "L_TERM_INT_WW4A3" + ], + [ + "INT_INTERFACE_EE4B0", + "L_TERM_INT_WW4B0" + ], + [ + "INT_INTERFACE_EE4B1", + "L_TERM_INT_WW4B1" + ], + [ + "INT_INTERFACE_EE4B2", + "L_TERM_INT_WW4B2" + ], + [ + "INT_INTERFACE_EE4B3", + "L_TERM_INT_WW4B3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "L_TERM_INT_WW4BEG0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "L_TERM_INT_WW4BEG1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "L_TERM_INT_WW4BEG2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "L_TERM_INT_WW4BEG3" + ], + [ + "INT_INTERFACE_EE4C0", + "L_TERM_INT_WW4C0" + ], + [ + "INT_INTERFACE_EE4C1", + "L_TERM_INT_WW4C1" + ], + [ + "INT_INTERFACE_EE4C2", + "L_TERM_INT_WW4C2" + ], + [ + "INT_INTERFACE_EE4C3", + "L_TERM_INT_WW4C3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "L_TERM_INT_WL1BEG0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "L_TERM_INT_WL1BEG1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "L_TERM_INT_WL1BEG2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "L_TERM_INT_WR1BEG2" + ], + [ + "INT_INTERFACE_ER1BEG0", + "L_TERM_INT_WR1BEG0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "L_TERM_INT_WR1BEG1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "L_TERM_INT_WR1BEG3" + ], + [ + "INT_INTERFACE_ER1BEG3", + "L_TERM_INT_WL1BEG3" + ], + [ + "INT_INTERFACE_FAN0", + "TERM_INT_FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "TERM_INT_FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "TERM_INT_FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "TERM_INT_FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "TERM_INT_FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "TERM_INT_FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "TERM_INT_FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "TERM_INT_FAN7" + ], + [ + "INT_INTERFACE_IMUX0", + "TERM_INT_IMUX0" + ], + [ + "INT_INTERFACE_IMUX1", + "TERM_INT_IMUX1" + ], + [ + "INT_INTERFACE_IMUX2", + "TERM_INT_IMUX2" + ], + [ + "INT_INTERFACE_IMUX3", + "TERM_INT_IMUX3" + ], + [ + "INT_INTERFACE_IMUX4", + "TERM_INT_IMUX4" + ], + [ + "INT_INTERFACE_IMUX5", + "TERM_INT_IMUX5" + ], + [ + "INT_INTERFACE_IMUX6", + "TERM_INT_IMUX6" + ], + [ + "INT_INTERFACE_IMUX7", + "TERM_INT_IMUX7" + ], + [ + "INT_INTERFACE_IMUX8", + "TERM_INT_IMUX8" + ], + [ + "INT_INTERFACE_IMUX9", + "TERM_INT_IMUX9" + ], + [ + "INT_INTERFACE_IMUX10", + "TERM_INT_IMUX10" + ], + [ + "INT_INTERFACE_IMUX11", + "TERM_INT_IMUX11" + ], + [ + "INT_INTERFACE_IMUX12", + "TERM_INT_IMUX12" + ], + [ + "INT_INTERFACE_IMUX13", + "TERM_INT_IMUX13" + ], + [ + "INT_INTERFACE_IMUX14", + "TERM_INT_IMUX14" + ], + [ + "INT_INTERFACE_IMUX15", + "TERM_INT_IMUX15" + ], + [ + "INT_INTERFACE_IMUX16", + "TERM_INT_IMUX16" + ], + [ + "INT_INTERFACE_IMUX17", + "TERM_INT_IMUX17" + ], + [ + "INT_INTERFACE_IMUX18", + "TERM_INT_IMUX18" + ], + [ + "INT_INTERFACE_IMUX19", + "TERM_INT_IMUX19" + ], + [ + "INT_INTERFACE_IMUX20", + "TERM_INT_IMUX20" + ], + [ + "INT_INTERFACE_IMUX21", + "TERM_INT_IMUX21" + ], + [ + "INT_INTERFACE_IMUX22", + "TERM_INT_IMUX22" + ], + [ + "INT_INTERFACE_IMUX23", + "TERM_INT_IMUX23" + ], + [ + "INT_INTERFACE_IMUX24", + "TERM_INT_IMUX24" + ], + [ + "INT_INTERFACE_IMUX25", + "TERM_INT_IMUX25" + ], + [ + "INT_INTERFACE_IMUX26", + "TERM_INT_IMUX26" + ], + [ + "INT_INTERFACE_IMUX27", + "TERM_INT_IMUX27" + ], + [ + "INT_INTERFACE_IMUX28", + "TERM_INT_IMUX28" + ], + [ + "INT_INTERFACE_IMUX29", + "TERM_INT_IMUX29" + ], + [ + "INT_INTERFACE_IMUX30", + "TERM_INT_IMUX30" + ], + [ + "INT_INTERFACE_IMUX31", + "TERM_INT_IMUX31" + ], + [ + "INT_INTERFACE_IMUX32", + "TERM_INT_IMUX32" + ], + [ + "INT_INTERFACE_IMUX33", + "TERM_INT_IMUX33" + ], + [ + "INT_INTERFACE_IMUX34", + "TERM_INT_IMUX34" + ], + [ + "INT_INTERFACE_IMUX35", + "TERM_INT_IMUX35" + ], + [ + "INT_INTERFACE_IMUX36", + "TERM_INT_IMUX36" + ], + [ + "INT_INTERFACE_IMUX37", + "TERM_INT_IMUX37" + ], + [ + "INT_INTERFACE_IMUX38", + "TERM_INT_IMUX38" + ], + [ + "INT_INTERFACE_IMUX39", + "TERM_INT_IMUX39" + ], + [ + "INT_INTERFACE_IMUX40", + "TERM_INT_IMUX40" + ], + [ + "INT_INTERFACE_IMUX41", + "TERM_INT_IMUX41" + ], + [ + "INT_INTERFACE_IMUX42", + "TERM_INT_IMUX42" + ], + [ + "INT_INTERFACE_IMUX43", + "TERM_INT_IMUX43" + ], + [ + "INT_INTERFACE_IMUX44", + "TERM_INT_IMUX44" + ], + [ + "INT_INTERFACE_IMUX45", + "TERM_INT_IMUX45" + ], + [ + "INT_INTERFACE_IMUX46", + "TERM_INT_IMUX46" + ], + [ + "INT_INTERFACE_IMUX47", + "TERM_INT_IMUX47" + ], + [ + "INT_INTERFACE_LH1", + "L_TERM_INT_LH0" + ], + [ + "INT_INTERFACE_LH2", + "L_TERM_INT_LH1" + ], + [ + "INT_INTERFACE_LH3", + "L_TERM_INT_LH2" + ], + [ + "INT_INTERFACE_LH4", + "L_TERM_INT_LH3" + ], + [ + "INT_INTERFACE_LH5", + "L_TERM_INT_LH4" + ], + [ + "INT_INTERFACE_LH6", + "L_TERM_INT_LH5" + ], + [ + "INT_INTERFACE_LH7", + "L_TERM_INT_LH5" + ], + [ + "INT_INTERFACE_LH8", + "L_TERM_INT_LH4" + ], + [ + "INT_INTERFACE_LH9", + "L_TERM_INT_LH3" + ], + [ + "INT_INTERFACE_LH10", + "L_TERM_INT_LH2" + ], + [ + "INT_INTERFACE_LH11", + "L_TERM_INT_LH1" + ], + [ + "INT_INTERFACE_LH12", + "L_TERM_INT_LH0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "TERM_INT_LOGIC_OUTS_L_B13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "TERM_INT_LOGIC_OUTS_L_B16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "TERM_INT_LOGIC_OUTS_L_B22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "L_TERM_INT_NW2BEG0" + ], + [ + "INT_INTERFACE_NE2A1", + "L_TERM_INT_NW2BEG1" + ], + [ + "INT_INTERFACE_NE2A2", + "L_TERM_INT_NW2BEG2" + ], + [ + "INT_INTERFACE_NE2A3", + "L_TERM_INT_NW2BEG3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "L_TERM_INT_NW4BEG0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "L_TERM_INT_NW4BEG1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "L_TERM_INT_NW4BEG2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "L_TERM_INT_NW4BEG3" + ], + [ + "INT_INTERFACE_NE4C0", + "L_TERM_INT_NW4C0" + ], + [ + "INT_INTERFACE_NE4C1", + "L_TERM_INT_NW4C1" + ], + [ + "INT_INTERFACE_NE4C2", + "L_TERM_INT_NW4C2" + ], + [ + "INT_INTERFACE_NE4C3", + "L_TERM_INT_NW4C3" + ], + [ + "INT_INTERFACE_NW2A0", + "L_TERM_INT_NW2BEG0" + ], + [ + "INT_INTERFACE_NW2A1", + "L_TERM_INT_NW2BEG1" + ], + [ + "INT_INTERFACE_NW2A2", + "L_TERM_INT_NW2BEG2" + ], + [ + "INT_INTERFACE_NW2A3", + "L_TERM_INT_NW2BEG3" + ], + [ + "INT_INTERFACE_NW4A0", + "L_TERM_INT_NW4BEG0" + ], + [ + "INT_INTERFACE_NW4A1", + "L_TERM_INT_NW4BEG1" + ], + [ + "INT_INTERFACE_NW4A2", + "L_TERM_INT_NW4BEG2" + ], + [ + "INT_INTERFACE_NW4A3", + "L_TERM_INT_NW4BEG3" + ], + [ + "INT_INTERFACE_NW4END0", + "L_TERM_INT_NW4C0" + ], + [ + "INT_INTERFACE_NW4END1", + "L_TERM_INT_NW4C1" + ], + [ + "INT_INTERFACE_NW4END2", + "L_TERM_INT_NW4C2" + ], + [ + "INT_INTERFACE_NW4END3", + "L_TERM_INT_NW4C3" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90", + "L_TERM_INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "INT_INTERFACE_SE2A0", + "L_TERM_INT_SW2BEG0" + ], + [ + "INT_INTERFACE_SE2A1", + "L_TERM_INT_SW2BEG1" + ], + [ + "INT_INTERFACE_SE2A2", + "L_TERM_INT_SW2BEG2" + ], + [ + "INT_INTERFACE_SE2A3", + "L_TERM_INT_SW2BEG3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "L_TERM_INT_SW4BEG0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "L_TERM_INT_SW4BEG1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "L_TERM_INT_SW4BEG2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "L_TERM_INT_SW4BEG3" + ], + [ + "INT_INTERFACE_SE4C0", + "L_TERM_INT_SW4C0" + ], + [ + "INT_INTERFACE_SE4C1", + "L_TERM_INT_SW4C1" + ], + [ + "INT_INTERFACE_SE4C2", + "L_TERM_INT_SW4C2" + ], + [ + "INT_INTERFACE_SE4C3", + "L_TERM_INT_SW4C3" + ], + [ + "INT_INTERFACE_SW2A0", + "L_TERM_INT_SW2BEG0" + ], + [ + "INT_INTERFACE_SW2A1", + "L_TERM_INT_SW2BEG1" + ], + [ + "INT_INTERFACE_SW2A2", + "L_TERM_INT_SW2BEG2" + ], + [ + "INT_INTERFACE_SW2A3", + "L_TERM_INT_SW2BEG3" + ], + [ + "INT_INTERFACE_SW4A0", + "L_TERM_INT_SW4BEG0" + ], + [ + "INT_INTERFACE_SW4A1", + "L_TERM_INT_SW4BEG1" + ], + [ + "INT_INTERFACE_SW4A2", + "L_TERM_INT_SW4BEG2" + ], + [ + "INT_INTERFACE_SW4A3", + "L_TERM_INT_SW4BEG3" + ], + [ + "INT_INTERFACE_SW4END0", + "L_TERM_INT_SW4C0" + ], + [ + "INT_INTERFACE_SW4END1", + "L_TERM_INT_SW4C1" + ], + [ + "INT_INTERFACE_SW4END2", + "L_TERM_INT_SW4C2" + ], + [ + "INT_INTERFACE_SW4END3", + "L_TERM_INT_SW4C3" + ], + [ + "INT_INTERFACE_WL1END0", + "L_TERM_INT_WL1BEG0" + ], + [ + "INT_INTERFACE_WL1END1", + "L_TERM_INT_WL1BEG1" + ], + [ + "INT_INTERFACE_WL1END2", + "L_TERM_INT_WL1BEG2" + ], + [ + "INT_INTERFACE_WL1END3", + "L_TERM_INT_WR1BEG2" + ], + [ + "INT_INTERFACE_WR1END0", + "L_TERM_INT_WR1BEG0" + ], + [ + "INT_INTERFACE_WR1END1", + "L_TERM_INT_WR1BEG1" + ], + [ + "INT_INTERFACE_WR1END2", + "L_TERM_INT_WR1BEG3" + ], + [ + "INT_INTERFACE_WR1END3", + "L_TERM_INT_WL1BEG3" + ], + [ + "INT_INTERFACE_WW2A0", + "L_TERM_INT_WW2BEG0" + ], + [ + "INT_INTERFACE_WW2A1", + "L_TERM_INT_WW2BEG1" + ], + [ + "INT_INTERFACE_WW2A2", + "L_TERM_INT_WW2BEG2" + ], + [ + "INT_INTERFACE_WW2A3", + "L_TERM_INT_WW2BEG3" + ], + [ + "INT_INTERFACE_WW2END0", + "L_TERM_INT_WW2A0" + ], + [ + "INT_INTERFACE_WW2END1", + "L_TERM_INT_WW2A1" + ], + [ + "INT_INTERFACE_WW2END2", + "L_TERM_INT_WW2A2" + ], + [ + "INT_INTERFACE_WW2END3", + "L_TERM_INT_WW2A3" + ], + [ + "INT_INTERFACE_WW4A0", + "L_TERM_INT_WW4BEG0" + ], + [ + "INT_INTERFACE_WW4A1", + "L_TERM_INT_WW4BEG1" + ], + [ + "INT_INTERFACE_WW4A2", + "L_TERM_INT_WW4BEG2" + ], + [ + "INT_INTERFACE_WW4A3", + "L_TERM_INT_WW4BEG3" + ], + [ + "INT_INTERFACE_WW4B0", + "L_TERM_INT_WW4A0" + ], + [ + "INT_INTERFACE_WW4B1", + "L_TERM_INT_WW4A1" + ], + [ + "INT_INTERFACE_WW4B2", + "L_TERM_INT_WW4A2" + ], + [ + "INT_INTERFACE_WW4B3", + "L_TERM_INT_WW4A3" + ], + [ + "INT_INTERFACE_WW4C0", + "L_TERM_INT_WW4B0" + ], + [ + "INT_INTERFACE_WW4C1", + "L_TERM_INT_WW4B1" + ], + [ + "INT_INTERFACE_WW4C2", + "L_TERM_INT_WW4B2" + ], + [ + "INT_INTERFACE_WW4C3", + "L_TERM_INT_WW4B3" + ], + [ + "INT_INTERFACE_WW4END0", + "L_TERM_INT_WW4C0" + ], + [ + "INT_INTERFACE_WW4END1", + "L_TERM_INT_WW4C1" + ], + [ + "INT_INTERFACE_WW4END2", + "L_TERM_INT_WW4C2" + ], + [ + "INT_INTERFACE_WW4END3", + "L_TERM_INT_WW4C3" + ], + [ + "L_INT_INTER_DQS_IOTOPHASER", + "L_TERM_INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "IO_INT_INTERFACE_R", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BLOCK_OUTS_B0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "INT_INTERFACE_BLOCK_OUTS_B2", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "INT_INTERFACE_BYP0", + "TERM_INT_BYP0" + ], + [ + "INT_INTERFACE_BYP1", + "TERM_INT_BYP1" + ], + [ + "INT_INTERFACE_BYP2", + "TERM_INT_BYP2" + ], + [ + "INT_INTERFACE_BYP3", + "TERM_INT_BYP3" + ], + [ + "INT_INTERFACE_BYP4", + "TERM_INT_BYP4" + ], + [ + "INT_INTERFACE_BYP5", + "TERM_INT_BYP5" + ], + [ + "INT_INTERFACE_BYP6", + "TERM_INT_BYP6" + ], + [ + "INT_INTERFACE_BYP7", + "TERM_INT_BYP7" + ], + [ + "INT_INTERFACE_CLK0", + "TERM_INT_CLK0" + ], + [ + "INT_INTERFACE_CLK1", + "TERM_INT_CLK1" + ], + [ + "INT_INTERFACE_CTRL0", + "TERM_INT_CTRL0" + ], + [ + "INT_INTERFACE_CTRL1", + "TERM_INT_CTRL1" + ], + [ + "INT_INTERFACE_EE2A0", + "R_TERM_INT_WW2END0" + ], + [ + "INT_INTERFACE_EE2A1", + "R_TERM_INT_WW2END1" + ], + [ + "INT_INTERFACE_EE2A2", + "R_TERM_INT_WW2END2" + ], + [ + "INT_INTERFACE_EE2A3", + "R_TERM_INT_WW2END3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "R_TERM_INT_WW2A0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "R_TERM_INT_WW2A1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "R_TERM_INT_WW2A2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "R_TERM_INT_WW2A3" + ], + [ + "INT_INTERFACE_EE4A0", + "R_TERM_INT_WW4B0" + ], + [ + "INT_INTERFACE_EE4A1", + "R_TERM_INT_WW4B1" + ], + [ + "INT_INTERFACE_EE4A2", + "R_TERM_INT_WW4B2" + ], + [ + "INT_INTERFACE_EE4A3", + "R_TERM_INT_WW4B3" + ], + [ + "INT_INTERFACE_EE4B0", + "R_TERM_INT_WW4C0" + ], + [ + "INT_INTERFACE_EE4B1", + "R_TERM_INT_WW4C1" + ], + [ + "INT_INTERFACE_EE4B2", + "R_TERM_INT_WW4C2" + ], + [ + "INT_INTERFACE_EE4B3", + "R_TERM_INT_WW4C3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "R_TERM_INT_WW4A0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "R_TERM_INT_WW4A1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "R_TERM_INT_WW4A2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "R_TERM_INT_WW4A3" + ], + [ + "INT_INTERFACE_EE4C0", + "R_TERM_INT_WW4END0" + ], + [ + "INT_INTERFACE_EE4C1", + "R_TERM_INT_WW4END1" + ], + [ + "INT_INTERFACE_EE4C2", + "R_TERM_INT_WW4END2" + ], + [ + "INT_INTERFACE_EE4C3", + "R_TERM_INT_WW4END3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "R_TERM_INT_WL1END0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "R_TERM_INT_WL1END1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "R_TERM_INT_WL1END2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "R_TERM_INT_WL1END3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "R_TERM_INT_WR1END0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "R_TERM_INT_WR1END1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "R_TERM_INT_WR1END2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "R_TERM_INT_WR1END3" + ], + [ + "INT_INTERFACE_FAN0", + "TERM_INT_FAN0" + ], + [ + "INT_INTERFACE_FAN1", + "TERM_INT_FAN1" + ], + [ + "INT_INTERFACE_FAN2", + "TERM_INT_FAN2" + ], + [ + "INT_INTERFACE_FAN3", + "TERM_INT_FAN3" + ], + [ + "INT_INTERFACE_FAN4", + "TERM_INT_FAN4" + ], + [ + "INT_INTERFACE_FAN5", + "TERM_INT_FAN5" + ], + [ + "INT_INTERFACE_FAN6", + "TERM_INT_FAN6" + ], + [ + "INT_INTERFACE_FAN7", + "TERM_INT_FAN7" + ], + [ + "INT_INTERFACE_IMUX0", + "TERM_INT_IMUX0" + ], + [ + "INT_INTERFACE_IMUX1", + "TERM_INT_IMUX1" + ], + [ + "INT_INTERFACE_IMUX2", + "TERM_INT_IMUX2" + ], + [ + "INT_INTERFACE_IMUX3", + "TERM_INT_IMUX3" + ], + [ + "INT_INTERFACE_IMUX4", + "TERM_INT_IMUX4" + ], + [ + "INT_INTERFACE_IMUX5", + "TERM_INT_IMUX5" + ], + [ + "INT_INTERFACE_IMUX6", + "TERM_INT_IMUX6" + ], + [ + "INT_INTERFACE_IMUX7", + "TERM_INT_IMUX7" + ], + [ + "INT_INTERFACE_IMUX8", + "TERM_INT_IMUX8" + ], + [ + "INT_INTERFACE_IMUX9", + "TERM_INT_IMUX9" + ], + [ + "INT_INTERFACE_IMUX10", + "TERM_INT_IMUX10" + ], + [ + "INT_INTERFACE_IMUX11", + "TERM_INT_IMUX11" + ], + [ + "INT_INTERFACE_IMUX12", + "TERM_INT_IMUX12" + ], + [ + "INT_INTERFACE_IMUX13", + "TERM_INT_IMUX13" + ], + [ + "INT_INTERFACE_IMUX14", + "TERM_INT_IMUX14" + ], + [ + "INT_INTERFACE_IMUX15", + "TERM_INT_IMUX15" + ], + [ + "INT_INTERFACE_IMUX16", + "TERM_INT_IMUX16" + ], + [ + "INT_INTERFACE_IMUX17", + "TERM_INT_IMUX17" + ], + [ + "INT_INTERFACE_IMUX18", + "TERM_INT_IMUX18" + ], + [ + "INT_INTERFACE_IMUX19", + "TERM_INT_IMUX19" + ], + [ + "INT_INTERFACE_IMUX20", + "TERM_INT_IMUX20" + ], + [ + "INT_INTERFACE_IMUX21", + "TERM_INT_IMUX21" + ], + [ + "INT_INTERFACE_IMUX22", + "TERM_INT_IMUX22" + ], + [ + "INT_INTERFACE_IMUX23", + "TERM_INT_IMUX23" + ], + [ + "INT_INTERFACE_IMUX24", + "TERM_INT_IMUX24" + ], + [ + "INT_INTERFACE_IMUX25", + "TERM_INT_IMUX25" + ], + [ + "INT_INTERFACE_IMUX26", + "TERM_INT_IMUX26" + ], + [ + "INT_INTERFACE_IMUX27", + "TERM_INT_IMUX27" + ], + [ + "INT_INTERFACE_IMUX28", + "TERM_INT_IMUX28" + ], + [ + "INT_INTERFACE_IMUX29", + "TERM_INT_IMUX29" + ], + [ + "INT_INTERFACE_IMUX30", + "TERM_INT_IMUX30" + ], + [ + "INT_INTERFACE_IMUX31", + "TERM_INT_IMUX31" + ], + [ + "INT_INTERFACE_IMUX32", + "TERM_INT_IMUX32" + ], + [ + "INT_INTERFACE_IMUX33", + "TERM_INT_IMUX33" + ], + [ + "INT_INTERFACE_IMUX34", + "TERM_INT_IMUX34" + ], + [ + "INT_INTERFACE_IMUX35", + "TERM_INT_IMUX35" + ], + [ + "INT_INTERFACE_IMUX36", + "TERM_INT_IMUX36" + ], + [ + "INT_INTERFACE_IMUX37", + "TERM_INT_IMUX37" + ], + [ + "INT_INTERFACE_IMUX38", + "TERM_INT_IMUX38" + ], + [ + "INT_INTERFACE_IMUX39", + "TERM_INT_IMUX39" + ], + [ + "INT_INTERFACE_IMUX40", + "TERM_INT_IMUX40" + ], + [ + "INT_INTERFACE_IMUX41", + "TERM_INT_IMUX41" + ], + [ + "INT_INTERFACE_IMUX42", + "TERM_INT_IMUX42" + ], + [ + "INT_INTERFACE_IMUX43", + "TERM_INT_IMUX43" + ], + [ + "INT_INTERFACE_IMUX44", + "TERM_INT_IMUX44" + ], + [ + "INT_INTERFACE_IMUX45", + "TERM_INT_IMUX45" + ], + [ + "INT_INTERFACE_IMUX46", + "TERM_INT_IMUX46" + ], + [ + "INT_INTERFACE_IMUX47", + "TERM_INT_IMUX47" + ], + [ + "INT_INTERFACE_LH1", + "R_TERM_INT_LH0" + ], + [ + "INT_INTERFACE_LH2", + "R_TERM_INT_LH1" + ], + [ + "INT_INTERFACE_LH3", + "R_TERM_INT_LH2" + ], + [ + "INT_INTERFACE_LH4", + "R_TERM_INT_LH3" + ], + [ + "INT_INTERFACE_LH5", + "R_TERM_INT_LH4" + ], + [ + "INT_INTERFACE_LH6", + "R_TERM_INT_LH5" + ], + [ + "INT_INTERFACE_LH7", + "R_TERM_INT_LH5" + ], + [ + "INT_INTERFACE_LH8", + "R_TERM_INT_LH4" + ], + [ + "INT_INTERFACE_LH9", + "R_TERM_INT_LH3" + ], + [ + "INT_INTERFACE_LH10", + "R_TERM_INT_LH2" + ], + [ + "INT_INTERFACE_LH11", + "R_TERM_INT_LH1" + ], + [ + "INT_INTERFACE_LH12", + "R_TERM_INT_LH0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "TERM_INT_LOGIC_OUTS_L_B13" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "TERM_INT_LOGIC_OUTS_L_B16" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "TERM_INT_LOGIC_OUTS_L_B22" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "INT_INTERFACE_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "INT_INTERFACE_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "INT_INTERFACE_NE2A0", + "R_TERM_INT_NW2A0" + ], + [ + "INT_INTERFACE_NE2A1", + "R_TERM_INT_NW2A1" + ], + [ + "INT_INTERFACE_NE2A2", + "R_TERM_INT_NW2A2" + ], + [ + "INT_INTERFACE_NE2A3", + "R_TERM_INT_NW2A3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "R_TERM_INT_NW4A0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "R_TERM_INT_NW4A1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "R_TERM_INT_NW4A2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "R_TERM_INT_NW4A3" + ], + [ + "INT_INTERFACE_NE4C0", + "R_TERM_INT_NW4END0" + ], + [ + "INT_INTERFACE_NE4C1", + "R_TERM_INT_NW4END1" + ], + [ + "INT_INTERFACE_NE4C2", + "R_TERM_INT_NW4END2" + ], + [ + "INT_INTERFACE_NE4C3", + "R_TERM_INT_NW4END3" + ], + [ + "INT_INTERFACE_NW2A0", + "R_TERM_INT_NW2A0" + ], + [ + "INT_INTERFACE_NW2A1", + "R_TERM_INT_NW2A1" + ], + [ + "INT_INTERFACE_NW2A2", + "R_TERM_INT_NW2A2" + ], + [ + "INT_INTERFACE_NW2A3", + "R_TERM_INT_NW2A3" + ], + [ + "INT_INTERFACE_NW4A0", + "R_TERM_INT_NW4A0" + ], + [ + "INT_INTERFACE_NW4A1", + "R_TERM_INT_NW4A1" + ], + [ + "INT_INTERFACE_NW4A2", + "R_TERM_INT_NW4A2" + ], + [ + "INT_INTERFACE_NW4A3", + "R_TERM_INT_NW4A3" + ], + [ + "INT_INTERFACE_NW4END0", + "R_TERM_INT_NW4END0" + ], + [ + "INT_INTERFACE_NW4END1", + "R_TERM_INT_NW4END1" + ], + [ + "INT_INTERFACE_NW4END2", + "R_TERM_INT_NW4END2" + ], + [ + "INT_INTERFACE_NW4END3", + "R_TERM_INT_NW4END3" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLK1X_90", + "L_TERM_INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "INT_INTERFACE_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "INT_INTERFACE_SE2A0", + "R_TERM_INT_SW2A0" + ], + [ + "INT_INTERFACE_SE2A1", + "R_TERM_INT_SW2A1" + ], + [ + "INT_INTERFACE_SE2A2", + "R_TERM_INT_SW2A2" + ], + [ + "INT_INTERFACE_SE2A3", + "R_TERM_INT_SW2A3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "R_TERM_INT_SW4A0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "R_TERM_INT_SW4A1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "R_TERM_INT_SW4A2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "R_TERM_INT_SW4A3" + ], + [ + "INT_INTERFACE_SE4C0", + "R_TERM_INT_SW4END0" + ], + [ + "INT_INTERFACE_SE4C1", + "R_TERM_INT_SW4END1" + ], + [ + "INT_INTERFACE_SE4C2", + "R_TERM_INT_SW4END2" + ], + [ + "INT_INTERFACE_SE4C3", + "R_TERM_INT_SW4END3" + ], + [ + "INT_INTERFACE_SW2A0", + "R_TERM_INT_SW2A0" + ], + [ + "INT_INTERFACE_SW2A1", + "R_TERM_INT_SW2A1" + ], + [ + "INT_INTERFACE_SW2A2", + "R_TERM_INT_SW2A2" + ], + [ + "INT_INTERFACE_SW2A3", + "R_TERM_INT_SW2A3" + ], + [ + "INT_INTERFACE_SW4A0", + "R_TERM_INT_SW4A0" + ], + [ + "INT_INTERFACE_SW4A1", + "R_TERM_INT_SW4A1" + ], + [ + "INT_INTERFACE_SW4A2", + "R_TERM_INT_SW4A2" + ], + [ + "INT_INTERFACE_SW4A3", + "R_TERM_INT_SW4A3" + ], + [ + "INT_INTERFACE_SW4END0", + "R_TERM_INT_SW4END0" + ], + [ + "INT_INTERFACE_SW4END1", + "R_TERM_INT_SW4END1" + ], + [ + "INT_INTERFACE_SW4END2", + "R_TERM_INT_SW4END2" + ], + [ + "INT_INTERFACE_SW4END3", + "R_TERM_INT_SW4END3" + ], + [ + "INT_INTERFACE_WL1END0", + "R_TERM_INT_WL1END0" + ], + [ + "INT_INTERFACE_WL1END1", + "R_TERM_INT_WL1END1" + ], + [ + "INT_INTERFACE_WL1END2", + "R_TERM_INT_WL1END2" + ], + [ + "INT_INTERFACE_WL1END3", + "R_TERM_INT_WL1END3" + ], + [ + "INT_INTERFACE_WR1END0", + "R_TERM_INT_WR1END0" + ], + [ + "INT_INTERFACE_WR1END1", + "R_TERM_INT_WR1END1" + ], + [ + "INT_INTERFACE_WR1END2", + "R_TERM_INT_WR1END2" + ], + [ + "INT_INTERFACE_WR1END3", + "R_TERM_INT_WR1END3" + ], + [ + "INT_INTERFACE_WW2A0", + "R_TERM_INT_WW2A0" + ], + [ + "INT_INTERFACE_WW2A1", + "R_TERM_INT_WW2A1" + ], + [ + "INT_INTERFACE_WW2A2", + "R_TERM_INT_WW2A2" + ], + [ + "INT_INTERFACE_WW2A3", + "R_TERM_INT_WW2A3" + ], + [ + "INT_INTERFACE_WW2END0", + "R_TERM_INT_WW2END0" + ], + [ + "INT_INTERFACE_WW2END1", + "R_TERM_INT_WW2END1" + ], + [ + "INT_INTERFACE_WW2END2", + "R_TERM_INT_WW2END2" + ], + [ + "INT_INTERFACE_WW2END3", + "R_TERM_INT_WW2END3" + ], + [ + "INT_INTERFACE_WW4A0", + "R_TERM_INT_WW4A0" + ], + [ + "INT_INTERFACE_WW4A1", + "R_TERM_INT_WW4A1" + ], + [ + "INT_INTERFACE_WW4A2", + "R_TERM_INT_WW4A2" + ], + [ + "INT_INTERFACE_WW4A3", + "R_TERM_INT_WW4A3" + ], + [ + "INT_INTERFACE_WW4B0", + "R_TERM_INT_WW4B0" + ], + [ + "INT_INTERFACE_WW4B1", + "R_TERM_INT_WW4B1" + ], + [ + "INT_INTERFACE_WW4B2", + "R_TERM_INT_WW4B2" + ], + [ + "INT_INTERFACE_WW4B3", + "R_TERM_INT_WW4B3" + ], + [ + "INT_INTERFACE_WW4C0", + "R_TERM_INT_WW4C0" + ], + [ + "INT_INTERFACE_WW4C1", + "R_TERM_INT_WW4C1" + ], + [ + "INT_INTERFACE_WW4C2", + "R_TERM_INT_WW4C2" + ], + [ + "INT_INTERFACE_WW4C3", + "R_TERM_INT_WW4C3" + ], + [ + "INT_INTERFACE_WW4END0", + "R_TERM_INT_WW4END0" + ], + [ + "INT_INTERFACE_WW4END1", + "R_TERM_INT_WW4END1" + ], + [ + "INT_INTERFACE_WW4END2", + "R_TERM_INT_WW4END2" + ], + [ + "INT_INTERFACE_WW4END3", + "R_TERM_INT_WW4END3" + ], + [ + "L_INT_INTER_DQS_IOTOPHASER", + "L_TERM_INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOB33", + "LIOI3" + ], + "wire_pairs": [ + [ + "IOB_DIFF_TERM_INT_EN", + "LIOI_DIFF_TERM_INT_EN" + ], + [ + "IOB_IBUF0", + "LIOI_IBUF0" + ], + [ + "IOB_IBUF1", + "LIOI_IBUF1" + ], + [ + "IOB_IBUF_DISABLE0", + "LIOI_IBUF_DISABLE0" + ], + [ + "IOB_IBUF_DISABLE1", + "LIOI_IBUF_DISABLE1" + ], + [ + "IOB_KEEPER_INT_EN_0", + "LIOI_KEEPER_INT_EN_0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "LIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "LIOI_O0" + ], + [ + "IOB_O1", + "LIOI_O1" + ], + [ + "IOB_PD_INT_EN_0", + "LIOI_PD_INT_EN_0" + ], + [ + "IOB_PD_INT_EN_1", + "LIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_0", + "LIOI_PU_INT_EN_0" + ], + [ + "IOB_PU_INT_EN_1", + "LIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "LIOI_T0" + ], + [ + "IOB_T1", + "LIOI_T1" + ], + [ + "LIOB_IN_TERM0", + "LIOI_DCI_T_TERM0" + ], + [ + "LIOB_IN_TERM1", + "LIOI_DCI_T_TERM1" + ], + [ + "LIOB_MONITOR_N", + "IOI_MONITOR_N" + ], + [ + "LIOB_MONITOR_P", + "IOI_MONITOR_P" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOB33", + "LIOI3_TBYTESRC" + ], + "wire_pairs": [ + [ + "IOB_DIFF_TERM_INT_EN", + "LIOI_DIFF_TERM_INT_EN" + ], + [ + "IOB_IBUF0", + "LIOI_IBUF0" + ], + [ + "IOB_IBUF1", + "LIOI_IBUF1" + ], + [ + "IOB_IBUF_DISABLE0", + "LIOI_IBUF_DISABLE0" + ], + [ + "IOB_IBUF_DISABLE1", + "LIOI_IBUF_DISABLE1" + ], + [ + "IOB_KEEPER_INT_EN_0", + "LIOI_KEEPER_INT_EN_0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "LIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "LIOI_O0" + ], + [ + "IOB_O1", + "LIOI_O1" + ], + [ + "IOB_PD_INT_EN_0", + "LIOI_PD_INT_EN_0" + ], + [ + "IOB_PD_INT_EN_1", + "LIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_0", + "LIOI_PU_INT_EN_0" + ], + [ + "IOB_PU_INT_EN_1", + "LIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "LIOI_T0" + ], + [ + "IOB_T1", + "LIOI_T1" + ], + [ + "LIOB_IN_TERM0", + "LIOI_DCI_T_TERM0" + ], + [ + "LIOB_IN_TERM1", + "LIOI_DCI_T_TERM1" + ], + [ + "LIOB_MONITOR_N", + "IOI_MONITOR_N" + ], + [ + "LIOB_MONITOR_P", + "IOI_MONITOR_P" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOB33", + "LIOI3_TBYTETERM" + ], + "wire_pairs": [ + [ + "IOB_DIFF_TERM_INT_EN", + "LIOI_DIFF_TERM_INT_EN" + ], + [ + "IOB_IBUF0", + "LIOI_IBUF0" + ], + [ + "IOB_IBUF1", + "LIOI_IBUF1" + ], + [ + "IOB_IBUF_DISABLE0", + "LIOI_IBUF_DISABLE0" + ], + [ + "IOB_IBUF_DISABLE1", + "LIOI_IBUF_DISABLE1" + ], + [ + "IOB_KEEPER_INT_EN_0", + "LIOI_KEEPER_INT_EN_0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "LIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "LIOI_O0" + ], + [ + "IOB_O1", + "LIOI_O1" + ], + [ + "IOB_PD_INT_EN_0", + "LIOI_PD_INT_EN_0" + ], + [ + "IOB_PD_INT_EN_1", + "LIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_0", + "LIOI_PU_INT_EN_0" + ], + [ + "IOB_PU_INT_EN_1", + "LIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "LIOI_T0" + ], + [ + "IOB_T1", + "LIOI_T1" + ], + [ + "LIOB_IN_TERM0", + "LIOI_DCI_T_TERM0" + ], + [ + "LIOB_IN_TERM1", + "LIOI_DCI_T_TERM1" + ], + [ + "LIOB_MONITOR_N", + "IOI_MONITOR_N" + ], + [ + "LIOB_MONITOR_P", + "IOI_MONITOR_P" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOB33_SING", + "LIOI3_SING" + ], + "wire_pairs": [ + [ + "IOB_IBUF0", + "LIOI_IBUF0" + ], + [ + "IOB_IBUF_DISABLE0", + "LIOI_IBUF_DISABLE0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "LIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "LIOI_O0" + ], + [ + "IOB_PD_INT_EN_1", + "LIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_1", + "LIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "LIOI_T0" + ], + [ + "LIOB_IN_TERM0", + "LIOI_DCI_T_TERM0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "LIOI3", + "LIOI3" + ], + "wire_pairs": [ + [ + "IOI_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0_1" + ], + [ + "IOI_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1_1" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "LIOI3", + "LIOI3" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC0", + "IOI_IMUX_RC2" + ], + [ + "IOI_IMUX_RC1", + "IOI_IMUX_RC3" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2_1" + ], + [ + "IOI_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3_1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN" + ], + [ + "LIOI_I2GCLK_BOT1", + "LIOI_I2GCLK_TOP0" + ], + [ + "LIOI_I2GCLK_TOP0", + "LIOI_I2GCLK_TOP1" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "LIOI3", + "LIOI3_SING" + ], + "wire_pairs": [ + [ + "IOI_IOCLK0", + "IOI_SING_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_SING_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_SING_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_SING_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_SING_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_SING_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_SING_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_SING_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_SING_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_SING_LEAF_GCLK5" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_SING_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_SING_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_SING_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_SING_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_SING_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "LIOI3", + "LIOI3_SING" + ], + "wire_pairs": [ + [ + "IOI_IOCLK0", + "IOI_SING_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_SING_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_SING_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_SING_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_SING_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_SING_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_SING_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_SING_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_SING_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_SING_LEAF_GCLK5" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_SING_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_SING_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_SING_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_SING_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_SING_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "LIOI3", + "LIOI3_TBYTESRC" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC2", + "IOI_IMUX_RC0" + ], + [ + "IOI_IMUX_RC3", + "IOI_IMUX_RC1" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2_1", + "IOI_RCLK_DIV_CE2" + ], + [ + "IOI_RCLK_DIV_CE3_1", + "IOI_RCLK_DIV_CE3" + ], + [ + "IOI_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0_1" + ], + [ + "IOI_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1_1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "LIOI3", + "LIOI3_TBYTESRC" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC0", + "IOI_IMUX_RC2" + ], + [ + "IOI_IMUX_RC1", + "IOI_IMUX_RC3" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2_1" + ], + [ + "IOI_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3_1" + ], + [ + "IOI_RCLK_DIV_CLR0_1", + "IOI_RCLK_DIV_CLR0" + ], + [ + "IOI_RCLK_DIV_CLR1_1", + "IOI_RCLK_DIV_CLR1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "LIOI3", + "LIOI3_TBYTETERM" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC2", + "IOI_IMUX_RC0" + ], + [ + "IOI_IMUX_RC3", + "IOI_IMUX_RC1" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2_1", + "IOI_RCLK_DIV_CE2" + ], + [ + "IOI_RCLK_DIV_CE3_1", + "IOI_RCLK_DIV_CE3" + ], + [ + "IOI_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0_1" + ], + [ + "IOI_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1_1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "LIOI3", + "LIOI3_TBYTETERM" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC0", + "IOI_IMUX_RC2" + ], + [ + "IOI_IMUX_RC1", + "IOI_IMUX_RC3" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2_1" + ], + [ + "IOI_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3_1" + ], + [ + "IOI_RCLK_DIV_CLR0_1", + "IOI_RCLK_DIV_CLR0" + ], + [ + "IOI_RCLK_DIV_CLR1_1", + "IOI_RCLK_DIV_CLR1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN_TERM" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "LIOI3", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_1", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_1", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_1", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_1", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_1", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_1", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_1", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_1", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_1", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_1", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_1", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_1", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_1", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_1", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_1", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_1", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_1", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_1", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_1", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_1", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_1", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_1", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_1", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_1", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_1", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_1", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_1", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_1", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_1", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_1", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_1", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_1", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_1", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_1", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_1", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_1", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_1", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_1", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_1", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_1", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_1", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_1", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_1", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_1", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_1", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_1", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_1", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_1", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_1", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_1", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_1", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_1", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_1", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_1", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_1", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_1", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_1", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_1", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_1", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_1", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_1", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_1", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_1", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_1", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_1", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_1", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_1", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_1", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_1", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_1", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_1", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_1", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_1", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_1", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_1", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_1", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_1", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_1", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_1", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS13_1", + "TERM_INT_LOGIC_OUTS_L_B13" + ], + [ + "IOI_LOGIC_OUTS14_1", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_1", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS16_1", + "TERM_INT_LOGIC_OUTS_L_B16" + ], + [ + "IOI_LOGIC_OUTS18_1", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_1", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_1", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS22_1", + "TERM_INT_LOGIC_OUTS_L_B22" + ], + [ + "IOI_LOGIC_OUTS23_1", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_ICLK_0", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK_0", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOI3", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS13_0", + "TERM_INT_LOGIC_OUTS_L_B13" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS16_0", + "TERM_INT_LOGIC_OUTS_L_B16" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "IOI_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "LIOI_I2GCLK_TOP0", + "L_TERM_INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOI3_SING", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "LIOI3_TBYTESRC", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_1", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_1", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_1", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_1", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_1", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_1", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_1", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_1", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_1", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_1", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_1", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_1", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_1", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_1", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_1", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_1", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_1", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_1", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_1", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_1", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_1", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_1", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_1", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_1", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_1", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_1", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_1", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_1", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_1", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_1", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_1", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_1", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_1", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_1", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_1", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_1", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_1", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_1", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_1", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_1", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_1", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_1", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_1", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_1", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_1", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_1", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_1", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_1", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_1", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_1", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_1", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_1", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_1", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_1", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_1", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_1", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_1", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_1", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_1", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_1", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_1", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_1", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_1", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_1", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_1", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_1", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_1", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_1", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_1", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_1", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_1", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_1", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_1", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_1", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_1", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_1", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_1", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_1", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_1", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_1", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_1", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_1", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_1", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_1", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_1", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_ICLK_0", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_OCLK1X_90_0", + "L_TERM_INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK_0", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOI3_TBYTESRC", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "IOI_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "LIOI_I2GCLK_TOP0", + "L_TERM_INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "LIOI3_TBYTETERM", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_1", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_1", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_1", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_1", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_1", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_1", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_1", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_1", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_1", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_1", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_1", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_1", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_1", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_1", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_1", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_1", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_1", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_1", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_1", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_1", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_1", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_1", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_1", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_1", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_1", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_1", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_1", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_1", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_1", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_1", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_1", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_1", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_1", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_1", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_1", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_1", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_1", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_1", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_1", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_1", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_1", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_1", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_1", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_1", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_1", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_1", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_1", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_1", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_1", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_1", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_1", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_1", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_1", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_1", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_1", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_1", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_1", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_1", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_1", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_1", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_1", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_1", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_1", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_1", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_1", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_1", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_1", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_1", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_1", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_1", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_1", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_1", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_1", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_1", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_1", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_1", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_1", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_1", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_1", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_1", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_1", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_1", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_1", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_1", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_1", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_ICLK_0", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK_0", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "LIOI3_TBYTETERM", + "L_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "IOI_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ] + ] + }, + { + "grid_deltas": [ + 0, + -10 + ], + "tile_types": [ + "MONITOR_BOT", + "MONITOR_MID" + ], + "wire_pairs": [ + [ + "MONITOR_VERT_VAUXN0", + "MONITOR_VERT_VAUXN0" + ], + [ + "MONITOR_VERT_VAUXN1", + "MONITOR_VERT_VAUXN1" + ], + [ + "MONITOR_VERT_VAUXN2", + "MONITOR_VERT_VAUXN2" + ], + [ + "MONITOR_VERT_VAUXN3", + "MONITOR_VERT_VAUXN3" + ], + [ + "MONITOR_VERT_VAUXN4", + "MONITOR_VERT_VAUXN4" + ], + [ + "MONITOR_VERT_VAUXN5", + "MONITOR_VERT_VAUXN5" + ], + [ + "MONITOR_VERT_VAUXN6", + "MONITOR_VERT_VAUXN6" + ], + [ + "MONITOR_VERT_VAUXN7", + "MONITOR_VERT_VAUXN7" + ], + [ + "MONITOR_VERT_VAUXN8", + "MONITOR_VERT_VAUXN8" + ], + [ + "MONITOR_VERT_VAUXN9", + "MONITOR_VERT_VAUXN9" + ], + [ + "MONITOR_VERT_VAUXN10", + "MONITOR_VERT_VAUXN10" + ], + [ + "MONITOR_VERT_VAUXN11", + "MONITOR_VERT_VAUXN11" + ], + [ + "MONITOR_VERT_VAUXN12", + "MONITOR_VERT_VAUXN12" + ], + [ + "MONITOR_VERT_VAUXN13", + "MONITOR_VERT_VAUXN13" + ], + [ + "MONITOR_VERT_VAUXN14", + "MONITOR_VERT_VAUXN14" + ], + [ + "MONITOR_VERT_VAUXN15", + "MONITOR_VERT_VAUXN15" + ], + [ + "MONITOR_VERT_VAUXP0", + "MONITOR_VERT_VAUXP0" + ], + [ + "MONITOR_VERT_VAUXP1", + "MONITOR_VERT_VAUXP1" + ], + [ + "MONITOR_VERT_VAUXP2", + "MONITOR_VERT_VAUXP2" + ], + [ + "MONITOR_VERT_VAUXP3", + "MONITOR_VERT_VAUXP3" + ], + [ + "MONITOR_VERT_VAUXP4", + "MONITOR_VERT_VAUXP4" + ], + [ + "MONITOR_VERT_VAUXP5", + "MONITOR_VERT_VAUXP5" + ], + [ + "MONITOR_VERT_VAUXP6", + "MONITOR_VERT_VAUXP6" + ], + [ + "MONITOR_VERT_VAUXP7", + "MONITOR_VERT_VAUXP7" + ], + [ + "MONITOR_VERT_VAUXP8", + "MONITOR_VERT_VAUXP8" + ], + [ + "MONITOR_VERT_VAUXP9", + "MONITOR_VERT_VAUXP9" + ], + [ + "MONITOR_VERT_VAUXP10", + "MONITOR_VERT_VAUXP10" + ], + [ + "MONITOR_VERT_VAUXP11", + "MONITOR_VERT_VAUXP11" + ], + [ + "MONITOR_VERT_VAUXP12", + "MONITOR_VERT_VAUXP12" + ], + [ + "MONITOR_VERT_VAUXP13", + "MONITOR_VERT_VAUXP13" + ], + [ + "MONITOR_VERT_VAUXP14", + "MONITOR_VERT_VAUXP14" + ], + [ + "MONITOR_VERT_VAUXP15", + "MONITOR_VERT_VAUXP15" + ] + ] + }, + { + "grid_deltas": [ + 1, + -9 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_9", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_9", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_9", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_9", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_9", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_9", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_9", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_9", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_9", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_9", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_9", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_9", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_9", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_9", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_9", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_9", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_9", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_9", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_9", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_9", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_9", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_9", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_9", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_9", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_9", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_9", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_9", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_9", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_9", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_9", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_9", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_9", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_9", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_9", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_9", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_9", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_9", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_9", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_9", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_9", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_9", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_9", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_9", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_9", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_9", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_9", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_9", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_9", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_9", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_9", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_9", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_9", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_9", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_9", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_9", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_9", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_9", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_9", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_9", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_9", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_9", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_9", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_9", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_9", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_9", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_9", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_9", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_9", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_9", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_9", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_9", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_9", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_9", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_9", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_9", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_9", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_9", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_9", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_9", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_9", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_9", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_9", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_9", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_9", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_9", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_9", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_9", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_9", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_9", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_9", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_9", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_9", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_9", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_9", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_9", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_9", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_9", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_9", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_9", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_9", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_9", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_9", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_9", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_9", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_9", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_9", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_9", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_9", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_9", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_9", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_9", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_9", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_9", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_9", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_9", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_9", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_9", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_9", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_9", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_9", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_9", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_9", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_9", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_9", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_9", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_9", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_9", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_9", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_9", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_9", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_9", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_9", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_9", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_9", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_9", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_9", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_9", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_9", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_9", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_9", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_9", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_9", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_9", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_9", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_9", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_9", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_9", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_9", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_9", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_9", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_9", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_9", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_9", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_9", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_9", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_9", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_9", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_9", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_9", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_9", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_9", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_9", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_9", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_9", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_9", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_9", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_9", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_9", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_9", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_9", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_9", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_9", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_9", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_9", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_9", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_9", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_9", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_9", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_9", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_9", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_9", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_9", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_9", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_9", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_9", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_9", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_9", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_9", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_9", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_9", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_9", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_9", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -8 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_8", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_8", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_8", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_8", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_8", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_8", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_8", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_8", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_8", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_8", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_8", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_8", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_8", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_8", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_8", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_8", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_8", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_8", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_8", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_8", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_8", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_8", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_8", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_8", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_8", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_8", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_8", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_8", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_8", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_8", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_8", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_8", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_8", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_8", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_8", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_8", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_8", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_8", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_8", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_8", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_8", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_8", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_8", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_8", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_8", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_8", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_8", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_8", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_8", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_8", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_8", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_8", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN14", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP14", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_8", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_8", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_8", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_8", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_8", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_8", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_8", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_8", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_8", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_8", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_8", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_8", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_8", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_8", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_8", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_8", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_8", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_8", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_8", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_8", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_8", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_8", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_8", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_8", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_8", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_8", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_8", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_8", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_8", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_8", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_8", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_8", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_8", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_8", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_8", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_8", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_8", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_8", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_8", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_8", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_8", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_8", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_8", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_8", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_8", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_8", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_8", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_8", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_8", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_8", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_8", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_8", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_8", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_8", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_8", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_8", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_8", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_8", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_8", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_8", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_8", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_8", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_8", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_8", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_8", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_8", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_8", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_8", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_8", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_8", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_8", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_8", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_8", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_8", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_8", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_8", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_8", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_8", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_8", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_8", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_8", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_8", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_8", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_8", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_8", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_8", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_8", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_8", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_8", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_8", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_8", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_8", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_8", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_8", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_8", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_8", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_8", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_8", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_8", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_8", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_8", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_8", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_8", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_8", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_8", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_8", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_8", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_8", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_8", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_8", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_8", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_8", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_8", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_8", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_8", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_8", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_8", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_8", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_8", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_8", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_8", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_8", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_8", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_8", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_8", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_8", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_8", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_8", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_8", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_8", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_8", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_8", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_8", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_8", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_8", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_8", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_8", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_8", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_8", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_8", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_7", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_7", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_7", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_7", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_7", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_7", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_7", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_7", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_7", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_7", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_7", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_7", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_7", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_7", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_7", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_7", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_7", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_7", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_7", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_7", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_7", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_7", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_7", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_7", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_7", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_7", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_7", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_7", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_7", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_7", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_7", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_7", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_7", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_7", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_7", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_7", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_7", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_7", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_7", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_7", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_7", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_7", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_7", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_7", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_7", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_7", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_7", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_7", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_7", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_7", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_7", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_7", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_7", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_7", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_7", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_7", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_7", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_7", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_7", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_7", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_7", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_7", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_7", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_7", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_7", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_7", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_7", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_7", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_7", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_7", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_7", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_7", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_7", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_7", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_7", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_7", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_7", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_7", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_7", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_7", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_7", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_7", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_7", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_7", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_7", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_7", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_7", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_7", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_7", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_7", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_7", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_7", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_7", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_7", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_7", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_7", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_7", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_7", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_7", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_7", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_7", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_7", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_7", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_7", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_7", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_7", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_7", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_7", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_7", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_7", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_7", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_7", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_7", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_7", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_7", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_7", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_7", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_7", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_7", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_7", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_7", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_7", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_7", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_7", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_7", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_7", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_7", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_7", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_7", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_7", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_7", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_7", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_7", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_7", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_7", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_7", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_7", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_7", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_7", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_7", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_7", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_7", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_7", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_7", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_7", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_7", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_7", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_7", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_7", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_7", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_7", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_7", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_7", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_7", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_7", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_7", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_7", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_7", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_7", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_7", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_7", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_7", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_7", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_7", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_7", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_7", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_7", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_7", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_7", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_7", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_7", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_7", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_7", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_7", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_7", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_7", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_7", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_7", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_7", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_7", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_7", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_7", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_7", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_7", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_7", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_7", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_7", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_7", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_7", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_7", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_7", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_7", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_6", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_6", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_6", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_6", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_6", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_6", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_6", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_6", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_6", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_6", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_6", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_6", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_6", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_6", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_6", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_6", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_6", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_6", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_6", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_6", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_6", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_6", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_6", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_6", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_6", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_6", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_6", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_6", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_6", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_6", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_6", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_6", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_6", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_6", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_6", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_6", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_6", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_6", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_6", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_6", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_6", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_6", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_6", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_6", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_6", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_6", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_6", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_6", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_6", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_6", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_6", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_6", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN7", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP7", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_6", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_6", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_6", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_6", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_6", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_6", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_6", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_6", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_6", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_6", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_6", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_6", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_6", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_6", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_6", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_6", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_6", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_6", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_6", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_6", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_6", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_6", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_6", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_6", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_6", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_6", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_6", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_6", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_6", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_6", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_6", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_6", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_6", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_6", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_6", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_6", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_6", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_6", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_6", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_6", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_6", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_6", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_6", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_6", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_6", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_6", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_6", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_6", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_6", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_6", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_6", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_6", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_6", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_6", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_6", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_6", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_6", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_6", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_6", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_6", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_6", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_6", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_6", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_6", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_6", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_6", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_6", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_6", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_6", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_6", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_6", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_6", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_6", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_6", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_6", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_6", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_6", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_6", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_6", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_6", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_6", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_6", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_6", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_6", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_6", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_6", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_6", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_6", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_6", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_6", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_6", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_6", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_6", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_6", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_6", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_6", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_6", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_6", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_6", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_6", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_6", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_6", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_6", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_6", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_6", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_6", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_6", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_6", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_6", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_6", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_6", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_6", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_6", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_6", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_6", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_6", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_6", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_6", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_6", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_6", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_6", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_6", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_6", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_6", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_6", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_6", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_6", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_6", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_6", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_6", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_6", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_6", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_6", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_6", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_6", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_6", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_6", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_6", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_6", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_6", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_5", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_5", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_5", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_5", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_5", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_5", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_5", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_5", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_5", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_5", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_5", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_5", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_5", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_5", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_5", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_5", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_5", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_5", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_5", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_5", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_5", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_5", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_5", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_5", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_5", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_5", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_5", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_5", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_5", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_5", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_5", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_5", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_5", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_5", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_5", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_5", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_5", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_5", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_5", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_5", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_5", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_5", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_5", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_5", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_5", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_5", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_5", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_5", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_5", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_5", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_5", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_5", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_5", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_5", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_5", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_5", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_5", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_5", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_5", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_5", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_5", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_5", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_5", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_5", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_5", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_5", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_5", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_5", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_5", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_5", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_5", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_5", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_5", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_5", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_5", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_5", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_5", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_5", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_5", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_5", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_5", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_5", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_5", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_5", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_5", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_5", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_5", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_5", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_5", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_5", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_5", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_5", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_5", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_5", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_5", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_5", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_5", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_5", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_5", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_5", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_5", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_5", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_5", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_5", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_5", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_5", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_5", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_5", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_5", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_5", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_5", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_5", + "VFRAME_LH12" + ], + [ + "MONITOR_LOGIC_OUTS_B8_5", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "MONITOR_LOGIC_OUTS_B9_5", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "MONITOR_LOGIC_OUTS_B10_5", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "MONITOR_LOGIC_OUTS_B11_5", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "MONITOR_LOGIC_OUTS_B12_5", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "MONITOR_LOGIC_OUTS_B13_5", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "MONITOR_LOGIC_OUTS_B14_5", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "MONITOR_LOGIC_OUTS_B15_5", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "MONITOR_LOGIC_OUTS_B16_5", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "MONITOR_LOGIC_OUTS_B17_5", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "MONITOR_LOGIC_OUTS_B18_5", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "MONITOR_LOGIC_OUTS_B19_5", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "MONITOR_LOGIC_OUTS_B20_5", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "MONITOR_LOGIC_OUTS_B21_5", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "MONITOR_LOGIC_OUTS_B22_5", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "MONITOR_LOGIC_OUTS_B23_5", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "MONITOR_NE2A0_5", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_5", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_5", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_5", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_5", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_5", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_5", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_5", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_5", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_5", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_5", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_5", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_5", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_5", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_5", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_5", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_5", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_5", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_5", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_5", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_5", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_5", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_5", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_5", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_5", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_5", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_5", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_5", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_5", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_5", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_5", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_5", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_5", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_5", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_5", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_5", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_5", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_5", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_5", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_5", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_5", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_5", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_5", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_5", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_5", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_5", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_5", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_5", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_5", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_5", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_5", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_5", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_5", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_5", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_5", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_5", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_5", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_5", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_5", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_5", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_5", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_5", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_5", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_5", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_5", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_5", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_5", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_5", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_5", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_5", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_5", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_5", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_5", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_5", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_5", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_5", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_5", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_5", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_5", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_5", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_4", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_4", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_4", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_4", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_4", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_4", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_4", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_4", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_4", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_4", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_4", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_4", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_4", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_4", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_4", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_4", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_4", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_4", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_4", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_4", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_4", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_4", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_4", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_4", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_4", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_4", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_4", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_4", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_4", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_4", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_4", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_4", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_4", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_4", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_4", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_4", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_4", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_4", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_4", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_4", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_4", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_4", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_4", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_4", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_4", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_4", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_4", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_4", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_4", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_4", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_4", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_4", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN15", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP15", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_4", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_4", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_4", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_4", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_4", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_4", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_4", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_4", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_4", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_4", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_4", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_4", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_4", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_4", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_4", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_4", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_4", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_4", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_4", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_4", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_4", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_4", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_4", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_4", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_4", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_4", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_4", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_4", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_4", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_4", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_4", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_4", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_4", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_4", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_4", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_4", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_4", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_4", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_4", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_4", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_4", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_4", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_4", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_4", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_4", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_4", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_4", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_4", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_4", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_4", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_4", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_4", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_4", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_4", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_4", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_4", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_4", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_4", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_4", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_4", + "VFRAME_LH12" + ], + [ + "MONITOR_LOGIC_OUTS_B8_4", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "MONITOR_LOGIC_OUTS_B9_4", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "MONITOR_LOGIC_OUTS_B10_4", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "MONITOR_LOGIC_OUTS_B11_4", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "MONITOR_LOGIC_OUTS_B12_4", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "MONITOR_LOGIC_OUTS_B13_4", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "MONITOR_LOGIC_OUTS_B14_4", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "MONITOR_LOGIC_OUTS_B15_4", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "MONITOR_LOGIC_OUTS_B16_4", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "MONITOR_LOGIC_OUTS_B17_4", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "MONITOR_LOGIC_OUTS_B18_4", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "MONITOR_LOGIC_OUTS_B19_4", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "MONITOR_LOGIC_OUTS_B20_4", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "MONITOR_LOGIC_OUTS_B21_4", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "MONITOR_LOGIC_OUTS_B22_4", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "MONITOR_LOGIC_OUTS_B23_4", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "MONITOR_NE2A0_4", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_4", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_4", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_4", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_4", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_4", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_4", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_4", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_4", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_4", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_4", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_4", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_4", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_4", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_4", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_4", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_4", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_4", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_4", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_4", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_4", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_4", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_4", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_4", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_4", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_4", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_4", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_4", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_4", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_4", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_4", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_4", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_4", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_4", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_4", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_4", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_4", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_4", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_4", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_4", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_4", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_4", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_4", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_4", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_4", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_4", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_4", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_4", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_4", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_4", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_4", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_4", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_4", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_4", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_4", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_4", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_4", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_4", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_4", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_4", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_4", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_4", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_4", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_4", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_4", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_4", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_4", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_4", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_4", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_4", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_4", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_4", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_4", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_4", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_4", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_4", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_4", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_4", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_4", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_4", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_3", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_3", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_3", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_3", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_3", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_3", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_3", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_3", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_3", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_3", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_3", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_3", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_3", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_3", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_3", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_3", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_3", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_3", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_3", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_3", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_3", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_3", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_3", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_3", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_3", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_3", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_3", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_3", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_3", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_3", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_3", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_3", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_3", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_3", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_3", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_3", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_3", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_3", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_3", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_3", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_3", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_3", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_3", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_3", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_3", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_3", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_3", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_3", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_3", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_3", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_3", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_3", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_3", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_3", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_3", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_3", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_3", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_3", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_3", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_3", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_3", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_3", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_3", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_3", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_3", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_3", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_3", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_3", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_3", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_3", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_3", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_3", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_3", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_3", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_3", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_3", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_3", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_3", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_3", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_3", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_3", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_3", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_3", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_3", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_3", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_3", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_3", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_3", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_3", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_3", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_3", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_3", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_3", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_3", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_3", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_3", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_3", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_3", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_3", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_3", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_3", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_3", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_3", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_3", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_3", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_3", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_3", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_3", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_3", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_3", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_3", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_3", + "VFRAME_LH12" + ], + [ + "MONITOR_LOGIC_OUTS_B14_3", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "MONITOR_LOGIC_OUTS_B15_3", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "MONITOR_LOGIC_OUTS_B16_3", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "MONITOR_LOGIC_OUTS_B17_3", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "MONITOR_LOGIC_OUTS_B18_3", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "MONITOR_LOGIC_OUTS_B19_3", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "MONITOR_LOGIC_OUTS_B20_3", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "MONITOR_LOGIC_OUTS_B21_3", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "MONITOR_LOGIC_OUTS_B22_3", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "MONITOR_LOGIC_OUTS_B23_3", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "MONITOR_NE2A0_3", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_3", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_3", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_3", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_3", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_3", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_3", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_3", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_3", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_3", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_3", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_3", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_3", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_3", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_3", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_3", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_3", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_3", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_3", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_3", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_3", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_3", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_3", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_3", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_3", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_3", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_3", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_3", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_3", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_3", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_3", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_3", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_3", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_3", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_3", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_3", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_3", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_3", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_3", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_3", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_3", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_3", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_3", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_3", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_3", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_3", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_3", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_3", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_3", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_3", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_3", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_3", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_3", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_3", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_3", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_3", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_3", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_3", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_3", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_3", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_3", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_3", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_3", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_3", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_3", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_3", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_3", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_3", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_3", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_3", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_3", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_3", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_3", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_3", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_3", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_3", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_3", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_3", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_3", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_2", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_2", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_2", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_2", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_2", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_2", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_2", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_2", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_2", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_2", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_2", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_2", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_2", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_2", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_2", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_2", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_2", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_2", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_2", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_2", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_2", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_2", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_2", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_2", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_2", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_2", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_2", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_2", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_2", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_2", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_2", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_2", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_2", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_2", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_2", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_2", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_2", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_2", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_2", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_2", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_2", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_2", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_2", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_2", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_2", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_2", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_2", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_2", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_2", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_2", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_2", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_2", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_2", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_2", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_2", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_2", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_2", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_2", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_2", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_2", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_2", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_2", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_2", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_2", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_2", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_2", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_2", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_2", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_2", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_2", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_2", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_2", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_2", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_2", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_2", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_2", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_2", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_2", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_2", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_2", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_2", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_2", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_2", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_2", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_2", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_2", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_2", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_2", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_2", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_2", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_2", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_2", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_2", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_2", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_2", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_2", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_2", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_2", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_2", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_2", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_2", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_2", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_2", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_2", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_2", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_2", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_2", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_2", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_2", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_2", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_2", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_2", + "VFRAME_LH12" + ], + [ + "MONITOR_LOGIC_OUTS_B11_2", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "MONITOR_LOGIC_OUTS_B12_2", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "MONITOR_LOGIC_OUTS_B13_2", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "MONITOR_LOGIC_OUTS_B14_2", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "MONITOR_LOGIC_OUTS_B15_2", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "MONITOR_LOGIC_OUTS_B16_2", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "MONITOR_LOGIC_OUTS_B17_2", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "MONITOR_LOGIC_OUTS_B18_2", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "MONITOR_LOGIC_OUTS_B19_2", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "MONITOR_LOGIC_OUTS_B20_2", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "MONITOR_LOGIC_OUTS_B21_2", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "MONITOR_LOGIC_OUTS_B22_2", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "MONITOR_LOGIC_OUTS_B23_2", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "MONITOR_NE2A0_2", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_2", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_2", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_2", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_2", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_2", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_2", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_2", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_2", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_2", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_2", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_2", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_2", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_2", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_2", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_2", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_2", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_2", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_2", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_2", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_2", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_2", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_2", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_2", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_2", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_2", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_2", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_2", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_2", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_2", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_2", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_2", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_2", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_2", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_2", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_2", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_2", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_2", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_2", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_2", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_2", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_2", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_2", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_2", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_2", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_2", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_2", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_2", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_2", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_2", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_2", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_2", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_2", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_2", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_2", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_2", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_2", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_2", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_2", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_2", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_2", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_2", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_2", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_2", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_2", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_2", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_2", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_2", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_2", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_2", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_2", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_2", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_2", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_2", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_2", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_2", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_2", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_2", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_2", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_2", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_1", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_1", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_1", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_1", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_1", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_1", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_1", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_1", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_1", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_1", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_1", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_1", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_1", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_1", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_1", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_1", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_1", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_1", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_1", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_1", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_1", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_1", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_1", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_1", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_1", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_1", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_1", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_1", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_1", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_1", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_1", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_1", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_1", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_1", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_1", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_1", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_1", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_1", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_1", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_1", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_1", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_1", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_1", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_1", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_1", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_1", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_1", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_1", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_1", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_1", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_1", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_1", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_1", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_1", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_1", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_1", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_1", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_1", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_1", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_1", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_1", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_1", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_1", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_1", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_1", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_1", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_1", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_1", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_1", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_1", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_1", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_1", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_1", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_1", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_1", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_1", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_1", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_1", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_1", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_1", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_1", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_1", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_1", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_1", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_1", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_1", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_1", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_1", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_1", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_1", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_1", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_1", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_1", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_1", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_1", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_1", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_1", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_1", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_1", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_1", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_1", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_1", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_1", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_1", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_1", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_1", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_1", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_1", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_1", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_1", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_1", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_1", + "VFRAME_LH12" + ], + [ + "MONITOR_LOGIC_OUTS_B11_1", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "MONITOR_LOGIC_OUTS_B12_1", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "MONITOR_LOGIC_OUTS_B13_1", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "MONITOR_LOGIC_OUTS_B14_1", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "MONITOR_LOGIC_OUTS_B15_1", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "MONITOR_LOGIC_OUTS_B16_1", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "MONITOR_LOGIC_OUTS_B17_1", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "MONITOR_LOGIC_OUTS_B18_1", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "MONITOR_LOGIC_OUTS_B19_1", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "MONITOR_LOGIC_OUTS_B20_1", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "MONITOR_LOGIC_OUTS_B21_1", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "MONITOR_LOGIC_OUTS_B22_1", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "MONITOR_LOGIC_OUTS_B23_1", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "MONITOR_NE2A0_1", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_1", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_1", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_1", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_1", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_1", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_1", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_1", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_1", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_1", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_1", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_1", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_1", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_1", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_1", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_1", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_1", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_1", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_1", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_1", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_1", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_1", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_1", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_1", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_1", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_1", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_1", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_1", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_1", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_1", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_1", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_1", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_1", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_1", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_1", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_1", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_1", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_1", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_1", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_1", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_1", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_1", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_1", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_1", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_1", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_1", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_1", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_1", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_1", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_1", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_1", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_1", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_1", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_1", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_1", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_1", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_1", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_1", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_1", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_1", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_1", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_1", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_1", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_1", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_1", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_1", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_1", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_1", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_1", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_1", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_1", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_1", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_1", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_1", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_1", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_1", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_1", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_1", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_1", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_1", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "MONITOR_BOT", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_0", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_0", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_0", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_0", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_0", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_0", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_0", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_0", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_0", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_0", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_0", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_0", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_0", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_0", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_0", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_0", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_0", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_0", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_0", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_0", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_0", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_0", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_0", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_0", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_0", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_0", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_0", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_0", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_0", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_0", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_0", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_0", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_0", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_0", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_0", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_0", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_0", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_0", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_0", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_0", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_0", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_0", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_0", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_0", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_0", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_0", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_0", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_0", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_0", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_0", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_0", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_0", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_0", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_0", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_0", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_0", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_0", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_0", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_0", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_0", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_0", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_0", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_0", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_0", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_0", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_0", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_0", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_0", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_0", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_0", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_0", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_0", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_0", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_0", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_0", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_0", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_0", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_0", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_0", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_0", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_0", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_0", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_0", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_0", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_0", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_0", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_0", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_0", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_0", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_0", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_0", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_0", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_0", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_0", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_0", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_0", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_0", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_0", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_0", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_0", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_0", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_0", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_0", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_0", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_0", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_0", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_0", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_0", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_0", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_0", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_0", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_0", + "VFRAME_LH12" + ], + [ + "MONITOR_LOGIC_OUTS_B8_0", + "VFRAME_LOGIC_OUTS_B8" + ], + [ + "MONITOR_LOGIC_OUTS_B9_0", + "VFRAME_LOGIC_OUTS_B9" + ], + [ + "MONITOR_LOGIC_OUTS_B10_0", + "VFRAME_LOGIC_OUTS_B10" + ], + [ + "MONITOR_LOGIC_OUTS_B11_0", + "VFRAME_LOGIC_OUTS_B11" + ], + [ + "MONITOR_LOGIC_OUTS_B12_0", + "VFRAME_LOGIC_OUTS_B12" + ], + [ + "MONITOR_LOGIC_OUTS_B13_0", + "VFRAME_LOGIC_OUTS_B13" + ], + [ + "MONITOR_LOGIC_OUTS_B14_0", + "VFRAME_LOGIC_OUTS_B14" + ], + [ + "MONITOR_LOGIC_OUTS_B15_0", + "VFRAME_LOGIC_OUTS_B15" + ], + [ + "MONITOR_LOGIC_OUTS_B16_0", + "VFRAME_LOGIC_OUTS_B16" + ], + [ + "MONITOR_LOGIC_OUTS_B17_0", + "VFRAME_LOGIC_OUTS_B17" + ], + [ + "MONITOR_LOGIC_OUTS_B18_0", + "VFRAME_LOGIC_OUTS_B18" + ], + [ + "MONITOR_LOGIC_OUTS_B19_0", + "VFRAME_LOGIC_OUTS_B19" + ], + [ + "MONITOR_LOGIC_OUTS_B20_0", + "VFRAME_LOGIC_OUTS_B20" + ], + [ + "MONITOR_LOGIC_OUTS_B21_0", + "VFRAME_LOGIC_OUTS_B21" + ], + [ + "MONITOR_LOGIC_OUTS_B22_0", + "VFRAME_LOGIC_OUTS_B22" + ], + [ + "MONITOR_LOGIC_OUTS_B23_0", + "VFRAME_LOGIC_OUTS_B23" + ], + [ + "MONITOR_NE2A0_0", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_0", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_0", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_0", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_0", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_0", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_0", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_0", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_0", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_0", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_0", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_0", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_0", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_0", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_0", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_0", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_0", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_0", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_0", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_0", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_0", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_0", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_0", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_0", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_0", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_0", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_0", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_0", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_0", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_0", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_0", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_0", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_0", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_0", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_0", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_0", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_0", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_0", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_0", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_0", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_0", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_0", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_0", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_0", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_0", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_0", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_0", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_0", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_0", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_0", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_0", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_0", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_0", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_0", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_0", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_0", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_0", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_0", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_0", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_0", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_0", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_0", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_0", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_0", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_0", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_0", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_0", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_0", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_0", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_0", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_0", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_0", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_0", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_0", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_0", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_0", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_0", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_0", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_0", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_0", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -10 + ], + "tile_types": [ + "MONITOR_MID", + "MONITOR_TOP" + ], + "wire_pairs": [ + [ + "MONITOR_VERT_VAUXN0", + "MONITOR_VERT_SHORT_VAUXN0" + ], + [ + "MONITOR_VERT_VAUXN1", + "MONITOR_VERT_SHORT_VAUXN1" + ], + [ + "MONITOR_VERT_VAUXN2", + "MONITOR_VERT_SHORT_VAUXN2" + ], + [ + "MONITOR_VERT_VAUXN3", + "MONITOR_VERT_SHORT_VAUXN3" + ], + [ + "MONITOR_VERT_VAUXN4", + "MONITOR_VERT_SHORT_VAUXN4" + ], + [ + "MONITOR_VERT_VAUXN5", + "MONITOR_VERT_SHORT_VAUXN5" + ], + [ + "MONITOR_VERT_VAUXN6", + "MONITOR_VERT_SHORT_VAUXN6" + ], + [ + "MONITOR_VERT_VAUXN7", + "MONITOR_VERT_SHORT_VAUXN7" + ], + [ + "MONITOR_VERT_VAUXN8", + "MONITOR_VERT_SHORT_VAUXN8" + ], + [ + "MONITOR_VERT_VAUXN9", + "MONITOR_VERT_SHORT_VAUXN9" + ], + [ + "MONITOR_VERT_VAUXN10", + "MONITOR_VERT_SHORT_VAUXN10" + ], + [ + "MONITOR_VERT_VAUXN11", + "MONITOR_VERT_SHORT_VAUXN11" + ], + [ + "MONITOR_VERT_VAUXN12", + "MONITOR_VERT_SHORT_VAUXN12" + ], + [ + "MONITOR_VERT_VAUXN13", + "MONITOR_VERT_SHORT_VAUXN13" + ], + [ + "MONITOR_VERT_VAUXN14", + "MONITOR_VERT_SHORT_VAUXN14" + ], + [ + "MONITOR_VERT_VAUXN15", + "MONITOR_VERT_SHORT_VAUXN15" + ], + [ + "MONITOR_VERT_VAUXP0", + "MONITOR_VERT_SHORT_VAUXP0" + ], + [ + "MONITOR_VERT_VAUXP1", + "MONITOR_VERT_SHORT_VAUXP1" + ], + [ + "MONITOR_VERT_VAUXP2", + "MONITOR_VERT_SHORT_VAUXP2" + ], + [ + "MONITOR_VERT_VAUXP3", + "MONITOR_VERT_SHORT_VAUXP3" + ], + [ + "MONITOR_VERT_VAUXP4", + "MONITOR_VERT_SHORT_VAUXP4" + ], + [ + "MONITOR_VERT_VAUXP5", + "MONITOR_VERT_SHORT_VAUXP5" + ], + [ + "MONITOR_VERT_VAUXP6", + "MONITOR_VERT_SHORT_VAUXP6" + ], + [ + "MONITOR_VERT_VAUXP7", + "MONITOR_VERT_SHORT_VAUXP7" + ], + [ + "MONITOR_VERT_VAUXP8", + "MONITOR_VERT_SHORT_VAUXP8" + ], + [ + "MONITOR_VERT_VAUXP9", + "MONITOR_VERT_SHORT_VAUXP9" + ], + [ + "MONITOR_VERT_VAUXP10", + "MONITOR_VERT_SHORT_VAUXP10" + ], + [ + "MONITOR_VERT_VAUXP11", + "MONITOR_VERT_SHORT_VAUXP11" + ], + [ + "MONITOR_VERT_VAUXP12", + "MONITOR_VERT_SHORT_VAUXP12" + ], + [ + "MONITOR_VERT_VAUXP13", + "MONITOR_VERT_SHORT_VAUXP13" + ], + [ + "MONITOR_VERT_VAUXP14", + "MONITOR_VERT_SHORT_VAUXP14" + ], + [ + "MONITOR_VERT_VAUXP15", + "MONITOR_VERT_SHORT_VAUXP15" + ] + ] + }, + { + "grid_deltas": [ + 1, + -9 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_9", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_9", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_9", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_9", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_9", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_9", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_9", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_9", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_9", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_9", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_9", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_9", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_9", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_9", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_9", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_9", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_9", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_9", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_9", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_9", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_9", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_9", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_9", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_9", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_9", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_9", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_9", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_9", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_9", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_9", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_9", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_9", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_9", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_9", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_9", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_9", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_9", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_9", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_9", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_9", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_9", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_9", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_9", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_9", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_9", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_9", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_9", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_9", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_9", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_9", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_9", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_9", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_9", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_9", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_9", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_9", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_9", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_9", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_9", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_9", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_9", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_9", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_9", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_9", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_9", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_9", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_9", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_9", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_9", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_9", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_9", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_9", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_9", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_9", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_9", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_9", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_9", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_9", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_9", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_9", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_9", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_9", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_9", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_9", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_9", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_9", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_9", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_9", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_9", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_9", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_9", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_9", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_9", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_9", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_9", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_9", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_9", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_9", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_9", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_9", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_9", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_9", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_9", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_9", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_9", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_9", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_9", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_9", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_9", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_9", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_9", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_9", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_9", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_9", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_9", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_9", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_9", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_9", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_9", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_9", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_9", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_9", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_9", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_9", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_9", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_9", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_9", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_9", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_9", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_9", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_9", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_9", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_9", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_9", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_9", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_9", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_9", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_9", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_9", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_9", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_9", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_9", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_9", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_9", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_9", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_9", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_9", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_9", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_9", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_9", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_9", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_9", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_9", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_9", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_9", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_9", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_9", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_9", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_9", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_9", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_9", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_9", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_9", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_9", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_9", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_9", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_9", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_9", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_9", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_9", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_9", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_9", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_9", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_9", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_9", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_9", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_9", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_9", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_9", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_9", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_9", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_9", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_9", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_9", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_9", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_9", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_9", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_9", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_9", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_9", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_9", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_9", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -8 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_8", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_8", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_8", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_8", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_8", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_8", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_8", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_8", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_8", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_8", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_8", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_8", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_8", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_8", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_8", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_8", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_8", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_8", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_8", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_8", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_8", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_8", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_8", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_8", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_8", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_8", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_8", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_8", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_8", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_8", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_8", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_8", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_8", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_8", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_8", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_8", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_8", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_8", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_8", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_8", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_8", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_8", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_8", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_8", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_8", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_8", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_8", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_8", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_8", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_8", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_8", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_8", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN5", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP5", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_8", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_8", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_8", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_8", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_8", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_8", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_8", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_8", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_8", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_8", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_8", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_8", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_8", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_8", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_8", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_8", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_8", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_8", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_8", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_8", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_8", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_8", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_8", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_8", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_8", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_8", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_8", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_8", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_8", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_8", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_8", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_8", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_8", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_8", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_8", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_8", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_8", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_8", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_8", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_8", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_8", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_8", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_8", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_8", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_8", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_8", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_8", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_8", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_8", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_8", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_8", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_8", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_8", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_8", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_8", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_8", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_8", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_8", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_8", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_8", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_8", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_8", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_8", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_8", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_8", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_8", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_8", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_8", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_8", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_8", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_8", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_8", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_8", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_8", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_8", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_8", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_8", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_8", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_8", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_8", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_8", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_8", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_8", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_8", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_8", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_8", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_8", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_8", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_8", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_8", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_8", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_8", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_8", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_8", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_8", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_8", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_8", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_8", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_8", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_8", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_8", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_8", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_8", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_8", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_8", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_8", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_8", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_8", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_8", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_8", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_8", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_8", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_8", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_8", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_8", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_8", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_8", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_8", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_8", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_8", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_8", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_8", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_8", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_8", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_8", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_8", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_8", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_8", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_8", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_8", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_8", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_8", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_8", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_8", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_8", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_8", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_8", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_8", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_8", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_8", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -7 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_7", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_7", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_7", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_7", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_7", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_7", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_7", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_7", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_7", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_7", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_7", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_7", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_7", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_7", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_7", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_7", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_7", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_7", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_7", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_7", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_7", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_7", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_7", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_7", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_7", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_7", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_7", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_7", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_7", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_7", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_7", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_7", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_7", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_7", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_7", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_7", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_7", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_7", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_7", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_7", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_7", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_7", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_7", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_7", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_7", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_7", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_7", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_7", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_7", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_7", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_7", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_7", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_7", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_7", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_7", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_7", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_7", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_7", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_7", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_7", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_7", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_7", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_7", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_7", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_7", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_7", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_7", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_7", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_7", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_7", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_7", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_7", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_7", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_7", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_7", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_7", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_7", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_7", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_7", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_7", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_7", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_7", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_7", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_7", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_7", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_7", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_7", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_7", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_7", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_7", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_7", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_7", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_7", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_7", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_7", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_7", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_7", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_7", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_7", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_7", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_7", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_7", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_7", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_7", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_7", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_7", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_7", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_7", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_7", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_7", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_7", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_7", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_7", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_7", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_7", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_7", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_7", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_7", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_7", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_7", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_7", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_7", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_7", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_7", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_7", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_7", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_7", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_7", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_7", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_7", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_7", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_7", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_7", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_7", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_7", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_7", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_7", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_7", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_7", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_7", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_7", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_7", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_7", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_7", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_7", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_7", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_7", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_7", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_7", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_7", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_7", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_7", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_7", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_7", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_7", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_7", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_7", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_7", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_7", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_7", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_7", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_7", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_7", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_7", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_7", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_7", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_7", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_7", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_7", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_7", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_7", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_7", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_7", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_7", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_7", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_7", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_7", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_7", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_7", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_7", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_7", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_7", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_7", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_7", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_7", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_7", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_7", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_7", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_7", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_7", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_7", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_7", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -6 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_6", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_6", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_6", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_6", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_6", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_6", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_6", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_6", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_6", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_6", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_6", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_6", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_6", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_6", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_6", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_6", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_6", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_6", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_6", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_6", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_6", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_6", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_6", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_6", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_6", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_6", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_6", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_6", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_6", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_6", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_6", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_6", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_6", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_6", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_6", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_6", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_6", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_6", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_6", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_6", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_6", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_6", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_6", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_6", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_6", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_6", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_6", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_6", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_6", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_6", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_6", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_6", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_6", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_6", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_6", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_6", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_6", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_6", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_6", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_6", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_6", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_6", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_6", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_6", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_6", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_6", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_6", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_6", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_6", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_6", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_6", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_6", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_6", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_6", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_6", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_6", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_6", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_6", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_6", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_6", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_6", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_6", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_6", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_6", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_6", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_6", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_6", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_6", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_6", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_6", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_6", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_6", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_6", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_6", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_6", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_6", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_6", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_6", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_6", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_6", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_6", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_6", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_6", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_6", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_6", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_6", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_6", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_6", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_6", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_6", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_6", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_6", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_6", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_6", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_6", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_6", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_6", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_6", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_6", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_6", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_6", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_6", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_6", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_6", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_6", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_6", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_6", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_6", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_6", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_6", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_6", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_6", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_6", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_6", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_6", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_6", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_6", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_6", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_6", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_6", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_6", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_6", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_6", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_6", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_6", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_6", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_6", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_6", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_6", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_6", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_6", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_6", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_6", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_6", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_6", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_6", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_6", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_6", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_6", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_6", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_6", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_6", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_6", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_6", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_6", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_6", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_6", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_6", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_6", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_6", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_6", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_6", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_6", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_6", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_6", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_6", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_6", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_6", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_6", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_6", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_6", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_6", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_6", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_6", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_6", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_6", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_6", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_6", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_6", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_6", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_6", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_6", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -5 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_5", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_5", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_5", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_5", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_5", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_5", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_5", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_5", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_5", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_5", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_5", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_5", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_5", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_5", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_5", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_5", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_5", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_5", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_5", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_5", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_5", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_5", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_5", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_5", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_5", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_5", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_5", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_5", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_5", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_5", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_5", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_5", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_5", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_5", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_5", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_5", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_5", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_5", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_5", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_5", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_5", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_5", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_5", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_5", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_5", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_5", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_5", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_5", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_5", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_5", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_5", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_5", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_5", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_5", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_5", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_5", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_5", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_5", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_5", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_5", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_5", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_5", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_5", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_5", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_5", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_5", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_5", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_5", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_5", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_5", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_5", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_5", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_5", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_5", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_5", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_5", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_5", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_5", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_5", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_5", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_5", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_5", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_5", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_5", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_5", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_5", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_5", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_5", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_5", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_5", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_5", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_5", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_5", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_5", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_5", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_5", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_5", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_5", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_5", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_5", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_5", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_5", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_5", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_5", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_5", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_5", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_5", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_5", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_5", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_5", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_5", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_5", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_5", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_5", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_5", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_5", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_5", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_5", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_5", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_5", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_5", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_5", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_5", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_5", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_5", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_5", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_5", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_5", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_5", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_5", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_5", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_5", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_5", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_5", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_5", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_5", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_5", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_5", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_5", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_5", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_5", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_5", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_5", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_5", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_5", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_5", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_5", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_5", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_5", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_5", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_5", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_5", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_5", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_5", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_5", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_5", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_5", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_5", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_5", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_5", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_5", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_5", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_5", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_5", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_5", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_5", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_5", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_5", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_5", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_5", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_5", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_5", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_5", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_5", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_5", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_5", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_5", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_5", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_5", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_5", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_5", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_5", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_5", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_5", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_5", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_5", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_5", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_5", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_5", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_5", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_5", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_5", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_4", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_4", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_4", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_4", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_4", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_4", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_4", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_4", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_4", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_4", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_4", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_4", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_4", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_4", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_4", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_4", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_4", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_4", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_4", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_4", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_4", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_4", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_4", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_4", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_4", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_4", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_4", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_4", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_4", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_4", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_4", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_4", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_4", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_4", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_4", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_4", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_4", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_4", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_4", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_4", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_4", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_4", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_4", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_4", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_4", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_4", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_4", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_4", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_4", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_4", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_4", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_4", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN13", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP13", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_4", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_4", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_4", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_4", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_4", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_4", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_4", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_4", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_4", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_4", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_4", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_4", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_4", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_4", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_4", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_4", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_4", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_4", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_4", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_4", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_4", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_4", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_4", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_4", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_4", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_4", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_4", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_4", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_4", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_4", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_4", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_4", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_4", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_4", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_4", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_4", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_4", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_4", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_4", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_4", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_4", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_4", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_4", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_4", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_4", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_4", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_4", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_4", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_4", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_4", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_4", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_4", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_4", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_4", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_4", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_4", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_4", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_4", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_4", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_4", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_4", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_4", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_4", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_4", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_4", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_4", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_4", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_4", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_4", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_4", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_4", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_4", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_4", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_4", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_4", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_4", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_4", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_4", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_4", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_4", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_4", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_4", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_4", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_4", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_4", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_4", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_4", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_4", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_4", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_4", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_4", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_4", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_4", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_4", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_4", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_4", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_4", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_4", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_4", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_4", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_4", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_4", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_4", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_4", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_4", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_4", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_4", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_4", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_4", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_4", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_4", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_4", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_4", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_4", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_4", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_4", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_4", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_4", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_4", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_4", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_4", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_4", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_4", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_4", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_4", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_4", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_4", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_4", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_4", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_4", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_4", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_4", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_4", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_4", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_4", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_4", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_4", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_4", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_4", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_4", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_3", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_3", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_3", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_3", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_3", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_3", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_3", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_3", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_3", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_3", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_3", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_3", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_3", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_3", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_3", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_3", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_3", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_3", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_3", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_3", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_3", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_3", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_3", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_3", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_3", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_3", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_3", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_3", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_3", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_3", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_3", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_3", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_3", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_3", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_3", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_3", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_3", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_3", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_3", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_3", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_3", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_3", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_3", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_3", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_3", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_3", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_3", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_3", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_3", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_3", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_3", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_3", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_3", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_3", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_3", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_3", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_3", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_3", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_3", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_3", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_3", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_3", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_3", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_3", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_3", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_3", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_3", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_3", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_3", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_3", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_3", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_3", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_3", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_3", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_3", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_3", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_3", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_3", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_3", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_3", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_3", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_3", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_3", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_3", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_3", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_3", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_3", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_3", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_3", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_3", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_3", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_3", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_3", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_3", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_3", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_3", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_3", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_3", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_3", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_3", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_3", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_3", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_3", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_3", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_3", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_3", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_3", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_3", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_3", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_3", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_3", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_3", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_3", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_3", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_3", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_3", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_3", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_3", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_3", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_3", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_3", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_3", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_3", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_3", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_3", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_3", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_3", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_3", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_3", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_3", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_3", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_3", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_3", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_3", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_3", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_3", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_3", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_3", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_3", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_3", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_3", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_3", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_3", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_3", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_3", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_3", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_3", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_3", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_3", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_3", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_3", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_3", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_3", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_3", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_3", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_3", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_3", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_3", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_3", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_3", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_3", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_3", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_3", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_3", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_3", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_3", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_3", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_3", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_3", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_3", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_3", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_3", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_3", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_3", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_3", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_3", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_3", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_3", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_3", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_3", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_3", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_3", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_3", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_3", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_3", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_3", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_3", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_3", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_3", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_3", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_3", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_2", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_2", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_2", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_2", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_2", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_2", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_2", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_2", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_2", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_2", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_2", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_2", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_2", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_2", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_2", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_2", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_2", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_2", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_2", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_2", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_2", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_2", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_2", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_2", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_2", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_2", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_2", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_2", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_2", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_2", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_2", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_2", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_2", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_2", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_2", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_2", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_2", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_2", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_2", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_2", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_2", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_2", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_2", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_2", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_2", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_2", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_2", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_2", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_2", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_2", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_2", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_2", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_2", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_2", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_2", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_2", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_2", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_2", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_2", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_2", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_2", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_2", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_2", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_2", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_2", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_2", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_2", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_2", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_2", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_2", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_2", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_2", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_2", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_2", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_2", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_2", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_2", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_2", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_2", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_2", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_2", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_2", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_2", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_2", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_2", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_2", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_2", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_2", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_2", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_2", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_2", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_2", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_2", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_2", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_2", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_2", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_2", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_2", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_2", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_2", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_2", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_2", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_2", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_2", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_2", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_2", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_2", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_2", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_2", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_2", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_2", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_2", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_2", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_2", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_2", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_2", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_2", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_2", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_2", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_2", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_2", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_2", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_2", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_2", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_2", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_2", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_2", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_2", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_2", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_2", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_2", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_2", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_2", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_2", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_2", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_2", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_2", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_2", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_2", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_2", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_2", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_2", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_2", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_2", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_2", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_2", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_2", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_2", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_2", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_2", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_2", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_2", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_2", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_2", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_2", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_2", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_2", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_2", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_2", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_2", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_2", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_2", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_2", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_2", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_2", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_2", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_2", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_2", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_2", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_2", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_2", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_2", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_2", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_2", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_2", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_2", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_2", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_2", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_2", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_2", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_2", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_2", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_2", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_2", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_2", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_2", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_2", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_2", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_2", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_2", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_2", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_2", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_1", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_1", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_1", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_1", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_1", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_1", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_1", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_1", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_1", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_1", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_1", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_1", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_1", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_1", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_1", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_1", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_1", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_1", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_1", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_1", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_1", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_1", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_1", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_1", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_1", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_1", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_1", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_1", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_1", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_1", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_1", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_1", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_1", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_1", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_1", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_1", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_1", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_1", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_1", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_1", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_1", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_1", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_1", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_1", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_1", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_1", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_1", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_1", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_1", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_1", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_1", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_1", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_1", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_1", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_1", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_1", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_1", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_1", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_1", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_1", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_1", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_1", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_1", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_1", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_1", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_1", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_1", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_1", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_1", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_1", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_1", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_1", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_1", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_1", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_1", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_1", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_1", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_1", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_1", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_1", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_1", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_1", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_1", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_1", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_1", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_1", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_1", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_1", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_1", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_1", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_1", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_1", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_1", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_1", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_1", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_1", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_1", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_1", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_1", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_1", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_1", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_1", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_1", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_1", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_1", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_1", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_1", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_1", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_1", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_1", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_1", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_1", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_1", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_1", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_1", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_1", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_1", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_1", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_1", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_1", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_1", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_1", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_1", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_1", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_1", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_1", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_1", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_1", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_1", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_1", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_1", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_1", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_1", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_1", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_1", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_1", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_1", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_1", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_1", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_1", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_1", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_1", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_1", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_1", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_1", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_1", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_1", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_1", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_1", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_1", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_1", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_1", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_1", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_1", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_1", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_1", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_1", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_1", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_1", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_1", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_1", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_1", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_1", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_1", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_1", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_1", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_1", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_1", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_1", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_1", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_1", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_1", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_1", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_1", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_1", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_1", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_1", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_1", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_1", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_1", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_1", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_1", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_1", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_1", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_1", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_1", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_1", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_1", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_1", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_1", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_1", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_1", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "MONITOR_MID", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_0", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_0", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_0", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_0", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_0", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_0", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_0", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_0", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_0", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_0", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_0", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_0", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_0", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_0", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_0", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_0", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_0", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_0", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_0", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_0", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_0", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_0", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_0", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_0", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_0", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_0", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_0", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_0", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_0", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_0", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_0", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_0", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_0", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_0", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_0", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_0", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_0", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_0", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_0", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_0", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_0", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_0", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_0", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_0", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_0", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_0", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_0", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_0", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_0", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_0", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_0", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_0", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN6", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP6", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_0", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_0", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_0", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_0", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_0", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_0", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_0", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_0", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_0", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_0", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_0", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_0", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_0", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_0", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_0", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_0", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_0", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_0", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_0", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_0", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_0", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_0", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_0", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_0", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_0", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_0", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_0", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_0", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_0", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_0", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_0", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_0", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_0", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_0", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_0", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_0", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_0", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_0", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_0", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_0", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_0", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_0", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_0", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_0", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_0", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_0", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_0", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_0", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_0", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_0", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_0", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_0", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_0", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_0", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_0", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_0", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_0", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_0", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_0", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_0", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_0", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_0", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_0", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_0", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_0", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_0", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_0", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_0", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_0", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_0", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_0", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_0", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_0", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_0", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_0", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_0", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_0", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_0", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_0", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_0", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_0", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_0", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_0", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_0", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_0", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_0", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_0", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_0", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_0", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_0", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_0", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_0", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_0", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_0", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_0", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_0", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_0", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_0", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_0", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_0", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_0", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_0", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_0", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_0", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_0", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_0", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_0", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_0", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_0", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_0", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_0", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_0", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_0", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_0", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_0", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_0", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_0", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_0", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_0", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_0", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_0", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_0", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_0", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_0", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_0", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_0", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_0", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_0", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_0", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_0", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_0", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_0", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_0", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_0", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_0", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_0", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_0", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_0", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_0", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_0", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -4 + ], + "tile_types": [ + "MONITOR_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_4", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_4", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_4", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_4", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_4", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_4", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_4", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_4", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_4", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_4", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_4", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_4", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_4", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_4", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_4", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_4", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_4", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_4", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_4", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_4", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_4", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_4", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_4", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_4", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_4", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_4", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_4", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_4", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_4", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_4", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_4", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_4", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_4", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_4", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_4", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_4", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_4", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_4", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_4", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_4", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_4", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_4", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_4", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_4", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_4", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_4", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_4", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_4", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_4", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_4", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_4", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_4", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_4", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_4", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_4", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_4", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_4", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_4", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_4", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_4", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_4", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_4", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_4", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_4", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_4", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_4", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_4", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_4", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_4", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_4", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_4", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_4", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_4", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_4", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_4", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_4", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_4", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_4", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_4", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_4", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_4", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_4", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_4", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_4", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_4", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_4", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_4", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_4", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_4", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_4", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_4", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_4", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_4", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_4", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_4", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_4", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_4", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_4", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_4", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_4", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_4", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_4", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_4", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_4", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_4", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_4", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_4", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_4", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_4", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_4", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_4", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_4", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_4", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_4", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_4", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_4", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_4", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_4", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_4", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_4", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_4", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_4", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_4", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_4", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_4", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_4", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_4", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_4", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_4", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_4", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_4", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_4", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_4", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_4", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_4", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_4", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_4", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_4", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_4", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_4", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_4", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_4", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_4", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_4", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_4", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_4", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_4", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_4", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_4", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_4", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_4", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_4", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_4", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_4", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_4", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_4", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_4", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_4", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_4", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_4", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_4", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_4", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_4", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_4", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_4", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_4", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_4", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_4", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_4", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_4", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_4", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_4", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_4", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_4", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_4", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_4", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_4", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_4", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_4", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_4", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_4", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_4", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_4", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_4", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_4", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_4", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_4", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_4", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_4", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_4", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_4", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_4", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -3 + ], + "tile_types": [ + "MONITOR_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_3", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_3", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_3", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_3", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_3", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_3", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_3", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_3", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_3", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_3", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_3", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_3", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_3", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_3", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_3", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_3", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_3", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_3", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_3", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_3", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_3", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_3", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_3", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_3", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_3", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_3", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_3", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_3", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_3", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_3", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_3", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_3", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_3", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_3", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_3", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_3", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_3", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_3", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_3", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_3", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_3", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_3", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_3", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_3", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_3", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_3", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_3", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_3", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_3", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_3", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_3", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_3", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_3", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_3", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_3", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_3", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_3", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_3", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_3", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_3", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_3", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_3", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_3", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_3", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_3", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_3", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_3", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_3", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_3", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_3", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_3", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_3", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_3", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_3", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_3", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_3", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_3", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_3", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_3", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_3", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_3", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_3", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_3", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_3", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_3", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_3", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_3", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_3", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_3", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_3", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_3", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_3", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_3", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_3", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_3", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_3", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_3", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_3", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_3", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_3", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_3", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_3", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_3", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_3", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_3", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_3", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_3", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_3", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_3", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_3", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_3", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_3", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_3", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_3", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_3", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_3", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_3", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_3", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_3", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_3", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_3", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_3", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_3", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_3", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_3", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_3", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_3", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_3", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_3", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_3", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_3", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_3", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_3", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_3", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_3", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_3", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_3", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_3", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_3", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_3", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_3", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_3", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_3", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_3", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_3", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_3", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_3", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_3", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_3", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_3", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_3", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_3", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_3", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_3", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_3", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_3", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_3", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_3", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_3", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_3", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_3", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_3", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_3", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_3", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_3", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_3", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_3", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_3", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_3", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_3", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_3", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_3", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_3", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_3", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_3", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_3", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_3", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_3", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_3", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_3", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_3", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_3", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_3", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_3", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_3", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_3", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_3", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_3", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_3", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_3", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_3", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_3", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -2 + ], + "tile_types": [ + "MONITOR_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_2", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_2", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_2", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_2", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_2", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_2", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_2", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_2", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_2", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_2", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_2", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_2", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_2", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_2", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_2", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_2", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_2", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_2", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_2", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_2", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_2", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_2", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_2", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_2", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_2", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_2", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_2", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_2", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_2", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_2", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_2", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_2", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_2", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_2", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_2", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_2", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_2", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_2", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_2", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_2", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_2", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_2", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_2", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_2", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_2", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_2", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_2", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_2", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_2", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_2", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_2", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_2", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN4", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP4", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_2", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_2", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_2", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_2", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_2", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_2", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_2", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_2", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_2", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_2", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_2", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_2", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_2", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_2", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_2", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_2", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_2", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_2", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_2", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_2", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_2", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_2", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_2", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_2", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_2", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_2", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_2", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_2", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_2", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_2", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_2", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_2", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_2", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_2", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_2", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_2", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_2", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_2", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_2", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_2", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_2", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_2", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_2", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_2", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_2", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_2", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_2", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_2", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_2", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_2", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_2", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_2", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_2", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_2", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_2", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_2", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_2", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_2", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_2", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_2", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_2", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_2", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_2", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_2", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_2", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_2", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_2", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_2", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_2", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_2", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_2", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_2", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_2", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_2", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_2", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_2", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_2", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_2", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_2", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_2", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_2", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_2", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_2", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_2", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_2", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_2", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_2", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_2", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_2", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_2", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_2", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_2", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_2", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_2", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_2", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_2", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_2", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_2", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_2", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_2", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_2", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_2", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_2", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_2", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_2", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_2", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_2", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_2", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_2", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_2", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_2", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_2", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_2", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_2", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_2", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_2", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_2", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_2", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_2", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_2", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_2", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_2", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_2", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_2", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_2", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_2", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_2", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_2", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_2", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_2", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_2", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_2", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_2", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_2", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_2", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_2", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_2", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_2", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_2", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_2", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + -1 + ], + "tile_types": [ + "MONITOR_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_1", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_1", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_1", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_1", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_1", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_1", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_1", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_1", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_1", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_1", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_1", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_1", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_1", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_1", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_1", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_1", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_1", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_1", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_1", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_1", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_1", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_1", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_1", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_1", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_1", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_1", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_1", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_1", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_1", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_1", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_1", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_1", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_1", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_1", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_1", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_1", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_1", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_1", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_1", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_1", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_1", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_1", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_1", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_1", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_1", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_1", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_1", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_1", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_1", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_1", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_1", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_1", + "VFRAME_FAN7" + ], + [ + "MONITOR_IMUX0_1", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_1", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_1", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_1", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_1", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_1", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_1", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_1", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_1", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_1", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_1", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_1", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_1", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_1", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_1", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_1", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_1", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_1", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_1", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_1", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_1", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_1", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_1", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_1", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_1", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_1", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_1", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_1", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_1", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_1", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_1", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_1", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_1", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_1", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_1", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_1", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_1", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_1", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_1", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_1", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_1", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_1", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_1", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_1", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_1", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_1", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_1", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_1", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_1", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_1", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_1", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_1", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_1", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_1", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_1", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_1", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_1", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_1", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_1", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_1", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_1", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_1", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_1", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_1", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_1", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_1", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_1", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_1", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_1", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_1", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_1", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_1", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_1", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_1", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_1", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_1", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_1", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_1", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_1", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_1", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_1", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_1", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_1", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_1", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_1", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_1", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_1", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_1", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_1", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_1", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_1", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_1", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_1", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_1", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_1", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_1", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_1", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_1", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_1", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_1", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_1", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_1", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_1", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_1", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_1", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_1", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_1", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_1", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_1", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_1", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_1", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_1", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_1", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_1", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_1", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_1", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_1", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_1", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_1", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_1", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_1", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_1", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_1", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_1", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_1", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_1", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_1", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_1", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_1", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_1", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_1", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_1", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_1", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_1", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_1", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_1", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_1", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_1", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_1", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_1", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "MONITOR_TOP", + "VFRAME" + ], + "wire_pairs": [ + [ + "MONITOR_BYP0_0", + "VFRAME_BYP0" + ], + [ + "MONITOR_BYP1_0", + "VFRAME_BYP1" + ], + [ + "MONITOR_BYP2_0", + "VFRAME_BYP2" + ], + [ + "MONITOR_BYP3_0", + "VFRAME_BYP3" + ], + [ + "MONITOR_BYP4_0", + "VFRAME_BYP4" + ], + [ + "MONITOR_BYP5_0", + "VFRAME_BYP5" + ], + [ + "MONITOR_BYP6_0", + "VFRAME_BYP6" + ], + [ + "MONITOR_BYP7_0", + "VFRAME_BYP7" + ], + [ + "MONITOR_CLK0_0", + "VFRAME_CLK0" + ], + [ + "MONITOR_CLK1_0", + "VFRAME_CLK1" + ], + [ + "MONITOR_CTRL0_0", + "VFRAME_CTRL0" + ], + [ + "MONITOR_CTRL1_0", + "VFRAME_CTRL1" + ], + [ + "MONITOR_EE2A0_0", + "VFRAME_EE2A0" + ], + [ + "MONITOR_EE2A1_0", + "VFRAME_EE2A1" + ], + [ + "MONITOR_EE2A2_0", + "VFRAME_EE2A2" + ], + [ + "MONITOR_EE2A3_0", + "VFRAME_EE2A3" + ], + [ + "MONITOR_EE2BEG0_0", + "VFRAME_EE2BEG0" + ], + [ + "MONITOR_EE2BEG1_0", + "VFRAME_EE2BEG1" + ], + [ + "MONITOR_EE2BEG2_0", + "VFRAME_EE2BEG2" + ], + [ + "MONITOR_EE2BEG3_0", + "VFRAME_EE2BEG3" + ], + [ + "MONITOR_EE4A0_0", + "VFRAME_EE4A0" + ], + [ + "MONITOR_EE4A1_0", + "VFRAME_EE4A1" + ], + [ + "MONITOR_EE4A2_0", + "VFRAME_EE4A2" + ], + [ + "MONITOR_EE4A3_0", + "VFRAME_EE4A3" + ], + [ + "MONITOR_EE4B0_0", + "VFRAME_EE4B0" + ], + [ + "MONITOR_EE4B1_0", + "VFRAME_EE4B1" + ], + [ + "MONITOR_EE4B2_0", + "VFRAME_EE4B2" + ], + [ + "MONITOR_EE4B3_0", + "VFRAME_EE4B3" + ], + [ + "MONITOR_EE4BEG0_0", + "VFRAME_EE4BEG0" + ], + [ + "MONITOR_EE4BEG1_0", + "VFRAME_EE4BEG1" + ], + [ + "MONITOR_EE4BEG2_0", + "VFRAME_EE4BEG2" + ], + [ + "MONITOR_EE4BEG3_0", + "VFRAME_EE4BEG3" + ], + [ + "MONITOR_EE4C0_0", + "VFRAME_EE4C0" + ], + [ + "MONITOR_EE4C1_0", + "VFRAME_EE4C1" + ], + [ + "MONITOR_EE4C2_0", + "VFRAME_EE4C2" + ], + [ + "MONITOR_EE4C3_0", + "VFRAME_EE4C3" + ], + [ + "MONITOR_EL1BEG0_0", + "VFRAME_EL1BEG0" + ], + [ + "MONITOR_EL1BEG1_0", + "VFRAME_EL1BEG1" + ], + [ + "MONITOR_EL1BEG2_0", + "VFRAME_EL1BEG2" + ], + [ + "MONITOR_EL1BEG3_0", + "VFRAME_EL1BEG3" + ], + [ + "MONITOR_ER1BEG0_0", + "VFRAME_ER1BEG0" + ], + [ + "MONITOR_ER1BEG1_0", + "VFRAME_ER1BEG1" + ], + [ + "MONITOR_ER1BEG2_0", + "VFRAME_ER1BEG2" + ], + [ + "MONITOR_ER1BEG3_0", + "VFRAME_ER1BEG3" + ], + [ + "MONITOR_FAN0_0", + "VFRAME_FAN0" + ], + [ + "MONITOR_FAN1_0", + "VFRAME_FAN1" + ], + [ + "MONITOR_FAN2_0", + "VFRAME_FAN2" + ], + [ + "MONITOR_FAN3_0", + "VFRAME_FAN3" + ], + [ + "MONITOR_FAN4_0", + "VFRAME_FAN4" + ], + [ + "MONITOR_FAN5_0", + "VFRAME_FAN5" + ], + [ + "MONITOR_FAN6_0", + "VFRAME_FAN6" + ], + [ + "MONITOR_FAN7_0", + "VFRAME_FAN7" + ], + [ + "MONITOR_HORIZ_VAUXN12", + "VFRAME_MONITOR_N" + ], + [ + "MONITOR_HORIZ_VAUXP12", + "VFRAME_MONITOR_P" + ], + [ + "MONITOR_IMUX0_0", + "VFRAME_IMUX0" + ], + [ + "MONITOR_IMUX1_0", + "VFRAME_IMUX1" + ], + [ + "MONITOR_IMUX2_0", + "VFRAME_IMUX2" + ], + [ + "MONITOR_IMUX3_0", + "VFRAME_IMUX3" + ], + [ + "MONITOR_IMUX4_0", + "VFRAME_IMUX4" + ], + [ + "MONITOR_IMUX5_0", + "VFRAME_IMUX5" + ], + [ + "MONITOR_IMUX6_0", + "VFRAME_IMUX6" + ], + [ + "MONITOR_IMUX7_0", + "VFRAME_IMUX7" + ], + [ + "MONITOR_IMUX8_0", + "VFRAME_IMUX8" + ], + [ + "MONITOR_IMUX9_0", + "VFRAME_IMUX9" + ], + [ + "MONITOR_IMUX10_0", + "VFRAME_IMUX10" + ], + [ + "MONITOR_IMUX11_0", + "VFRAME_IMUX11" + ], + [ + "MONITOR_IMUX12_0", + "VFRAME_IMUX12" + ], + [ + "MONITOR_IMUX13_0", + "VFRAME_IMUX13" + ], + [ + "MONITOR_IMUX14_0", + "VFRAME_IMUX14" + ], + [ + "MONITOR_IMUX15_0", + "VFRAME_IMUX15" + ], + [ + "MONITOR_IMUX16_0", + "VFRAME_IMUX16" + ], + [ + "MONITOR_IMUX17_0", + "VFRAME_IMUX17" + ], + [ + "MONITOR_IMUX18_0", + "VFRAME_IMUX18" + ], + [ + "MONITOR_IMUX19_0", + "VFRAME_IMUX19" + ], + [ + "MONITOR_IMUX20_0", + "VFRAME_IMUX20" + ], + [ + "MONITOR_IMUX21_0", + "VFRAME_IMUX21" + ], + [ + "MONITOR_IMUX22_0", + "VFRAME_IMUX22" + ], + [ + "MONITOR_IMUX23_0", + "VFRAME_IMUX23" + ], + [ + "MONITOR_IMUX24_0", + "VFRAME_IMUX24" + ], + [ + "MONITOR_IMUX25_0", + "VFRAME_IMUX25" + ], + [ + "MONITOR_IMUX26_0", + "VFRAME_IMUX26" + ], + [ + "MONITOR_IMUX27_0", + "VFRAME_IMUX27" + ], + [ + "MONITOR_IMUX28_0", + "VFRAME_IMUX28" + ], + [ + "MONITOR_IMUX29_0", + "VFRAME_IMUX29" + ], + [ + "MONITOR_IMUX30_0", + "VFRAME_IMUX30" + ], + [ + "MONITOR_IMUX31_0", + "VFRAME_IMUX31" + ], + [ + "MONITOR_IMUX32_0", + "VFRAME_IMUX32" + ], + [ + "MONITOR_IMUX33_0", + "VFRAME_IMUX33" + ], + [ + "MONITOR_IMUX34_0", + "VFRAME_IMUX34" + ], + [ + "MONITOR_IMUX35_0", + "VFRAME_IMUX35" + ], + [ + "MONITOR_IMUX36_0", + "VFRAME_IMUX36" + ], + [ + "MONITOR_IMUX37_0", + "VFRAME_IMUX37" + ], + [ + "MONITOR_IMUX38_0", + "VFRAME_IMUX38" + ], + [ + "MONITOR_IMUX39_0", + "VFRAME_IMUX39" + ], + [ + "MONITOR_IMUX40_0", + "VFRAME_IMUX40" + ], + [ + "MONITOR_IMUX41_0", + "VFRAME_IMUX41" + ], + [ + "MONITOR_IMUX42_0", + "VFRAME_IMUX42" + ], + [ + "MONITOR_IMUX43_0", + "VFRAME_IMUX43" + ], + [ + "MONITOR_IMUX44_0", + "VFRAME_IMUX44" + ], + [ + "MONITOR_IMUX45_0", + "VFRAME_IMUX45" + ], + [ + "MONITOR_IMUX46_0", + "VFRAME_IMUX46" + ], + [ + "MONITOR_IMUX47_0", + "VFRAME_IMUX47" + ], + [ + "MONITOR_LH1_0", + "VFRAME_LH1" + ], + [ + "MONITOR_LH2_0", + "VFRAME_LH2" + ], + [ + "MONITOR_LH3_0", + "VFRAME_LH3" + ], + [ + "MONITOR_LH4_0", + "VFRAME_LH4" + ], + [ + "MONITOR_LH5_0", + "VFRAME_LH5" + ], + [ + "MONITOR_LH6_0", + "VFRAME_LH6" + ], + [ + "MONITOR_LH7_0", + "VFRAME_LH7" + ], + [ + "MONITOR_LH8_0", + "VFRAME_LH8" + ], + [ + "MONITOR_LH9_0", + "VFRAME_LH9" + ], + [ + "MONITOR_LH10_0", + "VFRAME_LH10" + ], + [ + "MONITOR_LH11_0", + "VFRAME_LH11" + ], + [ + "MONITOR_LH12_0", + "VFRAME_LH12" + ], + [ + "MONITOR_NE2A0_0", + "VFRAME_NE2A0" + ], + [ + "MONITOR_NE2A1_0", + "VFRAME_NE2A1" + ], + [ + "MONITOR_NE2A2_0", + "VFRAME_NE2A2" + ], + [ + "MONITOR_NE2A3_0", + "VFRAME_NE2A3" + ], + [ + "MONITOR_NE4BEG0_0", + "VFRAME_NE4BEG0" + ], + [ + "MONITOR_NE4BEG1_0", + "VFRAME_NE4BEG1" + ], + [ + "MONITOR_NE4BEG2_0", + "VFRAME_NE4BEG2" + ], + [ + "MONITOR_NE4BEG3_0", + "VFRAME_NE4BEG3" + ], + [ + "MONITOR_NE4C0_0", + "VFRAME_NE4C0" + ], + [ + "MONITOR_NE4C1_0", + "VFRAME_NE4C1" + ], + [ + "MONITOR_NE4C2_0", + "VFRAME_NE4C2" + ], + [ + "MONITOR_NE4C3_0", + "VFRAME_NE4C3" + ], + [ + "MONITOR_NW2A0_0", + "VFRAME_NW2A0" + ], + [ + "MONITOR_NW2A1_0", + "VFRAME_NW2A1" + ], + [ + "MONITOR_NW2A2_0", + "VFRAME_NW2A2" + ], + [ + "MONITOR_NW2A3_0", + "VFRAME_NW2A3" + ], + [ + "MONITOR_NW4A0_0", + "VFRAME_NW4A0" + ], + [ + "MONITOR_NW4A1_0", + "VFRAME_NW4A1" + ], + [ + "MONITOR_NW4A2_0", + "VFRAME_NW4A2" + ], + [ + "MONITOR_NW4A3_0", + "VFRAME_NW4A3" + ], + [ + "MONITOR_NW4END0_0", + "VFRAME_NW4END0" + ], + [ + "MONITOR_NW4END1_0", + "VFRAME_NW4END1" + ], + [ + "MONITOR_NW4END2_0", + "VFRAME_NW4END2" + ], + [ + "MONITOR_NW4END3_0", + "VFRAME_NW4END3" + ], + [ + "MONITOR_SE2A0_0", + "VFRAME_SE2A0" + ], + [ + "MONITOR_SE2A1_0", + "VFRAME_SE2A1" + ], + [ + "MONITOR_SE2A2_0", + "VFRAME_SE2A2" + ], + [ + "MONITOR_SE2A3_0", + "VFRAME_SE2A3" + ], + [ + "MONITOR_SE4BEG0_0", + "VFRAME_SE4BEG0" + ], + [ + "MONITOR_SE4BEG1_0", + "VFRAME_SE4BEG1" + ], + [ + "MONITOR_SE4BEG2_0", + "VFRAME_SE4BEG2" + ], + [ + "MONITOR_SE4BEG3_0", + "VFRAME_SE4BEG3" + ], + [ + "MONITOR_SE4C0_0", + "VFRAME_SE4C0" + ], + [ + "MONITOR_SE4C1_0", + "VFRAME_SE4C1" + ], + [ + "MONITOR_SE4C2_0", + "VFRAME_SE4C2" + ], + [ + "MONITOR_SE4C3_0", + "VFRAME_SE4C3" + ], + [ + "MONITOR_SW2A0_0", + "VFRAME_SW2A0" + ], + [ + "MONITOR_SW2A1_0", + "VFRAME_SW2A1" + ], + [ + "MONITOR_SW2A2_0", + "VFRAME_SW2A2" + ], + [ + "MONITOR_SW2A3_0", + "VFRAME_SW2A3" + ], + [ + "MONITOR_SW4A0_0", + "VFRAME_SW4A0" + ], + [ + "MONITOR_SW4A1_0", + "VFRAME_SW4A1" + ], + [ + "MONITOR_SW4A2_0", + "VFRAME_SW4A2" + ], + [ + "MONITOR_SW4A3_0", + "VFRAME_SW4A3" + ], + [ + "MONITOR_SW4END0_0", + "VFRAME_SW4END0" + ], + [ + "MONITOR_SW4END1_0", + "VFRAME_SW4END1" + ], + [ + "MONITOR_SW4END2_0", + "VFRAME_SW4END2" + ], + [ + "MONITOR_SW4END3_0", + "VFRAME_SW4END3" + ], + [ + "MONITOR_WL1END0_0", + "VFRAME_WL1END0" + ], + [ + "MONITOR_WL1END1_0", + "VFRAME_WL1END1" + ], + [ + "MONITOR_WL1END2_0", + "VFRAME_WL1END2" + ], + [ + "MONITOR_WL1END3_0", + "VFRAME_WL1END3" + ], + [ + "MONITOR_WR1END0_0", + "VFRAME_WR1END0" + ], + [ + "MONITOR_WR1END1_0", + "VFRAME_WR1END1" + ], + [ + "MONITOR_WR1END2_0", + "VFRAME_WR1END2" + ], + [ + "MONITOR_WR1END3_0", + "VFRAME_WR1END3" + ], + [ + "MONITOR_WW2A0_0", + "VFRAME_WW2A0" + ], + [ + "MONITOR_WW2A1_0", + "VFRAME_WW2A1" + ], + [ + "MONITOR_WW2A2_0", + "VFRAME_WW2A2" + ], + [ + "MONITOR_WW2A3_0", + "VFRAME_WW2A3" + ], + [ + "MONITOR_WW2END0_0", + "VFRAME_WW2END0" + ], + [ + "MONITOR_WW2END1_0", + "VFRAME_WW2END1" + ], + [ + "MONITOR_WW2END2_0", + "VFRAME_WW2END2" + ], + [ + "MONITOR_WW2END3_0", + "VFRAME_WW2END3" + ], + [ + "MONITOR_WW4A0_0", + "VFRAME_WW4A0" + ], + [ + "MONITOR_WW4A1_0", + "VFRAME_WW4A1" + ], + [ + "MONITOR_WW4A2_0", + "VFRAME_WW4A2" + ], + [ + "MONITOR_WW4A3_0", + "VFRAME_WW4A3" + ], + [ + "MONITOR_WW4B0_0", + "VFRAME_WW4B0" + ], + [ + "MONITOR_WW4B1_0", + "VFRAME_WW4B1" + ], + [ + "MONITOR_WW4B2_0", + "VFRAME_WW4B2" + ], + [ + "MONITOR_WW4B3_0", + "VFRAME_WW4B3" + ], + [ + "MONITOR_WW4C0_0", + "VFRAME_WW4C0" + ], + [ + "MONITOR_WW4C1_0", + "VFRAME_WW4C1" + ], + [ + "MONITOR_WW4C2_0", + "VFRAME_WW4C2" + ], + [ + "MONITOR_WW4C3_0", + "VFRAME_WW4C3" + ], + [ + "MONITOR_WW4END0_0", + "VFRAME_WW4END0" + ], + [ + "MONITOR_WW4END1_0", + "VFRAME_WW4END1" + ], + [ + "MONITOR_WW4END2_0", + "VFRAME_WW4END2" + ], + [ + "MONITOR_WW4END3_0", + "VFRAME_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -9 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_19", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_19", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_19", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_19", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_19", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_19", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_19", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_19", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_19", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_19", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_19", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_19", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_19", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_19", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_19", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_19", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_19", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_19", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_19", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_19", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_19", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_19", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_19", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_19", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_19", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_19", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_19", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_19", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_19", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_19", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_19", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_19", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_19", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_19", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_19", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_19", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_19", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_19", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_19", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_19", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_19", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_19", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_19", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_19", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_19", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_19", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_19", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_19", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_19", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_19", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_19", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_19", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_19", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_19", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_19", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_19", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_19", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_19", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_19", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_19", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_19", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_19", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_19", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_19", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_19", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_19", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_19", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_19", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_19", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_19", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_19", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_19", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_19", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_19", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_19", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_19", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_19", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_19", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_19", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_19", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_19", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_19", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_19", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_19", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_19", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_19", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_19", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_19", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_19", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_19", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_19", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_19", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_19", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_19", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_19", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_19", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_19", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_19", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_19", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_19", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_19", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_19", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_19", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_19", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_19", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_19", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_19", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_19", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_19", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_19", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_19", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_19", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_19", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_19", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_19", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_19", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_19", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_19", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_19", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_19", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_19", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_19", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_19", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_19", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_19", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_19", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_19", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_19", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_19", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_19", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_19", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_19", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_19", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_19", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_19", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_19", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_19", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_19", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_19", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_19", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_19", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_19", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_19", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_19", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_19", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_19", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_19", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_19", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -8 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_18", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_18", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_18", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_18", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_18", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_18", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_18", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_18", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_18", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_18", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_18", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_18", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_18", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_18", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_18", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_18", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_18", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_18", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_18", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_18", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_18", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_18", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_18", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_18", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_18", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_18", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_18", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_18", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_18", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_18", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_18", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_18", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_18", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_18", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_18", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_18", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_18", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_18", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_18", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_18", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_18", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_18", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_18", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_18", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_18", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_18", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_18", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_18", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_18", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_18", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_18", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_18", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_18", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_18", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_18", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_18", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_18", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_18", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_18", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_18", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_18", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_18", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_18", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_18", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_18", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_18", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_18", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_18", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_18", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_18", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_18", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_18", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_18", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_18", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_18", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_18", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_18", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_18", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_18", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_18", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_18", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_18", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_18", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_18", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_18", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_18", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_18", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_18", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_18", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_18", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_18", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_18", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_18", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_18", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_18", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_18", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_18", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_18", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_18", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_18", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_18", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_18", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_18", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_18", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_18", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_18", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_18", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_18", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_18", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_18", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_18", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_18", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_18", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_18", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_18", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_18", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_18", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_18", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_18", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_18", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_18", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_18", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_18", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_18", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_18", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_18", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_18", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_18", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_18", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_18", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_18", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_18", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_18", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_18", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_18", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_18", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_18", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_18", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_18", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_18", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_18", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_18", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_18", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_18", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_18", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_18", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -7 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_17", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_17", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_17", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_17", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_17", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_17", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_17", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_17", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_17", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_17", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_17", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_17", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_17", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_17", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_17", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_17", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_17", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_17", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_17", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_17", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_17", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_17", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_17", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_17", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_17", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_17", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_17", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_17", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_17", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_17", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_17", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_17", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_17", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_17", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_17", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_17", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_17", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_17", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_17", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_17", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_17", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_17", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_17", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_17", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_17", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_17", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_17", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_17", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_17", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_17", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_17", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_17", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_17", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_17", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_17", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_17", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_17", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_17", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_17", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_17", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_17", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_17", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_17", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_17", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_17", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_17", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_17", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_17", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_17", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_17", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_17", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_17", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_17", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_17", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_17", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_17", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_17", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_17", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_17", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_17", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_17", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_17", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_17", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_17", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_17", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_17", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_17", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_17", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_17", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_17", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_17", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_17", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_17", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_17", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_17", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_17", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_17", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_17", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_17", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_17", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_17", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_17", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_17", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_17", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_17", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_17", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_17", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_17", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_17", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_17", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_17", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_17", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_17", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_17", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_17", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_17", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_17", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_17", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_17", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_17", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_17", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_17", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_17", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_17", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_17", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_17", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_17", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_17", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_17", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_17", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_17", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_17", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_17", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_17", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_17", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_17", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_17", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_17", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_17", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_17", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_17", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_17", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_17", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_17", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_17", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_17", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_17", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_17", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -6 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_16", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_16", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_16", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_16", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_16", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_16", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_16", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_16", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_16", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_16", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_16", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_16", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_16", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_16", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_16", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_16", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_16", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_16", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_16", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_16", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_16", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_16", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_16", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_16", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_16", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_16", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_16", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_16", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_16", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_16", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_16", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_16", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_16", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_16", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_16", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_16", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_16", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_16", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_16", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_16", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_16", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_16", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_16", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_16", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_16", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_16", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_16", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_16", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_16", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_16", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_16", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_16", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_16", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_16", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_16", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_16", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_16", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_16", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_16", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_16", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_16", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_16", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_16", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_16", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_16", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_16", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_16", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_16", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_16", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_16", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_16", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_16", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_16", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_16", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_16", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_16", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_16", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_16", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_16", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_16", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_16", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_16", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_16", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_16", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_16", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_16", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_16", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_16", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_16", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_16", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_16", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_16", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_16", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_16", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_16", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_16", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_16", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_16", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_16", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_16", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_16", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_16", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_16", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_16", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_16", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_16", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_16", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_16", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_16", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_16", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_16", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_16", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_16", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_16", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_16", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_16", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_16", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_16", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_16", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_16", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_16", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_16", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_16", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_16", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_16", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_16", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_16", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_16", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_16", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_16", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_16", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_16", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_16", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_16", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_16", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_16", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_16", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_16", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_16", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_16", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_16", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_16", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_16", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_16", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_16", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_16", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -5 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_15", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_15", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_15", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_15", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_15", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_15", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_15", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_15", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_15", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_15", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_15", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_15", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_15", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_15", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_15", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_15", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_15", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_15", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_15", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_15", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_15", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_15", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_15", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_15", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_15", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_15", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_15", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_15", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_15", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_15", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_15", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_15", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_15", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_15", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_15", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_15", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_15", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_15", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_15", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_15", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_15", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_15", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_15", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_15", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_15", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_15", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_15", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_15", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_15", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_15", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_15", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_15", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_15", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_15", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_15", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_15", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_15", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_15", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_15", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_15", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_15", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_15", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_15", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_15", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_15", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_15", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_15", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_15", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_15", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_15", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_15", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_15", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_15", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_15", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_15", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_15", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_15", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_15", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_15", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_15", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_15", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_15", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_15", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_15", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_15", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_15", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_15", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_15", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_15", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_15", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_15", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_15", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_15", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_15", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_15", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_15", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_15", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_15", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_15", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_15", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_15", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_15", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_15", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_15", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_15", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_15", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_15", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_15", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_15", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_15", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_15", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_15", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_15", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_15", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_15", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_15", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_15", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_15", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_15", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_15", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_15", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_15", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_15", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_15", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_15", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_15", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_15", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_15", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_15", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_15", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_15", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_15", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_15", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_15", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_15", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_15", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_15", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_15", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_15", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_15", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_15", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_15", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_15", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_15", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_15", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_15", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_15", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_15", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -4 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_14", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_14", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_14", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_14", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_14", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_14", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_14", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_14", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_14", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_14", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_14", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_14", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_14", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_14", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_14", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_14", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_14", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_14", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_14", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_14", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_14", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_14", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_14", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_14", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_14", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_14", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_14", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_14", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_14", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_14", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_14", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_14", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_14", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_14", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_14", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_14", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_14", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_14", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_14", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_14", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_14", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_14", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_14", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_14", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_14", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_14", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_14", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_14", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_14", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_14", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_14", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_14", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_14", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_14", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_14", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_14", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_14", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_14", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_14", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_14", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_14", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_14", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_14", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_14", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_14", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_14", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_14", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_14", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_14", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_14", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_14", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_14", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_14", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_14", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_14", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_14", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_14", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_14", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_14", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_14", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_14", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_14", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_14", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_14", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_14", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_14", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_14", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_14", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_14", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_14", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_14", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_14", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_14", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_14", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_14", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_14", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_14", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_14", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_14", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_14", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_14", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_14", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_14", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_14", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_14", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_14", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_14", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_14", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_14", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_14", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_14", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_14", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_14", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_14", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_14", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_14", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_14", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_14", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_14", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_14", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_14", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_14", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_14", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_14", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_14", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_14", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_14", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_14", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_14", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_14", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_14", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_14", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_14", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_14", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_14", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_14", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_14", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_14", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_14", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_14", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_14", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_14", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_14", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_14", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_14", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_14", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -3 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_13", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_13", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_13", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_13", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_13", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_13", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_13", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_13", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_13", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_13", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_13", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_13", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_13", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_13", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_13", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_13", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_13", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_13", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_13", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_13", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_13", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_13", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_13", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_13", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_13", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_13", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_13", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_13", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_13", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_13", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_13", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_13", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_13", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_13", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_13", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_13", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_13", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_13", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_13", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_13", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_13", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_13", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_13", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_13", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_13", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_13", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_13", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_13", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_13", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_13", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_13", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_13", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_13", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_13", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_13", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_13", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_13", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_13", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_13", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_13", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_13", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_13", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_13", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_13", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_13", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_13", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_13", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_13", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_13", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_13", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_13", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_13", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_13", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_13", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_13", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_13", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_13", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_13", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_13", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_13", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_13", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_13", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_13", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_13", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_13", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_13", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_13", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_13", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_13", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_13", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_13", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_13", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_13", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_13", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_13", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_13", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_13", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_13", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_13", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_13", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_13", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_13", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_13", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_13", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_13", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_13", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_13", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_13", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_13", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_13", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_13", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_13", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_13", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_13", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_13", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_13", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_13", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_13", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_13", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_13", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_13", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_13", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_13", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_13", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_13", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_13", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_13", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_13", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_13", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_13", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_13", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_13", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_13", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_13", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_13", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_13", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_13", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_13", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_13", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_13", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_13", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_13", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_13", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_13", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_13", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_13", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_13", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_13", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -2 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_12", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_12", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_12", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_12", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_12", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_12", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_12", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_12", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_12", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_12", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_12", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_12", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_12", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_12", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_12", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_12", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_12", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_12", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_12", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_12", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_12", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_12", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_12", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_12", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_12", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_12", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_12", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_12", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_12", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_12", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_12", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_12", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_12", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_12", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_12", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_12", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_12", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_12", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_12", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_12", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_12", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_12", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_12", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_12", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_12", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_12", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_12", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_12", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_12", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_12", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_12", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_12", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_12", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_12", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_12", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_12", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_12", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_12", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_12", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_12", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_12", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_12", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_12", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_12", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_12", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_12", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_12", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_12", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_12", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_12", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_12", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_12", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_12", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_12", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_12", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_12", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_12", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_12", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_12", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_12", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_12", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_12", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_12", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_12", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_12", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_12", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_12", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_12", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_12", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_12", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_12", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_12", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_12", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_12", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_12", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_12", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_12", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_12", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_12", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_12", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_12", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_12", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_12", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_12", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_12", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_12", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_12", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_12", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_12", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_12", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_12", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_12", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_12", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_12", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_12", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_12", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_12", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_12", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_12", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_12", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_12", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_12", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_12", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_12", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_12", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_12", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_12", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_12", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_12", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_12", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_12", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_12", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_12", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_12", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_12", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_12", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_12", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_12", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_12", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_12", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_12", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_12", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_12", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_12", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_12", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_12", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + -1 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_11", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_11", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_11", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_11", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_11", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_11", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_11", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_11", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_11", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_11", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_11", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_11", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_11", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_11", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_11", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_11", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_11", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_11", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_11", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_11", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_11", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_11", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_11", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_11", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_11", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_11", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_11", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_11", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_11", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_11", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_11", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_11", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_11", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_11", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_11", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_11", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_11", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_11", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_11", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_11", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_11", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_11", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_11", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_11", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_11", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_11", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_11", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_11", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_11", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_11", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_11", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_11", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_11", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_11", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_11", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_11", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_11", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_11", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_11", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_11", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_11", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_11", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_11", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_11", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_11", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_11", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_11", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_11", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_11", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_11", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_11", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_11", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_11", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_11", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_11", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_11", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_11", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_11", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_11", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_11", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_11", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_11", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_11", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_11", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_11", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_11", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_11", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_11", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_11", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_11", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_11", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_11", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_11", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_11", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_11", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_11", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_11", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_11", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_11", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_11", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_11", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_11", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_11", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_11", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_11", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_11", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_11", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_11", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_11", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_11", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_11", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_11", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_11", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_11", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_11", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_11", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_11", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_11", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_11", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_11", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_11", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_11", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_11", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_11", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_11", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_11", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_11", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_11", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_11", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_11", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_11", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_11", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_11", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_11", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_11", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_11", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_11", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_11", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_11", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_11", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_11", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_11", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_11", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_11", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_11", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_11", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_11", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_11", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 0 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_10", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_10", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_10", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_10", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_10", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_10", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_10", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_10", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_10", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_10", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_10", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_10", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_10", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_10", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_10", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_10", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_10", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_10", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_10", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_10", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_10", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_10", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_10", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_10", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_10", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_10", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_10", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_10", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_10", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_10", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_10", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_10", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_10", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_10", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_10", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_10", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_10", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_10", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_10", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_10", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_10", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_10", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_10", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_10", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_10", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_10", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_10", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_10", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_10", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_10", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_10", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_10", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_10", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_10", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_10", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_10", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_10", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_10", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_10", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_10", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_10", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_10", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_10", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_10", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_10", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_10", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_10", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_10", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_10", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_10", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_10", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_10", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_10", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_10", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_10", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_10", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_10", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_10", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_10", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_10", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_10", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_10", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_10", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_10", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_10", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_10", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_10", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_10", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_10", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_10", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_10", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_10", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_10", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_10", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_10", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_10", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_10", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_10", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_10", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_10", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_10", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_10", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_10", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_10", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_10", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_10", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_10", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_10", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_10", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_10", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_10", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_10", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_10", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_10", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_10", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_10", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_10", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_10", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_10", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_10", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_10", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_10", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_10", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_10", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_10", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_10", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_10", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_10", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_10", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_10", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_10", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_10", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_10", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_10", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_10", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_10", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_10", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_10", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_10", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_10", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_10", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_10", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_10", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_10", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_10", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_10", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 1 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_9", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_9", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_9", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_9", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_9", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_9", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_9", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_9", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_9", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_9", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_9", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_9", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_9", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_9", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_9", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_9", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_9", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_9", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_9", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_9", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_9", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_9", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_9", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_9", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_9", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_9", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_9", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_9", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_9", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_9", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_9", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_9", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_9", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_9", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_9", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_9", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_9", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_9", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_9", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_9", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_9", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_9", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_9", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_9", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_9", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_9", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_9", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_9", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_9", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_9", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_9", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_9", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_9", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_9", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_9", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_9", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_9", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_9", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_9", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_9", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_9", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_9", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_9", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_9", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_9", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_9", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_9", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_9", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_9", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_9", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_9", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_9", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_9", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_9", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_9", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_9", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_9", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_9", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_9", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_9", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_9", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_9", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_9", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_9", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_9", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_9", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_9", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_9", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_9", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_9", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_9", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_9", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_9", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_9", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_9", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_9", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_9", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_9", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_9", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_9", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_9", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_9", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_9", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_9", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_9", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_9", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_9", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_9", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_9", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_9", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_9", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_9", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_9", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_9", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_9", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_9", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_9", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_9", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_9", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_9", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_9", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_9", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_9", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_9", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_9", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_9", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_9", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_9", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_9", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_9", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_9", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_9", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_9", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_9", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_9", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_9", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_9", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_9", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_9", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_9", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_9", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_9", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_9", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_9", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_9", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_9", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_9", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_9", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 2 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_8", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_8", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_8", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_8", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_8", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_8", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_8", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_8", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_8", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_8", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_8", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_8", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_8", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_8", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_8", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_8", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_8", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_8", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_8", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_8", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_8", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_8", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_8", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_8", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_8", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_8", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_8", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_8", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_8", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_8", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_8", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_8", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_8", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_8", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_8", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_8", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_8", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_8", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_8", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_8", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_8", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_8", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_8", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_8", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_8", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_8", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_8", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_8", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_8", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_8", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_8", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_8", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_8", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_8", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_8", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_8", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_8", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_8", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_8", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_8", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_8", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_8", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_8", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_8", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_8", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_8", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_8", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_8", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_8", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_8", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_8", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_8", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_8", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_8", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_8", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_8", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_8", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_8", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_8", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_8", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_8", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_8", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_8", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_8", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_8", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_8", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_8", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_8", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_8", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_8", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_8", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_8", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_8", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_8", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_8", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_8", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_8", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_8", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_8", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_8", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_8", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_8", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_8", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_8", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_8", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_8", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_8", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_8", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_8", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_8", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_8", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_8", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_8", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_8", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_8", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_8", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_8", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_8", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_8", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_8", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_8", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_8", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_8", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_8", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_8", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_8", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_8", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_8", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_8", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_8", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_8", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_8", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_8", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_8", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_8", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_8", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_8", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_8", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_8", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_8", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_8", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_8", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_8", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_8", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_8", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_8", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 3 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_7", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_7", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_7", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_7", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_7", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_7", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_7", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_7", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_7", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_7", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_7", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_7", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_7", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_7", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_7", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_7", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_7", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_7", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_7", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_7", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_7", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_7", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_7", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_7", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_7", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_7", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_7", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_7", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_7", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_7", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_7", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_7", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_7", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_7", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_7", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_7", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_7", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_7", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_7", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_7", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_7", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_7", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_7", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_7", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_7", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_7", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_7", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_7", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_7", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_7", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_7", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_7", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_7", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_7", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_7", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_7", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_7", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_7", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_7", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_7", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_7", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_7", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_7", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_7", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_7", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_7", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_7", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_7", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_7", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_7", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_7", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_7", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_7", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_7", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_7", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_7", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_7", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_7", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_7", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_7", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_7", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_7", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_7", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_7", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_7", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_7", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_7", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_7", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_7", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_7", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_7", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_7", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_7", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_7", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_7", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_7", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_7", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_7", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_7", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_7", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_7", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_7", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_7", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_7", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_7", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_7", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_7", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_7", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_7", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_7", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_7", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_7", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_7", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_7", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_7", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_7", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_7", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_7", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_7", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_7", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_7", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_7", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_7", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_7", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_7", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_7", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_7", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_7", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_7", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_7", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_7", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_7", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_7", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_7", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_7", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_7", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_7", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_7", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_7", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_7", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_7", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_7", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_7", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_7", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_7", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_7", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_7", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_7", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 4 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_6", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_6", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_6", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_6", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_6", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_6", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_6", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_6", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_6", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_6", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_6", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_6", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_6", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_6", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_6", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_6", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_6", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_6", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_6", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_6", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_6", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_6", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_6", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 5 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_5", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_5", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_5", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_5", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_5", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_5", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_5", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_5", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_5", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_5", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_5", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_5", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_5", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_5", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_5", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_5", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_5", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_5", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_5", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_5", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_5", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_5", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_5", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_5", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 6 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_4", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_4", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_4", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_4", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_4", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_4", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_4", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_4", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_4", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_4", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_4", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_4", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_4", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_4", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_4", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_4", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_4", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_4", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_4", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_4", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_4", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_4", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 7 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_3", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_3", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_3", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_3", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_3", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_3", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_3", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_3", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_3", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_3", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_3", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_3", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_3", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_3", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_3", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_3", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_3", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_3", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_3", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_3", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_3", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_3", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_3", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_3", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 8 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_2", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_2", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_2", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_2", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_2", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_2", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_2", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_2", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_2", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_2", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_2", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_2", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_2", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_2", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_2", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_2", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_2", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_2", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_2", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_2", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_2", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_2", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 9 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_1", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_1", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_1", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_1", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_1", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_1", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_1", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_1", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_1", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_1", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_1", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_1", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_1", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_1", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_1", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_1", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_1", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_1", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_1", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_1", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_1", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_1", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 5, + 10 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_L" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_L_0", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_L_0", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_L_0", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_L_0", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_L_0", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_L_0", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_L_0", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_L_0", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_L_0", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_L_0", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_L_0", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_L_0", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_L_0", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_L_0", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_L_0", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_L_0", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_L_0", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_L_0", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_L_0", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_L_0", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT0" + ], + [ + "PCIE_IMUX1_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT1" + ], + [ + "PCIE_IMUX2_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT2" + ], + [ + "PCIE_IMUX3_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT3" + ], + [ + "PCIE_IMUX4_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT4" + ], + [ + "PCIE_IMUX5_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT5" + ], + [ + "PCIE_IMUX6_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT6" + ], + [ + "PCIE_IMUX7_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT7" + ], + [ + "PCIE_IMUX8_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT8" + ], + [ + "PCIE_IMUX9_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT9" + ], + [ + "PCIE_IMUX10_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT10" + ], + [ + "PCIE_IMUX11_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT11" + ], + [ + "PCIE_IMUX12_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT12" + ], + [ + "PCIE_IMUX13_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT13" + ], + [ + "PCIE_IMUX14_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT14" + ], + [ + "PCIE_IMUX15_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT15" + ], + [ + "PCIE_IMUX16_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT16" + ], + [ + "PCIE_IMUX17_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT17" + ], + [ + "PCIE_IMUX18_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT18" + ], + [ + "PCIE_IMUX19_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT19" + ], + [ + "PCIE_IMUX20_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT20" + ], + [ + "PCIE_IMUX21_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT21" + ], + [ + "PCIE_IMUX22_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT22" + ], + [ + "PCIE_IMUX23_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT23" + ], + [ + "PCIE_IMUX24_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT24" + ], + [ + "PCIE_IMUX25_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT25" + ], + [ + "PCIE_IMUX26_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT26" + ], + [ + "PCIE_IMUX27_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT27" + ], + [ + "PCIE_IMUX28_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT28" + ], + [ + "PCIE_IMUX29_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT29" + ], + [ + "PCIE_IMUX30_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT30" + ], + [ + "PCIE_IMUX31_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT31" + ], + [ + "PCIE_IMUX32_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT32" + ], + [ + "PCIE_IMUX33_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT33" + ], + [ + "PCIE_IMUX34_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT34" + ], + [ + "PCIE_IMUX35_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT35" + ], + [ + "PCIE_IMUX36_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT36" + ], + [ + "PCIE_IMUX37_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT37" + ], + [ + "PCIE_IMUX38_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT38" + ], + [ + "PCIE_IMUX39_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT39" + ], + [ + "PCIE_IMUX40_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT40" + ], + [ + "PCIE_IMUX41_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT41" + ], + [ + "PCIE_IMUX42_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT42" + ], + [ + "PCIE_IMUX43_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT43" + ], + [ + "PCIE_IMUX44_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT44" + ], + [ + "PCIE_IMUX45_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT45" + ], + [ + "PCIE_IMUX46_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT46" + ], + [ + "PCIE_IMUX47_L_0", + "PCIE_INT_INTERFACE_IMUX_L_OUT47" + ], + [ + "PCIE_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_L_0", + "INT_INTERFACE_LOGIC_OUTS_L_B23" + ], + [ + "PCIE_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -9 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_19", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_19", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_19", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_19", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_19", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_19", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_19", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_19", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_19", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_19", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_19", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_19", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_19", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_19", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_19", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_19", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_19", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_19", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_19", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_19", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_19", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_19", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_19", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_19", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_19", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_19", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_19", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_19", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_19", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_19", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_19", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_19", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_19", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_19", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_19", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_19", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_19", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_19", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_19", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_19", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_19", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_19", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_19", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_19", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_19", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_19", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_19", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_19", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_19", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_19", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_19", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_19", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_19", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_19", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_19", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_19", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_19", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_19", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_19", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_19", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_19", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_19", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_19", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_19", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_19", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_19", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_19", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_19", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_19", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_19", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_19", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_19", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_19", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_19", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_19", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_19", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_19", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_19", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_19", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_19", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_19", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_19", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_19", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_19", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_19", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_19", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_19", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_19", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_19", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_19", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_19", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_19", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_19", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_19", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_19", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_19", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_19", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_19", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_19", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_19", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_19", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_19", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_19", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_19", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_19", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_19", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_19", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_19", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_19", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_19", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_19", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_19", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_19", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_19", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_19", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_19", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_19", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_19", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_19", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_19", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_19", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_19", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_19", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_19", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_19", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_19", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_19", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_19", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_19", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_19", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_19", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_19", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_19", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_19", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_19", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_19", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_19", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_19", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_19", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_19", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_19", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_19", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_19", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_19", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_19", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_19", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_19", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_19", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_19", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_19", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_19", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_19", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_19", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_19", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_19", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_19", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_19", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_19", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_19", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_19", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_19", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_19", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_19", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_19", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_19", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_19", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_19", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_19", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_19", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_19", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_19", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -8 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_18", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_18", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_18", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_18", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_18", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_18", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_18", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_18", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_18", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_18", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_18", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_18", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_18", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_18", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_18", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_18", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_18", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_18", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_18", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_18", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_18", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_18", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_18", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_18", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_18", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_18", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_18", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_18", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_18", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_18", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_18", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_18", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_18", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_18", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_18", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_18", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_18", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_18", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_18", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_18", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_18", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_18", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_18", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_18", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_18", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_18", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_18", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_18", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_18", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_18", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_18", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_18", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_18", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_18", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_18", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_18", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_18", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_18", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_18", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_18", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_18", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_18", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_18", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_18", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_18", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_18", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_18", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_18", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_18", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_18", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_18", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_18", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_18", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_18", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_18", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_18", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_18", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_18", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_18", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_18", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_18", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_18", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_18", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_18", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_18", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_18", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_18", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_18", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_18", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_18", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_18", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_18", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_18", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_18", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_18", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_18", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_18", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_18", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_18", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_18", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_18", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_18", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_18", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_18", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_18", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_18", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_18", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_18", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_18", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_18", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_18", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_18", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_18", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_18", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_18", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_18", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_18", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_18", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_18", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_18", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_18", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_18", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_18", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_18", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_18", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_18", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_18", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_18", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_18", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_18", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_18", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_18", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_18", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_18", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_18", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_18", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_18", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_18", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_18", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_18", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_18", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_18", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_18", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_18", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_18", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_18", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_18", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_18", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_18", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_18", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_18", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_18", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_18", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_18", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_18", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_18", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_18", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_18", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_18", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_18", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_18", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_18", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_18", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_18", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_18", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_18", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_18", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_18", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_18", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -7 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_17", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_17", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_17", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_17", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_17", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_17", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_17", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_17", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_17", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_17", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_17", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_17", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_17", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_17", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_17", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_17", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_17", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_17", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_17", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_17", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_17", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_17", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_17", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_17", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_17", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_17", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_17", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_17", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_17", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_17", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_17", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_17", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_17", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_17", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_17", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_17", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_17", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_17", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_17", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_17", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_17", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_17", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_17", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_17", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_17", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_17", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_17", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_17", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_17", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_17", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_17", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_17", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_17", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_17", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_17", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_17", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_17", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_17", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_17", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_17", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_17", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_17", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_17", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_17", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_17", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_17", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_17", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_17", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_17", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_17", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_17", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_17", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_17", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_17", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_17", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_17", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_17", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_17", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_17", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_17", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_17", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_17", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_17", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_17", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_17", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_17", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_17", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_17", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_17", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_17", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_17", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_17", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_17", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_17", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_17", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_17", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_17", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_17", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_17", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_17", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_17", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_17", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_17", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_17", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_17", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_17", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_17", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_17", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_17", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_17", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_17", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_17", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_17", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_17", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_17", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_17", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_17", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_17", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_17", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_17", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_17", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_17", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_17", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_17", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_17", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_17", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_17", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_17", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_17", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_17", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_17", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_17", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_17", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_17", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_17", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_17", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_17", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_17", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_17", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_17", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_17", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_17", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_17", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_17", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_17", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_17", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_17", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_17", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_17", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_17", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_17", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_17", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_17", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_17", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_17", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_17", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_17", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_17", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_17", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_17", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_17", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_17", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_17", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_17", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_17", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_17", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_17", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_17", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_17", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_17", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_17", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -6 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_16", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_16", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_16", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_16", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_16", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_16", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_16", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_16", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_16", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_16", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_16", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_16", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_16", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_16", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_16", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_16", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_16", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_16", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_16", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_16", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_16", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_16", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_16", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_16", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_16", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_16", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_16", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_16", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_16", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_16", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_16", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_16", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_16", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_16", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_16", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_16", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_16", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_16", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_16", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_16", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_16", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_16", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_16", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_16", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_16", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_16", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_16", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_16", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_16", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_16", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_16", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_16", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_16", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_16", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_16", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_16", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_16", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_16", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_16", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_16", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_16", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_16", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_16", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_16", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_16", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_16", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_16", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_16", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_16", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_16", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_16", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_16", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_16", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_16", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_16", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_16", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_16", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_16", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_16", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_16", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_16", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_16", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_16", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_16", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_16", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_16", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_16", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_16", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_16", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_16", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_16", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_16", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_16", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_16", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_16", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_16", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_16", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_16", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_16", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_16", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_16", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_16", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_16", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_16", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_16", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_16", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_16", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_16", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_16", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_16", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_16", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_16", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_16", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_16", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_16", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_16", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_16", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_16", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_16", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_16", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_16", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_16", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_16", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_16", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_16", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_16", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_16", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_16", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_16", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_16", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_16", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_16", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_16", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_16", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_16", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_16", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_16", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_16", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_16", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_16", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_16", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_16", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_16", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_16", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_16", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_16", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_16", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_16", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_16", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_16", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_16", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_16", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_16", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_16", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_16", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_16", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_16", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_16", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_16", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_16", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_16", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_16", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_16", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_16", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_16", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_16", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_16", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_16", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_16", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -5 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_15", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_15", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_15", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_15", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_15", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_15", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_15", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_15", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_15", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_15", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_15", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_15", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_15", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_15", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_15", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_15", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_15", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_15", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_15", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_15", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_15", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_15", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_15", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_15", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_15", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_15", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_15", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_15", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_15", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_15", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_15", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_15", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_15", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_15", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_15", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_15", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_15", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_15", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_15", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_15", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_15", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_15", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_15", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_15", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_15", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_15", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_15", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_15", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_15", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_15", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_15", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_15", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_15", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_15", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_15", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_15", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_15", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_15", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_15", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_15", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_15", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_15", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_15", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_15", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_15", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_15", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_15", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_15", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_15", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_15", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_15", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_15", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_15", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_15", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_15", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_15", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_15", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_15", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_15", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_15", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_15", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_15", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_15", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_15", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_15", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_15", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_15", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_15", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_15", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_15", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_15", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_15", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_15", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_15", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_15", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_15", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_15", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_15", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_15", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_15", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_15", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_15", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_15", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_15", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_15", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_15", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_15", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_15", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_15", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_15", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_15", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_15", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_15", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_15", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_15", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_15", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_15", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_15", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_15", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_15", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_15", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_15", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_15", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_15", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_15", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_15", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_15", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_15", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_15", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_15", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_15", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_15", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_15", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_15", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_15", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_15", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_15", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_15", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_15", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_15", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_15", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_15", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_15", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_15", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_15", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_15", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_15", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_15", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_15", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_15", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_15", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_15", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_15", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_15", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_15", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_15", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_15", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_15", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_15", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_15", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_15", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_15", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_15", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_15", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_15", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_15", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_15", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_15", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_15", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_15", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_15", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -4 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_14", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_14", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_14", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_14", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_14", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_14", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_14", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_14", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_14", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_14", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_14", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_14", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_14", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_14", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_14", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_14", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_14", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_14", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_14", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_14", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_14", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_14", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_14", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_14", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_14", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_14", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_14", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_14", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_14", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_14", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_14", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_14", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_14", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_14", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_14", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_14", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_14", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_14", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_14", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_14", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_14", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_14", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_14", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_14", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_14", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_14", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_14", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_14", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_14", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_14", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_14", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_14", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_14", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_14", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_14", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_14", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_14", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_14", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_14", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_14", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_14", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_14", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_14", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_14", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_14", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_14", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_14", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_14", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_14", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_14", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_14", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_14", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_14", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_14", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_14", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_14", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_14", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_14", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_14", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_14", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_14", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_14", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_14", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_14", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_14", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_14", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_14", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_14", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_14", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_14", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_14", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_14", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_14", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_14", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_14", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_14", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_14", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_14", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_14", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_14", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_14", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_14", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_14", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_14", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_14", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_14", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_14", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_14", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_14", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_14", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_14", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_14", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_14", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_14", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_14", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_14", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_14", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_14", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_14", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_14", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_14", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_14", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_14", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_14", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_14", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_14", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_14", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_14", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_14", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_14", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_14", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_14", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_14", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_14", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_14", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_14", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_14", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_14", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_14", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_14", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_14", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_14", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_14", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_14", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_14", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_14", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_14", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_14", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_14", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_14", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_14", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_14", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_14", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_14", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_14", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_14", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_14", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_14", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_14", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_14", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_14", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_14", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_14", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_14", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_14", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_14", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_14", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_14", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_14", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -3 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_13", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_13", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_13", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_13", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_13", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_13", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_13", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_13", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_13", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_13", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_13", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_13", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_13", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_13", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_13", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_13", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_13", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_13", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_13", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_13", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_13", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_13", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_13", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_13", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_13", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_13", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_13", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_13", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_13", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_13", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_13", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_13", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_13", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_13", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_13", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_13", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_13", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_13", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_13", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_13", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_13", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_13", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_13", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_13", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_13", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_13", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_13", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_13", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_13", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_13", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_13", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_13", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_13", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_13", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_13", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_13", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_13", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_13", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_13", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_13", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_13", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_13", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_13", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_13", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_13", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_13", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_13", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_13", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_13", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_13", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_13", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_13", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_13", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_13", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_13", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_13", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_13", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_13", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_13", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_13", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_13", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_13", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_13", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_13", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_13", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_13", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_13", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_13", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_13", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_13", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_13", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_13", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_13", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_13", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_13", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_13", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_13", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_13", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_13", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_13", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_13", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_13", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_13", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_13", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_13", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_13", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_13", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_13", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_13", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_13", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_13", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_13", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_13", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_13", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_13", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_13", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_13", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_13", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_13", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_13", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_13", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_13", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_13", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_13", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_13", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_13", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_13", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_13", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_13", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_13", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_13", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_13", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_13", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_13", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_13", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_13", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_13", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_13", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_13", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_13", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_13", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_13", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_13", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_13", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_13", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_13", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_13", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_13", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_13", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_13", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_13", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_13", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_13", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_13", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_13", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_13", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_13", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_13", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_13", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_13", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_13", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_13", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_13", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_13", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_13", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_13", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_13", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_13", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_13", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_13", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_13", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -2 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_12", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_12", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_12", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_12", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_12", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_12", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_12", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_12", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_12", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_12", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_12", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_12", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_12", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_12", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_12", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_12", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_12", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_12", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_12", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_12", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_12", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_12", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_12", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_12", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_12", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_12", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_12", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_12", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_12", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_12", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_12", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_12", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_12", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_12", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_12", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_12", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_12", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_12", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_12", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_12", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_12", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_12", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_12", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_12", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_12", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_12", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_12", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_12", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_12", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_12", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_12", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_12", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_12", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_12", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_12", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_12", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_12", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_12", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_12", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_12", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_12", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_12", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_12", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_12", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_12", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_12", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_12", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_12", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_12", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_12", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_12", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_12", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_12", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_12", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_12", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_12", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_12", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_12", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_12", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_12", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_12", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_12", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_12", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_12", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_12", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_12", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_12", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_12", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_12", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_12", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_12", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_12", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_12", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_12", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_12", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_12", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_12", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_12", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_12", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_12", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_12", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_12", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_12", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_12", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_12", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_12", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_12", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_12", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_12", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_12", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_12", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_12", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_12", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_12", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_12", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_12", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_12", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_12", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_12", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_12", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_12", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_12", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_12", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_12", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_12", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_12", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_12", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_12", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_12", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_12", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_12", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_12", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_12", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_12", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_12", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_12", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_12", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_12", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_12", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_12", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_12", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_12", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_12", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_12", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_12", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_12", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_12", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_12", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_12", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_12", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_12", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_12", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_12", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_12", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_12", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_12", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_12", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_12", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_12", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_12", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_12", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_12", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_12", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_12", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_12", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_12", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_12", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_12", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_12", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_11", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_11", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_11", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_11", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_11", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_11", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_11", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_11", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_11", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_11", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_11", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_11", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_11", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_11", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_11", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_11", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_11", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_11", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_11", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_11", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_11", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_11", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_11", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_11", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_11", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_11", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_11", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_11", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_11", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_11", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_11", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_11", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_11", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_11", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_11", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_11", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_11", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_11", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_11", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_11", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_11", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_11", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_11", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_11", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_11", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_11", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_11", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_11", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_11", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_11", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_11", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_11", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_11", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_11", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_11", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_11", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_11", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_11", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_11", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_11", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_11", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_11", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_11", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_11", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_11", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_11", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_11", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_11", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_11", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_11", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_11", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_11", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_11", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_11", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_11", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_11", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_11", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_11", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_11", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_11", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_11", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_11", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_11", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_11", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_11", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_11", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_11", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_11", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_11", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_11", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_11", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_11", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_11", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_11", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_11", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_11", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_11", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_11", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_11", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_11", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_11", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_11", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_11", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_11", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_11", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_11", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_11", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_11", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_11", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_11", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_11", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_11", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_11", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_11", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_11", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_11", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_11", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_11", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_11", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_11", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_11", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_11", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_11", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_11", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_11", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_11", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_11", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_11", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_11", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_11", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_11", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_11", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_11", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_11", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_11", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_11", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_11", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_11", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_11", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_11", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_11", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_11", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_11", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_11", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_11", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_11", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_11", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_11", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_11", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_11", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_11", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_11", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_11", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_11", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_11", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_11", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_11", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_11", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_11", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_11", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_11", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_11", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_11", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_11", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_11", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_11", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_11", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_11", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_11", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_11", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_11", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_10", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_10", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_10", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_10", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_10", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_10", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_10", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_10", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_10", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_10", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_10", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_10", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_10", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_10", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_10", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_10", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_10", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_10", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_10", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_10", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_10", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_10", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_10", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_10", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_10", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_10", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_10", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_10", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_10", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_10", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_10", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_10", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_10", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_10", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_10", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_10", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_10", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_10", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_10", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_10", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_10", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_10", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_10", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_10", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_10", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_10", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_10", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_10", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_10", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_10", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_10", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_10", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_10", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_10", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_10", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_10", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_10", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_10", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_10", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_10", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_10", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_10", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_10", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_10", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_10", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_10", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_10", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_10", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_10", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_10", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_10", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_10", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_10", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_10", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_10", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_10", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_10", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_10", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_10", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_10", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_10", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_10", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_10", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_10", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_10", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_10", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_10", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_10", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_10", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_10", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_10", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_10", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_10", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_10", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_10", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_10", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_10", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_10", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_10", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_10", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_10", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_10", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_10", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_10", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_10", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_10", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_10", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_10", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_10", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_10", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_10", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_10", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_10", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_10", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_10", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_10", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_10", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_10", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_10", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_10", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_10", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_10", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_10", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_10", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_10", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_10", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_10", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_10", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_10", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_10", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_10", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_10", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_10", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_10", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_10", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_10", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_10", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_10", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_10", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_10", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_10", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_10", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_10", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_10", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_10", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_10", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_10", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_10", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_10", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_10", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_10", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_10", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_10", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_10", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_10", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_10", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_10", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_10", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_10", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_10", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_10", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_10", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_10", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_10", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_10", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_10", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_10", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_10", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_10", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 1 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_9", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_9", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_9", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_9", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_9", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_9", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_9", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_9", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_9", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_9", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_9", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_9", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_9", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_9", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_9", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_9", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_9", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_9", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_9", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_9", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_9", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_9", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_9", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_9", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_9", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_9", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_9", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_9", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_9", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_9", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_9", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_9", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_9", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_9", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_9", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_9", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_9", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_9", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_9", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_9", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_9", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_9", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_9", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_9", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_9", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_9", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_9", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_9", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_9", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_9", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_9", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_9", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_9", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_9", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_9", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_9", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_9", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_9", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_9", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_9", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_9", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_9", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_9", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_9", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_9", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_9", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_9", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_9", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_9", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_9", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_9", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_9", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_9", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_9", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_9", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_9", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_9", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_9", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_9", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_9", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_9", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_9", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_9", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_9", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_9", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_9", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_9", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_9", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_9", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_9", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_9", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_9", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_9", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_9", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_9", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_9", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_9", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_9", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_9", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_9", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_9", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_9", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_9", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_9", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_9", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_9", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_9", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_9", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_9", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_9", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_9", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_9", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_9", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_9", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_9", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_9", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_9", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_9", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_9", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_9", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_9", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_9", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_9", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_9", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_9", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_9", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_9", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_9", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_9", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_9", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_9", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_9", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_9", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_9", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_9", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_9", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_9", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_9", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_9", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_9", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_9", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_9", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_9", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_9", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_9", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_9", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_9", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_9", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_9", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_9", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_9", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_9", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_9", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_9", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_9", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_9", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_9", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_9", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_9", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_9", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_9", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_9", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_9", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_9", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_9", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_9", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_9", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_9", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_9", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_9", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_9", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 2 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_8", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_8", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_8", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_8", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_8", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_8", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_8", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_8", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_8", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_8", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_8", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_8", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_8", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_8", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_8", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_8", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_8", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_8", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_8", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_8", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_8", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_8", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_8", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_8", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_8", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_8", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_8", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_8", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_8", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_8", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_8", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_8", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_8", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_8", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_8", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_8", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_8", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_8", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_8", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_8", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_8", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_8", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_8", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_8", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_8", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_8", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_8", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_8", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_8", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_8", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_8", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_8", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_8", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_8", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_8", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_8", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_8", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_8", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_8", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_8", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_8", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_8", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_8", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_8", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_8", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_8", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_8", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_8", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_8", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_8", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_8", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_8", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_8", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_8", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_8", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_8", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_8", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_8", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_8", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_8", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_8", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_8", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_8", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_8", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_8", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_8", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_8", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_8", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_8", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_8", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_8", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_8", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_8", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_8", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_8", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_8", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_8", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_8", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_8", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_8", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_8", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_8", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_8", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_8", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_8", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_8", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_8", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_8", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_8", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_8", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_8", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_8", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_8", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_8", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_8", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_8", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_8", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_8", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_8", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_8", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_8", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_8", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_8", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_8", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_8", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_8", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_8", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_8", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_8", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_8", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_8", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_8", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_8", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_8", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_8", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_8", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_8", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_8", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_8", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_8", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_8", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_8", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_8", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_8", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_8", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_8", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_8", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_8", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_8", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_8", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_8", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_8", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_8", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_8", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_8", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_8", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_8", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_8", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_8", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_8", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_8", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_8", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_8", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_8", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_8", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_8", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_8", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_8", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_8", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 3 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_7", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_7", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_7", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_7", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_7", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_7", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_7", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_7", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_7", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_7", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_7", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_7", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_7", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_7", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_7", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_7", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_7", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_7", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_7", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_7", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_7", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_7", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_7", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_7", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_7", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_7", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_7", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_7", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_7", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_7", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_7", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_7", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_7", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_7", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_7", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_7", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_7", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_7", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_7", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_7", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_7", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_7", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_7", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_7", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_7", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_7", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_7", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_7", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_7", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_7", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_7", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_7", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_7", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_7", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_7", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_7", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_7", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_7", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_7", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_7", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_7", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_7", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_7", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_7", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_7", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_7", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_7", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_7", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_7", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_7", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_7", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_7", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_7", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_7", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_7", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_7", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_7", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_7", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_7", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_7", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_7", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_7", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_7", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_7", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_7", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_7", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_7", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_7", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_7", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_7", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_7", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_7", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_7", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_7", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_7", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_7", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_7", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_7", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_7", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_7", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_7", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_7", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_7", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_7", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_7", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_7", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_7", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_7", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_7", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_7", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_7", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_7", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_7", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_7", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_7", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_7", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_7", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_7", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_7", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_7", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_7", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_7", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_7", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_7", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_7", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_7", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_7", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_7", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_7", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_7", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_7", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_7", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_7", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_7", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_7", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_7", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_7", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_7", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_7", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_7", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_7", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_7", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_7", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_7", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_7", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_7", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_7", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_7", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_7", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_7", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_7", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_7", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_7", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_7", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_7", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_7", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_7", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_7", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_7", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_7", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_7", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_7", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_7", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_7", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_7", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_7", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_7", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_7", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_7", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_7", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_7", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 4 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_6", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_6", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_6", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_6", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_6", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_6", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_6", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_6", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_6", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_6", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_6", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_6", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_6", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_6", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_6", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_6", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_6", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_6", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_6", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_6", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_6", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_6", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_6", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_6", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_6", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_6", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_6", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_6", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_6", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_6", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_6", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_6", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_6", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_6", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_6", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_6", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_6", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_6", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_6", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_6", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_6", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_6", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_6", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_6", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_6", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_6", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_6", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_6", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_6", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_6", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_6", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_6", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_6", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_6", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_6", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_6", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_6", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_6", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_6", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_6", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_6", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_6", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_6", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_6", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_6", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_6", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_6", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_6", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_6", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_6", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_6", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_6", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_6", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_6", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_6", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_6", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_6", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_6", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_6", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_6", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_6", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_6", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_6", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_6", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_6", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_6", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_6", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_6", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_6", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_6", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_6", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_6", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_6", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_6", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_6", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_6", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_6", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_6", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_6", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_6", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_6", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_6", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_6", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_6", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_6", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_6", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_6", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_6", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_6", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_6", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_6", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_6", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_6", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_6", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_6", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_6", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_6", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_6", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_6", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_6", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_6", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_6", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_6", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_6", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_6", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_6", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_6", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_6", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_6", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_6", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_6", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_6", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_6", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_6", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_6", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_6", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_6", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_6", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_6", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_6", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_6", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_6", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_6", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_6", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_6", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_6", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_6", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_6", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_6", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_6", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_6", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_6", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_6", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_6", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_6", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_6", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_6", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_6", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_6", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_6", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_6", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_6", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_6", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_6", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_6", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_6", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_6", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_6", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_6", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 5 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_5", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_5", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_5", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_5", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_5", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_5", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_5", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_5", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_5", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_5", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_5", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_5", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_5", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_5", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_5", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_5", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_5", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_5", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_5", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_5", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_5", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_5", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_5", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_5", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_5", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_5", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_5", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_5", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_5", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_5", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_5", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_5", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_5", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_5", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_5", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_5", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_5", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_5", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_5", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_5", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_5", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_5", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_5", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_5", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_5", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_5", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_5", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_5", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_5", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_5", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_5", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_5", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_5", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_5", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_5", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_5", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_5", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_5", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_5", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_5", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_5", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_5", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_5", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_5", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_5", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_5", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_5", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_5", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_5", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_5", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_5", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_5", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_5", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_5", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_5", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_5", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_5", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_5", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_5", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_5", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_5", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_5", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_5", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_5", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_5", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_5", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_5", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_5", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_5", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_5", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_5", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_5", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_5", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_5", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_5", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_5", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_5", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_5", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_5", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_5", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_5", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_5", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_5", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_5", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_5", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_5", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_5", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_5", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_5", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_5", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_5", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_5", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_5", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_5", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_5", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_5", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_5", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_5", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_5", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_5", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_5", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_5", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_5", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_5", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_5", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_5", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_5", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_5", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_5", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_5", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_5", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_5", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_5", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_5", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_5", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_5", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_5", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_5", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_5", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_5", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_5", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_5", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_5", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_5", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_5", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_5", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_5", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_5", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_5", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_5", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_5", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_5", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_5", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_5", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_5", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_5", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_5", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_5", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_5", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_5", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_5", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_5", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_5", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_5", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_5", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_5", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_5", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_5", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_5", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_5", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_5", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 6 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_4", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_4", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_4", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_4", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_4", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_4", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_4", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_4", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_4", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_4", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_4", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_4", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_4", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_4", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_4", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_4", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_4", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_4", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_4", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_4", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_4", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_4", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_4", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_4", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_4", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_4", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_4", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_4", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_4", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_4", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_4", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_4", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_4", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_4", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_4", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_4", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_4", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_4", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_4", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_4", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_4", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_4", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_4", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_4", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_4", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_4", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_4", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_4", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_4", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_4", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_4", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_4", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_4", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_4", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_4", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_4", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_4", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_4", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_4", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_4", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_4", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_4", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_4", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_4", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_4", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_4", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_4", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_4", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_4", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_4", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_4", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_4", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_4", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_4", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_4", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_4", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_4", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_4", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_4", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_4", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_4", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_4", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_4", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_4", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_4", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_4", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_4", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_4", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_4", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_4", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_4", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_4", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_4", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_4", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_4", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_4", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_4", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_4", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_4", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_4", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_4", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_4", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_4", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_4", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_4", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_4", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_4", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_4", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_4", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_4", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_4", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_4", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_4", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_4", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_4", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_4", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_4", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_4", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_4", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_4", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_4", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_4", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_4", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_4", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_4", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_4", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_4", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_4", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_4", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_4", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_4", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_4", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_4", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_4", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_4", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_4", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_4", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_4", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_4", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_4", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_4", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_4", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_4", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_4", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_4", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_4", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_4", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_4", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_4", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_4", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_4", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_4", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_4", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_4", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_4", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_4", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_4", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_4", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_4", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_4", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_4", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_4", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_4", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_4", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_4", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_4", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_4", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_4", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_4", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 7 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_3", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_3", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_3", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_3", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_3", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_3", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_3", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_3", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_3", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_3", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_3", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_3", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_3", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_3", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_3", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_3", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_3", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_3", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_3", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_3", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_3", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_3", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_3", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_3", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_3", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_3", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_3", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_3", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_3", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_3", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_3", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_3", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_3", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_3", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_3", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_3", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_3", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_3", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_3", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_3", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_3", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_3", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_3", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_3", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_3", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_3", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_3", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_3", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_3", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_3", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_3", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_3", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_3", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_3", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_3", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_3", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_3", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_3", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_3", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_3", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_3", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_3", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_3", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_3", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_3", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_3", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_3", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_3", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_3", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_3", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_3", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_3", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_3", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_3", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_3", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_3", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_3", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_3", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_3", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_3", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_3", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_3", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_3", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_3", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_3", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_3", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_3", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_3", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_3", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_3", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_3", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_3", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_3", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_3", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_3", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_3", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_3", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_3", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_3", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_3", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_3", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_3", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_3", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_3", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_3", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_3", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_3", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_3", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_3", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_3", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_3", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_3", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_3", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_3", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_3", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_3", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_3", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_3", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_3", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_3", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_3", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_3", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_3", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_3", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_3", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_3", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_3", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_3", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_3", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_3", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_3", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_3", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_3", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_3", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_3", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_3", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_3", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_3", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_3", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_3", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_3", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_3", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_3", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_3", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_3", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_3", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_3", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_3", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_3", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_3", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_3", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_3", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_3", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_3", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_3", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_3", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_3", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_3", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_3", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_3", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_3", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_3", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_3", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_3", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_3", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_3", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_3", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_3", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_3", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_3", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_3", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 8 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_2", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_2", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_2", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_2", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_2", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_2", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_2", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_2", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_2", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_2", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_2", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_2", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_2", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_2", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_2", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_2", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_2", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_2", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_2", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_2", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_2", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_2", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_2", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_2", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_2", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_2", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_2", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_2", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_2", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_2", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_2", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_2", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_2", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_2", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_2", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_2", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_2", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_2", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_2", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_2", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_2", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_2", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_2", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_2", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_2", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_2", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_2", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_2", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_2", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_2", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_2", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_2", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_2", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_2", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_2", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_2", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_2", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_2", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_2", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_2", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_2", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_2", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_2", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_2", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_2", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_2", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_2", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_2", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_2", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_2", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_2", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_2", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_2", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_2", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_2", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_2", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_2", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_2", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_2", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_2", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_2", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_2", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_2", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_2", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_2", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_2", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_2", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_2", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_2", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_2", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_2", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_2", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_2", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_2", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_2", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_2", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_2", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_2", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_2", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_2", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_2", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_2", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_2", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_2", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_2", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_2", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_2", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_2", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_2", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_2", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_2", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_2", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_2", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_2", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_2", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_2", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_2", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_2", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_2", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_2", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_2", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_2", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_2", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_2", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_2", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_2", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_2", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_2", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_2", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_2", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_2", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_2", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_2", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_2", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_2", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_2", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_2", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_2", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_2", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_2", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_2", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_2", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_2", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_2", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_2", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_2", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_2", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_2", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_2", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_2", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_2", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_2", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_2", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_2", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_2", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_2", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_2", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_2", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_2", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_2", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_2", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_2", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_2", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_2", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_2", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_2", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_2", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_2", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_2", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 9 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_1", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_1", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_1", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_1", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_1", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_1", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_1", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_1", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_1", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_1", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_1", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_1", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_1", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_1", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_1", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_1", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_1", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_1", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_1", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_1", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_1", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_1", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_1", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_1", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_1", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_1", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_1", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_1", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_1", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_1", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_1", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_1", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_1", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_1", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_1", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_1", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_1", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_1", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_1", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_1", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_1", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_1", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_1", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_1", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_1", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_1", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_1", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_1", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_1", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_1", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_1", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_1", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_1", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_1", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_1", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_1", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_1", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_1", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_1", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_1", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_1", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_1", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_1", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_1", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_1", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_1", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_1", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_1", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_1", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_1", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_1", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_1", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_1", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_1", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_1", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_1", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_1", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_1", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_1", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_1", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_1", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_1", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_1", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_1", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_1", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_1", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_1", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_1", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_1", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_MONITOR_N_1", + "INT_INTERFACE_MONITOR_N" + ], + [ + "PCIE_MONITOR_P_1", + "INT_INTERFACE_MONITOR_P" + ], + [ + "PCIE_NE2A0_1", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_1", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_1", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_1", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_1", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_1", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_1", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_1", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_1", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_1", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_1", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_1", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_1", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_1", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_1", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_1", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_1", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_1", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_1", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_1", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_1", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_1", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_1", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_1", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_1", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_1", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_1", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_1", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_1", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_1", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_1", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_1", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_1", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_1", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_1", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_1", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_1", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_1", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_1", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_1", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_1", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_1", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_1", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_1", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_1", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_1", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_1", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_1", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_1", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_1", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_1", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_1", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_1", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_1", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_1", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_1", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_1", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_1", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_1", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_1", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_1", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_1", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_1", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_1", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_1", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_1", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_1", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_1", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_1", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_1", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_1", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_1", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_1", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_1", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_1", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_1", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_1", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_1", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_1", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_1", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + -1, + 10 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_INT_INTERFACE_R" + ], + "wire_pairs": [ + [ + "PCIE_BYP0_R_0", + "INT_INTERFACE_BYP0" + ], + [ + "PCIE_BYP1_R_0", + "INT_INTERFACE_BYP1" + ], + [ + "PCIE_BYP2_R_0", + "INT_INTERFACE_BYP2" + ], + [ + "PCIE_BYP3_R_0", + "INT_INTERFACE_BYP3" + ], + [ + "PCIE_BYP4_R_0", + "INT_INTERFACE_BYP4" + ], + [ + "PCIE_BYP5_R_0", + "INT_INTERFACE_BYP5" + ], + [ + "PCIE_BYP6_R_0", + "INT_INTERFACE_BYP6" + ], + [ + "PCIE_BYP7_R_0", + "INT_INTERFACE_BYP7" + ], + [ + "PCIE_CLK0_R_0", + "INT_INTERFACE_CLK0" + ], + [ + "PCIE_CLK1_R_0", + "INT_INTERFACE_CLK1" + ], + [ + "PCIE_CTRL0_R_0", + "INT_INTERFACE_CTRL0" + ], + [ + "PCIE_CTRL1_R_0", + "INT_INTERFACE_CTRL1" + ], + [ + "PCIE_EE2A0_0", + "INT_INTERFACE_EE2A0" + ], + [ + "PCIE_EE2A1_0", + "INT_INTERFACE_EE2A1" + ], + [ + "PCIE_EE2A2_0", + "INT_INTERFACE_EE2A2" + ], + [ + "PCIE_EE2A3_0", + "INT_INTERFACE_EE2A3" + ], + [ + "PCIE_EE2BEG0_0", + "INT_INTERFACE_EE2BEG0" + ], + [ + "PCIE_EE2BEG1_0", + "INT_INTERFACE_EE2BEG1" + ], + [ + "PCIE_EE2BEG2_0", + "INT_INTERFACE_EE2BEG2" + ], + [ + "PCIE_EE2BEG3_0", + "INT_INTERFACE_EE2BEG3" + ], + [ + "PCIE_EE4A0_0", + "INT_INTERFACE_EE4A0" + ], + [ + "PCIE_EE4A1_0", + "INT_INTERFACE_EE4A1" + ], + [ + "PCIE_EE4A2_0", + "INT_INTERFACE_EE4A2" + ], + [ + "PCIE_EE4A3_0", + "INT_INTERFACE_EE4A3" + ], + [ + "PCIE_EE4B0_0", + "INT_INTERFACE_EE4B0" + ], + [ + "PCIE_EE4B1_0", + "INT_INTERFACE_EE4B1" + ], + [ + "PCIE_EE4B2_0", + "INT_INTERFACE_EE4B2" + ], + [ + "PCIE_EE4B3_0", + "INT_INTERFACE_EE4B3" + ], + [ + "PCIE_EE4BEG0_0", + "INT_INTERFACE_EE4BEG0" + ], + [ + "PCIE_EE4BEG1_0", + "INT_INTERFACE_EE4BEG1" + ], + [ + "PCIE_EE4BEG2_0", + "INT_INTERFACE_EE4BEG2" + ], + [ + "PCIE_EE4BEG3_0", + "INT_INTERFACE_EE4BEG3" + ], + [ + "PCIE_EE4C0_0", + "INT_INTERFACE_EE4C0" + ], + [ + "PCIE_EE4C1_0", + "INT_INTERFACE_EE4C1" + ], + [ + "PCIE_EE4C2_0", + "INT_INTERFACE_EE4C2" + ], + [ + "PCIE_EE4C3_0", + "INT_INTERFACE_EE4C3" + ], + [ + "PCIE_EL1BEG0_0", + "INT_INTERFACE_EL1BEG0" + ], + [ + "PCIE_EL1BEG1_0", + "INT_INTERFACE_EL1BEG1" + ], + [ + "PCIE_EL1BEG2_0", + "INT_INTERFACE_EL1BEG2" + ], + [ + "PCIE_EL1BEG3_0", + "INT_INTERFACE_EL1BEG3" + ], + [ + "PCIE_ER1BEG0_0", + "INT_INTERFACE_ER1BEG0" + ], + [ + "PCIE_ER1BEG1_0", + "INT_INTERFACE_ER1BEG1" + ], + [ + "PCIE_ER1BEG2_0", + "INT_INTERFACE_ER1BEG2" + ], + [ + "PCIE_ER1BEG3_0", + "INT_INTERFACE_ER1BEG3" + ], + [ + "PCIE_FAN0_R_0", + "INT_INTERFACE_FAN0" + ], + [ + "PCIE_FAN1_R_0", + "INT_INTERFACE_FAN1" + ], + [ + "PCIE_FAN2_R_0", + "INT_INTERFACE_FAN2" + ], + [ + "PCIE_FAN3_R_0", + "INT_INTERFACE_FAN3" + ], + [ + "PCIE_FAN4_R_0", + "INT_INTERFACE_FAN4" + ], + [ + "PCIE_FAN5_R_0", + "INT_INTERFACE_FAN5" + ], + [ + "PCIE_FAN6_R_0", + "INT_INTERFACE_FAN6" + ], + [ + "PCIE_FAN7_R_0", + "INT_INTERFACE_FAN7" + ], + [ + "PCIE_IMUX0_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT0" + ], + [ + "PCIE_IMUX1_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT1" + ], + [ + "PCIE_IMUX2_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT2" + ], + [ + "PCIE_IMUX3_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT3" + ], + [ + "PCIE_IMUX4_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT4" + ], + [ + "PCIE_IMUX5_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT5" + ], + [ + "PCIE_IMUX6_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT6" + ], + [ + "PCIE_IMUX7_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT7" + ], + [ + "PCIE_IMUX8_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT8" + ], + [ + "PCIE_IMUX9_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT9" + ], + [ + "PCIE_IMUX10_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT10" + ], + [ + "PCIE_IMUX11_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT11" + ], + [ + "PCIE_IMUX12_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT12" + ], + [ + "PCIE_IMUX13_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT13" + ], + [ + "PCIE_IMUX14_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT14" + ], + [ + "PCIE_IMUX15_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT15" + ], + [ + "PCIE_IMUX16_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT16" + ], + [ + "PCIE_IMUX17_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT17" + ], + [ + "PCIE_IMUX18_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT18" + ], + [ + "PCIE_IMUX19_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT19" + ], + [ + "PCIE_IMUX20_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT20" + ], + [ + "PCIE_IMUX21_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT21" + ], + [ + "PCIE_IMUX22_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT22" + ], + [ + "PCIE_IMUX23_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT23" + ], + [ + "PCIE_IMUX24_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT24" + ], + [ + "PCIE_IMUX25_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT25" + ], + [ + "PCIE_IMUX26_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT26" + ], + [ + "PCIE_IMUX27_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT27" + ], + [ + "PCIE_IMUX28_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT28" + ], + [ + "PCIE_IMUX29_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT29" + ], + [ + "PCIE_IMUX30_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT30" + ], + [ + "PCIE_IMUX31_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT31" + ], + [ + "PCIE_IMUX32_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT32" + ], + [ + "PCIE_IMUX33_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT33" + ], + [ + "PCIE_IMUX34_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT34" + ], + [ + "PCIE_IMUX35_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT35" + ], + [ + "PCIE_IMUX36_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT36" + ], + [ + "PCIE_IMUX37_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT37" + ], + [ + "PCIE_IMUX38_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT38" + ], + [ + "PCIE_IMUX39_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT39" + ], + [ + "PCIE_IMUX40_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT40" + ], + [ + "PCIE_IMUX41_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT41" + ], + [ + "PCIE_IMUX42_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT42" + ], + [ + "PCIE_IMUX43_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT43" + ], + [ + "PCIE_IMUX44_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT44" + ], + [ + "PCIE_IMUX45_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT45" + ], + [ + "PCIE_IMUX46_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT46" + ], + [ + "PCIE_IMUX47_R_0", + "PCIE_INT_INTERFACE_IMUX_OUT47" + ], + [ + "PCIE_LH1_0", + "INT_INTERFACE_LH1" + ], + [ + "PCIE_LH2_0", + "INT_INTERFACE_LH2" + ], + [ + "PCIE_LH3_0", + "INT_INTERFACE_LH3" + ], + [ + "PCIE_LH4_0", + "INT_INTERFACE_LH4" + ], + [ + "PCIE_LH5_0", + "INT_INTERFACE_LH5" + ], + [ + "PCIE_LH6_0", + "INT_INTERFACE_LH6" + ], + [ + "PCIE_LH7_0", + "INT_INTERFACE_LH7" + ], + [ + "PCIE_LH8_0", + "INT_INTERFACE_LH8" + ], + [ + "PCIE_LH9_0", + "INT_INTERFACE_LH9" + ], + [ + "PCIE_LH10_0", + "INT_INTERFACE_LH10" + ], + [ + "PCIE_LH11_0", + "INT_INTERFACE_LH11" + ], + [ + "PCIE_LH12_0", + "INT_INTERFACE_LH12" + ], + [ + "PCIE_LOGIC_OUTS_B0_R_0", + "INT_INTERFACE_LOGIC_OUTS_B0" + ], + [ + "PCIE_LOGIC_OUTS_B1_R_0", + "INT_INTERFACE_LOGIC_OUTS_B1" + ], + [ + "PCIE_LOGIC_OUTS_B2_R_0", + "INT_INTERFACE_LOGIC_OUTS_B2" + ], + [ + "PCIE_LOGIC_OUTS_B3_R_0", + "INT_INTERFACE_LOGIC_OUTS_B3" + ], + [ + "PCIE_LOGIC_OUTS_B4_R_0", + "INT_INTERFACE_LOGIC_OUTS_B4" + ], + [ + "PCIE_LOGIC_OUTS_B5_R_0", + "INT_INTERFACE_LOGIC_OUTS_B5" + ], + [ + "PCIE_LOGIC_OUTS_B6_R_0", + "INT_INTERFACE_LOGIC_OUTS_B6" + ], + [ + "PCIE_LOGIC_OUTS_B7_R_0", + "INT_INTERFACE_LOGIC_OUTS_B7" + ], + [ + "PCIE_LOGIC_OUTS_B8_R_0", + "INT_INTERFACE_LOGIC_OUTS_B8" + ], + [ + "PCIE_LOGIC_OUTS_B9_R_0", + "INT_INTERFACE_LOGIC_OUTS_B9" + ], + [ + "PCIE_LOGIC_OUTS_B10_R_0", + "INT_INTERFACE_LOGIC_OUTS_B10" + ], + [ + "PCIE_LOGIC_OUTS_B11_R_0", + "INT_INTERFACE_LOGIC_OUTS_B11" + ], + [ + "PCIE_LOGIC_OUTS_B12_R_0", + "INT_INTERFACE_LOGIC_OUTS_B12" + ], + [ + "PCIE_LOGIC_OUTS_B13_R_0", + "INT_INTERFACE_LOGIC_OUTS_B13" + ], + [ + "PCIE_LOGIC_OUTS_B14_R_0", + "INT_INTERFACE_LOGIC_OUTS_B14" + ], + [ + "PCIE_LOGIC_OUTS_B15_R_0", + "INT_INTERFACE_LOGIC_OUTS_B15" + ], + [ + "PCIE_LOGIC_OUTS_B16_R_0", + "INT_INTERFACE_LOGIC_OUTS_B16" + ], + [ + "PCIE_LOGIC_OUTS_B17_R_0", + "INT_INTERFACE_LOGIC_OUTS_B17" + ], + [ + "PCIE_LOGIC_OUTS_B18_R_0", + "INT_INTERFACE_LOGIC_OUTS_B18" + ], + [ + "PCIE_LOGIC_OUTS_B19_R_0", + "INT_INTERFACE_LOGIC_OUTS_B19" + ], + [ + "PCIE_LOGIC_OUTS_B20_R_0", + "INT_INTERFACE_LOGIC_OUTS_B20" + ], + [ + "PCIE_LOGIC_OUTS_B21_R_0", + "INT_INTERFACE_LOGIC_OUTS_B21" + ], + [ + "PCIE_LOGIC_OUTS_B22_R_0", + "INT_INTERFACE_LOGIC_OUTS_B22" + ], + [ + "PCIE_LOGIC_OUTS_B23_R_0", + "INT_INTERFACE_LOGIC_OUTS_B23" + ], + [ + "PCIE_NE2A0_0", + "INT_INTERFACE_NE2A0" + ], + [ + "PCIE_NE2A1_0", + "INT_INTERFACE_NE2A1" + ], + [ + "PCIE_NE2A2_0", + "INT_INTERFACE_NE2A2" + ], + [ + "PCIE_NE2A3_0", + "INT_INTERFACE_NE2A3" + ], + [ + "PCIE_NE4BEG0_0", + "INT_INTERFACE_NE4BEG0" + ], + [ + "PCIE_NE4BEG1_0", + "INT_INTERFACE_NE4BEG1" + ], + [ + "PCIE_NE4BEG2_0", + "INT_INTERFACE_NE4BEG2" + ], + [ + "PCIE_NE4BEG3_0", + "INT_INTERFACE_NE4BEG3" + ], + [ + "PCIE_NE4C0_0", + "INT_INTERFACE_NE4C0" + ], + [ + "PCIE_NE4C1_0", + "INT_INTERFACE_NE4C1" + ], + [ + "PCIE_NE4C2_0", + "INT_INTERFACE_NE4C2" + ], + [ + "PCIE_NE4C3_0", + "INT_INTERFACE_NE4C3" + ], + [ + "PCIE_NW2A0_0", + "INT_INTERFACE_NW2A0" + ], + [ + "PCIE_NW2A1_0", + "INT_INTERFACE_NW2A1" + ], + [ + "PCIE_NW2A2_0", + "INT_INTERFACE_NW2A2" + ], + [ + "PCIE_NW2A3_0", + "INT_INTERFACE_NW2A3" + ], + [ + "PCIE_NW4A0_0", + "INT_INTERFACE_NW4A0" + ], + [ + "PCIE_NW4A1_0", + "INT_INTERFACE_NW4A1" + ], + [ + "PCIE_NW4A2_0", + "INT_INTERFACE_NW4A2" + ], + [ + "PCIE_NW4A3_0", + "INT_INTERFACE_NW4A3" + ], + [ + "PCIE_NW4END0_0", + "INT_INTERFACE_NW4END0" + ], + [ + "PCIE_NW4END1_0", + "INT_INTERFACE_NW4END1" + ], + [ + "PCIE_NW4END2_0", + "INT_INTERFACE_NW4END2" + ], + [ + "PCIE_NW4END3_0", + "INT_INTERFACE_NW4END3" + ], + [ + "PCIE_SE2A0_0", + "INT_INTERFACE_SE2A0" + ], + [ + "PCIE_SE2A1_0", + "INT_INTERFACE_SE2A1" + ], + [ + "PCIE_SE2A2_0", + "INT_INTERFACE_SE2A2" + ], + [ + "PCIE_SE2A3_0", + "INT_INTERFACE_SE2A3" + ], + [ + "PCIE_SE4BEG0_0", + "INT_INTERFACE_SE4BEG0" + ], + [ + "PCIE_SE4BEG1_0", + "INT_INTERFACE_SE4BEG1" + ], + [ + "PCIE_SE4BEG2_0", + "INT_INTERFACE_SE4BEG2" + ], + [ + "PCIE_SE4BEG3_0", + "INT_INTERFACE_SE4BEG3" + ], + [ + "PCIE_SE4C0_0", + "INT_INTERFACE_SE4C0" + ], + [ + "PCIE_SE4C1_0", + "INT_INTERFACE_SE4C1" + ], + [ + "PCIE_SE4C2_0", + "INT_INTERFACE_SE4C2" + ], + [ + "PCIE_SE4C3_0", + "INT_INTERFACE_SE4C3" + ], + [ + "PCIE_SW2A0_0", + "INT_INTERFACE_SW2A0" + ], + [ + "PCIE_SW2A1_0", + "INT_INTERFACE_SW2A1" + ], + [ + "PCIE_SW2A2_0", + "INT_INTERFACE_SW2A2" + ], + [ + "PCIE_SW2A3_0", + "INT_INTERFACE_SW2A3" + ], + [ + "PCIE_SW4A0_0", + "INT_INTERFACE_SW4A0" + ], + [ + "PCIE_SW4A1_0", + "INT_INTERFACE_SW4A1" + ], + [ + "PCIE_SW4A2_0", + "INT_INTERFACE_SW4A2" + ], + [ + "PCIE_SW4A3_0", + "INT_INTERFACE_SW4A3" + ], + [ + "PCIE_SW4END0_0", + "INT_INTERFACE_SW4END0" + ], + [ + "PCIE_SW4END1_0", + "INT_INTERFACE_SW4END1" + ], + [ + "PCIE_SW4END2_0", + "INT_INTERFACE_SW4END2" + ], + [ + "PCIE_SW4END3_0", + "INT_INTERFACE_SW4END3" + ], + [ + "PCIE_WL1END0_0", + "INT_INTERFACE_WL1END0" + ], + [ + "PCIE_WL1END1_0", + "INT_INTERFACE_WL1END1" + ], + [ + "PCIE_WL1END2_0", + "INT_INTERFACE_WL1END2" + ], + [ + "PCIE_WL1END3_0", + "INT_INTERFACE_WL1END3" + ], + [ + "PCIE_WR1END0_0", + "INT_INTERFACE_WR1END0" + ], + [ + "PCIE_WR1END1_0", + "INT_INTERFACE_WR1END1" + ], + [ + "PCIE_WR1END2_0", + "INT_INTERFACE_WR1END2" + ], + [ + "PCIE_WR1END3_0", + "INT_INTERFACE_WR1END3" + ], + [ + "PCIE_WW2A0_0", + "INT_INTERFACE_WW2A0" + ], + [ + "PCIE_WW2A1_0", + "INT_INTERFACE_WW2A1" + ], + [ + "PCIE_WW2A2_0", + "INT_INTERFACE_WW2A2" + ], + [ + "PCIE_WW2A3_0", + "INT_INTERFACE_WW2A3" + ], + [ + "PCIE_WW2END0_0", + "INT_INTERFACE_WW2END0" + ], + [ + "PCIE_WW2END1_0", + "INT_INTERFACE_WW2END1" + ], + [ + "PCIE_WW2END2_0", + "INT_INTERFACE_WW2END2" + ], + [ + "PCIE_WW2END3_0", + "INT_INTERFACE_WW2END3" + ], + [ + "PCIE_WW4A0_0", + "INT_INTERFACE_WW4A0" + ], + [ + "PCIE_WW4A1_0", + "INT_INTERFACE_WW4A1" + ], + [ + "PCIE_WW4A2_0", + "INT_INTERFACE_WW4A2" + ], + [ + "PCIE_WW4A3_0", + "INT_INTERFACE_WW4A3" + ], + [ + "PCIE_WW4B0_0", + "INT_INTERFACE_WW4B0" + ], + [ + "PCIE_WW4B1_0", + "INT_INTERFACE_WW4B1" + ], + [ + "PCIE_WW4B2_0", + "INT_INTERFACE_WW4B2" + ], + [ + "PCIE_WW4B3_0", + "INT_INTERFACE_WW4B3" + ], + [ + "PCIE_WW4C0_0", + "INT_INTERFACE_WW4C0" + ], + [ + "PCIE_WW4C1_0", + "INT_INTERFACE_WW4C1" + ], + [ + "PCIE_WW4C2_0", + "INT_INTERFACE_WW4C2" + ], + [ + "PCIE_WW4C3_0", + "INT_INTERFACE_WW4C3" + ], + [ + "PCIE_WW4END0_0", + "INT_INTERFACE_WW4END0" + ], + [ + "PCIE_WW4END1_0", + "INT_INTERFACE_WW4END1" + ], + [ + "PCIE_WW4END2_0", + "INT_INTERFACE_WW4END2" + ], + [ + "PCIE_WW4END3_0", + "INT_INTERFACE_WW4END3" + ] + ] + }, + { + "grid_deltas": [ + 0, + -10 + ], + "tile_types": [ + "PCIE_BOT", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "PCIE_CFGAERROOTERRCORRERRRECEIVED", + "PCIE_TOP_CFGAERROOTERRCORRERRRECEIVED" + ], + [ + "PCIE_CFGAERROOTERRFATALERRRECEIVED", + "PCIE_TOP_CFGAERROOTERRFATALERRRECEIVED" + ], + [ + "PCIE_CFGAERROOTERRFATALERRREPORTINGEN", + "PCIE_TOP_CFGAERROOTERRFATALERRREPORTINGEN" + ], + [ + "PCIE_CFGAERROOTERRNONFATALERRRECEIVED", + "PCIE_TOP_CFGAERROOTERRNONFATALERRRECEIVED" + ], + [ + "PCIE_CFGAERROOTERRNONFATALERRREPORTINGEN", + "PCIE_TOP_CFGAERROOTERRNONFATALERRREPORTINGEN" + ], + [ + "PCIE_CFGCOMMANDBUSMASTERENABLE", + "PCIE_TOP_CFGCOMMANDBUSMASTERENABLE" + ], + [ + "PCIE_CFGCOMMANDINTERRUPTDISABLE", + "PCIE_TOP_CFGCOMMANDINTERRUPTDISABLE" + ], + [ + "PCIE_CFGCOMMANDIOENABLE", + "PCIE_TOP_CFGCOMMANDIOENABLE" + ], + [ + "PCIE_CFGCOMMANDMEMENABLE", + "PCIE_TOP_CFGCOMMANDMEMENABLE" + ], + [ + "PCIE_CFGDEVCONTROL2ARIFORWARDEN", + "PCIE_TOP_CFGDEVCONTROL2ARIFORWARDEN" + ], + [ + "PCIE_CFGDEVCONTROL2ATOMICEGRESSBLOCK", + "PCIE_TOP_CFGDEVCONTROL2ATOMICEGRESSBLOCK" + ], + [ + "PCIE_CFGDEVCONTROL2ATOMICREQUESTEREN", + "PCIE_TOP_CFGDEVCONTROL2ATOMICREQUESTEREN" + ], + [ + "PCIE_CFGDEVCONTROL2CPLTIMEOUTDIS", + "PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTDIS" + ], + [ + "PCIE_CFGDEVCONTROL2CPLTIMEOUTVAL0", + "PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL0" + ], + [ + "PCIE_CFGDEVCONTROL2CPLTIMEOUTVAL1", + "PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL1" + ], + [ + "PCIE_CFGDEVCONTROL2CPLTIMEOUTVAL2", + "PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL2" + ], + [ + "PCIE_CFGDEVCONTROL2CPLTIMEOUTVAL3", + "PCIE_TOP_CFGDEVCONTROL2CPLTIMEOUTVAL3" + ], + [ + "PCIE_CFGDEVCONTROL2IDOCPLEN", + "PCIE_TOP_CFGDEVCONTROL2IDOCPLEN" + ], + [ + "PCIE_CFGDEVCONTROL2IDOREQEN", + "PCIE_TOP_CFGDEVCONTROL2IDOREQEN" + ], + [ + "PCIE_CFGDEVCONTROL2LTREN", + "PCIE_TOP_CFGDEVCONTROL2LTREN" + ], + [ + "PCIE_CFGDEVID0", + "PCIE_TOP_CFGDEVID0" + ], + [ + "PCIE_CFGDEVID1", + "PCIE_TOP_CFGDEVID1" + ], + [ + "PCIE_CFGDEVID2", + "PCIE_TOP_CFGDEVID2" + ], + [ + "PCIE_CFGDEVID3", + "PCIE_TOP_CFGDEVID3" + ], + [ + "PCIE_CFGDEVID4", + "PCIE_TOP_CFGDEVID4" + ], + [ + "PCIE_CFGDEVID5", + "PCIE_TOP_CFGDEVID5" + ], + [ + "PCIE_CFGDEVID6", + "PCIE_TOP_CFGDEVID6" + ], + [ + "PCIE_CFGDEVID7", + "PCIE_TOP_CFGDEVID7" + ], + [ + "PCIE_CFGDEVID8", + "PCIE_TOP_CFGDEVID8" + ], + [ + "PCIE_CFGDEVID9", + "PCIE_TOP_CFGDEVID9" + ], + [ + "PCIE_CFGDEVID10", + "PCIE_TOP_CFGDEVID10" + ], + [ + "PCIE_CFGDEVID11", + "PCIE_TOP_CFGDEVID11" + ], + [ + "PCIE_CFGDEVID12", + "PCIE_TOP_CFGDEVID12" + ], + [ + "PCIE_CFGDEVID13", + "PCIE_TOP_CFGDEVID13" + ], + [ + "PCIE_CFGDEVID14", + "PCIE_TOP_CFGDEVID14" + ], + [ + "PCIE_CFGDEVID15", + "PCIE_TOP_CFGDEVID15" + ], + [ + "PCIE_CFGDSN57", + "PCIE_TOP_CFGDSN57" + ], + [ + "PCIE_CFGDSN58", + "PCIE_TOP_CFGDSN58" + ], + [ + "PCIE_CFGDSN59", + "PCIE_TOP_CFGDSN59" + ], + [ + "PCIE_CFGDSN60", + "PCIE_TOP_CFGDSN60" + ], + [ + "PCIE_CFGDSN61", + "PCIE_TOP_CFGDSN61" + ], + [ + "PCIE_CFGDSN62", + "PCIE_TOP_CFGDSN62" + ], + [ + "PCIE_CFGDSN63", + "PCIE_TOP_CFGDSN63" + ], + [ + "PCIE_CFGERRAERHEADERLOG0", + "PCIE_TOP_CFGERRAERHEADERLOG0" + ], + [ + "PCIE_CFGERRAERHEADERLOG1", + "PCIE_TOP_CFGERRAERHEADERLOG1" + ], + [ + "PCIE_CFGERRAERHEADERLOG2", + "PCIE_TOP_CFGERRAERHEADERLOG2" + ], + [ + "PCIE_CFGERRAERHEADERLOG3", + "PCIE_TOP_CFGERRAERHEADERLOG3" + ], + [ + "PCIE_CFGERRAERHEADERLOG4", + "PCIE_TOP_CFGERRAERHEADERLOG4" + ], + [ + "PCIE_CFGERRAERHEADERLOG5", + "PCIE_TOP_CFGERRAERHEADERLOG5" + ], + [ + "PCIE_CFGERRAERHEADERLOG6", + "PCIE_TOP_CFGERRAERHEADERLOG6" + ], + [ + "PCIE_CFGERRAERHEADERLOG7", + "PCIE_TOP_CFGERRAERHEADERLOG7" + ], + [ + "PCIE_CFGERRAERHEADERLOG8", + "PCIE_TOP_CFGERRAERHEADERLOG8" + ], + [ + "PCIE_CFGERRAERHEADERLOG9", + "PCIE_TOP_CFGERRAERHEADERLOG9" + ], + [ + "PCIE_CFGERRAERHEADERLOG10", + "PCIE_TOP_CFGERRAERHEADERLOG10" + ], + [ + "PCIE_CFGERRAERHEADERLOG11", + "PCIE_TOP_CFGERRAERHEADERLOG11" + ], + [ + "PCIE_CFGERRLOCKEDN", + "PCIE_TOP_CFGERRLOCKEDN" + ], + [ + "PCIE_CFGERRNORECOVERYN", + "PCIE_TOP_CFGERRNORECOVERYN" + ], + [ + "PCIE_CFGERRTLPCPLHEADER26", + "PCIE_TOP_CFGERRTLPCPLHEADER26" + ], + [ + "PCIE_CFGERRTLPCPLHEADER27", + "PCIE_TOP_CFGERRTLPCPLHEADER27" + ], + [ + "PCIE_CFGERRTLPCPLHEADER28", + "PCIE_TOP_CFGERRTLPCPLHEADER28" + ], + [ + "PCIE_CFGERRTLPCPLHEADER29", + "PCIE_TOP_CFGERRTLPCPLHEADER29" + ], + [ + "PCIE_CFGERRTLPCPLHEADER30", + "PCIE_TOP_CFGERRTLPCPLHEADER30" + ], + [ + "PCIE_CFGERRTLPCPLHEADER31", + "PCIE_TOP_CFGERRTLPCPLHEADER31" + ], + [ + "PCIE_CFGERRTLPCPLHEADER32", + "PCIE_TOP_CFGERRTLPCPLHEADER32" + ], + [ + "PCIE_CFGERRTLPCPLHEADER33", + "PCIE_TOP_CFGERRTLPCPLHEADER33" + ], + [ + "PCIE_CFGERRTLPCPLHEADER34", + "PCIE_TOP_CFGERRTLPCPLHEADER34" + ], + [ + "PCIE_CFGERRTLPCPLHEADER35", + "PCIE_TOP_CFGERRTLPCPLHEADER35" + ], + [ + "PCIE_CFGERRTLPCPLHEADER36", + "PCIE_TOP_CFGERRTLPCPLHEADER36" + ], + [ + "PCIE_CFGERRTLPCPLHEADER37", + "PCIE_TOP_CFGERRTLPCPLHEADER37" + ], + [ + "PCIE_CFGERRTLPCPLHEADER38", + "PCIE_TOP_CFGERRTLPCPLHEADER38" + ], + [ + "PCIE_CFGERRTLPCPLHEADER39", + "PCIE_TOP_CFGERRTLPCPLHEADER39" + ], + [ + "PCIE_CFGERRTLPCPLHEADER40", + "PCIE_TOP_CFGERRTLPCPLHEADER40" + ], + [ + "PCIE_CFGERRTLPCPLHEADER41", + "PCIE_TOP_CFGERRTLPCPLHEADER41" + ], + [ + "PCIE_CFGERRTLPCPLHEADER42", + "PCIE_TOP_CFGERRTLPCPLHEADER42" + ], + [ + "PCIE_CFGERRTLPCPLHEADER43", + "PCIE_TOP_CFGERRTLPCPLHEADER43" + ], + [ + "PCIE_CFGERRTLPCPLHEADER44", + "PCIE_TOP_CFGERRTLPCPLHEADER44" + ], + [ + "PCIE_CFGERRTLPCPLHEADER45", + "PCIE_TOP_CFGERRTLPCPLHEADER45" + ], + [ + "PCIE_CFGERRTLPCPLHEADER46", + "PCIE_TOP_CFGERRTLPCPLHEADER46" + ], + [ + "PCIE_CFGERRTLPCPLHEADER47", + "PCIE_TOP_CFGERRTLPCPLHEADER47" + ], + [ + "PCIE_CFGINTERRUPTDI0", + "PCIE_TOP_CFGINTERRUPTDI0" + ], + [ + "PCIE_CFGINTERRUPTN", + "PCIE_TOP_CFGINTERRUPTN" + ], + [ + "PCIE_CFGLINKCONTROLASPMCONTROL1", + "PCIE_TOP_CFGLINKCONTROLASPMCONTROL1" + ], + [ + "PCIE_CFGLINKCONTROLAUTOBANDWIDTHINTEN", + "PCIE_TOP_CFGLINKCONTROLAUTOBANDWIDTHINTEN" + ], + [ + "PCIE_CFGLINKCONTROLBANDWIDTHINTEN", + "PCIE_TOP_CFGLINKCONTROLBANDWIDTHINTEN" + ], + [ + "PCIE_CFGLINKCONTROLCLOCKPMEN", + "PCIE_TOP_CFGLINKCONTROLCLOCKPMEN" + ], + [ + "PCIE_CFGLINKCONTROLCOMMONCLOCK", + "PCIE_TOP_CFGLINKCONTROLCOMMONCLOCK" + ], + [ + "PCIE_CFGLINKCONTROLEXTENDEDSYNC", + "PCIE_TOP_CFGLINKCONTROLEXTENDEDSYNC" + ], + [ + "PCIE_CFGLINKCONTROLHWAUTOWIDTHDIS", + "PCIE_TOP_CFGLINKCONTROLHWAUTOWIDTHDIS" + ], + [ + "PCIE_CFGLINKCONTROLLINKDISABLE", + "PCIE_TOP_CFGLINKCONTROLLINKDISABLE" + ], + [ + "PCIE_CFGLINKCONTROLRCB", + "PCIE_TOP_CFGLINKCONTROLRCB" + ], + [ + "PCIE_CFGLINKCONTROLRETRAINLINK", + "PCIE_TOP_CFGLINKCONTROLRETRAINLINK" + ], + [ + "PCIE_CFGMGMTDO16", + "PCIE_TOP_CFGMGMTDO16" + ], + [ + "PCIE_CFGMGMTDO17", + "PCIE_TOP_CFGMGMTDO17" + ], + [ + "PCIE_CFGMGMTDO18", + "PCIE_TOP_CFGMGMTDO18" + ], + [ + "PCIE_CFGMGMTDO19", + "PCIE_TOP_CFGMGMTDO19" + ], + [ + "PCIE_CFGMGMTDO20", + "PCIE_TOP_CFGMGMTDO20" + ], + [ + "PCIE_CFGMGMTDO21", + "PCIE_TOP_CFGMGMTDO21" + ], + [ + "PCIE_CFGMGMTDO22", + "PCIE_TOP_CFGMGMTDO22" + ], + [ + "PCIE_CFGMGMTDO23", + "PCIE_TOP_CFGMGMTDO23" + ], + [ + "PCIE_CFGMGMTDO24", + "PCIE_TOP_CFGMGMTDO24" + ], + [ + "PCIE_CFGMGMTDO25", + "PCIE_TOP_CFGMGMTDO25" + ], + [ + "PCIE_CFGMGMTDO26", + "PCIE_TOP_CFGMGMTDO26" + ], + [ + "PCIE_CFGMGMTDO27", + "PCIE_TOP_CFGMGMTDO27" + ], + [ + "PCIE_CFGMGMTDO28", + "PCIE_TOP_CFGMGMTDO28" + ], + [ + "PCIE_CFGMGMTDO29", + "PCIE_TOP_CFGMGMTDO29" + ], + [ + "PCIE_CFGMGMTDO30", + "PCIE_TOP_CFGMGMTDO30" + ], + [ + "PCIE_CFGPCIELINKSTATE1", + "PCIE_TOP_CFGPCIELINKSTATE1" + ], + [ + "PCIE_CFGPCIELINKSTATE2", + "PCIE_TOP_CFGPCIELINKSTATE2" + ], + [ + "PCIE_CFGPMCSRPMEEN", + "PCIE_TOP_CFGPMCSRPMEEN" + ], + [ + "PCIE_CFGPMCSRPMESTATUS", + "PCIE_TOP_CFGPMCSRPMESTATUS" + ], + [ + "PCIE_CFGPMCSRPOWERSTATE0", + "PCIE_TOP_CFGPMCSRPOWERSTATE0" + ], + [ + "PCIE_CFGPMCSRPOWERSTATE1", + "PCIE_TOP_CFGPMCSRPOWERSTATE1" + ], + [ + "PCIE_CFGPMRCVASREQL1N", + "PCIE_TOP_CFGPMRCVASREQL1N" + ], + [ + "PCIE_CFGPMRCVENTERL1N", + "PCIE_TOP_CFGPMRCVENTERL1N" + ], + [ + "PCIE_CFGPMRCVENTERL23N", + "PCIE_TOP_CFGPMRCVENTERL23N" + ], + [ + "PCIE_CFGPMRCVREQACKN", + "PCIE_TOP_CFGPMRCVREQACKN" + ], + [ + "PCIE_CFGTRANSACTION", + "PCIE_TOP_CFGTRANSACTION" + ], + [ + "PCIE_CFGTRANSACTIONADDR0", + "PCIE_TOP_CFGTRANSACTIONADDR0" + ], + [ + "PCIE_CFGTRANSACTIONADDR1", + "PCIE_TOP_CFGTRANSACTIONADDR1" + ], + [ + "PCIE_CFGTRANSACTIONADDR2", + "PCIE_TOP_CFGTRANSACTIONADDR2" + ], + [ + "PCIE_CFGTRANSACTIONADDR3", + "PCIE_TOP_CFGTRANSACTIONADDR3" + ], + [ + "PCIE_CFGTRANSACTIONADDR4", + "PCIE_TOP_CFGTRANSACTIONADDR4" + ], + [ + "PCIE_CFGTRANSACTIONADDR5", + "PCIE_TOP_CFGTRANSACTIONADDR5" + ], + [ + "PCIE_CFGTRANSACTIONADDR6", + "PCIE_TOP_CFGTRANSACTIONADDR6" + ], + [ + "PCIE_CFGTRANSACTIONTYPE", + "PCIE_TOP_CFGTRANSACTIONTYPE" + ], + [ + "PCIE_CFGVCTCVCMAP0", + "PCIE_TOP_CFGVCTCVCMAP0" + ], + [ + "PCIE_CFGVCTCVCMAP1", + "PCIE_TOP_CFGVCTCVCMAP1" + ], + [ + "PCIE_CFGVCTCVCMAP2", + "PCIE_TOP_CFGVCTCVCMAP2" + ], + [ + "PCIE_CFGVCTCVCMAP3", + "PCIE_TOP_CFGVCTCVCMAP3" + ], + [ + "PCIE_CFGVCTCVCMAP4", + "PCIE_TOP_CFGVCTCVCMAP4" + ], + [ + "PCIE_CFGVCTCVCMAP5", + "PCIE_TOP_CFGVCTCVCMAP5" + ], + [ + "PCIE_CFGVCTCVCMAP6", + "PCIE_TOP_CFGVCTCVCMAP6" + ], + [ + "PCIE_CFGVENDID0", + "PCIE_TOP_CFGVENDID0" + ], + [ + "PCIE_DBGMODE0", + "PCIE_TOP_DBGMODE0" + ], + [ + "PCIE_DBGVECA0", + "PCIE_TOP_DBGVECA0" + ], + [ + "PCIE_DBGVECA1", + "PCIE_TOP_DBGVECA1" + ], + [ + "PCIE_DBGVECA2", + "PCIE_TOP_DBGVECA2" + ], + [ + "PCIE_DBGVECA3", + "PCIE_TOP_DBGVECA3" + ], + [ + "PCIE_DBGVECA4", + "PCIE_TOP_DBGVECA4" + ], + [ + "PCIE_DBGVECA5", + "PCIE_TOP_DBGVECA5" + ], + [ + "PCIE_DBGVECA6", + "PCIE_TOP_DBGVECA6" + ], + [ + "PCIE_DBGVECA7", + "PCIE_TOP_DBGVECA7" + ], + [ + "PCIE_DBGVECA8", + "PCIE_TOP_DBGVECA8" + ], + [ + "PCIE_DBGVECA9", + "PCIE_TOP_DBGVECA9" + ], + [ + "PCIE_DBGVECA10", + "PCIE_TOP_DBGVECA10" + ], + [ + "PCIE_DBGVECA11", + "PCIE_TOP_DBGVECA11" + ], + [ + "PCIE_DBGVECA12", + "PCIE_TOP_DBGVECA12" + ], + [ + "PCIE_DBGVECA13", + "PCIE_TOP_DBGVECA13" + ], + [ + "PCIE_DBGVECA14", + "PCIE_TOP_DBGVECA14" + ], + [ + "PCIE_DBGVECA15", + "PCIE_TOP_DBGVECA15" + ], + [ + "PCIE_DBGVECA16", + "PCIE_TOP_DBGVECA16" + ], + [ + "PCIE_DBGVECA17", + "PCIE_TOP_DBGVECA17" + ], + [ + "PCIE_DBGVECA18", + "PCIE_TOP_DBGVECA18" + ], + [ + "PCIE_DBGVECA19", + "PCIE_TOP_DBGVECA19" + ], + [ + "PCIE_DBGVECA20", + "PCIE_TOP_DBGVECA20" + ], + [ + "PCIE_DBGVECA21", + "PCIE_TOP_DBGVECA21" + ], + [ + "PCIE_DBGVECB10", + "PCIE_TOP_DBGVECB10" + ], + [ + "PCIE_DRPADDR7", + "PCIE_TOP_DRPADDR7" + ], + [ + "PCIE_DRPADDR8", + "PCIE_TOP_DRPADDR8" + ], + [ + "PCIE_DRPDI0", + "PCIE_TOP_DRPDI0" + ], + [ + "PCIE_DRPDI1", + "PCIE_TOP_DRPDI1" + ], + [ + "PCIE_DRPDI2", + "PCIE_TOP_DRPDI2" + ], + [ + "PCIE_DRPDI3", + "PCIE_TOP_DRPDI3" + ], + [ + "PCIE_DRPDI4", + "PCIE_TOP_DRPDI4" + ], + [ + "PCIE_DRPDI5", + "PCIE_TOP_DRPDI5" + ], + [ + "PCIE_DRPDI6", + "PCIE_TOP_DRPDI6" + ], + [ + "PCIE_DRPDI7", + "PCIE_TOP_DRPDI7" + ], + [ + "PCIE_DRPDI8", + "PCIE_TOP_DRPDI8" + ], + [ + "PCIE_DRPDI9", + "PCIE_TOP_DRPDI9" + ], + [ + "PCIE_DRPDI10", + "PCIE_TOP_DRPDI10" + ], + [ + "PCIE_DRPDI11", + "PCIE_TOP_DRPDI11" + ], + [ + "PCIE_DRPDI12", + "PCIE_TOP_DRPDI12" + ], + [ + "PCIE_DRPDI13", + "PCIE_TOP_DRPDI13" + ], + [ + "PCIE_DRPDI14", + "PCIE_TOP_DRPDI14" + ], + [ + "PCIE_DRPDI15", + "PCIE_TOP_DRPDI15" + ], + [ + "PCIE_DRPDO0", + "PCIE_TOP_DRPDO0" + ], + [ + "PCIE_DRPDO1", + "PCIE_TOP_DRPDO1" + ], + [ + "PCIE_DRPDO2", + "PCIE_TOP_DRPDO2" + ], + [ + "PCIE_DRPDO3", + "PCIE_TOP_DRPDO3" + ], + [ + "PCIE_DRPDO4", + "PCIE_TOP_DRPDO4" + ], + [ + "PCIE_DRPDO5", + "PCIE_TOP_DRPDO5" + ], + [ + "PCIE_DRPDO6", + "PCIE_TOP_DRPDO6" + ], + [ + "PCIE_DRPDO11", + "PCIE_TOP_DRPDO11" + ], + [ + "PCIE_DRPDO12", + "PCIE_TOP_DRPDO12" + ], + [ + "PCIE_DRPDO13", + "PCIE_TOP_DRPDO13" + ], + [ + "PCIE_DRPDO14", + "PCIE_TOP_DRPDO14" + ], + [ + "PCIE_DRPDO15", + "PCIE_TOP_DRPDO15" + ], + [ + "PCIE_DRPRDY", + "PCIE_TOP_DRPRDY" + ], + [ + "PCIE_EDTBYPASS", + "PCIE_TOP_EDTBYPASS" + ], + [ + "PCIE_EDTCONFIGURATION", + "PCIE_TOP_EDTCONFIGURATION" + ], + [ + "PCIE_EDTUPDATE", + "PCIE_TOP_EDTUPDATE" + ], + [ + "PCIE_LL2SENDASREQL1", + "PCIE_TOP_LL2SENDASREQL1" + ], + [ + "PCIE_LL2SENDENTERL1", + "PCIE_TOP_LL2SENDENTERL1" + ], + [ + "PCIE_LL2SENDENTERL23", + "PCIE_TOP_LL2SENDENTERL23" + ], + [ + "PCIE_LL2SENDPMACK", + "PCIE_TOP_LL2SENDPMACK" + ], + [ + "PCIE_LL2SUSPENDNOW", + "PCIE_TOP_LL2SUSPENDNOW" + ], + [ + "PCIE_LL2TFCINIT1SEQ", + "PCIE_TOP_LL2TFCINIT1SEQ" + ], + [ + "PCIE_LL2TFCINIT2SEQ", + "PCIE_TOP_LL2TFCINIT2SEQ" + ], + [ + "PCIE_LL2TLPRCV", + "PCIE_TOP_LL2TLPRCV" + ], + [ + "PCIE_MIMRXRADDR0", + "PCIE_TOP_MIMRXRADDR0" + ], + [ + "PCIE_MIMRXRADDR1", + "PCIE_TOP_MIMRXRADDR1" + ], + [ + "PCIE_MIMRXRADDR2", + "PCIE_TOP_MIMRXRADDR2" + ], + [ + "PCIE_MIMRXRADDR4", + "PCIE_TOP_MIMRXRADDR4" + ], + [ + "PCIE_MIMRXRADDR8", + "PCIE_TOP_MIMRXRADDR8" + ], + [ + "PCIE_MIMRXRADDR9", + "PCIE_TOP_MIMRXRADDR9" + ], + [ + "PCIE_MIMRXRADDR10", + "PCIE_TOP_MIMRXRADDR10" + ], + [ + "PCIE_MIMRXRADDR11", + "PCIE_TOP_MIMRXRADDR11" + ], + [ + "PCIE_MIMRXRDATA20", + "PCIE_TOP_MIMRXRDATA20" + ], + [ + "PCIE_MIMRXRDATA21", + "PCIE_TOP_MIMRXRDATA21" + ], + [ + "PCIE_MIMRXRDATA22", + "PCIE_TOP_MIMRXRDATA22" + ], + [ + "PCIE_MIMRXRDATA23", + "PCIE_TOP_MIMRXRDATA23" + ], + [ + "PCIE_MIMRXRDATA24", + "PCIE_TOP_MIMRXRDATA24" + ], + [ + "PCIE_MIMRXRDATA25", + "PCIE_TOP_MIMRXRDATA25" + ], + [ + "PCIE_MIMRXRDATA26", + "PCIE_TOP_MIMRXRDATA26" + ], + [ + "PCIE_MIMRXRDATA27", + "PCIE_TOP_MIMRXRDATA27" + ], + [ + "PCIE_MIMRXRDATA28", + "PCIE_TOP_MIMRXRDATA28" + ], + [ + "PCIE_MIMRXRDATA29", + "PCIE_TOP_MIMRXRDATA29" + ], + [ + "PCIE_MIMRXRDATA30", + "PCIE_TOP_MIMRXRDATA30" + ], + [ + "PCIE_MIMRXRDATA31", + "PCIE_TOP_MIMRXRDATA31" + ], + [ + "PCIE_MIMRXRDATA32", + "PCIE_TOP_MIMRXRDATA32" + ], + [ + "PCIE_MIMRXRDATA33", + "PCIE_TOP_MIMRXRDATA33" + ], + [ + "PCIE_MIMRXRDATA34", + "PCIE_TOP_MIMRXRDATA34" + ], + [ + "PCIE_MIMRXRDATA35", + "PCIE_TOP_MIMRXRDATA35" + ], + [ + "PCIE_MIMRXRDATA36", + "PCIE_TOP_MIMRXRDATA36" + ], + [ + "PCIE_MIMRXRDATA37", + "PCIE_TOP_MIMRXRDATA37" + ], + [ + "PCIE_MIMRXRDATA38", + "PCIE_TOP_MIMRXRDATA38" + ], + [ + "PCIE_MIMRXRDATA39", + "PCIE_TOP_MIMRXRDATA39" + ], + [ + "PCIE_MIMRXRDATA40", + "PCIE_TOP_MIMRXRDATA40" + ], + [ + "PCIE_MIMRXRDATA41", + "PCIE_TOP_MIMRXRDATA41" + ], + [ + "PCIE_MIMRXRDATA42", + "PCIE_TOP_MIMRXRDATA42" + ], + [ + "PCIE_MIMRXRDATA43", + "PCIE_TOP_MIMRXRDATA43" + ], + [ + "PCIE_MIMRXRDATA44", + "PCIE_TOP_MIMRXRDATA44" + ], + [ + "PCIE_MIMRXRDATA45", + "PCIE_TOP_MIMRXRDATA45" + ], + [ + "PCIE_MIMRXRDATA46", + "PCIE_TOP_MIMRXRDATA46" + ], + [ + "PCIE_MIMRXRDATA47", + "PCIE_TOP_MIMRXRDATA47" + ], + [ + "PCIE_MIMRXRDATA48", + "PCIE_TOP_MIMRXRDATA48" + ], + [ + "PCIE_MIMRXRDATA49", + "PCIE_TOP_MIMRXRDATA49" + ], + [ + "PCIE_MIMRXRDATA50", + "PCIE_TOP_MIMRXRDATA50" + ], + [ + "PCIE_MIMRXRDATA51", + "PCIE_TOP_MIMRXRDATA51" + ], + [ + "PCIE_MIMRXRDATA52", + "PCIE_TOP_MIMRXRDATA52" + ], + [ + "PCIE_MIMRXRDATA53", + "PCIE_TOP_MIMRXRDATA53" + ], + [ + "PCIE_MIMRXRDATA54", + "PCIE_TOP_MIMRXRDATA54" + ], + [ + "PCIE_MIMRXRDATA55", + "PCIE_TOP_MIMRXRDATA55" + ], + [ + "PCIE_MIMRXREN", + "PCIE_TOP_MIMRXREN" + ], + [ + "PCIE_MIMRXWADDR1", + "PCIE_TOP_MIMRXWADDR1" + ], + [ + "PCIE_MIMRXWADDR2", + "PCIE_TOP_MIMRXWADDR2" + ], + [ + "PCIE_MIMRXWADDR5", + "PCIE_TOP_MIMRXWADDR5" + ], + [ + "PCIE_MIMRXWADDR12", + "PCIE_TOP_MIMRXWADDR12" + ], + [ + "PCIE_MIMRXWDATA0", + "PCIE_TOP_MIMRXWDATA0" + ], + [ + "PCIE_MIMRXWDATA1", + "PCIE_TOP_MIMRXWDATA1" + ], + [ + "PCIE_MIMRXWDATA2", + "PCIE_TOP_MIMRXWDATA2" + ], + [ + "PCIE_MIMRXWDATA3", + "PCIE_TOP_MIMRXWDATA3" + ], + [ + "PCIE_MIMRXWDATA4", + "PCIE_TOP_MIMRXWDATA4" + ], + [ + "PCIE_MIMRXWDATA5", + "PCIE_TOP_MIMRXWDATA5" + ], + [ + "PCIE_MIMRXWDATA6", + "PCIE_TOP_MIMRXWDATA6" + ], + [ + "PCIE_MIMRXWDATA7", + "PCIE_TOP_MIMRXWDATA7" + ], + [ + "PCIE_MIMRXWDATA8", + "PCIE_TOP_MIMRXWDATA8" + ], + [ + "PCIE_MIMRXWDATA9", + "PCIE_TOP_MIMRXWDATA9" + ], + [ + "PCIE_MIMRXWDATA10", + "PCIE_TOP_MIMRXWDATA10" + ], + [ + "PCIE_MIMRXWDATA11", + "PCIE_TOP_MIMRXWDATA11" + ], + [ + "PCIE_MIMRXWDATA12", + "PCIE_TOP_MIMRXWDATA12" + ], + [ + "PCIE_MIMRXWDATA13", + "PCIE_TOP_MIMRXWDATA13" + ], + [ + "PCIE_MIMRXWDATA15", + "PCIE_TOP_MIMRXWDATA15" + ], + [ + "PCIE_MIMRXWDATA17", + "PCIE_TOP_MIMRXWDATA17" + ], + [ + "PCIE_MIMRXWDATA19", + "PCIE_TOP_MIMRXWDATA19" + ], + [ + "PCIE_MIMRXWDATA20", + "PCIE_TOP_MIMRXWDATA20" + ], + [ + "PCIE_MIMRXWDATA21", + "PCIE_TOP_MIMRXWDATA21" + ], + [ + "PCIE_MIMRXWDATA22", + "PCIE_TOP_MIMRXWDATA22" + ], + [ + "PCIE_MIMRXWDATA23", + "PCIE_TOP_MIMRXWDATA23" + ], + [ + "PCIE_MIMRXWDATA24", + "PCIE_TOP_MIMRXWDATA24" + ], + [ + "PCIE_MIMRXWDATA25", + "PCIE_TOP_MIMRXWDATA25" + ], + [ + "PCIE_MIMRXWDATA26", + "PCIE_TOP_MIMRXWDATA26" + ], + [ + "PCIE_MIMRXWDATA27", + "PCIE_TOP_MIMRXWDATA27" + ], + [ + "PCIE_MIMRXWDATA28", + "PCIE_TOP_MIMRXWDATA28" + ], + [ + "PCIE_MIMRXWDATA29", + "PCIE_TOP_MIMRXWDATA29" + ], + [ + "PCIE_MIMRXWDATA30", + "PCIE_TOP_MIMRXWDATA30" + ], + [ + "PCIE_MIMRXWDATA31", + "PCIE_TOP_MIMRXWDATA31" + ], + [ + "PCIE_MIMRXWDATA32", + "PCIE_TOP_MIMRXWDATA32" + ], + [ + "PCIE_MIMRXWDATA33", + "PCIE_TOP_MIMRXWDATA33" + ], + [ + "PCIE_MIMRXWDATA34", + "PCIE_TOP_MIMRXWDATA34" + ], + [ + "PCIE_MIMRXWDATA35", + "PCIE_TOP_MIMRXWDATA35" + ], + [ + "PCIE_MIMRXWDATA49", + "PCIE_TOP_MIMRXWDATA49" + ], + [ + "PCIE_MIMRXWDATA51", + "PCIE_TOP_MIMRXWDATA51" + ], + [ + "PCIE_MIMRXWEN", + "PCIE_TOP_MIMRXWEN" + ], + [ + "PCIE_PIPERX0CHANISALIGNED", + "PCIE_TOP_PIPERX0CHANISALIGNED" + ], + [ + "PCIE_PIPERX0CHARISK0", + "PCIE_TOP_PIPERX0CHARISK0" + ], + [ + "PCIE_PIPERX0DATA0", + "PCIE_TOP_PIPERX0DATA0" + ], + [ + "PCIE_PIPERX0DATA1", + "PCIE_TOP_PIPERX0DATA1" + ], + [ + "PCIE_PIPERX0DATA2", + "PCIE_TOP_PIPERX0DATA2" + ], + [ + "PCIE_PIPERX0DATA3", + "PCIE_TOP_PIPERX0DATA3" + ], + [ + "PCIE_PIPERX0DATA4", + "PCIE_TOP_PIPERX0DATA4" + ], + [ + "PCIE_PIPERX0DATA5", + "PCIE_TOP_PIPERX0DATA5" + ], + [ + "PCIE_PIPERX0DATA6", + "PCIE_TOP_PIPERX0DATA6" + ], + [ + "PCIE_PIPERX0DATA7", + "PCIE_TOP_PIPERX0DATA7" + ], + [ + "PCIE_PIPERX0PHYSTATUS", + "PCIE_TOP_PIPERX0PHYSTATUS" + ], + [ + "PCIE_PIPERX0VALID", + "PCIE_TOP_PIPERX0VALID" + ], + [ + "PCIE_PIPERX4CHANISALIGNED", + "PCIE_TOP_PIPERX4CHANISALIGNED" + ], + [ + "PCIE_PIPERX4CHARISK0", + "PCIE_TOP_PIPERX4CHARISK0" + ], + [ + "PCIE_PIPERX4DATA0", + "PCIE_TOP_PIPERX4DATA0" + ], + [ + "PCIE_PIPERX4DATA1", + "PCIE_TOP_PIPERX4DATA1" + ], + [ + "PCIE_PIPERX4DATA2", + "PCIE_TOP_PIPERX4DATA2" + ], + [ + "PCIE_PIPERX4DATA3", + "PCIE_TOP_PIPERX4DATA3" + ], + [ + "PCIE_PIPERX4DATA4", + "PCIE_TOP_PIPERX4DATA4" + ], + [ + "PCIE_PIPERX4DATA5", + "PCIE_TOP_PIPERX4DATA5" + ], + [ + "PCIE_PIPERX4DATA6", + "PCIE_TOP_PIPERX4DATA6" + ], + [ + "PCIE_PIPERX4DATA7", + "PCIE_TOP_PIPERX4DATA7" + ], + [ + "PCIE_PIPERX4PHYSTATUS", + "PCIE_TOP_PIPERX4PHYSTATUS" + ], + [ + "PCIE_PIPERX4VALID", + "PCIE_TOP_PIPERX4VALID" + ], + [ + "PCIE_PIPETXMARGIN0", + "PCIE_TOP_PIPETXMARGIN0" + ], + [ + "PCIE_PIPETXMARGIN1", + "PCIE_TOP_PIPETXMARGIN1" + ], + [ + "PCIE_PIPETXMARGIN2", + "PCIE_TOP_PIPETXMARGIN2" + ], + [ + "PCIE_PL2DIRECTEDLSTATE0", + "PCIE_TOP_PL2DIRECTEDLSTATE0" + ], + [ + "PCIE_PL2DIRECTEDLSTATE1", + "PCIE_TOP_PL2DIRECTEDLSTATE1" + ], + [ + "PCIE_PL2DIRECTEDLSTATE2", + "PCIE_TOP_PL2DIRECTEDLSTATE2" + ], + [ + "PCIE_PL2DIRECTEDLSTATE3", + "PCIE_TOP_PL2DIRECTEDLSTATE3" + ], + [ + "PCIE_PL2DIRECTEDLSTATE4", + "PCIE_TOP_PL2DIRECTEDLSTATE4" + ], + [ + "PCIE_PL2RECOVERY", + "PCIE_TOP_PL2RECOVERY" + ], + [ + "PCIE_PL2SUSPENDOK", + "PCIE_TOP_PL2SUSPENDOK" + ], + [ + "PCIE_PLDBGVEC8", + "PCIE_TOP_PLDBGVEC8" + ], + [ + "PCIE_SCANENABLEN", + "PCIE_TOP_SCANENABLEN" + ], + [ + "PCIE_SCANMODEN", + "PCIE_TOP_SCANMODEN" + ], + [ + "PCIE_TL2ASPMSUSPENDCREDITCHECK", + "PCIE_TOP_TL2ASPMSUSPENDCREDITCHECK" + ], + [ + "PCIE_TL2PPMSUSPENDREQ", + "PCIE_TOP_TL2PPMSUSPENDREQ" + ], + [ + "PCIE_TRNRD59", + "PCIE_TOP_TRNRD59" + ], + [ + "PCIE_TRNRD60", + "PCIE_TOP_TRNRD60" + ], + [ + "PCIE_TRNRD61", + "PCIE_TOP_TRNRD61" + ], + [ + "PCIE_TRNRD62", + "PCIE_TOP_TRNRD62" + ], + [ + "PCIE_TRNRD63", + "PCIE_TOP_TRNRD63" + ], + [ + "PCIE_TRNRD64", + "PCIE_TOP_TRNRD64" + ], + [ + "PCIE_TRNRD65", + "PCIE_TOP_TRNRD65" + ], + [ + "PCIE_TRNRD66", + "PCIE_TOP_TRNRD66" + ], + [ + "PCIE_TRNRD67", + "PCIE_TOP_TRNRD67" + ], + [ + "PCIE_TRNRD68", + "PCIE_TOP_TRNRD68" + ], + [ + "PCIE_TRNRD69", + "PCIE_TOP_TRNRD69" + ], + [ + "PCIE_TRNRD70", + "PCIE_TOP_TRNRD70" + ], + [ + "PCIE_TRNRD71", + "PCIE_TOP_TRNRD71" + ], + [ + "PCIE_TRNRD72", + "PCIE_TOP_TRNRD72" + ], + [ + "PCIE_TRNRD73", + "PCIE_TOP_TRNRD73" + ], + [ + "PCIE_TRNRD74", + "PCIE_TOP_TRNRD74" + ], + [ + "PCIE_TRNRD75", + "PCIE_TOP_TRNRD75" + ], + [ + "PCIE_TRNRD76", + "PCIE_TOP_TRNRD76" + ], + [ + "PCIE_TRNRD77", + "PCIE_TOP_TRNRD77" + ], + [ + "PCIE_TRNRD78", + "PCIE_TOP_TRNRD78" + ], + [ + "PCIE_TRNRD79", + "PCIE_TOP_TRNRD79" + ], + [ + "PCIE_TRNRD80", + "PCIE_TOP_TRNRD80" + ], + [ + "PCIE_TRNRD81", + "PCIE_TOP_TRNRD81" + ], + [ + "PCIE_TRNRD82", + "PCIE_TOP_TRNRD82" + ], + [ + "PCIE_TRNRD83", + "PCIE_TOP_TRNRD83" + ], + [ + "PCIE_TRNRD84", + "PCIE_TOP_TRNRD84" + ], + [ + "PCIE_TRNRD85", + "PCIE_TOP_TRNRD85" + ], + [ + "PCIE_TRNRD86", + "PCIE_TOP_TRNRD86" + ], + [ + "PCIE_TRNRD87", + "PCIE_TOP_TRNRD87" + ], + [ + "PCIE_TRNRD88", + "PCIE_TOP_TRNRD88" + ], + [ + "PCIE_TRNRD89", + "PCIE_TOP_TRNRD89" + ], + [ + "PCIE_TRNRD90", + "PCIE_TOP_TRNRD90" + ], + [ + "PCIE_TRNRD91", + "PCIE_TOP_TRNRD91" + ], + [ + "PCIE_TRNRD92", + "PCIE_TOP_TRNRD92" + ], + [ + "PCIE_TRNRD93", + "PCIE_TOP_TRNRD93" + ], + [ + "PCIE_TRNRD94", + "PCIE_TOP_TRNRD94" + ], + [ + "PCIE_TRNRD95", + "PCIE_TOP_TRNRD95" + ], + [ + "PCIE_TRNRD96", + "PCIE_TOP_TRNRD96" + ], + [ + "PCIE_TRNRD97", + "PCIE_TOP_TRNRD97" + ], + [ + "PCIE_TRNRD98", + "PCIE_TOP_TRNRD98" + ], + [ + "PCIE_TRNRDLLPDATA32", + "PCIE_TOP_TRNRDLLPDATA32" + ], + [ + "PCIE_TRNRDLLPDATA33", + "PCIE_TOP_TRNRDLLPDATA33" + ], + [ + "PCIE_TRNRDLLPDATA34", + "PCIE_TOP_TRNRDLLPDATA34" + ], + [ + "PCIE_TRNRDLLPDATA35", + "PCIE_TOP_TRNRDLLPDATA35" + ], + [ + "PCIE_TRNRDLLPDATA36", + "PCIE_TOP_TRNRDLLPDATA36" + ], + [ + "PCIE_TRNRDLLPDATA37", + "PCIE_TOP_TRNRDLLPDATA37" + ], + [ + "PCIE_TRNRDLLPDATA38", + "PCIE_TOP_TRNRDLLPDATA38" + ], + [ + "PCIE_TRNRDLLPDATA39", + "PCIE_TOP_TRNRDLLPDATA39" + ], + [ + "PCIE_TRNRDLLPDATA40", + "PCIE_TOP_TRNRDLLPDATA40" + ], + [ + "PCIE_TRNRDLLPDATA41", + "PCIE_TOP_TRNRDLLPDATA41" + ], + [ + "PCIE_TRNRDLLPDATA42", + "PCIE_TOP_TRNRDLLPDATA42" + ], + [ + "PCIE_TRNRDLLPDATA43", + "PCIE_TOP_TRNRDLLPDATA43" + ], + [ + "PCIE_TRNRDLLPDATA44", + "PCIE_TOP_TRNRDLLPDATA44" + ], + [ + "PCIE_TRNRDLLPDATA45", + "PCIE_TOP_TRNRDLLPDATA45" + ], + [ + "PCIE_TRNRDLLPDATA46", + "PCIE_TOP_TRNRDLLPDATA46" + ], + [ + "PCIE_TRNRDLLPDATA47", + "PCIE_TOP_TRNRDLLPDATA47" + ], + [ + "PCIE_TRNRDLLPDATA48", + "PCIE_TOP_TRNRDLLPDATA48" + ], + [ + "PCIE_TRNRDLLPDATA49", + "PCIE_TOP_TRNRDLLPDATA49" + ], + [ + "PCIE_TRNRDLLPDATA50", + "PCIE_TOP_TRNRDLLPDATA50" + ], + [ + "PCIE_TRNRDLLPDATA51", + "PCIE_TOP_TRNRDLLPDATA51" + ], + [ + "PCIE_TRNRDLLPDATA52", + "PCIE_TOP_TRNRDLLPDATA52" + ], + [ + "PCIE_TRNRDLLPDATA53", + "PCIE_TOP_TRNRDLLPDATA53" + ], + [ + "PCIE_TRNRDLLPDATA54", + "PCIE_TOP_TRNRDLLPDATA54" + ], + [ + "PCIE_TRNRDLLPDATA55", + "PCIE_TOP_TRNRDLLPDATA55" + ], + [ + "PCIE_TRNRDLLPDATA56", + "PCIE_TOP_TRNRDLLPDATA56" + ], + [ + "PCIE_TRNRDLLPDATA57", + "PCIE_TOP_TRNRDLLPDATA57" + ], + [ + "PCIE_TRNRDLLPDATA58", + "PCIE_TOP_TRNRDLLPDATA58" + ], + [ + "PCIE_TRNRDLLPDATA59", + "PCIE_TOP_TRNRDLLPDATA59" + ], + [ + "PCIE_TRNRDLLPDATA60", + "PCIE_TOP_TRNRDLLPDATA60" + ], + [ + "PCIE_TRNRDLLPDATA61", + "PCIE_TOP_TRNRDLLPDATA61" + ], + [ + "PCIE_TRNRDLLPDATA62", + "PCIE_TOP_TRNRDLLPDATA62" + ], + [ + "PCIE_TRNRDLLPDATA63", + "PCIE_TOP_TRNRDLLPDATA63" + ], + [ + "PCIE_TRNRDLLPSRCRDY0", + "PCIE_TOP_TRNRDLLPSRCRDY0" + ], + [ + "PCIE_TRNRDLLPSRCRDY1", + "PCIE_TOP_TRNRDLLPSRCRDY1" + ], + [ + "PCIE_TRNTD8", + "PCIE_TOP_TRNTD8" + ], + [ + "PCIE_TRNTD9", + "PCIE_TOP_TRNTD9" + ], + [ + "PCIE_TRNTD10", + "PCIE_TOP_TRNTD10" + ], + [ + "PCIE_TRNTD11", + "PCIE_TOP_TRNTD11" + ], + [ + "PCIE_TRNTD12", + "PCIE_TOP_TRNTD12" + ], + [ + "PCIE_TRNTD13", + "PCIE_TOP_TRNTD13" + ], + [ + "PCIE_TRNTD14", + "PCIE_TOP_TRNTD14" + ], + [ + "PCIE_TRNTD15", + "PCIE_TOP_TRNTD15" + ], + [ + "PCIE_TRNTD16", + "PCIE_TOP_TRNTD16" + ], + [ + "PCIE_TRNTD17", + "PCIE_TOP_TRNTD17" + ], + [ + "PCIE_TRNTD18", + "PCIE_TOP_TRNTD18" + ], + [ + "PCIE_TRNTD19", + "PCIE_TOP_TRNTD19" + ], + [ + "PCIE_TRNTD20", + "PCIE_TOP_TRNTD20" + ], + [ + "PCIE_TRNTD21", + "PCIE_TOP_TRNTD21" + ], + [ + "PCIE_TRNTD22", + "PCIE_TOP_TRNTD22" + ], + [ + "PCIE_TRNTD23", + "PCIE_TOP_TRNTD23" + ], + [ + "PCIE_TRNTD24", + "PCIE_TOP_TRNTD24" + ], + [ + "PCIE_TRNTD25", + "PCIE_TOP_TRNTD25" + ], + [ + "PCIE_TRNTD26", + "PCIE_TOP_TRNTD26" + ], + [ + "PCIE_TRNTD27", + "PCIE_TOP_TRNTD27" + ], + [ + "PCIE_TRNTD28", + "PCIE_TOP_TRNTD28" + ], + [ + "PCIE_TRNTD29", + "PCIE_TOP_TRNTD29" + ], + [ + "PCIE_TRNTD30", + "PCIE_TOP_TRNTD30" + ], + [ + "PCIE_TRNTD31", + "PCIE_TOP_TRNTD31" + ], + [ + "PCIE_TRNTD32", + "PCIE_TOP_TRNTD32" + ], + [ + "PCIE_TRNTD33", + "PCIE_TOP_TRNTD33" + ], + [ + "PCIE_TRNTD34", + "PCIE_TOP_TRNTD34" + ], + [ + "PCIE_TRNTD35", + "PCIE_TOP_TRNTD35" + ], + [ + "PCIE_TRNTD36", + "PCIE_TOP_TRNTD36" + ], + [ + "PCIE_TRNTD37", + "PCIE_TOP_TRNTD37" + ], + [ + "PCIE_TRNTD38", + "PCIE_TOP_TRNTD38" + ], + [ + "PCIE_TRNTD39", + "PCIE_TOP_TRNTD39" + ], + [ + "PCIE_TRNTD40", + "PCIE_TOP_TRNTD40" + ], + [ + "PCIE_TRNTD41", + "PCIE_TOP_TRNTD41" + ], + [ + "PCIE_TRNTDLLPDATA19", + "PCIE_TOP_TRNTDLLPDATA19" + ], + [ + "PCIE_TRNTDLLPDATA20", + "PCIE_TOP_TRNTDLLPDATA20" + ], + [ + "PCIE_TRNTDLLPDATA21", + "PCIE_TOP_TRNTDLLPDATA21" + ], + [ + "PCIE_TRNTDLLPDATA22", + "PCIE_TOP_TRNTDLLPDATA22" + ], + [ + "PCIE_TRNTDLLPDATA23", + "PCIE_TOP_TRNTDLLPDATA23" + ], + [ + "PCIE_TRNTDLLPDATA24", + "PCIE_TOP_TRNTDLLPDATA24" + ], + [ + "PCIE_TRNTDLLPDATA25", + "PCIE_TOP_TRNTDLLPDATA25" + ], + [ + "PCIE_TRNTDLLPDATA26", + "PCIE_TOP_TRNTDLLPDATA26" + ], + [ + "PCIE_TRNTDLLPDATA27", + "PCIE_TOP_TRNTDLLPDATA27" + ], + [ + "PCIE_TRNTDLLPDATA28", + "PCIE_TOP_TRNTDLLPDATA28" + ], + [ + "PCIE_TRNTDLLPDATA29", + "PCIE_TOP_TRNTDLLPDATA29" + ], + [ + "PCIE_TRNTDLLPDATA30", + "PCIE_TOP_TRNTDLLPDATA30" + ], + [ + "PCIE_TRNTDLLPDATA31", + "PCIE_TOP_TRNTDLLPDATA31" + ], + [ + "PCIE_TRNTDLLPSRCRDY", + "PCIE_TOP_TRNTDLLPSRCRDY" + ], + [ + "PCIE_TRNTDSTRDY3", + "PCIE_TOP_TRNTDSTRDY3" + ], + [ + "PCIE_XILUNCONNOUT28", + "PCIE_TOP_XILUNCONNOUT28" + ] + ] + }, + { + "grid_deltas": [ + -5, + 0 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_L", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_L_0" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_L_0" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_L_0" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_L_0" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_L_0" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_L_0" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_L_0" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_L_0" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_L_0" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_L_0" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_L_0" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_L_0" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_0" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_0" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_0" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_0" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_0" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_0" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_0" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_0" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_0" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_0" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_0" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_0" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_0" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_0" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_0" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_0" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_0" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_0" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_0" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_0" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_0" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_0" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_0" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_0" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_0" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_0" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_0" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_0" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_L_0" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_L_0" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_L_0" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_L_0" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_L_0" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_L_0" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_L_0" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_L_0" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_0" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_0" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_0" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_0" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_0" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_0" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_0" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_0" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_0" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_0" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_0" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "PCIE_LOGIC_OUTS_B0_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "PCIE_LOGIC_OUTS_B1_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "PCIE_LOGIC_OUTS_B2_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "PCIE_LOGIC_OUTS_B3_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "PCIE_LOGIC_OUTS_B4_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "PCIE_LOGIC_OUTS_B5_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "PCIE_LOGIC_OUTS_B6_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "PCIE_LOGIC_OUTS_B7_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "PCIE_LOGIC_OUTS_B8_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "PCIE_LOGIC_OUTS_B9_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "PCIE_LOGIC_OUTS_B10_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "PCIE_LOGIC_OUTS_B11_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "PCIE_LOGIC_OUTS_B12_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "PCIE_LOGIC_OUTS_B13_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "PCIE_LOGIC_OUTS_B14_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "PCIE_LOGIC_OUTS_B15_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "PCIE_LOGIC_OUTS_B16_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "PCIE_LOGIC_OUTS_B17_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "PCIE_LOGIC_OUTS_B18_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "PCIE_LOGIC_OUTS_B19_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "PCIE_LOGIC_OUTS_B20_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "PCIE_LOGIC_OUTS_B21_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "PCIE_LOGIC_OUTS_B22_L_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "PCIE_LOGIC_OUTS_B23_L_0" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_0" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_0" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_0" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_0" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_0" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_0" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_0" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_0" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_0" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_0" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_0" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_0" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_0" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_0" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_0" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_0" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_0" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_0" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_0" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_0" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_0" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_0" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_0" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_0" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_0" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_0" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_0" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_0" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_0" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_0" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_0" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_0" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_0" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_0" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_0" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_0" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_0" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_0" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_0" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_0" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_0" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_0" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_0" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_0" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_0" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_0" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_0" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_0" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_0" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_0" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_0" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_0" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_0" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_0" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_0" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_0" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_0" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_0" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_0" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_0" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_0" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_0" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_0" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_0" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_0" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_0" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_0" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_0" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_0" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_0" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_0" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_0" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_0" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_0" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_0" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_0" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_0" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT0", + "PCIE_IMUX0_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT1", + "PCIE_IMUX1_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT2", + "PCIE_IMUX2_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT3", + "PCIE_IMUX3_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT4", + "PCIE_IMUX4_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT5", + "PCIE_IMUX5_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT6", + "PCIE_IMUX6_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT7", + "PCIE_IMUX7_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT8", + "PCIE_IMUX8_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT9", + "PCIE_IMUX9_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT10", + "PCIE_IMUX10_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT11", + "PCIE_IMUX11_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT12", + "PCIE_IMUX12_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT13", + "PCIE_IMUX13_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT14", + "PCIE_IMUX14_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT15", + "PCIE_IMUX15_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT16", + "PCIE_IMUX16_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT17", + "PCIE_IMUX17_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT18", + "PCIE_IMUX18_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT19", + "PCIE_IMUX19_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT20", + "PCIE_IMUX20_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT21", + "PCIE_IMUX21_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT22", + "PCIE_IMUX22_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT23", + "PCIE_IMUX23_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT24", + "PCIE_IMUX24_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT25", + "PCIE_IMUX25_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT26", + "PCIE_IMUX26_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT27", + "PCIE_IMUX27_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT28", + "PCIE_IMUX28_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT29", + "PCIE_IMUX29_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT30", + "PCIE_IMUX30_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT31", + "PCIE_IMUX31_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT32", + "PCIE_IMUX32_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT33", + "PCIE_IMUX33_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT34", + "PCIE_IMUX34_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT35", + "PCIE_IMUX35_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT36", + "PCIE_IMUX36_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT37", + "PCIE_IMUX37_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT38", + "PCIE_IMUX38_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT39", + "PCIE_IMUX39_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT40", + "PCIE_IMUX40_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT41", + "PCIE_IMUX41_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT42", + "PCIE_IMUX42_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT43", + "PCIE_IMUX43_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT44", + "PCIE_IMUX44_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT45", + "PCIE_IMUX45_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT46", + "PCIE_IMUX46_L_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT47", + "PCIE_IMUX47_L_0" + ] + ] + }, + { + "grid_deltas": [ + -5, + 1 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_L", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_L_1" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_L_1" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_L_1" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_L_1" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_L_1" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_L_1" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_L_1" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_L_1" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_L_1" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_L_1" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_L_1" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_L_1" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_1" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_1" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_1" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_1" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_1" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_1" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_1" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_1" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_1" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_1" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_1" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_1" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_1" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_1" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_1" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_1" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_1" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_1" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_1" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_1" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_1" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_1" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_1" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_1" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_1" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_1" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_1" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_1" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_L_1" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_L_1" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_L_1" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_L_1" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_L_1" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_L_1" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_L_1" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_L_1" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_1" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_1" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_1" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_1" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_1" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_1" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_1" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_1" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_1" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_1" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_1" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "PCIE_LOGIC_OUTS_B0_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "PCIE_LOGIC_OUTS_B1_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "PCIE_LOGIC_OUTS_B2_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "PCIE_LOGIC_OUTS_B3_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "PCIE_LOGIC_OUTS_B4_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "PCIE_LOGIC_OUTS_B5_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "PCIE_LOGIC_OUTS_B6_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "PCIE_LOGIC_OUTS_B7_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "PCIE_LOGIC_OUTS_B8_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "PCIE_LOGIC_OUTS_B9_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "PCIE_LOGIC_OUTS_B10_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "PCIE_LOGIC_OUTS_B11_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "PCIE_LOGIC_OUTS_B12_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "PCIE_LOGIC_OUTS_B13_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "PCIE_LOGIC_OUTS_B14_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "PCIE_LOGIC_OUTS_B15_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "PCIE_LOGIC_OUTS_B16_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "PCIE_LOGIC_OUTS_B17_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "PCIE_LOGIC_OUTS_B18_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "PCIE_LOGIC_OUTS_B19_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "PCIE_LOGIC_OUTS_B20_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "PCIE_LOGIC_OUTS_B21_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "PCIE_LOGIC_OUTS_B22_L_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "PCIE_LOGIC_OUTS_B23_L_1" + ], + [ + "INT_INTERFACE_MONITOR_N", + "PCIE_MONITOR_N_1" + ], + [ + "INT_INTERFACE_MONITOR_P", + "PCIE_MONITOR_P_1" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_1" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_1" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_1" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_1" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_1" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_1" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_1" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_1" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_1" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_1" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_1" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_1" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_1" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_1" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_1" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_1" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_1" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_1" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_1" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_1" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_1" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_1" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_1" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_1" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_1" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_1" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_1" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_1" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_1" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_1" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_1" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_1" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_1" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_1" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_1" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_1" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_1" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_1" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_1" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_1" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_1" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_1" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_1" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_1" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_1" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_1" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_1" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_1" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_1" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_1" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_1" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_1" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_1" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_1" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_1" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_1" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_1" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_1" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_1" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_1" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_1" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_1" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_1" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_1" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_1" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_1" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_1" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_1" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_1" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_1" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_1" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_1" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_1" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_1" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_1" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_1" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_1" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT0", + "PCIE_IMUX0_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT1", + "PCIE_IMUX1_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT2", + "PCIE_IMUX2_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT3", + "PCIE_IMUX3_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT4", + "PCIE_IMUX4_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT5", + "PCIE_IMUX5_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT6", + "PCIE_IMUX6_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT7", + "PCIE_IMUX7_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT8", + "PCIE_IMUX8_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT9", + "PCIE_IMUX9_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT10", + "PCIE_IMUX10_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT11", + "PCIE_IMUX11_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT12", + "PCIE_IMUX12_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT13", + "PCIE_IMUX13_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT14", + "PCIE_IMUX14_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT15", + "PCIE_IMUX15_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT16", + "PCIE_IMUX16_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT17", + "PCIE_IMUX17_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT18", + "PCIE_IMUX18_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT19", + "PCIE_IMUX19_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT20", + "PCIE_IMUX20_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT21", + "PCIE_IMUX21_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT22", + "PCIE_IMUX22_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT23", + "PCIE_IMUX23_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT24", + "PCIE_IMUX24_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT25", + "PCIE_IMUX25_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT26", + "PCIE_IMUX26_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT27", + "PCIE_IMUX27_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT28", + "PCIE_IMUX28_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT29", + "PCIE_IMUX29_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT30", + "PCIE_IMUX30_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT31", + "PCIE_IMUX31_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT32", + "PCIE_IMUX32_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT33", + "PCIE_IMUX33_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT34", + "PCIE_IMUX34_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT35", + "PCIE_IMUX35_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT36", + "PCIE_IMUX36_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT37", + "PCIE_IMUX37_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT38", + "PCIE_IMUX38_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT39", + "PCIE_IMUX39_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT40", + "PCIE_IMUX40_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT41", + "PCIE_IMUX41_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT42", + "PCIE_IMUX42_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT43", + "PCIE_IMUX43_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT44", + "PCIE_IMUX44_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT45", + "PCIE_IMUX45_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT46", + "PCIE_IMUX46_L_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT47", + "PCIE_IMUX47_L_1" + ] + ] + }, + { + "grid_deltas": [ + -5, + 2 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_L", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_L_2" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_L_2" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_L_2" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_L_2" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_L_2" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_L_2" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_L_2" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_L_2" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_L_2" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_L_2" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_L_2" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_L_2" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_2" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_2" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_2" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_2" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_2" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_2" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_2" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_2" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_2" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_2" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_2" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_2" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_2" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_2" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_2" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_2" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_2" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_2" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_2" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_2" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_2" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_2" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_2" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_2" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_2" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_2" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_2" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_2" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_L_2" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_L_2" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_L_2" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_L_2" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_L_2" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_L_2" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_L_2" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_L_2" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_2" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_2" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_2" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_2" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_2" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_2" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_2" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_2" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_2" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_2" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_2" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "PCIE_LOGIC_OUTS_B0_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "PCIE_LOGIC_OUTS_B1_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "PCIE_LOGIC_OUTS_B2_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "PCIE_LOGIC_OUTS_B3_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "PCIE_LOGIC_OUTS_B4_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "PCIE_LOGIC_OUTS_B5_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "PCIE_LOGIC_OUTS_B6_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "PCIE_LOGIC_OUTS_B7_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "PCIE_LOGIC_OUTS_B8_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "PCIE_LOGIC_OUTS_B9_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "PCIE_LOGIC_OUTS_B10_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "PCIE_LOGIC_OUTS_B11_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "PCIE_LOGIC_OUTS_B12_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "PCIE_LOGIC_OUTS_B13_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "PCIE_LOGIC_OUTS_B14_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "PCIE_LOGIC_OUTS_B15_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "PCIE_LOGIC_OUTS_B16_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "PCIE_LOGIC_OUTS_B17_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "PCIE_LOGIC_OUTS_B18_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "PCIE_LOGIC_OUTS_B19_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "PCIE_LOGIC_OUTS_B20_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "PCIE_LOGIC_OUTS_B21_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "PCIE_LOGIC_OUTS_B22_L_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "PCIE_LOGIC_OUTS_B23_L_2" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_2" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_2" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_2" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_2" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_2" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_2" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_2" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_2" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_2" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_2" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_2" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_2" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_2" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_2" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_2" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_2" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_2" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_2" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_2" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_2" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_2" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_2" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_2" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_2" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_2" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_2" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_2" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_2" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_2" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_2" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_2" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_2" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_2" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_2" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_2" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_2" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_2" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_2" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_2" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_2" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_2" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_2" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_2" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_2" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_2" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_2" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_2" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_2" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_2" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_2" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_2" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_2" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_2" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_2" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_2" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_2" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_2" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_2" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_2" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_2" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_2" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_2" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_2" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_2" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_2" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_2" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_2" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_2" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_2" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_2" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_2" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_2" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_2" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_2" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_2" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_2" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_2" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT0", + "PCIE_IMUX0_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT1", + "PCIE_IMUX1_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT2", + "PCIE_IMUX2_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT3", + "PCIE_IMUX3_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT4", + "PCIE_IMUX4_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT5", + "PCIE_IMUX5_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT6", + "PCIE_IMUX6_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT7", + "PCIE_IMUX7_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT8", + "PCIE_IMUX8_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT9", + "PCIE_IMUX9_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT10", + "PCIE_IMUX10_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT11", + "PCIE_IMUX11_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT12", + "PCIE_IMUX12_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT13", + "PCIE_IMUX13_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT14", + "PCIE_IMUX14_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT15", + "PCIE_IMUX15_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT16", + "PCIE_IMUX16_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT17", + "PCIE_IMUX17_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT18", + "PCIE_IMUX18_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT19", + "PCIE_IMUX19_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT20", + "PCIE_IMUX20_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT21", + "PCIE_IMUX21_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT22", + "PCIE_IMUX22_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT23", + "PCIE_IMUX23_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT24", + "PCIE_IMUX24_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT25", + "PCIE_IMUX25_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT26", + "PCIE_IMUX26_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT27", + "PCIE_IMUX27_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT28", + "PCIE_IMUX28_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT29", + "PCIE_IMUX29_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT30", + "PCIE_IMUX30_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT31", + "PCIE_IMUX31_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT32", + "PCIE_IMUX32_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT33", + "PCIE_IMUX33_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT34", + "PCIE_IMUX34_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT35", + "PCIE_IMUX35_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT36", + "PCIE_IMUX36_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT37", + "PCIE_IMUX37_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT38", + "PCIE_IMUX38_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT39", + "PCIE_IMUX39_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT40", + "PCIE_IMUX40_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT41", + "PCIE_IMUX41_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT42", + "PCIE_IMUX42_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT43", + "PCIE_IMUX43_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT44", + "PCIE_IMUX44_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT45", + "PCIE_IMUX45_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT46", + "PCIE_IMUX46_L_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT47", + "PCIE_IMUX47_L_2" + ] + ] + }, + { + "grid_deltas": [ + -5, + 3 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_L", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_L_3" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_L_3" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_L_3" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_L_3" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_L_3" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_L_3" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_L_3" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_L_3" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_L_3" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_L_3" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_L_3" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_L_3" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_3" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_3" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_3" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_3" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_3" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_3" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_3" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_3" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_3" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_3" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_3" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_3" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_3" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_3" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_3" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_3" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_3" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_3" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_3" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_3" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_3" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_3" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_3" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_3" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_3" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_3" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_3" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_3" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_L_3" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_L_3" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_L_3" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_L_3" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_L_3" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_L_3" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_L_3" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_L_3" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_3" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_3" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_3" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_3" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_3" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_3" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_3" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_3" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_3" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_3" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_3" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "PCIE_LOGIC_OUTS_B0_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "PCIE_LOGIC_OUTS_B1_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "PCIE_LOGIC_OUTS_B2_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "PCIE_LOGIC_OUTS_B3_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "PCIE_LOGIC_OUTS_B4_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "PCIE_LOGIC_OUTS_B5_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "PCIE_LOGIC_OUTS_B6_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "PCIE_LOGIC_OUTS_B7_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "PCIE_LOGIC_OUTS_B8_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "PCIE_LOGIC_OUTS_B9_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "PCIE_LOGIC_OUTS_B10_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "PCIE_LOGIC_OUTS_B11_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "PCIE_LOGIC_OUTS_B12_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "PCIE_LOGIC_OUTS_B13_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "PCIE_LOGIC_OUTS_B14_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "PCIE_LOGIC_OUTS_B15_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "PCIE_LOGIC_OUTS_B16_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "PCIE_LOGIC_OUTS_B17_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "PCIE_LOGIC_OUTS_B18_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "PCIE_LOGIC_OUTS_B19_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "PCIE_LOGIC_OUTS_B20_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "PCIE_LOGIC_OUTS_B21_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "PCIE_LOGIC_OUTS_B22_L_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "PCIE_LOGIC_OUTS_B23_L_3" + ], + [ + "INT_INTERFACE_MONITOR_N", + "PCIE_MONITOR_N_3" + ], + [ + "INT_INTERFACE_MONITOR_P", + "PCIE_MONITOR_P_3" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_3" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_3" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_3" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_3" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_3" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_3" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_3" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_3" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_3" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_3" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_3" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_3" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_3" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_3" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_3" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_3" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_3" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_3" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_3" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_3" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_3" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_3" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_3" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_3" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_3" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_3" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_3" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_3" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_3" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_3" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_3" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_3" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_3" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_3" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_3" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_3" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_3" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_3" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_3" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_3" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_3" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_3" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_3" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_3" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_3" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_3" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_3" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_3" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_3" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_3" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_3" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_3" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_3" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_3" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_3" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_3" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_3" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_3" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_3" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_3" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_3" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_3" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_3" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_3" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_3" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_3" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_3" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_3" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_3" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_3" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_3" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_3" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_3" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_3" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_3" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_3" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_3" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT0", + "PCIE_IMUX0_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT1", + "PCIE_IMUX1_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT2", + "PCIE_IMUX2_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT3", + "PCIE_IMUX3_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT4", + "PCIE_IMUX4_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT5", + "PCIE_IMUX5_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT6", + "PCIE_IMUX6_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT7", + "PCIE_IMUX7_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT8", + "PCIE_IMUX8_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT9", + "PCIE_IMUX9_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT10", + "PCIE_IMUX10_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT11", + "PCIE_IMUX11_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT12", + "PCIE_IMUX12_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT13", + "PCIE_IMUX13_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT14", + "PCIE_IMUX14_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT15", + "PCIE_IMUX15_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT16", + "PCIE_IMUX16_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT17", + "PCIE_IMUX17_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT18", + "PCIE_IMUX18_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT19", + "PCIE_IMUX19_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT20", + "PCIE_IMUX20_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT21", + "PCIE_IMUX21_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT22", + "PCIE_IMUX22_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT23", + "PCIE_IMUX23_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT24", + "PCIE_IMUX24_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT25", + "PCIE_IMUX25_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT26", + "PCIE_IMUX26_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT27", + "PCIE_IMUX27_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT28", + "PCIE_IMUX28_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT29", + "PCIE_IMUX29_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT30", + "PCIE_IMUX30_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT31", + "PCIE_IMUX31_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT32", + "PCIE_IMUX32_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT33", + "PCIE_IMUX33_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT34", + "PCIE_IMUX34_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT35", + "PCIE_IMUX35_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT36", + "PCIE_IMUX36_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT37", + "PCIE_IMUX37_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT38", + "PCIE_IMUX38_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT39", + "PCIE_IMUX39_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT40", + "PCIE_IMUX40_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT41", + "PCIE_IMUX41_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT42", + "PCIE_IMUX42_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT43", + "PCIE_IMUX43_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT44", + "PCIE_IMUX44_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT45", + "PCIE_IMUX45_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT46", + "PCIE_IMUX46_L_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT47", + "PCIE_IMUX47_L_3" + ] + ] + }, + { + "grid_deltas": [ + -5, + 4 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_L", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_L_4" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_L_4" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_L_4" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_L_4" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_L_4" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_L_4" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_L_4" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_L_4" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_L_4" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_L_4" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_L_4" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_L_4" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_4" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_4" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_4" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_4" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_4" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_4" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_4" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_4" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_4" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_4" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_4" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_4" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_4" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_4" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_4" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_4" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_4" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_4" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_4" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_4" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_4" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_4" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_4" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_4" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_4" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_4" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_4" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_4" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_4" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_4" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_4" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_4" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_L_4" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_L_4" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_L_4" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_L_4" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_L_4" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_L_4" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_L_4" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_L_4" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_4" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_4" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_4" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_4" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_4" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_4" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_4" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_4" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_4" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_4" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_4" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B0", + "PCIE_LOGIC_OUTS_B0_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B1", + "PCIE_LOGIC_OUTS_B1_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B2", + "PCIE_LOGIC_OUTS_B2_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B3", + "PCIE_LOGIC_OUTS_B3_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B4", + "PCIE_LOGIC_OUTS_B4_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B5", + "PCIE_LOGIC_OUTS_B5_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B6", + "PCIE_LOGIC_OUTS_B6_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B7", + "PCIE_LOGIC_OUTS_B7_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B8", + "PCIE_LOGIC_OUTS_B8_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B9", + "PCIE_LOGIC_OUTS_B9_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B10", + "PCIE_LOGIC_OUTS_B10_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B11", + "PCIE_LOGIC_OUTS_B11_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B12", + "PCIE_LOGIC_OUTS_B12_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B13", + "PCIE_LOGIC_OUTS_B13_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B14", + "PCIE_LOGIC_OUTS_B14_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B15", + "PCIE_LOGIC_OUTS_B15_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B16", + "PCIE_LOGIC_OUTS_B16_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B17", + "PCIE_LOGIC_OUTS_B17_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B18", + "PCIE_LOGIC_OUTS_B18_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B19", + "PCIE_LOGIC_OUTS_B19_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B20", + "PCIE_LOGIC_OUTS_B20_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B21", + "PCIE_LOGIC_OUTS_B21_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B22", + "PCIE_LOGIC_OUTS_B22_L_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_L_B23", + "PCIE_LOGIC_OUTS_B23_L_4" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_4" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_4" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_4" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_4" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_4" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_4" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_4" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_4" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_4" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_4" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_4" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_4" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_4" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_4" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_4" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_4" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_4" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_4" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_4" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_4" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_4" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_4" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_4" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_4" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_4" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_4" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_4" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_4" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_4" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_4" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_4" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_4" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_4" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_4" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_4" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_4" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_4" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_4" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_4" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_4" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_4" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_4" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_4" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_4" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_4" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_4" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_4" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_4" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_4" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_4" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_4" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_4" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_4" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_4" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_4" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_4" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_4" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_4" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_4" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_4" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_4" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_4" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_4" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_4" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_4" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_4" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_4" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_4" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_4" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_4" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_4" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_4" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_4" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_4" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_4" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_4" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_4" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_4" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_4" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT0", + "PCIE_IMUX0_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT1", + "PCIE_IMUX1_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT2", + "PCIE_IMUX2_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT3", + "PCIE_IMUX3_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT4", + "PCIE_IMUX4_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT5", + "PCIE_IMUX5_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT6", + "PCIE_IMUX6_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT7", + "PCIE_IMUX7_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT8", + "PCIE_IMUX8_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT9", + "PCIE_IMUX9_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT10", + "PCIE_IMUX10_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT11", + "PCIE_IMUX11_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT12", + "PCIE_IMUX12_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT13", + "PCIE_IMUX13_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT14", + "PCIE_IMUX14_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT15", + "PCIE_IMUX15_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT16", + "PCIE_IMUX16_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT17", + "PCIE_IMUX17_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT18", + "PCIE_IMUX18_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT19", + "PCIE_IMUX19_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT20", + "PCIE_IMUX20_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT21", + "PCIE_IMUX21_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT22", + "PCIE_IMUX22_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT23", + "PCIE_IMUX23_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT24", + "PCIE_IMUX24_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT25", + "PCIE_IMUX25_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT26", + "PCIE_IMUX26_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT27", + "PCIE_IMUX27_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT28", + "PCIE_IMUX28_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT29", + "PCIE_IMUX29_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT30", + "PCIE_IMUX30_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT31", + "PCIE_IMUX31_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT32", + "PCIE_IMUX32_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT33", + "PCIE_IMUX33_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT34", + "PCIE_IMUX34_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT35", + "PCIE_IMUX35_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT36", + "PCIE_IMUX36_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT37", + "PCIE_IMUX37_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT38", + "PCIE_IMUX38_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT39", + "PCIE_IMUX39_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT40", + "PCIE_IMUX40_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT41", + "PCIE_IMUX41_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT42", + "PCIE_IMUX42_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT43", + "PCIE_IMUX43_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT44", + "PCIE_IMUX44_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT45", + "PCIE_IMUX45_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT46", + "PCIE_IMUX46_L_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_L_OUT47", + "PCIE_IMUX47_L_4" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_R", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_R_0" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_R_0" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_R_0" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_R_0" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_R_0" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_R_0" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_R_0" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_R_0" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_R_0" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_R_0" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_R_0" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_R_0" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_0" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_0" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_0" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_0" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_0" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_0" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_0" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_0" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_0" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_0" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_0" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_0" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_0" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_0" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_0" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_0" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_0" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_0" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_0" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_0" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_0" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_0" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_0" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_0" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_0" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_0" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_0" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_0" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_0" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_0" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_0" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_0" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_R_0" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_R_0" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_R_0" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_R_0" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_R_0" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_R_0" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_R_0" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_R_0" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_0" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_0" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_0" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_0" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_0" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_0" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_0" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_0" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_0" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_0" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_0" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "PCIE_LOGIC_OUTS_B0_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "PCIE_LOGIC_OUTS_B1_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "PCIE_LOGIC_OUTS_B2_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "PCIE_LOGIC_OUTS_B3_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "PCIE_LOGIC_OUTS_B4_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "PCIE_LOGIC_OUTS_B5_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "PCIE_LOGIC_OUTS_B6_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "PCIE_LOGIC_OUTS_B7_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "PCIE_LOGIC_OUTS_B8_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "PCIE_LOGIC_OUTS_B9_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "PCIE_LOGIC_OUTS_B10_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "PCIE_LOGIC_OUTS_B11_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "PCIE_LOGIC_OUTS_B12_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "PCIE_LOGIC_OUTS_B13_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "PCIE_LOGIC_OUTS_B14_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "PCIE_LOGIC_OUTS_B15_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "PCIE_LOGIC_OUTS_B16_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "PCIE_LOGIC_OUTS_B17_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "PCIE_LOGIC_OUTS_B18_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "PCIE_LOGIC_OUTS_B19_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "PCIE_LOGIC_OUTS_B20_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "PCIE_LOGIC_OUTS_B21_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "PCIE_LOGIC_OUTS_B22_R_0" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "PCIE_LOGIC_OUTS_B23_R_0" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_0" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_0" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_0" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_0" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_0" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_0" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_0" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_0" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_0" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_0" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_0" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_0" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_0" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_0" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_0" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_0" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_0" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_0" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_0" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_0" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_0" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_0" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_0" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_0" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_0" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_0" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_0" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_0" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_0" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_0" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_0" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_0" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_0" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_0" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_0" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_0" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_0" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_0" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_0" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_0" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_0" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_0" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_0" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_0" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_0" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_0" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_0" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_0" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_0" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_0" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_0" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_0" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_0" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_0" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_0" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_0" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_0" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_0" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_0" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_0" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_0" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_0" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_0" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_0" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_0" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_0" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_0" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_0" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_0" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_0" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_0" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_0" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_0" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_0" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_0" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_0" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_0" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_0" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_0" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT0", + "PCIE_IMUX0_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT1", + "PCIE_IMUX1_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT2", + "PCIE_IMUX2_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT3", + "PCIE_IMUX3_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT4", + "PCIE_IMUX4_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT5", + "PCIE_IMUX5_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT6", + "PCIE_IMUX6_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT7", + "PCIE_IMUX7_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT8", + "PCIE_IMUX8_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT9", + "PCIE_IMUX9_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT10", + "PCIE_IMUX10_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT11", + "PCIE_IMUX11_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT12", + "PCIE_IMUX12_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT13", + "PCIE_IMUX13_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT14", + "PCIE_IMUX14_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT15", + "PCIE_IMUX15_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT16", + "PCIE_IMUX16_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT17", + "PCIE_IMUX17_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT18", + "PCIE_IMUX18_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT19", + "PCIE_IMUX19_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT20", + "PCIE_IMUX20_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT21", + "PCIE_IMUX21_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT22", + "PCIE_IMUX22_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT23", + "PCIE_IMUX23_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT24", + "PCIE_IMUX24_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT25", + "PCIE_IMUX25_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT26", + "PCIE_IMUX26_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT27", + "PCIE_IMUX27_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT28", + "PCIE_IMUX28_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT29", + "PCIE_IMUX29_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT30", + "PCIE_IMUX30_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT31", + "PCIE_IMUX31_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT32", + "PCIE_IMUX32_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT33", + "PCIE_IMUX33_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT34", + "PCIE_IMUX34_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT35", + "PCIE_IMUX35_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT36", + "PCIE_IMUX36_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT37", + "PCIE_IMUX37_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT38", + "PCIE_IMUX38_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT39", + "PCIE_IMUX39_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT40", + "PCIE_IMUX40_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT41", + "PCIE_IMUX41_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT42", + "PCIE_IMUX42_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT43", + "PCIE_IMUX43_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT44", + "PCIE_IMUX44_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT45", + "PCIE_IMUX45_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT46", + "PCIE_IMUX46_R_0" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT47", + "PCIE_IMUX47_R_0" + ] + ] + }, + { + "grid_deltas": [ + 1, + 1 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_R", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_R_1" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_R_1" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_R_1" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_R_1" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_R_1" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_R_1" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_R_1" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_R_1" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_R_1" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_R_1" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_R_1" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_R_1" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_1" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_1" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_1" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_1" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_1" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_1" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_1" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_1" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_1" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_1" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_1" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_1" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_1" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_1" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_1" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_1" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_1" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_1" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_1" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_1" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_1" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_1" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_1" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_1" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_1" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_1" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_1" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_1" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_1" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_1" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_1" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_1" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_R_1" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_R_1" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_R_1" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_R_1" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_R_1" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_R_1" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_R_1" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_R_1" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_1" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_1" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_1" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_1" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_1" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_1" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_1" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_1" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_1" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_1" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_1" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "PCIE_LOGIC_OUTS_B0_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "PCIE_LOGIC_OUTS_B1_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "PCIE_LOGIC_OUTS_B2_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "PCIE_LOGIC_OUTS_B3_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "PCIE_LOGIC_OUTS_B4_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "PCIE_LOGIC_OUTS_B5_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "PCIE_LOGIC_OUTS_B6_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "PCIE_LOGIC_OUTS_B7_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "PCIE_LOGIC_OUTS_B8_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "PCIE_LOGIC_OUTS_B9_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "PCIE_LOGIC_OUTS_B10_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "PCIE_LOGIC_OUTS_B11_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "PCIE_LOGIC_OUTS_B12_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "PCIE_LOGIC_OUTS_B13_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "PCIE_LOGIC_OUTS_B14_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "PCIE_LOGIC_OUTS_B15_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "PCIE_LOGIC_OUTS_B16_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "PCIE_LOGIC_OUTS_B17_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "PCIE_LOGIC_OUTS_B18_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "PCIE_LOGIC_OUTS_B19_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "PCIE_LOGIC_OUTS_B20_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "PCIE_LOGIC_OUTS_B21_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "PCIE_LOGIC_OUTS_B22_R_1" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "PCIE_LOGIC_OUTS_B23_R_1" + ], + [ + "INT_INTERFACE_MONITOR_N", + "PCIE_MONITOR_N_1" + ], + [ + "INT_INTERFACE_MONITOR_P", + "PCIE_MONITOR_P_1" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_1" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_1" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_1" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_1" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_1" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_1" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_1" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_1" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_1" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_1" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_1" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_1" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_1" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_1" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_1" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_1" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_1" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_1" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_1" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_1" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_1" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_1" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_1" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_1" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_1" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_1" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_1" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_1" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_1" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_1" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_1" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_1" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_1" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_1" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_1" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_1" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_1" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_1" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_1" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_1" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_1" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_1" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_1" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_1" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_1" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_1" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_1" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_1" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_1" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_1" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_1" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_1" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_1" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_1" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_1" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_1" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_1" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_1" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_1" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_1" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_1" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_1" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_1" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_1" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_1" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_1" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_1" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_1" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_1" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_1" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_1" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_1" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_1" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_1" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_1" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_1" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_1" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_1" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_1" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT0", + "PCIE_IMUX0_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT1", + "PCIE_IMUX1_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT2", + "PCIE_IMUX2_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT3", + "PCIE_IMUX3_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT4", + "PCIE_IMUX4_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT5", + "PCIE_IMUX5_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT6", + "PCIE_IMUX6_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT7", + "PCIE_IMUX7_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT8", + "PCIE_IMUX8_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT9", + "PCIE_IMUX9_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT10", + "PCIE_IMUX10_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT11", + "PCIE_IMUX11_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT12", + "PCIE_IMUX12_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT13", + "PCIE_IMUX13_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT14", + "PCIE_IMUX14_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT15", + "PCIE_IMUX15_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT16", + "PCIE_IMUX16_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT17", + "PCIE_IMUX17_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT18", + "PCIE_IMUX18_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT19", + "PCIE_IMUX19_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT20", + "PCIE_IMUX20_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT21", + "PCIE_IMUX21_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT22", + "PCIE_IMUX22_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT23", + "PCIE_IMUX23_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT24", + "PCIE_IMUX24_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT25", + "PCIE_IMUX25_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT26", + "PCIE_IMUX26_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT27", + "PCIE_IMUX27_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT28", + "PCIE_IMUX28_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT29", + "PCIE_IMUX29_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT30", + "PCIE_IMUX30_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT31", + "PCIE_IMUX31_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT32", + "PCIE_IMUX32_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT33", + "PCIE_IMUX33_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT34", + "PCIE_IMUX34_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT35", + "PCIE_IMUX35_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT36", + "PCIE_IMUX36_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT37", + "PCIE_IMUX37_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT38", + "PCIE_IMUX38_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT39", + "PCIE_IMUX39_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT40", + "PCIE_IMUX40_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT41", + "PCIE_IMUX41_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT42", + "PCIE_IMUX42_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT43", + "PCIE_IMUX43_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT44", + "PCIE_IMUX44_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT45", + "PCIE_IMUX45_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT46", + "PCIE_IMUX46_R_1" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT47", + "PCIE_IMUX47_R_1" + ] + ] + }, + { + "grid_deltas": [ + 1, + 2 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_R", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_R_2" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_R_2" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_R_2" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_R_2" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_R_2" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_R_2" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_R_2" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_R_2" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_R_2" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_R_2" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_R_2" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_R_2" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_2" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_2" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_2" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_2" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_2" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_2" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_2" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_2" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_2" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_2" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_2" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_2" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_2" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_2" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_2" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_2" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_2" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_2" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_2" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_2" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_2" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_2" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_2" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_2" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_2" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_2" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_2" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_2" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_2" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_2" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_2" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_2" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_R_2" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_R_2" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_R_2" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_R_2" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_R_2" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_R_2" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_R_2" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_R_2" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_2" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_2" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_2" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_2" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_2" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_2" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_2" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_2" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_2" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_2" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_2" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "PCIE_LOGIC_OUTS_B0_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "PCIE_LOGIC_OUTS_B1_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "PCIE_LOGIC_OUTS_B2_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "PCIE_LOGIC_OUTS_B3_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "PCIE_LOGIC_OUTS_B4_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "PCIE_LOGIC_OUTS_B5_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "PCIE_LOGIC_OUTS_B6_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "PCIE_LOGIC_OUTS_B7_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "PCIE_LOGIC_OUTS_B8_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "PCIE_LOGIC_OUTS_B9_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "PCIE_LOGIC_OUTS_B10_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "PCIE_LOGIC_OUTS_B11_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "PCIE_LOGIC_OUTS_B12_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "PCIE_LOGIC_OUTS_B13_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "PCIE_LOGIC_OUTS_B14_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "PCIE_LOGIC_OUTS_B15_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "PCIE_LOGIC_OUTS_B16_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "PCIE_LOGIC_OUTS_B17_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "PCIE_LOGIC_OUTS_B18_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "PCIE_LOGIC_OUTS_B19_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "PCIE_LOGIC_OUTS_B20_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "PCIE_LOGIC_OUTS_B21_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "PCIE_LOGIC_OUTS_B22_R_2" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "PCIE_LOGIC_OUTS_B23_R_2" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_2" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_2" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_2" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_2" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_2" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_2" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_2" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_2" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_2" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_2" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_2" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_2" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_2" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_2" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_2" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_2" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_2" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_2" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_2" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_2" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_2" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_2" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_2" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_2" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_2" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_2" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_2" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_2" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_2" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_2" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_2" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_2" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_2" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_2" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_2" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_2" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_2" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_2" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_2" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_2" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_2" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_2" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_2" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_2" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_2" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_2" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_2" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_2" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_2" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_2" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_2" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_2" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_2" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_2" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_2" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_2" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_2" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_2" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_2" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_2" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_2" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_2" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_2" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_2" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_2" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_2" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_2" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_2" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_2" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_2" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_2" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_2" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_2" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_2" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_2" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_2" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_2" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_2" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_2" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT0", + "PCIE_IMUX0_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT1", + "PCIE_IMUX1_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT2", + "PCIE_IMUX2_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT3", + "PCIE_IMUX3_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT4", + "PCIE_IMUX4_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT5", + "PCIE_IMUX5_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT6", + "PCIE_IMUX6_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT7", + "PCIE_IMUX7_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT8", + "PCIE_IMUX8_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT9", + "PCIE_IMUX9_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT10", + "PCIE_IMUX10_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT11", + "PCIE_IMUX11_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT12", + "PCIE_IMUX12_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT13", + "PCIE_IMUX13_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT14", + "PCIE_IMUX14_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT15", + "PCIE_IMUX15_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT16", + "PCIE_IMUX16_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT17", + "PCIE_IMUX17_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT18", + "PCIE_IMUX18_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT19", + "PCIE_IMUX19_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT20", + "PCIE_IMUX20_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT21", + "PCIE_IMUX21_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT22", + "PCIE_IMUX22_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT23", + "PCIE_IMUX23_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT24", + "PCIE_IMUX24_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT25", + "PCIE_IMUX25_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT26", + "PCIE_IMUX26_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT27", + "PCIE_IMUX27_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT28", + "PCIE_IMUX28_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT29", + "PCIE_IMUX29_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT30", + "PCIE_IMUX30_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT31", + "PCIE_IMUX31_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT32", + "PCIE_IMUX32_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT33", + "PCIE_IMUX33_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT34", + "PCIE_IMUX34_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT35", + "PCIE_IMUX35_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT36", + "PCIE_IMUX36_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT37", + "PCIE_IMUX37_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT38", + "PCIE_IMUX38_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT39", + "PCIE_IMUX39_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT40", + "PCIE_IMUX40_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT41", + "PCIE_IMUX41_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT42", + "PCIE_IMUX42_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT43", + "PCIE_IMUX43_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT44", + "PCIE_IMUX44_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT45", + "PCIE_IMUX45_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT46", + "PCIE_IMUX46_R_2" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT47", + "PCIE_IMUX47_R_2" + ] + ] + }, + { + "grid_deltas": [ + 1, + 3 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_R", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_R_3" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_R_3" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_R_3" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_R_3" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_R_3" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_R_3" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_R_3" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_R_3" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_R_3" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_R_3" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_R_3" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_R_3" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_3" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_3" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_3" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_3" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_3" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_3" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_3" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_3" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_3" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_3" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_3" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_3" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_3" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_3" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_3" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_3" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_3" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_3" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_3" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_3" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_3" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_3" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_3" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_3" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_3" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_3" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_3" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_3" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_3" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_3" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_3" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_3" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_R_3" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_R_3" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_R_3" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_R_3" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_R_3" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_R_3" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_R_3" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_R_3" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_3" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_3" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_3" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_3" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_3" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_3" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_3" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_3" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_3" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_3" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_3" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "PCIE_LOGIC_OUTS_B0_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "PCIE_LOGIC_OUTS_B1_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "PCIE_LOGIC_OUTS_B2_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "PCIE_LOGIC_OUTS_B3_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "PCIE_LOGIC_OUTS_B4_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "PCIE_LOGIC_OUTS_B5_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "PCIE_LOGIC_OUTS_B6_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "PCIE_LOGIC_OUTS_B7_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "PCIE_LOGIC_OUTS_B8_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "PCIE_LOGIC_OUTS_B9_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "PCIE_LOGIC_OUTS_B10_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "PCIE_LOGIC_OUTS_B11_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "PCIE_LOGIC_OUTS_B12_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "PCIE_LOGIC_OUTS_B13_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "PCIE_LOGIC_OUTS_B14_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "PCIE_LOGIC_OUTS_B15_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "PCIE_LOGIC_OUTS_B16_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "PCIE_LOGIC_OUTS_B17_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "PCIE_LOGIC_OUTS_B18_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "PCIE_LOGIC_OUTS_B19_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "PCIE_LOGIC_OUTS_B20_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "PCIE_LOGIC_OUTS_B21_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "PCIE_LOGIC_OUTS_B22_R_3" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "PCIE_LOGIC_OUTS_B23_R_3" + ], + [ + "INT_INTERFACE_MONITOR_N", + "PCIE_MONITOR_N_3" + ], + [ + "INT_INTERFACE_MONITOR_P", + "PCIE_MONITOR_P_3" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_3" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_3" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_3" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_3" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_3" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_3" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_3" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_3" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_3" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_3" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_3" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_3" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_3" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_3" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_3" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_3" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_3" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_3" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_3" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_3" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_3" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_3" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_3" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_3" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_3" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_3" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_3" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_3" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_3" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_3" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_3" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_3" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_3" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_3" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_3" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_3" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_3" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_3" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_3" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_3" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_3" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_3" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_3" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_3" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_3" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_3" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_3" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_3" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_3" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_3" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_3" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_3" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_3" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_3" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_3" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_3" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_3" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_3" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_3" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_3" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_3" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_3" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_3" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_3" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_3" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_3" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_3" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_3" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_3" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_3" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_3" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_3" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_3" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_3" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_3" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_3" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_3" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_3" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_3" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT0", + "PCIE_IMUX0_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT1", + "PCIE_IMUX1_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT2", + "PCIE_IMUX2_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT3", + "PCIE_IMUX3_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT4", + "PCIE_IMUX4_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT5", + "PCIE_IMUX5_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT6", + "PCIE_IMUX6_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT7", + "PCIE_IMUX7_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT8", + "PCIE_IMUX8_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT9", + "PCIE_IMUX9_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT10", + "PCIE_IMUX10_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT11", + "PCIE_IMUX11_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT12", + "PCIE_IMUX12_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT13", + "PCIE_IMUX13_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT14", + "PCIE_IMUX14_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT15", + "PCIE_IMUX15_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT16", + "PCIE_IMUX16_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT17", + "PCIE_IMUX17_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT18", + "PCIE_IMUX18_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT19", + "PCIE_IMUX19_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT20", + "PCIE_IMUX20_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT21", + "PCIE_IMUX21_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT22", + "PCIE_IMUX22_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT23", + "PCIE_IMUX23_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT24", + "PCIE_IMUX24_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT25", + "PCIE_IMUX25_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT26", + "PCIE_IMUX26_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT27", + "PCIE_IMUX27_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT28", + "PCIE_IMUX28_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT29", + "PCIE_IMUX29_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT30", + "PCIE_IMUX30_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT31", + "PCIE_IMUX31_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT32", + "PCIE_IMUX32_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT33", + "PCIE_IMUX33_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT34", + "PCIE_IMUX34_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT35", + "PCIE_IMUX35_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT36", + "PCIE_IMUX36_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT37", + "PCIE_IMUX37_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT38", + "PCIE_IMUX38_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT39", + "PCIE_IMUX39_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT40", + "PCIE_IMUX40_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT41", + "PCIE_IMUX41_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT42", + "PCIE_IMUX42_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT43", + "PCIE_IMUX43_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT44", + "PCIE_IMUX44_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT45", + "PCIE_IMUX45_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT46", + "PCIE_IMUX46_R_3" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT47", + "PCIE_IMUX47_R_3" + ] + ] + }, + { + "grid_deltas": [ + 1, + 4 + ], + "tile_types": [ + "PCIE_INT_INTERFACE_R", + "PCIE_TOP" + ], + "wire_pairs": [ + [ + "INT_INTERFACE_BYP0", + "PCIE_BYP0_R_4" + ], + [ + "INT_INTERFACE_BYP1", + "PCIE_BYP1_R_4" + ], + [ + "INT_INTERFACE_BYP2", + "PCIE_BYP2_R_4" + ], + [ + "INT_INTERFACE_BYP3", + "PCIE_BYP3_R_4" + ], + [ + "INT_INTERFACE_BYP4", + "PCIE_BYP4_R_4" + ], + [ + "INT_INTERFACE_BYP5", + "PCIE_BYP5_R_4" + ], + [ + "INT_INTERFACE_BYP6", + "PCIE_BYP6_R_4" + ], + [ + "INT_INTERFACE_BYP7", + "PCIE_BYP7_R_4" + ], + [ + "INT_INTERFACE_CLK0", + "PCIE_CLK0_R_4" + ], + [ + "INT_INTERFACE_CLK1", + "PCIE_CLK1_R_4" + ], + [ + "INT_INTERFACE_CTRL0", + "PCIE_CTRL0_R_4" + ], + [ + "INT_INTERFACE_CTRL1", + "PCIE_CTRL1_R_4" + ], + [ + "INT_INTERFACE_EE2A0", + "PCIE_EE2A0_4" + ], + [ + "INT_INTERFACE_EE2A1", + "PCIE_EE2A1_4" + ], + [ + "INT_INTERFACE_EE2A2", + "PCIE_EE2A2_4" + ], + [ + "INT_INTERFACE_EE2A3", + "PCIE_EE2A3_4" + ], + [ + "INT_INTERFACE_EE2BEG0", + "PCIE_EE2BEG0_4" + ], + [ + "INT_INTERFACE_EE2BEG1", + "PCIE_EE2BEG1_4" + ], + [ + "INT_INTERFACE_EE2BEG2", + "PCIE_EE2BEG2_4" + ], + [ + "INT_INTERFACE_EE2BEG3", + "PCIE_EE2BEG3_4" + ], + [ + "INT_INTERFACE_EE4A0", + "PCIE_EE4A0_4" + ], + [ + "INT_INTERFACE_EE4A1", + "PCIE_EE4A1_4" + ], + [ + "INT_INTERFACE_EE4A2", + "PCIE_EE4A2_4" + ], + [ + "INT_INTERFACE_EE4A3", + "PCIE_EE4A3_4" + ], + [ + "INT_INTERFACE_EE4B0", + "PCIE_EE4B0_4" + ], + [ + "INT_INTERFACE_EE4B1", + "PCIE_EE4B1_4" + ], + [ + "INT_INTERFACE_EE4B2", + "PCIE_EE4B2_4" + ], + [ + "INT_INTERFACE_EE4B3", + "PCIE_EE4B3_4" + ], + [ + "INT_INTERFACE_EE4BEG0", + "PCIE_EE4BEG0_4" + ], + [ + "INT_INTERFACE_EE4BEG1", + "PCIE_EE4BEG1_4" + ], + [ + "INT_INTERFACE_EE4BEG2", + "PCIE_EE4BEG2_4" + ], + [ + "INT_INTERFACE_EE4BEG3", + "PCIE_EE4BEG3_4" + ], + [ + "INT_INTERFACE_EE4C0", + "PCIE_EE4C0_4" + ], + [ + "INT_INTERFACE_EE4C1", + "PCIE_EE4C1_4" + ], + [ + "INT_INTERFACE_EE4C2", + "PCIE_EE4C2_4" + ], + [ + "INT_INTERFACE_EE4C3", + "PCIE_EE4C3_4" + ], + [ + "INT_INTERFACE_EL1BEG0", + "PCIE_EL1BEG0_4" + ], + [ + "INT_INTERFACE_EL1BEG1", + "PCIE_EL1BEG1_4" + ], + [ + "INT_INTERFACE_EL1BEG2", + "PCIE_EL1BEG2_4" + ], + [ + "INT_INTERFACE_EL1BEG3", + "PCIE_EL1BEG3_4" + ], + [ + "INT_INTERFACE_ER1BEG0", + "PCIE_ER1BEG0_4" + ], + [ + "INT_INTERFACE_ER1BEG1", + "PCIE_ER1BEG1_4" + ], + [ + "INT_INTERFACE_ER1BEG2", + "PCIE_ER1BEG2_4" + ], + [ + "INT_INTERFACE_ER1BEG3", + "PCIE_ER1BEG3_4" + ], + [ + "INT_INTERFACE_FAN0", + "PCIE_FAN0_R_4" + ], + [ + "INT_INTERFACE_FAN1", + "PCIE_FAN1_R_4" + ], + [ + "INT_INTERFACE_FAN2", + "PCIE_FAN2_R_4" + ], + [ + "INT_INTERFACE_FAN3", + "PCIE_FAN3_R_4" + ], + [ + "INT_INTERFACE_FAN4", + "PCIE_FAN4_R_4" + ], + [ + "INT_INTERFACE_FAN5", + "PCIE_FAN5_R_4" + ], + [ + "INT_INTERFACE_FAN6", + "PCIE_FAN6_R_4" + ], + [ + "INT_INTERFACE_FAN7", + "PCIE_FAN7_R_4" + ], + [ + "INT_INTERFACE_LH1", + "PCIE_LH1_4" + ], + [ + "INT_INTERFACE_LH2", + "PCIE_LH2_4" + ], + [ + "INT_INTERFACE_LH3", + "PCIE_LH3_4" + ], + [ + "INT_INTERFACE_LH4", + "PCIE_LH4_4" + ], + [ + "INT_INTERFACE_LH5", + "PCIE_LH5_4" + ], + [ + "INT_INTERFACE_LH6", + "PCIE_LH6_4" + ], + [ + "INT_INTERFACE_LH7", + "PCIE_LH7_4" + ], + [ + "INT_INTERFACE_LH8", + "PCIE_LH8_4" + ], + [ + "INT_INTERFACE_LH9", + "PCIE_LH9_4" + ], + [ + "INT_INTERFACE_LH10", + "PCIE_LH10_4" + ], + [ + "INT_INTERFACE_LH11", + "PCIE_LH11_4" + ], + [ + "INT_INTERFACE_LH12", + "PCIE_LH12_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B0", + "PCIE_LOGIC_OUTS_B0_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B1", + "PCIE_LOGIC_OUTS_B1_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B2", + "PCIE_LOGIC_OUTS_B2_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B3", + "PCIE_LOGIC_OUTS_B3_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B4", + "PCIE_LOGIC_OUTS_B4_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B5", + "PCIE_LOGIC_OUTS_B5_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B6", + "PCIE_LOGIC_OUTS_B6_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B7", + "PCIE_LOGIC_OUTS_B7_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B8", + "PCIE_LOGIC_OUTS_B8_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B9", + "PCIE_LOGIC_OUTS_B9_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B10", + "PCIE_LOGIC_OUTS_B10_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B11", + "PCIE_LOGIC_OUTS_B11_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B12", + "PCIE_LOGIC_OUTS_B12_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B13", + "PCIE_LOGIC_OUTS_B13_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B14", + "PCIE_LOGIC_OUTS_B14_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B15", + "PCIE_LOGIC_OUTS_B15_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B16", + "PCIE_LOGIC_OUTS_B16_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B17", + "PCIE_LOGIC_OUTS_B17_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B18", + "PCIE_LOGIC_OUTS_B18_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B19", + "PCIE_LOGIC_OUTS_B19_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B20", + "PCIE_LOGIC_OUTS_B20_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B21", + "PCIE_LOGIC_OUTS_B21_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B22", + "PCIE_LOGIC_OUTS_B22_R_4" + ], + [ + "INT_INTERFACE_LOGIC_OUTS_B23", + "PCIE_LOGIC_OUTS_B23_R_4" + ], + [ + "INT_INTERFACE_NE2A0", + "PCIE_NE2A0_4" + ], + [ + "INT_INTERFACE_NE2A1", + "PCIE_NE2A1_4" + ], + [ + "INT_INTERFACE_NE2A2", + "PCIE_NE2A2_4" + ], + [ + "INT_INTERFACE_NE2A3", + "PCIE_NE2A3_4" + ], + [ + "INT_INTERFACE_NE4BEG0", + "PCIE_NE4BEG0_4" + ], + [ + "INT_INTERFACE_NE4BEG1", + "PCIE_NE4BEG1_4" + ], + [ + "INT_INTERFACE_NE4BEG2", + "PCIE_NE4BEG2_4" + ], + [ + "INT_INTERFACE_NE4BEG3", + "PCIE_NE4BEG3_4" + ], + [ + "INT_INTERFACE_NE4C0", + "PCIE_NE4C0_4" + ], + [ + "INT_INTERFACE_NE4C1", + "PCIE_NE4C1_4" + ], + [ + "INT_INTERFACE_NE4C2", + "PCIE_NE4C2_4" + ], + [ + "INT_INTERFACE_NE4C3", + "PCIE_NE4C3_4" + ], + [ + "INT_INTERFACE_NW2A0", + "PCIE_NW2A0_4" + ], + [ + "INT_INTERFACE_NW2A1", + "PCIE_NW2A1_4" + ], + [ + "INT_INTERFACE_NW2A2", + "PCIE_NW2A2_4" + ], + [ + "INT_INTERFACE_NW2A3", + "PCIE_NW2A3_4" + ], + [ + "INT_INTERFACE_NW4A0", + "PCIE_NW4A0_4" + ], + [ + "INT_INTERFACE_NW4A1", + "PCIE_NW4A1_4" + ], + [ + "INT_INTERFACE_NW4A2", + "PCIE_NW4A2_4" + ], + [ + "INT_INTERFACE_NW4A3", + "PCIE_NW4A3_4" + ], + [ + "INT_INTERFACE_NW4END0", + "PCIE_NW4END0_4" + ], + [ + "INT_INTERFACE_NW4END1", + "PCIE_NW4END1_4" + ], + [ + "INT_INTERFACE_NW4END2", + "PCIE_NW4END2_4" + ], + [ + "INT_INTERFACE_NW4END3", + "PCIE_NW4END3_4" + ], + [ + "INT_INTERFACE_SE2A0", + "PCIE_SE2A0_4" + ], + [ + "INT_INTERFACE_SE2A1", + "PCIE_SE2A1_4" + ], + [ + "INT_INTERFACE_SE2A2", + "PCIE_SE2A2_4" + ], + [ + "INT_INTERFACE_SE2A3", + "PCIE_SE2A3_4" + ], + [ + "INT_INTERFACE_SE4BEG0", + "PCIE_SE4BEG0_4" + ], + [ + "INT_INTERFACE_SE4BEG1", + "PCIE_SE4BEG1_4" + ], + [ + "INT_INTERFACE_SE4BEG2", + "PCIE_SE4BEG2_4" + ], + [ + "INT_INTERFACE_SE4BEG3", + "PCIE_SE4BEG3_4" + ], + [ + "INT_INTERFACE_SE4C0", + "PCIE_SE4C0_4" + ], + [ + "INT_INTERFACE_SE4C1", + "PCIE_SE4C1_4" + ], + [ + "INT_INTERFACE_SE4C2", + "PCIE_SE4C2_4" + ], + [ + "INT_INTERFACE_SE4C3", + "PCIE_SE4C3_4" + ], + [ + "INT_INTERFACE_SW2A0", + "PCIE_SW2A0_4" + ], + [ + "INT_INTERFACE_SW2A1", + "PCIE_SW2A1_4" + ], + [ + "INT_INTERFACE_SW2A2", + "PCIE_SW2A2_4" + ], + [ + "INT_INTERFACE_SW2A3", + "PCIE_SW2A3_4" + ], + [ + "INT_INTERFACE_SW4A0", + "PCIE_SW4A0_4" + ], + [ + "INT_INTERFACE_SW4A1", + "PCIE_SW4A1_4" + ], + [ + "INT_INTERFACE_SW4A2", + "PCIE_SW4A2_4" + ], + [ + "INT_INTERFACE_SW4A3", + "PCIE_SW4A3_4" + ], + [ + "INT_INTERFACE_SW4END0", + "PCIE_SW4END0_4" + ], + [ + "INT_INTERFACE_SW4END1", + "PCIE_SW4END1_4" + ], + [ + "INT_INTERFACE_SW4END2", + "PCIE_SW4END2_4" + ], + [ + "INT_INTERFACE_SW4END3", + "PCIE_SW4END3_4" + ], + [ + "INT_INTERFACE_WL1END0", + "PCIE_WL1END0_4" + ], + [ + "INT_INTERFACE_WL1END1", + "PCIE_WL1END1_4" + ], + [ + "INT_INTERFACE_WL1END2", + "PCIE_WL1END2_4" + ], + [ + "INT_INTERFACE_WL1END3", + "PCIE_WL1END3_4" + ], + [ + "INT_INTERFACE_WR1END0", + "PCIE_WR1END0_4" + ], + [ + "INT_INTERFACE_WR1END1", + "PCIE_WR1END1_4" + ], + [ + "INT_INTERFACE_WR1END2", + "PCIE_WR1END2_4" + ], + [ + "INT_INTERFACE_WR1END3", + "PCIE_WR1END3_4" + ], + [ + "INT_INTERFACE_WW2A0", + "PCIE_WW2A0_4" + ], + [ + "INT_INTERFACE_WW2A1", + "PCIE_WW2A1_4" + ], + [ + "INT_INTERFACE_WW2A2", + "PCIE_WW2A2_4" + ], + [ + "INT_INTERFACE_WW2A3", + "PCIE_WW2A3_4" + ], + [ + "INT_INTERFACE_WW2END0", + "PCIE_WW2END0_4" + ], + [ + "INT_INTERFACE_WW2END1", + "PCIE_WW2END1_4" + ], + [ + "INT_INTERFACE_WW2END2", + "PCIE_WW2END2_4" + ], + [ + "INT_INTERFACE_WW2END3", + "PCIE_WW2END3_4" + ], + [ + "INT_INTERFACE_WW4A0", + "PCIE_WW4A0_4" + ], + [ + "INT_INTERFACE_WW4A1", + "PCIE_WW4A1_4" + ], + [ + "INT_INTERFACE_WW4A2", + "PCIE_WW4A2_4" + ], + [ + "INT_INTERFACE_WW4A3", + "PCIE_WW4A3_4" + ], + [ + "INT_INTERFACE_WW4B0", + "PCIE_WW4B0_4" + ], + [ + "INT_INTERFACE_WW4B1", + "PCIE_WW4B1_4" + ], + [ + "INT_INTERFACE_WW4B2", + "PCIE_WW4B2_4" + ], + [ + "INT_INTERFACE_WW4B3", + "PCIE_WW4B3_4" + ], + [ + "INT_INTERFACE_WW4C0", + "PCIE_WW4C0_4" + ], + [ + "INT_INTERFACE_WW4C1", + "PCIE_WW4C1_4" + ], + [ + "INT_INTERFACE_WW4C2", + "PCIE_WW4C2_4" + ], + [ + "INT_INTERFACE_WW4C3", + "PCIE_WW4C3_4" + ], + [ + "INT_INTERFACE_WW4END0", + "PCIE_WW4END0_4" + ], + [ + "INT_INTERFACE_WW4END1", + "PCIE_WW4END1_4" + ], + [ + "INT_INTERFACE_WW4END2", + "PCIE_WW4END2_4" + ], + [ + "INT_INTERFACE_WW4END3", + "PCIE_WW4END3_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT0", + "PCIE_IMUX0_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT1", + "PCIE_IMUX1_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT2", + "PCIE_IMUX2_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT3", + "PCIE_IMUX3_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT4", + "PCIE_IMUX4_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT5", + "PCIE_IMUX5_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT6", + "PCIE_IMUX6_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT7", + "PCIE_IMUX7_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT8", + "PCIE_IMUX8_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT9", + "PCIE_IMUX9_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT10", + "PCIE_IMUX10_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT11", + "PCIE_IMUX11_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT12", + "PCIE_IMUX12_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT13", + "PCIE_IMUX13_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT14", + "PCIE_IMUX14_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT15", + "PCIE_IMUX15_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT16", + "PCIE_IMUX16_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT17", + "PCIE_IMUX17_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT18", + "PCIE_IMUX18_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT19", + "PCIE_IMUX19_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT20", + "PCIE_IMUX20_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT21", + "PCIE_IMUX21_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT22", + "PCIE_IMUX22_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT23", + "PCIE_IMUX23_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT24", + "PCIE_IMUX24_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT25", + "PCIE_IMUX25_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT26", + "PCIE_IMUX26_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT27", + "PCIE_IMUX27_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT28", + "PCIE_IMUX28_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT29", + "PCIE_IMUX29_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT30", + "PCIE_IMUX30_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT31", + "PCIE_IMUX31_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT32", + "PCIE_IMUX32_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT33", + "PCIE_IMUX33_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT34", + "PCIE_IMUX34_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT35", + "PCIE_IMUX35_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT36", + "PCIE_IMUX36_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT37", + "PCIE_IMUX37_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT38", + "PCIE_IMUX38_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT39", + "PCIE_IMUX39_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT40", + "PCIE_IMUX40_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT41", + "PCIE_IMUX41_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT42", + "PCIE_IMUX42_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT43", + "PCIE_IMUX43_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT44", + "PCIE_IMUX44_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT45", + "PCIE_IMUX45_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT46", + "PCIE_IMUX46_R_4" + ], + [ + "PCIE_INT_INTERFACE_IMUX_OUT47", + "PCIE_IMUX47_R_4" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOB33", + "RIOI3" + ], + "wire_pairs": [ + [ + "IOB_DIFF_TERM_INT_EN", + "RIOI_DIFF_TERM_INT_EN" + ], + [ + "IOB_IBUF0", + "RIOI_IBUF0" + ], + [ + "IOB_IBUF1", + "RIOI_IBUF1" + ], + [ + "IOB_IBUF_DISABLE0", + "RIOI_IBUF_DISABLE0" + ], + [ + "IOB_IBUF_DISABLE1", + "RIOI_IBUF_DISABLE1" + ], + [ + "IOB_KEEPER_INT_EN_0", + "RIOI_KEEPER_INT_EN_0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "RIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "RIOI_O0" + ], + [ + "IOB_O1", + "RIOI_O1" + ], + [ + "IOB_PD_INT_EN_0", + "RIOI_PD_INT_EN_0" + ], + [ + "IOB_PD_INT_EN_1", + "RIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_0", + "RIOI_PU_INT_EN_0" + ], + [ + "IOB_PU_INT_EN_1", + "RIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "RIOI_T0" + ], + [ + "IOB_T1", + "RIOI_T1" + ], + [ + "LIOB_IN_TERM0", + "RIOI_DCI_T_TERM0" + ], + [ + "LIOB_IN_TERM1", + "RIOI_DCI_T_TERM1" + ], + [ + "RIOB_MONITOR_N", + "IOI_MONITOR_N" + ], + [ + "RIOB_MONITOR_P", + "IOI_MONITOR_P" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOB33", + "RIOI3_TBYTESRC" + ], + "wire_pairs": [ + [ + "IOB_DIFF_TERM_INT_EN", + "RIOI_DIFF_TERM_INT_EN" + ], + [ + "IOB_IBUF0", + "RIOI_IBUF0" + ], + [ + "IOB_IBUF1", + "RIOI_IBUF1" + ], + [ + "IOB_IBUF_DISABLE0", + "RIOI_IBUF_DISABLE0" + ], + [ + "IOB_IBUF_DISABLE1", + "RIOI_IBUF_DISABLE1" + ], + [ + "IOB_KEEPER_INT_EN_0", + "RIOI_KEEPER_INT_EN_0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "RIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "RIOI_O0" + ], + [ + "IOB_O1", + "RIOI_O1" + ], + [ + "IOB_PD_INT_EN_0", + "RIOI_PD_INT_EN_0" + ], + [ + "IOB_PD_INT_EN_1", + "RIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_0", + "RIOI_PU_INT_EN_0" + ], + [ + "IOB_PU_INT_EN_1", + "RIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "RIOI_T0" + ], + [ + "IOB_T1", + "RIOI_T1" + ], + [ + "LIOB_IN_TERM0", + "RIOI_DCI_T_TERM0" + ], + [ + "LIOB_IN_TERM1", + "RIOI_DCI_T_TERM1" + ], + [ + "RIOB_MONITOR_N", + "IOI_MONITOR_N" + ], + [ + "RIOB_MONITOR_P", + "IOI_MONITOR_P" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOB33", + "RIOI3_TBYTETERM" + ], + "wire_pairs": [ + [ + "IOB_DIFF_TERM_INT_EN", + "RIOI_DIFF_TERM_INT_EN" + ], + [ + "IOB_IBUF0", + "RIOI_IBUF0" + ], + [ + "IOB_IBUF1", + "RIOI_IBUF1" + ], + [ + "IOB_IBUF_DISABLE0", + "RIOI_IBUF_DISABLE0" + ], + [ + "IOB_IBUF_DISABLE1", + "RIOI_IBUF_DISABLE1" + ], + [ + "IOB_KEEPER_INT_EN_0", + "RIOI_KEEPER_INT_EN_0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "RIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "RIOI_O0" + ], + [ + "IOB_O1", + "RIOI_O1" + ], + [ + "IOB_PD_INT_EN_0", + "RIOI_PD_INT_EN_0" + ], + [ + "IOB_PD_INT_EN_1", + "RIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_0", + "RIOI_PU_INT_EN_0" + ], + [ + "IOB_PU_INT_EN_1", + "RIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "RIOI_T0" + ], + [ + "IOB_T1", + "RIOI_T1" + ], + [ + "LIOB_IN_TERM0", + "RIOI_DCI_T_TERM0" + ], + [ + "LIOB_IN_TERM1", + "RIOI_DCI_T_TERM1" + ], + [ + "RIOB_MONITOR_N", + "IOI_MONITOR_N" + ], + [ + "RIOB_MONITOR_P", + "IOI_MONITOR_P" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOB33_SING", + "RIOI3_SING" + ], + "wire_pairs": [ + [ + "IOB_IBUF0", + "RIOI_IBUF0" + ], + [ + "IOB_IBUF_DISABLE0", + "RIOI_IBUF_DISABLE0" + ], + [ + "IOB_KEEPER_INT_EN_1", + "RIOI_KEEPER_INT_EN_1" + ], + [ + "IOB_O0", + "RIOI_O0" + ], + [ + "IOB_PD_INT_EN_1", + "RIOI_PD_INT_EN_1" + ], + [ + "IOB_PU_INT_EN_1", + "RIOI_PU_INT_EN_1" + ], + [ + "IOB_T0", + "RIOI_T0" + ], + [ + "LIOB_IN_TERM0", + "RIOI_DCI_T_TERM0" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "RIOI3", + "RIOI3" + ], + "wire_pairs": [ + [ + "IOI_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0_1" + ], + [ + "IOI_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1_1" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "RIOI3", + "RIOI3" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC0", + "IOI_IMUX_RC2" + ], + [ + "IOI_IMUX_RC1", + "IOI_IMUX_RC3" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2_1" + ], + [ + "IOI_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3_1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN" + ], + [ + "RIOI_I2GCLK_BOT1", + "RIOI_I2GCLK_TOP0" + ], + [ + "RIOI_I2GCLK_TOP0", + "RIOI_I2GCLK_TOP1" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "RIOI3", + "RIOI3_SING" + ], + "wire_pairs": [ + [ + "IOI_IOCLK0", + "IOI_SING_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_SING_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_SING_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_SING_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_SING_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_SING_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_SING_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_SING_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_SING_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_SING_LEAF_GCLK5" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_SING_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_SING_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_SING_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_SING_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_SING_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 1 + ], + "tile_types": [ + "RIOI3", + "RIOI3_SING" + ], + "wire_pairs": [ + [ + "IOI_IOCLK0", + "IOI_SING_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_SING_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_SING_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_SING_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_SING_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_SING_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_SING_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_SING_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_SING_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_SING_LEAF_GCLK5" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_SING_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_SING_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_SING_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_SING_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_SING_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "RIOI3", + "RIOI3_TBYTESRC" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC2", + "IOI_IMUX_RC0" + ], + [ + "IOI_IMUX_RC3", + "IOI_IMUX_RC1" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2_1", + "IOI_RCLK_DIV_CE2" + ], + [ + "IOI_RCLK_DIV_CE3_1", + "IOI_RCLK_DIV_CE3" + ], + [ + "IOI_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0_1" + ], + [ + "IOI_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1_1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "RIOI3", + "RIOI3_TBYTESRC" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC0", + "IOI_IMUX_RC2" + ], + [ + "IOI_IMUX_RC1", + "IOI_IMUX_RC3" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2_1" + ], + [ + "IOI_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3_1" + ], + [ + "IOI_RCLK_DIV_CLR0_1", + "IOI_RCLK_DIV_CLR0" + ], + [ + "IOI_RCLK_DIV_CLR1_1", + "IOI_RCLK_DIV_CLR1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN" + ] + ] + }, + { + "grid_deltas": [ + 0, + -2 + ], + "tile_types": [ + "RIOI3", + "RIOI3_TBYTETERM" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC2", + "IOI_IMUX_RC0" + ], + [ + "IOI_IMUX_RC3", + "IOI_IMUX_RC1" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2_1", + "IOI_RCLK_DIV_CE2" + ], + [ + "IOI_RCLK_DIV_CE3_1", + "IOI_RCLK_DIV_CE3" + ], + [ + "IOI_RCLK_DIV_CLR0", + "IOI_RCLK_DIV_CLR0_1" + ], + [ + "IOI_RCLK_DIV_CLR1", + "IOI_RCLK_DIV_CLR1_1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ] + ] + }, + { + "grid_deltas": [ + 0, + 2 + ], + "tile_types": [ + "RIOI3", + "RIOI3_TBYTETERM" + ], + "wire_pairs": [ + [ + "IOI_IMUX_RC0", + "IOI_IMUX_RC2" + ], + [ + "IOI_IMUX_RC1", + "IOI_IMUX_RC3" + ], + [ + "IOI_IOCLK0", + "IOI_IOCLK0" + ], + [ + "IOI_IOCLK1", + "IOI_IOCLK1" + ], + [ + "IOI_IOCLK2", + "IOI_IOCLK2" + ], + [ + "IOI_IOCLK3", + "IOI_IOCLK3" + ], + [ + "IOI_LEAF_GCLK0", + "IOI_LEAF_GCLK0" + ], + [ + "IOI_LEAF_GCLK1", + "IOI_LEAF_GCLK1" + ], + [ + "IOI_LEAF_GCLK2", + "IOI_LEAF_GCLK2" + ], + [ + "IOI_LEAF_GCLK3", + "IOI_LEAF_GCLK3" + ], + [ + "IOI_LEAF_GCLK4", + "IOI_LEAF_GCLK4" + ], + [ + "IOI_LEAF_GCLK5", + "IOI_LEAF_GCLK5" + ], + [ + "IOI_RCLK_DIV_CE2", + "IOI_RCLK_DIV_CE2_1" + ], + [ + "IOI_RCLK_DIV_CE3", + "IOI_RCLK_DIV_CE3_1" + ], + [ + "IOI_RCLK_DIV_CLR0_1", + "IOI_RCLK_DIV_CLR0" + ], + [ + "IOI_RCLK_DIV_CLR1_1", + "IOI_RCLK_DIV_CLR1" + ], + [ + "IOI_RCLK_FORIO0", + "IOI_RCLK_FORIO0" + ], + [ + "IOI_RCLK_FORIO1", + "IOI_RCLK_FORIO1" + ], + [ + "IOI_RCLK_FORIO2", + "IOI_RCLK_FORIO2" + ], + [ + "IOI_RCLK_FORIO3", + "IOI_RCLK_FORIO3" + ], + [ + "IOI_TBYTEIN", + "IOI_TBYTEIN_TERM" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "RIOI3", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_1", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_1", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_1", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_1", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_1", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_1", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_1", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_1", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_1", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_1", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_1", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_1", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_1", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_1", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_1", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_1", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_1", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_1", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_1", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_1", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_1", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_1", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_1", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_1", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_1", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_1", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_1", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_1", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_1", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_1", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_1", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_1", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_1", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_1", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_1", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_1", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_1", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_1", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_1", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_1", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_1", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_1", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_1", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_1", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_1", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_1", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_1", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_1", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_1", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_1", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_1", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_1", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_1", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_1", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_1", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_1", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_1", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_1", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_1", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_1", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_1", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_1", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_1", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_1", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_1", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_1", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_1", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_1", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_1", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_1", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_1", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_1", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_1", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_1", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_1", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_1", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_1", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_1", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_1", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS13_1", + "TERM_INT_LOGIC_OUTS_L_B13" + ], + [ + "IOI_LOGIC_OUTS14_1", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_1", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS16_1", + "TERM_INT_LOGIC_OUTS_L_B16" + ], + [ + "IOI_LOGIC_OUTS18_1", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_1", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_1", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS22_1", + "TERM_INT_LOGIC_OUTS_L_B22" + ], + [ + "IOI_LOGIC_OUTS23_1", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_ICLK_0", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK_0", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOI3", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS13_0", + "TERM_INT_LOGIC_OUTS_L_B13" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS16_0", + "TERM_INT_LOGIC_OUTS_L_B16" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "IOI_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "RIOI_I2GCLK_TOP0", + "L_TERM_INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOI3_SING", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "RIOI3_TBYTESRC", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_1", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_1", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_1", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_1", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_1", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_1", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_1", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_1", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_1", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_1", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_1", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_1", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_1", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_1", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_1", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_1", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_1", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_1", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_1", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_1", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_1", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_1", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_1", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_1", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_1", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_1", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_1", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_1", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_1", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_1", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_1", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_1", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_1", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_1", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_1", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_1", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_1", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_1", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_1", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_1", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_1", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_1", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_1", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_1", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_1", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_1", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_1", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_1", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_1", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_1", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_1", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_1", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_1", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_1", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_1", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_1", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_1", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_1", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_1", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_1", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_1", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_1", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_1", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_1", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_1", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_1", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_1", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_1", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_1", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_1", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_1", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_1", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_1", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_1", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_1", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_1", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_1", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_1", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_1", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_1", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_1", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_1", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_1", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_1", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_1", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_ICLK_0", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_OCLK1X_90_0", + "L_TERM_INT_PHASER_TO_IO_OCLK1X_90" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK_0", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOI3_TBYTESRC", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "IOI_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "RIOI_I2GCLK_TOP0", + "L_TERM_INT_DQS_IOTOPHASER" + ] + ] + }, + { + "grid_deltas": [ + -1, + -1 + ], + "tile_types": [ + "RIOI3_TBYTETERM", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_1", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_1", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_1", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_1", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_1", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_1", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_1", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_1", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_1", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_1", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_1", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_1", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_1", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_1", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_1", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_1", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_1", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_1", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_1", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_1", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_1", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_1", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_1", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_1", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_1", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_1", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_1", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_1", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_1", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_1", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_1", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_1", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_1", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_1", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_1", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_1", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_1", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_1", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_1", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_1", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_1", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_1", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_1", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_1", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_1", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_1", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_1", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_1", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_1", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_1", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_1", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_1", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_1", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_1", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_1", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_1", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_1", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_1", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_1", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_1", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_1", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_1", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_1", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_1", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_1", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_1", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_1", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_1", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_1", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_1", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_1", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_1", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_1", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_1", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_1", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_1", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_1", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_1", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_1", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_1", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_1", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_1", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_1", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_1", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_1", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_1", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_ICLK_0", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV_0", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK_0", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ] + ] + }, + { + "grid_deltas": [ + -1, + 0 + ], + "tile_types": [ + "RIOI3_TBYTETERM", + "R_TERM_INT" + ], + "wire_pairs": [ + [ + "IOI_BLOCK_OUTS0_0", + "TERM_INT_BLOCK_OUTS_L_B0" + ], + [ + "IOI_BLOCK_OUTS2_0", + "TERM_INT_BLOCK_OUTS_L_B2" + ], + [ + "IOI_BYP0_0", + "TERM_INT_BYP0" + ], + [ + "IOI_BYP1_0", + "TERM_INT_BYP1" + ], + [ + "IOI_BYP2_0", + "TERM_INT_BYP2" + ], + [ + "IOI_BYP3_0", + "TERM_INT_BYP3" + ], + [ + "IOI_BYP4_0", + "TERM_INT_BYP4" + ], + [ + "IOI_BYP5_0", + "TERM_INT_BYP5" + ], + [ + "IOI_BYP6_0", + "TERM_INT_BYP6" + ], + [ + "IOI_BYP7_0", + "TERM_INT_BYP7" + ], + [ + "IOI_CLK0_0", + "TERM_INT_CLK0" + ], + [ + "IOI_CLK1_0", + "TERM_INT_CLK1" + ], + [ + "IOI_CTRL0_0", + "TERM_INT_CTRL0" + ], + [ + "IOI_CTRL1_0", + "TERM_INT_CTRL1" + ], + [ + "IOI_FAN0_0", + "TERM_INT_FAN0" + ], + [ + "IOI_FAN1_0", + "TERM_INT_FAN1" + ], + [ + "IOI_FAN2_0", + "TERM_INT_FAN2" + ], + [ + "IOI_FAN3_0", + "TERM_INT_FAN3" + ], + [ + "IOI_FAN4_0", + "TERM_INT_FAN4" + ], + [ + "IOI_FAN5_0", + "TERM_INT_FAN5" + ], + [ + "IOI_FAN6_0", + "TERM_INT_FAN6" + ], + [ + "IOI_FAN7_0", + "TERM_INT_FAN7" + ], + [ + "IOI_IMUX0_0", + "TERM_INT_IMUX0" + ], + [ + "IOI_IMUX1_0", + "TERM_INT_IMUX1" + ], + [ + "IOI_IMUX2_0", + "TERM_INT_IMUX2" + ], + [ + "IOI_IMUX3_0", + "TERM_INT_IMUX3" + ], + [ + "IOI_IMUX4_0", + "TERM_INT_IMUX4" + ], + [ + "IOI_IMUX5_0", + "TERM_INT_IMUX5" + ], + [ + "IOI_IMUX6_0", + "TERM_INT_IMUX6" + ], + [ + "IOI_IMUX7_0", + "TERM_INT_IMUX7" + ], + [ + "IOI_IMUX8_0", + "TERM_INT_IMUX8" + ], + [ + "IOI_IMUX9_0", + "TERM_INT_IMUX9" + ], + [ + "IOI_IMUX10_0", + "TERM_INT_IMUX10" + ], + [ + "IOI_IMUX11_0", + "TERM_INT_IMUX11" + ], + [ + "IOI_IMUX12_0", + "TERM_INT_IMUX12" + ], + [ + "IOI_IMUX13_0", + "TERM_INT_IMUX13" + ], + [ + "IOI_IMUX14_0", + "TERM_INT_IMUX14" + ], + [ + "IOI_IMUX15_0", + "TERM_INT_IMUX15" + ], + [ + "IOI_IMUX16_0", + "TERM_INT_IMUX16" + ], + [ + "IOI_IMUX17_0", + "TERM_INT_IMUX17" + ], + [ + "IOI_IMUX18_0", + "TERM_INT_IMUX18" + ], + [ + "IOI_IMUX19_0", + "TERM_INT_IMUX19" + ], + [ + "IOI_IMUX20_0", + "TERM_INT_IMUX20" + ], + [ + "IOI_IMUX21_0", + "TERM_INT_IMUX21" + ], + [ + "IOI_IMUX22_0", + "TERM_INT_IMUX22" + ], + [ + "IOI_IMUX23_0", + "TERM_INT_IMUX23" + ], + [ + "IOI_IMUX24_0", + "TERM_INT_IMUX24" + ], + [ + "IOI_IMUX25_0", + "TERM_INT_IMUX25" + ], + [ + "IOI_IMUX26_0", + "TERM_INT_IMUX26" + ], + [ + "IOI_IMUX27_0", + "TERM_INT_IMUX27" + ], + [ + "IOI_IMUX28_0", + "TERM_INT_IMUX28" + ], + [ + "IOI_IMUX29_0", + "TERM_INT_IMUX29" + ], + [ + "IOI_IMUX30_0", + "TERM_INT_IMUX30" + ], + [ + "IOI_IMUX31_0", + "TERM_INT_IMUX31" + ], + [ + "IOI_IMUX32_0", + "TERM_INT_IMUX32" + ], + [ + "IOI_IMUX33_0", + "TERM_INT_IMUX33" + ], + [ + "IOI_IMUX34_0", + "TERM_INT_IMUX34" + ], + [ + "IOI_IMUX35_0", + "TERM_INT_IMUX35" + ], + [ + "IOI_IMUX36_0", + "TERM_INT_IMUX36" + ], + [ + "IOI_IMUX37_0", + "TERM_INT_IMUX37" + ], + [ + "IOI_IMUX38_0", + "TERM_INT_IMUX38" + ], + [ + "IOI_IMUX39_0", + "TERM_INT_IMUX39" + ], + [ + "IOI_IMUX40_0", + "TERM_INT_IMUX40" + ], + [ + "IOI_IMUX41_0", + "TERM_INT_IMUX41" + ], + [ + "IOI_IMUX42_0", + "TERM_INT_IMUX42" + ], + [ + "IOI_IMUX43_0", + "TERM_INT_IMUX43" + ], + [ + "IOI_IMUX44_0", + "TERM_INT_IMUX44" + ], + [ + "IOI_IMUX45_0", + "TERM_INT_IMUX45" + ], + [ + "IOI_IMUX46_0", + "TERM_INT_IMUX46" + ], + [ + "IOI_IMUX47_0", + "TERM_INT_IMUX47" + ], + [ + "IOI_LOGIC_OUTS0_0", + "TERM_INT_LOGIC_OUTS_L_B0" + ], + [ + "IOI_LOGIC_OUTS1_0", + "TERM_INT_LOGIC_OUTS_L_B1" + ], + [ + "IOI_LOGIC_OUTS2_0", + "TERM_INT_LOGIC_OUTS_L_B2" + ], + [ + "IOI_LOGIC_OUTS3_0", + "TERM_INT_LOGIC_OUTS_L_B3" + ], + [ + "IOI_LOGIC_OUTS5_0", + "TERM_INT_LOGIC_OUTS_L_B5" + ], + [ + "IOI_LOGIC_OUTS7_0", + "TERM_INT_LOGIC_OUTS_L_B7" + ], + [ + "IOI_LOGIC_OUTS8_0", + "TERM_INT_LOGIC_OUTS_L_B8" + ], + [ + "IOI_LOGIC_OUTS9_0", + "TERM_INT_LOGIC_OUTS_L_B9" + ], + [ + "IOI_LOGIC_OUTS10_0", + "TERM_INT_LOGIC_OUTS_L_B10" + ], + [ + "IOI_LOGIC_OUTS11_0", + "TERM_INT_LOGIC_OUTS_L_B11" + ], + [ + "IOI_LOGIC_OUTS14_0", + "TERM_INT_LOGIC_OUTS_L_B14" + ], + [ + "IOI_LOGIC_OUTS15_0", + "TERM_INT_LOGIC_OUTS_L_B15" + ], + [ + "IOI_LOGIC_OUTS18_0", + "TERM_INT_LOGIC_OUTS_L_B18" + ], + [ + "IOI_LOGIC_OUTS19_0", + "TERM_INT_LOGIC_OUTS_L_B19" + ], + [ + "IOI_LOGIC_OUTS20_0", + "TERM_INT_LOGIC_OUTS_L_B20" + ], + [ + "IOI_LOGIC_OUTS23_0", + "TERM_INT_LOGIC_OUTS_L_B23" + ], + [ + "IOI_MONITOR_N", + "TERM_INT_MONITOR_N" + ], + [ + "IOI_MONITOR_P", + "TERM_INT_MONITOR_P" + ], + [ + "IOI_PHASER_TO_IO_ICLK", + "L_TERM_INT_PHASER_TO_IO_ICLK" + ], + [ + "IOI_PHASER_TO_IO_ICLKDIV", + "L_TERM_INT_PHASER_TO_IO_ICLKDIV" + ], + [ + "IOI_PHASER_TO_IO_OCLK", + "L_TERM_INT_PHASER_TO_IO_OCLK" + ], + [ + "IOI_PHASER_TO_IO_OCLKDIV", + "L_TERM_INT_PHASER_TO_IO_OCLKDIV" + ] + ] + }, + { + "grid_deltas": [ + 1, + 0 + ], + "tile_types": [ + "R_TERM_INT_GTX", + "VBRK_EXT" + ], + "wire_pairs": [ + [ + "R_TERM_INT_GTX_BYP0", + "VBRK_EXT_BYP0" + ], + [ + "R_TERM_INT_GTX_BYP1", + "VBRK_EXT_BYP1" + ], + [ + "R_TERM_INT_GTX_BYP2", + "VBRK_EXT_BYP2" + ], + [ + "R_TERM_INT_GTX_BYP3", + "VBRK_EXT_BYP3" + ], + [ + "R_TERM_INT_GTX_BYP4", + "VBRK_EXT_BYP4" + ], + [ + "R_TERM_INT_GTX_BYP5", + "VBRK_EXT_BYP5" + ], + [ + "R_TERM_INT_GTX_BYP6", + "VBRK_EXT_BYP6" + ], + [ + "R_TERM_INT_GTX_BYP7", + "VBRK_EXT_BYP7" + ], + [ + "R_TERM_INT_GTX_CLK0", + "VBRK_EXT_CLK0" + ], + [ + "R_TERM_INT_GTX_CLK1", + "VBRK_EXT_CLK1" + ], + [ + "R_TERM_INT_GTX_CTRL0", + "VBRK_EXT_CTRL0" + ], + [ + "R_TERM_INT_GTX_CTRL1", + "VBRK_EXT_CTRL1" + ], + [ + "R_TERM_INT_GTX_FAN0", + "VBRK_EXT_FAN0" + ], + [ + "R_TERM_INT_GTX_FAN1", + "VBRK_EXT_FAN1" + ], + [ + "R_TERM_INT_GTX_FAN2", + "VBRK_EXT_FAN2" + ], + [ + "R_TERM_INT_GTX_FAN3", + "VBRK_EXT_FAN3" + ], + [ + "R_TERM_INT_GTX_FAN4", + "VBRK_EXT_FAN4" + ], + [ + "R_TERM_INT_GTX_FAN5", + "VBRK_EXT_FAN5" + ], + [ + "R_TERM_INT_GTX_FAN6", + "VBRK_EXT_FAN6" + ], + [ + "R_TERM_INT_GTX_FAN7", + "VBRK_EXT_FAN7" + ], + [ + "R_TERM_INT_GTX_IMUX0", + "VBRK_EXT_IMUX0" + ], + [ + "R_TERM_INT_GTX_IMUX1", + "VBRK_EXT_IMUX1" + ], + [ + "R_TERM_INT_GTX_IMUX2", + "VBRK_EXT_IMUX2" + ], + [ + "R_TERM_INT_GTX_IMUX3", + "VBRK_EXT_IMUX3" + ], + [ + "R_TERM_INT_GTX_IMUX4", + "VBRK_EXT_IMUX4" + ], + [ + "R_TERM_INT_GTX_IMUX5", + "VBRK_EXT_IMUX5" + ], + [ + "R_TERM_INT_GTX_IMUX6", + "VBRK_EXT_IMUX6" + ], + [ + "R_TERM_INT_GTX_IMUX7", + "VBRK_EXT_IMUX7" + ], + [ + "R_TERM_INT_GTX_IMUX8", + "VBRK_EXT_IMUX8" + ], + [ + "R_TERM_INT_GTX_IMUX9", + "VBRK_EXT_IMUX9" + ], + [ + "R_TERM_INT_GTX_IMUX10", + "VBRK_EXT_IMUX10" + ], + [ + "R_TERM_INT_GTX_IMUX11", + "VBRK_EXT_IMUX11" + ], + [ + "R_TERM_INT_GTX_IMUX12", + "VBRK_EXT_IMUX12" + ], + [ + "R_TERM_INT_GTX_IMUX13", + "VBRK_EXT_IMUX13" + ], + [ + "R_TERM_INT_GTX_IMUX14", + "VBRK_EXT_IMUX14" + ], + [ + "R_TERM_INT_GTX_IMUX15", + "VBRK_EXT_IMUX15" + ], + [ + "R_TERM_INT_GTX_IMUX16", + "VBRK_EXT_IMUX16" + ], + [ + "R_TERM_INT_GTX_IMUX17", + "VBRK_EXT_IMUX17" + ], + [ + "R_TERM_INT_GTX_IMUX18", + "VBRK_EXT_IMUX18" + ], + [ + "R_TERM_INT_GTX_IMUX19", + "VBRK_EXT_IMUX19" + ], + [ + "R_TERM_INT_GTX_IMUX20", + "VBRK_EXT_IMUX20" + ], + [ + "R_TERM_INT_GTX_IMUX21", + "VBRK_EXT_IMUX21" + ], + [ + "R_TERM_INT_GTX_IMUX22", + "VBRK_EXT_IMUX22" + ], + [ + "R_TERM_INT_GTX_IMUX23", + "VBRK_EXT_IMUX23" + ], + [ + "R_TERM_INT_GTX_IMUX24", + "VBRK_EXT_IMUX24" + ], + [ + "R_TERM_INT_GTX_IMUX25", + "VBRK_EXT_IMUX25" + ], + [ + "R_TERM_INT_GTX_IMUX26", + "VBRK_EXT_IMUX26" + ], + [ + "R_TERM_INT_GTX_IMUX27", + "VBRK_EXT_IMUX27" + ], + [ + "R_TERM_INT_GTX_IMUX28", + "VBRK_EXT_IMUX28" + ], + [ + "R_TERM_INT_GTX_IMUX29", + "VBRK_EXT_IMUX29" + ], + [ + "R_TERM_INT_GTX_IMUX30", + "VBRK_EXT_IMUX30" + ], + [ + "R_TERM_INT_GTX_IMUX31", + "VBRK_EXT_IMUX31" + ], + [ + "R_TERM_INT_GTX_IMUX32", + "VBRK_EXT_IMUX32" + ], + [ + "R_TERM_INT_GTX_IMUX33", + "VBRK_EXT_IMUX33" + ], + [ + "R_TERM_INT_GTX_IMUX34", + "VBRK_EXT_IMUX34" + ], + [ + "R_TERM_INT_GTX_IMUX35", + "VBRK_EXT_IMUX35" + ], + [ + "R_TERM_INT_GTX_IMUX36", + "VBRK_EXT_IMUX36" + ], + [ + "R_TERM_INT_GTX_IMUX37", + "VBRK_EXT_IMUX37" + ], + [ + "R_TERM_INT_GTX_IMUX38", + "VBRK_EXT_IMUX38" + ], + [ + "R_TERM_INT_GTX_IMUX39", + "VBRK_EXT_IMUX39" + ], + [ + "R_TERM_INT_GTX_IMUX40", + "VBRK_EXT_IMUX40" + ], + [ + "R_TERM_INT_GTX_IMUX41", + "VBRK_EXT_IMUX41" + ], + [ + "R_TERM_INT_GTX_IMUX42", + "VBRK_EXT_IMUX42" + ], + [ + "R_TERM_INT_GTX_IMUX43", + "VBRK_EXT_IMUX43" + ], + [ + "R_TERM_INT_GTX_IMUX44", + "VBRK_EXT_IMUX44" + ], + [ + "R_TERM_INT_GTX_IMUX45", + "VBRK_EXT_IMUX45" + ], + [ + "R_TERM_INT_GTX_IMUX46", + "VBRK_EXT_IMUX46" + ], + [ + "R_TERM_INT_GTX_IMUX47", + "VBRK_EXT_IMUX47" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B0", + "VBRK_EXT_LOGIC_OUTS_B0" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B1", + "VBRK_EXT_LOGIC_OUTS_B1" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B2", + "VBRK_EXT_LOGIC_OUTS_B2" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B3", + "VBRK_EXT_LOGIC_OUTS_B3" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B4", + "VBRK_EXT_LOGIC_OUTS_B4" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B5", + "VBRK_EXT_LOGIC_OUTS_B5" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B6", + "VBRK_EXT_LOGIC_OUTS_B6" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B7", + "VBRK_EXT_LOGIC_OUTS_B7" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B8", + "VBRK_EXT_LOGIC_OUTS_B8" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B9", + "VBRK_EXT_LOGIC_OUTS_B9" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B10", + "VBRK_EXT_LOGIC_OUTS_B10" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B11", + "VBRK_EXT_LOGIC_OUTS_B11" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B12", + "VBRK_EXT_LOGIC_OUTS_B12" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B13", + "VBRK_EXT_LOGIC_OUTS_B13" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B14", + "VBRK_EXT_LOGIC_OUTS_B14" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B15", + "VBRK_EXT_LOGIC_OUTS_B15" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B16", + "VBRK_EXT_LOGIC_OUTS_B16" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B17", + "VBRK_EXT_LOGIC_OUTS_B17" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B18", + "VBRK_EXT_LOGIC_OUTS_B18" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B19", + "VBRK_EXT_LOGIC_OUTS_B19" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B20", + "VBRK_EXT_LOGIC_OUTS_B20" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B21", + "VBRK_EXT_LOGIC_OUTS_B21" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B22", + "VBRK_EXT_LOGIC_OUTS_B22" + ], + [ + "R_TERM_INT_GTX_LOGIC_OUTS_B23", + "VBRK_EXT_LOGIC_OUTS_B23" + ] + ] + } +] diff --git a/artix7/xc7a35tftg256-1/tilegrid.json b/artix7/xc7a35tftg256-1/tilegrid.json new file mode 100644 index 0000000..789b432 --- /dev/null +++ b/artix7/xc7a35tftg256-1/tilegrid.json @@ -0,0 +1,253176 @@ +{ + "BRAM_INT_INTERFACE_L_X6Y0": { + "bits": {}, + "grid_x": 20, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y1": { + "bits": {}, + "grid_x": 20, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y2": { + "bits": {}, + "grid_x": 20, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y3": { + "bits": {}, + "grid_x": 20, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y4": { + "bits": {}, + "grid_x": 20, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y5": { + "bits": {}, + "grid_x": 20, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y6": { + "bits": {}, + "grid_x": 20, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y7": { + "bits": {}, + "grid_x": 20, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y8": { + "bits": {}, + "grid_x": 20, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y9": { + "bits": {}, + "grid_x": 20, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y10": { + "bits": {}, + "grid_x": 20, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y11": { + "bits": {}, + "grid_x": 20, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y12": { + "bits": {}, + "grid_x": 20, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y13": { + "bits": {}, + "grid_x": 20, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y14": { + "bits": {}, + "grid_x": 20, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y15": { + "bits": {}, + "grid_x": 20, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y16": { + "bits": {}, + "grid_x": 20, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y17": { + "bits": {}, + "grid_x": 20, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y18": { + "bits": {}, + "grid_x": 20, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y19": { + "bits": {}, + "grid_x": 20, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y20": { + "bits": {}, + "grid_x": 20, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y21": { + "bits": {}, + "grid_x": 20, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y22": { + "bits": {}, + "grid_x": 20, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y23": { + "bits": {}, + "grid_x": 20, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y24": { + "bits": {}, + "grid_x": 20, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y25": { + "bits": {}, + "grid_x": 20, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y26": { + "bits": {}, + "grid_x": 20, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y27": { + "bits": {}, + "grid_x": 20, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y28": { + "bits": {}, + "grid_x": 20, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y29": { + "bits": {}, + "grid_x": 20, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y30": { + "bits": {}, + "grid_x": 20, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y31": { + "bits": {}, + "grid_x": 20, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y32": { + "bits": {}, + "grid_x": 20, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y33": { + "bits": {}, + "grid_x": 20, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y34": { + "bits": {}, + "grid_x": 20, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y35": { + "bits": {}, + "grid_x": 20, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y36": { + "bits": {}, + "grid_x": 20, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y37": { + "bits": {}, + "grid_x": 20, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y38": { + "bits": {}, + "grid_x": 20, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y39": { + "bits": {}, + "grid_x": 20, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y40": { + "bits": {}, + "grid_x": 20, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y41": { + "bits": {}, + "grid_x": 20, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y42": { + "bits": {}, + "grid_x": 20, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y43": { + "bits": {}, + "grid_x": 20, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y44": { + "bits": {}, + "grid_x": 20, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y45": { + "bits": {}, + "grid_x": 20, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y46": { + "bits": {}, + "grid_x": 20, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y47": { + "bits": {}, + "grid_x": 20, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y48": { + "bits": {}, + "grid_x": 20, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y49": { + "bits": {}, + "grid_x": 20, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y50": { + "bits": {}, + "grid_x": 20, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y51": { + "bits": {}, + "grid_x": 20, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y52": { + "bits": {}, + "grid_x": 20, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y53": { + "bits": {}, + "grid_x": 20, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y54": { + "bits": {}, + "grid_x": 20, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y55": { + "bits": {}, + "grid_x": 20, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y56": { + "bits": {}, + "grid_x": 20, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y57": { + "bits": {}, + "grid_x": 20, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y58": { + "bits": {}, + "grid_x": 20, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y59": { + "bits": {}, + "grid_x": 20, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y60": { + "bits": {}, + "grid_x": 20, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y61": { + "bits": {}, + "grid_x": 20, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y62": { + "bits": {}, + "grid_x": 20, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y63": { + "bits": {}, + "grid_x": 20, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y64": { + "bits": {}, + "grid_x": 20, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y65": { + "bits": {}, + "grid_x": 20, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y66": { + "bits": {}, + "grid_x": 20, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y67": { + "bits": {}, + "grid_x": 20, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y68": { + "bits": {}, + "grid_x": 20, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y69": { + "bits": {}, + "grid_x": 20, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y70": { + "bits": {}, + "grid_x": 20, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y71": { + "bits": {}, + "grid_x": 20, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y72": { + "bits": {}, + "grid_x": 20, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y73": { + "bits": {}, + "grid_x": 20, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y74": { + "bits": {}, + "grid_x": 20, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y75": { + "bits": {}, + "grid_x": 20, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y76": { + "bits": {}, + "grid_x": 20, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y77": { + "bits": {}, + "grid_x": 20, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y78": { + "bits": {}, + "grid_x": 20, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y79": { + "bits": {}, + "grid_x": 20, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y80": { + "bits": {}, + "grid_x": 20, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y81": { + "bits": {}, + "grid_x": 20, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y82": { + "bits": {}, + "grid_x": 20, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y83": { + "bits": {}, + "grid_x": 20, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y84": { + "bits": {}, + "grid_x": 20, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y85": { + "bits": {}, + "grid_x": 20, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y86": { + "bits": {}, + "grid_x": 20, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y87": { + "bits": {}, + "grid_x": 20, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y88": { + "bits": {}, + "grid_x": 20, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y89": { + "bits": {}, + "grid_x": 20, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y90": { + "bits": {}, + "grid_x": 20, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y91": { + "bits": {}, + "grid_x": 20, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y92": { + "bits": {}, + "grid_x": 20, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y93": { + "bits": {}, + "grid_x": 20, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y94": { + "bits": {}, + "grid_x": 20, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y95": { + "bits": {}, + "grid_x": 20, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y96": { + "bits": {}, + "grid_x": 20, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y97": { + "bits": {}, + "grid_x": 20, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y98": { + "bits": {}, + "grid_x": 20, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y99": { + "bits": {}, + "grid_x": 20, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y100": { + "bits": {}, + "grid_x": 20, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y101": { + "bits": {}, + "grid_x": 20, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y102": { + "bits": {}, + "grid_x": 20, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y103": { + "bits": {}, + "grid_x": 20, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y104": { + "bits": {}, + "grid_x": 20, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y105": { + "bits": {}, + "grid_x": 20, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y106": { + "bits": {}, + "grid_x": 20, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y107": { + "bits": {}, + "grid_x": 20, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y108": { + "bits": {}, + "grid_x": 20, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y109": { + "bits": {}, + "grid_x": 20, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y110": { + "bits": {}, + "grid_x": 20, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y111": { + "bits": {}, + "grid_x": 20, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y112": { + "bits": {}, + "grid_x": 20, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y113": { + "bits": {}, + "grid_x": 20, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y114": { + "bits": {}, + "grid_x": 20, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y115": { + "bits": {}, + "grid_x": 20, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y116": { + "bits": {}, + "grid_x": 20, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y117": { + "bits": {}, + "grid_x": 20, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y118": { + "bits": {}, + "grid_x": 20, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y119": { + "bits": {}, + "grid_x": 20, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y120": { + "bits": {}, + "grid_x": 20, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y121": { + "bits": {}, + "grid_x": 20, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y122": { + "bits": {}, + "grid_x": 20, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y123": { + "bits": {}, + "grid_x": 20, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y124": { + "bits": {}, + "grid_x": 20, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y125": { + "bits": {}, + "grid_x": 20, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y126": { + "bits": {}, + "grid_x": 20, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y127": { + "bits": {}, + "grid_x": 20, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y128": { + "bits": {}, + "grid_x": 20, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y129": { + "bits": {}, + "grid_x": 20, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y130": { + "bits": {}, + "grid_x": 20, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y131": { + "bits": {}, + "grid_x": 20, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y132": { + "bits": {}, + "grid_x": 20, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y133": { + "bits": {}, + "grid_x": 20, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y134": { + "bits": {}, + "grid_x": 20, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y135": { + "bits": {}, + "grid_x": 20, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y136": { + "bits": {}, + "grid_x": 20, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y137": { + "bits": {}, + "grid_x": 20, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y138": { + "bits": {}, + "grid_x": 20, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y139": { + "bits": {}, + "grid_x": 20, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y140": { + "bits": {}, + "grid_x": 20, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y141": { + "bits": {}, + "grid_x": 20, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y142": { + "bits": {}, + "grid_x": 20, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y143": { + "bits": {}, + "grid_x": 20, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y144": { + "bits": {}, + "grid_x": 20, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y145": { + "bits": {}, + "grid_x": 20, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y146": { + "bits": {}, + "grid_x": 20, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y147": { + "bits": {}, + "grid_x": 20, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y148": { + "bits": {}, + "grid_x": 20, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X6Y149": { + "bits": {}, + "grid_x": 20, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y0": { + "bits": {}, + "grid_x": 76, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y1": { + "bits": {}, + "grid_x": 76, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y2": { + "bits": {}, + "grid_x": 76, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y3": { + "bits": {}, + "grid_x": 76, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y4": { + "bits": {}, + "grid_x": 76, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y5": { + "bits": {}, + "grid_x": 76, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y6": { + "bits": {}, + "grid_x": 76, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y7": { + "bits": {}, + "grid_x": 76, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y8": { + "bits": {}, + "grid_x": 76, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y9": { + "bits": {}, + "grid_x": 76, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y10": { + "bits": {}, + "grid_x": 76, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y11": { + "bits": {}, + "grid_x": 76, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y12": { + "bits": {}, + "grid_x": 76, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y13": { + "bits": {}, + "grid_x": 76, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y14": { + "bits": {}, + "grid_x": 76, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y15": { + "bits": {}, + "grid_x": 76, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y16": { + "bits": {}, + "grid_x": 76, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y17": { + "bits": {}, + "grid_x": 76, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y18": { + "bits": {}, + "grid_x": 76, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y19": { + "bits": {}, + "grid_x": 76, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y20": { + "bits": {}, + "grid_x": 76, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y21": { + "bits": {}, + "grid_x": 76, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y22": { + "bits": {}, + "grid_x": 76, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y23": { + "bits": {}, + "grid_x": 76, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y24": { + "bits": {}, + "grid_x": 76, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y25": { + "bits": {}, + "grid_x": 76, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y26": { + "bits": {}, + "grid_x": 76, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y27": { + "bits": {}, + "grid_x": 76, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y28": { + "bits": {}, + "grid_x": 76, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y29": { + "bits": {}, + "grid_x": 76, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y30": { + "bits": {}, + "grid_x": 76, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y31": { + "bits": {}, + "grid_x": 76, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y32": { + "bits": {}, + "grid_x": 76, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y33": { + "bits": {}, + "grid_x": 76, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y34": { + "bits": {}, + "grid_x": 76, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y35": { + "bits": {}, + "grid_x": 76, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y36": { + "bits": {}, + "grid_x": 76, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y37": { + "bits": {}, + "grid_x": 76, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y38": { + "bits": {}, + "grid_x": 76, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y39": { + "bits": {}, + "grid_x": 76, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y40": { + "bits": {}, + "grid_x": 76, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y41": { + "bits": {}, + "grid_x": 76, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y42": { + "bits": {}, + "grid_x": 76, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y43": { + "bits": {}, + "grid_x": 76, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y44": { + "bits": {}, + "grid_x": 76, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y45": { + "bits": {}, + "grid_x": 76, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y46": { + "bits": {}, + "grid_x": 76, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y47": { + "bits": {}, + "grid_x": 76, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y48": { + "bits": {}, + "grid_x": 76, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y49": { + "bits": {}, + "grid_x": 76, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y50": { + "bits": {}, + "grid_x": 76, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y51": { + "bits": {}, + "grid_x": 76, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y52": { + "bits": {}, + "grid_x": 76, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y53": { + "bits": {}, + "grid_x": 76, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y54": { + "bits": {}, + "grid_x": 76, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y55": { + "bits": {}, + "grid_x": 76, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y56": { + "bits": {}, + "grid_x": 76, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y57": { + "bits": {}, + "grid_x": 76, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y58": { + "bits": {}, + "grid_x": 76, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y59": { + "bits": {}, + "grid_x": 76, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y60": { + "bits": {}, + "grid_x": 76, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y61": { + "bits": {}, + "grid_x": 76, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y62": { + "bits": {}, + "grid_x": 76, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y63": { + "bits": {}, + "grid_x": 76, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y64": { + "bits": {}, + "grid_x": 76, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y65": { + "bits": {}, + "grid_x": 76, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y66": { + "bits": {}, + "grid_x": 76, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y67": { + "bits": {}, + "grid_x": 76, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y68": { + "bits": {}, + "grid_x": 76, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y69": { + "bits": {}, + "grid_x": 76, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y70": { + "bits": {}, + "grid_x": 76, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y71": { + "bits": {}, + "grid_x": 76, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y72": { + "bits": {}, + "grid_x": 76, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y73": { + "bits": {}, + "grid_x": 76, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y74": { + "bits": {}, + "grid_x": 76, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y75": { + "bits": {}, + "grid_x": 76, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y76": { + "bits": {}, + "grid_x": 76, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y77": { + "bits": {}, + "grid_x": 76, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y78": { + "bits": {}, + "grid_x": 76, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y79": { + "bits": {}, + "grid_x": 76, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y80": { + "bits": {}, + "grid_x": 76, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y81": { + "bits": {}, + "grid_x": 76, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y82": { + "bits": {}, + "grid_x": 76, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y83": { + "bits": {}, + "grid_x": 76, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y84": { + "bits": {}, + "grid_x": 76, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y85": { + "bits": {}, + "grid_x": 76, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y86": { + "bits": {}, + "grid_x": 76, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y87": { + "bits": {}, + "grid_x": 76, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y88": { + "bits": {}, + "grid_x": 76, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y89": { + "bits": {}, + "grid_x": 76, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y90": { + "bits": {}, + "grid_x": 76, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y91": { + "bits": {}, + "grid_x": 76, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y92": { + "bits": {}, + "grid_x": 76, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y93": { + "bits": {}, + "grid_x": 76, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y94": { + "bits": {}, + "grid_x": 76, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y95": { + "bits": {}, + "grid_x": 76, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y96": { + "bits": {}, + "grid_x": 76, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y97": { + "bits": {}, + "grid_x": 76, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y98": { + "bits": {}, + "grid_x": 76, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y99": { + "bits": {}, + "grid_x": 76, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y125": { + "bits": {}, + "grid_x": 76, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y126": { + "bits": {}, + "grid_x": 76, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y127": { + "bits": {}, + "grid_x": 76, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y128": { + "bits": {}, + "grid_x": 76, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y129": { + "bits": {}, + "grid_x": 76, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y130": { + "bits": {}, + "grid_x": 76, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y131": { + "bits": {}, + "grid_x": 76, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y132": { + "bits": {}, + "grid_x": 76, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y133": { + "bits": {}, + "grid_x": 76, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y134": { + "bits": {}, + "grid_x": 76, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y135": { + "bits": {}, + "grid_x": 76, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y136": { + "bits": {}, + "grid_x": 76, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y137": { + "bits": {}, + "grid_x": 76, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y138": { + "bits": {}, + "grid_x": 76, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y139": { + "bits": {}, + "grid_x": 76, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y140": { + "bits": {}, + "grid_x": 76, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y141": { + "bits": {}, + "grid_x": 76, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y142": { + "bits": {}, + "grid_x": 76, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y143": { + "bits": {}, + "grid_x": 76, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y144": { + "bits": {}, + "grid_x": 76, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y145": { + "bits": {}, + "grid_x": 76, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y146": { + "bits": {}, + "grid_x": 76, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y147": { + "bits": {}, + "grid_x": 76, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y148": { + "bits": {}, + "grid_x": 76, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_L_X30Y149": { + "bits": {}, + "grid_x": 76, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_L" + }, + "BRAM_INT_INTERFACE_R_X37Y0": { + "bits": {}, + "grid_x": 94, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y1": { + "bits": {}, + "grid_x": 94, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y2": { + "bits": {}, + "grid_x": 94, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y3": { + "bits": {}, + "grid_x": 94, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y4": { + "bits": {}, + "grid_x": 94, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y5": { + "bits": {}, + "grid_x": 94, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y6": { + "bits": {}, + "grid_x": 94, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y7": { + "bits": {}, + "grid_x": 94, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y8": { + "bits": {}, + "grid_x": 94, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y9": { + "bits": {}, + "grid_x": 94, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y10": { + "bits": {}, + "grid_x": 94, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y11": { + "bits": {}, + "grid_x": 94, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y12": { + "bits": {}, + "grid_x": 94, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y13": { + "bits": {}, + "grid_x": 94, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y14": { + "bits": {}, + "grid_x": 94, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y15": { + "bits": {}, + "grid_x": 94, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y16": { + "bits": {}, + "grid_x": 94, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y17": { + "bits": {}, + "grid_x": 94, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y18": { + "bits": {}, + "grid_x": 94, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y19": { + "bits": {}, + "grid_x": 94, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y20": { + "bits": {}, + "grid_x": 94, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y21": { + "bits": {}, + "grid_x": 94, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y22": { + "bits": {}, + "grid_x": 94, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y23": { + "bits": {}, + "grid_x": 94, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y24": { + "bits": {}, + "grid_x": 94, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y25": { + "bits": {}, + "grid_x": 94, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y26": { + "bits": {}, + "grid_x": 94, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y27": { + "bits": {}, + "grid_x": 94, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y28": { + "bits": {}, + "grid_x": 94, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y29": { + "bits": {}, + "grid_x": 94, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y30": { + "bits": {}, + "grid_x": 94, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y31": { + "bits": {}, + "grid_x": 94, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y32": { + "bits": {}, + "grid_x": 94, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y33": { + "bits": {}, + "grid_x": 94, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y34": { + "bits": {}, + "grid_x": 94, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y35": { + "bits": {}, + "grid_x": 94, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y36": { + "bits": {}, + "grid_x": 94, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y37": { + "bits": {}, + "grid_x": 94, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y38": { + "bits": {}, + "grid_x": 94, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y39": { + "bits": {}, + "grid_x": 94, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y40": { + "bits": {}, + "grid_x": 94, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y41": { + "bits": {}, + "grid_x": 94, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y42": { + "bits": {}, + "grid_x": 94, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y43": { + "bits": {}, + "grid_x": 94, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y44": { + "bits": {}, + "grid_x": 94, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y45": { + "bits": {}, + "grid_x": 94, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y46": { + "bits": {}, + "grid_x": 94, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y47": { + "bits": {}, + "grid_x": 94, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y48": { + "bits": {}, + "grid_x": 94, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y49": { + "bits": {}, + "grid_x": 94, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y50": { + "bits": {}, + "grid_x": 94, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y51": { + "bits": {}, + "grid_x": 94, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y52": { + "bits": {}, + "grid_x": 94, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y53": { + "bits": {}, + "grid_x": 94, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y54": { + "bits": {}, + "grid_x": 94, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y55": { + "bits": {}, + "grid_x": 94, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y56": { + "bits": {}, + "grid_x": 94, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y57": { + "bits": {}, + "grid_x": 94, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y58": { + "bits": {}, + "grid_x": 94, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y59": { + "bits": {}, + "grid_x": 94, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y60": { + "bits": {}, + "grid_x": 94, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y61": { + "bits": {}, + "grid_x": 94, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y62": { + "bits": {}, + "grid_x": 94, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y63": { + "bits": {}, + "grid_x": 94, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y64": { + "bits": {}, + "grid_x": 94, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y65": { + "bits": {}, + "grid_x": 94, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y66": { + "bits": {}, + "grid_x": 94, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y67": { + "bits": {}, + "grid_x": 94, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y68": { + "bits": {}, + "grid_x": 94, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y69": { + "bits": {}, + "grid_x": 94, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y70": { + "bits": {}, + "grid_x": 94, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y71": { + "bits": {}, + "grid_x": 94, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y72": { + "bits": {}, + "grid_x": 94, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y73": { + "bits": {}, + "grid_x": 94, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y74": { + "bits": {}, + "grid_x": 94, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y75": { + "bits": {}, + "grid_x": 94, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y76": { + "bits": {}, + "grid_x": 94, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y77": { + "bits": {}, + "grid_x": 94, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y78": { + "bits": {}, + "grid_x": 94, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y79": { + "bits": {}, + "grid_x": 94, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y80": { + "bits": {}, + "grid_x": 94, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y81": { + "bits": {}, + "grid_x": 94, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y82": { + "bits": {}, + "grid_x": 94, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y83": { + "bits": {}, + "grid_x": 94, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y84": { + "bits": {}, + "grid_x": 94, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y85": { + "bits": {}, + "grid_x": 94, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y86": { + "bits": {}, + "grid_x": 94, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y87": { + "bits": {}, + "grid_x": 94, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y88": { + "bits": {}, + "grid_x": 94, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y89": { + "bits": {}, + "grid_x": 94, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y90": { + "bits": {}, + "grid_x": 94, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y91": { + "bits": {}, + "grid_x": 94, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y92": { + "bits": {}, + "grid_x": 94, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y93": { + "bits": {}, + "grid_x": 94, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y94": { + "bits": {}, + "grid_x": 94, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y95": { + "bits": {}, + "grid_x": 94, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y96": { + "bits": {}, + "grid_x": 94, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y97": { + "bits": {}, + "grid_x": 94, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y98": { + "bits": {}, + "grid_x": 94, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_INT_INTERFACE_R_X37Y99": { + "bits": {}, + "grid_x": 94, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "BRAM_INT_INTERFACE_R" + }, + "BRAM_L_X6Y0": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y0": "FIFO18E1", + "RAMB18_X0Y1": "RAMB18E1", + "RAMB36_X0Y0": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y5": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y2": "FIFO18E1", + "RAMB18_X0Y3": "RAMB18E1", + "RAMB36_X0Y1": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y10": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y4": "FIFO18E1", + "RAMB18_X0Y5": "RAMB18E1", + "RAMB36_X0Y2": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y15": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y6": "FIFO18E1", + "RAMB18_X0Y7": "RAMB18E1", + "RAMB36_X0Y3": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y20": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y8": "FIFO18E1", + "RAMB18_X0Y9": "RAMB18E1", + "RAMB36_X0Y4": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y25": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y10": "FIFO18E1", + "RAMB18_X0Y11": "RAMB18E1", + "RAMB36_X0Y5": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y30": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y12": "FIFO18E1", + "RAMB18_X0Y13": "RAMB18E1", + "RAMB36_X0Y6": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y35": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y14": "FIFO18E1", + "RAMB18_X0Y15": "RAMB18E1", + "RAMB36_X0Y7": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y40": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y16": "FIFO18E1", + "RAMB18_X0Y17": "RAMB18E1", + "RAMB36_X0Y8": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y45": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00000", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 19, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y18": "FIFO18E1", + "RAMB18_X0Y19": "RAMB18E1", + "RAMB36_X0Y9": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y50": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y20": "FIFO18E1", + "RAMB18_X0Y21": "RAMB18E1", + "RAMB36_X0Y10": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y55": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y22": "FIFO18E1", + "RAMB18_X0Y23": "RAMB18E1", + "RAMB36_X0Y11": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y60": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y24": "FIFO18E1", + "RAMB18_X0Y25": "RAMB18E1", + "RAMB36_X0Y12": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y65": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y26": "FIFO18E1", + "RAMB18_X0Y27": "RAMB18E1", + "RAMB36_X0Y13": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y70": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y28": "FIFO18E1", + "RAMB18_X0Y29": "RAMB18E1", + "RAMB36_X0Y14": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y75": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y30": "FIFO18E1", + "RAMB18_X0Y31": "RAMB18E1", + "RAMB36_X0Y15": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y80": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y32": "FIFO18E1", + "RAMB18_X0Y33": "RAMB18E1", + "RAMB36_X0Y16": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y85": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y34": "FIFO18E1", + "RAMB18_X0Y35": "RAMB18E1", + "RAMB36_X0Y17": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y90": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y36": "FIFO18E1", + "RAMB18_X0Y37": "RAMB18E1", + "RAMB36_X0Y18": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y95": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800000", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 19, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y38": "FIFO18E1", + "RAMB18_X0Y39": "RAMB18E1", + "RAMB36_X0Y19": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y100": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y40": "FIFO18E1", + "RAMB18_X0Y41": "RAMB18E1", + "RAMB36_X0Y20": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y105": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y42": "FIFO18E1", + "RAMB18_X0Y43": "RAMB18E1", + "RAMB36_X0Y21": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y110": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y44": "FIFO18E1", + "RAMB18_X0Y45": "RAMB18E1", + "RAMB36_X0Y22": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y115": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y46": "FIFO18E1", + "RAMB18_X0Y47": "RAMB18E1", + "RAMB36_X0Y23": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y120": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y48": "FIFO18E1", + "RAMB18_X0Y49": "RAMB18E1", + "RAMB36_X0Y24": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y125": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y50": "FIFO18E1", + "RAMB18_X0Y51": "RAMB18E1", + "RAMB36_X0Y25": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y130": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y52": "FIFO18E1", + "RAMB18_X0Y53": "RAMB18E1", + "RAMB36_X0Y26": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y135": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y54": "FIFO18E1", + "RAMB18_X0Y55": "RAMB18E1", + "RAMB36_X0Y27": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y140": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y56": "FIFO18E1", + "RAMB18_X0Y57": "RAMB18E1", + "RAMB36_X0Y28": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X6Y145": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820000", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 19, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "RAMB18_X0Y58": "FIFO18E1", + "RAMB18_X0Y59": "RAMB18E1", + "RAMB36_X0Y29": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y0": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y0": "FIFO18E1", + "RAMB18_X1Y1": "RAMB18E1", + "RAMB36_X1Y0": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y5": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y2": "FIFO18E1", + "RAMB18_X1Y3": "RAMB18E1", + "RAMB36_X1Y1": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y10": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y4": "FIFO18E1", + "RAMB18_X1Y5": "RAMB18E1", + "RAMB36_X1Y2": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y15": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y6": "FIFO18E1", + "RAMB18_X1Y7": "RAMB18E1", + "RAMB36_X1Y3": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y20": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y8": "FIFO18E1", + "RAMB18_X1Y9": "RAMB18E1", + "RAMB36_X1Y4": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y25": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y10": "FIFO18E1", + "RAMB18_X1Y11": "RAMB18E1", + "RAMB36_X1Y5": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y30": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y12": "FIFO18E1", + "RAMB18_X1Y13": "RAMB18E1", + "RAMB36_X1Y6": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y35": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y14": "FIFO18E1", + "RAMB18_X1Y15": "RAMB18E1", + "RAMB36_X1Y7": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y40": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y16": "FIFO18E1", + "RAMB18_X1Y17": "RAMB18E1", + "RAMB36_X1Y8": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y45": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00080", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 75, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y18": "FIFO18E1", + "RAMB18_X1Y19": "RAMB18E1", + "RAMB36_X1Y9": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y50": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y20": "FIFO18E1", + "RAMB18_X1Y21": "RAMB18E1", + "RAMB36_X1Y10": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y55": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y22": "FIFO18E1", + "RAMB18_X1Y23": "RAMB18E1", + "RAMB36_X1Y11": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y60": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y24": "FIFO18E1", + "RAMB18_X1Y25": "RAMB18E1", + "RAMB36_X1Y12": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y65": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y26": "FIFO18E1", + "RAMB18_X1Y27": "RAMB18E1", + "RAMB36_X1Y13": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y70": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y28": "FIFO18E1", + "RAMB18_X1Y29": "RAMB18E1", + "RAMB36_X1Y14": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y75": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y30": "FIFO18E1", + "RAMB18_X1Y31": "RAMB18E1", + "RAMB36_X1Y15": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y80": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y32": "FIFO18E1", + "RAMB18_X1Y33": "RAMB18E1", + "RAMB36_X1Y16": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y85": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y34": "FIFO18E1", + "RAMB18_X1Y35": "RAMB18E1", + "RAMB36_X1Y17": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y90": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y36": "FIFO18E1", + "RAMB18_X1Y37": "RAMB18E1", + "RAMB36_X1Y18": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y95": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800080", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 75, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y38": "FIFO18E1", + "RAMB18_X1Y39": "RAMB18E1", + "RAMB36_X1Y19": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y125": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820080", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 75, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y50": "FIFO18E1", + "RAMB18_X1Y51": "RAMB18E1", + "RAMB36_X1Y25": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y130": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820080", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 75, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y52": "FIFO18E1", + "RAMB18_X1Y53": "RAMB18E1", + "RAMB36_X1Y26": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y135": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820080", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 75, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y54": "FIFO18E1", + "RAMB18_X1Y55": "RAMB18E1", + "RAMB36_X1Y27": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y140": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820080", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 75, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y56": "FIFO18E1", + "RAMB18_X1Y57": "RAMB18E1", + "RAMB36_X1Y28": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_L_X30Y145": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00820080", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 75, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "RAMB18_X1Y58": "FIFO18E1", + "RAMB18_X1Y59": "RAMB18E1", + "RAMB36_X1Y29": "RAMBFIFO36E1" + }, + "type": "BRAM_L" + }, + "BRAM_R_X37Y0": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y0": "FIFO18E1", + "RAMB18_X2Y1": "RAMB18E1", + "RAMB36_X2Y0": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y5": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y2": "FIFO18E1", + "RAMB18_X2Y3": "RAMB18E1", + "RAMB36_X2Y1": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y10": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y4": "FIFO18E1", + "RAMB18_X2Y5": "RAMB18E1", + "RAMB36_X2Y2": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y15": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y6": "FIFO18E1", + "RAMB18_X2Y7": "RAMB18E1", + "RAMB36_X2Y3": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y20": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y8": "FIFO18E1", + "RAMB18_X2Y9": "RAMB18E1", + "RAMB36_X2Y4": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y25": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y10": "FIFO18E1", + "RAMB18_X2Y11": "RAMB18E1", + "RAMB36_X2Y5": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y30": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y12": "FIFO18E1", + "RAMB18_X2Y13": "RAMB18E1", + "RAMB36_X2Y6": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y35": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y14": "FIFO18E1", + "RAMB18_X2Y15": "RAMB18E1", + "RAMB36_X2Y7": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y40": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y16": "FIFO18E1", + "RAMB18_X2Y17": "RAMB18E1", + "RAMB36_X2Y8": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y45": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00C00100", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 95, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y18": "FIFO18E1", + "RAMB18_X2Y19": "RAMB18E1", + "RAMB36_X2Y9": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y50": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 0, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y20": "FIFO18E1", + "RAMB18_X2Y21": "RAMB18E1", + "RAMB36_X2Y10": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y55": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 10, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y22": "FIFO18E1", + "RAMB18_X2Y23": "RAMB18E1", + "RAMB36_X2Y11": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y60": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 20, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y24": "FIFO18E1", + "RAMB18_X2Y25": "RAMB18E1", + "RAMB36_X2Y12": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y65": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 30, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y26": "FIFO18E1", + "RAMB18_X2Y27": "RAMB18E1", + "RAMB36_X2Y13": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y70": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 40, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y28": "FIFO18E1", + "RAMB18_X2Y29": "RAMB18E1", + "RAMB36_X2Y14": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y75": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 51, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y30": "FIFO18E1", + "RAMB18_X2Y31": "RAMB18E1", + "RAMB36_X2Y15": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y80": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 61, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y32": "FIFO18E1", + "RAMB18_X2Y33": "RAMB18E1", + "RAMB36_X2Y16": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y85": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 71, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y34": "FIFO18E1", + "RAMB18_X2Y35": "RAMB18E1", + "RAMB36_X2Y17": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y90": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 81, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y36": "FIFO18E1", + "RAMB18_X2Y37": "RAMB18E1", + "RAMB36_X2Y18": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRAM_R_X37Y95": { + "bits": { + "BLOCK_RAM": { + "baseaddr": "0x00800100", + "frames": 128, + "offset": 91, + "words": 10 + }, + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 95, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "RAMB18_X2Y38": "FIFO18E1", + "RAMB18_X2Y39": "RAMB18E1", + "RAMB36_X2Y19": "RAMBFIFO36E1" + }, + "type": "BRAM_R" + }, + "BRKH_BRAM_X19Y52": { + "bits": {}, + "grid_x": 19, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_BRAM" + }, + "BRKH_BRAM_X19Y104": { + "bits": {}, + "grid_x": 19, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_BRAM" + }, + "BRKH_BRAM_X75Y52": { + "bits": {}, + "grid_x": 75, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_BRAM" + }, + "BRKH_BRAM_X95Y52": { + "bits": {}, + "grid_x": 95, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_BRAM" + }, + "BRKH_B_TERM_INT_X36Y104": { + "bits": {}, + "grid_x": 36, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_B_TERM_INT" + }, + "BRKH_B_TERM_INT_X37Y104": { + "bits": {}, + "grid_x": 37, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_B_TERM_INT" + }, + "BRKH_B_TERM_INT_X40Y104": { + "bits": {}, + "grid_x": 40, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_B_TERM_INT" + }, + "BRKH_B_TERM_INT_X41Y104": { + "bits": {}, + "grid_x": 41, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_B_TERM_INT" + }, + "BRKH_B_TERM_INT_X44Y104": { + "bits": {}, + "grid_x": 44, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_B_TERM_INT" + }, + "BRKH_B_TERM_INT_X45Y104": { + "bits": {}, + "grid_x": 45, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_B_TERM_INT" + }, + "BRKH_CLB_X2Y49": { + "bits": {}, + "grid_x": 10, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X2Y99": { + "bits": {}, + "grid_x": 10, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X3Y49": { + "bits": {}, + "grid_x": 13, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X3Y99": { + "bits": {}, + "grid_x": 13, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X4Y49": { + "bits": {}, + "grid_x": 14, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X4Y99": { + "bits": {}, + "grid_x": 14, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X5Y49": { + "bits": {}, + "grid_x": 17, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X5Y99": { + "bits": {}, + "grid_x": 17, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X7Y49": { + "bits": {}, + "grid_x": 23, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X7Y99": { + "bits": {}, + "grid_x": 23, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X8Y49": { + "bits": {}, + "grid_x": 24, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X8Y99": { + "bits": {}, + "grid_x": 24, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X10Y49": { + "bits": {}, + "grid_x": 30, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X10Y99": { + "bits": {}, + "grid_x": 30, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X11Y49": { + "bits": {}, + "grid_x": 33, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X11Y99": { + "bits": {}, + "grid_x": 33, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X19Y49": { + "bits": {}, + "grid_x": 51, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X19Y99": { + "bits": {}, + "grid_x": 51, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X20Y49": { + "bits": {}, + "grid_x": 52, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X20Y99": { + "bits": {}, + "grid_x": 52, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X21Y49": { + "bits": {}, + "grid_x": 55, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X21Y99": { + "bits": {}, + "grid_x": 55, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X22Y49": { + "bits": {}, + "grid_x": 56, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X22Y99": { + "bits": {}, + "grid_x": 56, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X24Y49": { + "bits": {}, + "grid_x": 62, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X24Y99": { + "bits": {}, + "grid_x": 62, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X25Y49": { + "bits": {}, + "grid_x": 65, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X25Y99": { + "bits": {}, + "grid_x": 65, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X26Y49": { + "bits": {}, + "grid_x": 67, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X26Y99": { + "bits": {}, + "grid_x": 67, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X27Y49": { + "bits": {}, + "grid_x": 70, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X28Y49": { + "bits": {}, + "grid_x": 71, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X29Y49": { + "bits": {}, + "grid_x": 74, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X31Y49": { + "bits": {}, + "grid_x": 79, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X31Y99": { + "bits": {}, + "grid_x": 79, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X32Y49": { + "bits": {}, + "grid_x": 81, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X32Y99": { + "bits": {}, + "grid_x": 81, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X33Y49": { + "bits": {}, + "grid_x": 84, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X33Y99": { + "bits": {}, + "grid_x": 84, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X35Y49": { + "bits": {}, + "grid_x": 90, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X35Y99": { + "bits": {}, + "grid_x": 90, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X36Y49": { + "bits": {}, + "grid_x": 91, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X36Y99": { + "bits": {}, + "grid_x": 91, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X38Y49": { + "bits": {}, + "grid_x": 97, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X39Y49": { + "bits": {}, + "grid_x": 100, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X40Y49": { + "bits": {}, + "grid_x": 101, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLB_X41Y49": { + "bits": {}, + "grid_x": 104, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLB" + }, + "BRKH_CLK_X60Y52": { + "bits": {}, + "grid_x": 60, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLK" + }, + "BRKH_CLK_X60Y104": { + "bits": {}, + "grid_x": 60, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CLK" + }, + "BRKH_CMT_X8Y52": { + "bits": {}, + "grid_x": 8, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CMT" + }, + "BRKH_CMT_X8Y104": { + "bits": {}, + "grid_x": 8, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CMT" + }, + "BRKH_CMT_X106Y52": { + "bits": {}, + "grid_x": 106, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_CMT" + }, + "BRKH_DSP_L_X86Y52": { + "bits": {}, + "grid_x": 86, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_DSP_L" + }, + "BRKH_DSP_L_X86Y104": { + "bits": {}, + "grid_x": 86, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_DSP_L" + }, + "BRKH_DSP_R_X28Y52": { + "bits": {}, + "grid_x": 28, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_DSP_R" + }, + "BRKH_DSP_R_X28Y104": { + "bits": {}, + "grid_x": 28, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_DSP_R" + }, + "BRKH_GTX_X38Y99": { + "bits": {}, + "grid_x": 97, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_GTX" + }, + "BRKH_INT_X0Y49": { + "bits": {}, + "grid_x": 4, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X0Y99": { + "bits": {}, + "grid_x": 4, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X1Y49": { + "bits": {}, + "grid_x": 5, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X1Y99": { + "bits": {}, + "grid_x": 5, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X2Y49": { + "bits": {}, + "grid_x": 11, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X2Y99": { + "bits": {}, + "grid_x": 11, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X3Y49": { + "bits": {}, + "grid_x": 12, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X3Y99": { + "bits": {}, + "grid_x": 12, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X4Y49": { + "bits": {}, + "grid_x": 15, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X4Y99": { + "bits": {}, + "grid_x": 15, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X5Y49": { + "bits": {}, + "grid_x": 16, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X5Y99": { + "bits": {}, + "grid_x": 16, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X6Y49": { + "bits": {}, + "grid_x": 21, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X6Y99": { + "bits": {}, + "grid_x": 21, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X7Y49": { + "bits": {}, + "grid_x": 22, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X7Y99": { + "bits": {}, + "grid_x": 22, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X8Y49": { + "bits": {}, + "grid_x": 25, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X8Y99": { + "bits": {}, + "grid_x": 25, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X9Y49": { + "bits": {}, + "grid_x": 26, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X9Y99": { + "bits": {}, + "grid_x": 26, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X10Y49": { + "bits": {}, + "grid_x": 31, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X10Y99": { + "bits": {}, + "grid_x": 31, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X11Y49": { + "bits": {}, + "grid_x": 32, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X11Y99": { + "bits": {}, + "grid_x": 32, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X18Y49": { + "bits": {}, + "grid_x": 49, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X18Y99": { + "bits": {}, + "grid_x": 49, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X19Y49": { + "bits": {}, + "grid_x": 50, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X19Y99": { + "bits": {}, + "grid_x": 50, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X20Y49": { + "bits": {}, + "grid_x": 53, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X20Y99": { + "bits": {}, + "grid_x": 53, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X21Y49": { + "bits": {}, + "grid_x": 54, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X21Y99": { + "bits": {}, + "grid_x": 54, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X22Y49": { + "bits": {}, + "grid_x": 57, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X22Y99": { + "bits": {}, + "grid_x": 57, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X23Y49": { + "bits": {}, + "grid_x": 58, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X23Y99": { + "bits": {}, + "grid_x": 58, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X24Y49": { + "bits": {}, + "grid_x": 63, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X24Y99": { + "bits": {}, + "grid_x": 63, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X25Y49": { + "bits": {}, + "grid_x": 64, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X25Y99": { + "bits": {}, + "grid_x": 64, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X26Y49": { + "bits": {}, + "grid_x": 68, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X26Y99": { + "bits": {}, + "grid_x": 68, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X27Y49": { + "bits": {}, + "grid_x": 69, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X27Y99": { + "bits": {}, + "grid_x": 69, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X28Y49": { + "bits": {}, + "grid_x": 72, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X29Y49": { + "bits": {}, + "grid_x": 73, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X30Y49": { + "bits": {}, + "grid_x": 77, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X30Y99": { + "bits": {}, + "grid_x": 77, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X31Y49": { + "bits": {}, + "grid_x": 78, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X31Y99": { + "bits": {}, + "grid_x": 78, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X32Y49": { + "bits": {}, + "grid_x": 82, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X32Y99": { + "bits": {}, + "grid_x": 82, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X33Y49": { + "bits": {}, + "grid_x": 83, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X33Y99": { + "bits": {}, + "grid_x": 83, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X34Y49": { + "bits": {}, + "grid_x": 88, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X34Y99": { + "bits": {}, + "grid_x": 88, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X35Y49": { + "bits": {}, + "grid_x": 89, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X35Y99": { + "bits": {}, + "grid_x": 89, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X36Y49": { + "bits": {}, + "grid_x": 92, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X36Y99": { + "bits": {}, + "grid_x": 92, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X37Y49": { + "bits": {}, + "grid_x": 93, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X37Y99": { + "bits": {}, + "grid_x": 93, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X38Y49": { + "bits": {}, + "grid_x": 98, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X39Y49": { + "bits": {}, + "grid_x": 99, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X40Y49": { + "bits": {}, + "grid_x": 102, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X41Y49": { + "bits": {}, + "grid_x": 103, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X42Y49": { + "bits": {}, + "grid_x": 109, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_INT_X43Y49": { + "bits": {}, + "grid_x": 110, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_INT" + }, + "BRKH_TERM_INT_X28Y99": { + "bits": {}, + "grid_x": 72, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X29Y99": { + "bits": {}, + "grid_x": 73, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X38Y99": { + "bits": {}, + "grid_x": 98, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X39Y99": { + "bits": {}, + "grid_x": 99, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X40Y99": { + "bits": {}, + "grid_x": 102, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X41Y99": { + "bits": {}, + "grid_x": 103, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X42Y99": { + "bits": {}, + "grid_x": 109, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "BRKH_TERM_INT_X43Y99": { + "bits": {}, + "grid_x": 110, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "BRKH_TERM_INT" + }, + "B_TERM_INT_X4Y0": { + "bits": {}, + "grid_x": 4, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X5Y0": { + "bits": {}, + "grid_x": 5, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X11Y0": { + "bits": {}, + "grid_x": 11, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X12Y0": { + "bits": {}, + "grid_x": 12, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X15Y0": { + "bits": {}, + "grid_x": 15, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X16Y0": { + "bits": {}, + "grid_x": 16, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X21Y0": { + "bits": {}, + "grid_x": 21, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X22Y0": { + "bits": {}, + "grid_x": 22, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X25Y0": { + "bits": {}, + "grid_x": 25, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X26Y0": { + "bits": {}, + "grid_x": 26, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X31Y0": { + "bits": {}, + "grid_x": 31, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X32Y0": { + "bits": {}, + "grid_x": 32, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X49Y0": { + "bits": {}, + "grid_x": 49, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X50Y0": { + "bits": {}, + "grid_x": 50, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X53Y0": { + "bits": {}, + "grid_x": 53, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X54Y0": { + "bits": {}, + "grid_x": 54, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X57Y0": { + "bits": {}, + "grid_x": 57, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X58Y0": { + "bits": {}, + "grid_x": 58, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X63Y0": { + "bits": {}, + "grid_x": 63, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X64Y0": { + "bits": {}, + "grid_x": 64, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X68Y0": { + "bits": {}, + "grid_x": 68, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X69Y0": { + "bits": {}, + "grid_x": 69, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X72Y0": { + "bits": {}, + "grid_x": 72, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X73Y0": { + "bits": {}, + "grid_x": 73, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X77Y0": { + "bits": {}, + "grid_x": 77, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X78Y0": { + "bits": {}, + "grid_x": 78, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X82Y0": { + "bits": {}, + "grid_x": 82, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X83Y0": { + "bits": {}, + "grid_x": 83, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X88Y0": { + "bits": {}, + "grid_x": 88, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X89Y0": { + "bits": {}, + "grid_x": 89, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X92Y0": { + "bits": {}, + "grid_x": 92, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X93Y0": { + "bits": {}, + "grid_x": 93, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X98Y0": { + "bits": {}, + "grid_x": 98, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X99Y0": { + "bits": {}, + "grid_x": 99, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X102Y0": { + "bits": {}, + "grid_x": 102, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X103Y0": { + "bits": {}, + "grid_x": 103, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X109Y0": { + "bits": {}, + "grid_x": 109, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "B_TERM_INT_X110Y0": { + "bits": {}, + "grid_x": 110, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "B_TERM_INT" + }, + "CFG_CENTER_BOT_X46Y11": { + "bits": {}, + "grid_x": 46, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "CFG_CENTER_BOT" + }, + "CFG_CENTER_MID_X46Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X0Y0", + "grid_x": 46, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "BSCAN_X0Y0": "BSCAN", + "BSCAN_X0Y1": "BSCAN", + "BSCAN_X0Y2": "BSCAN", + "BSCAN_X0Y3": "BSCAN", + "CAPTURE_X0Y0": "CAPTURE", + "DCIRESET_X0Y0": "DCIRESET", + "FRAME_ECC_X0Y0": "FRAME_ECC", + "ICAP_X0Y0": "ICAP", + "ICAP_X0Y1": "ICAP", + "STARTUP_X0Y0": "STARTUP", + "USR_ACCESS_X0Y0": "USR_ACCESS" + }, + "type": "CFG_CENTER_MID" + }, + "CFG_CENTER_TOP_X46Y42": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 46, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "DNA_PORT_X0Y0": "DNA_PORT", + "EFUSE_USR_X0Y0": "EFUSE_USR" + }, + "type": "CFG_CENTER_TOP" + }, + "CLBLL_L_X2Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X0Y0": "SLICEL", + "SLICE_X1Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X0Y1": "SLICEL", + "SLICE_X1Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X0Y2": "SLICEL", + "SLICE_X1Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X0Y3": "SLICEL", + "SLICE_X1Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X0Y4": "SLICEL", + "SLICE_X1Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X0Y5": "SLICEL", + "SLICE_X1Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X0Y6": "SLICEL", + "SLICE_X1Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X0Y7": "SLICEL", + "SLICE_X1Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X0Y8": "SLICEL", + "SLICE_X1Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X0Y9": "SLICEL", + "SLICE_X1Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X0Y10": "SLICEL", + "SLICE_X1Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X0Y11": "SLICEL", + "SLICE_X1Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X0Y12": "SLICEL", + "SLICE_X1Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X0Y13": "SLICEL", + "SLICE_X1Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X0Y14": "SLICEL", + "SLICE_X1Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X0Y15": "SLICEL", + "SLICE_X1Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X0Y16": "SLICEL", + "SLICE_X1Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X0Y17": "SLICEL", + "SLICE_X1Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X0Y18": "SLICEL", + "SLICE_X1Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X0Y19": "SLICEL", + "SLICE_X1Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X0Y20": "SLICEL", + "SLICE_X1Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X0Y21": "SLICEL", + "SLICE_X1Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X0Y22": "SLICEL", + "SLICE_X1Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X0Y23": "SLICEL", + "SLICE_X1Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X0Y24": "SLICEL", + "SLICE_X1Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X0Y25": "SLICEL", + "SLICE_X1Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X0Y26": "SLICEL", + "SLICE_X1Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X0Y27": "SLICEL", + "SLICE_X1Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X0Y28": "SLICEL", + "SLICE_X1Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X0Y29": "SLICEL", + "SLICE_X1Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X0Y30": "SLICEL", + "SLICE_X1Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X0Y31": "SLICEL", + "SLICE_X1Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X0Y32": "SLICEL", + "SLICE_X1Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X0Y33": "SLICEL", + "SLICE_X1Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X0Y34": "SLICEL", + "SLICE_X1Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X0Y35": "SLICEL", + "SLICE_X1Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X0Y36": "SLICEL", + "SLICE_X1Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X0Y37": "SLICEL", + "SLICE_X1Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X0Y38": "SLICEL", + "SLICE_X1Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X0Y39": "SLICEL", + "SLICE_X1Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X0Y40": "SLICEL", + "SLICE_X1Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X0Y41": "SLICEL", + "SLICE_X1Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X0Y42": "SLICEL", + "SLICE_X1Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X0Y43": "SLICEL", + "SLICE_X1Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X0Y44": "SLICEL", + "SLICE_X1Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X0Y45": "SLICEL", + "SLICE_X1Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X0Y46": "SLICEL", + "SLICE_X1Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X0Y47": "SLICEL", + "SLICE_X1Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X0Y48": "SLICEL", + "SLICE_X1Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 10, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X0Y49": "SLICEL", + "SLICE_X1Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X0Y50": "SLICEL", + "SLICE_X1Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X0Y51": "SLICEL", + "SLICE_X1Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X0Y52": "SLICEL", + "SLICE_X1Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X0Y53": "SLICEL", + "SLICE_X1Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X0Y54": "SLICEL", + "SLICE_X1Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X0Y55": "SLICEL", + "SLICE_X1Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X0Y56": "SLICEL", + "SLICE_X1Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X0Y57": "SLICEL", + "SLICE_X1Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X0Y58": "SLICEL", + "SLICE_X1Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X0Y59": "SLICEL", + "SLICE_X1Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X0Y60": "SLICEL", + "SLICE_X1Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X0Y61": "SLICEL", + "SLICE_X1Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X0Y62": "SLICEL", + "SLICE_X1Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X0Y63": "SLICEL", + "SLICE_X1Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X0Y64": "SLICEL", + "SLICE_X1Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X0Y65": "SLICEL", + "SLICE_X1Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X0Y66": "SLICEL", + "SLICE_X1Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X0Y67": "SLICEL", + "SLICE_X1Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X0Y68": "SLICEL", + "SLICE_X1Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X0Y69": "SLICEL", + "SLICE_X1Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X0Y70": "SLICEL", + "SLICE_X1Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X0Y71": "SLICEL", + "SLICE_X1Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X0Y72": "SLICEL", + "SLICE_X1Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X0Y73": "SLICEL", + "SLICE_X1Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X0Y74": "SLICEL", + "SLICE_X1Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X0Y75": "SLICEL", + "SLICE_X1Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X0Y76": "SLICEL", + "SLICE_X1Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X0Y77": "SLICEL", + "SLICE_X1Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X0Y78": "SLICEL", + "SLICE_X1Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X0Y79": "SLICEL", + "SLICE_X1Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X0Y80": "SLICEL", + "SLICE_X1Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X0Y81": "SLICEL", + "SLICE_X1Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X0Y82": "SLICEL", + "SLICE_X1Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X0Y83": "SLICEL", + "SLICE_X1Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X0Y84": "SLICEL", + "SLICE_X1Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X0Y85": "SLICEL", + "SLICE_X1Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X0Y86": "SLICEL", + "SLICE_X1Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X0Y87": "SLICEL", + "SLICE_X1Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X0Y88": "SLICEL", + "SLICE_X1Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X0Y89": "SLICEL", + "SLICE_X1Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X0Y90": "SLICEL", + "SLICE_X1Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X0Y91": "SLICEL", + "SLICE_X1Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X0Y92": "SLICEL", + "SLICE_X1Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X0Y93": "SLICEL", + "SLICE_X1Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X0Y94": "SLICEL", + "SLICE_X1Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X0Y95": "SLICEL", + "SLICE_X1Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X0Y96": "SLICEL", + "SLICE_X1Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X0Y97": "SLICEL", + "SLICE_X1Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X0Y98": "SLICEL", + "SLICE_X1Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 10, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X0Y99": "SLICEL", + "SLICE_X1Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X0Y100": "SLICEL", + "SLICE_X1Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X0Y101": "SLICEL", + "SLICE_X1Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X0Y102": "SLICEL", + "SLICE_X1Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X0Y103": "SLICEL", + "SLICE_X1Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X0Y104": "SLICEL", + "SLICE_X1Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X0Y105": "SLICEL", + "SLICE_X1Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X0Y106": "SLICEL", + "SLICE_X1Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X0Y107": "SLICEL", + "SLICE_X1Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X0Y108": "SLICEL", + "SLICE_X1Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X0Y109": "SLICEL", + "SLICE_X1Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X0Y110": "SLICEL", + "SLICE_X1Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X0Y111": "SLICEL", + "SLICE_X1Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X0Y112": "SLICEL", + "SLICE_X1Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X0Y113": "SLICEL", + "SLICE_X1Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X0Y114": "SLICEL", + "SLICE_X1Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X0Y115": "SLICEL", + "SLICE_X1Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X0Y116": "SLICEL", + "SLICE_X1Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X0Y117": "SLICEL", + "SLICE_X1Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X0Y118": "SLICEL", + "SLICE_X1Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X0Y119": "SLICEL", + "SLICE_X1Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X0Y120": "SLICEL", + "SLICE_X1Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X0Y121": "SLICEL", + "SLICE_X1Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X0Y122": "SLICEL", + "SLICE_X1Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X0Y123": "SLICEL", + "SLICE_X1Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X0Y124": "SLICEL", + "SLICE_X1Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X0Y125": "SLICEL", + "SLICE_X1Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X0Y126": "SLICEL", + "SLICE_X1Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X0Y127": "SLICEL", + "SLICE_X1Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X0Y128": "SLICEL", + "SLICE_X1Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X0Y129": "SLICEL", + "SLICE_X1Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X0Y130": "SLICEL", + "SLICE_X1Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X0Y131": "SLICEL", + "SLICE_X1Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X0Y132": "SLICEL", + "SLICE_X1Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X0Y133": "SLICEL", + "SLICE_X1Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X0Y134": "SLICEL", + "SLICE_X1Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X0Y135": "SLICEL", + "SLICE_X1Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X0Y136": "SLICEL", + "SLICE_X1Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X0Y137": "SLICEL", + "SLICE_X1Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X0Y138": "SLICEL", + "SLICE_X1Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X0Y139": "SLICEL", + "SLICE_X1Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X0Y140": "SLICEL", + "SLICE_X1Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X0Y141": "SLICEL", + "SLICE_X1Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X0Y142": "SLICEL", + "SLICE_X1Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X0Y143": "SLICEL", + "SLICE_X1Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X0Y144": "SLICEL", + "SLICE_X1Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X0Y145": "SLICEL", + "SLICE_X1Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X0Y146": "SLICEL", + "SLICE_X1Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X0Y147": "SLICEL", + "SLICE_X1Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X0Y148": "SLICEL", + "SLICE_X1Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X2Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 10, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X0Y149": "SLICEL", + "SLICE_X1Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X4Y0": "SLICEL", + "SLICE_X5Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X4Y1": "SLICEL", + "SLICE_X5Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X4Y2": "SLICEL", + "SLICE_X5Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X4Y3": "SLICEL", + "SLICE_X5Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X4Y4": "SLICEL", + "SLICE_X5Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X4Y5": "SLICEL", + "SLICE_X5Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X4Y6": "SLICEL", + "SLICE_X5Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X4Y7": "SLICEL", + "SLICE_X5Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X4Y8": "SLICEL", + "SLICE_X5Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X4Y9": "SLICEL", + "SLICE_X5Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X4Y10": "SLICEL", + "SLICE_X5Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X4Y11": "SLICEL", + "SLICE_X5Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X4Y12": "SLICEL", + "SLICE_X5Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X4Y13": "SLICEL", + "SLICE_X5Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X4Y14": "SLICEL", + "SLICE_X5Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X4Y15": "SLICEL", + "SLICE_X5Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X4Y16": "SLICEL", + "SLICE_X5Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X4Y17": "SLICEL", + "SLICE_X5Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X4Y18": "SLICEL", + "SLICE_X5Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X4Y19": "SLICEL", + "SLICE_X5Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X4Y20": "SLICEL", + "SLICE_X5Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X4Y21": "SLICEL", + "SLICE_X5Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X4Y22": "SLICEL", + "SLICE_X5Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X4Y23": "SLICEL", + "SLICE_X5Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X4Y24": "SLICEL", + "SLICE_X5Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X4Y25": "SLICEL", + "SLICE_X5Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X4Y26": "SLICEL", + "SLICE_X5Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X4Y27": "SLICEL", + "SLICE_X5Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X4Y28": "SLICEL", + "SLICE_X5Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X4Y29": "SLICEL", + "SLICE_X5Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X4Y30": "SLICEL", + "SLICE_X5Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X4Y31": "SLICEL", + "SLICE_X5Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X4Y32": "SLICEL", + "SLICE_X5Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X4Y33": "SLICEL", + "SLICE_X5Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X4Y34": "SLICEL", + "SLICE_X5Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X4Y35": "SLICEL", + "SLICE_X5Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X4Y36": "SLICEL", + "SLICE_X5Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X4Y37": "SLICEL", + "SLICE_X5Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X4Y38": "SLICEL", + "SLICE_X5Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X4Y39": "SLICEL", + "SLICE_X5Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X4Y40": "SLICEL", + "SLICE_X5Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X4Y41": "SLICEL", + "SLICE_X5Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X4Y42": "SLICEL", + "SLICE_X5Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X4Y43": "SLICEL", + "SLICE_X5Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X4Y44": "SLICEL", + "SLICE_X5Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X4Y45": "SLICEL", + "SLICE_X5Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X4Y46": "SLICEL", + "SLICE_X5Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X4Y47": "SLICEL", + "SLICE_X5Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X4Y48": "SLICEL", + "SLICE_X5Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 14, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X4Y49": "SLICEL", + "SLICE_X5Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X4Y50": "SLICEL", + "SLICE_X5Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X4Y51": "SLICEL", + "SLICE_X5Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X4Y52": "SLICEL", + "SLICE_X5Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X4Y53": "SLICEL", + "SLICE_X5Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X4Y54": "SLICEL", + "SLICE_X5Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X4Y55": "SLICEL", + "SLICE_X5Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X4Y56": "SLICEL", + "SLICE_X5Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X4Y57": "SLICEL", + "SLICE_X5Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X4Y58": "SLICEL", + "SLICE_X5Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X4Y59": "SLICEL", + "SLICE_X5Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X4Y60": "SLICEL", + "SLICE_X5Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X4Y61": "SLICEL", + "SLICE_X5Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X4Y62": "SLICEL", + "SLICE_X5Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X4Y63": "SLICEL", + "SLICE_X5Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X4Y64": "SLICEL", + "SLICE_X5Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X4Y65": "SLICEL", + "SLICE_X5Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X4Y66": "SLICEL", + "SLICE_X5Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X4Y67": "SLICEL", + "SLICE_X5Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X4Y68": "SLICEL", + "SLICE_X5Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X4Y69": "SLICEL", + "SLICE_X5Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X4Y70": "SLICEL", + "SLICE_X5Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X4Y71": "SLICEL", + "SLICE_X5Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X4Y72": "SLICEL", + "SLICE_X5Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X4Y73": "SLICEL", + "SLICE_X5Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X4Y74": "SLICEL", + "SLICE_X5Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X4Y75": "SLICEL", + "SLICE_X5Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X4Y76": "SLICEL", + "SLICE_X5Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X4Y77": "SLICEL", + "SLICE_X5Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X4Y78": "SLICEL", + "SLICE_X5Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X4Y79": "SLICEL", + "SLICE_X5Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X4Y80": "SLICEL", + "SLICE_X5Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X4Y81": "SLICEL", + "SLICE_X5Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X4Y82": "SLICEL", + "SLICE_X5Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X4Y83": "SLICEL", + "SLICE_X5Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X4Y84": "SLICEL", + "SLICE_X5Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X4Y85": "SLICEL", + "SLICE_X5Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X4Y86": "SLICEL", + "SLICE_X5Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X4Y87": "SLICEL", + "SLICE_X5Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X4Y88": "SLICEL", + "SLICE_X5Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X4Y89": "SLICEL", + "SLICE_X5Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X4Y90": "SLICEL", + "SLICE_X5Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X4Y91": "SLICEL", + "SLICE_X5Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X4Y92": "SLICEL", + "SLICE_X5Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X4Y93": "SLICEL", + "SLICE_X5Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X4Y94": "SLICEL", + "SLICE_X5Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X4Y95": "SLICEL", + "SLICE_X5Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X4Y96": "SLICEL", + "SLICE_X5Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X4Y97": "SLICEL", + "SLICE_X5Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X4Y98": "SLICEL", + "SLICE_X5Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 14, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X4Y99": "SLICEL", + "SLICE_X5Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X4Y100": "SLICEL", + "SLICE_X5Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X4Y101": "SLICEL", + "SLICE_X5Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X4Y102": "SLICEL", + "SLICE_X5Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X4Y103": "SLICEL", + "SLICE_X5Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X4Y104": "SLICEL", + "SLICE_X5Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X4Y105": "SLICEL", + "SLICE_X5Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X4Y106": "SLICEL", + "SLICE_X5Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X4Y107": "SLICEL", + "SLICE_X5Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X4Y108": "SLICEL", + "SLICE_X5Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X4Y109": "SLICEL", + "SLICE_X5Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X4Y110": "SLICEL", + "SLICE_X5Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X4Y111": "SLICEL", + "SLICE_X5Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X4Y112": "SLICEL", + "SLICE_X5Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X4Y113": "SLICEL", + "SLICE_X5Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X4Y114": "SLICEL", + "SLICE_X5Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X4Y115": "SLICEL", + "SLICE_X5Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X4Y116": "SLICEL", + "SLICE_X5Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X4Y117": "SLICEL", + "SLICE_X5Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X4Y118": "SLICEL", + "SLICE_X5Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X4Y119": "SLICEL", + "SLICE_X5Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X4Y120": "SLICEL", + "SLICE_X5Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X4Y121": "SLICEL", + "SLICE_X5Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X4Y122": "SLICEL", + "SLICE_X5Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X4Y123": "SLICEL", + "SLICE_X5Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X4Y124": "SLICEL", + "SLICE_X5Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X4Y125": "SLICEL", + "SLICE_X5Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X4Y126": "SLICEL", + "SLICE_X5Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X4Y127": "SLICEL", + "SLICE_X5Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X4Y128": "SLICEL", + "SLICE_X5Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X4Y129": "SLICEL", + "SLICE_X5Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X4Y130": "SLICEL", + "SLICE_X5Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X4Y131": "SLICEL", + "SLICE_X5Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X4Y132": "SLICEL", + "SLICE_X5Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X4Y133": "SLICEL", + "SLICE_X5Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X4Y134": "SLICEL", + "SLICE_X5Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X4Y135": "SLICEL", + "SLICE_X5Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X4Y136": "SLICEL", + "SLICE_X5Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X4Y137": "SLICEL", + "SLICE_X5Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X4Y138": "SLICEL", + "SLICE_X5Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X4Y139": "SLICEL", + "SLICE_X5Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X4Y140": "SLICEL", + "SLICE_X5Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X4Y141": "SLICEL", + "SLICE_X5Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X4Y142": "SLICEL", + "SLICE_X5Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X4Y143": "SLICEL", + "SLICE_X5Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X4Y144": "SLICEL", + "SLICE_X5Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X4Y145": "SLICEL", + "SLICE_X5Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X4Y146": "SLICEL", + "SLICE_X5Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X4Y147": "SLICEL", + "SLICE_X5Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X4Y148": "SLICEL", + "SLICE_X5Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X4Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 14, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X4Y149": "SLICEL", + "SLICE_X5Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X16Y100": "SLICEL", + "SLICE_X17Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X16Y101": "SLICEL", + "SLICE_X17Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X16Y102": "SLICEL", + "SLICE_X17Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X16Y103": "SLICEL", + "SLICE_X17Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X16Y104": "SLICEL", + "SLICE_X17Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X16Y105": "SLICEL", + "SLICE_X17Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X16Y106": "SLICEL", + "SLICE_X17Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X16Y107": "SLICEL", + "SLICE_X17Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X16Y108": "SLICEL", + "SLICE_X17Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X16Y109": "SLICEL", + "SLICE_X17Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X16Y110": "SLICEL", + "SLICE_X17Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X16Y111": "SLICEL", + "SLICE_X17Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X16Y112": "SLICEL", + "SLICE_X17Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X16Y113": "SLICEL", + "SLICE_X17Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X16Y114": "SLICEL", + "SLICE_X17Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X16Y115": "SLICEL", + "SLICE_X17Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X16Y116": "SLICEL", + "SLICE_X17Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X16Y117": "SLICEL", + "SLICE_X17Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X16Y118": "SLICEL", + "SLICE_X17Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X16Y119": "SLICEL", + "SLICE_X17Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X16Y120": "SLICEL", + "SLICE_X17Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X16Y121": "SLICEL", + "SLICE_X17Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X16Y122": "SLICEL", + "SLICE_X17Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X16Y123": "SLICEL", + "SLICE_X17Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X16Y124": "SLICEL", + "SLICE_X17Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X16Y125": "SLICEL", + "SLICE_X17Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X16Y126": "SLICEL", + "SLICE_X17Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X16Y127": "SLICEL", + "SLICE_X17Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X16Y128": "SLICEL", + "SLICE_X17Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X16Y129": "SLICEL", + "SLICE_X17Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X16Y130": "SLICEL", + "SLICE_X17Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X16Y131": "SLICEL", + "SLICE_X17Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X16Y132": "SLICEL", + "SLICE_X17Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X16Y133": "SLICEL", + "SLICE_X17Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X16Y134": "SLICEL", + "SLICE_X17Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X16Y135": "SLICEL", + "SLICE_X17Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X16Y136": "SLICEL", + "SLICE_X17Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X16Y137": "SLICEL", + "SLICE_X17Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X16Y138": "SLICEL", + "SLICE_X17Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X16Y139": "SLICEL", + "SLICE_X17Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X16Y140": "SLICEL", + "SLICE_X17Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X16Y141": "SLICEL", + "SLICE_X17Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X16Y142": "SLICEL", + "SLICE_X17Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X16Y143": "SLICEL", + "SLICE_X17Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X16Y144": "SLICEL", + "SLICE_X17Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X16Y145": "SLICEL", + "SLICE_X17Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X16Y146": "SLICEL", + "SLICE_X17Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X16Y147": "SLICEL", + "SLICE_X17Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X16Y148": "SLICEL", + "SLICE_X17Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X12Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 35, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X16Y149": "SLICEL", + "SLICE_X17Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X20Y100": "SLICEL", + "SLICE_X21Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X20Y101": "SLICEL", + "SLICE_X21Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X20Y102": "SLICEL", + "SLICE_X21Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X20Y103": "SLICEL", + "SLICE_X21Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X20Y104": "SLICEL", + "SLICE_X21Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X20Y105": "SLICEL", + "SLICE_X21Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X20Y106": "SLICEL", + "SLICE_X21Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X20Y107": "SLICEL", + "SLICE_X21Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X20Y108": "SLICEL", + "SLICE_X21Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X20Y109": "SLICEL", + "SLICE_X21Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X20Y110": "SLICEL", + "SLICE_X21Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X20Y111": "SLICEL", + "SLICE_X21Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X20Y112": "SLICEL", + "SLICE_X21Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X20Y113": "SLICEL", + "SLICE_X21Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X20Y114": "SLICEL", + "SLICE_X21Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X20Y115": "SLICEL", + "SLICE_X21Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X20Y116": "SLICEL", + "SLICE_X21Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X20Y117": "SLICEL", + "SLICE_X21Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X20Y118": "SLICEL", + "SLICE_X21Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X20Y119": "SLICEL", + "SLICE_X21Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X20Y120": "SLICEL", + "SLICE_X21Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X20Y121": "SLICEL", + "SLICE_X21Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X20Y122": "SLICEL", + "SLICE_X21Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X20Y123": "SLICEL", + "SLICE_X21Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X20Y124": "SLICEL", + "SLICE_X21Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X20Y125": "SLICEL", + "SLICE_X21Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X20Y126": "SLICEL", + "SLICE_X21Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X20Y127": "SLICEL", + "SLICE_X21Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X20Y128": "SLICEL", + "SLICE_X21Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X20Y129": "SLICEL", + "SLICE_X21Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X20Y130": "SLICEL", + "SLICE_X21Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X20Y131": "SLICEL", + "SLICE_X21Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X20Y132": "SLICEL", + "SLICE_X21Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X20Y133": "SLICEL", + "SLICE_X21Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X20Y134": "SLICEL", + "SLICE_X21Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X20Y135": "SLICEL", + "SLICE_X21Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X20Y136": "SLICEL", + "SLICE_X21Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X20Y137": "SLICEL", + "SLICE_X21Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X20Y138": "SLICEL", + "SLICE_X21Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X20Y139": "SLICEL", + "SLICE_X21Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X20Y140": "SLICEL", + "SLICE_X21Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X20Y141": "SLICEL", + "SLICE_X21Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X20Y142": "SLICEL", + "SLICE_X21Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X20Y143": "SLICEL", + "SLICE_X21Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X20Y144": "SLICEL", + "SLICE_X21Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X20Y145": "SLICEL", + "SLICE_X21Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X20Y146": "SLICEL", + "SLICE_X21Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X20Y147": "SLICEL", + "SLICE_X21Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X20Y148": "SLICEL", + "SLICE_X21Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X14Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 39, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X20Y149": "SLICEL", + "SLICE_X21Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X24Y100": "SLICEL", + "SLICE_X25Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X24Y101": "SLICEL", + "SLICE_X25Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X24Y102": "SLICEL", + "SLICE_X25Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X24Y103": "SLICEL", + "SLICE_X25Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X24Y104": "SLICEL", + "SLICE_X25Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X24Y105": "SLICEL", + "SLICE_X25Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X24Y106": "SLICEL", + "SLICE_X25Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X24Y107": "SLICEL", + "SLICE_X25Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X24Y108": "SLICEL", + "SLICE_X25Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X24Y109": "SLICEL", + "SLICE_X25Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X24Y110": "SLICEL", + "SLICE_X25Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X24Y111": "SLICEL", + "SLICE_X25Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X24Y112": "SLICEL", + "SLICE_X25Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X24Y113": "SLICEL", + "SLICE_X25Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X24Y114": "SLICEL", + "SLICE_X25Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X24Y115": "SLICEL", + "SLICE_X25Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X24Y116": "SLICEL", + "SLICE_X25Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X24Y117": "SLICEL", + "SLICE_X25Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X24Y118": "SLICEL", + "SLICE_X25Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X24Y119": "SLICEL", + "SLICE_X25Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X24Y120": "SLICEL", + "SLICE_X25Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X24Y121": "SLICEL", + "SLICE_X25Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X24Y122": "SLICEL", + "SLICE_X25Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X24Y123": "SLICEL", + "SLICE_X25Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X24Y124": "SLICEL", + "SLICE_X25Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X24Y125": "SLICEL", + "SLICE_X25Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X24Y126": "SLICEL", + "SLICE_X25Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X24Y127": "SLICEL", + "SLICE_X25Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X24Y128": "SLICEL", + "SLICE_X25Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X24Y129": "SLICEL", + "SLICE_X25Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X24Y130": "SLICEL", + "SLICE_X25Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X24Y131": "SLICEL", + "SLICE_X25Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X24Y132": "SLICEL", + "SLICE_X25Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X24Y133": "SLICEL", + "SLICE_X25Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X24Y134": "SLICEL", + "SLICE_X25Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X24Y135": "SLICEL", + "SLICE_X25Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X24Y136": "SLICEL", + "SLICE_X25Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X24Y137": "SLICEL", + "SLICE_X25Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X24Y138": "SLICEL", + "SLICE_X25Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X24Y139": "SLICEL", + "SLICE_X25Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X24Y140": "SLICEL", + "SLICE_X25Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X24Y141": "SLICEL", + "SLICE_X25Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X24Y142": "SLICEL", + "SLICE_X25Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X24Y143": "SLICEL", + "SLICE_X25Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X24Y144": "SLICEL", + "SLICE_X25Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X24Y145": "SLICEL", + "SLICE_X25Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X24Y146": "SLICEL", + "SLICE_X25Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X24Y147": "SLICEL", + "SLICE_X25Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X24Y148": "SLICEL", + "SLICE_X25Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X16Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 43, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X24Y149": "SLICEL", + "SLICE_X25Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X36Y0": "SLICEL", + "SLICE_X37Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X36Y1": "SLICEL", + "SLICE_X37Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X36Y2": "SLICEL", + "SLICE_X37Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X36Y3": "SLICEL", + "SLICE_X37Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X36Y4": "SLICEL", + "SLICE_X37Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X36Y5": "SLICEL", + "SLICE_X37Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X36Y6": "SLICEL", + "SLICE_X37Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X36Y7": "SLICEL", + "SLICE_X37Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X36Y8": "SLICEL", + "SLICE_X37Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X36Y9": "SLICEL", + "SLICE_X37Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X36Y10": "SLICEL", + "SLICE_X37Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X36Y11": "SLICEL", + "SLICE_X37Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X36Y12": "SLICEL", + "SLICE_X37Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X36Y13": "SLICEL", + "SLICE_X37Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X36Y14": "SLICEL", + "SLICE_X37Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X36Y15": "SLICEL", + "SLICE_X37Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X36Y16": "SLICEL", + "SLICE_X37Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X36Y17": "SLICEL", + "SLICE_X37Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X36Y18": "SLICEL", + "SLICE_X37Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X36Y19": "SLICEL", + "SLICE_X37Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X36Y20": "SLICEL", + "SLICE_X37Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X36Y21": "SLICEL", + "SLICE_X37Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X36Y22": "SLICEL", + "SLICE_X37Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X36Y23": "SLICEL", + "SLICE_X37Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X36Y24": "SLICEL", + "SLICE_X37Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X36Y25": "SLICEL", + "SLICE_X37Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X36Y26": "SLICEL", + "SLICE_X37Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X36Y27": "SLICEL", + "SLICE_X37Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X36Y28": "SLICEL", + "SLICE_X37Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X36Y29": "SLICEL", + "SLICE_X37Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X36Y30": "SLICEL", + "SLICE_X37Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X36Y31": "SLICEL", + "SLICE_X37Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X36Y32": "SLICEL", + "SLICE_X37Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X36Y33": "SLICEL", + "SLICE_X37Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X36Y34": "SLICEL", + "SLICE_X37Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X36Y35": "SLICEL", + "SLICE_X37Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X36Y36": "SLICEL", + "SLICE_X37Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X36Y37": "SLICEL", + "SLICE_X37Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X36Y38": "SLICEL", + "SLICE_X37Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X36Y39": "SLICEL", + "SLICE_X37Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X36Y40": "SLICEL", + "SLICE_X37Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X36Y41": "SLICEL", + "SLICE_X37Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X36Y42": "SLICEL", + "SLICE_X37Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X36Y43": "SLICEL", + "SLICE_X37Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X36Y44": "SLICEL", + "SLICE_X37Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X36Y45": "SLICEL", + "SLICE_X37Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X36Y46": "SLICEL", + "SLICE_X37Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X36Y47": "SLICEL", + "SLICE_X37Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X36Y48": "SLICEL", + "SLICE_X37Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 62, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X36Y49": "SLICEL", + "SLICE_X37Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X36Y50": "SLICEL", + "SLICE_X37Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X36Y51": "SLICEL", + "SLICE_X37Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X36Y52": "SLICEL", + "SLICE_X37Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X36Y53": "SLICEL", + "SLICE_X37Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X36Y54": "SLICEL", + "SLICE_X37Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X36Y55": "SLICEL", + "SLICE_X37Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X36Y56": "SLICEL", + "SLICE_X37Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X36Y57": "SLICEL", + "SLICE_X37Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X36Y58": "SLICEL", + "SLICE_X37Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X36Y59": "SLICEL", + "SLICE_X37Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X36Y60": "SLICEL", + "SLICE_X37Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X36Y61": "SLICEL", + "SLICE_X37Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X36Y62": "SLICEL", + "SLICE_X37Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X36Y63": "SLICEL", + "SLICE_X37Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X36Y64": "SLICEL", + "SLICE_X37Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X36Y65": "SLICEL", + "SLICE_X37Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X36Y66": "SLICEL", + "SLICE_X37Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X36Y67": "SLICEL", + "SLICE_X37Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X36Y68": "SLICEL", + "SLICE_X37Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X36Y69": "SLICEL", + "SLICE_X37Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X36Y70": "SLICEL", + "SLICE_X37Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X36Y71": "SLICEL", + "SLICE_X37Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X36Y72": "SLICEL", + "SLICE_X37Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X36Y73": "SLICEL", + "SLICE_X37Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X36Y74": "SLICEL", + "SLICE_X37Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X36Y75": "SLICEL", + "SLICE_X37Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X36Y76": "SLICEL", + "SLICE_X37Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X36Y77": "SLICEL", + "SLICE_X37Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X36Y78": "SLICEL", + "SLICE_X37Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X36Y79": "SLICEL", + "SLICE_X37Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X36Y80": "SLICEL", + "SLICE_X37Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X36Y81": "SLICEL", + "SLICE_X37Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X36Y82": "SLICEL", + "SLICE_X37Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X36Y83": "SLICEL", + "SLICE_X37Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X36Y84": "SLICEL", + "SLICE_X37Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X36Y85": "SLICEL", + "SLICE_X37Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X36Y86": "SLICEL", + "SLICE_X37Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X36Y87": "SLICEL", + "SLICE_X37Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X36Y88": "SLICEL", + "SLICE_X37Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X36Y89": "SLICEL", + "SLICE_X37Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X36Y90": "SLICEL", + "SLICE_X37Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X36Y91": "SLICEL", + "SLICE_X37Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X36Y92": "SLICEL", + "SLICE_X37Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X36Y93": "SLICEL", + "SLICE_X37Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X36Y94": "SLICEL", + "SLICE_X37Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X36Y95": "SLICEL", + "SLICE_X37Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X36Y96": "SLICEL", + "SLICE_X37Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X36Y97": "SLICEL", + "SLICE_X37Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X36Y98": "SLICEL", + "SLICE_X37Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 62, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X36Y99": "SLICEL", + "SLICE_X37Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X36Y100": "SLICEL", + "SLICE_X37Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X36Y101": "SLICEL", + "SLICE_X37Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X36Y102": "SLICEL", + "SLICE_X37Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X36Y103": "SLICEL", + "SLICE_X37Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X36Y104": "SLICEL", + "SLICE_X37Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X36Y105": "SLICEL", + "SLICE_X37Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X36Y106": "SLICEL", + "SLICE_X37Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X36Y107": "SLICEL", + "SLICE_X37Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X36Y108": "SLICEL", + "SLICE_X37Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X36Y109": "SLICEL", + "SLICE_X37Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X36Y110": "SLICEL", + "SLICE_X37Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X36Y111": "SLICEL", + "SLICE_X37Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X36Y112": "SLICEL", + "SLICE_X37Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X36Y113": "SLICEL", + "SLICE_X37Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X36Y114": "SLICEL", + "SLICE_X37Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X36Y115": "SLICEL", + "SLICE_X37Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X36Y116": "SLICEL", + "SLICE_X37Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X36Y117": "SLICEL", + "SLICE_X37Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X36Y118": "SLICEL", + "SLICE_X37Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X36Y119": "SLICEL", + "SLICE_X37Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X36Y120": "SLICEL", + "SLICE_X37Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X36Y121": "SLICEL", + "SLICE_X37Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X36Y122": "SLICEL", + "SLICE_X37Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X36Y123": "SLICEL", + "SLICE_X37Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X36Y124": "SLICEL", + "SLICE_X37Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X36Y125": "SLICEL", + "SLICE_X37Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X36Y126": "SLICEL", + "SLICE_X37Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X36Y127": "SLICEL", + "SLICE_X37Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X36Y128": "SLICEL", + "SLICE_X37Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X36Y129": "SLICEL", + "SLICE_X37Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X36Y130": "SLICEL", + "SLICE_X37Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X36Y131": "SLICEL", + "SLICE_X37Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X36Y132": "SLICEL", + "SLICE_X37Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X36Y133": "SLICEL", + "SLICE_X37Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X36Y134": "SLICEL", + "SLICE_X37Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X36Y135": "SLICEL", + "SLICE_X37Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X36Y136": "SLICEL", + "SLICE_X37Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X36Y137": "SLICEL", + "SLICE_X37Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X36Y138": "SLICEL", + "SLICE_X37Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X36Y139": "SLICEL", + "SLICE_X37Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X36Y140": "SLICEL", + "SLICE_X37Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X36Y141": "SLICEL", + "SLICE_X37Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X36Y142": "SLICEL", + "SLICE_X37Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X36Y143": "SLICEL", + "SLICE_X37Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X36Y144": "SLICEL", + "SLICE_X37Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X36Y145": "SLICEL", + "SLICE_X37Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X36Y146": "SLICEL", + "SLICE_X37Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X36Y147": "SLICEL", + "SLICE_X37Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X36Y148": "SLICEL", + "SLICE_X37Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X24Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 62, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X36Y149": "SLICEL", + "SLICE_X37Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X40Y0": "SLICEL", + "SLICE_X41Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X40Y1": "SLICEL", + "SLICE_X41Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X40Y2": "SLICEL", + "SLICE_X41Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X40Y3": "SLICEL", + "SLICE_X41Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X40Y4": "SLICEL", + "SLICE_X41Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X40Y5": "SLICEL", + "SLICE_X41Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X40Y6": "SLICEL", + "SLICE_X41Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X40Y7": "SLICEL", + "SLICE_X41Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X40Y8": "SLICEL", + "SLICE_X41Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X40Y9": "SLICEL", + "SLICE_X41Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X40Y10": "SLICEL", + "SLICE_X41Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X40Y11": "SLICEL", + "SLICE_X41Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X40Y12": "SLICEL", + "SLICE_X41Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X40Y13": "SLICEL", + "SLICE_X41Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X40Y14": "SLICEL", + "SLICE_X41Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X40Y15": "SLICEL", + "SLICE_X41Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X40Y16": "SLICEL", + "SLICE_X41Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X40Y17": "SLICEL", + "SLICE_X41Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X40Y18": "SLICEL", + "SLICE_X41Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X40Y19": "SLICEL", + "SLICE_X41Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X40Y20": "SLICEL", + "SLICE_X41Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X40Y21": "SLICEL", + "SLICE_X41Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X40Y22": "SLICEL", + "SLICE_X41Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X40Y23": "SLICEL", + "SLICE_X41Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X40Y24": "SLICEL", + "SLICE_X41Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X40Y25": "SLICEL", + "SLICE_X41Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X40Y26": "SLICEL", + "SLICE_X41Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X40Y27": "SLICEL", + "SLICE_X41Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X40Y28": "SLICEL", + "SLICE_X41Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X40Y29": "SLICEL", + "SLICE_X41Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X40Y30": "SLICEL", + "SLICE_X41Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X40Y31": "SLICEL", + "SLICE_X41Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X40Y32": "SLICEL", + "SLICE_X41Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X40Y33": "SLICEL", + "SLICE_X41Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X40Y34": "SLICEL", + "SLICE_X41Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X40Y35": "SLICEL", + "SLICE_X41Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X40Y36": "SLICEL", + "SLICE_X41Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X40Y37": "SLICEL", + "SLICE_X41Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X40Y38": "SLICEL", + "SLICE_X41Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X40Y39": "SLICEL", + "SLICE_X41Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X40Y40": "SLICEL", + "SLICE_X41Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X40Y41": "SLICEL", + "SLICE_X41Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X40Y42": "SLICEL", + "SLICE_X41Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X40Y43": "SLICEL", + "SLICE_X41Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X40Y44": "SLICEL", + "SLICE_X41Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X40Y45": "SLICEL", + "SLICE_X41Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X40Y46": "SLICEL", + "SLICE_X41Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X40Y47": "SLICEL", + "SLICE_X41Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X40Y48": "SLICEL", + "SLICE_X41Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 67, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X40Y49": "SLICEL", + "SLICE_X41Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X40Y50": "SLICEL", + "SLICE_X41Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X40Y51": "SLICEL", + "SLICE_X41Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X40Y52": "SLICEL", + "SLICE_X41Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X40Y53": "SLICEL", + "SLICE_X41Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X40Y54": "SLICEL", + "SLICE_X41Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X40Y55": "SLICEL", + "SLICE_X41Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X40Y56": "SLICEL", + "SLICE_X41Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X40Y57": "SLICEL", + "SLICE_X41Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X40Y58": "SLICEL", + "SLICE_X41Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X40Y59": "SLICEL", + "SLICE_X41Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X40Y60": "SLICEL", + "SLICE_X41Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X40Y61": "SLICEL", + "SLICE_X41Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X40Y62": "SLICEL", + "SLICE_X41Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X40Y63": "SLICEL", + "SLICE_X41Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X40Y64": "SLICEL", + "SLICE_X41Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X40Y65": "SLICEL", + "SLICE_X41Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X40Y66": "SLICEL", + "SLICE_X41Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X40Y67": "SLICEL", + "SLICE_X41Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X40Y68": "SLICEL", + "SLICE_X41Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X40Y69": "SLICEL", + "SLICE_X41Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X40Y70": "SLICEL", + "SLICE_X41Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X40Y71": "SLICEL", + "SLICE_X41Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X40Y72": "SLICEL", + "SLICE_X41Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X40Y73": "SLICEL", + "SLICE_X41Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X40Y74": "SLICEL", + "SLICE_X41Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X40Y75": "SLICEL", + "SLICE_X41Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X40Y76": "SLICEL", + "SLICE_X41Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X40Y77": "SLICEL", + "SLICE_X41Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X40Y78": "SLICEL", + "SLICE_X41Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X40Y79": "SLICEL", + "SLICE_X41Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X40Y80": "SLICEL", + "SLICE_X41Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X40Y81": "SLICEL", + "SLICE_X41Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X40Y82": "SLICEL", + "SLICE_X41Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X40Y83": "SLICEL", + "SLICE_X41Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X40Y84": "SLICEL", + "SLICE_X41Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X40Y85": "SLICEL", + "SLICE_X41Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X40Y86": "SLICEL", + "SLICE_X41Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X40Y87": "SLICEL", + "SLICE_X41Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X40Y88": "SLICEL", + "SLICE_X41Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X40Y89": "SLICEL", + "SLICE_X41Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X40Y90": "SLICEL", + "SLICE_X41Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X40Y91": "SLICEL", + "SLICE_X41Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X40Y92": "SLICEL", + "SLICE_X41Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X40Y93": "SLICEL", + "SLICE_X41Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X40Y94": "SLICEL", + "SLICE_X41Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X40Y95": "SLICEL", + "SLICE_X41Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X40Y96": "SLICEL", + "SLICE_X41Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X40Y97": "SLICEL", + "SLICE_X41Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X40Y98": "SLICEL", + "SLICE_X41Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 67, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X40Y99": "SLICEL", + "SLICE_X41Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X40Y100": "SLICEL", + "SLICE_X41Y100": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X40Y101": "SLICEL", + "SLICE_X41Y101": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X40Y102": "SLICEL", + "SLICE_X41Y102": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X40Y103": "SLICEL", + "SLICE_X41Y103": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X40Y104": "SLICEL", + "SLICE_X41Y104": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X40Y105": "SLICEL", + "SLICE_X41Y105": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X40Y106": "SLICEL", + "SLICE_X41Y106": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X40Y107": "SLICEL", + "SLICE_X41Y107": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X40Y108": "SLICEL", + "SLICE_X41Y108": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X40Y109": "SLICEL", + "SLICE_X41Y109": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X40Y110": "SLICEL", + "SLICE_X41Y110": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X40Y111": "SLICEL", + "SLICE_X41Y111": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X40Y112": "SLICEL", + "SLICE_X41Y112": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X40Y113": "SLICEL", + "SLICE_X41Y113": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X40Y114": "SLICEL", + "SLICE_X41Y114": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X40Y115": "SLICEL", + "SLICE_X41Y115": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X40Y116": "SLICEL", + "SLICE_X41Y116": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X40Y117": "SLICEL", + "SLICE_X41Y117": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X40Y118": "SLICEL", + "SLICE_X41Y118": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X40Y119": "SLICEL", + "SLICE_X41Y119": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X40Y120": "SLICEL", + "SLICE_X41Y120": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X40Y121": "SLICEL", + "SLICE_X41Y121": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X40Y122": "SLICEL", + "SLICE_X41Y122": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X40Y123": "SLICEL", + "SLICE_X41Y123": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X40Y124": "SLICEL", + "SLICE_X41Y124": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X40Y125": "SLICEL", + "SLICE_X41Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X40Y126": "SLICEL", + "SLICE_X41Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X40Y127": "SLICEL", + "SLICE_X41Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X40Y128": "SLICEL", + "SLICE_X41Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X40Y129": "SLICEL", + "SLICE_X41Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X40Y130": "SLICEL", + "SLICE_X41Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X40Y131": "SLICEL", + "SLICE_X41Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X40Y132": "SLICEL", + "SLICE_X41Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X40Y133": "SLICEL", + "SLICE_X41Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X40Y134": "SLICEL", + "SLICE_X41Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X40Y135": "SLICEL", + "SLICE_X41Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X40Y136": "SLICEL", + "SLICE_X41Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X40Y137": "SLICEL", + "SLICE_X41Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X40Y138": "SLICEL", + "SLICE_X41Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X40Y139": "SLICEL", + "SLICE_X41Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X40Y140": "SLICEL", + "SLICE_X41Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X40Y141": "SLICEL", + "SLICE_X41Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X40Y142": "SLICEL", + "SLICE_X41Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X40Y143": "SLICEL", + "SLICE_X41Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X40Y144": "SLICEL", + "SLICE_X41Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X40Y145": "SLICEL", + "SLICE_X41Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X40Y146": "SLICEL", + "SLICE_X41Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X40Y147": "SLICEL", + "SLICE_X41Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X40Y148": "SLICEL", + "SLICE_X41Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X26Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 67, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X40Y149": "SLICEL", + "SLICE_X41Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X44Y0": "SLICEL", + "SLICE_X45Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X44Y1": "SLICEL", + "SLICE_X45Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X44Y2": "SLICEL", + "SLICE_X45Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X44Y3": "SLICEL", + "SLICE_X45Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X44Y4": "SLICEL", + "SLICE_X45Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X44Y5": "SLICEL", + "SLICE_X45Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X44Y6": "SLICEL", + "SLICE_X45Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X44Y7": "SLICEL", + "SLICE_X45Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X44Y8": "SLICEL", + "SLICE_X45Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X44Y9": "SLICEL", + "SLICE_X45Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X44Y10": "SLICEL", + "SLICE_X45Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X44Y11": "SLICEL", + "SLICE_X45Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X44Y12": "SLICEL", + "SLICE_X45Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X44Y13": "SLICEL", + "SLICE_X45Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X44Y14": "SLICEL", + "SLICE_X45Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X44Y15": "SLICEL", + "SLICE_X45Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X44Y16": "SLICEL", + "SLICE_X45Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X44Y17": "SLICEL", + "SLICE_X45Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X44Y18": "SLICEL", + "SLICE_X45Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X44Y19": "SLICEL", + "SLICE_X45Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X44Y20": "SLICEL", + "SLICE_X45Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X44Y21": "SLICEL", + "SLICE_X45Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X44Y22": "SLICEL", + "SLICE_X45Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X44Y23": "SLICEL", + "SLICE_X45Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X44Y24": "SLICEL", + "SLICE_X45Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X44Y25": "SLICEL", + "SLICE_X45Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X44Y26": "SLICEL", + "SLICE_X45Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X44Y27": "SLICEL", + "SLICE_X45Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X44Y28": "SLICEL", + "SLICE_X45Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X44Y29": "SLICEL", + "SLICE_X45Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X44Y30": "SLICEL", + "SLICE_X45Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X44Y31": "SLICEL", + "SLICE_X45Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X44Y32": "SLICEL", + "SLICE_X45Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X44Y33": "SLICEL", + "SLICE_X45Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X44Y34": "SLICEL", + "SLICE_X45Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X44Y35": "SLICEL", + "SLICE_X45Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X44Y36": "SLICEL", + "SLICE_X45Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X44Y37": "SLICEL", + "SLICE_X45Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X44Y38": "SLICEL", + "SLICE_X45Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X44Y39": "SLICEL", + "SLICE_X45Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X44Y40": "SLICEL", + "SLICE_X45Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X44Y41": "SLICEL", + "SLICE_X45Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X44Y42": "SLICEL", + "SLICE_X45Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X44Y43": "SLICEL", + "SLICE_X45Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X44Y44": "SLICEL", + "SLICE_X45Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X44Y45": "SLICEL", + "SLICE_X45Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X44Y46": "SLICEL", + "SLICE_X45Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X44Y47": "SLICEL", + "SLICE_X45Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X44Y48": "SLICEL", + "SLICE_X45Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 71, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X44Y49": "SLICEL", + "SLICE_X45Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X44Y50": "SLICEL", + "SLICE_X45Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X44Y51": "SLICEL", + "SLICE_X45Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X44Y52": "SLICEL", + "SLICE_X45Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X44Y53": "SLICEL", + "SLICE_X45Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X44Y54": "SLICEL", + "SLICE_X45Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X44Y55": "SLICEL", + "SLICE_X45Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X44Y56": "SLICEL", + "SLICE_X45Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X44Y57": "SLICEL", + "SLICE_X45Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X44Y58": "SLICEL", + "SLICE_X45Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X44Y59": "SLICEL", + "SLICE_X45Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X44Y60": "SLICEL", + "SLICE_X45Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X44Y61": "SLICEL", + "SLICE_X45Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X44Y62": "SLICEL", + "SLICE_X45Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X44Y63": "SLICEL", + "SLICE_X45Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X44Y64": "SLICEL", + "SLICE_X45Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X44Y65": "SLICEL", + "SLICE_X45Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X44Y66": "SLICEL", + "SLICE_X45Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X44Y67": "SLICEL", + "SLICE_X45Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X44Y68": "SLICEL", + "SLICE_X45Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X44Y69": "SLICEL", + "SLICE_X45Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X44Y70": "SLICEL", + "SLICE_X45Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X44Y71": "SLICEL", + "SLICE_X45Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X44Y72": "SLICEL", + "SLICE_X45Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X44Y73": "SLICEL", + "SLICE_X45Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X44Y74": "SLICEL", + "SLICE_X45Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X44Y75": "SLICEL", + "SLICE_X45Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X44Y76": "SLICEL", + "SLICE_X45Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X44Y77": "SLICEL", + "SLICE_X45Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X44Y78": "SLICEL", + "SLICE_X45Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X44Y79": "SLICEL", + "SLICE_X45Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X44Y80": "SLICEL", + "SLICE_X45Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X44Y81": "SLICEL", + "SLICE_X45Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X44Y82": "SLICEL", + "SLICE_X45Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X44Y83": "SLICEL", + "SLICE_X45Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X44Y84": "SLICEL", + "SLICE_X45Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X44Y85": "SLICEL", + "SLICE_X45Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X44Y86": "SLICEL", + "SLICE_X45Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X44Y87": "SLICEL", + "SLICE_X45Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X44Y88": "SLICEL", + "SLICE_X45Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X44Y89": "SLICEL", + "SLICE_X45Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X44Y90": "SLICEL", + "SLICE_X45Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X44Y91": "SLICEL", + "SLICE_X45Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X44Y92": "SLICEL", + "SLICE_X45Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X44Y93": "SLICEL", + "SLICE_X45Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X44Y94": "SLICEL", + "SLICE_X45Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X44Y95": "SLICEL", + "SLICE_X45Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X44Y96": "SLICEL", + "SLICE_X45Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X44Y97": "SLICEL", + "SLICE_X45Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X44Y98": "SLICEL", + "SLICE_X45Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 71, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X44Y99": "SLICEL", + "SLICE_X45Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X44Y125": "SLICEL", + "SLICE_X45Y125": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X44Y126": "SLICEL", + "SLICE_X45Y126": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X44Y127": "SLICEL", + "SLICE_X45Y127": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X44Y128": "SLICEL", + "SLICE_X45Y128": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X44Y129": "SLICEL", + "SLICE_X45Y129": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X44Y130": "SLICEL", + "SLICE_X45Y130": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X44Y131": "SLICEL", + "SLICE_X45Y131": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X44Y132": "SLICEL", + "SLICE_X45Y132": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X44Y133": "SLICEL", + "SLICE_X45Y133": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X44Y134": "SLICEL", + "SLICE_X45Y134": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X44Y135": "SLICEL", + "SLICE_X45Y135": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X44Y136": "SLICEL", + "SLICE_X45Y136": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X44Y137": "SLICEL", + "SLICE_X45Y137": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X44Y138": "SLICEL", + "SLICE_X45Y138": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X44Y139": "SLICEL", + "SLICE_X45Y139": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X44Y140": "SLICEL", + "SLICE_X45Y140": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X44Y141": "SLICEL", + "SLICE_X45Y141": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X44Y142": "SLICEL", + "SLICE_X45Y142": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X44Y143": "SLICEL", + "SLICE_X45Y143": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X44Y144": "SLICEL", + "SLICE_X45Y144": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X44Y145": "SLICEL", + "SLICE_X45Y145": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X44Y146": "SLICEL", + "SLICE_X45Y146": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X44Y147": "SLICEL", + "SLICE_X45Y147": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X44Y148": "SLICEL", + "SLICE_X45Y148": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X28Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X44Y149": "SLICEL", + "SLICE_X45Y149": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X58Y0": "SLICEL", + "SLICE_X59Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X58Y1": "SLICEL", + "SLICE_X59Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X58Y2": "SLICEL", + "SLICE_X59Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X58Y3": "SLICEL", + "SLICE_X59Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X58Y4": "SLICEL", + "SLICE_X59Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X58Y5": "SLICEL", + "SLICE_X59Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X58Y6": "SLICEL", + "SLICE_X59Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X58Y7": "SLICEL", + "SLICE_X59Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X58Y8": "SLICEL", + "SLICE_X59Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X58Y9": "SLICEL", + "SLICE_X59Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X58Y10": "SLICEL", + "SLICE_X59Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X58Y11": "SLICEL", + "SLICE_X59Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X58Y12": "SLICEL", + "SLICE_X59Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X58Y13": "SLICEL", + "SLICE_X59Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X58Y14": "SLICEL", + "SLICE_X59Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X58Y15": "SLICEL", + "SLICE_X59Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X58Y16": "SLICEL", + "SLICE_X59Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X58Y17": "SLICEL", + "SLICE_X59Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X58Y18": "SLICEL", + "SLICE_X59Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X58Y19": "SLICEL", + "SLICE_X59Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X58Y20": "SLICEL", + "SLICE_X59Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X58Y21": "SLICEL", + "SLICE_X59Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X58Y22": "SLICEL", + "SLICE_X59Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X58Y23": "SLICEL", + "SLICE_X59Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X58Y24": "SLICEL", + "SLICE_X59Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X58Y25": "SLICEL", + "SLICE_X59Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X58Y26": "SLICEL", + "SLICE_X59Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X58Y27": "SLICEL", + "SLICE_X59Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X58Y28": "SLICEL", + "SLICE_X59Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X58Y29": "SLICEL", + "SLICE_X59Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X58Y30": "SLICEL", + "SLICE_X59Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X58Y31": "SLICEL", + "SLICE_X59Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X58Y32": "SLICEL", + "SLICE_X59Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X58Y33": "SLICEL", + "SLICE_X59Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X58Y34": "SLICEL", + "SLICE_X59Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X58Y35": "SLICEL", + "SLICE_X59Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X58Y36": "SLICEL", + "SLICE_X59Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X58Y37": "SLICEL", + "SLICE_X59Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X58Y38": "SLICEL", + "SLICE_X59Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X58Y39": "SLICEL", + "SLICE_X59Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X58Y40": "SLICEL", + "SLICE_X59Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X58Y41": "SLICEL", + "SLICE_X59Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X58Y42": "SLICEL", + "SLICE_X59Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X58Y43": "SLICEL", + "SLICE_X59Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X58Y44": "SLICEL", + "SLICE_X59Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X58Y45": "SLICEL", + "SLICE_X59Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X58Y46": "SLICEL", + "SLICE_X59Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X58Y47": "SLICEL", + "SLICE_X59Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X58Y48": "SLICEL", + "SLICE_X59Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 97, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X58Y49": "SLICEL", + "SLICE_X59Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X58Y50": "SLICEL", + "SLICE_X59Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X58Y51": "SLICEL", + "SLICE_X59Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X58Y52": "SLICEL", + "SLICE_X59Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X58Y53": "SLICEL", + "SLICE_X59Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X58Y54": "SLICEL", + "SLICE_X59Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X58Y55": "SLICEL", + "SLICE_X59Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X58Y56": "SLICEL", + "SLICE_X59Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X58Y57": "SLICEL", + "SLICE_X59Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X58Y58": "SLICEL", + "SLICE_X59Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X58Y59": "SLICEL", + "SLICE_X59Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X58Y60": "SLICEL", + "SLICE_X59Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X58Y61": "SLICEL", + "SLICE_X59Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X58Y62": "SLICEL", + "SLICE_X59Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X58Y63": "SLICEL", + "SLICE_X59Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X58Y64": "SLICEL", + "SLICE_X59Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X58Y65": "SLICEL", + "SLICE_X59Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X58Y66": "SLICEL", + "SLICE_X59Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X58Y67": "SLICEL", + "SLICE_X59Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X58Y68": "SLICEL", + "SLICE_X59Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X58Y69": "SLICEL", + "SLICE_X59Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X58Y70": "SLICEL", + "SLICE_X59Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X58Y71": "SLICEL", + "SLICE_X59Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X58Y72": "SLICEL", + "SLICE_X59Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X58Y73": "SLICEL", + "SLICE_X59Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X58Y74": "SLICEL", + "SLICE_X59Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X58Y75": "SLICEL", + "SLICE_X59Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X58Y76": "SLICEL", + "SLICE_X59Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X58Y77": "SLICEL", + "SLICE_X59Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X58Y78": "SLICEL", + "SLICE_X59Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X58Y79": "SLICEL", + "SLICE_X59Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X58Y80": "SLICEL", + "SLICE_X59Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X58Y81": "SLICEL", + "SLICE_X59Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X58Y82": "SLICEL", + "SLICE_X59Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X58Y83": "SLICEL", + "SLICE_X59Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X58Y84": "SLICEL", + "SLICE_X59Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X58Y85": "SLICEL", + "SLICE_X59Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X58Y86": "SLICEL", + "SLICE_X59Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X58Y87": "SLICEL", + "SLICE_X59Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X58Y88": "SLICEL", + "SLICE_X59Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X58Y89": "SLICEL", + "SLICE_X59Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X58Y90": "SLICEL", + "SLICE_X59Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X58Y91": "SLICEL", + "SLICE_X59Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X58Y92": "SLICEL", + "SLICE_X59Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X58Y93": "SLICEL", + "SLICE_X59Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X58Y94": "SLICEL", + "SLICE_X59Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X58Y95": "SLICEL", + "SLICE_X59Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X58Y96": "SLICEL", + "SLICE_X59Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X58Y97": "SLICEL", + "SLICE_X59Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X58Y98": "SLICEL", + "SLICE_X59Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X38Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 97, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X58Y99": "SLICEL", + "SLICE_X59Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X62Y0": "SLICEL", + "SLICE_X63Y0": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X62Y1": "SLICEL", + "SLICE_X63Y1": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X62Y2": "SLICEL", + "SLICE_X63Y2": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X62Y3": "SLICEL", + "SLICE_X63Y3": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X62Y4": "SLICEL", + "SLICE_X63Y4": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X62Y5": "SLICEL", + "SLICE_X63Y5": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X62Y6": "SLICEL", + "SLICE_X63Y6": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X62Y7": "SLICEL", + "SLICE_X63Y7": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X62Y8": "SLICEL", + "SLICE_X63Y8": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X62Y9": "SLICEL", + "SLICE_X63Y9": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X62Y10": "SLICEL", + "SLICE_X63Y10": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X62Y11": "SLICEL", + "SLICE_X63Y11": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X62Y12": "SLICEL", + "SLICE_X63Y12": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X62Y13": "SLICEL", + "SLICE_X63Y13": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X62Y14": "SLICEL", + "SLICE_X63Y14": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X62Y15": "SLICEL", + "SLICE_X63Y15": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X62Y16": "SLICEL", + "SLICE_X63Y16": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X62Y17": "SLICEL", + "SLICE_X63Y17": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X62Y18": "SLICEL", + "SLICE_X63Y18": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X62Y19": "SLICEL", + "SLICE_X63Y19": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X62Y20": "SLICEL", + "SLICE_X63Y20": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X62Y21": "SLICEL", + "SLICE_X63Y21": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X62Y22": "SLICEL", + "SLICE_X63Y22": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X62Y23": "SLICEL", + "SLICE_X63Y23": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X62Y24": "SLICEL", + "SLICE_X63Y24": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X62Y25": "SLICEL", + "SLICE_X63Y25": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X62Y26": "SLICEL", + "SLICE_X63Y26": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X62Y27": "SLICEL", + "SLICE_X63Y27": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X62Y28": "SLICEL", + "SLICE_X63Y28": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X62Y29": "SLICEL", + "SLICE_X63Y29": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X62Y30": "SLICEL", + "SLICE_X63Y30": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X62Y31": "SLICEL", + "SLICE_X63Y31": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X62Y32": "SLICEL", + "SLICE_X63Y32": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X62Y33": "SLICEL", + "SLICE_X63Y33": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X62Y34": "SLICEL", + "SLICE_X63Y34": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X62Y35": "SLICEL", + "SLICE_X63Y35": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X62Y36": "SLICEL", + "SLICE_X63Y36": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X62Y37": "SLICEL", + "SLICE_X63Y37": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X62Y38": "SLICEL", + "SLICE_X63Y38": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X62Y39": "SLICEL", + "SLICE_X63Y39": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X62Y40": "SLICEL", + "SLICE_X63Y40": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X62Y41": "SLICEL", + "SLICE_X63Y41": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X62Y42": "SLICEL", + "SLICE_X63Y42": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X62Y43": "SLICEL", + "SLICE_X63Y43": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X62Y44": "SLICEL", + "SLICE_X63Y44": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X62Y45": "SLICEL", + "SLICE_X63Y45": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X62Y46": "SLICEL", + "SLICE_X63Y46": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X62Y47": "SLICEL", + "SLICE_X63Y47": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X62Y48": "SLICEL", + "SLICE_X63Y48": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 101, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X62Y49": "SLICEL", + "SLICE_X63Y49": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X62Y50": "SLICEL", + "SLICE_X63Y50": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X62Y51": "SLICEL", + "SLICE_X63Y51": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X62Y52": "SLICEL", + "SLICE_X63Y52": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X62Y53": "SLICEL", + "SLICE_X63Y53": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X62Y54": "SLICEL", + "SLICE_X63Y54": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X62Y55": "SLICEL", + "SLICE_X63Y55": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X62Y56": "SLICEL", + "SLICE_X63Y56": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X62Y57": "SLICEL", + "SLICE_X63Y57": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X62Y58": "SLICEL", + "SLICE_X63Y58": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X62Y59": "SLICEL", + "SLICE_X63Y59": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X62Y60": "SLICEL", + "SLICE_X63Y60": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X62Y61": "SLICEL", + "SLICE_X63Y61": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X62Y62": "SLICEL", + "SLICE_X63Y62": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X62Y63": "SLICEL", + "SLICE_X63Y63": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X62Y64": "SLICEL", + "SLICE_X63Y64": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X62Y65": "SLICEL", + "SLICE_X63Y65": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X62Y66": "SLICEL", + "SLICE_X63Y66": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X62Y67": "SLICEL", + "SLICE_X63Y67": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X62Y68": "SLICEL", + "SLICE_X63Y68": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X62Y69": "SLICEL", + "SLICE_X63Y69": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X62Y70": "SLICEL", + "SLICE_X63Y70": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X62Y71": "SLICEL", + "SLICE_X63Y71": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X62Y72": "SLICEL", + "SLICE_X63Y72": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X62Y73": "SLICEL", + "SLICE_X63Y73": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X62Y74": "SLICEL", + "SLICE_X63Y74": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X62Y75": "SLICEL", + "SLICE_X63Y75": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X62Y76": "SLICEL", + "SLICE_X63Y76": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X62Y77": "SLICEL", + "SLICE_X63Y77": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X62Y78": "SLICEL", + "SLICE_X63Y78": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X62Y79": "SLICEL", + "SLICE_X63Y79": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X62Y80": "SLICEL", + "SLICE_X63Y80": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X62Y81": "SLICEL", + "SLICE_X63Y81": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X62Y82": "SLICEL", + "SLICE_X63Y82": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X62Y83": "SLICEL", + "SLICE_X63Y83": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X62Y84": "SLICEL", + "SLICE_X63Y84": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X62Y85": "SLICEL", + "SLICE_X63Y85": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X62Y86": "SLICEL", + "SLICE_X63Y86": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X62Y87": "SLICEL", + "SLICE_X63Y87": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X62Y88": "SLICEL", + "SLICE_X63Y88": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X62Y89": "SLICEL", + "SLICE_X63Y89": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X62Y90": "SLICEL", + "SLICE_X63Y90": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X62Y91": "SLICEL", + "SLICE_X63Y91": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X62Y92": "SLICEL", + "SLICE_X63Y92": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X62Y93": "SLICEL", + "SLICE_X63Y93": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X62Y94": "SLICEL", + "SLICE_X63Y94": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X62Y95": "SLICEL", + "SLICE_X63Y95": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X62Y96": "SLICEL", + "SLICE_X63Y96": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X62Y97": "SLICEL", + "SLICE_X63Y97": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X62Y98": "SLICEL", + "SLICE_X63Y98": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_L_X40Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 101, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X62Y99": "SLICEL", + "SLICE_X63Y99": "SLICEL" + }, + "type": "CLBLL_L" + }, + "CLBLL_R_X13Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X18Y100": "SLICEL", + "SLICE_X19Y100": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X18Y101": "SLICEL", + "SLICE_X19Y101": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X18Y102": "SLICEL", + "SLICE_X19Y102": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X18Y103": "SLICEL", + "SLICE_X19Y103": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X18Y104": "SLICEL", + "SLICE_X19Y104": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X18Y105": "SLICEL", + "SLICE_X19Y105": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X18Y106": "SLICEL", + "SLICE_X19Y106": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X18Y107": "SLICEL", + "SLICE_X19Y107": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X18Y108": "SLICEL", + "SLICE_X19Y108": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X18Y109": "SLICEL", + "SLICE_X19Y109": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X18Y110": "SLICEL", + "SLICE_X19Y110": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X18Y111": "SLICEL", + "SLICE_X19Y111": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X18Y112": "SLICEL", + "SLICE_X19Y112": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X18Y113": "SLICEL", + "SLICE_X19Y113": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X18Y114": "SLICEL", + "SLICE_X19Y114": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X18Y115": "SLICEL", + "SLICE_X19Y115": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X18Y116": "SLICEL", + "SLICE_X19Y116": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X18Y117": "SLICEL", + "SLICE_X19Y117": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X18Y118": "SLICEL", + "SLICE_X19Y118": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X18Y119": "SLICEL", + "SLICE_X19Y119": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X18Y120": "SLICEL", + "SLICE_X19Y120": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X18Y121": "SLICEL", + "SLICE_X19Y121": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X18Y122": "SLICEL", + "SLICE_X19Y122": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X18Y123": "SLICEL", + "SLICE_X19Y123": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X18Y124": "SLICEL", + "SLICE_X19Y124": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X18Y125": "SLICEL", + "SLICE_X19Y125": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X18Y126": "SLICEL", + "SLICE_X19Y126": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X18Y127": "SLICEL", + "SLICE_X19Y127": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X18Y128": "SLICEL", + "SLICE_X19Y128": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X18Y129": "SLICEL", + "SLICE_X19Y129": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X18Y130": "SLICEL", + "SLICE_X19Y130": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X18Y131": "SLICEL", + "SLICE_X19Y131": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X18Y132": "SLICEL", + "SLICE_X19Y132": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X18Y133": "SLICEL", + "SLICE_X19Y133": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X18Y134": "SLICEL", + "SLICE_X19Y134": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X18Y135": "SLICEL", + "SLICE_X19Y135": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X18Y136": "SLICEL", + "SLICE_X19Y136": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X18Y137": "SLICEL", + "SLICE_X19Y137": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X18Y138": "SLICEL", + "SLICE_X19Y138": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X18Y139": "SLICEL", + "SLICE_X19Y139": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X18Y140": "SLICEL", + "SLICE_X19Y140": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X18Y141": "SLICEL", + "SLICE_X19Y141": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X18Y142": "SLICEL", + "SLICE_X19Y142": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X18Y143": "SLICEL", + "SLICE_X19Y143": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X18Y144": "SLICEL", + "SLICE_X19Y144": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X18Y145": "SLICEL", + "SLICE_X19Y145": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X18Y146": "SLICEL", + "SLICE_X19Y146": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X18Y147": "SLICEL", + "SLICE_X19Y147": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X18Y148": "SLICEL", + "SLICE_X19Y148": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X13Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 38, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X18Y149": "SLICEL", + "SLICE_X19Y149": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X22Y100": "SLICEL", + "SLICE_X23Y100": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X22Y101": "SLICEL", + "SLICE_X23Y101": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X22Y102": "SLICEL", + "SLICE_X23Y102": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X22Y103": "SLICEL", + "SLICE_X23Y103": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X22Y104": "SLICEL", + "SLICE_X23Y104": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X22Y105": "SLICEL", + "SLICE_X23Y105": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X22Y106": "SLICEL", + "SLICE_X23Y106": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X22Y107": "SLICEL", + "SLICE_X23Y107": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X22Y108": "SLICEL", + "SLICE_X23Y108": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X22Y109": "SLICEL", + "SLICE_X23Y109": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X22Y110": "SLICEL", + "SLICE_X23Y110": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X22Y111": "SLICEL", + "SLICE_X23Y111": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X22Y112": "SLICEL", + "SLICE_X23Y112": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X22Y113": "SLICEL", + "SLICE_X23Y113": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X22Y114": "SLICEL", + "SLICE_X23Y114": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X22Y115": "SLICEL", + "SLICE_X23Y115": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X22Y116": "SLICEL", + "SLICE_X23Y116": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X22Y117": "SLICEL", + "SLICE_X23Y117": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X22Y118": "SLICEL", + "SLICE_X23Y118": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X22Y119": "SLICEL", + "SLICE_X23Y119": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X22Y120": "SLICEL", + "SLICE_X23Y120": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X22Y121": "SLICEL", + "SLICE_X23Y121": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X22Y122": "SLICEL", + "SLICE_X23Y122": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X22Y123": "SLICEL", + "SLICE_X23Y123": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X22Y124": "SLICEL", + "SLICE_X23Y124": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X22Y125": "SLICEL", + "SLICE_X23Y125": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X22Y126": "SLICEL", + "SLICE_X23Y126": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X22Y127": "SLICEL", + "SLICE_X23Y127": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X22Y128": "SLICEL", + "SLICE_X23Y128": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X22Y129": "SLICEL", + "SLICE_X23Y129": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X22Y130": "SLICEL", + "SLICE_X23Y130": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X22Y131": "SLICEL", + "SLICE_X23Y131": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X22Y132": "SLICEL", + "SLICE_X23Y132": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X22Y133": "SLICEL", + "SLICE_X23Y133": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X22Y134": "SLICEL", + "SLICE_X23Y134": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X22Y135": "SLICEL", + "SLICE_X23Y135": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X22Y136": "SLICEL", + "SLICE_X23Y136": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X22Y137": "SLICEL", + "SLICE_X23Y137": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X22Y138": "SLICEL", + "SLICE_X23Y138": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X22Y139": "SLICEL", + "SLICE_X23Y139": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X22Y140": "SLICEL", + "SLICE_X23Y140": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X22Y141": "SLICEL", + "SLICE_X23Y141": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X22Y142": "SLICEL", + "SLICE_X23Y142": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X22Y143": "SLICEL", + "SLICE_X23Y143": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X22Y144": "SLICEL", + "SLICE_X23Y144": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X22Y145": "SLICEL", + "SLICE_X23Y145": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X22Y146": "SLICEL", + "SLICE_X23Y146": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X22Y147": "SLICEL", + "SLICE_X23Y147": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X22Y148": "SLICEL", + "SLICE_X23Y148": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X15Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 42, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X22Y149": "SLICEL", + "SLICE_X23Y149": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X26Y100": "SLICEL", + "SLICE_X27Y100": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X26Y101": "SLICEL", + "SLICE_X27Y101": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X26Y102": "SLICEL", + "SLICE_X27Y102": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X26Y103": "SLICEL", + "SLICE_X27Y103": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X26Y104": "SLICEL", + "SLICE_X27Y104": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X26Y105": "SLICEL", + "SLICE_X27Y105": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X26Y106": "SLICEL", + "SLICE_X27Y106": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X26Y107": "SLICEL", + "SLICE_X27Y107": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X26Y108": "SLICEL", + "SLICE_X27Y108": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X26Y109": "SLICEL", + "SLICE_X27Y109": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X26Y110": "SLICEL", + "SLICE_X27Y110": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X26Y111": "SLICEL", + "SLICE_X27Y111": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X26Y112": "SLICEL", + "SLICE_X27Y112": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X26Y113": "SLICEL", + "SLICE_X27Y113": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X26Y114": "SLICEL", + "SLICE_X27Y114": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X26Y115": "SLICEL", + "SLICE_X27Y115": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X26Y116": "SLICEL", + "SLICE_X27Y116": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X26Y117": "SLICEL", + "SLICE_X27Y117": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X26Y118": "SLICEL", + "SLICE_X27Y118": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X26Y119": "SLICEL", + "SLICE_X27Y119": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X26Y120": "SLICEL", + "SLICE_X27Y120": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X26Y121": "SLICEL", + "SLICE_X27Y121": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X26Y122": "SLICEL", + "SLICE_X27Y122": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X26Y123": "SLICEL", + "SLICE_X27Y123": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X26Y124": "SLICEL", + "SLICE_X27Y124": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X26Y125": "SLICEL", + "SLICE_X27Y125": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X26Y126": "SLICEL", + "SLICE_X27Y126": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X26Y127": "SLICEL", + "SLICE_X27Y127": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X26Y128": "SLICEL", + "SLICE_X27Y128": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X26Y129": "SLICEL", + "SLICE_X27Y129": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X26Y130": "SLICEL", + "SLICE_X27Y130": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X26Y131": "SLICEL", + "SLICE_X27Y131": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X26Y132": "SLICEL", + "SLICE_X27Y132": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X26Y133": "SLICEL", + "SLICE_X27Y133": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X26Y134": "SLICEL", + "SLICE_X27Y134": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X26Y135": "SLICEL", + "SLICE_X27Y135": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X26Y136": "SLICEL", + "SLICE_X27Y136": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X26Y137": "SLICEL", + "SLICE_X27Y137": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X26Y138": "SLICEL", + "SLICE_X27Y138": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X26Y139": "SLICEL", + "SLICE_X27Y139": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X26Y140": "SLICEL", + "SLICE_X27Y140": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X26Y141": "SLICEL", + "SLICE_X27Y141": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X26Y142": "SLICEL", + "SLICE_X27Y142": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X26Y143": "SLICEL", + "SLICE_X27Y143": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X26Y144": "SLICEL", + "SLICE_X27Y144": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X26Y145": "SLICEL", + "SLICE_X27Y145": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X26Y146": "SLICEL", + "SLICE_X27Y146": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X26Y147": "SLICEL", + "SLICE_X27Y147": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X26Y148": "SLICEL", + "SLICE_X27Y148": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X17Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 46, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X26Y149": "SLICEL", + "SLICE_X27Y149": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X28Y0": "SLICEL", + "SLICE_X29Y0": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X28Y1": "SLICEL", + "SLICE_X29Y1": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X28Y2": "SLICEL", + "SLICE_X29Y2": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X28Y3": "SLICEL", + "SLICE_X29Y3": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X28Y4": "SLICEL", + "SLICE_X29Y4": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X28Y5": "SLICEL", + "SLICE_X29Y5": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X28Y6": "SLICEL", + "SLICE_X29Y6": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X28Y7": "SLICEL", + "SLICE_X29Y7": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X28Y8": "SLICEL", + "SLICE_X29Y8": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X28Y9": "SLICEL", + "SLICE_X29Y9": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X28Y10": "SLICEL", + "SLICE_X29Y10": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X28Y11": "SLICEL", + "SLICE_X29Y11": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X28Y12": "SLICEL", + "SLICE_X29Y12": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X28Y13": "SLICEL", + "SLICE_X29Y13": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X28Y14": "SLICEL", + "SLICE_X29Y14": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X28Y15": "SLICEL", + "SLICE_X29Y15": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X28Y16": "SLICEL", + "SLICE_X29Y16": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X28Y17": "SLICEL", + "SLICE_X29Y17": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X28Y18": "SLICEL", + "SLICE_X29Y18": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X28Y19": "SLICEL", + "SLICE_X29Y19": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X28Y20": "SLICEL", + "SLICE_X29Y20": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X28Y21": "SLICEL", + "SLICE_X29Y21": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X28Y22": "SLICEL", + "SLICE_X29Y22": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X28Y23": "SLICEL", + "SLICE_X29Y23": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X28Y24": "SLICEL", + "SLICE_X29Y24": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X28Y25": "SLICEL", + "SLICE_X29Y25": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X28Y26": "SLICEL", + "SLICE_X29Y26": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X28Y27": "SLICEL", + "SLICE_X29Y27": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X28Y28": "SLICEL", + "SLICE_X29Y28": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X28Y29": "SLICEL", + "SLICE_X29Y29": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X28Y30": "SLICEL", + "SLICE_X29Y30": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X28Y31": "SLICEL", + "SLICE_X29Y31": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X28Y32": "SLICEL", + "SLICE_X29Y32": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X28Y33": "SLICEL", + "SLICE_X29Y33": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X28Y34": "SLICEL", + "SLICE_X29Y34": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X28Y35": "SLICEL", + "SLICE_X29Y35": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X28Y36": "SLICEL", + "SLICE_X29Y36": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X28Y37": "SLICEL", + "SLICE_X29Y37": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X28Y38": "SLICEL", + "SLICE_X29Y38": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X28Y39": "SLICEL", + "SLICE_X29Y39": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X28Y40": "SLICEL", + "SLICE_X29Y40": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X28Y41": "SLICEL", + "SLICE_X29Y41": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X28Y42": "SLICEL", + "SLICE_X29Y42": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X28Y43": "SLICEL", + "SLICE_X29Y43": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X28Y44": "SLICEL", + "SLICE_X29Y44": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X28Y45": "SLICEL", + "SLICE_X29Y45": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X28Y46": "SLICEL", + "SLICE_X29Y46": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X28Y47": "SLICEL", + "SLICE_X29Y47": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X28Y48": "SLICEL", + "SLICE_X29Y48": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 51, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X28Y49": "SLICEL", + "SLICE_X29Y49": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X28Y50": "SLICEL", + "SLICE_X29Y50": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X28Y51": "SLICEL", + "SLICE_X29Y51": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X28Y52": "SLICEL", + "SLICE_X29Y52": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X28Y53": "SLICEL", + "SLICE_X29Y53": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X28Y54": "SLICEL", + "SLICE_X29Y54": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X28Y55": "SLICEL", + "SLICE_X29Y55": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X28Y56": "SLICEL", + "SLICE_X29Y56": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X28Y57": "SLICEL", + "SLICE_X29Y57": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X28Y58": "SLICEL", + "SLICE_X29Y58": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X28Y59": "SLICEL", + "SLICE_X29Y59": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X28Y60": "SLICEL", + "SLICE_X29Y60": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X28Y61": "SLICEL", + "SLICE_X29Y61": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X28Y62": "SLICEL", + "SLICE_X29Y62": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X28Y63": "SLICEL", + "SLICE_X29Y63": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X28Y64": "SLICEL", + "SLICE_X29Y64": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X28Y65": "SLICEL", + "SLICE_X29Y65": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X28Y66": "SLICEL", + "SLICE_X29Y66": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X28Y67": "SLICEL", + "SLICE_X29Y67": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X28Y68": "SLICEL", + "SLICE_X29Y68": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X28Y69": "SLICEL", + "SLICE_X29Y69": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X28Y70": "SLICEL", + "SLICE_X29Y70": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X28Y71": "SLICEL", + "SLICE_X29Y71": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X28Y72": "SLICEL", + "SLICE_X29Y72": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X28Y73": "SLICEL", + "SLICE_X29Y73": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X28Y74": "SLICEL", + "SLICE_X29Y74": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X28Y75": "SLICEL", + "SLICE_X29Y75": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X28Y76": "SLICEL", + "SLICE_X29Y76": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X28Y77": "SLICEL", + "SLICE_X29Y77": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X28Y78": "SLICEL", + "SLICE_X29Y78": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X28Y79": "SLICEL", + "SLICE_X29Y79": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X28Y80": "SLICEL", + "SLICE_X29Y80": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X28Y81": "SLICEL", + "SLICE_X29Y81": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X28Y82": "SLICEL", + "SLICE_X29Y82": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X28Y83": "SLICEL", + "SLICE_X29Y83": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X28Y84": "SLICEL", + "SLICE_X29Y84": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X28Y85": "SLICEL", + "SLICE_X29Y85": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X28Y86": "SLICEL", + "SLICE_X29Y86": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X28Y87": "SLICEL", + "SLICE_X29Y87": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X28Y88": "SLICEL", + "SLICE_X29Y88": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X28Y89": "SLICEL", + "SLICE_X29Y89": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X28Y90": "SLICEL", + "SLICE_X29Y90": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X28Y91": "SLICEL", + "SLICE_X29Y91": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X28Y92": "SLICEL", + "SLICE_X29Y92": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X28Y93": "SLICEL", + "SLICE_X29Y93": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X28Y94": "SLICEL", + "SLICE_X29Y94": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X28Y95": "SLICEL", + "SLICE_X29Y95": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X28Y96": "SLICEL", + "SLICE_X29Y96": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X28Y97": "SLICEL", + "SLICE_X29Y97": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X28Y98": "SLICEL", + "SLICE_X29Y98": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 51, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X28Y99": "SLICEL", + "SLICE_X29Y99": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X28Y100": "SLICEL", + "SLICE_X29Y100": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X28Y101": "SLICEL", + "SLICE_X29Y101": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X28Y102": "SLICEL", + "SLICE_X29Y102": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X28Y103": "SLICEL", + "SLICE_X29Y103": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X28Y104": "SLICEL", + "SLICE_X29Y104": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X28Y105": "SLICEL", + "SLICE_X29Y105": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X28Y106": "SLICEL", + "SLICE_X29Y106": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X28Y107": "SLICEL", + "SLICE_X29Y107": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X28Y108": "SLICEL", + "SLICE_X29Y108": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X28Y109": "SLICEL", + "SLICE_X29Y109": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X28Y110": "SLICEL", + "SLICE_X29Y110": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X28Y111": "SLICEL", + "SLICE_X29Y111": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X28Y112": "SLICEL", + "SLICE_X29Y112": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X28Y113": "SLICEL", + "SLICE_X29Y113": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X28Y114": "SLICEL", + "SLICE_X29Y114": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X28Y115": "SLICEL", + "SLICE_X29Y115": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X28Y116": "SLICEL", + "SLICE_X29Y116": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X28Y117": "SLICEL", + "SLICE_X29Y117": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X28Y118": "SLICEL", + "SLICE_X29Y118": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X28Y119": "SLICEL", + "SLICE_X29Y119": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X28Y120": "SLICEL", + "SLICE_X29Y120": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X28Y121": "SLICEL", + "SLICE_X29Y121": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X28Y122": "SLICEL", + "SLICE_X29Y122": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X28Y123": "SLICEL", + "SLICE_X29Y123": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X28Y124": "SLICEL", + "SLICE_X29Y124": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X28Y125": "SLICEL", + "SLICE_X29Y125": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X28Y126": "SLICEL", + "SLICE_X29Y126": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X28Y127": "SLICEL", + "SLICE_X29Y127": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X28Y128": "SLICEL", + "SLICE_X29Y128": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X28Y129": "SLICEL", + "SLICE_X29Y129": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X28Y130": "SLICEL", + "SLICE_X29Y130": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X28Y131": "SLICEL", + "SLICE_X29Y131": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X28Y132": "SLICEL", + "SLICE_X29Y132": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X28Y133": "SLICEL", + "SLICE_X29Y133": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X28Y134": "SLICEL", + "SLICE_X29Y134": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X28Y135": "SLICEL", + "SLICE_X29Y135": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X28Y136": "SLICEL", + "SLICE_X29Y136": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X28Y137": "SLICEL", + "SLICE_X29Y137": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X28Y138": "SLICEL", + "SLICE_X29Y138": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X28Y139": "SLICEL", + "SLICE_X29Y139": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X28Y140": "SLICEL", + "SLICE_X29Y140": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X28Y141": "SLICEL", + "SLICE_X29Y141": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X28Y142": "SLICEL", + "SLICE_X29Y142": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X28Y143": "SLICEL", + "SLICE_X29Y143": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X28Y144": "SLICEL", + "SLICE_X29Y144": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X28Y145": "SLICEL", + "SLICE_X29Y145": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X28Y146": "SLICEL", + "SLICE_X29Y146": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X28Y147": "SLICEL", + "SLICE_X29Y147": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X28Y148": "SLICEL", + "SLICE_X29Y148": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X19Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 51, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X28Y149": "SLICEL", + "SLICE_X29Y149": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X32Y0": "SLICEL", + "SLICE_X33Y0": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X32Y1": "SLICEL", + "SLICE_X33Y1": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X32Y2": "SLICEL", + "SLICE_X33Y2": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X32Y3": "SLICEL", + "SLICE_X33Y3": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X32Y4": "SLICEL", + "SLICE_X33Y4": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X32Y5": "SLICEL", + "SLICE_X33Y5": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X32Y6": "SLICEL", + "SLICE_X33Y6": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X32Y7": "SLICEL", + "SLICE_X33Y7": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X32Y8": "SLICEL", + "SLICE_X33Y8": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X32Y9": "SLICEL", + "SLICE_X33Y9": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X32Y10": "SLICEL", + "SLICE_X33Y10": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X32Y11": "SLICEL", + "SLICE_X33Y11": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X32Y12": "SLICEL", + "SLICE_X33Y12": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X32Y13": "SLICEL", + "SLICE_X33Y13": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X32Y14": "SLICEL", + "SLICE_X33Y14": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X32Y15": "SLICEL", + "SLICE_X33Y15": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X32Y16": "SLICEL", + "SLICE_X33Y16": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X32Y17": "SLICEL", + "SLICE_X33Y17": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X32Y18": "SLICEL", + "SLICE_X33Y18": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X32Y19": "SLICEL", + "SLICE_X33Y19": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X32Y20": "SLICEL", + "SLICE_X33Y20": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X32Y21": "SLICEL", + "SLICE_X33Y21": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X32Y22": "SLICEL", + "SLICE_X33Y22": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X32Y23": "SLICEL", + "SLICE_X33Y23": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X32Y24": "SLICEL", + "SLICE_X33Y24": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X32Y25": "SLICEL", + "SLICE_X33Y25": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X32Y26": "SLICEL", + "SLICE_X33Y26": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X32Y27": "SLICEL", + "SLICE_X33Y27": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X32Y28": "SLICEL", + "SLICE_X33Y28": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X32Y29": "SLICEL", + "SLICE_X33Y29": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X32Y30": "SLICEL", + "SLICE_X33Y30": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X32Y31": "SLICEL", + "SLICE_X33Y31": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X32Y32": "SLICEL", + "SLICE_X33Y32": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X32Y33": "SLICEL", + "SLICE_X33Y33": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X32Y34": "SLICEL", + "SLICE_X33Y34": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X32Y35": "SLICEL", + "SLICE_X33Y35": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X32Y36": "SLICEL", + "SLICE_X33Y36": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X32Y37": "SLICEL", + "SLICE_X33Y37": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X32Y38": "SLICEL", + "SLICE_X33Y38": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X32Y39": "SLICEL", + "SLICE_X33Y39": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X32Y40": "SLICEL", + "SLICE_X33Y40": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X32Y41": "SLICEL", + "SLICE_X33Y41": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X32Y42": "SLICEL", + "SLICE_X33Y42": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X32Y43": "SLICEL", + "SLICE_X33Y43": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X32Y44": "SLICEL", + "SLICE_X33Y44": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X32Y45": "SLICEL", + "SLICE_X33Y45": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X32Y46": "SLICEL", + "SLICE_X33Y46": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X32Y47": "SLICEL", + "SLICE_X33Y47": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X32Y48": "SLICEL", + "SLICE_X33Y48": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 55, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X32Y49": "SLICEL", + "SLICE_X33Y49": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X32Y50": "SLICEL", + "SLICE_X33Y50": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X32Y51": "SLICEL", + "SLICE_X33Y51": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X32Y52": "SLICEL", + "SLICE_X33Y52": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X32Y53": "SLICEL", + "SLICE_X33Y53": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X32Y54": "SLICEL", + "SLICE_X33Y54": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X32Y55": "SLICEL", + "SLICE_X33Y55": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X32Y56": "SLICEL", + "SLICE_X33Y56": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X32Y57": "SLICEL", + "SLICE_X33Y57": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X32Y58": "SLICEL", + "SLICE_X33Y58": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X32Y59": "SLICEL", + "SLICE_X33Y59": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X32Y60": "SLICEL", + "SLICE_X33Y60": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X32Y61": "SLICEL", + "SLICE_X33Y61": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X32Y62": "SLICEL", + "SLICE_X33Y62": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X32Y63": "SLICEL", + "SLICE_X33Y63": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X32Y64": "SLICEL", + "SLICE_X33Y64": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X32Y65": "SLICEL", + "SLICE_X33Y65": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X32Y66": "SLICEL", + "SLICE_X33Y66": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X32Y67": "SLICEL", + "SLICE_X33Y67": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X32Y68": "SLICEL", + "SLICE_X33Y68": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X32Y69": "SLICEL", + "SLICE_X33Y69": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X32Y70": "SLICEL", + "SLICE_X33Y70": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X32Y71": "SLICEL", + "SLICE_X33Y71": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X32Y72": "SLICEL", + "SLICE_X33Y72": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X32Y73": "SLICEL", + "SLICE_X33Y73": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X32Y74": "SLICEL", + "SLICE_X33Y74": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X32Y75": "SLICEL", + "SLICE_X33Y75": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X32Y76": "SLICEL", + "SLICE_X33Y76": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X32Y77": "SLICEL", + "SLICE_X33Y77": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X32Y78": "SLICEL", + "SLICE_X33Y78": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X32Y79": "SLICEL", + "SLICE_X33Y79": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X32Y80": "SLICEL", + "SLICE_X33Y80": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X32Y81": "SLICEL", + "SLICE_X33Y81": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X32Y82": "SLICEL", + "SLICE_X33Y82": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X32Y83": "SLICEL", + "SLICE_X33Y83": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X32Y84": "SLICEL", + "SLICE_X33Y84": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X32Y85": "SLICEL", + "SLICE_X33Y85": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X32Y86": "SLICEL", + "SLICE_X33Y86": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X32Y87": "SLICEL", + "SLICE_X33Y87": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X32Y88": "SLICEL", + "SLICE_X33Y88": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X32Y89": "SLICEL", + "SLICE_X33Y89": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X32Y90": "SLICEL", + "SLICE_X33Y90": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X32Y91": "SLICEL", + "SLICE_X33Y91": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X32Y92": "SLICEL", + "SLICE_X33Y92": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X32Y93": "SLICEL", + "SLICE_X33Y93": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X32Y94": "SLICEL", + "SLICE_X33Y94": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X32Y95": "SLICEL", + "SLICE_X33Y95": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X32Y96": "SLICEL", + "SLICE_X33Y96": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X32Y97": "SLICEL", + "SLICE_X33Y97": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X32Y98": "SLICEL", + "SLICE_X33Y98": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 55, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X32Y99": "SLICEL", + "SLICE_X33Y99": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X32Y100": "SLICEL", + "SLICE_X33Y100": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X32Y101": "SLICEL", + "SLICE_X33Y101": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X32Y102": "SLICEL", + "SLICE_X33Y102": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X32Y103": "SLICEL", + "SLICE_X33Y103": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X32Y104": "SLICEL", + "SLICE_X33Y104": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X32Y105": "SLICEL", + "SLICE_X33Y105": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X32Y106": "SLICEL", + "SLICE_X33Y106": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X32Y107": "SLICEL", + "SLICE_X33Y107": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X32Y108": "SLICEL", + "SLICE_X33Y108": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X32Y109": "SLICEL", + "SLICE_X33Y109": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X32Y110": "SLICEL", + "SLICE_X33Y110": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X32Y111": "SLICEL", + "SLICE_X33Y111": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X32Y112": "SLICEL", + "SLICE_X33Y112": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X32Y113": "SLICEL", + "SLICE_X33Y113": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X32Y114": "SLICEL", + "SLICE_X33Y114": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X32Y115": "SLICEL", + "SLICE_X33Y115": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X32Y116": "SLICEL", + "SLICE_X33Y116": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X32Y117": "SLICEL", + "SLICE_X33Y117": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X32Y118": "SLICEL", + "SLICE_X33Y118": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X32Y119": "SLICEL", + "SLICE_X33Y119": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X32Y120": "SLICEL", + "SLICE_X33Y120": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X32Y121": "SLICEL", + "SLICE_X33Y121": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X32Y122": "SLICEL", + "SLICE_X33Y122": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X32Y123": "SLICEL", + "SLICE_X33Y123": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X32Y124": "SLICEL", + "SLICE_X33Y124": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X32Y125": "SLICEL", + "SLICE_X33Y125": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X32Y126": "SLICEL", + "SLICE_X33Y126": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X32Y127": "SLICEL", + "SLICE_X33Y127": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X32Y128": "SLICEL", + "SLICE_X33Y128": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X32Y129": "SLICEL", + "SLICE_X33Y129": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X32Y130": "SLICEL", + "SLICE_X33Y130": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X32Y131": "SLICEL", + "SLICE_X33Y131": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X32Y132": "SLICEL", + "SLICE_X33Y132": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X32Y133": "SLICEL", + "SLICE_X33Y133": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X32Y134": "SLICEL", + "SLICE_X33Y134": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X32Y135": "SLICEL", + "SLICE_X33Y135": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X32Y136": "SLICEL", + "SLICE_X33Y136": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X32Y137": "SLICEL", + "SLICE_X33Y137": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X32Y138": "SLICEL", + "SLICE_X33Y138": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X32Y139": "SLICEL", + "SLICE_X33Y139": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X32Y140": "SLICEL", + "SLICE_X33Y140": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X32Y141": "SLICEL", + "SLICE_X33Y141": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X32Y142": "SLICEL", + "SLICE_X33Y142": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X32Y143": "SLICEL", + "SLICE_X33Y143": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X32Y144": "SLICEL", + "SLICE_X33Y144": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X32Y145": "SLICEL", + "SLICE_X33Y145": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X32Y146": "SLICEL", + "SLICE_X33Y146": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X32Y147": "SLICEL", + "SLICE_X33Y147": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X32Y148": "SLICEL", + "SLICE_X33Y148": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X21Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 55, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X32Y149": "SLICEL", + "SLICE_X33Y149": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X48Y0": "SLICEL", + "SLICE_X49Y0": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X48Y1": "SLICEL", + "SLICE_X49Y1": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X48Y2": "SLICEL", + "SLICE_X49Y2": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X48Y3": "SLICEL", + "SLICE_X49Y3": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X48Y4": "SLICEL", + "SLICE_X49Y4": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X48Y5": "SLICEL", + "SLICE_X49Y5": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X48Y6": "SLICEL", + "SLICE_X49Y6": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X48Y7": "SLICEL", + "SLICE_X49Y7": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X48Y8": "SLICEL", + "SLICE_X49Y8": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X48Y9": "SLICEL", + "SLICE_X49Y9": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X48Y10": "SLICEL", + "SLICE_X49Y10": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X48Y11": "SLICEL", + "SLICE_X49Y11": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X48Y12": "SLICEL", + "SLICE_X49Y12": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X48Y13": "SLICEL", + "SLICE_X49Y13": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X48Y14": "SLICEL", + "SLICE_X49Y14": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X48Y15": "SLICEL", + "SLICE_X49Y15": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X48Y16": "SLICEL", + "SLICE_X49Y16": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X48Y17": "SLICEL", + "SLICE_X49Y17": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X48Y18": "SLICEL", + "SLICE_X49Y18": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X48Y19": "SLICEL", + "SLICE_X49Y19": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X48Y20": "SLICEL", + "SLICE_X49Y20": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X48Y21": "SLICEL", + "SLICE_X49Y21": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X48Y22": "SLICEL", + "SLICE_X49Y22": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X48Y23": "SLICEL", + "SLICE_X49Y23": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X48Y24": "SLICEL", + "SLICE_X49Y24": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X48Y25": "SLICEL", + "SLICE_X49Y25": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X48Y26": "SLICEL", + "SLICE_X49Y26": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X48Y27": "SLICEL", + "SLICE_X49Y27": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X48Y28": "SLICEL", + "SLICE_X49Y28": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X48Y29": "SLICEL", + "SLICE_X49Y29": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X48Y30": "SLICEL", + "SLICE_X49Y30": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X48Y31": "SLICEL", + "SLICE_X49Y31": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X48Y32": "SLICEL", + "SLICE_X49Y32": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X48Y33": "SLICEL", + "SLICE_X49Y33": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X48Y34": "SLICEL", + "SLICE_X49Y34": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X48Y35": "SLICEL", + "SLICE_X49Y35": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X48Y36": "SLICEL", + "SLICE_X49Y36": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X48Y37": "SLICEL", + "SLICE_X49Y37": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X48Y38": "SLICEL", + "SLICE_X49Y38": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X48Y39": "SLICEL", + "SLICE_X49Y39": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X48Y40": "SLICEL", + "SLICE_X49Y40": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X48Y41": "SLICEL", + "SLICE_X49Y41": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X48Y42": "SLICEL", + "SLICE_X49Y42": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X48Y43": "SLICEL", + "SLICE_X49Y43": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X48Y44": "SLICEL", + "SLICE_X49Y44": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X48Y45": "SLICEL", + "SLICE_X49Y45": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X48Y46": "SLICEL", + "SLICE_X49Y46": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X48Y47": "SLICEL", + "SLICE_X49Y47": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X48Y48": "SLICEL", + "SLICE_X49Y48": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 79, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X48Y49": "SLICEL", + "SLICE_X49Y49": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X48Y50": "SLICEL", + "SLICE_X49Y50": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X48Y51": "SLICEL", + "SLICE_X49Y51": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X48Y52": "SLICEL", + "SLICE_X49Y52": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X48Y53": "SLICEL", + "SLICE_X49Y53": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X48Y54": "SLICEL", + "SLICE_X49Y54": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X48Y55": "SLICEL", + "SLICE_X49Y55": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X48Y56": "SLICEL", + "SLICE_X49Y56": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X48Y57": "SLICEL", + "SLICE_X49Y57": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X48Y58": "SLICEL", + "SLICE_X49Y58": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X48Y59": "SLICEL", + "SLICE_X49Y59": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X48Y60": "SLICEL", + "SLICE_X49Y60": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X48Y61": "SLICEL", + "SLICE_X49Y61": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X48Y62": "SLICEL", + "SLICE_X49Y62": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X48Y63": "SLICEL", + "SLICE_X49Y63": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X48Y64": "SLICEL", + "SLICE_X49Y64": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X48Y65": "SLICEL", + "SLICE_X49Y65": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X48Y66": "SLICEL", + "SLICE_X49Y66": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X48Y67": "SLICEL", + "SLICE_X49Y67": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X48Y68": "SLICEL", + "SLICE_X49Y68": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X48Y69": "SLICEL", + "SLICE_X49Y69": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X48Y70": "SLICEL", + "SLICE_X49Y70": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X48Y71": "SLICEL", + "SLICE_X49Y71": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X48Y72": "SLICEL", + "SLICE_X49Y72": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X48Y73": "SLICEL", + "SLICE_X49Y73": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X48Y74": "SLICEL", + "SLICE_X49Y74": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X48Y75": "SLICEL", + "SLICE_X49Y75": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X48Y76": "SLICEL", + "SLICE_X49Y76": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X48Y77": "SLICEL", + "SLICE_X49Y77": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X48Y78": "SLICEL", + "SLICE_X49Y78": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X48Y79": "SLICEL", + "SLICE_X49Y79": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X48Y80": "SLICEL", + "SLICE_X49Y80": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X48Y81": "SLICEL", + "SLICE_X49Y81": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X48Y82": "SLICEL", + "SLICE_X49Y82": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X48Y83": "SLICEL", + "SLICE_X49Y83": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X48Y84": "SLICEL", + "SLICE_X49Y84": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X48Y85": "SLICEL", + "SLICE_X49Y85": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X48Y86": "SLICEL", + "SLICE_X49Y86": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X48Y87": "SLICEL", + "SLICE_X49Y87": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X48Y88": "SLICEL", + "SLICE_X49Y88": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X48Y89": "SLICEL", + "SLICE_X49Y89": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X48Y90": "SLICEL", + "SLICE_X49Y90": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X48Y91": "SLICEL", + "SLICE_X49Y91": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X48Y92": "SLICEL", + "SLICE_X49Y92": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X48Y93": "SLICEL", + "SLICE_X49Y93": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X48Y94": "SLICEL", + "SLICE_X49Y94": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X48Y95": "SLICEL", + "SLICE_X49Y95": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X48Y96": "SLICEL", + "SLICE_X49Y96": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X48Y97": "SLICEL", + "SLICE_X49Y97": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X48Y98": "SLICEL", + "SLICE_X49Y98": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 79, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X48Y99": "SLICEL", + "SLICE_X49Y99": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X48Y100": "SLICEL", + "SLICE_X49Y100": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X48Y101": "SLICEL", + "SLICE_X49Y101": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X48Y102": "SLICEL", + "SLICE_X49Y102": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X48Y103": "SLICEL", + "SLICE_X49Y103": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X48Y104": "SLICEL", + "SLICE_X49Y104": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X48Y105": "SLICEL", + "SLICE_X49Y105": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X48Y106": "SLICEL", + "SLICE_X49Y106": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X48Y107": "SLICEL", + "SLICE_X49Y107": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X48Y108": "SLICEL", + "SLICE_X49Y108": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X48Y109": "SLICEL", + "SLICE_X49Y109": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X48Y110": "SLICEL", + "SLICE_X49Y110": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X48Y111": "SLICEL", + "SLICE_X49Y111": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X48Y112": "SLICEL", + "SLICE_X49Y112": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X48Y113": "SLICEL", + "SLICE_X49Y113": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X48Y114": "SLICEL", + "SLICE_X49Y114": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X48Y115": "SLICEL", + "SLICE_X49Y115": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X48Y116": "SLICEL", + "SLICE_X49Y116": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X48Y117": "SLICEL", + "SLICE_X49Y117": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X48Y118": "SLICEL", + "SLICE_X49Y118": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X48Y119": "SLICEL", + "SLICE_X49Y119": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X48Y120": "SLICEL", + "SLICE_X49Y120": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X48Y121": "SLICEL", + "SLICE_X49Y121": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X48Y122": "SLICEL", + "SLICE_X49Y122": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X48Y123": "SLICEL", + "SLICE_X49Y123": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X48Y124": "SLICEL", + "SLICE_X49Y124": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X48Y125": "SLICEL", + "SLICE_X49Y125": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X48Y126": "SLICEL", + "SLICE_X49Y126": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X48Y127": "SLICEL", + "SLICE_X49Y127": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X48Y128": "SLICEL", + "SLICE_X49Y128": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X48Y129": "SLICEL", + "SLICE_X49Y129": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X48Y130": "SLICEL", + "SLICE_X49Y130": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X48Y131": "SLICEL", + "SLICE_X49Y131": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X48Y132": "SLICEL", + "SLICE_X49Y132": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X48Y133": "SLICEL", + "SLICE_X49Y133": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X48Y134": "SLICEL", + "SLICE_X49Y134": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X48Y135": "SLICEL", + "SLICE_X49Y135": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X48Y136": "SLICEL", + "SLICE_X49Y136": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X48Y137": "SLICEL", + "SLICE_X49Y137": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X48Y138": "SLICEL", + "SLICE_X49Y138": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X48Y139": "SLICEL", + "SLICE_X49Y139": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X48Y140": "SLICEL", + "SLICE_X49Y140": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X48Y141": "SLICEL", + "SLICE_X49Y141": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X48Y142": "SLICEL", + "SLICE_X49Y142": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X48Y143": "SLICEL", + "SLICE_X49Y143": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X48Y144": "SLICEL", + "SLICE_X49Y144": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X48Y145": "SLICEL", + "SLICE_X49Y145": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X48Y146": "SLICEL", + "SLICE_X49Y146": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X48Y147": "SLICEL", + "SLICE_X49Y147": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X48Y148": "SLICEL", + "SLICE_X49Y148": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLL_R_X31Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 79, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X48Y149": "SLICEL", + "SLICE_X49Y149": "SLICEL" + }, + "type": "CLBLL_R" + }, + "CLBLM_L_X8Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X10Y0": "SLICEM", + "SLICE_X11Y0": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X10Y1": "SLICEM", + "SLICE_X11Y1": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X10Y2": "SLICEM", + "SLICE_X11Y2": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X10Y3": "SLICEM", + "SLICE_X11Y3": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X10Y4": "SLICEM", + "SLICE_X11Y4": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X10Y5": "SLICEM", + "SLICE_X11Y5": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X10Y6": "SLICEM", + "SLICE_X11Y6": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X10Y7": "SLICEM", + "SLICE_X11Y7": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X10Y8": "SLICEM", + "SLICE_X11Y8": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X10Y9": "SLICEM", + "SLICE_X11Y9": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X10Y10": "SLICEM", + "SLICE_X11Y10": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X10Y11": "SLICEM", + "SLICE_X11Y11": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X10Y12": "SLICEM", + "SLICE_X11Y12": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X10Y13": "SLICEM", + "SLICE_X11Y13": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X10Y14": "SLICEM", + "SLICE_X11Y14": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X10Y15": "SLICEM", + "SLICE_X11Y15": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X10Y16": "SLICEM", + "SLICE_X11Y16": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X10Y17": "SLICEM", + "SLICE_X11Y17": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X10Y18": "SLICEM", + "SLICE_X11Y18": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X10Y19": "SLICEM", + "SLICE_X11Y19": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X10Y20": "SLICEM", + "SLICE_X11Y20": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X10Y21": "SLICEM", + "SLICE_X11Y21": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X10Y22": "SLICEM", + "SLICE_X11Y22": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X10Y23": "SLICEM", + "SLICE_X11Y23": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X10Y24": "SLICEM", + "SLICE_X11Y24": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X10Y25": "SLICEM", + "SLICE_X11Y25": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X10Y26": "SLICEM", + "SLICE_X11Y26": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X10Y27": "SLICEM", + "SLICE_X11Y27": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X10Y28": "SLICEM", + "SLICE_X11Y28": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X10Y29": "SLICEM", + "SLICE_X11Y29": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X10Y30": "SLICEM", + "SLICE_X11Y30": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X10Y31": "SLICEM", + "SLICE_X11Y31": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X10Y32": "SLICEM", + "SLICE_X11Y32": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X10Y33": "SLICEM", + "SLICE_X11Y33": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X10Y34": "SLICEM", + "SLICE_X11Y34": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X10Y35": "SLICEM", + "SLICE_X11Y35": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X10Y36": "SLICEM", + "SLICE_X11Y36": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X10Y37": "SLICEM", + "SLICE_X11Y37": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X10Y38": "SLICEM", + "SLICE_X11Y38": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X10Y39": "SLICEM", + "SLICE_X11Y39": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X10Y40": "SLICEM", + "SLICE_X11Y40": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X10Y41": "SLICEM", + "SLICE_X11Y41": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X10Y42": "SLICEM", + "SLICE_X11Y42": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X10Y43": "SLICEM", + "SLICE_X11Y43": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X10Y44": "SLICEM", + "SLICE_X11Y44": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X10Y45": "SLICEM", + "SLICE_X11Y45": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X10Y46": "SLICEM", + "SLICE_X11Y46": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X10Y47": "SLICEM", + "SLICE_X11Y47": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X10Y48": "SLICEM", + "SLICE_X11Y48": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 24, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X10Y49": "SLICEM", + "SLICE_X11Y49": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X10Y50": "SLICEM", + "SLICE_X11Y50": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X10Y51": "SLICEM", + "SLICE_X11Y51": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X10Y52": "SLICEM", + "SLICE_X11Y52": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X10Y53": "SLICEM", + "SLICE_X11Y53": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X10Y54": "SLICEM", + "SLICE_X11Y54": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X10Y55": "SLICEM", + "SLICE_X11Y55": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X10Y56": "SLICEM", + "SLICE_X11Y56": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X10Y57": "SLICEM", + "SLICE_X11Y57": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X10Y58": "SLICEM", + "SLICE_X11Y58": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X10Y59": "SLICEM", + "SLICE_X11Y59": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X10Y60": "SLICEM", + "SLICE_X11Y60": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X10Y61": "SLICEM", + "SLICE_X11Y61": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X10Y62": "SLICEM", + "SLICE_X11Y62": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X10Y63": "SLICEM", + "SLICE_X11Y63": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X10Y64": "SLICEM", + "SLICE_X11Y64": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X10Y65": "SLICEM", + "SLICE_X11Y65": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X10Y66": "SLICEM", + "SLICE_X11Y66": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X10Y67": "SLICEM", + "SLICE_X11Y67": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X10Y68": "SLICEM", + "SLICE_X11Y68": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X10Y69": "SLICEM", + "SLICE_X11Y69": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X10Y70": "SLICEM", + "SLICE_X11Y70": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X10Y71": "SLICEM", + "SLICE_X11Y71": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X10Y72": "SLICEM", + "SLICE_X11Y72": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X10Y73": "SLICEM", + "SLICE_X11Y73": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X10Y74": "SLICEM", + "SLICE_X11Y74": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X10Y75": "SLICEM", + "SLICE_X11Y75": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X10Y76": "SLICEM", + "SLICE_X11Y76": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X10Y77": "SLICEM", + "SLICE_X11Y77": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X10Y78": "SLICEM", + "SLICE_X11Y78": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X10Y79": "SLICEM", + "SLICE_X11Y79": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X10Y80": "SLICEM", + "SLICE_X11Y80": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X10Y81": "SLICEM", + "SLICE_X11Y81": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X10Y82": "SLICEM", + "SLICE_X11Y82": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X10Y83": "SLICEM", + "SLICE_X11Y83": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X10Y84": "SLICEM", + "SLICE_X11Y84": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X10Y85": "SLICEM", + "SLICE_X11Y85": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X10Y86": "SLICEM", + "SLICE_X11Y86": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X10Y87": "SLICEM", + "SLICE_X11Y87": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X10Y88": "SLICEM", + "SLICE_X11Y88": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X10Y89": "SLICEM", + "SLICE_X11Y89": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X10Y90": "SLICEM", + "SLICE_X11Y90": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X10Y91": "SLICEM", + "SLICE_X11Y91": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X10Y92": "SLICEM", + "SLICE_X11Y92": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X10Y93": "SLICEM", + "SLICE_X11Y93": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X10Y94": "SLICEM", + "SLICE_X11Y94": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X10Y95": "SLICEM", + "SLICE_X11Y95": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X10Y96": "SLICEM", + "SLICE_X11Y96": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X10Y97": "SLICEM", + "SLICE_X11Y97": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X10Y98": "SLICEM", + "SLICE_X11Y98": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 24, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X10Y99": "SLICEM", + "SLICE_X11Y99": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X10Y100": "SLICEM", + "SLICE_X11Y100": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X10Y101": "SLICEM", + "SLICE_X11Y101": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X10Y102": "SLICEM", + "SLICE_X11Y102": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X10Y103": "SLICEM", + "SLICE_X11Y103": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X10Y104": "SLICEM", + "SLICE_X11Y104": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X10Y105": "SLICEM", + "SLICE_X11Y105": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X10Y106": "SLICEM", + "SLICE_X11Y106": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X10Y107": "SLICEM", + "SLICE_X11Y107": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X10Y108": "SLICEM", + "SLICE_X11Y108": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X10Y109": "SLICEM", + "SLICE_X11Y109": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X10Y110": "SLICEM", + "SLICE_X11Y110": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X10Y111": "SLICEM", + "SLICE_X11Y111": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X10Y112": "SLICEM", + "SLICE_X11Y112": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X10Y113": "SLICEM", + "SLICE_X11Y113": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X10Y114": "SLICEM", + "SLICE_X11Y114": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X10Y115": "SLICEM", + "SLICE_X11Y115": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X10Y116": "SLICEM", + "SLICE_X11Y116": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X10Y117": "SLICEM", + "SLICE_X11Y117": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X10Y118": "SLICEM", + "SLICE_X11Y118": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X10Y119": "SLICEM", + "SLICE_X11Y119": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X10Y120": "SLICEM", + "SLICE_X11Y120": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X10Y121": "SLICEM", + "SLICE_X11Y121": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X10Y122": "SLICEM", + "SLICE_X11Y122": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X10Y123": "SLICEM", + "SLICE_X11Y123": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X10Y124": "SLICEM", + "SLICE_X11Y124": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X10Y125": "SLICEM", + "SLICE_X11Y125": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X10Y126": "SLICEM", + "SLICE_X11Y126": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X10Y127": "SLICEM", + "SLICE_X11Y127": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X10Y128": "SLICEM", + "SLICE_X11Y128": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X10Y129": "SLICEM", + "SLICE_X11Y129": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X10Y130": "SLICEM", + "SLICE_X11Y130": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X10Y131": "SLICEM", + "SLICE_X11Y131": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X10Y132": "SLICEM", + "SLICE_X11Y132": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X10Y133": "SLICEM", + "SLICE_X11Y133": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X10Y134": "SLICEM", + "SLICE_X11Y134": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X10Y135": "SLICEM", + "SLICE_X11Y135": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X10Y136": "SLICEM", + "SLICE_X11Y136": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X10Y137": "SLICEM", + "SLICE_X11Y137": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X10Y138": "SLICEM", + "SLICE_X11Y138": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X10Y139": "SLICEM", + "SLICE_X11Y139": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X10Y140": "SLICEM", + "SLICE_X11Y140": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X10Y141": "SLICEM", + "SLICE_X11Y141": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X10Y142": "SLICEM", + "SLICE_X11Y142": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X10Y143": "SLICEM", + "SLICE_X11Y143": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X10Y144": "SLICEM", + "SLICE_X11Y144": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X10Y145": "SLICEM", + "SLICE_X11Y145": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X10Y146": "SLICEM", + "SLICE_X11Y146": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X10Y147": "SLICEM", + "SLICE_X11Y147": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X10Y148": "SLICEM", + "SLICE_X11Y148": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X8Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 24, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X10Y149": "SLICEM", + "SLICE_X11Y149": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X12Y0": "SLICEM", + "SLICE_X13Y0": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X12Y1": "SLICEM", + "SLICE_X13Y1": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X12Y2": "SLICEM", + "SLICE_X13Y2": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X12Y3": "SLICEM", + "SLICE_X13Y3": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X12Y4": "SLICEM", + "SLICE_X13Y4": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X12Y5": "SLICEM", + "SLICE_X13Y5": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X12Y6": "SLICEM", + "SLICE_X13Y6": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X12Y7": "SLICEM", + "SLICE_X13Y7": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X12Y8": "SLICEM", + "SLICE_X13Y8": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X12Y9": "SLICEM", + "SLICE_X13Y9": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X12Y10": "SLICEM", + "SLICE_X13Y10": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X12Y11": "SLICEM", + "SLICE_X13Y11": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X12Y12": "SLICEM", + "SLICE_X13Y12": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X12Y13": "SLICEM", + "SLICE_X13Y13": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X12Y14": "SLICEM", + "SLICE_X13Y14": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X12Y15": "SLICEM", + "SLICE_X13Y15": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X12Y16": "SLICEM", + "SLICE_X13Y16": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X12Y17": "SLICEM", + "SLICE_X13Y17": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X12Y18": "SLICEM", + "SLICE_X13Y18": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X12Y19": "SLICEM", + "SLICE_X13Y19": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X12Y20": "SLICEM", + "SLICE_X13Y20": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X12Y21": "SLICEM", + "SLICE_X13Y21": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X12Y22": "SLICEM", + "SLICE_X13Y22": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X12Y23": "SLICEM", + "SLICE_X13Y23": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X12Y24": "SLICEM", + "SLICE_X13Y24": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X12Y25": "SLICEM", + "SLICE_X13Y25": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X12Y26": "SLICEM", + "SLICE_X13Y26": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X12Y27": "SLICEM", + "SLICE_X13Y27": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X12Y28": "SLICEM", + "SLICE_X13Y28": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X12Y29": "SLICEM", + "SLICE_X13Y29": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X12Y30": "SLICEM", + "SLICE_X13Y30": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X12Y31": "SLICEM", + "SLICE_X13Y31": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X12Y32": "SLICEM", + "SLICE_X13Y32": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X12Y33": "SLICEM", + "SLICE_X13Y33": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X12Y34": "SLICEM", + "SLICE_X13Y34": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X12Y35": "SLICEM", + "SLICE_X13Y35": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X12Y36": "SLICEM", + "SLICE_X13Y36": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X12Y37": "SLICEM", + "SLICE_X13Y37": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X12Y38": "SLICEM", + "SLICE_X13Y38": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X12Y39": "SLICEM", + "SLICE_X13Y39": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X12Y40": "SLICEM", + "SLICE_X13Y40": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X12Y41": "SLICEM", + "SLICE_X13Y41": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X12Y42": "SLICEM", + "SLICE_X13Y42": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X12Y43": "SLICEM", + "SLICE_X13Y43": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X12Y44": "SLICEM", + "SLICE_X13Y44": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X12Y45": "SLICEM", + "SLICE_X13Y45": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X12Y46": "SLICEM", + "SLICE_X13Y46": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X12Y47": "SLICEM", + "SLICE_X13Y47": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X12Y48": "SLICEM", + "SLICE_X13Y48": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 30, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X12Y49": "SLICEM", + "SLICE_X13Y49": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X12Y50": "SLICEM", + "SLICE_X13Y50": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X12Y51": "SLICEM", + "SLICE_X13Y51": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X12Y52": "SLICEM", + "SLICE_X13Y52": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X12Y53": "SLICEM", + "SLICE_X13Y53": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X12Y54": "SLICEM", + "SLICE_X13Y54": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X12Y55": "SLICEM", + "SLICE_X13Y55": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X12Y56": "SLICEM", + "SLICE_X13Y56": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X12Y57": "SLICEM", + "SLICE_X13Y57": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X12Y58": "SLICEM", + "SLICE_X13Y58": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X12Y59": "SLICEM", + "SLICE_X13Y59": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X12Y60": "SLICEM", + "SLICE_X13Y60": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X12Y61": "SLICEM", + "SLICE_X13Y61": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X12Y62": "SLICEM", + "SLICE_X13Y62": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X12Y63": "SLICEM", + "SLICE_X13Y63": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X12Y64": "SLICEM", + "SLICE_X13Y64": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X12Y65": "SLICEM", + "SLICE_X13Y65": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X12Y66": "SLICEM", + "SLICE_X13Y66": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X12Y67": "SLICEM", + "SLICE_X13Y67": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X12Y68": "SLICEM", + "SLICE_X13Y68": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X12Y69": "SLICEM", + "SLICE_X13Y69": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X12Y70": "SLICEM", + "SLICE_X13Y70": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X12Y71": "SLICEM", + "SLICE_X13Y71": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X12Y72": "SLICEM", + "SLICE_X13Y72": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X12Y73": "SLICEM", + "SLICE_X13Y73": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X12Y74": "SLICEM", + "SLICE_X13Y74": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X12Y75": "SLICEM", + "SLICE_X13Y75": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X12Y76": "SLICEM", + "SLICE_X13Y76": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X12Y77": "SLICEM", + "SLICE_X13Y77": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X12Y78": "SLICEM", + "SLICE_X13Y78": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X12Y79": "SLICEM", + "SLICE_X13Y79": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X12Y80": "SLICEM", + "SLICE_X13Y80": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X12Y81": "SLICEM", + "SLICE_X13Y81": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X12Y82": "SLICEM", + "SLICE_X13Y82": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X12Y83": "SLICEM", + "SLICE_X13Y83": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X12Y84": "SLICEM", + "SLICE_X13Y84": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X12Y85": "SLICEM", + "SLICE_X13Y85": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X12Y86": "SLICEM", + "SLICE_X13Y86": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X12Y87": "SLICEM", + "SLICE_X13Y87": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X12Y88": "SLICEM", + "SLICE_X13Y88": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X12Y89": "SLICEM", + "SLICE_X13Y89": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X12Y90": "SLICEM", + "SLICE_X13Y90": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X12Y91": "SLICEM", + "SLICE_X13Y91": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X12Y92": "SLICEM", + "SLICE_X13Y92": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X12Y93": "SLICEM", + "SLICE_X13Y93": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X12Y94": "SLICEM", + "SLICE_X13Y94": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X12Y95": "SLICEM", + "SLICE_X13Y95": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X12Y96": "SLICEM", + "SLICE_X13Y96": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X12Y97": "SLICEM", + "SLICE_X13Y97": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X12Y98": "SLICEM", + "SLICE_X13Y98": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 30, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X12Y99": "SLICEM", + "SLICE_X13Y99": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X12Y100": "SLICEM", + "SLICE_X13Y100": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X12Y101": "SLICEM", + "SLICE_X13Y101": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X12Y102": "SLICEM", + "SLICE_X13Y102": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X12Y103": "SLICEM", + "SLICE_X13Y103": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X12Y104": "SLICEM", + "SLICE_X13Y104": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X12Y105": "SLICEM", + "SLICE_X13Y105": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X12Y106": "SLICEM", + "SLICE_X13Y106": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X12Y107": "SLICEM", + "SLICE_X13Y107": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X12Y108": "SLICEM", + "SLICE_X13Y108": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X12Y109": "SLICEM", + "SLICE_X13Y109": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X12Y110": "SLICEM", + "SLICE_X13Y110": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X12Y111": "SLICEM", + "SLICE_X13Y111": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X12Y112": "SLICEM", + "SLICE_X13Y112": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X12Y113": "SLICEM", + "SLICE_X13Y113": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X12Y114": "SLICEM", + "SLICE_X13Y114": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X12Y115": "SLICEM", + "SLICE_X13Y115": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X12Y116": "SLICEM", + "SLICE_X13Y116": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X12Y117": "SLICEM", + "SLICE_X13Y117": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X12Y118": "SLICEM", + "SLICE_X13Y118": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X12Y119": "SLICEM", + "SLICE_X13Y119": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X12Y120": "SLICEM", + "SLICE_X13Y120": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X12Y121": "SLICEM", + "SLICE_X13Y121": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X12Y122": "SLICEM", + "SLICE_X13Y122": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X12Y123": "SLICEM", + "SLICE_X13Y123": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X12Y124": "SLICEM", + "SLICE_X13Y124": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X12Y125": "SLICEM", + "SLICE_X13Y125": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X12Y126": "SLICEM", + "SLICE_X13Y126": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X12Y127": "SLICEM", + "SLICE_X13Y127": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X12Y128": "SLICEM", + "SLICE_X13Y128": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X12Y129": "SLICEM", + "SLICE_X13Y129": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X12Y130": "SLICEM", + "SLICE_X13Y130": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X12Y131": "SLICEM", + "SLICE_X13Y131": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X12Y132": "SLICEM", + "SLICE_X13Y132": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X12Y133": "SLICEM", + "SLICE_X13Y133": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X12Y134": "SLICEM", + "SLICE_X13Y134": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X12Y135": "SLICEM", + "SLICE_X13Y135": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X12Y136": "SLICEM", + "SLICE_X13Y136": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X12Y137": "SLICEM", + "SLICE_X13Y137": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X12Y138": "SLICEM", + "SLICE_X13Y138": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X12Y139": "SLICEM", + "SLICE_X13Y139": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X12Y140": "SLICEM", + "SLICE_X13Y140": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X12Y141": "SLICEM", + "SLICE_X13Y141": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X12Y142": "SLICEM", + "SLICE_X13Y142": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X12Y143": "SLICEM", + "SLICE_X13Y143": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X12Y144": "SLICEM", + "SLICE_X13Y144": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X12Y145": "SLICEM", + "SLICE_X13Y145": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X12Y146": "SLICEM", + "SLICE_X13Y146": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X12Y147": "SLICEM", + "SLICE_X13Y147": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X12Y148": "SLICEM", + "SLICE_X13Y148": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X10Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 30, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X12Y149": "SLICEM", + "SLICE_X13Y149": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X30Y0": "SLICEM", + "SLICE_X31Y0": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X30Y1": "SLICEM", + "SLICE_X31Y1": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X30Y2": "SLICEM", + "SLICE_X31Y2": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X30Y3": "SLICEM", + "SLICE_X31Y3": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X30Y4": "SLICEM", + "SLICE_X31Y4": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X30Y5": "SLICEM", + "SLICE_X31Y5": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X30Y6": "SLICEM", + "SLICE_X31Y6": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X30Y7": "SLICEM", + "SLICE_X31Y7": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X30Y8": "SLICEM", + "SLICE_X31Y8": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X30Y9": "SLICEM", + "SLICE_X31Y9": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X30Y10": "SLICEM", + "SLICE_X31Y10": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X30Y11": "SLICEM", + "SLICE_X31Y11": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X30Y12": "SLICEM", + "SLICE_X31Y12": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X30Y13": "SLICEM", + "SLICE_X31Y13": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X30Y14": "SLICEM", + "SLICE_X31Y14": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X30Y15": "SLICEM", + "SLICE_X31Y15": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X30Y16": "SLICEM", + "SLICE_X31Y16": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X30Y17": "SLICEM", + "SLICE_X31Y17": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X30Y18": "SLICEM", + "SLICE_X31Y18": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X30Y19": "SLICEM", + "SLICE_X31Y19": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X30Y20": "SLICEM", + "SLICE_X31Y20": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X30Y21": "SLICEM", + "SLICE_X31Y21": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X30Y22": "SLICEM", + "SLICE_X31Y22": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X30Y23": "SLICEM", + "SLICE_X31Y23": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X30Y24": "SLICEM", + "SLICE_X31Y24": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X30Y25": "SLICEM", + "SLICE_X31Y25": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X30Y26": "SLICEM", + "SLICE_X31Y26": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X30Y27": "SLICEM", + "SLICE_X31Y27": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X30Y28": "SLICEM", + "SLICE_X31Y28": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X30Y29": "SLICEM", + "SLICE_X31Y29": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X30Y30": "SLICEM", + "SLICE_X31Y30": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X30Y31": "SLICEM", + "SLICE_X31Y31": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X30Y32": "SLICEM", + "SLICE_X31Y32": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X30Y33": "SLICEM", + "SLICE_X31Y33": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X30Y34": "SLICEM", + "SLICE_X31Y34": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X30Y35": "SLICEM", + "SLICE_X31Y35": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X30Y36": "SLICEM", + "SLICE_X31Y36": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X30Y37": "SLICEM", + "SLICE_X31Y37": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X30Y38": "SLICEM", + "SLICE_X31Y38": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X30Y39": "SLICEM", + "SLICE_X31Y39": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X30Y40": "SLICEM", + "SLICE_X31Y40": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X30Y41": "SLICEM", + "SLICE_X31Y41": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X30Y42": "SLICEM", + "SLICE_X31Y42": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X30Y43": "SLICEM", + "SLICE_X31Y43": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X30Y44": "SLICEM", + "SLICE_X31Y44": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X30Y45": "SLICEM", + "SLICE_X31Y45": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X30Y46": "SLICEM", + "SLICE_X31Y46": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X30Y47": "SLICEM", + "SLICE_X31Y47": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X30Y48": "SLICEM", + "SLICE_X31Y48": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 52, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X30Y49": "SLICEM", + "SLICE_X31Y49": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X30Y50": "SLICEM", + "SLICE_X31Y50": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X30Y51": "SLICEM", + "SLICE_X31Y51": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X30Y52": "SLICEM", + "SLICE_X31Y52": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X30Y53": "SLICEM", + "SLICE_X31Y53": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X30Y54": "SLICEM", + "SLICE_X31Y54": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X30Y55": "SLICEM", + "SLICE_X31Y55": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X30Y56": "SLICEM", + "SLICE_X31Y56": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X30Y57": "SLICEM", + "SLICE_X31Y57": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X30Y58": "SLICEM", + "SLICE_X31Y58": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X30Y59": "SLICEM", + "SLICE_X31Y59": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X30Y60": "SLICEM", + "SLICE_X31Y60": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X30Y61": "SLICEM", + "SLICE_X31Y61": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X30Y62": "SLICEM", + "SLICE_X31Y62": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X30Y63": "SLICEM", + "SLICE_X31Y63": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X30Y64": "SLICEM", + "SLICE_X31Y64": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X30Y65": "SLICEM", + "SLICE_X31Y65": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X30Y66": "SLICEM", + "SLICE_X31Y66": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X30Y67": "SLICEM", + "SLICE_X31Y67": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X30Y68": "SLICEM", + "SLICE_X31Y68": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X30Y69": "SLICEM", + "SLICE_X31Y69": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X30Y70": "SLICEM", + "SLICE_X31Y70": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X30Y71": "SLICEM", + "SLICE_X31Y71": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X30Y72": "SLICEM", + "SLICE_X31Y72": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X30Y73": "SLICEM", + "SLICE_X31Y73": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X30Y74": "SLICEM", + "SLICE_X31Y74": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X30Y75": "SLICEM", + "SLICE_X31Y75": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X30Y76": "SLICEM", + "SLICE_X31Y76": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X30Y77": "SLICEM", + "SLICE_X31Y77": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X30Y78": "SLICEM", + "SLICE_X31Y78": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X30Y79": "SLICEM", + "SLICE_X31Y79": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X30Y80": "SLICEM", + "SLICE_X31Y80": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X30Y81": "SLICEM", + "SLICE_X31Y81": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X30Y82": "SLICEM", + "SLICE_X31Y82": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X30Y83": "SLICEM", + "SLICE_X31Y83": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X30Y84": "SLICEM", + "SLICE_X31Y84": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X30Y85": "SLICEM", + "SLICE_X31Y85": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X30Y86": "SLICEM", + "SLICE_X31Y86": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X30Y87": "SLICEM", + "SLICE_X31Y87": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X30Y88": "SLICEM", + "SLICE_X31Y88": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X30Y89": "SLICEM", + "SLICE_X31Y89": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X30Y90": "SLICEM", + "SLICE_X31Y90": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X30Y91": "SLICEM", + "SLICE_X31Y91": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X30Y92": "SLICEM", + "SLICE_X31Y92": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X30Y93": "SLICEM", + "SLICE_X31Y93": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X30Y94": "SLICEM", + "SLICE_X31Y94": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X30Y95": "SLICEM", + "SLICE_X31Y95": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X30Y96": "SLICEM", + "SLICE_X31Y96": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X30Y97": "SLICEM", + "SLICE_X31Y97": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X30Y98": "SLICEM", + "SLICE_X31Y98": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 52, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X30Y99": "SLICEM", + "SLICE_X31Y99": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X30Y100": "SLICEM", + "SLICE_X31Y100": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X30Y101": "SLICEM", + "SLICE_X31Y101": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X30Y102": "SLICEM", + "SLICE_X31Y102": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X30Y103": "SLICEM", + "SLICE_X31Y103": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X30Y104": "SLICEM", + "SLICE_X31Y104": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X30Y105": "SLICEM", + "SLICE_X31Y105": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X30Y106": "SLICEM", + "SLICE_X31Y106": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X30Y107": "SLICEM", + "SLICE_X31Y107": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X30Y108": "SLICEM", + "SLICE_X31Y108": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X30Y109": "SLICEM", + "SLICE_X31Y109": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X30Y110": "SLICEM", + "SLICE_X31Y110": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X30Y111": "SLICEM", + "SLICE_X31Y111": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X30Y112": "SLICEM", + "SLICE_X31Y112": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X30Y113": "SLICEM", + "SLICE_X31Y113": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X30Y114": "SLICEM", + "SLICE_X31Y114": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X30Y115": "SLICEM", + "SLICE_X31Y115": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X30Y116": "SLICEM", + "SLICE_X31Y116": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X30Y117": "SLICEM", + "SLICE_X31Y117": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X30Y118": "SLICEM", + "SLICE_X31Y118": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X30Y119": "SLICEM", + "SLICE_X31Y119": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X30Y120": "SLICEM", + "SLICE_X31Y120": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X30Y121": "SLICEM", + "SLICE_X31Y121": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X30Y122": "SLICEM", + "SLICE_X31Y122": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X30Y123": "SLICEM", + "SLICE_X31Y123": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X30Y124": "SLICEM", + "SLICE_X31Y124": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X30Y125": "SLICEM", + "SLICE_X31Y125": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X30Y126": "SLICEM", + "SLICE_X31Y126": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X30Y127": "SLICEM", + "SLICE_X31Y127": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X30Y128": "SLICEM", + "SLICE_X31Y128": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X30Y129": "SLICEM", + "SLICE_X31Y129": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X30Y130": "SLICEM", + "SLICE_X31Y130": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X30Y131": "SLICEM", + "SLICE_X31Y131": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X30Y132": "SLICEM", + "SLICE_X31Y132": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X30Y133": "SLICEM", + "SLICE_X31Y133": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X30Y134": "SLICEM", + "SLICE_X31Y134": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X30Y135": "SLICEM", + "SLICE_X31Y135": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X30Y136": "SLICEM", + "SLICE_X31Y136": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X30Y137": "SLICEM", + "SLICE_X31Y137": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X30Y138": "SLICEM", + "SLICE_X31Y138": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X30Y139": "SLICEM", + "SLICE_X31Y139": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X30Y140": "SLICEM", + "SLICE_X31Y140": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X30Y141": "SLICEM", + "SLICE_X31Y141": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X30Y142": "SLICEM", + "SLICE_X31Y142": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X30Y143": "SLICEM", + "SLICE_X31Y143": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X30Y144": "SLICEM", + "SLICE_X31Y144": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X30Y145": "SLICEM", + "SLICE_X31Y145": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X30Y146": "SLICEM", + "SLICE_X31Y146": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X30Y147": "SLICEM", + "SLICE_X31Y147": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X30Y148": "SLICEM", + "SLICE_X31Y148": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X20Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 52, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X30Y149": "SLICEM", + "SLICE_X31Y149": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X34Y0": "SLICEM", + "SLICE_X35Y0": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X34Y1": "SLICEM", + "SLICE_X35Y1": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X34Y2": "SLICEM", + "SLICE_X35Y2": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X34Y3": "SLICEM", + "SLICE_X35Y3": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X34Y4": "SLICEM", + "SLICE_X35Y4": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X34Y5": "SLICEM", + "SLICE_X35Y5": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X34Y6": "SLICEM", + "SLICE_X35Y6": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X34Y7": "SLICEM", + "SLICE_X35Y7": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X34Y8": "SLICEM", + "SLICE_X35Y8": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X34Y9": "SLICEM", + "SLICE_X35Y9": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X34Y10": "SLICEM", + "SLICE_X35Y10": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X34Y11": "SLICEM", + "SLICE_X35Y11": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X34Y12": "SLICEM", + "SLICE_X35Y12": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X34Y13": "SLICEM", + "SLICE_X35Y13": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X34Y14": "SLICEM", + "SLICE_X35Y14": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X34Y15": "SLICEM", + "SLICE_X35Y15": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X34Y16": "SLICEM", + "SLICE_X35Y16": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X34Y17": "SLICEM", + "SLICE_X35Y17": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X34Y18": "SLICEM", + "SLICE_X35Y18": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X34Y19": "SLICEM", + "SLICE_X35Y19": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X34Y20": "SLICEM", + "SLICE_X35Y20": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X34Y21": "SLICEM", + "SLICE_X35Y21": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X34Y22": "SLICEM", + "SLICE_X35Y22": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X34Y23": "SLICEM", + "SLICE_X35Y23": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X34Y24": "SLICEM", + "SLICE_X35Y24": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X34Y25": "SLICEM", + "SLICE_X35Y25": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X34Y26": "SLICEM", + "SLICE_X35Y26": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X34Y27": "SLICEM", + "SLICE_X35Y27": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X34Y28": "SLICEM", + "SLICE_X35Y28": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X34Y29": "SLICEM", + "SLICE_X35Y29": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X34Y30": "SLICEM", + "SLICE_X35Y30": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X34Y31": "SLICEM", + "SLICE_X35Y31": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X34Y32": "SLICEM", + "SLICE_X35Y32": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X34Y33": "SLICEM", + "SLICE_X35Y33": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X34Y34": "SLICEM", + "SLICE_X35Y34": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X34Y35": "SLICEM", + "SLICE_X35Y35": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X34Y36": "SLICEM", + "SLICE_X35Y36": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X34Y37": "SLICEM", + "SLICE_X35Y37": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X34Y38": "SLICEM", + "SLICE_X35Y38": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X34Y39": "SLICEM", + "SLICE_X35Y39": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X34Y40": "SLICEM", + "SLICE_X35Y40": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X34Y41": "SLICEM", + "SLICE_X35Y41": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X34Y42": "SLICEM", + "SLICE_X35Y42": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X34Y43": "SLICEM", + "SLICE_X35Y43": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X34Y44": "SLICEM", + "SLICE_X35Y44": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X34Y45": "SLICEM", + "SLICE_X35Y45": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X34Y46": "SLICEM", + "SLICE_X35Y46": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X34Y47": "SLICEM", + "SLICE_X35Y47": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X34Y48": "SLICEM", + "SLICE_X35Y48": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 56, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X34Y49": "SLICEM", + "SLICE_X35Y49": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X34Y50": "SLICEM", + "SLICE_X35Y50": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X34Y51": "SLICEM", + "SLICE_X35Y51": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X34Y52": "SLICEM", + "SLICE_X35Y52": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X34Y53": "SLICEM", + "SLICE_X35Y53": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X34Y54": "SLICEM", + "SLICE_X35Y54": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X34Y55": "SLICEM", + "SLICE_X35Y55": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X34Y56": "SLICEM", + "SLICE_X35Y56": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X34Y57": "SLICEM", + "SLICE_X35Y57": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X34Y58": "SLICEM", + "SLICE_X35Y58": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X34Y59": "SLICEM", + "SLICE_X35Y59": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X34Y60": "SLICEM", + "SLICE_X35Y60": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X34Y61": "SLICEM", + "SLICE_X35Y61": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X34Y62": "SLICEM", + "SLICE_X35Y62": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X34Y63": "SLICEM", + "SLICE_X35Y63": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X34Y64": "SLICEM", + "SLICE_X35Y64": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X34Y65": "SLICEM", + "SLICE_X35Y65": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X34Y66": "SLICEM", + "SLICE_X35Y66": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X34Y67": "SLICEM", + "SLICE_X35Y67": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X34Y68": "SLICEM", + "SLICE_X35Y68": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X34Y69": "SLICEM", + "SLICE_X35Y69": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X34Y70": "SLICEM", + "SLICE_X35Y70": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X34Y71": "SLICEM", + "SLICE_X35Y71": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X34Y72": "SLICEM", + "SLICE_X35Y72": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X34Y73": "SLICEM", + "SLICE_X35Y73": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X34Y74": "SLICEM", + "SLICE_X35Y74": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X34Y75": "SLICEM", + "SLICE_X35Y75": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X34Y76": "SLICEM", + "SLICE_X35Y76": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X34Y77": "SLICEM", + "SLICE_X35Y77": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X34Y78": "SLICEM", + "SLICE_X35Y78": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X34Y79": "SLICEM", + "SLICE_X35Y79": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X34Y80": "SLICEM", + "SLICE_X35Y80": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X34Y81": "SLICEM", + "SLICE_X35Y81": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X34Y82": "SLICEM", + "SLICE_X35Y82": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X34Y83": "SLICEM", + "SLICE_X35Y83": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X34Y84": "SLICEM", + "SLICE_X35Y84": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X34Y85": "SLICEM", + "SLICE_X35Y85": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X34Y86": "SLICEM", + "SLICE_X35Y86": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X34Y87": "SLICEM", + "SLICE_X35Y87": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X34Y88": "SLICEM", + "SLICE_X35Y88": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X34Y89": "SLICEM", + "SLICE_X35Y89": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X34Y90": "SLICEM", + "SLICE_X35Y90": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X34Y91": "SLICEM", + "SLICE_X35Y91": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X34Y92": "SLICEM", + "SLICE_X35Y92": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X34Y93": "SLICEM", + "SLICE_X35Y93": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X34Y94": "SLICEM", + "SLICE_X35Y94": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X34Y95": "SLICEM", + "SLICE_X35Y95": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X34Y96": "SLICEM", + "SLICE_X35Y96": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X34Y97": "SLICEM", + "SLICE_X35Y97": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X34Y98": "SLICEM", + "SLICE_X35Y98": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 56, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X34Y99": "SLICEM", + "SLICE_X35Y99": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X34Y100": "SLICEM", + "SLICE_X35Y100": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X34Y101": "SLICEM", + "SLICE_X35Y101": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X34Y102": "SLICEM", + "SLICE_X35Y102": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X34Y103": "SLICEM", + "SLICE_X35Y103": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X34Y104": "SLICEM", + "SLICE_X35Y104": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X34Y105": "SLICEM", + "SLICE_X35Y105": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X34Y106": "SLICEM", + "SLICE_X35Y106": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X34Y107": "SLICEM", + "SLICE_X35Y107": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X34Y108": "SLICEM", + "SLICE_X35Y108": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X34Y109": "SLICEM", + "SLICE_X35Y109": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X34Y110": "SLICEM", + "SLICE_X35Y110": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X34Y111": "SLICEM", + "SLICE_X35Y111": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X34Y112": "SLICEM", + "SLICE_X35Y112": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X34Y113": "SLICEM", + "SLICE_X35Y113": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X34Y114": "SLICEM", + "SLICE_X35Y114": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X34Y115": "SLICEM", + "SLICE_X35Y115": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X34Y116": "SLICEM", + "SLICE_X35Y116": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X34Y117": "SLICEM", + "SLICE_X35Y117": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X34Y118": "SLICEM", + "SLICE_X35Y118": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X34Y119": "SLICEM", + "SLICE_X35Y119": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X34Y120": "SLICEM", + "SLICE_X35Y120": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X34Y121": "SLICEM", + "SLICE_X35Y121": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X34Y122": "SLICEM", + "SLICE_X35Y122": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X34Y123": "SLICEM", + "SLICE_X35Y123": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X34Y124": "SLICEM", + "SLICE_X35Y124": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X34Y125": "SLICEM", + "SLICE_X35Y125": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X34Y126": "SLICEM", + "SLICE_X35Y126": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X34Y127": "SLICEM", + "SLICE_X35Y127": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X34Y128": "SLICEM", + "SLICE_X35Y128": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X34Y129": "SLICEM", + "SLICE_X35Y129": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X34Y130": "SLICEM", + "SLICE_X35Y130": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X34Y131": "SLICEM", + "SLICE_X35Y131": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X34Y132": "SLICEM", + "SLICE_X35Y132": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X34Y133": "SLICEM", + "SLICE_X35Y133": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X34Y134": "SLICEM", + "SLICE_X35Y134": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X34Y135": "SLICEM", + "SLICE_X35Y135": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X34Y136": "SLICEM", + "SLICE_X35Y136": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X34Y137": "SLICEM", + "SLICE_X35Y137": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X34Y138": "SLICEM", + "SLICE_X35Y138": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X34Y139": "SLICEM", + "SLICE_X35Y139": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X34Y140": "SLICEM", + "SLICE_X35Y140": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X34Y141": "SLICEM", + "SLICE_X35Y141": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X34Y142": "SLICEM", + "SLICE_X35Y142": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X34Y143": "SLICEM", + "SLICE_X35Y143": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X34Y144": "SLICEM", + "SLICE_X35Y144": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X34Y145": "SLICEM", + "SLICE_X35Y145": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X34Y146": "SLICEM", + "SLICE_X35Y146": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X34Y147": "SLICEM", + "SLICE_X35Y147": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X34Y148": "SLICEM", + "SLICE_X35Y148": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X22Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 56, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X34Y149": "SLICEM", + "SLICE_X35Y149": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X50Y0": "SLICEM", + "SLICE_X51Y0": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X50Y1": "SLICEM", + "SLICE_X51Y1": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X50Y2": "SLICEM", + "SLICE_X51Y2": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X50Y3": "SLICEM", + "SLICE_X51Y3": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X50Y4": "SLICEM", + "SLICE_X51Y4": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X50Y5": "SLICEM", + "SLICE_X51Y5": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X50Y6": "SLICEM", + "SLICE_X51Y6": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X50Y7": "SLICEM", + "SLICE_X51Y7": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X50Y8": "SLICEM", + "SLICE_X51Y8": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X50Y9": "SLICEM", + "SLICE_X51Y9": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X50Y10": "SLICEM", + "SLICE_X51Y10": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X50Y11": "SLICEM", + "SLICE_X51Y11": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X50Y12": "SLICEM", + "SLICE_X51Y12": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X50Y13": "SLICEM", + "SLICE_X51Y13": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X50Y14": "SLICEM", + "SLICE_X51Y14": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X50Y15": "SLICEM", + "SLICE_X51Y15": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X50Y16": "SLICEM", + "SLICE_X51Y16": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X50Y17": "SLICEM", + "SLICE_X51Y17": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X50Y18": "SLICEM", + "SLICE_X51Y18": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X50Y19": "SLICEM", + "SLICE_X51Y19": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X50Y20": "SLICEM", + "SLICE_X51Y20": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X50Y21": "SLICEM", + "SLICE_X51Y21": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X50Y22": "SLICEM", + "SLICE_X51Y22": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X50Y23": "SLICEM", + "SLICE_X51Y23": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X50Y24": "SLICEM", + "SLICE_X51Y24": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X50Y25": "SLICEM", + "SLICE_X51Y25": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X50Y26": "SLICEM", + "SLICE_X51Y26": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X50Y27": "SLICEM", + "SLICE_X51Y27": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X50Y28": "SLICEM", + "SLICE_X51Y28": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X50Y29": "SLICEM", + "SLICE_X51Y29": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X50Y30": "SLICEM", + "SLICE_X51Y30": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X50Y31": "SLICEM", + "SLICE_X51Y31": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X50Y32": "SLICEM", + "SLICE_X51Y32": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X50Y33": "SLICEM", + "SLICE_X51Y33": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X50Y34": "SLICEM", + "SLICE_X51Y34": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X50Y35": "SLICEM", + "SLICE_X51Y35": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X50Y36": "SLICEM", + "SLICE_X51Y36": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X50Y37": "SLICEM", + "SLICE_X51Y37": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X50Y38": "SLICEM", + "SLICE_X51Y38": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X50Y39": "SLICEM", + "SLICE_X51Y39": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X50Y40": "SLICEM", + "SLICE_X51Y40": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X50Y41": "SLICEM", + "SLICE_X51Y41": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X50Y42": "SLICEM", + "SLICE_X51Y42": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X50Y43": "SLICEM", + "SLICE_X51Y43": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X50Y44": "SLICEM", + "SLICE_X51Y44": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X50Y45": "SLICEM", + "SLICE_X51Y45": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X50Y46": "SLICEM", + "SLICE_X51Y46": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X50Y47": "SLICEM", + "SLICE_X51Y47": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X50Y48": "SLICEM", + "SLICE_X51Y48": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 81, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X50Y49": "SLICEM", + "SLICE_X51Y49": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X50Y50": "SLICEM", + "SLICE_X51Y50": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X50Y51": "SLICEM", + "SLICE_X51Y51": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X50Y52": "SLICEM", + "SLICE_X51Y52": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X50Y53": "SLICEM", + "SLICE_X51Y53": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X50Y54": "SLICEM", + "SLICE_X51Y54": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X50Y55": "SLICEM", + "SLICE_X51Y55": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X50Y56": "SLICEM", + "SLICE_X51Y56": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X50Y57": "SLICEM", + "SLICE_X51Y57": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X50Y58": "SLICEM", + "SLICE_X51Y58": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X50Y59": "SLICEM", + "SLICE_X51Y59": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X50Y60": "SLICEM", + "SLICE_X51Y60": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X50Y61": "SLICEM", + "SLICE_X51Y61": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X50Y62": "SLICEM", + "SLICE_X51Y62": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X50Y63": "SLICEM", + "SLICE_X51Y63": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X50Y64": "SLICEM", + "SLICE_X51Y64": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X50Y65": "SLICEM", + "SLICE_X51Y65": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X50Y66": "SLICEM", + "SLICE_X51Y66": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X50Y67": "SLICEM", + "SLICE_X51Y67": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X50Y68": "SLICEM", + "SLICE_X51Y68": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X50Y69": "SLICEM", + "SLICE_X51Y69": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X50Y70": "SLICEM", + "SLICE_X51Y70": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X50Y71": "SLICEM", + "SLICE_X51Y71": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X50Y72": "SLICEM", + "SLICE_X51Y72": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X50Y73": "SLICEM", + "SLICE_X51Y73": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X50Y74": "SLICEM", + "SLICE_X51Y74": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X50Y75": "SLICEM", + "SLICE_X51Y75": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X50Y76": "SLICEM", + "SLICE_X51Y76": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X50Y77": "SLICEM", + "SLICE_X51Y77": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X50Y78": "SLICEM", + "SLICE_X51Y78": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X50Y79": "SLICEM", + "SLICE_X51Y79": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X50Y80": "SLICEM", + "SLICE_X51Y80": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X50Y81": "SLICEM", + "SLICE_X51Y81": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X50Y82": "SLICEM", + "SLICE_X51Y82": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X50Y83": "SLICEM", + "SLICE_X51Y83": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X50Y84": "SLICEM", + "SLICE_X51Y84": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X50Y85": "SLICEM", + "SLICE_X51Y85": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X50Y86": "SLICEM", + "SLICE_X51Y86": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X50Y87": "SLICEM", + "SLICE_X51Y87": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X50Y88": "SLICEM", + "SLICE_X51Y88": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X50Y89": "SLICEM", + "SLICE_X51Y89": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X50Y90": "SLICEM", + "SLICE_X51Y90": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X50Y91": "SLICEM", + "SLICE_X51Y91": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X50Y92": "SLICEM", + "SLICE_X51Y92": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X50Y93": "SLICEM", + "SLICE_X51Y93": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X50Y94": "SLICEM", + "SLICE_X51Y94": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X50Y95": "SLICEM", + "SLICE_X51Y95": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X50Y96": "SLICEM", + "SLICE_X51Y96": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X50Y97": "SLICEM", + "SLICE_X51Y97": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X50Y98": "SLICEM", + "SLICE_X51Y98": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 81, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X50Y99": "SLICEM", + "SLICE_X51Y99": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X50Y100": "SLICEM", + "SLICE_X51Y100": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X50Y101": "SLICEM", + "SLICE_X51Y101": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X50Y102": "SLICEM", + "SLICE_X51Y102": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X50Y103": "SLICEM", + "SLICE_X51Y103": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X50Y104": "SLICEM", + "SLICE_X51Y104": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X50Y105": "SLICEM", + "SLICE_X51Y105": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X50Y106": "SLICEM", + "SLICE_X51Y106": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X50Y107": "SLICEM", + "SLICE_X51Y107": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X50Y108": "SLICEM", + "SLICE_X51Y108": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X50Y109": "SLICEM", + "SLICE_X51Y109": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X50Y110": "SLICEM", + "SLICE_X51Y110": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X50Y111": "SLICEM", + "SLICE_X51Y111": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X50Y112": "SLICEM", + "SLICE_X51Y112": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X50Y113": "SLICEM", + "SLICE_X51Y113": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X50Y114": "SLICEM", + "SLICE_X51Y114": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X50Y115": "SLICEM", + "SLICE_X51Y115": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X50Y116": "SLICEM", + "SLICE_X51Y116": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X50Y117": "SLICEM", + "SLICE_X51Y117": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X50Y118": "SLICEM", + "SLICE_X51Y118": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X50Y119": "SLICEM", + "SLICE_X51Y119": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X50Y120": "SLICEM", + "SLICE_X51Y120": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X50Y121": "SLICEM", + "SLICE_X51Y121": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X50Y122": "SLICEM", + "SLICE_X51Y122": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X50Y123": "SLICEM", + "SLICE_X51Y123": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X50Y124": "SLICEM", + "SLICE_X51Y124": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X50Y125": "SLICEM", + "SLICE_X51Y125": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X50Y126": "SLICEM", + "SLICE_X51Y126": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X50Y127": "SLICEM", + "SLICE_X51Y127": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X50Y128": "SLICEM", + "SLICE_X51Y128": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X50Y129": "SLICEM", + "SLICE_X51Y129": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X50Y130": "SLICEM", + "SLICE_X51Y130": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X50Y131": "SLICEM", + "SLICE_X51Y131": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X50Y132": "SLICEM", + "SLICE_X51Y132": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X50Y133": "SLICEM", + "SLICE_X51Y133": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X50Y134": "SLICEM", + "SLICE_X51Y134": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X50Y135": "SLICEM", + "SLICE_X51Y135": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X50Y136": "SLICEM", + "SLICE_X51Y136": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X50Y137": "SLICEM", + "SLICE_X51Y137": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X50Y138": "SLICEM", + "SLICE_X51Y138": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X50Y139": "SLICEM", + "SLICE_X51Y139": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X50Y140": "SLICEM", + "SLICE_X51Y140": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X50Y141": "SLICEM", + "SLICE_X51Y141": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X50Y142": "SLICEM", + "SLICE_X51Y142": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X50Y143": "SLICEM", + "SLICE_X51Y143": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X50Y144": "SLICEM", + "SLICE_X51Y144": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X50Y145": "SLICEM", + "SLICE_X51Y145": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X50Y146": "SLICEM", + "SLICE_X51Y146": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X50Y147": "SLICEM", + "SLICE_X51Y147": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X50Y148": "SLICEM", + "SLICE_X51Y148": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X32Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 81, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X50Y149": "SLICEM", + "SLICE_X51Y149": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X56Y0": "SLICEM", + "SLICE_X57Y0": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X56Y1": "SLICEM", + "SLICE_X57Y1": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X56Y2": "SLICEM", + "SLICE_X57Y2": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X56Y3": "SLICEM", + "SLICE_X57Y3": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X56Y4": "SLICEM", + "SLICE_X57Y4": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X56Y5": "SLICEM", + "SLICE_X57Y5": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X56Y6": "SLICEM", + "SLICE_X57Y6": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X56Y7": "SLICEM", + "SLICE_X57Y7": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X56Y8": "SLICEM", + "SLICE_X57Y8": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X56Y9": "SLICEM", + "SLICE_X57Y9": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X56Y10": "SLICEM", + "SLICE_X57Y10": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X56Y11": "SLICEM", + "SLICE_X57Y11": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X56Y12": "SLICEM", + "SLICE_X57Y12": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X56Y13": "SLICEM", + "SLICE_X57Y13": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X56Y14": "SLICEM", + "SLICE_X57Y14": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X56Y15": "SLICEM", + "SLICE_X57Y15": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X56Y16": "SLICEM", + "SLICE_X57Y16": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X56Y17": "SLICEM", + "SLICE_X57Y17": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X56Y18": "SLICEM", + "SLICE_X57Y18": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X56Y19": "SLICEM", + "SLICE_X57Y19": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X56Y20": "SLICEM", + "SLICE_X57Y20": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X56Y21": "SLICEM", + "SLICE_X57Y21": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X56Y22": "SLICEM", + "SLICE_X57Y22": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X56Y23": "SLICEM", + "SLICE_X57Y23": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X56Y24": "SLICEM", + "SLICE_X57Y24": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X56Y25": "SLICEM", + "SLICE_X57Y25": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X56Y26": "SLICEM", + "SLICE_X57Y26": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X56Y27": "SLICEM", + "SLICE_X57Y27": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X56Y28": "SLICEM", + "SLICE_X57Y28": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X56Y29": "SLICEM", + "SLICE_X57Y29": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X56Y30": "SLICEM", + "SLICE_X57Y30": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X56Y31": "SLICEM", + "SLICE_X57Y31": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X56Y32": "SLICEM", + "SLICE_X57Y32": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X56Y33": "SLICEM", + "SLICE_X57Y33": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X56Y34": "SLICEM", + "SLICE_X57Y34": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X56Y35": "SLICEM", + "SLICE_X57Y35": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X56Y36": "SLICEM", + "SLICE_X57Y36": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X56Y37": "SLICEM", + "SLICE_X57Y37": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X56Y38": "SLICEM", + "SLICE_X57Y38": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X56Y39": "SLICEM", + "SLICE_X57Y39": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X56Y40": "SLICEM", + "SLICE_X57Y40": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X56Y41": "SLICEM", + "SLICE_X57Y41": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X56Y42": "SLICEM", + "SLICE_X57Y42": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X56Y43": "SLICEM", + "SLICE_X57Y43": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X56Y44": "SLICEM", + "SLICE_X57Y44": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X56Y45": "SLICEM", + "SLICE_X57Y45": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X56Y46": "SLICEM", + "SLICE_X57Y46": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X56Y47": "SLICEM", + "SLICE_X57Y47": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X56Y48": "SLICEM", + "SLICE_X57Y48": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 91, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X56Y49": "SLICEM", + "SLICE_X57Y49": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X56Y50": "SLICEM", + "SLICE_X57Y50": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X56Y51": "SLICEM", + "SLICE_X57Y51": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X56Y52": "SLICEM", + "SLICE_X57Y52": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X56Y53": "SLICEM", + "SLICE_X57Y53": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X56Y54": "SLICEM", + "SLICE_X57Y54": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X56Y55": "SLICEM", + "SLICE_X57Y55": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X56Y56": "SLICEM", + "SLICE_X57Y56": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X56Y57": "SLICEM", + "SLICE_X57Y57": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X56Y58": "SLICEM", + "SLICE_X57Y58": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X56Y59": "SLICEM", + "SLICE_X57Y59": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X56Y60": "SLICEM", + "SLICE_X57Y60": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X56Y61": "SLICEM", + "SLICE_X57Y61": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X56Y62": "SLICEM", + "SLICE_X57Y62": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X56Y63": "SLICEM", + "SLICE_X57Y63": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X56Y64": "SLICEM", + "SLICE_X57Y64": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X56Y65": "SLICEM", + "SLICE_X57Y65": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X56Y66": "SLICEM", + "SLICE_X57Y66": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X56Y67": "SLICEM", + "SLICE_X57Y67": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X56Y68": "SLICEM", + "SLICE_X57Y68": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X56Y69": "SLICEM", + "SLICE_X57Y69": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X56Y70": "SLICEM", + "SLICE_X57Y70": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X56Y71": "SLICEM", + "SLICE_X57Y71": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X56Y72": "SLICEM", + "SLICE_X57Y72": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X56Y73": "SLICEM", + "SLICE_X57Y73": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X56Y74": "SLICEM", + "SLICE_X57Y74": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X56Y75": "SLICEM", + "SLICE_X57Y75": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X56Y76": "SLICEM", + "SLICE_X57Y76": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X56Y77": "SLICEM", + "SLICE_X57Y77": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X56Y78": "SLICEM", + "SLICE_X57Y78": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X56Y79": "SLICEM", + "SLICE_X57Y79": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X56Y80": "SLICEM", + "SLICE_X57Y80": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X56Y81": "SLICEM", + "SLICE_X57Y81": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X56Y82": "SLICEM", + "SLICE_X57Y82": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X56Y83": "SLICEM", + "SLICE_X57Y83": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X56Y84": "SLICEM", + "SLICE_X57Y84": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X56Y85": "SLICEM", + "SLICE_X57Y85": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X56Y86": "SLICEM", + "SLICE_X57Y86": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X56Y87": "SLICEM", + "SLICE_X57Y87": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X56Y88": "SLICEM", + "SLICE_X57Y88": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X56Y89": "SLICEM", + "SLICE_X57Y89": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X56Y90": "SLICEM", + "SLICE_X57Y90": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X56Y91": "SLICEM", + "SLICE_X57Y91": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X56Y92": "SLICEM", + "SLICE_X57Y92": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X56Y93": "SLICEM", + "SLICE_X57Y93": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X56Y94": "SLICEM", + "SLICE_X57Y94": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X56Y95": "SLICEM", + "SLICE_X57Y95": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X56Y96": "SLICEM", + "SLICE_X57Y96": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X56Y97": "SLICEM", + "SLICE_X57Y97": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X56Y98": "SLICEM", + "SLICE_X57Y98": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 91, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X56Y99": "SLICEM", + "SLICE_X57Y99": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X56Y100": "SLICEM", + "SLICE_X57Y100": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X56Y101": "SLICEM", + "SLICE_X57Y101": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X56Y102": "SLICEM", + "SLICE_X57Y102": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X56Y103": "SLICEM", + "SLICE_X57Y103": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X56Y104": "SLICEM", + "SLICE_X57Y104": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X56Y105": "SLICEM", + "SLICE_X57Y105": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X56Y106": "SLICEM", + "SLICE_X57Y106": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X56Y107": "SLICEM", + "SLICE_X57Y107": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X56Y108": "SLICEM", + "SLICE_X57Y108": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X56Y109": "SLICEM", + "SLICE_X57Y109": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X56Y110": "SLICEM", + "SLICE_X57Y110": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X56Y111": "SLICEM", + "SLICE_X57Y111": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X56Y112": "SLICEM", + "SLICE_X57Y112": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X56Y113": "SLICEM", + "SLICE_X57Y113": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X56Y114": "SLICEM", + "SLICE_X57Y114": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X56Y115": "SLICEM", + "SLICE_X57Y115": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X56Y116": "SLICEM", + "SLICE_X57Y116": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X56Y117": "SLICEM", + "SLICE_X57Y117": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X56Y118": "SLICEM", + "SLICE_X57Y118": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X56Y119": "SLICEM", + "SLICE_X57Y119": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X56Y120": "SLICEM", + "SLICE_X57Y120": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X56Y121": "SLICEM", + "SLICE_X57Y121": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X56Y122": "SLICEM", + "SLICE_X57Y122": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X56Y123": "SLICEM", + "SLICE_X57Y123": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X56Y124": "SLICEM", + "SLICE_X57Y124": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X56Y125": "SLICEM", + "SLICE_X57Y125": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X56Y126": "SLICEM", + "SLICE_X57Y126": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X56Y127": "SLICEM", + "SLICE_X57Y127": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X56Y128": "SLICEM", + "SLICE_X57Y128": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X56Y129": "SLICEM", + "SLICE_X57Y129": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X56Y130": "SLICEM", + "SLICE_X57Y130": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X56Y131": "SLICEM", + "SLICE_X57Y131": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X56Y132": "SLICEM", + "SLICE_X57Y132": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X56Y133": "SLICEM", + "SLICE_X57Y133": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X56Y134": "SLICEM", + "SLICE_X57Y134": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X56Y135": "SLICEM", + "SLICE_X57Y135": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X56Y136": "SLICEM", + "SLICE_X57Y136": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X56Y137": "SLICEM", + "SLICE_X57Y137": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X56Y138": "SLICEM", + "SLICE_X57Y138": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X56Y139": "SLICEM", + "SLICE_X57Y139": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X56Y140": "SLICEM", + "SLICE_X57Y140": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X56Y141": "SLICEM", + "SLICE_X57Y141": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X56Y142": "SLICEM", + "SLICE_X57Y142": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X56Y143": "SLICEM", + "SLICE_X57Y143": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X56Y144": "SLICEM", + "SLICE_X57Y144": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X56Y145": "SLICEM", + "SLICE_X57Y145": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X56Y146": "SLICEM", + "SLICE_X57Y146": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X56Y147": "SLICEM", + "SLICE_X57Y147": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X56Y148": "SLICEM", + "SLICE_X57Y148": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_L_X36Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 91, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X56Y149": "SLICEM", + "SLICE_X57Y149": "SLICEL" + }, + "type": "CLBLM_L" + }, + "CLBLM_R_X3Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X2Y0": "SLICEM", + "SLICE_X3Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X2Y1": "SLICEM", + "SLICE_X3Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X2Y2": "SLICEM", + "SLICE_X3Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X2Y3": "SLICEM", + "SLICE_X3Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X2Y4": "SLICEM", + "SLICE_X3Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X2Y5": "SLICEM", + "SLICE_X3Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X2Y6": "SLICEM", + "SLICE_X3Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X2Y7": "SLICEM", + "SLICE_X3Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X2Y8": "SLICEM", + "SLICE_X3Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X2Y9": "SLICEM", + "SLICE_X3Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X2Y10": "SLICEM", + "SLICE_X3Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X2Y11": "SLICEM", + "SLICE_X3Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X2Y12": "SLICEM", + "SLICE_X3Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X2Y13": "SLICEM", + "SLICE_X3Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X2Y14": "SLICEM", + "SLICE_X3Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X2Y15": "SLICEM", + "SLICE_X3Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X2Y16": "SLICEM", + "SLICE_X3Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X2Y17": "SLICEM", + "SLICE_X3Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X2Y18": "SLICEM", + "SLICE_X3Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X2Y19": "SLICEM", + "SLICE_X3Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X2Y20": "SLICEM", + "SLICE_X3Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X2Y21": "SLICEM", + "SLICE_X3Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X2Y22": "SLICEM", + "SLICE_X3Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X2Y23": "SLICEM", + "SLICE_X3Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X2Y24": "SLICEM", + "SLICE_X3Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X2Y25": "SLICEM", + "SLICE_X3Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X2Y26": "SLICEM", + "SLICE_X3Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X2Y27": "SLICEM", + "SLICE_X3Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X2Y28": "SLICEM", + "SLICE_X3Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X2Y29": "SLICEM", + "SLICE_X3Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X2Y30": "SLICEM", + "SLICE_X3Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X2Y31": "SLICEM", + "SLICE_X3Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X2Y32": "SLICEM", + "SLICE_X3Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X2Y33": "SLICEM", + "SLICE_X3Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X2Y34": "SLICEM", + "SLICE_X3Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X2Y35": "SLICEM", + "SLICE_X3Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X2Y36": "SLICEM", + "SLICE_X3Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X2Y37": "SLICEM", + "SLICE_X3Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X2Y38": "SLICEM", + "SLICE_X3Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X2Y39": "SLICEM", + "SLICE_X3Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X2Y40": "SLICEM", + "SLICE_X3Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X2Y41": "SLICEM", + "SLICE_X3Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X2Y42": "SLICEM", + "SLICE_X3Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X2Y43": "SLICEM", + "SLICE_X3Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X2Y44": "SLICEM", + "SLICE_X3Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X2Y45": "SLICEM", + "SLICE_X3Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X2Y46": "SLICEM", + "SLICE_X3Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X2Y47": "SLICEM", + "SLICE_X3Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X2Y48": "SLICEM", + "SLICE_X3Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 13, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X2Y49": "SLICEM", + "SLICE_X3Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X2Y50": "SLICEM", + "SLICE_X3Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X2Y51": "SLICEM", + "SLICE_X3Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X2Y52": "SLICEM", + "SLICE_X3Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X2Y53": "SLICEM", + "SLICE_X3Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X2Y54": "SLICEM", + "SLICE_X3Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X2Y55": "SLICEM", + "SLICE_X3Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X2Y56": "SLICEM", + "SLICE_X3Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X2Y57": "SLICEM", + "SLICE_X3Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X2Y58": "SLICEM", + "SLICE_X3Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X2Y59": "SLICEM", + "SLICE_X3Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X2Y60": "SLICEM", + "SLICE_X3Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X2Y61": "SLICEM", + "SLICE_X3Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X2Y62": "SLICEM", + "SLICE_X3Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X2Y63": "SLICEM", + "SLICE_X3Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X2Y64": "SLICEM", + "SLICE_X3Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X2Y65": "SLICEM", + "SLICE_X3Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X2Y66": "SLICEM", + "SLICE_X3Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X2Y67": "SLICEM", + "SLICE_X3Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X2Y68": "SLICEM", + "SLICE_X3Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X2Y69": "SLICEM", + "SLICE_X3Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X2Y70": "SLICEM", + "SLICE_X3Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X2Y71": "SLICEM", + "SLICE_X3Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X2Y72": "SLICEM", + "SLICE_X3Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X2Y73": "SLICEM", + "SLICE_X3Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X2Y74": "SLICEM", + "SLICE_X3Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X2Y75": "SLICEM", + "SLICE_X3Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X2Y76": "SLICEM", + "SLICE_X3Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X2Y77": "SLICEM", + "SLICE_X3Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X2Y78": "SLICEM", + "SLICE_X3Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X2Y79": "SLICEM", + "SLICE_X3Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X2Y80": "SLICEM", + "SLICE_X3Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X2Y81": "SLICEM", + "SLICE_X3Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X2Y82": "SLICEM", + "SLICE_X3Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X2Y83": "SLICEM", + "SLICE_X3Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X2Y84": "SLICEM", + "SLICE_X3Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X2Y85": "SLICEM", + "SLICE_X3Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X2Y86": "SLICEM", + "SLICE_X3Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X2Y87": "SLICEM", + "SLICE_X3Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X2Y88": "SLICEM", + "SLICE_X3Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X2Y89": "SLICEM", + "SLICE_X3Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X2Y90": "SLICEM", + "SLICE_X3Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X2Y91": "SLICEM", + "SLICE_X3Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X2Y92": "SLICEM", + "SLICE_X3Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X2Y93": "SLICEM", + "SLICE_X3Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X2Y94": "SLICEM", + "SLICE_X3Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X2Y95": "SLICEM", + "SLICE_X3Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X2Y96": "SLICEM", + "SLICE_X3Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X2Y97": "SLICEM", + "SLICE_X3Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X2Y98": "SLICEM", + "SLICE_X3Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 13, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X2Y99": "SLICEM", + "SLICE_X3Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X2Y100": "SLICEM", + "SLICE_X3Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X2Y101": "SLICEM", + "SLICE_X3Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X2Y102": "SLICEM", + "SLICE_X3Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X2Y103": "SLICEM", + "SLICE_X3Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X2Y104": "SLICEM", + "SLICE_X3Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X2Y105": "SLICEM", + "SLICE_X3Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X2Y106": "SLICEM", + "SLICE_X3Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X2Y107": "SLICEM", + "SLICE_X3Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X2Y108": "SLICEM", + "SLICE_X3Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X2Y109": "SLICEM", + "SLICE_X3Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X2Y110": "SLICEM", + "SLICE_X3Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X2Y111": "SLICEM", + "SLICE_X3Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X2Y112": "SLICEM", + "SLICE_X3Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X2Y113": "SLICEM", + "SLICE_X3Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X2Y114": "SLICEM", + "SLICE_X3Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X2Y115": "SLICEM", + "SLICE_X3Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X2Y116": "SLICEM", + "SLICE_X3Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X2Y117": "SLICEM", + "SLICE_X3Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X2Y118": "SLICEM", + "SLICE_X3Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X2Y119": "SLICEM", + "SLICE_X3Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X2Y120": "SLICEM", + "SLICE_X3Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X2Y121": "SLICEM", + "SLICE_X3Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X2Y122": "SLICEM", + "SLICE_X3Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X2Y123": "SLICEM", + "SLICE_X3Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X2Y124": "SLICEM", + "SLICE_X3Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X2Y125": "SLICEM", + "SLICE_X3Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X2Y126": "SLICEM", + "SLICE_X3Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X2Y127": "SLICEM", + "SLICE_X3Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X2Y128": "SLICEM", + "SLICE_X3Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X2Y129": "SLICEM", + "SLICE_X3Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X2Y130": "SLICEM", + "SLICE_X3Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X2Y131": "SLICEM", + "SLICE_X3Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X2Y132": "SLICEM", + "SLICE_X3Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X2Y133": "SLICEM", + "SLICE_X3Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X2Y134": "SLICEM", + "SLICE_X3Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X2Y135": "SLICEM", + "SLICE_X3Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X2Y136": "SLICEM", + "SLICE_X3Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X2Y137": "SLICEM", + "SLICE_X3Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X2Y138": "SLICEM", + "SLICE_X3Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X2Y139": "SLICEM", + "SLICE_X3Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X2Y140": "SLICEM", + "SLICE_X3Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X2Y141": "SLICEM", + "SLICE_X3Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X2Y142": "SLICEM", + "SLICE_X3Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X2Y143": "SLICEM", + "SLICE_X3Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X2Y144": "SLICEM", + "SLICE_X3Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X2Y145": "SLICEM", + "SLICE_X3Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X2Y146": "SLICEM", + "SLICE_X3Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X2Y147": "SLICEM", + "SLICE_X3Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X2Y148": "SLICEM", + "SLICE_X3Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X3Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 13, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X2Y149": "SLICEM", + "SLICE_X3Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X6Y0": "SLICEM", + "SLICE_X7Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X6Y1": "SLICEM", + "SLICE_X7Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X6Y2": "SLICEM", + "SLICE_X7Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X6Y3": "SLICEM", + "SLICE_X7Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X6Y4": "SLICEM", + "SLICE_X7Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X6Y5": "SLICEM", + "SLICE_X7Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X6Y6": "SLICEM", + "SLICE_X7Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X6Y7": "SLICEM", + "SLICE_X7Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X6Y8": "SLICEM", + "SLICE_X7Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X6Y9": "SLICEM", + "SLICE_X7Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X6Y10": "SLICEM", + "SLICE_X7Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X6Y11": "SLICEM", + "SLICE_X7Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X6Y12": "SLICEM", + "SLICE_X7Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X6Y13": "SLICEM", + "SLICE_X7Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X6Y14": "SLICEM", + "SLICE_X7Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X6Y15": "SLICEM", + "SLICE_X7Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X6Y16": "SLICEM", + "SLICE_X7Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X6Y17": "SLICEM", + "SLICE_X7Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X6Y18": "SLICEM", + "SLICE_X7Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X6Y19": "SLICEM", + "SLICE_X7Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X6Y20": "SLICEM", + "SLICE_X7Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X6Y21": "SLICEM", + "SLICE_X7Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X6Y22": "SLICEM", + "SLICE_X7Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X6Y23": "SLICEM", + "SLICE_X7Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X6Y24": "SLICEM", + "SLICE_X7Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X6Y25": "SLICEM", + "SLICE_X7Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X6Y26": "SLICEM", + "SLICE_X7Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X6Y27": "SLICEM", + "SLICE_X7Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X6Y28": "SLICEM", + "SLICE_X7Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X6Y29": "SLICEM", + "SLICE_X7Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X6Y30": "SLICEM", + "SLICE_X7Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X6Y31": "SLICEM", + "SLICE_X7Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X6Y32": "SLICEM", + "SLICE_X7Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X6Y33": "SLICEM", + "SLICE_X7Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X6Y34": "SLICEM", + "SLICE_X7Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X6Y35": "SLICEM", + "SLICE_X7Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X6Y36": "SLICEM", + "SLICE_X7Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X6Y37": "SLICEM", + "SLICE_X7Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X6Y38": "SLICEM", + "SLICE_X7Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X6Y39": "SLICEM", + "SLICE_X7Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X6Y40": "SLICEM", + "SLICE_X7Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X6Y41": "SLICEM", + "SLICE_X7Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X6Y42": "SLICEM", + "SLICE_X7Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X6Y43": "SLICEM", + "SLICE_X7Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X6Y44": "SLICEM", + "SLICE_X7Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X6Y45": "SLICEM", + "SLICE_X7Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X6Y46": "SLICEM", + "SLICE_X7Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X6Y47": "SLICEM", + "SLICE_X7Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X6Y48": "SLICEM", + "SLICE_X7Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 17, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X6Y49": "SLICEM", + "SLICE_X7Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X6Y50": "SLICEM", + "SLICE_X7Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X6Y51": "SLICEM", + "SLICE_X7Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X6Y52": "SLICEM", + "SLICE_X7Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X6Y53": "SLICEM", + "SLICE_X7Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X6Y54": "SLICEM", + "SLICE_X7Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X6Y55": "SLICEM", + "SLICE_X7Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X6Y56": "SLICEM", + "SLICE_X7Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X6Y57": "SLICEM", + "SLICE_X7Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X6Y58": "SLICEM", + "SLICE_X7Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X6Y59": "SLICEM", + "SLICE_X7Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X6Y60": "SLICEM", + "SLICE_X7Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X6Y61": "SLICEM", + "SLICE_X7Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X6Y62": "SLICEM", + "SLICE_X7Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X6Y63": "SLICEM", + "SLICE_X7Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X6Y64": "SLICEM", + "SLICE_X7Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X6Y65": "SLICEM", + "SLICE_X7Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X6Y66": "SLICEM", + "SLICE_X7Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X6Y67": "SLICEM", + "SLICE_X7Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X6Y68": "SLICEM", + "SLICE_X7Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X6Y69": "SLICEM", + "SLICE_X7Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X6Y70": "SLICEM", + "SLICE_X7Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X6Y71": "SLICEM", + "SLICE_X7Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X6Y72": "SLICEM", + "SLICE_X7Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X6Y73": "SLICEM", + "SLICE_X7Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X6Y74": "SLICEM", + "SLICE_X7Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X6Y75": "SLICEM", + "SLICE_X7Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X6Y76": "SLICEM", + "SLICE_X7Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X6Y77": "SLICEM", + "SLICE_X7Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X6Y78": "SLICEM", + "SLICE_X7Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X6Y79": "SLICEM", + "SLICE_X7Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X6Y80": "SLICEM", + "SLICE_X7Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X6Y81": "SLICEM", + "SLICE_X7Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X6Y82": "SLICEM", + "SLICE_X7Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X6Y83": "SLICEM", + "SLICE_X7Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X6Y84": "SLICEM", + "SLICE_X7Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X6Y85": "SLICEM", + "SLICE_X7Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X6Y86": "SLICEM", + "SLICE_X7Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X6Y87": "SLICEM", + "SLICE_X7Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X6Y88": "SLICEM", + "SLICE_X7Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X6Y89": "SLICEM", + "SLICE_X7Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X6Y90": "SLICEM", + "SLICE_X7Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X6Y91": "SLICEM", + "SLICE_X7Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X6Y92": "SLICEM", + "SLICE_X7Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X6Y93": "SLICEM", + "SLICE_X7Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X6Y94": "SLICEM", + "SLICE_X7Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X6Y95": "SLICEM", + "SLICE_X7Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X6Y96": "SLICEM", + "SLICE_X7Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X6Y97": "SLICEM", + "SLICE_X7Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X6Y98": "SLICEM", + "SLICE_X7Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 17, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X6Y99": "SLICEM", + "SLICE_X7Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X6Y100": "SLICEM", + "SLICE_X7Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X6Y101": "SLICEM", + "SLICE_X7Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X6Y102": "SLICEM", + "SLICE_X7Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X6Y103": "SLICEM", + "SLICE_X7Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X6Y104": "SLICEM", + "SLICE_X7Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X6Y105": "SLICEM", + "SLICE_X7Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X6Y106": "SLICEM", + "SLICE_X7Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X6Y107": "SLICEM", + "SLICE_X7Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X6Y108": "SLICEM", + "SLICE_X7Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X6Y109": "SLICEM", + "SLICE_X7Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X6Y110": "SLICEM", + "SLICE_X7Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X6Y111": "SLICEM", + "SLICE_X7Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X6Y112": "SLICEM", + "SLICE_X7Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X6Y113": "SLICEM", + "SLICE_X7Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X6Y114": "SLICEM", + "SLICE_X7Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X6Y115": "SLICEM", + "SLICE_X7Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X6Y116": "SLICEM", + "SLICE_X7Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X6Y117": "SLICEM", + "SLICE_X7Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X6Y118": "SLICEM", + "SLICE_X7Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X6Y119": "SLICEM", + "SLICE_X7Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X6Y120": "SLICEM", + "SLICE_X7Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X6Y121": "SLICEM", + "SLICE_X7Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X6Y122": "SLICEM", + "SLICE_X7Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X6Y123": "SLICEM", + "SLICE_X7Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X6Y124": "SLICEM", + "SLICE_X7Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X6Y125": "SLICEM", + "SLICE_X7Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X6Y126": "SLICEM", + "SLICE_X7Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X6Y127": "SLICEM", + "SLICE_X7Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X6Y128": "SLICEM", + "SLICE_X7Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X6Y129": "SLICEM", + "SLICE_X7Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X6Y130": "SLICEM", + "SLICE_X7Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X6Y131": "SLICEM", + "SLICE_X7Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X6Y132": "SLICEM", + "SLICE_X7Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X6Y133": "SLICEM", + "SLICE_X7Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X6Y134": "SLICEM", + "SLICE_X7Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X6Y135": "SLICEM", + "SLICE_X7Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X6Y136": "SLICEM", + "SLICE_X7Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X6Y137": "SLICEM", + "SLICE_X7Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X6Y138": "SLICEM", + "SLICE_X7Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X6Y139": "SLICEM", + "SLICE_X7Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X6Y140": "SLICEM", + "SLICE_X7Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X6Y141": "SLICEM", + "SLICE_X7Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X6Y142": "SLICEM", + "SLICE_X7Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X6Y143": "SLICEM", + "SLICE_X7Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X6Y144": "SLICEM", + "SLICE_X7Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X6Y145": "SLICEM", + "SLICE_X7Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X6Y146": "SLICEM", + "SLICE_X7Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X6Y147": "SLICEM", + "SLICE_X7Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X6Y148": "SLICEM", + "SLICE_X7Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X5Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 17, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X6Y149": "SLICEM", + "SLICE_X7Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X8Y0": "SLICEM", + "SLICE_X9Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X8Y1": "SLICEM", + "SLICE_X9Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X8Y2": "SLICEM", + "SLICE_X9Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X8Y3": "SLICEM", + "SLICE_X9Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X8Y4": "SLICEM", + "SLICE_X9Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X8Y5": "SLICEM", + "SLICE_X9Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X8Y6": "SLICEM", + "SLICE_X9Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X8Y7": "SLICEM", + "SLICE_X9Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X8Y8": "SLICEM", + "SLICE_X9Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X8Y9": "SLICEM", + "SLICE_X9Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X8Y10": "SLICEM", + "SLICE_X9Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X8Y11": "SLICEM", + "SLICE_X9Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X8Y12": "SLICEM", + "SLICE_X9Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X8Y13": "SLICEM", + "SLICE_X9Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X8Y14": "SLICEM", + "SLICE_X9Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X8Y15": "SLICEM", + "SLICE_X9Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X8Y16": "SLICEM", + "SLICE_X9Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X8Y17": "SLICEM", + "SLICE_X9Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X8Y18": "SLICEM", + "SLICE_X9Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X8Y19": "SLICEM", + "SLICE_X9Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X8Y20": "SLICEM", + "SLICE_X9Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X8Y21": "SLICEM", + "SLICE_X9Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X8Y22": "SLICEM", + "SLICE_X9Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X8Y23": "SLICEM", + "SLICE_X9Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X8Y24": "SLICEM", + "SLICE_X9Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X8Y25": "SLICEM", + "SLICE_X9Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X8Y26": "SLICEM", + "SLICE_X9Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X8Y27": "SLICEM", + "SLICE_X9Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X8Y28": "SLICEM", + "SLICE_X9Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X8Y29": "SLICEM", + "SLICE_X9Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X8Y30": "SLICEM", + "SLICE_X9Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X8Y31": "SLICEM", + "SLICE_X9Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X8Y32": "SLICEM", + "SLICE_X9Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X8Y33": "SLICEM", + "SLICE_X9Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X8Y34": "SLICEM", + "SLICE_X9Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X8Y35": "SLICEM", + "SLICE_X9Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X8Y36": "SLICEM", + "SLICE_X9Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X8Y37": "SLICEM", + "SLICE_X9Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X8Y38": "SLICEM", + "SLICE_X9Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X8Y39": "SLICEM", + "SLICE_X9Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X8Y40": "SLICEM", + "SLICE_X9Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X8Y41": "SLICEM", + "SLICE_X9Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X8Y42": "SLICEM", + "SLICE_X9Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X8Y43": "SLICEM", + "SLICE_X9Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X8Y44": "SLICEM", + "SLICE_X9Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X8Y45": "SLICEM", + "SLICE_X9Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X8Y46": "SLICEM", + "SLICE_X9Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X8Y47": "SLICEM", + "SLICE_X9Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X8Y48": "SLICEM", + "SLICE_X9Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 23, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X8Y49": "SLICEM", + "SLICE_X9Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X8Y50": "SLICEM", + "SLICE_X9Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X8Y51": "SLICEM", + "SLICE_X9Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X8Y52": "SLICEM", + "SLICE_X9Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X8Y53": "SLICEM", + "SLICE_X9Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X8Y54": "SLICEM", + "SLICE_X9Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X8Y55": "SLICEM", + "SLICE_X9Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X8Y56": "SLICEM", + "SLICE_X9Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X8Y57": "SLICEM", + "SLICE_X9Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X8Y58": "SLICEM", + "SLICE_X9Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X8Y59": "SLICEM", + "SLICE_X9Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X8Y60": "SLICEM", + "SLICE_X9Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X8Y61": "SLICEM", + "SLICE_X9Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X8Y62": "SLICEM", + "SLICE_X9Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X8Y63": "SLICEM", + "SLICE_X9Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X8Y64": "SLICEM", + "SLICE_X9Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X8Y65": "SLICEM", + "SLICE_X9Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X8Y66": "SLICEM", + "SLICE_X9Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X8Y67": "SLICEM", + "SLICE_X9Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X8Y68": "SLICEM", + "SLICE_X9Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X8Y69": "SLICEM", + "SLICE_X9Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X8Y70": "SLICEM", + "SLICE_X9Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X8Y71": "SLICEM", + "SLICE_X9Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X8Y72": "SLICEM", + "SLICE_X9Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X8Y73": "SLICEM", + "SLICE_X9Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X8Y74": "SLICEM", + "SLICE_X9Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X8Y75": "SLICEM", + "SLICE_X9Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X8Y76": "SLICEM", + "SLICE_X9Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X8Y77": "SLICEM", + "SLICE_X9Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X8Y78": "SLICEM", + "SLICE_X9Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X8Y79": "SLICEM", + "SLICE_X9Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X8Y80": "SLICEM", + "SLICE_X9Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X8Y81": "SLICEM", + "SLICE_X9Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X8Y82": "SLICEM", + "SLICE_X9Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X8Y83": "SLICEM", + "SLICE_X9Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X8Y84": "SLICEM", + "SLICE_X9Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X8Y85": "SLICEM", + "SLICE_X9Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X8Y86": "SLICEM", + "SLICE_X9Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X8Y87": "SLICEM", + "SLICE_X9Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X8Y88": "SLICEM", + "SLICE_X9Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X8Y89": "SLICEM", + "SLICE_X9Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X8Y90": "SLICEM", + "SLICE_X9Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X8Y91": "SLICEM", + "SLICE_X9Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X8Y92": "SLICEM", + "SLICE_X9Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X8Y93": "SLICEM", + "SLICE_X9Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X8Y94": "SLICEM", + "SLICE_X9Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X8Y95": "SLICEM", + "SLICE_X9Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X8Y96": "SLICEM", + "SLICE_X9Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X8Y97": "SLICEM", + "SLICE_X9Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X8Y98": "SLICEM", + "SLICE_X9Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 23, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X8Y99": "SLICEM", + "SLICE_X9Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X8Y100": "SLICEM", + "SLICE_X9Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X8Y101": "SLICEM", + "SLICE_X9Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X8Y102": "SLICEM", + "SLICE_X9Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X8Y103": "SLICEM", + "SLICE_X9Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X8Y104": "SLICEM", + "SLICE_X9Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X8Y105": "SLICEM", + "SLICE_X9Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X8Y106": "SLICEM", + "SLICE_X9Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X8Y107": "SLICEM", + "SLICE_X9Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X8Y108": "SLICEM", + "SLICE_X9Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X8Y109": "SLICEM", + "SLICE_X9Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X8Y110": "SLICEM", + "SLICE_X9Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X8Y111": "SLICEM", + "SLICE_X9Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X8Y112": "SLICEM", + "SLICE_X9Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X8Y113": "SLICEM", + "SLICE_X9Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X8Y114": "SLICEM", + "SLICE_X9Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X8Y115": "SLICEM", + "SLICE_X9Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X8Y116": "SLICEM", + "SLICE_X9Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X8Y117": "SLICEM", + "SLICE_X9Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X8Y118": "SLICEM", + "SLICE_X9Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X8Y119": "SLICEM", + "SLICE_X9Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X8Y120": "SLICEM", + "SLICE_X9Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X8Y121": "SLICEM", + "SLICE_X9Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X8Y122": "SLICEM", + "SLICE_X9Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X8Y123": "SLICEM", + "SLICE_X9Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X8Y124": "SLICEM", + "SLICE_X9Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X8Y125": "SLICEM", + "SLICE_X9Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X8Y126": "SLICEM", + "SLICE_X9Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X8Y127": "SLICEM", + "SLICE_X9Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X8Y128": "SLICEM", + "SLICE_X9Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X8Y129": "SLICEM", + "SLICE_X9Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X8Y130": "SLICEM", + "SLICE_X9Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X8Y131": "SLICEM", + "SLICE_X9Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X8Y132": "SLICEM", + "SLICE_X9Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X8Y133": "SLICEM", + "SLICE_X9Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X8Y134": "SLICEM", + "SLICE_X9Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X8Y135": "SLICEM", + "SLICE_X9Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X8Y136": "SLICEM", + "SLICE_X9Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X8Y137": "SLICEM", + "SLICE_X9Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X8Y138": "SLICEM", + "SLICE_X9Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X8Y139": "SLICEM", + "SLICE_X9Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X8Y140": "SLICEM", + "SLICE_X9Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X8Y141": "SLICEM", + "SLICE_X9Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X8Y142": "SLICEM", + "SLICE_X9Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X8Y143": "SLICEM", + "SLICE_X9Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X8Y144": "SLICEM", + "SLICE_X9Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X8Y145": "SLICEM", + "SLICE_X9Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X8Y146": "SLICEM", + "SLICE_X9Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X8Y147": "SLICEM", + "SLICE_X9Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X8Y148": "SLICEM", + "SLICE_X9Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X7Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 23, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X8Y149": "SLICEM", + "SLICE_X9Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X14Y0": "SLICEM", + "SLICE_X15Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X14Y1": "SLICEM", + "SLICE_X15Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X14Y2": "SLICEM", + "SLICE_X15Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X14Y3": "SLICEM", + "SLICE_X15Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X14Y4": "SLICEM", + "SLICE_X15Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X14Y5": "SLICEM", + "SLICE_X15Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X14Y6": "SLICEM", + "SLICE_X15Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X14Y7": "SLICEM", + "SLICE_X15Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X14Y8": "SLICEM", + "SLICE_X15Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X14Y9": "SLICEM", + "SLICE_X15Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X14Y10": "SLICEM", + "SLICE_X15Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X14Y11": "SLICEM", + "SLICE_X15Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X14Y12": "SLICEM", + "SLICE_X15Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X14Y13": "SLICEM", + "SLICE_X15Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X14Y14": "SLICEM", + "SLICE_X15Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X14Y15": "SLICEM", + "SLICE_X15Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X14Y16": "SLICEM", + "SLICE_X15Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X14Y17": "SLICEM", + "SLICE_X15Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X14Y18": "SLICEM", + "SLICE_X15Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X14Y19": "SLICEM", + "SLICE_X15Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X14Y20": "SLICEM", + "SLICE_X15Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X14Y21": "SLICEM", + "SLICE_X15Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X14Y22": "SLICEM", + "SLICE_X15Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X14Y23": "SLICEM", + "SLICE_X15Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X14Y24": "SLICEM", + "SLICE_X15Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X14Y25": "SLICEM", + "SLICE_X15Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X14Y26": "SLICEM", + "SLICE_X15Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X14Y27": "SLICEM", + "SLICE_X15Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X14Y28": "SLICEM", + "SLICE_X15Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X14Y29": "SLICEM", + "SLICE_X15Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X14Y30": "SLICEM", + "SLICE_X15Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X14Y31": "SLICEM", + "SLICE_X15Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X14Y32": "SLICEM", + "SLICE_X15Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X14Y33": "SLICEM", + "SLICE_X15Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X14Y34": "SLICEM", + "SLICE_X15Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X14Y35": "SLICEM", + "SLICE_X15Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X14Y36": "SLICEM", + "SLICE_X15Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X14Y37": "SLICEM", + "SLICE_X15Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X14Y38": "SLICEM", + "SLICE_X15Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X14Y39": "SLICEM", + "SLICE_X15Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X14Y40": "SLICEM", + "SLICE_X15Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X14Y41": "SLICEM", + "SLICE_X15Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X14Y42": "SLICEM", + "SLICE_X15Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X14Y43": "SLICEM", + "SLICE_X15Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X14Y44": "SLICEM", + "SLICE_X15Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X14Y45": "SLICEM", + "SLICE_X15Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X14Y46": "SLICEM", + "SLICE_X15Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X14Y47": "SLICEM", + "SLICE_X15Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X14Y48": "SLICEM", + "SLICE_X15Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 33, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X14Y49": "SLICEM", + "SLICE_X15Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X14Y50": "SLICEM", + "SLICE_X15Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X14Y51": "SLICEM", + "SLICE_X15Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X14Y52": "SLICEM", + "SLICE_X15Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X14Y53": "SLICEM", + "SLICE_X15Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X14Y54": "SLICEM", + "SLICE_X15Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X14Y55": "SLICEM", + "SLICE_X15Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X14Y56": "SLICEM", + "SLICE_X15Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X14Y57": "SLICEM", + "SLICE_X15Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X14Y58": "SLICEM", + "SLICE_X15Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X14Y59": "SLICEM", + "SLICE_X15Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X14Y60": "SLICEM", + "SLICE_X15Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X14Y61": "SLICEM", + "SLICE_X15Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X14Y62": "SLICEM", + "SLICE_X15Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X14Y63": "SLICEM", + "SLICE_X15Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X14Y64": "SLICEM", + "SLICE_X15Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X14Y65": "SLICEM", + "SLICE_X15Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X14Y66": "SLICEM", + "SLICE_X15Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X14Y67": "SLICEM", + "SLICE_X15Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X14Y68": "SLICEM", + "SLICE_X15Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X14Y69": "SLICEM", + "SLICE_X15Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X14Y70": "SLICEM", + "SLICE_X15Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X14Y71": "SLICEM", + "SLICE_X15Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X14Y72": "SLICEM", + "SLICE_X15Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X14Y73": "SLICEM", + "SLICE_X15Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X14Y74": "SLICEM", + "SLICE_X15Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X14Y75": "SLICEM", + "SLICE_X15Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X14Y76": "SLICEM", + "SLICE_X15Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X14Y77": "SLICEM", + "SLICE_X15Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X14Y78": "SLICEM", + "SLICE_X15Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X14Y79": "SLICEM", + "SLICE_X15Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X14Y80": "SLICEM", + "SLICE_X15Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X14Y81": "SLICEM", + "SLICE_X15Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X14Y82": "SLICEM", + "SLICE_X15Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X14Y83": "SLICEM", + "SLICE_X15Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X14Y84": "SLICEM", + "SLICE_X15Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X14Y85": "SLICEM", + "SLICE_X15Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X14Y86": "SLICEM", + "SLICE_X15Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X14Y87": "SLICEM", + "SLICE_X15Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X14Y88": "SLICEM", + "SLICE_X15Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X14Y89": "SLICEM", + "SLICE_X15Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X14Y90": "SLICEM", + "SLICE_X15Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X14Y91": "SLICEM", + "SLICE_X15Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X14Y92": "SLICEM", + "SLICE_X15Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X14Y93": "SLICEM", + "SLICE_X15Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X14Y94": "SLICEM", + "SLICE_X15Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X14Y95": "SLICEM", + "SLICE_X15Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X14Y96": "SLICEM", + "SLICE_X15Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X14Y97": "SLICEM", + "SLICE_X15Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X14Y98": "SLICEM", + "SLICE_X15Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 33, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X14Y99": "SLICEM", + "SLICE_X15Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X14Y100": "SLICEM", + "SLICE_X15Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X14Y101": "SLICEM", + "SLICE_X15Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X14Y102": "SLICEM", + "SLICE_X15Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X14Y103": "SLICEM", + "SLICE_X15Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X14Y104": "SLICEM", + "SLICE_X15Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X14Y105": "SLICEM", + "SLICE_X15Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X14Y106": "SLICEM", + "SLICE_X15Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X14Y107": "SLICEM", + "SLICE_X15Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X14Y108": "SLICEM", + "SLICE_X15Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X14Y109": "SLICEM", + "SLICE_X15Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X14Y110": "SLICEM", + "SLICE_X15Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X14Y111": "SLICEM", + "SLICE_X15Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X14Y112": "SLICEM", + "SLICE_X15Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X14Y113": "SLICEM", + "SLICE_X15Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X14Y114": "SLICEM", + "SLICE_X15Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X14Y115": "SLICEM", + "SLICE_X15Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X14Y116": "SLICEM", + "SLICE_X15Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X14Y117": "SLICEM", + "SLICE_X15Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X14Y118": "SLICEM", + "SLICE_X15Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X14Y119": "SLICEM", + "SLICE_X15Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X14Y120": "SLICEM", + "SLICE_X15Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X14Y121": "SLICEM", + "SLICE_X15Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X14Y122": "SLICEM", + "SLICE_X15Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X14Y123": "SLICEM", + "SLICE_X15Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X14Y124": "SLICEM", + "SLICE_X15Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X14Y125": "SLICEM", + "SLICE_X15Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X14Y126": "SLICEM", + "SLICE_X15Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X14Y127": "SLICEM", + "SLICE_X15Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X14Y128": "SLICEM", + "SLICE_X15Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X14Y129": "SLICEM", + "SLICE_X15Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X14Y130": "SLICEM", + "SLICE_X15Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X14Y131": "SLICEM", + "SLICE_X15Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X14Y132": "SLICEM", + "SLICE_X15Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X14Y133": "SLICEM", + "SLICE_X15Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X14Y134": "SLICEM", + "SLICE_X15Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X14Y135": "SLICEM", + "SLICE_X15Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X14Y136": "SLICEM", + "SLICE_X15Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X14Y137": "SLICEM", + "SLICE_X15Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X14Y138": "SLICEM", + "SLICE_X15Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X14Y139": "SLICEM", + "SLICE_X15Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X14Y140": "SLICEM", + "SLICE_X15Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X14Y141": "SLICEM", + "SLICE_X15Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X14Y142": "SLICEM", + "SLICE_X15Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X14Y143": "SLICEM", + "SLICE_X15Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X14Y144": "SLICEM", + "SLICE_X15Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X14Y145": "SLICEM", + "SLICE_X15Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X14Y146": "SLICEM", + "SLICE_X15Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X14Y147": "SLICEM", + "SLICE_X15Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X14Y148": "SLICEM", + "SLICE_X15Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X11Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 33, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X14Y149": "SLICEM", + "SLICE_X15Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X38Y0": "SLICEM", + "SLICE_X39Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X38Y1": "SLICEM", + "SLICE_X39Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X38Y2": "SLICEM", + "SLICE_X39Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X38Y3": "SLICEM", + "SLICE_X39Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X38Y4": "SLICEM", + "SLICE_X39Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X38Y5": "SLICEM", + "SLICE_X39Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X38Y6": "SLICEM", + "SLICE_X39Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X38Y7": "SLICEM", + "SLICE_X39Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X38Y8": "SLICEM", + "SLICE_X39Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X38Y9": "SLICEM", + "SLICE_X39Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X38Y10": "SLICEM", + "SLICE_X39Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X38Y11": "SLICEM", + "SLICE_X39Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X38Y12": "SLICEM", + "SLICE_X39Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X38Y13": "SLICEM", + "SLICE_X39Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X38Y14": "SLICEM", + "SLICE_X39Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X38Y15": "SLICEM", + "SLICE_X39Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X38Y16": "SLICEM", + "SLICE_X39Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X38Y17": "SLICEM", + "SLICE_X39Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X38Y18": "SLICEM", + "SLICE_X39Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X38Y19": "SLICEM", + "SLICE_X39Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X38Y20": "SLICEM", + "SLICE_X39Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X38Y21": "SLICEM", + "SLICE_X39Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X38Y22": "SLICEM", + "SLICE_X39Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X38Y23": "SLICEM", + "SLICE_X39Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X38Y24": "SLICEM", + "SLICE_X39Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X38Y25": "SLICEM", + "SLICE_X39Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X38Y26": "SLICEM", + "SLICE_X39Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X38Y27": "SLICEM", + "SLICE_X39Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X38Y28": "SLICEM", + "SLICE_X39Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X38Y29": "SLICEM", + "SLICE_X39Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X38Y30": "SLICEM", + "SLICE_X39Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X38Y31": "SLICEM", + "SLICE_X39Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X38Y32": "SLICEM", + "SLICE_X39Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X38Y33": "SLICEM", + "SLICE_X39Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X38Y34": "SLICEM", + "SLICE_X39Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X38Y35": "SLICEM", + "SLICE_X39Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X38Y36": "SLICEM", + "SLICE_X39Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X38Y37": "SLICEM", + "SLICE_X39Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X38Y38": "SLICEM", + "SLICE_X39Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X38Y39": "SLICEM", + "SLICE_X39Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X38Y40": "SLICEM", + "SLICE_X39Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X38Y41": "SLICEM", + "SLICE_X39Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X38Y42": "SLICEM", + "SLICE_X39Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X38Y43": "SLICEM", + "SLICE_X39Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X38Y44": "SLICEM", + "SLICE_X39Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X38Y45": "SLICEM", + "SLICE_X39Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X38Y46": "SLICEM", + "SLICE_X39Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X38Y47": "SLICEM", + "SLICE_X39Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X38Y48": "SLICEM", + "SLICE_X39Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 65, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X38Y49": "SLICEM", + "SLICE_X39Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X38Y50": "SLICEM", + "SLICE_X39Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X38Y51": "SLICEM", + "SLICE_X39Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X38Y52": "SLICEM", + "SLICE_X39Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X38Y53": "SLICEM", + "SLICE_X39Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X38Y54": "SLICEM", + "SLICE_X39Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X38Y55": "SLICEM", + "SLICE_X39Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X38Y56": "SLICEM", + "SLICE_X39Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X38Y57": "SLICEM", + "SLICE_X39Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X38Y58": "SLICEM", + "SLICE_X39Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X38Y59": "SLICEM", + "SLICE_X39Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X38Y60": "SLICEM", + "SLICE_X39Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X38Y61": "SLICEM", + "SLICE_X39Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X38Y62": "SLICEM", + "SLICE_X39Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X38Y63": "SLICEM", + "SLICE_X39Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X38Y64": "SLICEM", + "SLICE_X39Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X38Y65": "SLICEM", + "SLICE_X39Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X38Y66": "SLICEM", + "SLICE_X39Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X38Y67": "SLICEM", + "SLICE_X39Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X38Y68": "SLICEM", + "SLICE_X39Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X38Y69": "SLICEM", + "SLICE_X39Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X38Y70": "SLICEM", + "SLICE_X39Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X38Y71": "SLICEM", + "SLICE_X39Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X38Y72": "SLICEM", + "SLICE_X39Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X38Y73": "SLICEM", + "SLICE_X39Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X38Y74": "SLICEM", + "SLICE_X39Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X38Y75": "SLICEM", + "SLICE_X39Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X38Y76": "SLICEM", + "SLICE_X39Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X38Y77": "SLICEM", + "SLICE_X39Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X38Y78": "SLICEM", + "SLICE_X39Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X38Y79": "SLICEM", + "SLICE_X39Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X38Y80": "SLICEM", + "SLICE_X39Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X38Y81": "SLICEM", + "SLICE_X39Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X38Y82": "SLICEM", + "SLICE_X39Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X38Y83": "SLICEM", + "SLICE_X39Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X38Y84": "SLICEM", + "SLICE_X39Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X38Y85": "SLICEM", + "SLICE_X39Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X38Y86": "SLICEM", + "SLICE_X39Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X38Y87": "SLICEM", + "SLICE_X39Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X38Y88": "SLICEM", + "SLICE_X39Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X38Y89": "SLICEM", + "SLICE_X39Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X38Y90": "SLICEM", + "SLICE_X39Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X38Y91": "SLICEM", + "SLICE_X39Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X38Y92": "SLICEM", + "SLICE_X39Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X38Y93": "SLICEM", + "SLICE_X39Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X38Y94": "SLICEM", + "SLICE_X39Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X38Y95": "SLICEM", + "SLICE_X39Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X38Y96": "SLICEM", + "SLICE_X39Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X38Y97": "SLICEM", + "SLICE_X39Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X38Y98": "SLICEM", + "SLICE_X39Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 65, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X38Y99": "SLICEM", + "SLICE_X39Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X38Y100": "SLICEM", + "SLICE_X39Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X38Y101": "SLICEM", + "SLICE_X39Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X38Y102": "SLICEM", + "SLICE_X39Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X38Y103": "SLICEM", + "SLICE_X39Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X38Y104": "SLICEM", + "SLICE_X39Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X38Y105": "SLICEM", + "SLICE_X39Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X38Y106": "SLICEM", + "SLICE_X39Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X38Y107": "SLICEM", + "SLICE_X39Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X38Y108": "SLICEM", + "SLICE_X39Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X38Y109": "SLICEM", + "SLICE_X39Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X38Y110": "SLICEM", + "SLICE_X39Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X38Y111": "SLICEM", + "SLICE_X39Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X38Y112": "SLICEM", + "SLICE_X39Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X38Y113": "SLICEM", + "SLICE_X39Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X38Y114": "SLICEM", + "SLICE_X39Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X38Y115": "SLICEM", + "SLICE_X39Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X38Y116": "SLICEM", + "SLICE_X39Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X38Y117": "SLICEM", + "SLICE_X39Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X38Y118": "SLICEM", + "SLICE_X39Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X38Y119": "SLICEM", + "SLICE_X39Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X38Y120": "SLICEM", + "SLICE_X39Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X38Y121": "SLICEM", + "SLICE_X39Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X38Y122": "SLICEM", + "SLICE_X39Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X38Y123": "SLICEM", + "SLICE_X39Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X38Y124": "SLICEM", + "SLICE_X39Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X38Y125": "SLICEM", + "SLICE_X39Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X38Y126": "SLICEM", + "SLICE_X39Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X38Y127": "SLICEM", + "SLICE_X39Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X38Y128": "SLICEM", + "SLICE_X39Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X38Y129": "SLICEM", + "SLICE_X39Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X38Y130": "SLICEM", + "SLICE_X39Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X38Y131": "SLICEM", + "SLICE_X39Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X38Y132": "SLICEM", + "SLICE_X39Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X38Y133": "SLICEM", + "SLICE_X39Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X38Y134": "SLICEM", + "SLICE_X39Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X38Y135": "SLICEM", + "SLICE_X39Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X38Y136": "SLICEM", + "SLICE_X39Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X38Y137": "SLICEM", + "SLICE_X39Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X38Y138": "SLICEM", + "SLICE_X39Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X38Y139": "SLICEM", + "SLICE_X39Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X38Y140": "SLICEM", + "SLICE_X39Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X38Y141": "SLICEM", + "SLICE_X39Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X38Y142": "SLICEM", + "SLICE_X39Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X38Y143": "SLICEM", + "SLICE_X39Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X38Y144": "SLICEM", + "SLICE_X39Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X38Y145": "SLICEM", + "SLICE_X39Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X38Y146": "SLICEM", + "SLICE_X39Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X38Y147": "SLICEM", + "SLICE_X39Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X38Y148": "SLICEM", + "SLICE_X39Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X25Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 65, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X38Y149": "SLICEM", + "SLICE_X39Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X42Y0": "SLICEM", + "SLICE_X43Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X42Y1": "SLICEM", + "SLICE_X43Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X42Y2": "SLICEM", + "SLICE_X43Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X42Y3": "SLICEM", + "SLICE_X43Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X42Y4": "SLICEM", + "SLICE_X43Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X42Y5": "SLICEM", + "SLICE_X43Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X42Y6": "SLICEM", + "SLICE_X43Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X42Y7": "SLICEM", + "SLICE_X43Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X42Y8": "SLICEM", + "SLICE_X43Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X42Y9": "SLICEM", + "SLICE_X43Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X42Y10": "SLICEM", + "SLICE_X43Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X42Y11": "SLICEM", + "SLICE_X43Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X42Y12": "SLICEM", + "SLICE_X43Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X42Y13": "SLICEM", + "SLICE_X43Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X42Y14": "SLICEM", + "SLICE_X43Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X42Y15": "SLICEM", + "SLICE_X43Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X42Y16": "SLICEM", + "SLICE_X43Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X42Y17": "SLICEM", + "SLICE_X43Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X42Y18": "SLICEM", + "SLICE_X43Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X42Y19": "SLICEM", + "SLICE_X43Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X42Y20": "SLICEM", + "SLICE_X43Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X42Y21": "SLICEM", + "SLICE_X43Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X42Y22": "SLICEM", + "SLICE_X43Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X42Y23": "SLICEM", + "SLICE_X43Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X42Y24": "SLICEM", + "SLICE_X43Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X42Y25": "SLICEM", + "SLICE_X43Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X42Y26": "SLICEM", + "SLICE_X43Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X42Y27": "SLICEM", + "SLICE_X43Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X42Y28": "SLICEM", + "SLICE_X43Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X42Y29": "SLICEM", + "SLICE_X43Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X42Y30": "SLICEM", + "SLICE_X43Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X42Y31": "SLICEM", + "SLICE_X43Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X42Y32": "SLICEM", + "SLICE_X43Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X42Y33": "SLICEM", + "SLICE_X43Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X42Y34": "SLICEM", + "SLICE_X43Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X42Y35": "SLICEM", + "SLICE_X43Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X42Y36": "SLICEM", + "SLICE_X43Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X42Y37": "SLICEM", + "SLICE_X43Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X42Y38": "SLICEM", + "SLICE_X43Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X42Y39": "SLICEM", + "SLICE_X43Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X42Y40": "SLICEM", + "SLICE_X43Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X42Y41": "SLICEM", + "SLICE_X43Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X42Y42": "SLICEM", + "SLICE_X43Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X42Y43": "SLICEM", + "SLICE_X43Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X42Y44": "SLICEM", + "SLICE_X43Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X42Y45": "SLICEM", + "SLICE_X43Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X42Y46": "SLICEM", + "SLICE_X43Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X42Y47": "SLICEM", + "SLICE_X43Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X42Y48": "SLICEM", + "SLICE_X43Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 70, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X42Y49": "SLICEM", + "SLICE_X43Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X42Y50": "SLICEM", + "SLICE_X43Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X42Y51": "SLICEM", + "SLICE_X43Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X42Y52": "SLICEM", + "SLICE_X43Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X42Y53": "SLICEM", + "SLICE_X43Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X42Y54": "SLICEM", + "SLICE_X43Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X42Y55": "SLICEM", + "SLICE_X43Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X42Y56": "SLICEM", + "SLICE_X43Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X42Y57": "SLICEM", + "SLICE_X43Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X42Y58": "SLICEM", + "SLICE_X43Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X42Y59": "SLICEM", + "SLICE_X43Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X42Y60": "SLICEM", + "SLICE_X43Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X42Y61": "SLICEM", + "SLICE_X43Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X42Y62": "SLICEM", + "SLICE_X43Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X42Y63": "SLICEM", + "SLICE_X43Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X42Y64": "SLICEM", + "SLICE_X43Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X42Y65": "SLICEM", + "SLICE_X43Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X42Y66": "SLICEM", + "SLICE_X43Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X42Y67": "SLICEM", + "SLICE_X43Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X42Y68": "SLICEM", + "SLICE_X43Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X42Y69": "SLICEM", + "SLICE_X43Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X42Y70": "SLICEM", + "SLICE_X43Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X42Y71": "SLICEM", + "SLICE_X43Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X42Y72": "SLICEM", + "SLICE_X43Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X42Y73": "SLICEM", + "SLICE_X43Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X42Y74": "SLICEM", + "SLICE_X43Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X42Y75": "SLICEM", + "SLICE_X43Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X42Y76": "SLICEM", + "SLICE_X43Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X42Y77": "SLICEM", + "SLICE_X43Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X42Y78": "SLICEM", + "SLICE_X43Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X42Y79": "SLICEM", + "SLICE_X43Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X42Y80": "SLICEM", + "SLICE_X43Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X42Y81": "SLICEM", + "SLICE_X43Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X42Y82": "SLICEM", + "SLICE_X43Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X42Y83": "SLICEM", + "SLICE_X43Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X42Y84": "SLICEM", + "SLICE_X43Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X42Y85": "SLICEM", + "SLICE_X43Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X42Y86": "SLICEM", + "SLICE_X43Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X42Y87": "SLICEM", + "SLICE_X43Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X42Y88": "SLICEM", + "SLICE_X43Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X42Y89": "SLICEM", + "SLICE_X43Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X42Y90": "SLICEM", + "SLICE_X43Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X42Y91": "SLICEM", + "SLICE_X43Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X42Y92": "SLICEM", + "SLICE_X43Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X42Y93": "SLICEM", + "SLICE_X43Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X42Y94": "SLICEM", + "SLICE_X43Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X42Y95": "SLICEM", + "SLICE_X43Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X42Y96": "SLICEM", + "SLICE_X43Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X42Y97": "SLICEM", + "SLICE_X43Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X42Y98": "SLICEM", + "SLICE_X43Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 70, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X42Y99": "SLICEM", + "SLICE_X43Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X42Y125": "SLICEM", + "SLICE_X43Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X42Y126": "SLICEM", + "SLICE_X43Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X42Y127": "SLICEM", + "SLICE_X43Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X42Y128": "SLICEM", + "SLICE_X43Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X42Y129": "SLICEM", + "SLICE_X43Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X42Y130": "SLICEM", + "SLICE_X43Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X42Y131": "SLICEM", + "SLICE_X43Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X42Y132": "SLICEM", + "SLICE_X43Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X42Y133": "SLICEM", + "SLICE_X43Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X42Y134": "SLICEM", + "SLICE_X43Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X42Y135": "SLICEM", + "SLICE_X43Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X42Y136": "SLICEM", + "SLICE_X43Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X42Y137": "SLICEM", + "SLICE_X43Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X42Y138": "SLICEM", + "SLICE_X43Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X42Y139": "SLICEM", + "SLICE_X43Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X42Y140": "SLICEM", + "SLICE_X43Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X42Y141": "SLICEM", + "SLICE_X43Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X42Y142": "SLICEM", + "SLICE_X43Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X42Y143": "SLICEM", + "SLICE_X43Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X42Y144": "SLICEM", + "SLICE_X43Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X42Y145": "SLICEM", + "SLICE_X43Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X42Y146": "SLICEM", + "SLICE_X43Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X42Y147": "SLICEM", + "SLICE_X43Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X42Y148": "SLICEM", + "SLICE_X43Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X27Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 70, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X42Y149": "SLICEM", + "SLICE_X43Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X46Y0": "SLICEM", + "SLICE_X47Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X46Y1": "SLICEM", + "SLICE_X47Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X46Y2": "SLICEM", + "SLICE_X47Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X46Y3": "SLICEM", + "SLICE_X47Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X46Y4": "SLICEM", + "SLICE_X47Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X46Y5": "SLICEM", + "SLICE_X47Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X46Y6": "SLICEM", + "SLICE_X47Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X46Y7": "SLICEM", + "SLICE_X47Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X46Y8": "SLICEM", + "SLICE_X47Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X46Y9": "SLICEM", + "SLICE_X47Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X46Y10": "SLICEM", + "SLICE_X47Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X46Y11": "SLICEM", + "SLICE_X47Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X46Y12": "SLICEM", + "SLICE_X47Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X46Y13": "SLICEM", + "SLICE_X47Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X46Y14": "SLICEM", + "SLICE_X47Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X46Y15": "SLICEM", + "SLICE_X47Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X46Y16": "SLICEM", + "SLICE_X47Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X46Y17": "SLICEM", + "SLICE_X47Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X46Y18": "SLICEM", + "SLICE_X47Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X46Y19": "SLICEM", + "SLICE_X47Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X46Y20": "SLICEM", + "SLICE_X47Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X46Y21": "SLICEM", + "SLICE_X47Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X46Y22": "SLICEM", + "SLICE_X47Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X46Y23": "SLICEM", + "SLICE_X47Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X46Y24": "SLICEM", + "SLICE_X47Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X46Y25": "SLICEM", + "SLICE_X47Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X46Y26": "SLICEM", + "SLICE_X47Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X46Y27": "SLICEM", + "SLICE_X47Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X46Y28": "SLICEM", + "SLICE_X47Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X46Y29": "SLICEM", + "SLICE_X47Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X46Y30": "SLICEM", + "SLICE_X47Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X46Y31": "SLICEM", + "SLICE_X47Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X46Y32": "SLICEM", + "SLICE_X47Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X46Y33": "SLICEM", + "SLICE_X47Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X46Y34": "SLICEM", + "SLICE_X47Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X46Y35": "SLICEM", + "SLICE_X47Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X46Y36": "SLICEM", + "SLICE_X47Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X46Y37": "SLICEM", + "SLICE_X47Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X46Y38": "SLICEM", + "SLICE_X47Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X46Y39": "SLICEM", + "SLICE_X47Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X46Y40": "SLICEM", + "SLICE_X47Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X46Y41": "SLICEM", + "SLICE_X47Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X46Y42": "SLICEM", + "SLICE_X47Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X46Y43": "SLICEM", + "SLICE_X47Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X46Y44": "SLICEM", + "SLICE_X47Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X46Y45": "SLICEM", + "SLICE_X47Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X46Y46": "SLICEM", + "SLICE_X47Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X46Y47": "SLICEM", + "SLICE_X47Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X46Y48": "SLICEM", + "SLICE_X47Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 74, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X46Y49": "SLICEM", + "SLICE_X47Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X46Y50": "SLICEM", + "SLICE_X47Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X46Y51": "SLICEM", + "SLICE_X47Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X46Y52": "SLICEM", + "SLICE_X47Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X46Y53": "SLICEM", + "SLICE_X47Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X46Y54": "SLICEM", + "SLICE_X47Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X46Y55": "SLICEM", + "SLICE_X47Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X46Y56": "SLICEM", + "SLICE_X47Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X46Y57": "SLICEM", + "SLICE_X47Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X46Y58": "SLICEM", + "SLICE_X47Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X46Y59": "SLICEM", + "SLICE_X47Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X46Y60": "SLICEM", + "SLICE_X47Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X46Y61": "SLICEM", + "SLICE_X47Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X46Y62": "SLICEM", + "SLICE_X47Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X46Y63": "SLICEM", + "SLICE_X47Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X46Y64": "SLICEM", + "SLICE_X47Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X46Y65": "SLICEM", + "SLICE_X47Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X46Y66": "SLICEM", + "SLICE_X47Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X46Y67": "SLICEM", + "SLICE_X47Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X46Y68": "SLICEM", + "SLICE_X47Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X46Y69": "SLICEM", + "SLICE_X47Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X46Y70": "SLICEM", + "SLICE_X47Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X46Y71": "SLICEM", + "SLICE_X47Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X46Y72": "SLICEM", + "SLICE_X47Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X46Y73": "SLICEM", + "SLICE_X47Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X46Y74": "SLICEM", + "SLICE_X47Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X46Y75": "SLICEM", + "SLICE_X47Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X46Y76": "SLICEM", + "SLICE_X47Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X46Y77": "SLICEM", + "SLICE_X47Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X46Y78": "SLICEM", + "SLICE_X47Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X46Y79": "SLICEM", + "SLICE_X47Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X46Y80": "SLICEM", + "SLICE_X47Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X46Y81": "SLICEM", + "SLICE_X47Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X46Y82": "SLICEM", + "SLICE_X47Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X46Y83": "SLICEM", + "SLICE_X47Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X46Y84": "SLICEM", + "SLICE_X47Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X46Y85": "SLICEM", + "SLICE_X47Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X46Y86": "SLICEM", + "SLICE_X47Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X46Y87": "SLICEM", + "SLICE_X47Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X46Y88": "SLICEM", + "SLICE_X47Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X46Y89": "SLICEM", + "SLICE_X47Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X46Y90": "SLICEM", + "SLICE_X47Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X46Y91": "SLICEM", + "SLICE_X47Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X46Y92": "SLICEM", + "SLICE_X47Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X46Y93": "SLICEM", + "SLICE_X47Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X46Y94": "SLICEM", + "SLICE_X47Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X46Y95": "SLICEM", + "SLICE_X47Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X46Y96": "SLICEM", + "SLICE_X47Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X46Y97": "SLICEM", + "SLICE_X47Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X46Y98": "SLICEM", + "SLICE_X47Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 74, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X46Y99": "SLICEM", + "SLICE_X47Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X46Y125": "SLICEM", + "SLICE_X47Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X46Y126": "SLICEM", + "SLICE_X47Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X46Y127": "SLICEM", + "SLICE_X47Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X46Y128": "SLICEM", + "SLICE_X47Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X46Y129": "SLICEM", + "SLICE_X47Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X46Y130": "SLICEM", + "SLICE_X47Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X46Y131": "SLICEM", + "SLICE_X47Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X46Y132": "SLICEM", + "SLICE_X47Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X46Y133": "SLICEM", + "SLICE_X47Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X46Y134": "SLICEM", + "SLICE_X47Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X46Y135": "SLICEM", + "SLICE_X47Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X46Y136": "SLICEM", + "SLICE_X47Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X46Y137": "SLICEM", + "SLICE_X47Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X46Y138": "SLICEM", + "SLICE_X47Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X46Y139": "SLICEM", + "SLICE_X47Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X46Y140": "SLICEM", + "SLICE_X47Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X46Y141": "SLICEM", + "SLICE_X47Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X46Y142": "SLICEM", + "SLICE_X47Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X46Y143": "SLICEM", + "SLICE_X47Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X46Y144": "SLICEM", + "SLICE_X47Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X46Y145": "SLICEM", + "SLICE_X47Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X46Y146": "SLICEM", + "SLICE_X47Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X46Y147": "SLICEM", + "SLICE_X47Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X46Y148": "SLICEM", + "SLICE_X47Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X29Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 74, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X46Y149": "SLICEM", + "SLICE_X47Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X52Y0": "SLICEM", + "SLICE_X53Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X52Y1": "SLICEM", + "SLICE_X53Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X52Y2": "SLICEM", + "SLICE_X53Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X52Y3": "SLICEM", + "SLICE_X53Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X52Y4": "SLICEM", + "SLICE_X53Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X52Y5": "SLICEM", + "SLICE_X53Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X52Y6": "SLICEM", + "SLICE_X53Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X52Y7": "SLICEM", + "SLICE_X53Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X52Y8": "SLICEM", + "SLICE_X53Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X52Y9": "SLICEM", + "SLICE_X53Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X52Y10": "SLICEM", + "SLICE_X53Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X52Y11": "SLICEM", + "SLICE_X53Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X52Y12": "SLICEM", + "SLICE_X53Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X52Y13": "SLICEM", + "SLICE_X53Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X52Y14": "SLICEM", + "SLICE_X53Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X52Y15": "SLICEM", + "SLICE_X53Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X52Y16": "SLICEM", + "SLICE_X53Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X52Y17": "SLICEM", + "SLICE_X53Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X52Y18": "SLICEM", + "SLICE_X53Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X52Y19": "SLICEM", + "SLICE_X53Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X52Y20": "SLICEM", + "SLICE_X53Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X52Y21": "SLICEM", + "SLICE_X53Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X52Y22": "SLICEM", + "SLICE_X53Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X52Y23": "SLICEM", + "SLICE_X53Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X52Y24": "SLICEM", + "SLICE_X53Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X52Y25": "SLICEM", + "SLICE_X53Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X52Y26": "SLICEM", + "SLICE_X53Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X52Y27": "SLICEM", + "SLICE_X53Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X52Y28": "SLICEM", + "SLICE_X53Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X52Y29": "SLICEM", + "SLICE_X53Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X52Y30": "SLICEM", + "SLICE_X53Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X52Y31": "SLICEM", + "SLICE_X53Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X52Y32": "SLICEM", + "SLICE_X53Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X52Y33": "SLICEM", + "SLICE_X53Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X52Y34": "SLICEM", + "SLICE_X53Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X52Y35": "SLICEM", + "SLICE_X53Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X52Y36": "SLICEM", + "SLICE_X53Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X52Y37": "SLICEM", + "SLICE_X53Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X52Y38": "SLICEM", + "SLICE_X53Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X52Y39": "SLICEM", + "SLICE_X53Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X52Y40": "SLICEM", + "SLICE_X53Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X52Y41": "SLICEM", + "SLICE_X53Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X52Y42": "SLICEM", + "SLICE_X53Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X52Y43": "SLICEM", + "SLICE_X53Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X52Y44": "SLICEM", + "SLICE_X53Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X52Y45": "SLICEM", + "SLICE_X53Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X52Y46": "SLICEM", + "SLICE_X53Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X52Y47": "SLICEM", + "SLICE_X53Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X52Y48": "SLICEM", + "SLICE_X53Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 84, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X52Y49": "SLICEM", + "SLICE_X53Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X52Y50": "SLICEM", + "SLICE_X53Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X52Y51": "SLICEM", + "SLICE_X53Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X52Y52": "SLICEM", + "SLICE_X53Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X52Y53": "SLICEM", + "SLICE_X53Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X52Y54": "SLICEM", + "SLICE_X53Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X52Y55": "SLICEM", + "SLICE_X53Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X52Y56": "SLICEM", + "SLICE_X53Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X52Y57": "SLICEM", + "SLICE_X53Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X52Y58": "SLICEM", + "SLICE_X53Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X52Y59": "SLICEM", + "SLICE_X53Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X52Y60": "SLICEM", + "SLICE_X53Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X52Y61": "SLICEM", + "SLICE_X53Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X52Y62": "SLICEM", + "SLICE_X53Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X52Y63": "SLICEM", + "SLICE_X53Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X52Y64": "SLICEM", + "SLICE_X53Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X52Y65": "SLICEM", + "SLICE_X53Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X52Y66": "SLICEM", + "SLICE_X53Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X52Y67": "SLICEM", + "SLICE_X53Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X52Y68": "SLICEM", + "SLICE_X53Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X52Y69": "SLICEM", + "SLICE_X53Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X52Y70": "SLICEM", + "SLICE_X53Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X52Y71": "SLICEM", + "SLICE_X53Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X52Y72": "SLICEM", + "SLICE_X53Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X52Y73": "SLICEM", + "SLICE_X53Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X52Y74": "SLICEM", + "SLICE_X53Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X52Y75": "SLICEM", + "SLICE_X53Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X52Y76": "SLICEM", + "SLICE_X53Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X52Y77": "SLICEM", + "SLICE_X53Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X52Y78": "SLICEM", + "SLICE_X53Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X52Y79": "SLICEM", + "SLICE_X53Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X52Y80": "SLICEM", + "SLICE_X53Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X52Y81": "SLICEM", + "SLICE_X53Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X52Y82": "SLICEM", + "SLICE_X53Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X52Y83": "SLICEM", + "SLICE_X53Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X52Y84": "SLICEM", + "SLICE_X53Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X52Y85": "SLICEM", + "SLICE_X53Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X52Y86": "SLICEM", + "SLICE_X53Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X52Y87": "SLICEM", + "SLICE_X53Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X52Y88": "SLICEM", + "SLICE_X53Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X52Y89": "SLICEM", + "SLICE_X53Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X52Y90": "SLICEM", + "SLICE_X53Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X52Y91": "SLICEM", + "SLICE_X53Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X52Y92": "SLICEM", + "SLICE_X53Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X52Y93": "SLICEM", + "SLICE_X53Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X52Y94": "SLICEM", + "SLICE_X53Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X52Y95": "SLICEM", + "SLICE_X53Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X52Y96": "SLICEM", + "SLICE_X53Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X52Y97": "SLICEM", + "SLICE_X53Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X52Y98": "SLICEM", + "SLICE_X53Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 84, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X52Y99": "SLICEM", + "SLICE_X53Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X52Y100": "SLICEM", + "SLICE_X53Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X52Y101": "SLICEM", + "SLICE_X53Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X52Y102": "SLICEM", + "SLICE_X53Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X52Y103": "SLICEM", + "SLICE_X53Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X52Y104": "SLICEM", + "SLICE_X53Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X52Y105": "SLICEM", + "SLICE_X53Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X52Y106": "SLICEM", + "SLICE_X53Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X52Y107": "SLICEM", + "SLICE_X53Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X52Y108": "SLICEM", + "SLICE_X53Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X52Y109": "SLICEM", + "SLICE_X53Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X52Y110": "SLICEM", + "SLICE_X53Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X52Y111": "SLICEM", + "SLICE_X53Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X52Y112": "SLICEM", + "SLICE_X53Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X52Y113": "SLICEM", + "SLICE_X53Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X52Y114": "SLICEM", + "SLICE_X53Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X52Y115": "SLICEM", + "SLICE_X53Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X52Y116": "SLICEM", + "SLICE_X53Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X52Y117": "SLICEM", + "SLICE_X53Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X52Y118": "SLICEM", + "SLICE_X53Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X52Y119": "SLICEM", + "SLICE_X53Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X52Y120": "SLICEM", + "SLICE_X53Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X52Y121": "SLICEM", + "SLICE_X53Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X52Y122": "SLICEM", + "SLICE_X53Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X52Y123": "SLICEM", + "SLICE_X53Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X52Y124": "SLICEM", + "SLICE_X53Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X52Y125": "SLICEM", + "SLICE_X53Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X52Y126": "SLICEM", + "SLICE_X53Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X52Y127": "SLICEM", + "SLICE_X53Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X52Y128": "SLICEM", + "SLICE_X53Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X52Y129": "SLICEM", + "SLICE_X53Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X52Y130": "SLICEM", + "SLICE_X53Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X52Y131": "SLICEM", + "SLICE_X53Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X52Y132": "SLICEM", + "SLICE_X53Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X52Y133": "SLICEM", + "SLICE_X53Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X52Y134": "SLICEM", + "SLICE_X53Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X52Y135": "SLICEM", + "SLICE_X53Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X52Y136": "SLICEM", + "SLICE_X53Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X52Y137": "SLICEM", + "SLICE_X53Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X52Y138": "SLICEM", + "SLICE_X53Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X52Y139": "SLICEM", + "SLICE_X53Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X52Y140": "SLICEM", + "SLICE_X53Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X52Y141": "SLICEM", + "SLICE_X53Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X52Y142": "SLICEM", + "SLICE_X53Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X52Y143": "SLICEM", + "SLICE_X53Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X52Y144": "SLICEM", + "SLICE_X53Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X52Y145": "SLICEM", + "SLICE_X53Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X52Y146": "SLICEM", + "SLICE_X53Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X52Y147": "SLICEM", + "SLICE_X53Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X52Y148": "SLICEM", + "SLICE_X53Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X33Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 84, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X52Y149": "SLICEM", + "SLICE_X53Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X54Y0": "SLICEM", + "SLICE_X55Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X54Y1": "SLICEM", + "SLICE_X55Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X54Y2": "SLICEM", + "SLICE_X55Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X54Y3": "SLICEM", + "SLICE_X55Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X54Y4": "SLICEM", + "SLICE_X55Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X54Y5": "SLICEM", + "SLICE_X55Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X54Y6": "SLICEM", + "SLICE_X55Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X54Y7": "SLICEM", + "SLICE_X55Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X54Y8": "SLICEM", + "SLICE_X55Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X54Y9": "SLICEM", + "SLICE_X55Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X54Y10": "SLICEM", + "SLICE_X55Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X54Y11": "SLICEM", + "SLICE_X55Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X54Y12": "SLICEM", + "SLICE_X55Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X54Y13": "SLICEM", + "SLICE_X55Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X54Y14": "SLICEM", + "SLICE_X55Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X54Y15": "SLICEM", + "SLICE_X55Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X54Y16": "SLICEM", + "SLICE_X55Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X54Y17": "SLICEM", + "SLICE_X55Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X54Y18": "SLICEM", + "SLICE_X55Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X54Y19": "SLICEM", + "SLICE_X55Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X54Y20": "SLICEM", + "SLICE_X55Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X54Y21": "SLICEM", + "SLICE_X55Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X54Y22": "SLICEM", + "SLICE_X55Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X54Y23": "SLICEM", + "SLICE_X55Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X54Y24": "SLICEM", + "SLICE_X55Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X54Y25": "SLICEM", + "SLICE_X55Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X54Y26": "SLICEM", + "SLICE_X55Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X54Y27": "SLICEM", + "SLICE_X55Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X54Y28": "SLICEM", + "SLICE_X55Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X54Y29": "SLICEM", + "SLICE_X55Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X54Y30": "SLICEM", + "SLICE_X55Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X54Y31": "SLICEM", + "SLICE_X55Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X54Y32": "SLICEM", + "SLICE_X55Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X54Y33": "SLICEM", + "SLICE_X55Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X54Y34": "SLICEM", + "SLICE_X55Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X54Y35": "SLICEM", + "SLICE_X55Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X54Y36": "SLICEM", + "SLICE_X55Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X54Y37": "SLICEM", + "SLICE_X55Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X54Y38": "SLICEM", + "SLICE_X55Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X54Y39": "SLICEM", + "SLICE_X55Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X54Y40": "SLICEM", + "SLICE_X55Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X54Y41": "SLICEM", + "SLICE_X55Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X54Y42": "SLICEM", + "SLICE_X55Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X54Y43": "SLICEM", + "SLICE_X55Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X54Y44": "SLICEM", + "SLICE_X55Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X54Y45": "SLICEM", + "SLICE_X55Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X54Y46": "SLICEM", + "SLICE_X55Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X54Y47": "SLICEM", + "SLICE_X55Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X54Y48": "SLICEM", + "SLICE_X55Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 90, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X54Y49": "SLICEM", + "SLICE_X55Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X54Y50": "SLICEM", + "SLICE_X55Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X54Y51": "SLICEM", + "SLICE_X55Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X54Y52": "SLICEM", + "SLICE_X55Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X54Y53": "SLICEM", + "SLICE_X55Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X54Y54": "SLICEM", + "SLICE_X55Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X54Y55": "SLICEM", + "SLICE_X55Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X54Y56": "SLICEM", + "SLICE_X55Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X54Y57": "SLICEM", + "SLICE_X55Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X54Y58": "SLICEM", + "SLICE_X55Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X54Y59": "SLICEM", + "SLICE_X55Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X54Y60": "SLICEM", + "SLICE_X55Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X54Y61": "SLICEM", + "SLICE_X55Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X54Y62": "SLICEM", + "SLICE_X55Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X54Y63": "SLICEM", + "SLICE_X55Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X54Y64": "SLICEM", + "SLICE_X55Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X54Y65": "SLICEM", + "SLICE_X55Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X54Y66": "SLICEM", + "SLICE_X55Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X54Y67": "SLICEM", + "SLICE_X55Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X54Y68": "SLICEM", + "SLICE_X55Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X54Y69": "SLICEM", + "SLICE_X55Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X54Y70": "SLICEM", + "SLICE_X55Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X54Y71": "SLICEM", + "SLICE_X55Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X54Y72": "SLICEM", + "SLICE_X55Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X54Y73": "SLICEM", + "SLICE_X55Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X54Y74": "SLICEM", + "SLICE_X55Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X54Y75": "SLICEM", + "SLICE_X55Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X54Y76": "SLICEM", + "SLICE_X55Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X54Y77": "SLICEM", + "SLICE_X55Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X54Y78": "SLICEM", + "SLICE_X55Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X54Y79": "SLICEM", + "SLICE_X55Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X54Y80": "SLICEM", + "SLICE_X55Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X54Y81": "SLICEM", + "SLICE_X55Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X54Y82": "SLICEM", + "SLICE_X55Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X54Y83": "SLICEM", + "SLICE_X55Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X54Y84": "SLICEM", + "SLICE_X55Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X54Y85": "SLICEM", + "SLICE_X55Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X54Y86": "SLICEM", + "SLICE_X55Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X54Y87": "SLICEM", + "SLICE_X55Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X54Y88": "SLICEM", + "SLICE_X55Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X54Y89": "SLICEM", + "SLICE_X55Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X54Y90": "SLICEM", + "SLICE_X55Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X54Y91": "SLICEM", + "SLICE_X55Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X54Y92": "SLICEM", + "SLICE_X55Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X54Y93": "SLICEM", + "SLICE_X55Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X54Y94": "SLICEM", + "SLICE_X55Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X54Y95": "SLICEM", + "SLICE_X55Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X54Y96": "SLICEM", + "SLICE_X55Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X54Y97": "SLICEM", + "SLICE_X55Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X54Y98": "SLICEM", + "SLICE_X55Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 90, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X54Y99": "SLICEM", + "SLICE_X55Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "SLICE_X54Y100": "SLICEM", + "SLICE_X55Y100": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "SLICE_X54Y101": "SLICEM", + "SLICE_X55Y101": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "SLICE_X54Y102": "SLICEM", + "SLICE_X55Y102": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "SLICE_X54Y103": "SLICEM", + "SLICE_X55Y103": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "SLICE_X54Y104": "SLICEM", + "SLICE_X55Y104": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "SLICE_X54Y105": "SLICEM", + "SLICE_X55Y105": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "SLICE_X54Y106": "SLICEM", + "SLICE_X55Y106": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "SLICE_X54Y107": "SLICEM", + "SLICE_X55Y107": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "SLICE_X54Y108": "SLICEM", + "SLICE_X55Y108": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "SLICE_X54Y109": "SLICEM", + "SLICE_X55Y109": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "SLICE_X54Y110": "SLICEM", + "SLICE_X55Y110": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "SLICE_X54Y111": "SLICEM", + "SLICE_X55Y111": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "SLICE_X54Y112": "SLICEM", + "SLICE_X55Y112": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "SLICE_X54Y113": "SLICEM", + "SLICE_X55Y113": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "SLICE_X54Y114": "SLICEM", + "SLICE_X55Y114": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "SLICE_X54Y115": "SLICEM", + "SLICE_X55Y115": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "SLICE_X54Y116": "SLICEM", + "SLICE_X55Y116": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "SLICE_X54Y117": "SLICEM", + "SLICE_X55Y117": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "SLICE_X54Y118": "SLICEM", + "SLICE_X55Y118": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "SLICE_X54Y119": "SLICEM", + "SLICE_X55Y119": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "SLICE_X54Y120": "SLICEM", + "SLICE_X55Y120": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "SLICE_X54Y121": "SLICEM", + "SLICE_X55Y121": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "SLICE_X54Y122": "SLICEM", + "SLICE_X55Y122": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "SLICE_X54Y123": "SLICEM", + "SLICE_X55Y123": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "SLICE_X54Y124": "SLICEM", + "SLICE_X55Y124": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "SLICE_X54Y125": "SLICEM", + "SLICE_X55Y125": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "SLICE_X54Y126": "SLICEM", + "SLICE_X55Y126": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "SLICE_X54Y127": "SLICEM", + "SLICE_X55Y127": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "SLICE_X54Y128": "SLICEM", + "SLICE_X55Y128": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "SLICE_X54Y129": "SLICEM", + "SLICE_X55Y129": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "SLICE_X54Y130": "SLICEM", + "SLICE_X55Y130": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "SLICE_X54Y131": "SLICEM", + "SLICE_X55Y131": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "SLICE_X54Y132": "SLICEM", + "SLICE_X55Y132": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "SLICE_X54Y133": "SLICEM", + "SLICE_X55Y133": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "SLICE_X54Y134": "SLICEM", + "SLICE_X55Y134": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "SLICE_X54Y135": "SLICEM", + "SLICE_X55Y135": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "SLICE_X54Y136": "SLICEM", + "SLICE_X55Y136": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "SLICE_X54Y137": "SLICEM", + "SLICE_X55Y137": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "SLICE_X54Y138": "SLICEM", + "SLICE_X55Y138": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "SLICE_X54Y139": "SLICEM", + "SLICE_X55Y139": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "SLICE_X54Y140": "SLICEM", + "SLICE_X55Y140": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "SLICE_X54Y141": "SLICEM", + "SLICE_X55Y141": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "SLICE_X54Y142": "SLICEM", + "SLICE_X55Y142": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "SLICE_X54Y143": "SLICEM", + "SLICE_X55Y143": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "SLICE_X54Y144": "SLICEM", + "SLICE_X55Y144": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "SLICE_X54Y145": "SLICEM", + "SLICE_X55Y145": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "SLICE_X54Y146": "SLICEM", + "SLICE_X55Y146": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "SLICE_X54Y147": "SLICEM", + "SLICE_X55Y147": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "SLICE_X54Y148": "SLICEM", + "SLICE_X55Y148": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X35Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 90, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "SLICE_X54Y149": "SLICEM", + "SLICE_X55Y149": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X60Y0": "SLICEM", + "SLICE_X61Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X60Y1": "SLICEM", + "SLICE_X61Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X60Y2": "SLICEM", + "SLICE_X61Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X60Y3": "SLICEM", + "SLICE_X61Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X60Y4": "SLICEM", + "SLICE_X61Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X60Y5": "SLICEM", + "SLICE_X61Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X60Y6": "SLICEM", + "SLICE_X61Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X60Y7": "SLICEM", + "SLICE_X61Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X60Y8": "SLICEM", + "SLICE_X61Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X60Y9": "SLICEM", + "SLICE_X61Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X60Y10": "SLICEM", + "SLICE_X61Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X60Y11": "SLICEM", + "SLICE_X61Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X60Y12": "SLICEM", + "SLICE_X61Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X60Y13": "SLICEM", + "SLICE_X61Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X60Y14": "SLICEM", + "SLICE_X61Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X60Y15": "SLICEM", + "SLICE_X61Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X60Y16": "SLICEM", + "SLICE_X61Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X60Y17": "SLICEM", + "SLICE_X61Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X60Y18": "SLICEM", + "SLICE_X61Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X60Y19": "SLICEM", + "SLICE_X61Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X60Y20": "SLICEM", + "SLICE_X61Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X60Y21": "SLICEM", + "SLICE_X61Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X60Y22": "SLICEM", + "SLICE_X61Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X60Y23": "SLICEM", + "SLICE_X61Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X60Y24": "SLICEM", + "SLICE_X61Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X60Y25": "SLICEM", + "SLICE_X61Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X60Y26": "SLICEM", + "SLICE_X61Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X60Y27": "SLICEM", + "SLICE_X61Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X60Y28": "SLICEM", + "SLICE_X61Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X60Y29": "SLICEM", + "SLICE_X61Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X60Y30": "SLICEM", + "SLICE_X61Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X60Y31": "SLICEM", + "SLICE_X61Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X60Y32": "SLICEM", + "SLICE_X61Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X60Y33": "SLICEM", + "SLICE_X61Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X60Y34": "SLICEM", + "SLICE_X61Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X60Y35": "SLICEM", + "SLICE_X61Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X60Y36": "SLICEM", + "SLICE_X61Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X60Y37": "SLICEM", + "SLICE_X61Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X60Y38": "SLICEM", + "SLICE_X61Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X60Y39": "SLICEM", + "SLICE_X61Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X60Y40": "SLICEM", + "SLICE_X61Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X60Y41": "SLICEM", + "SLICE_X61Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X60Y42": "SLICEM", + "SLICE_X61Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X60Y43": "SLICEM", + "SLICE_X61Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X60Y44": "SLICEM", + "SLICE_X61Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X60Y45": "SLICEM", + "SLICE_X61Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X60Y46": "SLICEM", + "SLICE_X61Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X60Y47": "SLICEM", + "SLICE_X61Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X60Y48": "SLICEM", + "SLICE_X61Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 100, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X60Y49": "SLICEM", + "SLICE_X61Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X60Y50": "SLICEM", + "SLICE_X61Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X60Y51": "SLICEM", + "SLICE_X61Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X60Y52": "SLICEM", + "SLICE_X61Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X60Y53": "SLICEM", + "SLICE_X61Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X60Y54": "SLICEM", + "SLICE_X61Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X60Y55": "SLICEM", + "SLICE_X61Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X60Y56": "SLICEM", + "SLICE_X61Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X60Y57": "SLICEM", + "SLICE_X61Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X60Y58": "SLICEM", + "SLICE_X61Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X60Y59": "SLICEM", + "SLICE_X61Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X60Y60": "SLICEM", + "SLICE_X61Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X60Y61": "SLICEM", + "SLICE_X61Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X60Y62": "SLICEM", + "SLICE_X61Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X60Y63": "SLICEM", + "SLICE_X61Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X60Y64": "SLICEM", + "SLICE_X61Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X60Y65": "SLICEM", + "SLICE_X61Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X60Y66": "SLICEM", + "SLICE_X61Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X60Y67": "SLICEM", + "SLICE_X61Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X60Y68": "SLICEM", + "SLICE_X61Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X60Y69": "SLICEM", + "SLICE_X61Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X60Y70": "SLICEM", + "SLICE_X61Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X60Y71": "SLICEM", + "SLICE_X61Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X60Y72": "SLICEM", + "SLICE_X61Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X60Y73": "SLICEM", + "SLICE_X61Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X60Y74": "SLICEM", + "SLICE_X61Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X60Y75": "SLICEM", + "SLICE_X61Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X60Y76": "SLICEM", + "SLICE_X61Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X60Y77": "SLICEM", + "SLICE_X61Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X60Y78": "SLICEM", + "SLICE_X61Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X60Y79": "SLICEM", + "SLICE_X61Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X60Y80": "SLICEM", + "SLICE_X61Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X60Y81": "SLICEM", + "SLICE_X61Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X60Y82": "SLICEM", + "SLICE_X61Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X60Y83": "SLICEM", + "SLICE_X61Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X60Y84": "SLICEM", + "SLICE_X61Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X60Y85": "SLICEM", + "SLICE_X61Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X60Y86": "SLICEM", + "SLICE_X61Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X60Y87": "SLICEM", + "SLICE_X61Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X60Y88": "SLICEM", + "SLICE_X61Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X60Y89": "SLICEM", + "SLICE_X61Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X60Y90": "SLICEM", + "SLICE_X61Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X60Y91": "SLICEM", + "SLICE_X61Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X60Y92": "SLICEM", + "SLICE_X61Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X60Y93": "SLICEM", + "SLICE_X61Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X60Y94": "SLICEM", + "SLICE_X61Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X60Y95": "SLICEM", + "SLICE_X61Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X60Y96": "SLICEM", + "SLICE_X61Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X60Y97": "SLICEM", + "SLICE_X61Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X60Y98": "SLICEM", + "SLICE_X61Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X39Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 100, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X60Y99": "SLICEM", + "SLICE_X61Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "SLICE_X64Y0": "SLICEM", + "SLICE_X65Y0": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "SLICE_X64Y1": "SLICEM", + "SLICE_X65Y1": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "SLICE_X64Y2": "SLICEM", + "SLICE_X65Y2": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "SLICE_X64Y3": "SLICEM", + "SLICE_X65Y3": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "SLICE_X64Y4": "SLICEM", + "SLICE_X65Y4": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "SLICE_X64Y5": "SLICEM", + "SLICE_X65Y5": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "SLICE_X64Y6": "SLICEM", + "SLICE_X65Y6": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "SLICE_X64Y7": "SLICEM", + "SLICE_X65Y7": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "SLICE_X64Y8": "SLICEM", + "SLICE_X65Y8": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "SLICE_X64Y9": "SLICEM", + "SLICE_X65Y9": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "SLICE_X64Y10": "SLICEM", + "SLICE_X65Y10": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "SLICE_X64Y11": "SLICEM", + "SLICE_X65Y11": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "SLICE_X64Y12": "SLICEM", + "SLICE_X65Y12": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "SLICE_X64Y13": "SLICEM", + "SLICE_X65Y13": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "SLICE_X64Y14": "SLICEM", + "SLICE_X65Y14": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "SLICE_X64Y15": "SLICEM", + "SLICE_X65Y15": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "SLICE_X64Y16": "SLICEM", + "SLICE_X65Y16": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "SLICE_X64Y17": "SLICEM", + "SLICE_X65Y17": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "SLICE_X64Y18": "SLICEM", + "SLICE_X65Y18": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "SLICE_X64Y19": "SLICEM", + "SLICE_X65Y19": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "SLICE_X64Y20": "SLICEM", + "SLICE_X65Y20": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "SLICE_X64Y21": "SLICEM", + "SLICE_X65Y21": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "SLICE_X64Y22": "SLICEM", + "SLICE_X65Y22": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "SLICE_X64Y23": "SLICEM", + "SLICE_X65Y23": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "SLICE_X64Y24": "SLICEM", + "SLICE_X65Y24": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "SLICE_X64Y25": "SLICEM", + "SLICE_X65Y25": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "SLICE_X64Y26": "SLICEM", + "SLICE_X65Y26": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "SLICE_X64Y27": "SLICEM", + "SLICE_X65Y27": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "SLICE_X64Y28": "SLICEM", + "SLICE_X65Y28": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "SLICE_X64Y29": "SLICEM", + "SLICE_X65Y29": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "SLICE_X64Y30": "SLICEM", + "SLICE_X65Y30": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "SLICE_X64Y31": "SLICEM", + "SLICE_X65Y31": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "SLICE_X64Y32": "SLICEM", + "SLICE_X65Y32": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "SLICE_X64Y33": "SLICEM", + "SLICE_X65Y33": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "SLICE_X64Y34": "SLICEM", + "SLICE_X65Y34": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "SLICE_X64Y35": "SLICEM", + "SLICE_X65Y35": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "SLICE_X64Y36": "SLICEM", + "SLICE_X65Y36": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "SLICE_X64Y37": "SLICEM", + "SLICE_X65Y37": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "SLICE_X64Y38": "SLICEM", + "SLICE_X65Y38": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "SLICE_X64Y39": "SLICEM", + "SLICE_X65Y39": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "SLICE_X64Y40": "SLICEM", + "SLICE_X65Y40": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "SLICE_X64Y41": "SLICEM", + "SLICE_X65Y41": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "SLICE_X64Y42": "SLICEM", + "SLICE_X65Y42": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "SLICE_X64Y43": "SLICEM", + "SLICE_X65Y43": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "SLICE_X64Y44": "SLICEM", + "SLICE_X65Y44": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "SLICE_X64Y45": "SLICEM", + "SLICE_X65Y45": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "SLICE_X64Y46": "SLICEM", + "SLICE_X65Y46": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "SLICE_X64Y47": "SLICEM", + "SLICE_X65Y47": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "SLICE_X64Y48": "SLICEM", + "SLICE_X65Y48": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 104, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "SLICE_X64Y49": "SLICEM", + "SLICE_X65Y49": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "SLICE_X64Y50": "SLICEM", + "SLICE_X65Y50": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "SLICE_X64Y51": "SLICEM", + "SLICE_X65Y51": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "SLICE_X64Y52": "SLICEM", + "SLICE_X65Y52": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "SLICE_X64Y53": "SLICEM", + "SLICE_X65Y53": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "SLICE_X64Y54": "SLICEM", + "SLICE_X65Y54": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "SLICE_X64Y55": "SLICEM", + "SLICE_X65Y55": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "SLICE_X64Y56": "SLICEM", + "SLICE_X65Y56": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "SLICE_X64Y57": "SLICEM", + "SLICE_X65Y57": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "SLICE_X64Y58": "SLICEM", + "SLICE_X65Y58": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "SLICE_X64Y59": "SLICEM", + "SLICE_X65Y59": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "SLICE_X64Y60": "SLICEM", + "SLICE_X65Y60": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "SLICE_X64Y61": "SLICEM", + "SLICE_X65Y61": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "SLICE_X64Y62": "SLICEM", + "SLICE_X65Y62": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "SLICE_X64Y63": "SLICEM", + "SLICE_X65Y63": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "SLICE_X64Y64": "SLICEM", + "SLICE_X65Y64": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "SLICE_X64Y65": "SLICEM", + "SLICE_X65Y65": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "SLICE_X64Y66": "SLICEM", + "SLICE_X65Y66": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "SLICE_X64Y67": "SLICEM", + "SLICE_X65Y67": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "SLICE_X64Y68": "SLICEM", + "SLICE_X65Y68": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "SLICE_X64Y69": "SLICEM", + "SLICE_X65Y69": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "SLICE_X64Y70": "SLICEM", + "SLICE_X65Y70": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "SLICE_X64Y71": "SLICEM", + "SLICE_X65Y71": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "SLICE_X64Y72": "SLICEM", + "SLICE_X65Y72": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "SLICE_X64Y73": "SLICEM", + "SLICE_X65Y73": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "SLICE_X64Y74": "SLICEM", + "SLICE_X65Y74": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "SLICE_X64Y75": "SLICEM", + "SLICE_X65Y75": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "SLICE_X64Y76": "SLICEM", + "SLICE_X65Y76": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "SLICE_X64Y77": "SLICEM", + "SLICE_X65Y77": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "SLICE_X64Y78": "SLICEM", + "SLICE_X65Y78": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "SLICE_X64Y79": "SLICEM", + "SLICE_X65Y79": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "SLICE_X64Y80": "SLICEM", + "SLICE_X65Y80": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "SLICE_X64Y81": "SLICEM", + "SLICE_X65Y81": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "SLICE_X64Y82": "SLICEM", + "SLICE_X65Y82": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "SLICE_X64Y83": "SLICEM", + "SLICE_X65Y83": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "SLICE_X64Y84": "SLICEM", + "SLICE_X65Y84": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "SLICE_X64Y85": "SLICEM", + "SLICE_X65Y85": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "SLICE_X64Y86": "SLICEM", + "SLICE_X65Y86": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "SLICE_X64Y87": "SLICEM", + "SLICE_X65Y87": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "SLICE_X64Y88": "SLICEM", + "SLICE_X65Y88": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "SLICE_X64Y89": "SLICEM", + "SLICE_X65Y89": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "SLICE_X64Y90": "SLICEM", + "SLICE_X65Y90": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "SLICE_X64Y91": "SLICEM", + "SLICE_X65Y91": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "SLICE_X64Y92": "SLICEM", + "SLICE_X65Y92": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "SLICE_X64Y93": "SLICEM", + "SLICE_X65Y93": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "SLICE_X64Y94": "SLICEM", + "SLICE_X65Y94": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "SLICE_X64Y95": "SLICEM", + "SLICE_X65Y95": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "SLICE_X64Y96": "SLICEM", + "SLICE_X65Y96": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "SLICE_X64Y97": "SLICEM", + "SLICE_X65Y97": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "SLICE_X64Y98": "SLICEM", + "SLICE_X65Y98": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLBLM_R_X41Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 36, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 104, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "SLICE_X64Y99": "SLICEM", + "SLICE_X65Y99": "SLICEL" + }, + "type": "CLBLM_R" + }, + "CLK_BUFG_BOT_R_X60Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 30, + "offset": 93, + "words": 8 + } + }, + "grid_x": 60, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "BUFGCTRL_X0Y0": "BUFGCTRL", + "BUFGCTRL_X0Y1": "BUFGCTRL", + "BUFGCTRL_X0Y2": "BUFGCTRL", + "BUFGCTRL_X0Y3": "BUFGCTRL", + "BUFGCTRL_X0Y4": "BUFGCTRL", + "BUFGCTRL_X0Y5": "BUFGCTRL", + "BUFGCTRL_X0Y6": "BUFGCTRL", + "BUFGCTRL_X0Y7": "BUFGCTRL", + "BUFGCTRL_X0Y8": "BUFGCTRL", + "BUFGCTRL_X0Y9": "BUFGCTRL", + "BUFGCTRL_X0Y10": "BUFGCTRL", + "BUFGCTRL_X0Y11": "BUFGCTRL", + "BUFGCTRL_X0Y12": "BUFGCTRL", + "BUFGCTRL_X0Y13": "BUFGCTRL", + "BUFGCTRL_X0Y14": "BUFGCTRL", + "BUFGCTRL_X0Y15": "BUFGCTRL" + }, + "type": "CLK_BUFG_BOT_R" + }, + "CLK_BUFG_REBUF_X60Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 30, + "offset": 24, + "words": 4 + } + }, + "grid_x": 60, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "CLK_BUFG_REBUF" + }, + "CLK_BUFG_REBUF_X60Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 30, + "offset": 73, + "words": 4 + } + }, + "grid_x": 60, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "CLK_BUFG_REBUF" + }, + "CLK_BUFG_REBUF_X60Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 30, + "offset": 24, + "words": 4 + } + }, + "grid_x": 60, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "CLK_BUFG_REBUF" + }, + "CLK_BUFG_REBUF_X60Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 30, + "offset": 73, + "words": 4 + } + }, + "grid_x": 60, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "CLK_BUFG_REBUF" + }, + "CLK_BUFG_REBUF_X60Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 30, + "offset": 24, + "words": 4 + } + }, + "grid_x": 60, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "CLK_BUFG_REBUF" + }, + "CLK_BUFG_REBUF_X60Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 30, + "offset": 73, + "words": 4 + } + }, + "grid_x": 60, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "CLK_BUFG_REBUF" + }, + "CLK_BUFG_TOP_R_X60Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 30, + "offset": 0, + "words": 8 + } + }, + "grid_x": 60, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "BUFGCTRL_X0Y16": "BUFGCTRL", + "BUFGCTRL_X0Y17": "BUFGCTRL", + "BUFGCTRL_X0Y18": "BUFGCTRL", + "BUFGCTRL_X0Y19": "BUFGCTRL", + "BUFGCTRL_X0Y20": "BUFGCTRL", + "BUFGCTRL_X0Y21": "BUFGCTRL", + "BUFGCTRL_X0Y22": "BUFGCTRL", + "BUFGCTRL_X0Y23": "BUFGCTRL", + "BUFGCTRL_X0Y24": "BUFGCTRL", + "BUFGCTRL_X0Y25": "BUFGCTRL", + "BUFGCTRL_X0Y26": "BUFGCTRL", + "BUFGCTRL_X0Y27": "BUFGCTRL", + "BUFGCTRL_X0Y28": "BUFGCTRL", + "BUFGCTRL_X0Y29": "BUFGCTRL", + "BUFGCTRL_X0Y30": "BUFGCTRL", + "BUFGCTRL_X0Y31": "BUFGCTRL" + }, + "type": "CLK_BUFG_TOP_R" + }, + "CLK_FEED_X60Y1": { + "bits": {}, + "grid_x": 60, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y9": { + "bits": {}, + "grid_x": 60, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y10": { + "bits": {}, + "grid_x": 60, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y11": { + "bits": {}, + "grid_x": 60, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y12": { + "bits": {}, + "grid_x": 60, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y15": { + "bits": {}, + "grid_x": 60, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y16": { + "bits": {}, + "grid_x": 60, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y17": { + "bits": {}, + "grid_x": 60, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y19": { + "bits": {}, + "grid_x": 60, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y20": { + "bits": {}, + "grid_x": 60, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y21": { + "bits": {}, + "grid_x": 60, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y31": { + "bits": {}, + "grid_x": 60, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y32": { + "bits": {}, + "grid_x": 60, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y33": { + "bits": {}, + "grid_x": 60, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y35": { + "bits": {}, + "grid_x": 60, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y36": { + "bits": {}, + "grid_x": 60, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y37": { + "bits": {}, + "grid_x": 60, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y40": { + "bits": {}, + "grid_x": 60, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y41": { + "bits": {}, + "grid_x": 60, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y42": { + "bits": {}, + "grid_x": 60, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y44": { + "bits": {}, + "grid_x": 60, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y45": { + "bits": {}, + "grid_x": 60, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y46": { + "bits": {}, + "grid_x": 60, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y57": { + "bits": {}, + "grid_x": 60, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y58": { + "bits": {}, + "grid_x": 60, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y59": { + "bits": {}, + "grid_x": 60, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y60": { + "bits": {}, + "grid_x": 60, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y61": { + "bits": {}, + "grid_x": 60, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y62": { + "bits": {}, + "grid_x": 60, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y63": { + "bits": {}, + "grid_x": 60, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y64": { + "bits": {}, + "grid_x": 60, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y67": { + "bits": {}, + "grid_x": 60, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y68": { + "bits": {}, + "grid_x": 60, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y69": { + "bits": {}, + "grid_x": 60, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y70": { + "bits": {}, + "grid_x": 60, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y71": { + "bits": {}, + "grid_x": 60, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y72": { + "bits": {}, + "grid_x": 60, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y73": { + "bits": {}, + "grid_x": 60, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y83": { + "bits": {}, + "grid_x": 60, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y84": { + "bits": {}, + "grid_x": 60, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y85": { + "bits": {}, + "grid_x": 60, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y86": { + "bits": {}, + "grid_x": 60, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y87": { + "bits": {}, + "grid_x": 60, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y88": { + "bits": {}, + "grid_x": 60, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y89": { + "bits": {}, + "grid_x": 60, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y92": { + "bits": {}, + "grid_x": 60, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y93": { + "bits": {}, + "grid_x": 60, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y94": { + "bits": {}, + "grid_x": 60, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y95": { + "bits": {}, + "grid_x": 60, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y96": { + "bits": {}, + "grid_x": 60, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y97": { + "bits": {}, + "grid_x": 60, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y98": { + "bits": {}, + "grid_x": 60, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y99": { + "bits": {}, + "grid_x": 60, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y100": { + "bits": {}, + "grid_x": 60, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y101": { + "bits": {}, + "grid_x": 60, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y102": { + "bits": {}, + "grid_x": 60, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y103": { + "bits": {}, + "grid_x": 60, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y105": { + "bits": {}, + "grid_x": 60, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y106": { + "bits": {}, + "grid_x": 60, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y107": { + "bits": {}, + "grid_x": 60, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y108": { + "bits": {}, + "grid_x": 60, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y109": { + "bits": {}, + "grid_x": 60, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y110": { + "bits": {}, + "grid_x": 60, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y111": { + "bits": {}, + "grid_x": 60, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y112": { + "bits": {}, + "grid_x": 60, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y113": { + "bits": {}, + "grid_x": 60, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y114": { + "bits": {}, + "grid_x": 60, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y115": { + "bits": {}, + "grid_x": 60, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y116": { + "bits": {}, + "grid_x": 60, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y119": { + "bits": {}, + "grid_x": 60, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y120": { + "bits": {}, + "grid_x": 60, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y121": { + "bits": {}, + "grid_x": 60, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y122": { + "bits": {}, + "grid_x": 60, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y123": { + "bits": {}, + "grid_x": 60, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y124": { + "bits": {}, + "grid_x": 60, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y125": { + "bits": {}, + "grid_x": 60, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y135": { + "bits": {}, + "grid_x": 60, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y136": { + "bits": {}, + "grid_x": 60, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y137": { + "bits": {}, + "grid_x": 60, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y138": { + "bits": {}, + "grid_x": 60, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y139": { + "bits": {}, + "grid_x": 60, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y140": { + "bits": {}, + "grid_x": 60, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y141": { + "bits": {}, + "grid_x": 60, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y144": { + "bits": {}, + "grid_x": 60, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y145": { + "bits": {}, + "grid_x": 60, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y146": { + "bits": {}, + "grid_x": 60, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y147": { + "bits": {}, + "grid_x": 60, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y148": { + "bits": {}, + "grid_x": 60, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y149": { + "bits": {}, + "grid_x": 60, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y150": { + "bits": {}, + "grid_x": 60, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y151": { + "bits": {}, + "grid_x": 60, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y152": { + "bits": {}, + "grid_x": 60, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y153": { + "bits": {}, + "grid_x": 60, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y154": { + "bits": {}, + "grid_x": 60, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_FEED_X60Y155": { + "bits": {}, + "grid_x": 60, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "CLK_FEED" + }, + "CLK_HROW_BOT_R_X60Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 30, + "offset": 42, + "words": 18 + } + }, + "clock_region": "X1Y0", + "grid_x": 60, + "grid_y": 130, + "pin_functions": {}, + "sites": { + "BUFHCE_X0Y0": "BUFHCE", + "BUFHCE_X0Y1": "BUFHCE", + "BUFHCE_X0Y2": "BUFHCE", + "BUFHCE_X0Y3": "BUFHCE", + "BUFHCE_X0Y4": "BUFHCE", + "BUFHCE_X0Y5": "BUFHCE", + "BUFHCE_X0Y6": "BUFHCE", + "BUFHCE_X0Y7": "BUFHCE", + "BUFHCE_X0Y8": "BUFHCE", + "BUFHCE_X0Y9": "BUFHCE", + "BUFHCE_X0Y10": "BUFHCE", + "BUFHCE_X0Y11": "BUFHCE", + "BUFHCE_X1Y0": "BUFHCE", + "BUFHCE_X1Y1": "BUFHCE", + "BUFHCE_X1Y2": "BUFHCE", + "BUFHCE_X1Y3": "BUFHCE", + "BUFHCE_X1Y4": "BUFHCE", + "BUFHCE_X1Y5": "BUFHCE", + "BUFHCE_X1Y6": "BUFHCE", + "BUFHCE_X1Y7": "BUFHCE", + "BUFHCE_X1Y8": "BUFHCE", + "BUFHCE_X1Y9": "BUFHCE", + "BUFHCE_X1Y10": "BUFHCE", + "BUFHCE_X1Y11": "BUFHCE" + }, + "type": "CLK_HROW_BOT_R" + }, + "CLK_HROW_TOP_R_X60Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 30, + "offset": 42, + "words": 18 + } + }, + "clock_region": "X1Y1", + "grid_x": 60, + "grid_y": 78, + "pin_functions": {}, + "sites": { + "BUFHCE_X0Y12": "BUFHCE", + "BUFHCE_X0Y13": "BUFHCE", + "BUFHCE_X0Y14": "BUFHCE", + "BUFHCE_X0Y15": "BUFHCE", + "BUFHCE_X0Y16": "BUFHCE", + "BUFHCE_X0Y17": "BUFHCE", + "BUFHCE_X0Y18": "BUFHCE", + "BUFHCE_X0Y19": "BUFHCE", + "BUFHCE_X0Y20": "BUFHCE", + "BUFHCE_X0Y21": "BUFHCE", + "BUFHCE_X0Y22": "BUFHCE", + "BUFHCE_X0Y23": "BUFHCE", + "BUFHCE_X1Y12": "BUFHCE", + "BUFHCE_X1Y13": "BUFHCE", + "BUFHCE_X1Y14": "BUFHCE", + "BUFHCE_X1Y15": "BUFHCE", + "BUFHCE_X1Y16": "BUFHCE", + "BUFHCE_X1Y17": "BUFHCE", + "BUFHCE_X1Y18": "BUFHCE", + "BUFHCE_X1Y19": "BUFHCE", + "BUFHCE_X1Y20": "BUFHCE", + "BUFHCE_X1Y21": "BUFHCE", + "BUFHCE_X1Y22": "BUFHCE", + "BUFHCE_X1Y23": "BUFHCE" + }, + "type": "CLK_HROW_TOP_R" + }, + "CLK_HROW_TOP_R_X60Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 30, + "offset": 42, + "words": 18 + } + }, + "clock_region": "X1Y2", + "grid_x": 60, + "grid_y": 26, + "pin_functions": {}, + "sites": { + "BUFHCE_X0Y24": "BUFHCE", + "BUFHCE_X0Y25": "BUFHCE", + "BUFHCE_X0Y26": "BUFHCE", + "BUFHCE_X0Y27": "BUFHCE", + "BUFHCE_X0Y28": "BUFHCE", + "BUFHCE_X0Y29": "BUFHCE", + "BUFHCE_X0Y30": "BUFHCE", + "BUFHCE_X0Y31": "BUFHCE", + "BUFHCE_X0Y32": "BUFHCE", + "BUFHCE_X0Y33": "BUFHCE", + "BUFHCE_X0Y34": "BUFHCE", + "BUFHCE_X0Y35": "BUFHCE", + "BUFHCE_X1Y24": "BUFHCE", + "BUFHCE_X1Y25": "BUFHCE", + "BUFHCE_X1Y26": "BUFHCE", + "BUFHCE_X1Y27": "BUFHCE", + "BUFHCE_X1Y28": "BUFHCE", + "BUFHCE_X1Y29": "BUFHCE", + "BUFHCE_X1Y30": "BUFHCE", + "BUFHCE_X1Y31": "BUFHCE", + "BUFHCE_X1Y32": "BUFHCE", + "BUFHCE_X1Y33": "BUFHCE", + "BUFHCE_X1Y34": "BUFHCE", + "BUFHCE_X1Y35": "BUFHCE" + }, + "type": "CLK_HROW_TOP_R" + }, + "CLK_MTBF2_X60Y47": { + "bits": {}, + "grid_x": 60, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "CLK_MTBF2" + }, + "CLK_PMV2_SVT_X60Y34": { + "bits": {}, + "grid_x": 60, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "CLK_PMV2_SVT" + }, + "CLK_PMV2_X60Y43": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 60, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "PMV_X0Y2": "PMV2" + }, + "type": "CLK_PMV2" + }, + "CLK_PMVIOB_X60Y18": { + "bits": {}, + "grid_x": 60, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "CLK_PMVIOB" + }, + "CLK_PMV_X60Y2": { + "bits": {}, + "grid_x": 60, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "CLK_PMV" + }, + "CLK_TERM_X60Y0": { + "bits": {}, + "grid_x": 60, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "CLK_TERM" + }, + "CLK_TERM_X60Y156": { + "bits": {}, + "grid_x": 60, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "CLK_TERM" + }, + "CMT_FIFO_L_X107Y8": { + "bits": {}, + "clock_region": "X1Y0", + "grid_x": 107, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y0": "IN_FIFO", + "OUT_FIFO_X1Y0": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y20": { + "bits": {}, + "clock_region": "X1Y0", + "grid_x": 107, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y1": "IN_FIFO", + "OUT_FIFO_X1Y1": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y33": { + "bits": {}, + "clock_region": "X1Y0", + "grid_x": 107, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y2": "IN_FIFO", + "OUT_FIFO_X1Y2": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y45": { + "bits": {}, + "clock_region": "X1Y0", + "grid_x": 107, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y3": "IN_FIFO", + "OUT_FIFO_X1Y3": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y60": { + "bits": {}, + "clock_region": "X1Y1", + "grid_x": 107, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y4": "IN_FIFO", + "OUT_FIFO_X1Y4": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y72": { + "bits": {}, + "clock_region": "X1Y1", + "grid_x": 107, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y5": "IN_FIFO", + "OUT_FIFO_X1Y5": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y85": { + "bits": {}, + "clock_region": "X1Y1", + "grid_x": 107, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y6": "IN_FIFO", + "OUT_FIFO_X1Y6": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_L_X107Y97": { + "bits": {}, + "clock_region": "X1Y1", + "grid_x": 107, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "IN_FIFO_X1Y7": "IN_FIFO", + "OUT_FIFO_X1Y7": "OUT_FIFO" + }, + "type": "CMT_FIFO_L" + }, + "CMT_FIFO_R_X7Y8": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 7, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y0": "IN_FIFO", + "OUT_FIFO_X0Y0": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y20": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 7, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y1": "IN_FIFO", + "OUT_FIFO_X0Y1": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y33": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 7, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y2": "IN_FIFO", + "OUT_FIFO_X0Y2": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y45": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 7, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y3": "IN_FIFO", + "OUT_FIFO_X0Y3": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y60": { + "bits": {}, + "clock_region": "X0Y1", + "grid_x": 7, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y4": "IN_FIFO", + "OUT_FIFO_X0Y4": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y72": { + "bits": {}, + "clock_region": "X0Y1", + "grid_x": 7, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y5": "IN_FIFO", + "OUT_FIFO_X0Y5": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y85": { + "bits": {}, + "clock_region": "X0Y1", + "grid_x": 7, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y6": "IN_FIFO", + "OUT_FIFO_X0Y6": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y97": { + "bits": {}, + "clock_region": "X0Y1", + "grid_x": 7, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y7": "IN_FIFO", + "OUT_FIFO_X0Y7": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y112": { + "bits": {}, + "clock_region": "X0Y2", + "grid_x": 7, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y8": "IN_FIFO", + "OUT_FIFO_X0Y8": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y124": { + "bits": {}, + "clock_region": "X0Y2", + "grid_x": 7, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y9": "IN_FIFO", + "OUT_FIFO_X0Y9": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y137": { + "bits": {}, + "clock_region": "X0Y2", + "grid_x": 7, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y10": "IN_FIFO", + "OUT_FIFO_X0Y10": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_FIFO_R_X7Y149": { + "bits": {}, + "clock_region": "X0Y2", + "grid_x": 7, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "IN_FIFO_X0Y11": "IN_FIFO", + "OUT_FIFO_X0Y11": "OUT_FIFO" + }, + "type": "CMT_FIFO_R" + }, + "CMT_PMV_L_X107Y1": { + "bits": {}, + "grid_x": 107, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV_L" + }, + "CMT_PMV_L_X107Y51": { + "bits": {}, + "grid_x": 107, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV_L" + }, + "CMT_PMV_L_X107Y53": { + "bits": {}, + "grid_x": 107, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV_L" + }, + "CMT_PMV_L_X107Y103": { + "bits": {}, + "grid_x": 107, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV_L" + }, + "CMT_PMV_X7Y1": { + "bits": {}, + "grid_x": 7, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV" + }, + "CMT_PMV_X7Y51": { + "bits": {}, + "grid_x": 7, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV" + }, + "CMT_PMV_X7Y53": { + "bits": {}, + "grid_x": 7, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV" + }, + "CMT_PMV_X7Y103": { + "bits": {}, + "grid_x": 7, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV" + }, + "CMT_PMV_X7Y105": { + "bits": {}, + "grid_x": 7, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV" + }, + "CMT_PMV_X7Y155": { + "bits": {}, + "grid_x": 7, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "CMT_PMV" + }, + "CMT_TOP_L_LOWER_B_X106Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X1Y0", + "grid_x": 106, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "MMCME2_ADV_X1Y0": "MMCME2_ADV" + }, + "type": "CMT_TOP_L_LOWER_B" + }, + "CMT_TOP_L_LOWER_B_X106Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X1Y1", + "grid_x": 106, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "MMCME2_ADV_X1Y1": "MMCME2_ADV" + }, + "type": "CMT_TOP_L_LOWER_B" + }, + "CMT_TOP_L_LOWER_T_X106Y18": { + "bits": {}, + "clock_region": "X1Y0", + "grid_x": 106, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X1Y0": "PHASER_IN_PHY", + "PHASER_IN_PHY_X1Y1": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X1Y0": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X1Y1": "PHASER_OUT_PHY" + }, + "type": "CMT_TOP_L_LOWER_T" + }, + "CMT_TOP_L_LOWER_T_X106Y70": { + "bits": {}, + "clock_region": "X1Y1", + "grid_x": 106, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X1Y4": "PHASER_IN_PHY", + "PHASER_IN_PHY_X1Y5": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X1Y4": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X1Y5": "PHASER_OUT_PHY" + }, + "type": "CMT_TOP_L_LOWER_T" + }, + "CMT_TOP_L_UPPER_B_X106Y31": { + "bits": {}, + "clock_region": "X1Y0", + "grid_x": 106, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X1Y2": "PHASER_IN_PHY", + "PHASER_IN_PHY_X1Y3": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X1Y2": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X1Y3": "PHASER_OUT_PHY", + "PHASER_REF_X1Y0": "PHASER_REF", + "PHY_CONTROL_X1Y0": "PHY_CONTROL" + }, + "type": "CMT_TOP_L_UPPER_B" + }, + "CMT_TOP_L_UPPER_B_X106Y83": { + "bits": {}, + "clock_region": "X1Y1", + "grid_x": 106, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X1Y6": "PHASER_IN_PHY", + "PHASER_IN_PHY_X1Y7": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X1Y6": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X1Y7": "PHASER_OUT_PHY", + "PHASER_REF_X1Y1": "PHASER_REF", + "PHY_CONTROL_X1Y1": "PHY_CONTROL" + }, + "type": "CMT_TOP_L_UPPER_B" + }, + "CMT_TOP_L_UPPER_T_X106Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 30, + "offset": 75, + "words": 26 + } + }, + "clock_region": "X1Y0", + "grid_x": 106, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "PLLE2_ADV_X1Y0": "PLLE2_ADV" + }, + "type": "CMT_TOP_L_UPPER_T" + }, + "CMT_TOP_L_UPPER_T_X106Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 30, + "offset": 75, + "words": 26 + } + }, + "clock_region": "X1Y1", + "grid_x": 106, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "PLLE2_ADV_X1Y1": "PLLE2_ADV" + }, + "type": "CMT_TOP_L_UPPER_T" + }, + "CMT_TOP_R_LOWER_B_X8Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X0Y0", + "grid_x": 8, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "MMCME2_ADV_X0Y0": "MMCME2_ADV" + }, + "type": "CMT_TOP_R_LOWER_B" + }, + "CMT_TOP_R_LOWER_B_X8Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X0Y1", + "grid_x": 8, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "MMCME2_ADV_X0Y1": "MMCME2_ADV" + }, + "type": "CMT_TOP_R_LOWER_B" + }, + "CMT_TOP_R_LOWER_B_X8Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X0Y2", + "grid_x": 8, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "MMCME2_ADV_X0Y2": "MMCME2_ADV" + }, + "type": "CMT_TOP_R_LOWER_B" + }, + "CMT_TOP_R_LOWER_T_X8Y18": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 8, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X0Y0": "PHASER_IN_PHY", + "PHASER_IN_PHY_X0Y1": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X0Y0": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X0Y1": "PHASER_OUT_PHY" + }, + "type": "CMT_TOP_R_LOWER_T" + }, + "CMT_TOP_R_LOWER_T_X8Y70": { + "bits": {}, + "clock_region": "X0Y1", + "grid_x": 8, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X0Y4": "PHASER_IN_PHY", + "PHASER_IN_PHY_X0Y5": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X0Y4": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X0Y5": "PHASER_OUT_PHY" + }, + "type": "CMT_TOP_R_LOWER_T" + }, + "CMT_TOP_R_LOWER_T_X8Y122": { + "bits": {}, + "clock_region": "X0Y2", + "grid_x": 8, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X0Y8": "PHASER_IN_PHY", + "PHASER_IN_PHY_X0Y9": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X0Y8": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X0Y9": "PHASER_OUT_PHY" + }, + "type": "CMT_TOP_R_LOWER_T" + }, + "CMT_TOP_R_UPPER_B_X8Y31": { + "bits": {}, + "clock_region": "X0Y0", + "grid_x": 8, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X0Y2": "PHASER_IN_PHY", + "PHASER_IN_PHY_X0Y3": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X0Y2": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X0Y3": "PHASER_OUT_PHY", + "PHASER_REF_X0Y0": "PHASER_REF", + "PHY_CONTROL_X0Y0": "PHY_CONTROL" + }, + "type": "CMT_TOP_R_UPPER_B" + }, + "CMT_TOP_R_UPPER_B_X8Y83": { + "bits": {}, + "clock_region": "X0Y1", + "grid_x": 8, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X0Y6": "PHASER_IN_PHY", + "PHASER_IN_PHY_X0Y7": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X0Y6": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X0Y7": "PHASER_OUT_PHY", + "PHASER_REF_X0Y1": "PHASER_REF", + "PHY_CONTROL_X0Y1": "PHY_CONTROL" + }, + "type": "CMT_TOP_R_UPPER_B" + }, + "CMT_TOP_R_UPPER_B_X8Y135": { + "bits": {}, + "clock_region": "X0Y2", + "grid_x": 8, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "PHASER_IN_PHY_X0Y10": "PHASER_IN_PHY", + "PHASER_IN_PHY_X0Y11": "PHASER_IN_PHY", + "PHASER_OUT_PHY_X0Y10": "PHASER_OUT_PHY", + "PHASER_OUT_PHY_X0Y11": "PHASER_OUT_PHY", + "PHASER_REF_X0Y2": "PHASER_REF", + "PHY_CONTROL_X0Y2": "PHY_CONTROL" + }, + "type": "CMT_TOP_R_UPPER_B" + }, + "CMT_TOP_R_UPPER_T_X8Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 30, + "offset": 75, + "words": 26 + } + }, + "clock_region": "X0Y0", + "grid_x": 8, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "PLLE2_ADV_X0Y0": "PLLE2_ADV" + }, + "type": "CMT_TOP_R_UPPER_T" + }, + "CMT_TOP_R_UPPER_T_X8Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 30, + "offset": 75, + "words": 26 + } + }, + "clock_region": "X0Y1", + "grid_x": 8, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "PLLE2_ADV_X0Y1": "PLLE2_ADV" + }, + "type": "CMT_TOP_R_UPPER_T" + }, + "CMT_TOP_R_UPPER_T_X8Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 30, + "offset": 75, + "words": 26 + } + }, + "clock_region": "X0Y2", + "grid_x": 8, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "PLLE2_ADV_X0Y2": "PLLE2_ADV" + }, + "type": "CMT_TOP_R_UPPER_T" + }, + "DSP_L_X34Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "DSP48_X1Y0": "DSP48E1", + "DSP48_X1Y1": "DSP48E1", + "TIEOFF_X35Y0": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "DSP48_X1Y2": "DSP48E1", + "DSP48_X1Y3": "DSP48E1", + "TIEOFF_X35Y5": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "DSP48_X1Y4": "DSP48E1", + "DSP48_X1Y5": "DSP48E1", + "TIEOFF_X35Y10": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "DSP48_X1Y6": "DSP48E1", + "DSP48_X1Y7": "DSP48E1", + "TIEOFF_X35Y15": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "DSP48_X1Y8": "DSP48E1", + "DSP48_X1Y9": "DSP48E1", + "TIEOFF_X35Y20": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "DSP48_X1Y10": "DSP48E1", + "DSP48_X1Y11": "DSP48E1", + "TIEOFF_X35Y25": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "DSP48_X1Y12": "DSP48E1", + "DSP48_X1Y13": "DSP48E1", + "TIEOFF_X35Y30": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "DSP48_X1Y14": "DSP48E1", + "DSP48_X1Y15": "DSP48E1", + "TIEOFF_X35Y35": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "DSP48_X1Y16": "DSP48E1", + "DSP48_X1Y17": "DSP48E1", + "TIEOFF_X35Y40": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 86, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "DSP48_X1Y18": "DSP48E1", + "DSP48_X1Y19": "DSP48E1", + "TIEOFF_X35Y45": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "DSP48_X1Y20": "DSP48E1", + "DSP48_X1Y21": "DSP48E1", + "TIEOFF_X35Y50": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "DSP48_X1Y22": "DSP48E1", + "DSP48_X1Y23": "DSP48E1", + "TIEOFF_X35Y55": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "DSP48_X1Y24": "DSP48E1", + "DSP48_X1Y25": "DSP48E1", + "TIEOFF_X35Y60": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "DSP48_X1Y26": "DSP48E1", + "DSP48_X1Y27": "DSP48E1", + "TIEOFF_X35Y65": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "DSP48_X1Y28": "DSP48E1", + "DSP48_X1Y29": "DSP48E1", + "TIEOFF_X35Y70": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "DSP48_X1Y30": "DSP48E1", + "DSP48_X1Y31": "DSP48E1", + "TIEOFF_X35Y75": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "DSP48_X1Y32": "DSP48E1", + "DSP48_X1Y33": "DSP48E1", + "TIEOFF_X35Y80": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "DSP48_X1Y34": "DSP48E1", + "DSP48_X1Y35": "DSP48E1", + "TIEOFF_X35Y85": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "DSP48_X1Y36": "DSP48E1", + "DSP48_X1Y37": "DSP48E1", + "TIEOFF_X35Y90": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 86, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "DSP48_X1Y38": "DSP48E1", + "DSP48_X1Y39": "DSP48E1", + "TIEOFF_X35Y95": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "DSP48_X1Y40": "DSP48E1", + "DSP48_X1Y41": "DSP48E1", + "TIEOFF_X35Y100": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "DSP48_X1Y42": "DSP48E1", + "DSP48_X1Y43": "DSP48E1", + "TIEOFF_X35Y105": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "DSP48_X1Y44": "DSP48E1", + "DSP48_X1Y45": "DSP48E1", + "TIEOFF_X35Y110": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "DSP48_X1Y46": "DSP48E1", + "DSP48_X1Y47": "DSP48E1", + "TIEOFF_X35Y115": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "DSP48_X1Y48": "DSP48E1", + "DSP48_X1Y49": "DSP48E1", + "TIEOFF_X35Y120": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "DSP48_X1Y50": "DSP48E1", + "DSP48_X1Y51": "DSP48E1", + "TIEOFF_X35Y125": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "DSP48_X1Y52": "DSP48E1", + "DSP48_X1Y53": "DSP48E1", + "TIEOFF_X35Y130": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "DSP48_X1Y54": "DSP48E1", + "DSP48_X1Y55": "DSP48E1", + "TIEOFF_X35Y135": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "DSP48_X1Y56": "DSP48E1", + "DSP48_X1Y57": "DSP48E1", + "TIEOFF_X35Y140": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_L_X34Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X1Y2", + "grid_x": 86, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "DSP48_X1Y58": "DSP48E1", + "DSP48_X1Y59": "DSP48E1", + "TIEOFF_X35Y145": "TIEOFF" + }, + "type": "DSP_L" + }, + "DSP_R_X9Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "DSP48_X0Y0": "DSP48E1", + "DSP48_X0Y1": "DSP48E1", + "TIEOFF_X10Y0": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "DSP48_X0Y2": "DSP48E1", + "DSP48_X0Y3": "DSP48E1", + "TIEOFF_X10Y5": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "DSP48_X0Y4": "DSP48E1", + "DSP48_X0Y5": "DSP48E1", + "TIEOFF_X10Y10": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "DSP48_X0Y6": "DSP48E1", + "DSP48_X0Y7": "DSP48E1", + "TIEOFF_X10Y15": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "DSP48_X0Y8": "DSP48E1", + "DSP48_X0Y9": "DSP48E1", + "TIEOFF_X10Y20": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "DSP48_X0Y10": "DSP48E1", + "DSP48_X0Y11": "DSP48E1", + "TIEOFF_X10Y25": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "DSP48_X0Y12": "DSP48E1", + "DSP48_X0Y13": "DSP48E1", + "TIEOFF_X10Y30": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "DSP48_X0Y14": "DSP48E1", + "DSP48_X0Y15": "DSP48E1", + "TIEOFF_X10Y35": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "DSP48_X0Y16": "DSP48E1", + "DSP48_X0Y17": "DSP48E1", + "TIEOFF_X10Y40": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 28, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "DSP48_X0Y18": "DSP48E1", + "DSP48_X0Y19": "DSP48E1", + "TIEOFF_X10Y45": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "DSP48_X0Y20": "DSP48E1", + "DSP48_X0Y21": "DSP48E1", + "TIEOFF_X10Y50": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "DSP48_X0Y22": "DSP48E1", + "DSP48_X0Y23": "DSP48E1", + "TIEOFF_X10Y55": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "DSP48_X0Y24": "DSP48E1", + "DSP48_X0Y25": "DSP48E1", + "TIEOFF_X10Y60": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "DSP48_X0Y26": "DSP48E1", + "DSP48_X0Y27": "DSP48E1", + "TIEOFF_X10Y65": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "DSP48_X0Y28": "DSP48E1", + "DSP48_X0Y29": "DSP48E1", + "TIEOFF_X10Y70": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "DSP48_X0Y30": "DSP48E1", + "DSP48_X0Y31": "DSP48E1", + "TIEOFF_X10Y75": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "DSP48_X0Y32": "DSP48E1", + "DSP48_X0Y33": "DSP48E1", + "TIEOFF_X10Y80": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "DSP48_X0Y34": "DSP48E1", + "DSP48_X0Y35": "DSP48E1", + "TIEOFF_X10Y85": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "DSP48_X0Y36": "DSP48E1", + "DSP48_X0Y37": "DSP48E1", + "TIEOFF_X10Y90": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 28, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "DSP48_X0Y38": "DSP48E1", + "DSP48_X0Y39": "DSP48E1", + "TIEOFF_X10Y95": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 0, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "DSP48_X0Y40": "DSP48E1", + "DSP48_X0Y41": "DSP48E1", + "TIEOFF_X10Y100": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 10, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "DSP48_X0Y42": "DSP48E1", + "DSP48_X0Y43": "DSP48E1", + "TIEOFF_X10Y105": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 20, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "DSP48_X0Y44": "DSP48E1", + "DSP48_X0Y45": "DSP48E1", + "TIEOFF_X10Y110": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 30, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "DSP48_X0Y46": "DSP48E1", + "DSP48_X0Y47": "DSP48E1", + "TIEOFF_X10Y115": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 40, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "DSP48_X0Y48": "DSP48E1", + "DSP48_X0Y49": "DSP48E1", + "TIEOFF_X10Y120": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 51, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "DSP48_X0Y50": "DSP48E1", + "DSP48_X0Y51": "DSP48E1", + "TIEOFF_X10Y125": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 61, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "DSP48_X0Y52": "DSP48E1", + "DSP48_X0Y53": "DSP48E1", + "TIEOFF_X10Y130": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 71, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "DSP48_X0Y54": "DSP48E1", + "DSP48_X0Y55": "DSP48E1", + "TIEOFF_X10Y135": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 81, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "DSP48_X0Y56": "DSP48E1", + "DSP48_X0Y57": "DSP48E1", + "TIEOFF_X10Y140": "TIEOFF" + }, + "type": "DSP_R" + }, + "DSP_R_X9Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 91, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 28, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "DSP48_X0Y58": "DSP48E1", + "DSP48_X0Y59": "DSP48E1", + "TIEOFF_X10Y145": "TIEOFF" + }, + "type": "DSP_R" + }, + "GTP_CHANNEL_0_X97Y110": { + "bits": {}, + "clock_region": "X1Y2", + "grid_x": 97, + "grid_y": 46, + "pin_functions": { + "IPAD_X1Y6": "MGTPRXN0_216", + "IPAD_X1Y7": "MGTPRXP0_216", + "OPAD_X0Y0": "MGTPTXN0_216", + "OPAD_X0Y1": "MGTPTXP0_216" + }, + "sites": { + "GTPE2_CHANNEL_X0Y0": "GTPE2_CHANNEL", + "IPAD_X1Y6": "IPAD", + "IPAD_X1Y7": "IPAD", + "OPAD_X0Y0": "OPAD", + "OPAD_X0Y1": "OPAD" + }, + "type": "GTP_CHANNEL_0" + }, + "GTP_CHANNEL_1_X97Y121": { + "bits": {}, + "clock_region": "X1Y2", + "grid_x": 97, + "grid_y": 35, + "pin_functions": { + "IPAD_X1Y12": "MGTPRXN1_216", + "IPAD_X1Y13": "MGTPRXP1_216", + "OPAD_X0Y2": "MGTPTXN1_216", + "OPAD_X0Y3": "MGTPTXP1_216" + }, + "sites": { + "GTPE2_CHANNEL_X0Y1": "GTPE2_CHANNEL", + "IPAD_X1Y12": "IPAD", + "IPAD_X1Y13": "IPAD", + "OPAD_X0Y2": "OPAD", + "OPAD_X0Y3": "OPAD" + }, + "type": "GTP_CHANNEL_1" + }, + "GTP_CHANNEL_2_X97Y139": { + "bits": {}, + "clock_region": "X1Y2", + "grid_x": 97, + "grid_y": 17, + "pin_functions": { + "IPAD_X1Y24": "MGTPRXN2_216", + "IPAD_X1Y25": "MGTPRXP2_216", + "OPAD_X0Y4": "MGTPTXN2_216", + "OPAD_X0Y5": "MGTPTXP2_216" + }, + "sites": { + "GTPE2_CHANNEL_X0Y2": "GTPE2_CHANNEL", + "IPAD_X1Y24": "IPAD", + "IPAD_X1Y25": "IPAD", + "OPAD_X0Y4": "OPAD", + "OPAD_X0Y5": "OPAD" + }, + "type": "GTP_CHANNEL_2" + }, + "GTP_CHANNEL_3_X97Y150": { + "bits": {}, + "clock_region": "X1Y2", + "grid_x": 97, + "grid_y": 6, + "pin_functions": { + "IPAD_X1Y30": "MGTPRXN3_216", + "IPAD_X1Y31": "MGTPRXP3_216", + "OPAD_X0Y6": "MGTPTXN3_216", + "OPAD_X0Y7": "MGTPTXP3_216" + }, + "sites": { + "GTPE2_CHANNEL_X0Y3": "GTPE2_CHANNEL", + "IPAD_X1Y30": "IPAD", + "IPAD_X1Y31": "IPAD", + "OPAD_X0Y6": "OPAD", + "OPAD_X0Y7": "OPAD" + }, + "type": "GTP_CHANNEL_3" + }, + "GTP_COMMON_X97Y127": { + "bits": {}, + "clock_region": "X1Y2", + "grid_x": 97, + "grid_y": 29, + "pin_functions": { + "IPAD_X1Y14": "MGTREFCLK0P_216", + "IPAD_X1Y15": "MGTREFCLK0N_216", + "IPAD_X1Y16": "MGTREFCLK1P_216", + "IPAD_X1Y17": "MGTREFCLK1N_216" + }, + "sites": { + "GTPE2_COMMON_X0Y0": "GTPE2_COMMON", + "IBUFDS_GTE2_X0Y0": "IBUFDS_GTE2", + "IBUFDS_GTE2_X0Y1": "IBUFDS_GTE2", + "IPAD_X1Y14": "IPAD", + "IPAD_X1Y15": "IPAD", + "IPAD_X1Y16": "IPAD", + "IPAD_X1Y17": "IPAD" + }, + "type": "GTP_COMMON" + }, + "GTP_INT_INTERFACE_X37Y100": { + "bits": {}, + "grid_x": 94, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y101": { + "bits": {}, + "grid_x": 94, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y102": { + "bits": {}, + "grid_x": 94, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y103": { + "bits": {}, + "grid_x": 94, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y104": { + "bits": {}, + "grid_x": 94, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y105": { + "bits": {}, + "grid_x": 94, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y106": { + "bits": {}, + "grid_x": 94, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y107": { + "bits": {}, + "grid_x": 94, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y108": { + "bits": {}, + "grid_x": 94, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y109": { + "bits": {}, + "grid_x": 94, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y110": { + "bits": {}, + "grid_x": 94, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y111": { + "bits": {}, + "grid_x": 94, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y112": { + "bits": {}, + "grid_x": 94, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y113": { + "bits": {}, + "grid_x": 94, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y114": { + "bits": {}, + "grid_x": 94, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y115": { + "bits": {}, + "grid_x": 94, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y116": { + "bits": {}, + "grid_x": 94, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y117": { + "bits": {}, + "grid_x": 94, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y118": { + "bits": {}, + "grid_x": 94, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y119": { + "bits": {}, + "grid_x": 94, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y120": { + "bits": {}, + "grid_x": 94, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y121": { + "bits": {}, + "grid_x": 94, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y122": { + "bits": {}, + "grid_x": 94, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y123": { + "bits": {}, + "grid_x": 94, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y124": { + "bits": {}, + "grid_x": 94, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y125": { + "bits": {}, + "grid_x": 94, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y126": { + "bits": {}, + "grid_x": 94, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y127": { + "bits": {}, + "grid_x": 94, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y128": { + "bits": {}, + "grid_x": 94, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y129": { + "bits": {}, + "grid_x": 94, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y130": { + "bits": {}, + "grid_x": 94, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y131": { + "bits": {}, + "grid_x": 94, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y132": { + "bits": {}, + "grid_x": 94, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y133": { + "bits": {}, + "grid_x": 94, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y134": { + "bits": {}, + "grid_x": 94, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y135": { + "bits": {}, + "grid_x": 94, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y136": { + "bits": {}, + "grid_x": 94, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y137": { + "bits": {}, + "grid_x": 94, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y138": { + "bits": {}, + "grid_x": 94, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y139": { + "bits": {}, + "grid_x": 94, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y140": { + "bits": {}, + "grid_x": 94, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y141": { + "bits": {}, + "grid_x": 94, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y142": { + "bits": {}, + "grid_x": 94, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y143": { + "bits": {}, + "grid_x": 94, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y144": { + "bits": {}, + "grid_x": 94, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y145": { + "bits": {}, + "grid_x": 94, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y146": { + "bits": {}, + "grid_x": 94, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y147": { + "bits": {}, + "grid_x": 94, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y148": { + "bits": {}, + "grid_x": 94, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "GTP_INT_INTERFACE_X37Y149": { + "bits": {}, + "grid_x": 94, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "GTP_INT_INTERFACE" + }, + "HCLK_BRAM_X19Y26": { + "bits": {}, + "grid_x": 19, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X19Y78": { + "bits": {}, + "grid_x": 19, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X19Y130": { + "bits": {}, + "grid_x": 19, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X75Y26": { + "bits": {}, + "grid_x": 75, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X75Y78": { + "bits": {}, + "grid_x": 75, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X75Y130": { + "bits": {}, + "grid_x": 75, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X95Y26": { + "bits": {}, + "grid_x": 95, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_BRAM_X95Y78": { + "bits": {}, + "grid_x": 95, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_BRAM" + }, + "HCLK_CLB_X10Y26": { + "bits": {}, + "grid_x": 10, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X10Y78": { + "bits": {}, + "grid_x": 10, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X10Y130": { + "bits": {}, + "grid_x": 10, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X13Y26": { + "bits": {}, + "grid_x": 13, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X13Y78": { + "bits": {}, + "grid_x": 13, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X13Y130": { + "bits": {}, + "grid_x": 13, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X14Y26": { + "bits": {}, + "grid_x": 14, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X14Y78": { + "bits": {}, + "grid_x": 14, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X14Y130": { + "bits": {}, + "grid_x": 14, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X17Y26": { + "bits": {}, + "grid_x": 17, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X17Y78": { + "bits": {}, + "grid_x": 17, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X17Y130": { + "bits": {}, + "grid_x": 17, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X23Y26": { + "bits": {}, + "grid_x": 23, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X23Y78": { + "bits": {}, + "grid_x": 23, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X23Y130": { + "bits": {}, + "grid_x": 23, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X24Y26": { + "bits": {}, + "grid_x": 24, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X24Y78": { + "bits": {}, + "grid_x": 24, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X24Y130": { + "bits": {}, + "grid_x": 24, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X30Y26": { + "bits": {}, + "grid_x": 30, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X30Y78": { + "bits": {}, + "grid_x": 30, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X30Y130": { + "bits": {}, + "grid_x": 30, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X33Y26": { + "bits": {}, + "grid_x": 33, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X33Y78": { + "bits": {}, + "grid_x": 33, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X33Y130": { + "bits": {}, + "grid_x": 33, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X35Y130": { + "bits": {}, + "grid_x": 35, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X38Y130": { + "bits": {}, + "grid_x": 38, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X39Y130": { + "bits": {}, + "grid_x": 39, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X42Y130": { + "bits": {}, + "grid_x": 42, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X43Y130": { + "bits": {}, + "grid_x": 43, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X46Y130": { + "bits": {}, + "grid_x": 46, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X51Y26": { + "bits": {}, + "grid_x": 51, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X51Y78": { + "bits": {}, + "grid_x": 51, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X51Y130": { + "bits": {}, + "grid_x": 51, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X52Y26": { + "bits": {}, + "grid_x": 52, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X52Y78": { + "bits": {}, + "grid_x": 52, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X52Y130": { + "bits": {}, + "grid_x": 52, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X55Y26": { + "bits": {}, + "grid_x": 55, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X55Y78": { + "bits": {}, + "grid_x": 55, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X55Y130": { + "bits": {}, + "grid_x": 55, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X56Y26": { + "bits": {}, + "grid_x": 56, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X56Y78": { + "bits": {}, + "grid_x": 56, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X56Y130": { + "bits": {}, + "grid_x": 56, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X62Y26": { + "bits": {}, + "grid_x": 62, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X62Y78": { + "bits": {}, + "grid_x": 62, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X62Y130": { + "bits": {}, + "grid_x": 62, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X65Y26": { + "bits": {}, + "grid_x": 65, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X65Y78": { + "bits": {}, + "grid_x": 65, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X65Y130": { + "bits": {}, + "grid_x": 65, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X67Y26": { + "bits": {}, + "grid_x": 67, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X67Y78": { + "bits": {}, + "grid_x": 67, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X67Y130": { + "bits": {}, + "grid_x": 67, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X70Y26": { + "bits": {}, + "grid_x": 70, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X70Y78": { + "bits": {}, + "grid_x": 70, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X70Y130": { + "bits": {}, + "grid_x": 70, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X71Y26": { + "bits": {}, + "grid_x": 71, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X71Y78": { + "bits": {}, + "grid_x": 71, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X71Y130": { + "bits": {}, + "grid_x": 71, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X74Y26": { + "bits": {}, + "grid_x": 74, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X74Y78": { + "bits": {}, + "grid_x": 74, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X74Y130": { + "bits": {}, + "grid_x": 74, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X79Y26": { + "bits": {}, + "grid_x": 79, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X79Y78": { + "bits": {}, + "grid_x": 79, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X79Y130": { + "bits": {}, + "grid_x": 79, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X81Y26": { + "bits": {}, + "grid_x": 81, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X81Y78": { + "bits": {}, + "grid_x": 81, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X81Y130": { + "bits": {}, + "grid_x": 81, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X84Y26": { + "bits": {}, + "grid_x": 84, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X84Y78": { + "bits": {}, + "grid_x": 84, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X84Y130": { + "bits": {}, + "grid_x": 84, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X90Y26": { + "bits": {}, + "grid_x": 90, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X90Y78": { + "bits": {}, + "grid_x": 90, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X90Y130": { + "bits": {}, + "grid_x": 90, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X91Y26": { + "bits": {}, + "grid_x": 91, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X91Y78": { + "bits": {}, + "grid_x": 91, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X91Y130": { + "bits": {}, + "grid_x": 91, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X97Y26": { + "bits": {}, + "grid_x": 97, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X97Y78": { + "bits": {}, + "grid_x": 97, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X100Y26": { + "bits": {}, + "grid_x": 100, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X100Y78": { + "bits": {}, + "grid_x": 100, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X101Y26": { + "bits": {}, + "grid_x": 101, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X101Y78": { + "bits": {}, + "grid_x": 101, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X104Y26": { + "bits": {}, + "grid_x": 104, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CLB_X104Y78": { + "bits": {}, + "grid_x": 104, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_CLB" + }, + "HCLK_CMT_L_X106Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 30, + "offset": 45, + "words": 10 + } + }, + "clock_region": "X1Y0", + "grid_x": 106, + "grid_y": 130, + "pin_functions": {}, + "sites": { + "BUFMRCE_X1Y0": "BUFMRCE", + "BUFMRCE_X1Y1": "BUFMRCE" + }, + "type": "HCLK_CMT_L" + }, + "HCLK_CMT_L_X106Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 30, + "offset": 45, + "words": 10 + } + }, + "clock_region": "X1Y1", + "grid_x": 106, + "grid_y": 78, + "pin_functions": {}, + "sites": { + "BUFMRCE_X1Y2": "BUFMRCE", + "BUFMRCE_X1Y3": "BUFMRCE" + }, + "type": "HCLK_CMT_L" + }, + "HCLK_CMT_X8Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 30, + "offset": 45, + "words": 10 + } + }, + "clock_region": "X0Y0", + "grid_x": 8, + "grid_y": 130, + "pin_functions": {}, + "sites": { + "BUFMRCE_X0Y0": "BUFMRCE", + "BUFMRCE_X0Y1": "BUFMRCE" + }, + "type": "HCLK_CMT" + }, + "HCLK_CMT_X8Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 30, + "offset": 45, + "words": 10 + } + }, + "clock_region": "X0Y1", + "grid_x": 8, + "grid_y": 78, + "pin_functions": {}, + "sites": { + "BUFMRCE_X0Y2": "BUFMRCE", + "BUFMRCE_X0Y3": "BUFMRCE" + }, + "type": "HCLK_CMT" + }, + "HCLK_CMT_X8Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 30, + "offset": 45, + "words": 10 + } + }, + "clock_region": "X0Y2", + "grid_x": 8, + "grid_y": 26, + "pin_functions": {}, + "sites": { + "BUFMRCE_X0Y4": "BUFMRCE", + "BUFMRCE_X0Y5": "BUFMRCE" + }, + "type": "HCLK_CMT" + }, + "HCLK_DSP_L_X86Y26": { + "bits": {}, + "grid_x": 86, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_DSP_L" + }, + "HCLK_DSP_L_X86Y78": { + "bits": {}, + "grid_x": 86, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_DSP_L" + }, + "HCLK_DSP_L_X86Y130": { + "bits": {}, + "grid_x": 86, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_DSP_L" + }, + "HCLK_DSP_R_X28Y26": { + "bits": {}, + "grid_x": 28, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_DSP_R" + }, + "HCLK_DSP_R_X28Y78": { + "bits": {}, + "grid_x": 28, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_DSP_R" + }, + "HCLK_DSP_R_X28Y130": { + "bits": {}, + "grid_x": 28, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_DSP_R" + }, + "HCLK_FEEDTHRU_1_X35Y26": { + "bits": {}, + "grid_x": 35, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X35Y78": { + "bits": {}, + "grid_x": 35, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X38Y26": { + "bits": {}, + "grid_x": 38, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X38Y78": { + "bits": {}, + "grid_x": 38, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X39Y26": { + "bits": {}, + "grid_x": 39, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X39Y78": { + "bits": {}, + "grid_x": 39, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X42Y26": { + "bits": {}, + "grid_x": 42, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X42Y78": { + "bits": {}, + "grid_x": 42, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X43Y26": { + "bits": {}, + "grid_x": 43, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X43Y78": { + "bits": {}, + "grid_x": 43, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_1_X46Y78": { + "bits": {}, + "grid_x": 46, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_1" + }, + "HCLK_FEEDTHRU_2_X36Y26": { + "bits": {}, + "grid_x": 36, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X36Y78": { + "bits": {}, + "grid_x": 36, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X37Y26": { + "bits": {}, + "grid_x": 37, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X37Y78": { + "bits": {}, + "grid_x": 37, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X40Y26": { + "bits": {}, + "grid_x": 40, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X40Y78": { + "bits": {}, + "grid_x": 40, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X41Y26": { + "bits": {}, + "grid_x": 41, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X41Y78": { + "bits": {}, + "grid_x": 41, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X44Y26": { + "bits": {}, + "grid_x": 44, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X44Y78": { + "bits": {}, + "grid_x": 44, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X45Y26": { + "bits": {}, + "grid_x": 45, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FEEDTHRU_2_X45Y78": { + "bits": {}, + "grid_x": 45, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FEEDTHRU_2" + }, + "HCLK_FIFO_L_X7Y26": { + "bits": {}, + "grid_x": 7, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FIFO_L" + }, + "HCLK_FIFO_L_X7Y78": { + "bits": {}, + "grid_x": 7, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FIFO_L" + }, + "HCLK_FIFO_L_X7Y130": { + "bits": {}, + "grid_x": 7, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FIFO_L" + }, + "HCLK_FIFO_L_X107Y26": { + "bits": {}, + "grid_x": 107, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FIFO_L" + }, + "HCLK_FIFO_L_X107Y78": { + "bits": {}, + "grid_x": 107, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_FIFO_L" + }, + "HCLK_GTX_X95Y130": { + "bits": {}, + "grid_x": 95, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_GTX" + }, + "HCLK_INT_INTERFACE_X3Y26": { + "bits": {}, + "grid_x": 3, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X3Y78": { + "bits": {}, + "grid_x": 3, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X3Y130": { + "bits": {}, + "grid_x": 3, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X6Y26": { + "bits": {}, + "grid_x": 6, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X6Y78": { + "bits": {}, + "grid_x": 6, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X6Y130": { + "bits": {}, + "grid_x": 6, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X20Y26": { + "bits": {}, + "grid_x": 20, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X20Y78": { + "bits": {}, + "grid_x": 20, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X20Y130": { + "bits": {}, + "grid_x": 20, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X27Y26": { + "bits": {}, + "grid_x": 27, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X27Y78": { + "bits": {}, + "grid_x": 27, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X27Y130": { + "bits": {}, + "grid_x": 27, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X48Y26": { + "bits": {}, + "grid_x": 48, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X48Y78": { + "bits": {}, + "grid_x": 48, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X48Y130": { + "bits": {}, + "grid_x": 48, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X59Y26": { + "bits": {}, + "grid_x": 59, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X59Y78": { + "bits": {}, + "grid_x": 59, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X59Y130": { + "bits": {}, + "grid_x": 59, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X76Y26": { + "bits": {}, + "grid_x": 76, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X76Y78": { + "bits": {}, + "grid_x": 76, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X76Y130": { + "bits": {}, + "grid_x": 76, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X87Y26": { + "bits": {}, + "grid_x": 87, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X87Y78": { + "bits": {}, + "grid_x": 87, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X87Y130": { + "bits": {}, + "grid_x": 87, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X94Y26": { + "bits": {}, + "grid_x": 94, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X94Y78": { + "bits": {}, + "grid_x": 94, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X94Y130": { + "bits": {}, + "grid_x": 94, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X108Y26": { + "bits": {}, + "grid_x": 108, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X108Y78": { + "bits": {}, + "grid_x": 108, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X111Y26": { + "bits": {}, + "grid_x": 111, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_INT_INTERFACE_X111Y78": { + "bits": {}, + "grid_x": 111, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_INT_INTERFACE" + }, + "HCLK_IOB_X0Y26": { + "bits": {}, + "grid_x": 0, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_IOB" + }, + "HCLK_IOB_X0Y78": { + "bits": {}, + "grid_x": 0, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_IOB" + }, + "HCLK_IOB_X0Y130": { + "bits": {}, + "grid_x": 0, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_IOB" + }, + "HCLK_IOB_X114Y26": { + "bits": {}, + "grid_x": 114, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_IOB" + }, + "HCLK_IOB_X114Y78": { + "bits": {}, + "grid_x": 114, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_IOB" + }, + "HCLK_IOI3_X1Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 50, + "words": 1 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 130, + "pin_functions": {}, + "sites": { + "BUFIO_X0Y0": "BUFIO", + "BUFIO_X0Y1": "BUFIO", + "BUFIO_X0Y2": "BUFIO", + "BUFIO_X0Y3": "BUFIO", + "BUFR_X0Y0": "BUFR", + "BUFR_X0Y1": "BUFR", + "BUFR_X0Y2": "BUFR", + "BUFR_X0Y3": "BUFR", + "IDELAYCTRL_X0Y0": "IDELAYCTRL" + }, + "type": "HCLK_IOI3" + }, + "HCLK_IOI3_X1Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 50, + "words": 1 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 78, + "pin_functions": {}, + "sites": { + "BUFIO_X0Y4": "BUFIO", + "BUFIO_X0Y5": "BUFIO", + "BUFIO_X0Y6": "BUFIO", + "BUFIO_X0Y7": "BUFIO", + "BUFR_X0Y4": "BUFR", + "BUFR_X0Y5": "BUFR", + "BUFR_X0Y6": "BUFR", + "BUFR_X0Y7": "BUFR", + "IDELAYCTRL_X0Y1": "IDELAYCTRL" + }, + "type": "HCLK_IOI3" + }, + "HCLK_IOI3_X1Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 50, + "words": 1 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 26, + "pin_functions": {}, + "sites": { + "BUFIO_X0Y8": "BUFIO", + "BUFIO_X0Y9": "BUFIO", + "BUFIO_X0Y10": "BUFIO", + "BUFIO_X0Y11": "BUFIO", + "BUFR_X0Y8": "BUFR", + "BUFR_X0Y9": "BUFR", + "BUFR_X0Y10": "BUFR", + "BUFR_X0Y11": "BUFR", + "IDELAYCTRL_X0Y2": "IDELAYCTRL" + }, + "type": "HCLK_IOI3" + }, + "HCLK_IOI3_X113Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 50, + "words": 1 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 130, + "pin_functions": {}, + "sites": { + "BUFIO_X1Y0": "BUFIO", + "BUFIO_X1Y1": "BUFIO", + "BUFIO_X1Y2": "BUFIO", + "BUFIO_X1Y3": "BUFIO", + "BUFR_X1Y0": "BUFR", + "BUFR_X1Y1": "BUFR", + "BUFR_X1Y2": "BUFR", + "BUFR_X1Y3": "BUFR", + "IDELAYCTRL_X1Y0": "IDELAYCTRL" + }, + "type": "HCLK_IOI3" + }, + "HCLK_IOI3_X113Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 50, + "words": 1 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 78, + "pin_functions": {}, + "sites": { + "BUFIO_X1Y4": "BUFIO", + "BUFIO_X1Y5": "BUFIO", + "BUFIO_X1Y6": "BUFIO", + "BUFIO_X1Y7": "BUFIO", + "BUFR_X1Y4": "BUFR", + "BUFR_X1Y5": "BUFR", + "BUFR_X1Y6": "BUFR", + "BUFR_X1Y7": "BUFR", + "IDELAYCTRL_X1Y1": "IDELAYCTRL" + }, + "type": "HCLK_IOI3" + }, + "HCLK_L_BOT_UTURN_X72Y130": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "HCLK_L" + }, + "baseaddr": "0x00020E00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 72, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L_BOT_UTURN" + }, + "HCLK_L_X4Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 4, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X4Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 4, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X4Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 4, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X11Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 11, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X11Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 11, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X11Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 11, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X15Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 15, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X15Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 15, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X15Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 15, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X21Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 21, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X21Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 21, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X21Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 21, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X25Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 25, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X25Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 25, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X25Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 25, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X31Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 31, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X31Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 31, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X31Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 31, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X36Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 36, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X40Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 40, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X44Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 44, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X49Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 49, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X49Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 49, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X49Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 49, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X53Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 53, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X53Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 53, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X53Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 53, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X57Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 57, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X57Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 57, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X57Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 57, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X63Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 63, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X63Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 63, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X63Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 63, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X68Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 68, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X68Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 68, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X68Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 68, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X72Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 72, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X72Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 72, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X77Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 77, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X77Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 77, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X77Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 77, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X82Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 82, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X82Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 82, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X82Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 82, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X88Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 88, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X88Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 88, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X88Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 88, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X92Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 92, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X92Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 92, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X92Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 92, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X98Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 98, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X98Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 98, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X102Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 102, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X102Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 102, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X109Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 109, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_L_X109Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 109, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_L" + }, + "HCLK_R_BOT_UTURN_X73Y130": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "HCLK_R" + }, + "baseaddr": "0x00020E80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 73, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R_BOT_UTURN" + }, + "HCLK_R_X5Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 5, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X5Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 5, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X5Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 5, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X12Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 12, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X12Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 12, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X12Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 12, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X16Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 16, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X16Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 16, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X16Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 16, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X22Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 22, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X22Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 22, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X22Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 22, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X26Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 26, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X26Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 26, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X26Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 26, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X32Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 32, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X32Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 32, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X32Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 32, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X37Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 37, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X41Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 41, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X45Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 45, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X50Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 50, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X50Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 50, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X50Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 50, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X54Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 54, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X54Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 54, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X54Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 54, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X58Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 58, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X58Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 58, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X58Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 58, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X64Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 64, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X64Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 64, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X64Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 64, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X69Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 69, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X69Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 69, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X69Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 69, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X73Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 73, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X73Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 73, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X78Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 78, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X78Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 78, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X78Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 78, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X83Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 83, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X83Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 83, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X83Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 83, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X89Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 89, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X89Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 89, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X89Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 89, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X93Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 93, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X93Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 93, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X93Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 93, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X99Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 99, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X99Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 99, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X103Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 103, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X103Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 103, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X110Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 110, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_R_X110Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 26, + "offset": 50, + "words": 1 + } + }, + "grid_x": 110, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_R" + }, + "HCLK_TERM_GTX_X96Y130": { + "bits": {}, + "grid_x": 96, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_TERM_GTX" + }, + "HCLK_TERM_X2Y26": { + "bits": {}, + "grid_x": 2, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_TERM" + }, + "HCLK_TERM_X2Y78": { + "bits": {}, + "grid_x": 2, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_TERM" + }, + "HCLK_TERM_X2Y130": { + "bits": {}, + "grid_x": 2, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_TERM" + }, + "HCLK_TERM_X112Y26": { + "bits": {}, + "grid_x": 112, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_TERM" + }, + "HCLK_TERM_X112Y78": { + "bits": {}, + "grid_x": 112, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_TERM" + }, + "HCLK_VBRK_X9Y26": { + "bits": {}, + "grid_x": 9, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X9Y78": { + "bits": {}, + "grid_x": 9, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X9Y130": { + "bits": {}, + "grid_x": 9, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X18Y26": { + "bits": {}, + "grid_x": 18, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X18Y78": { + "bits": {}, + "grid_x": 18, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X18Y130": { + "bits": {}, + "grid_x": 18, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X29Y26": { + "bits": {}, + "grid_x": 29, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X29Y78": { + "bits": {}, + "grid_x": 29, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X29Y130": { + "bits": {}, + "grid_x": 29, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X34Y26": { + "bits": {}, + "grid_x": 34, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X34Y78": { + "bits": {}, + "grid_x": 34, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X34Y130": { + "bits": {}, + "grid_x": 34, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X61Y26": { + "bits": {}, + "grid_x": 61, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X61Y78": { + "bits": {}, + "grid_x": 61, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X61Y130": { + "bits": {}, + "grid_x": 61, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X66Y26": { + "bits": {}, + "grid_x": 66, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X66Y78": { + "bits": {}, + "grid_x": 66, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X66Y130": { + "bits": {}, + "grid_x": 66, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X80Y26": { + "bits": {}, + "grid_x": 80, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X80Y78": { + "bits": {}, + "grid_x": 80, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X80Y130": { + "bits": {}, + "grid_x": 80, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X85Y26": { + "bits": {}, + "grid_x": 85, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X85Y78": { + "bits": {}, + "grid_x": 85, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X85Y130": { + "bits": {}, + "grid_x": 85, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X96Y26": { + "bits": {}, + "grid_x": 96, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X96Y78": { + "bits": {}, + "grid_x": 96, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X105Y26": { + "bits": {}, + "grid_x": 105, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VBRK_X105Y78": { + "bits": {}, + "grid_x": 105, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VBRK" + }, + "HCLK_VFRAME_X47Y26": { + "bits": {}, + "grid_x": 47, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VFRAME" + }, + "HCLK_VFRAME_X47Y78": { + "bits": {}, + "grid_x": 47, + "grid_y": 78, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VFRAME" + }, + "HCLK_VFRAME_X47Y130": { + "bits": {}, + "grid_x": 47, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "HCLK_VFRAME" + }, + "INT_FEEDTHRU_1_X35Y1": { + "bits": {}, + "grid_x": 35, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y2": { + "bits": {}, + "grid_x": 35, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y3": { + "bits": {}, + "grid_x": 35, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y4": { + "bits": {}, + "grid_x": 35, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y5": { + "bits": {}, + "grid_x": 35, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y6": { + "bits": {}, + "grid_x": 35, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y7": { + "bits": {}, + "grid_x": 35, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y8": { + "bits": {}, + "grid_x": 35, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y9": { + "bits": {}, + "grid_x": 35, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y10": { + "bits": {}, + "grid_x": 35, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y11": { + "bits": {}, + "grid_x": 35, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y12": { + "bits": {}, + "grid_x": 35, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y13": { + "bits": {}, + "grid_x": 35, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y14": { + "bits": {}, + "grid_x": 35, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y15": { + "bits": {}, + "grid_x": 35, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y16": { + "bits": {}, + "grid_x": 35, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y17": { + "bits": {}, + "grid_x": 35, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y18": { + "bits": {}, + "grid_x": 35, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y19": { + "bits": {}, + "grid_x": 35, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y20": { + "bits": {}, + "grid_x": 35, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y21": { + "bits": {}, + "grid_x": 35, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y22": { + "bits": {}, + "grid_x": 35, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y23": { + "bits": {}, + "grid_x": 35, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y24": { + "bits": {}, + "grid_x": 35, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y25": { + "bits": {}, + "grid_x": 35, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y27": { + "bits": {}, + "grid_x": 35, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y28": { + "bits": {}, + "grid_x": 35, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y29": { + "bits": {}, + "grid_x": 35, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y30": { + "bits": {}, + "grid_x": 35, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y31": { + "bits": {}, + "grid_x": 35, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y32": { + "bits": {}, + "grid_x": 35, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y33": { + "bits": {}, + "grid_x": 35, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y34": { + "bits": {}, + "grid_x": 35, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y35": { + "bits": {}, + "grid_x": 35, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y36": { + "bits": {}, + "grid_x": 35, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y37": { + "bits": {}, + "grid_x": 35, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y38": { + "bits": {}, + "grid_x": 35, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y39": { + "bits": {}, + "grid_x": 35, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y40": { + "bits": {}, + "grid_x": 35, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y41": { + "bits": {}, + "grid_x": 35, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y42": { + "bits": {}, + "grid_x": 35, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y43": { + "bits": {}, + "grid_x": 35, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y44": { + "bits": {}, + "grid_x": 35, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y45": { + "bits": {}, + "grid_x": 35, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y46": { + "bits": {}, + "grid_x": 35, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y47": { + "bits": {}, + "grid_x": 35, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y48": { + "bits": {}, + "grid_x": 35, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y49": { + "bits": {}, + "grid_x": 35, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y50": { + "bits": {}, + "grid_x": 35, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y51": { + "bits": {}, + "grid_x": 35, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y53": { + "bits": {}, + "grid_x": 35, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y54": { + "bits": {}, + "grid_x": 35, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y55": { + "bits": {}, + "grid_x": 35, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y56": { + "bits": {}, + "grid_x": 35, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y57": { + "bits": {}, + "grid_x": 35, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y58": { + "bits": {}, + "grid_x": 35, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y59": { + "bits": {}, + "grid_x": 35, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y60": { + "bits": {}, + "grid_x": 35, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y61": { + "bits": {}, + "grid_x": 35, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y62": { + "bits": {}, + "grid_x": 35, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y63": { + "bits": {}, + "grid_x": 35, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y64": { + "bits": {}, + "grid_x": 35, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y65": { + "bits": {}, + "grid_x": 35, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y66": { + "bits": {}, + "grid_x": 35, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y67": { + "bits": {}, + "grid_x": 35, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y68": { + "bits": {}, + "grid_x": 35, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y69": { + "bits": {}, + "grid_x": 35, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y70": { + "bits": {}, + "grid_x": 35, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y71": { + "bits": {}, + "grid_x": 35, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y72": { + "bits": {}, + "grid_x": 35, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y73": { + "bits": {}, + "grid_x": 35, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y74": { + "bits": {}, + "grid_x": 35, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y75": { + "bits": {}, + "grid_x": 35, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y76": { + "bits": {}, + "grid_x": 35, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y77": { + "bits": {}, + "grid_x": 35, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y79": { + "bits": {}, + "grid_x": 35, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y80": { + "bits": {}, + "grid_x": 35, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y81": { + "bits": {}, + "grid_x": 35, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y82": { + "bits": {}, + "grid_x": 35, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y83": { + "bits": {}, + "grid_x": 35, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y84": { + "bits": {}, + "grid_x": 35, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y85": { + "bits": {}, + "grid_x": 35, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y86": { + "bits": {}, + "grid_x": 35, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y87": { + "bits": {}, + "grid_x": 35, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y88": { + "bits": {}, + "grid_x": 35, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y89": { + "bits": {}, + "grid_x": 35, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y90": { + "bits": {}, + "grid_x": 35, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y91": { + "bits": {}, + "grid_x": 35, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y92": { + "bits": {}, + "grid_x": 35, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y93": { + "bits": {}, + "grid_x": 35, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y94": { + "bits": {}, + "grid_x": 35, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y95": { + "bits": {}, + "grid_x": 35, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y96": { + "bits": {}, + "grid_x": 35, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y97": { + "bits": {}, + "grid_x": 35, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y98": { + "bits": {}, + "grid_x": 35, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y99": { + "bits": {}, + "grid_x": 35, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y100": { + "bits": {}, + "grid_x": 35, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y101": { + "bits": {}, + "grid_x": 35, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y102": { + "bits": {}, + "grid_x": 35, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X35Y103": { + "bits": {}, + "grid_x": 35, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y1": { + "bits": {}, + "grid_x": 38, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y2": { + "bits": {}, + "grid_x": 38, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y3": { + "bits": {}, + "grid_x": 38, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y4": { + "bits": {}, + "grid_x": 38, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y5": { + "bits": {}, + "grid_x": 38, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y6": { + "bits": {}, + "grid_x": 38, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y7": { + "bits": {}, + "grid_x": 38, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y8": { + "bits": {}, + "grid_x": 38, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y9": { + "bits": {}, + "grid_x": 38, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y10": { + "bits": {}, + "grid_x": 38, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y11": { + "bits": {}, + "grid_x": 38, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y12": { + "bits": {}, + "grid_x": 38, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y13": { + "bits": {}, + "grid_x": 38, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y14": { + "bits": {}, + "grid_x": 38, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y15": { + "bits": {}, + "grid_x": 38, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y16": { + "bits": {}, + "grid_x": 38, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y17": { + "bits": {}, + "grid_x": 38, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y18": { + "bits": {}, + "grid_x": 38, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y19": { + "bits": {}, + "grid_x": 38, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y20": { + "bits": {}, + "grid_x": 38, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y21": { + "bits": {}, + "grid_x": 38, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y22": { + "bits": {}, + "grid_x": 38, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y23": { + "bits": {}, + "grid_x": 38, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y24": { + "bits": {}, + "grid_x": 38, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y25": { + "bits": {}, + "grid_x": 38, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y27": { + "bits": {}, + "grid_x": 38, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y28": { + "bits": {}, + "grid_x": 38, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y29": { + "bits": {}, + "grid_x": 38, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y30": { + "bits": {}, + "grid_x": 38, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y31": { + "bits": {}, + "grid_x": 38, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y32": { + "bits": {}, + "grid_x": 38, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y33": { + "bits": {}, + "grid_x": 38, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y34": { + "bits": {}, + "grid_x": 38, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y35": { + "bits": {}, + "grid_x": 38, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y36": { + "bits": {}, + "grid_x": 38, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y37": { + "bits": {}, + "grid_x": 38, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y38": { + "bits": {}, + "grid_x": 38, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y39": { + "bits": {}, + "grid_x": 38, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y40": { + "bits": {}, + "grid_x": 38, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y41": { + "bits": {}, + "grid_x": 38, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y42": { + "bits": {}, + "grid_x": 38, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y43": { + "bits": {}, + "grid_x": 38, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y44": { + "bits": {}, + "grid_x": 38, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y45": { + "bits": {}, + "grid_x": 38, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y46": { + "bits": {}, + "grid_x": 38, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y47": { + "bits": {}, + "grid_x": 38, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y48": { + "bits": {}, + "grid_x": 38, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y49": { + "bits": {}, + "grid_x": 38, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y50": { + "bits": {}, + "grid_x": 38, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y51": { + "bits": {}, + "grid_x": 38, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y53": { + "bits": {}, + "grid_x": 38, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y54": { + "bits": {}, + "grid_x": 38, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y55": { + "bits": {}, + "grid_x": 38, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y56": { + "bits": {}, + "grid_x": 38, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y57": { + "bits": {}, + "grid_x": 38, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y58": { + "bits": {}, + "grid_x": 38, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y59": { + "bits": {}, + "grid_x": 38, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y60": { + "bits": {}, + "grid_x": 38, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y61": { + "bits": {}, + "grid_x": 38, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y62": { + "bits": {}, + "grid_x": 38, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y63": { + "bits": {}, + "grid_x": 38, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y64": { + "bits": {}, + "grid_x": 38, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y65": { + "bits": {}, + "grid_x": 38, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y66": { + "bits": {}, + "grid_x": 38, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y67": { + "bits": {}, + "grid_x": 38, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y68": { + "bits": {}, + "grid_x": 38, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y69": { + "bits": {}, + "grid_x": 38, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y70": { + "bits": {}, + "grid_x": 38, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y71": { + "bits": {}, + "grid_x": 38, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y72": { + "bits": {}, + "grid_x": 38, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y73": { + "bits": {}, + "grid_x": 38, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y74": { + "bits": {}, + "grid_x": 38, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y75": { + "bits": {}, + "grid_x": 38, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y76": { + "bits": {}, + "grid_x": 38, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y77": { + "bits": {}, + "grid_x": 38, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y79": { + "bits": {}, + "grid_x": 38, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y80": { + "bits": {}, + "grid_x": 38, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y81": { + "bits": {}, + "grid_x": 38, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y82": { + "bits": {}, + "grid_x": 38, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y83": { + "bits": {}, + "grid_x": 38, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y84": { + "bits": {}, + "grid_x": 38, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y85": { + "bits": {}, + "grid_x": 38, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y86": { + "bits": {}, + "grid_x": 38, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y87": { + "bits": {}, + "grid_x": 38, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y88": { + "bits": {}, + "grid_x": 38, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y89": { + "bits": {}, + "grid_x": 38, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y90": { + "bits": {}, + "grid_x": 38, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y91": { + "bits": {}, + "grid_x": 38, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y92": { + "bits": {}, + "grid_x": 38, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y93": { + "bits": {}, + "grid_x": 38, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y94": { + "bits": {}, + "grid_x": 38, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y95": { + "bits": {}, + "grid_x": 38, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y96": { + "bits": {}, + "grid_x": 38, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y97": { + "bits": {}, + "grid_x": 38, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y98": { + "bits": {}, + "grid_x": 38, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y99": { + "bits": {}, + "grid_x": 38, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y100": { + "bits": {}, + "grid_x": 38, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y101": { + "bits": {}, + "grid_x": 38, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y102": { + "bits": {}, + "grid_x": 38, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X38Y103": { + "bits": {}, + "grid_x": 38, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y1": { + "bits": {}, + "grid_x": 39, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y2": { + "bits": {}, + "grid_x": 39, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y3": { + "bits": {}, + "grid_x": 39, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y4": { + "bits": {}, + "grid_x": 39, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y5": { + "bits": {}, + "grid_x": 39, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y6": { + "bits": {}, + "grid_x": 39, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y7": { + "bits": {}, + "grid_x": 39, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y8": { + "bits": {}, + "grid_x": 39, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y9": { + "bits": {}, + "grid_x": 39, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y10": { + "bits": {}, + "grid_x": 39, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y11": { + "bits": {}, + "grid_x": 39, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y12": { + "bits": {}, + "grid_x": 39, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y13": { + "bits": {}, + "grid_x": 39, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y14": { + "bits": {}, + "grid_x": 39, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y15": { + "bits": {}, + "grid_x": 39, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y16": { + "bits": {}, + "grid_x": 39, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y17": { + "bits": {}, + "grid_x": 39, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y18": { + "bits": {}, + "grid_x": 39, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y19": { + "bits": {}, + "grid_x": 39, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y20": { + "bits": {}, + "grid_x": 39, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y21": { + "bits": {}, + "grid_x": 39, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y22": { + "bits": {}, + "grid_x": 39, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y23": { + "bits": {}, + "grid_x": 39, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y24": { + "bits": {}, + "grid_x": 39, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y25": { + "bits": {}, + "grid_x": 39, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y27": { + "bits": {}, + "grid_x": 39, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y28": { + "bits": {}, + "grid_x": 39, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y29": { + "bits": {}, + "grid_x": 39, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y30": { + "bits": {}, + "grid_x": 39, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y31": { + "bits": {}, + "grid_x": 39, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y32": { + "bits": {}, + "grid_x": 39, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y33": { + "bits": {}, + "grid_x": 39, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y34": { + "bits": {}, + "grid_x": 39, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y35": { + "bits": {}, + "grid_x": 39, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y36": { + "bits": {}, + "grid_x": 39, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y37": { + "bits": {}, + "grid_x": 39, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y38": { + "bits": {}, + "grid_x": 39, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y39": { + "bits": {}, + "grid_x": 39, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y40": { + "bits": {}, + "grid_x": 39, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y41": { + "bits": {}, + "grid_x": 39, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y42": { + "bits": {}, + "grid_x": 39, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y43": { + "bits": {}, + "grid_x": 39, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y44": { + "bits": {}, + "grid_x": 39, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y45": { + "bits": {}, + "grid_x": 39, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y46": { + "bits": {}, + "grid_x": 39, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y47": { + "bits": {}, + "grid_x": 39, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y48": { + "bits": {}, + "grid_x": 39, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y49": { + "bits": {}, + "grid_x": 39, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y50": { + "bits": {}, + "grid_x": 39, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y51": { + "bits": {}, + "grid_x": 39, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y53": { + "bits": {}, + "grid_x": 39, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y54": { + "bits": {}, + "grid_x": 39, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y55": { + "bits": {}, + "grid_x": 39, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y56": { + "bits": {}, + "grid_x": 39, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y57": { + "bits": {}, + "grid_x": 39, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y58": { + "bits": {}, + "grid_x": 39, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y59": { + "bits": {}, + "grid_x": 39, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y60": { + "bits": {}, + "grid_x": 39, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y61": { + "bits": {}, + "grid_x": 39, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y62": { + "bits": {}, + "grid_x": 39, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y63": { + "bits": {}, + "grid_x": 39, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y64": { + "bits": {}, + "grid_x": 39, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y65": { + "bits": {}, + "grid_x": 39, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y66": { + "bits": {}, + "grid_x": 39, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y67": { + "bits": {}, + "grid_x": 39, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y68": { + "bits": {}, + "grid_x": 39, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y69": { + "bits": {}, + "grid_x": 39, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y70": { + "bits": {}, + "grid_x": 39, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y71": { + "bits": {}, + "grid_x": 39, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y72": { + "bits": {}, + "grid_x": 39, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y73": { + "bits": {}, + "grid_x": 39, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y74": { + "bits": {}, + "grid_x": 39, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y75": { + "bits": {}, + "grid_x": 39, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y76": { + "bits": {}, + "grid_x": 39, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y77": { + "bits": {}, + "grid_x": 39, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y79": { + "bits": {}, + "grid_x": 39, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y80": { + "bits": {}, + "grid_x": 39, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y81": { + "bits": {}, + "grid_x": 39, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y82": { + "bits": {}, + "grid_x": 39, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y83": { + "bits": {}, + "grid_x": 39, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y84": { + "bits": {}, + "grid_x": 39, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y85": { + "bits": {}, + "grid_x": 39, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y86": { + "bits": {}, + "grid_x": 39, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y87": { + "bits": {}, + "grid_x": 39, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y88": { + "bits": {}, + "grid_x": 39, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y89": { + "bits": {}, + "grid_x": 39, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y90": { + "bits": {}, + "grid_x": 39, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y91": { + "bits": {}, + "grid_x": 39, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y92": { + "bits": {}, + "grid_x": 39, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y93": { + "bits": {}, + "grid_x": 39, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y94": { + "bits": {}, + "grid_x": 39, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y95": { + "bits": {}, + "grid_x": 39, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y96": { + "bits": {}, + "grid_x": 39, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y97": { + "bits": {}, + "grid_x": 39, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y98": { + "bits": {}, + "grid_x": 39, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y99": { + "bits": {}, + "grid_x": 39, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y100": { + "bits": {}, + "grid_x": 39, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y101": { + "bits": {}, + "grid_x": 39, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y102": { + "bits": {}, + "grid_x": 39, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X39Y103": { + "bits": {}, + "grid_x": 39, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y1": { + "bits": {}, + "grid_x": 42, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y2": { + "bits": {}, + "grid_x": 42, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y3": { + "bits": {}, + "grid_x": 42, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y4": { + "bits": {}, + "grid_x": 42, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y5": { + "bits": {}, + "grid_x": 42, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y6": { + "bits": {}, + "grid_x": 42, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y7": { + "bits": {}, + "grid_x": 42, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y8": { + "bits": {}, + "grid_x": 42, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y9": { + "bits": {}, + "grid_x": 42, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y10": { + "bits": {}, + "grid_x": 42, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y11": { + "bits": {}, + "grid_x": 42, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y12": { + "bits": {}, + "grid_x": 42, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y13": { + "bits": {}, + "grid_x": 42, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y14": { + "bits": {}, + "grid_x": 42, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y15": { + "bits": {}, + "grid_x": 42, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y16": { + "bits": {}, + "grid_x": 42, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y17": { + "bits": {}, + "grid_x": 42, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y18": { + "bits": {}, + "grid_x": 42, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y19": { + "bits": {}, + "grid_x": 42, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y20": { + "bits": {}, + "grid_x": 42, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y21": { + "bits": {}, + "grid_x": 42, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y22": { + "bits": {}, + "grid_x": 42, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y23": { + "bits": {}, + "grid_x": 42, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y24": { + "bits": {}, + "grid_x": 42, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y25": { + "bits": {}, + "grid_x": 42, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y27": { + "bits": {}, + "grid_x": 42, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y28": { + "bits": {}, + "grid_x": 42, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y29": { + "bits": {}, + "grid_x": 42, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y30": { + "bits": {}, + "grid_x": 42, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y31": { + "bits": {}, + "grid_x": 42, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y32": { + "bits": {}, + "grid_x": 42, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y33": { + "bits": {}, + "grid_x": 42, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y34": { + "bits": {}, + "grid_x": 42, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y35": { + "bits": {}, + "grid_x": 42, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y36": { + "bits": {}, + "grid_x": 42, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y37": { + "bits": {}, + "grid_x": 42, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y38": { + "bits": {}, + "grid_x": 42, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y39": { + "bits": {}, + "grid_x": 42, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y40": { + "bits": {}, + "grid_x": 42, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y41": { + "bits": {}, + "grid_x": 42, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y42": { + "bits": {}, + "grid_x": 42, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y43": { + "bits": {}, + "grid_x": 42, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y44": { + "bits": {}, + "grid_x": 42, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y45": { + "bits": {}, + "grid_x": 42, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y46": { + "bits": {}, + "grid_x": 42, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y47": { + "bits": {}, + "grid_x": 42, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y48": { + "bits": {}, + "grid_x": 42, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y49": { + "bits": {}, + "grid_x": 42, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y50": { + "bits": {}, + "grid_x": 42, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y51": { + "bits": {}, + "grid_x": 42, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y53": { + "bits": {}, + "grid_x": 42, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y54": { + "bits": {}, + "grid_x": 42, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y55": { + "bits": {}, + "grid_x": 42, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y56": { + "bits": {}, + "grid_x": 42, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y57": { + "bits": {}, + "grid_x": 42, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y58": { + "bits": {}, + "grid_x": 42, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y59": { + "bits": {}, + "grid_x": 42, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y60": { + "bits": {}, + "grid_x": 42, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y61": { + "bits": {}, + "grid_x": 42, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y62": { + "bits": {}, + "grid_x": 42, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y63": { + "bits": {}, + "grid_x": 42, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y64": { + "bits": {}, + "grid_x": 42, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y65": { + "bits": {}, + "grid_x": 42, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y66": { + "bits": {}, + "grid_x": 42, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y67": { + "bits": {}, + "grid_x": 42, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y68": { + "bits": {}, + "grid_x": 42, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y69": { + "bits": {}, + "grid_x": 42, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y70": { + "bits": {}, + "grid_x": 42, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y71": { + "bits": {}, + "grid_x": 42, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y72": { + "bits": {}, + "grid_x": 42, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y73": { + "bits": {}, + "grid_x": 42, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y74": { + "bits": {}, + "grid_x": 42, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y75": { + "bits": {}, + "grid_x": 42, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y76": { + "bits": {}, + "grid_x": 42, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y77": { + "bits": {}, + "grid_x": 42, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y79": { + "bits": {}, + "grid_x": 42, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y80": { + "bits": {}, + "grid_x": 42, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y81": { + "bits": {}, + "grid_x": 42, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y82": { + "bits": {}, + "grid_x": 42, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y83": { + "bits": {}, + "grid_x": 42, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y84": { + "bits": {}, + "grid_x": 42, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y85": { + "bits": {}, + "grid_x": 42, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y86": { + "bits": {}, + "grid_x": 42, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y87": { + "bits": {}, + "grid_x": 42, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y88": { + "bits": {}, + "grid_x": 42, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y89": { + "bits": {}, + "grid_x": 42, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y90": { + "bits": {}, + "grid_x": 42, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y91": { + "bits": {}, + "grid_x": 42, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y92": { + "bits": {}, + "grid_x": 42, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y93": { + "bits": {}, + "grid_x": 42, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y94": { + "bits": {}, + "grid_x": 42, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y95": { + "bits": {}, + "grid_x": 42, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y96": { + "bits": {}, + "grid_x": 42, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y97": { + "bits": {}, + "grid_x": 42, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y98": { + "bits": {}, + "grid_x": 42, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y99": { + "bits": {}, + "grid_x": 42, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y100": { + "bits": {}, + "grid_x": 42, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y101": { + "bits": {}, + "grid_x": 42, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y102": { + "bits": {}, + "grid_x": 42, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X42Y103": { + "bits": {}, + "grid_x": 42, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y1": { + "bits": {}, + "grid_x": 43, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y2": { + "bits": {}, + "grid_x": 43, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y3": { + "bits": {}, + "grid_x": 43, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y4": { + "bits": {}, + "grid_x": 43, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y5": { + "bits": {}, + "grid_x": 43, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y6": { + "bits": {}, + "grid_x": 43, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y7": { + "bits": {}, + "grid_x": 43, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y8": { + "bits": {}, + "grid_x": 43, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y9": { + "bits": {}, + "grid_x": 43, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y10": { + "bits": {}, + "grid_x": 43, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y11": { + "bits": {}, + "grid_x": 43, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y12": { + "bits": {}, + "grid_x": 43, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y13": { + "bits": {}, + "grid_x": 43, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y14": { + "bits": {}, + "grid_x": 43, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y15": { + "bits": {}, + "grid_x": 43, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y16": { + "bits": {}, + "grid_x": 43, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y17": { + "bits": {}, + "grid_x": 43, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y18": { + "bits": {}, + "grid_x": 43, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y19": { + "bits": {}, + "grid_x": 43, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y20": { + "bits": {}, + "grid_x": 43, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y21": { + "bits": {}, + "grid_x": 43, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y22": { + "bits": {}, + "grid_x": 43, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y23": { + "bits": {}, + "grid_x": 43, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y24": { + "bits": {}, + "grid_x": 43, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y25": { + "bits": {}, + "grid_x": 43, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y27": { + "bits": {}, + "grid_x": 43, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y28": { + "bits": {}, + "grid_x": 43, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y29": { + "bits": {}, + "grid_x": 43, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y30": { + "bits": {}, + "grid_x": 43, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y31": { + "bits": {}, + "grid_x": 43, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y32": { + "bits": {}, + "grid_x": 43, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y33": { + "bits": {}, + "grid_x": 43, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y34": { + "bits": {}, + "grid_x": 43, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y35": { + "bits": {}, + "grid_x": 43, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y36": { + "bits": {}, + "grid_x": 43, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y37": { + "bits": {}, + "grid_x": 43, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y38": { + "bits": {}, + "grid_x": 43, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y39": { + "bits": {}, + "grid_x": 43, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y40": { + "bits": {}, + "grid_x": 43, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y41": { + "bits": {}, + "grid_x": 43, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y42": { + "bits": {}, + "grid_x": 43, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y43": { + "bits": {}, + "grid_x": 43, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y44": { + "bits": {}, + "grid_x": 43, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y45": { + "bits": {}, + "grid_x": 43, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y46": { + "bits": {}, + "grid_x": 43, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y47": { + "bits": {}, + "grid_x": 43, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y48": { + "bits": {}, + "grid_x": 43, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y49": { + "bits": {}, + "grid_x": 43, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y50": { + "bits": {}, + "grid_x": 43, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y51": { + "bits": {}, + "grid_x": 43, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y53": { + "bits": {}, + "grid_x": 43, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y54": { + "bits": {}, + "grid_x": 43, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y55": { + "bits": {}, + "grid_x": 43, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y56": { + "bits": {}, + "grid_x": 43, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y57": { + "bits": {}, + "grid_x": 43, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y58": { + "bits": {}, + "grid_x": 43, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y59": { + "bits": {}, + "grid_x": 43, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y60": { + "bits": {}, + "grid_x": 43, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y61": { + "bits": {}, + "grid_x": 43, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y62": { + "bits": {}, + "grid_x": 43, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y63": { + "bits": {}, + "grid_x": 43, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y64": { + "bits": {}, + "grid_x": 43, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y65": { + "bits": {}, + "grid_x": 43, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y66": { + "bits": {}, + "grid_x": 43, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y67": { + "bits": {}, + "grid_x": 43, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y68": { + "bits": {}, + "grid_x": 43, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y69": { + "bits": {}, + "grid_x": 43, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y70": { + "bits": {}, + "grid_x": 43, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y71": { + "bits": {}, + "grid_x": 43, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y72": { + "bits": {}, + "grid_x": 43, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y73": { + "bits": {}, + "grid_x": 43, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y74": { + "bits": {}, + "grid_x": 43, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y75": { + "bits": {}, + "grid_x": 43, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y76": { + "bits": {}, + "grid_x": 43, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y77": { + "bits": {}, + "grid_x": 43, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y79": { + "bits": {}, + "grid_x": 43, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y80": { + "bits": {}, + "grid_x": 43, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y81": { + "bits": {}, + "grid_x": 43, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y82": { + "bits": {}, + "grid_x": 43, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y83": { + "bits": {}, + "grid_x": 43, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y84": { + "bits": {}, + "grid_x": 43, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y85": { + "bits": {}, + "grid_x": 43, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y86": { + "bits": {}, + "grid_x": 43, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y87": { + "bits": {}, + "grid_x": 43, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y88": { + "bits": {}, + "grid_x": 43, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y89": { + "bits": {}, + "grid_x": 43, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y90": { + "bits": {}, + "grid_x": 43, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y91": { + "bits": {}, + "grid_x": 43, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y92": { + "bits": {}, + "grid_x": 43, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y93": { + "bits": {}, + "grid_x": 43, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y94": { + "bits": {}, + "grid_x": 43, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y95": { + "bits": {}, + "grid_x": 43, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y96": { + "bits": {}, + "grid_x": 43, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y97": { + "bits": {}, + "grid_x": 43, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y98": { + "bits": {}, + "grid_x": 43, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y99": { + "bits": {}, + "grid_x": 43, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y100": { + "bits": {}, + "grid_x": 43, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y101": { + "bits": {}, + "grid_x": 43, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y102": { + "bits": {}, + "grid_x": 43, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X43Y103": { + "bits": {}, + "grid_x": 43, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y53": { + "bits": {}, + "grid_x": 46, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y54": { + "bits": {}, + "grid_x": 46, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y55": { + "bits": {}, + "grid_x": 46, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y56": { + "bits": {}, + "grid_x": 46, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y57": { + "bits": {}, + "grid_x": 46, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y58": { + "bits": {}, + "grid_x": 46, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y59": { + "bits": {}, + "grid_x": 46, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y60": { + "bits": {}, + "grid_x": 46, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y61": { + "bits": {}, + "grid_x": 46, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y62": { + "bits": {}, + "grid_x": 46, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y63": { + "bits": {}, + "grid_x": 46, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y64": { + "bits": {}, + "grid_x": 46, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y65": { + "bits": {}, + "grid_x": 46, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y66": { + "bits": {}, + "grid_x": 46, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y67": { + "bits": {}, + "grid_x": 46, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y68": { + "bits": {}, + "grid_x": 46, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y69": { + "bits": {}, + "grid_x": 46, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y70": { + "bits": {}, + "grid_x": 46, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y71": { + "bits": {}, + "grid_x": 46, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y72": { + "bits": {}, + "grid_x": 46, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y73": { + "bits": {}, + "grid_x": 46, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y74": { + "bits": {}, + "grid_x": 46, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y75": { + "bits": {}, + "grid_x": 46, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y76": { + "bits": {}, + "grid_x": 46, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_1_X46Y77": { + "bits": {}, + "grid_x": 46, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_1" + }, + "INT_FEEDTHRU_2_X36Y1": { + "bits": {}, + "grid_x": 36, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y2": { + "bits": {}, + "grid_x": 36, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y3": { + "bits": {}, + "grid_x": 36, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y4": { + "bits": {}, + "grid_x": 36, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y5": { + "bits": {}, + "grid_x": 36, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y6": { + "bits": {}, + "grid_x": 36, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y7": { + "bits": {}, + "grid_x": 36, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y8": { + "bits": {}, + "grid_x": 36, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y9": { + "bits": {}, + "grid_x": 36, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y10": { + "bits": {}, + "grid_x": 36, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y11": { + "bits": {}, + "grid_x": 36, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y12": { + "bits": {}, + "grid_x": 36, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y13": { + "bits": {}, + "grid_x": 36, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y14": { + "bits": {}, + "grid_x": 36, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y15": { + "bits": {}, + "grid_x": 36, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y16": { + "bits": {}, + "grid_x": 36, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y17": { + "bits": {}, + "grid_x": 36, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y18": { + "bits": {}, + "grid_x": 36, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y19": { + "bits": {}, + "grid_x": 36, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y20": { + "bits": {}, + "grid_x": 36, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y21": { + "bits": {}, + "grid_x": 36, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y22": { + "bits": {}, + "grid_x": 36, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y23": { + "bits": {}, + "grid_x": 36, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y24": { + "bits": {}, + "grid_x": 36, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y25": { + "bits": {}, + "grid_x": 36, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y27": { + "bits": {}, + "grid_x": 36, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y28": { + "bits": {}, + "grid_x": 36, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y29": { + "bits": {}, + "grid_x": 36, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y30": { + "bits": {}, + "grid_x": 36, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y31": { + "bits": {}, + "grid_x": 36, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y32": { + "bits": {}, + "grid_x": 36, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y33": { + "bits": {}, + "grid_x": 36, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y34": { + "bits": {}, + "grid_x": 36, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y35": { + "bits": {}, + "grid_x": 36, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y36": { + "bits": {}, + "grid_x": 36, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y37": { + "bits": {}, + "grid_x": 36, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y38": { + "bits": {}, + "grid_x": 36, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y39": { + "bits": {}, + "grid_x": 36, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y40": { + "bits": {}, + "grid_x": 36, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y41": { + "bits": {}, + "grid_x": 36, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y42": { + "bits": {}, + "grid_x": 36, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y43": { + "bits": {}, + "grid_x": 36, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y44": { + "bits": {}, + "grid_x": 36, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y45": { + "bits": {}, + "grid_x": 36, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y46": { + "bits": {}, + "grid_x": 36, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y47": { + "bits": {}, + "grid_x": 36, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y48": { + "bits": {}, + "grid_x": 36, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y49": { + "bits": {}, + "grid_x": 36, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y50": { + "bits": {}, + "grid_x": 36, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y51": { + "bits": {}, + "grid_x": 36, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y53": { + "bits": {}, + "grid_x": 36, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y54": { + "bits": {}, + "grid_x": 36, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y55": { + "bits": {}, + "grid_x": 36, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y56": { + "bits": {}, + "grid_x": 36, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y57": { + "bits": {}, + "grid_x": 36, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y58": { + "bits": {}, + "grid_x": 36, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y59": { + "bits": {}, + "grid_x": 36, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y60": { + "bits": {}, + "grid_x": 36, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y61": { + "bits": {}, + "grid_x": 36, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y62": { + "bits": {}, + "grid_x": 36, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y63": { + "bits": {}, + "grid_x": 36, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y64": { + "bits": {}, + "grid_x": 36, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y65": { + "bits": {}, + "grid_x": 36, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y66": { + "bits": {}, + "grid_x": 36, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y67": { + "bits": {}, + "grid_x": 36, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y68": { + "bits": {}, + "grid_x": 36, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y69": { + "bits": {}, + "grid_x": 36, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y70": { + "bits": {}, + "grid_x": 36, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y71": { + "bits": {}, + "grid_x": 36, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y72": { + "bits": {}, + "grid_x": 36, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y73": { + "bits": {}, + "grid_x": 36, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y74": { + "bits": {}, + "grid_x": 36, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y75": { + "bits": {}, + "grid_x": 36, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y76": { + "bits": {}, + "grid_x": 36, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y77": { + "bits": {}, + "grid_x": 36, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y79": { + "bits": {}, + "grid_x": 36, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y80": { + "bits": {}, + "grid_x": 36, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y81": { + "bits": {}, + "grid_x": 36, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y82": { + "bits": {}, + "grid_x": 36, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y83": { + "bits": {}, + "grid_x": 36, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y84": { + "bits": {}, + "grid_x": 36, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y85": { + "bits": {}, + "grid_x": 36, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y86": { + "bits": {}, + "grid_x": 36, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y87": { + "bits": {}, + "grid_x": 36, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y88": { + "bits": {}, + "grid_x": 36, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y89": { + "bits": {}, + "grid_x": 36, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y90": { + "bits": {}, + "grid_x": 36, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y91": { + "bits": {}, + "grid_x": 36, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y92": { + "bits": {}, + "grid_x": 36, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y93": { + "bits": {}, + "grid_x": 36, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y94": { + "bits": {}, + "grid_x": 36, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y95": { + "bits": {}, + "grid_x": 36, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y96": { + "bits": {}, + "grid_x": 36, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y97": { + "bits": {}, + "grid_x": 36, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y98": { + "bits": {}, + "grid_x": 36, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y99": { + "bits": {}, + "grid_x": 36, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y100": { + "bits": {}, + "grid_x": 36, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y101": { + "bits": {}, + "grid_x": 36, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y102": { + "bits": {}, + "grid_x": 36, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X36Y103": { + "bits": {}, + "grid_x": 36, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y1": { + "bits": {}, + "grid_x": 37, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y2": { + "bits": {}, + "grid_x": 37, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y3": { + "bits": {}, + "grid_x": 37, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y4": { + "bits": {}, + "grid_x": 37, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y5": { + "bits": {}, + "grid_x": 37, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y6": { + "bits": {}, + "grid_x": 37, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y7": { + "bits": {}, + "grid_x": 37, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y8": { + "bits": {}, + "grid_x": 37, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y9": { + "bits": {}, + "grid_x": 37, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y10": { + "bits": {}, + "grid_x": 37, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y11": { + "bits": {}, + "grid_x": 37, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y12": { + "bits": {}, + "grid_x": 37, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y13": { + "bits": {}, + "grid_x": 37, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y14": { + "bits": {}, + "grid_x": 37, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y15": { + "bits": {}, + "grid_x": 37, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y16": { + "bits": {}, + "grid_x": 37, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y17": { + "bits": {}, + "grid_x": 37, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y18": { + "bits": {}, + "grid_x": 37, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y19": { + "bits": {}, + "grid_x": 37, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y20": { + "bits": {}, + "grid_x": 37, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y21": { + "bits": {}, + "grid_x": 37, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y22": { + "bits": {}, + "grid_x": 37, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y23": { + "bits": {}, + "grid_x": 37, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y24": { + "bits": {}, + "grid_x": 37, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y25": { + "bits": {}, + "grid_x": 37, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y27": { + "bits": {}, + "grid_x": 37, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y28": { + "bits": {}, + "grid_x": 37, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y29": { + "bits": {}, + "grid_x": 37, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y30": { + "bits": {}, + "grid_x": 37, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y31": { + "bits": {}, + "grid_x": 37, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y32": { + "bits": {}, + "grid_x": 37, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y33": { + "bits": {}, + "grid_x": 37, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y34": { + "bits": {}, + "grid_x": 37, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y35": { + "bits": {}, + "grid_x": 37, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y36": { + "bits": {}, + "grid_x": 37, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y37": { + "bits": {}, + "grid_x": 37, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y38": { + "bits": {}, + "grid_x": 37, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y39": { + "bits": {}, + "grid_x": 37, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y40": { + "bits": {}, + "grid_x": 37, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y41": { + "bits": {}, + "grid_x": 37, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y42": { + "bits": {}, + "grid_x": 37, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y43": { + "bits": {}, + "grid_x": 37, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y44": { + "bits": {}, + "grid_x": 37, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y45": { + "bits": {}, + "grid_x": 37, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y46": { + "bits": {}, + "grid_x": 37, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y47": { + "bits": {}, + "grid_x": 37, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y48": { + "bits": {}, + "grid_x": 37, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y49": { + "bits": {}, + "grid_x": 37, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y50": { + "bits": {}, + "grid_x": 37, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y51": { + "bits": {}, + "grid_x": 37, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y53": { + "bits": {}, + "grid_x": 37, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y54": { + "bits": {}, + "grid_x": 37, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y55": { + "bits": {}, + "grid_x": 37, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y56": { + "bits": {}, + "grid_x": 37, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y57": { + "bits": {}, + "grid_x": 37, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y58": { + "bits": {}, + "grid_x": 37, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y59": { + "bits": {}, + "grid_x": 37, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y60": { + "bits": {}, + "grid_x": 37, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y61": { + "bits": {}, + "grid_x": 37, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y62": { + "bits": {}, + "grid_x": 37, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y63": { + "bits": {}, + "grid_x": 37, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y64": { + "bits": {}, + "grid_x": 37, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y65": { + "bits": {}, + "grid_x": 37, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y66": { + "bits": {}, + "grid_x": 37, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y67": { + "bits": {}, + "grid_x": 37, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y68": { + "bits": {}, + "grid_x": 37, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y69": { + "bits": {}, + "grid_x": 37, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y70": { + "bits": {}, + "grid_x": 37, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y71": { + "bits": {}, + "grid_x": 37, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y72": { + "bits": {}, + "grid_x": 37, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y73": { + "bits": {}, + "grid_x": 37, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y74": { + "bits": {}, + "grid_x": 37, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y75": { + "bits": {}, + "grid_x": 37, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y76": { + "bits": {}, + "grid_x": 37, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y77": { + "bits": {}, + "grid_x": 37, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y79": { + "bits": {}, + "grid_x": 37, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y80": { + "bits": {}, + "grid_x": 37, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y81": { + "bits": {}, + "grid_x": 37, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y82": { + "bits": {}, + "grid_x": 37, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y83": { + "bits": {}, + "grid_x": 37, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y84": { + "bits": {}, + "grid_x": 37, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y85": { + "bits": {}, + "grid_x": 37, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y86": { + "bits": {}, + "grid_x": 37, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y87": { + "bits": {}, + "grid_x": 37, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y88": { + "bits": {}, + "grid_x": 37, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y89": { + "bits": {}, + "grid_x": 37, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y90": { + "bits": {}, + "grid_x": 37, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y91": { + "bits": {}, + "grid_x": 37, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y92": { + "bits": {}, + "grid_x": 37, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y93": { + "bits": {}, + "grid_x": 37, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y94": { + "bits": {}, + "grid_x": 37, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y95": { + "bits": {}, + "grid_x": 37, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y96": { + "bits": {}, + "grid_x": 37, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y97": { + "bits": {}, + "grid_x": 37, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y98": { + "bits": {}, + "grid_x": 37, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y99": { + "bits": {}, + "grid_x": 37, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y100": { + "bits": {}, + "grid_x": 37, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y101": { + "bits": {}, + "grid_x": 37, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y102": { + "bits": {}, + "grid_x": 37, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X37Y103": { + "bits": {}, + "grid_x": 37, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y1": { + "bits": {}, + "grid_x": 40, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y2": { + "bits": {}, + "grid_x": 40, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y3": { + "bits": {}, + "grid_x": 40, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y4": { + "bits": {}, + "grid_x": 40, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y5": { + "bits": {}, + "grid_x": 40, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y6": { + "bits": {}, + "grid_x": 40, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y7": { + "bits": {}, + "grid_x": 40, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y8": { + "bits": {}, + "grid_x": 40, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y9": { + "bits": {}, + "grid_x": 40, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y10": { + "bits": {}, + "grid_x": 40, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y11": { + "bits": {}, + "grid_x": 40, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y12": { + "bits": {}, + "grid_x": 40, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y13": { + "bits": {}, + "grid_x": 40, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y14": { + "bits": {}, + "grid_x": 40, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y15": { + "bits": {}, + "grid_x": 40, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y16": { + "bits": {}, + "grid_x": 40, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y17": { + "bits": {}, + "grid_x": 40, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y18": { + "bits": {}, + "grid_x": 40, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y19": { + "bits": {}, + "grid_x": 40, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y20": { + "bits": {}, + "grid_x": 40, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y21": { + "bits": {}, + "grid_x": 40, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y22": { + "bits": {}, + "grid_x": 40, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y23": { + "bits": {}, + "grid_x": 40, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y24": { + "bits": {}, + "grid_x": 40, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y25": { + "bits": {}, + "grid_x": 40, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y27": { + "bits": {}, + "grid_x": 40, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y28": { + "bits": {}, + "grid_x": 40, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y29": { + "bits": {}, + "grid_x": 40, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y30": { + "bits": {}, + "grid_x": 40, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y31": { + "bits": {}, + "grid_x": 40, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y32": { + "bits": {}, + "grid_x": 40, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y33": { + "bits": {}, + "grid_x": 40, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y34": { + "bits": {}, + "grid_x": 40, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y35": { + "bits": {}, + "grid_x": 40, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y36": { + "bits": {}, + "grid_x": 40, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y37": { + "bits": {}, + "grid_x": 40, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y38": { + "bits": {}, + "grid_x": 40, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y39": { + "bits": {}, + "grid_x": 40, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y40": { + "bits": {}, + "grid_x": 40, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y41": { + "bits": {}, + "grid_x": 40, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y42": { + "bits": {}, + "grid_x": 40, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y43": { + "bits": {}, + "grid_x": 40, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y44": { + "bits": {}, + "grid_x": 40, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y45": { + "bits": {}, + "grid_x": 40, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y46": { + "bits": {}, + "grid_x": 40, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y47": { + "bits": {}, + "grid_x": 40, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y48": { + "bits": {}, + "grid_x": 40, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y49": { + "bits": {}, + "grid_x": 40, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y50": { + "bits": {}, + "grid_x": 40, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y51": { + "bits": {}, + "grid_x": 40, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y53": { + "bits": {}, + "grid_x": 40, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y54": { + "bits": {}, + "grid_x": 40, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y55": { + "bits": {}, + "grid_x": 40, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y56": { + "bits": {}, + "grid_x": 40, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y57": { + "bits": {}, + "grid_x": 40, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y58": { + "bits": {}, + "grid_x": 40, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y59": { + "bits": {}, + "grid_x": 40, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y60": { + "bits": {}, + "grid_x": 40, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y61": { + "bits": {}, + "grid_x": 40, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y62": { + "bits": {}, + "grid_x": 40, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y63": { + "bits": {}, + "grid_x": 40, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y64": { + "bits": {}, + "grid_x": 40, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y65": { + "bits": {}, + "grid_x": 40, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y66": { + "bits": {}, + "grid_x": 40, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y67": { + "bits": {}, + "grid_x": 40, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y68": { + "bits": {}, + "grid_x": 40, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y69": { + "bits": {}, + "grid_x": 40, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y70": { + "bits": {}, + "grid_x": 40, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y71": { + "bits": {}, + "grid_x": 40, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y72": { + "bits": {}, + "grid_x": 40, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y73": { + "bits": {}, + "grid_x": 40, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y74": { + "bits": {}, + "grid_x": 40, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y75": { + "bits": {}, + "grid_x": 40, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y76": { + "bits": {}, + "grid_x": 40, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y77": { + "bits": {}, + "grid_x": 40, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y79": { + "bits": {}, + "grid_x": 40, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y80": { + "bits": {}, + "grid_x": 40, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y81": { + "bits": {}, + "grid_x": 40, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y82": { + "bits": {}, + "grid_x": 40, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y83": { + "bits": {}, + "grid_x": 40, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y84": { + "bits": {}, + "grid_x": 40, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y85": { + "bits": {}, + "grid_x": 40, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y86": { + "bits": {}, + "grid_x": 40, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y87": { + "bits": {}, + "grid_x": 40, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y88": { + "bits": {}, + "grid_x": 40, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y89": { + "bits": {}, + "grid_x": 40, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y90": { + "bits": {}, + "grid_x": 40, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y91": { + "bits": {}, + "grid_x": 40, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y92": { + "bits": {}, + "grid_x": 40, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y93": { + "bits": {}, + "grid_x": 40, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y94": { + "bits": {}, + "grid_x": 40, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y95": { + "bits": {}, + "grid_x": 40, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y96": { + "bits": {}, + "grid_x": 40, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y97": { + "bits": {}, + "grid_x": 40, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y98": { + "bits": {}, + "grid_x": 40, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y99": { + "bits": {}, + "grid_x": 40, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y100": { + "bits": {}, + "grid_x": 40, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y101": { + "bits": {}, + "grid_x": 40, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y102": { + "bits": {}, + "grid_x": 40, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X40Y103": { + "bits": {}, + "grid_x": 40, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y1": { + "bits": {}, + "grid_x": 41, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y2": { + "bits": {}, + "grid_x": 41, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y3": { + "bits": {}, + "grid_x": 41, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y4": { + "bits": {}, + "grid_x": 41, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y5": { + "bits": {}, + "grid_x": 41, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y6": { + "bits": {}, + "grid_x": 41, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y7": { + "bits": {}, + "grid_x": 41, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y8": { + "bits": {}, + "grid_x": 41, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y9": { + "bits": {}, + "grid_x": 41, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y10": { + "bits": {}, + "grid_x": 41, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y11": { + "bits": {}, + "grid_x": 41, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y12": { + "bits": {}, + "grid_x": 41, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y13": { + "bits": {}, + "grid_x": 41, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y14": { + "bits": {}, + "grid_x": 41, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y15": { + "bits": {}, + "grid_x": 41, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y16": { + "bits": {}, + "grid_x": 41, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y17": { + "bits": {}, + "grid_x": 41, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y18": { + "bits": {}, + "grid_x": 41, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y19": { + "bits": {}, + "grid_x": 41, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y20": { + "bits": {}, + "grid_x": 41, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y21": { + "bits": {}, + "grid_x": 41, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y22": { + "bits": {}, + "grid_x": 41, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y23": { + "bits": {}, + "grid_x": 41, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y24": { + "bits": {}, + "grid_x": 41, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y25": { + "bits": {}, + "grid_x": 41, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y27": { + "bits": {}, + "grid_x": 41, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y28": { + "bits": {}, + "grid_x": 41, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y29": { + "bits": {}, + "grid_x": 41, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y30": { + "bits": {}, + "grid_x": 41, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y31": { + "bits": {}, + "grid_x": 41, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y32": { + "bits": {}, + "grid_x": 41, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y33": { + "bits": {}, + "grid_x": 41, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y34": { + "bits": {}, + "grid_x": 41, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y35": { + "bits": {}, + "grid_x": 41, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y36": { + "bits": {}, + "grid_x": 41, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y37": { + "bits": {}, + "grid_x": 41, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y38": { + "bits": {}, + "grid_x": 41, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y39": { + "bits": {}, + "grid_x": 41, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y40": { + "bits": {}, + "grid_x": 41, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y41": { + "bits": {}, + "grid_x": 41, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y42": { + "bits": {}, + "grid_x": 41, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y43": { + "bits": {}, + "grid_x": 41, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y44": { + "bits": {}, + "grid_x": 41, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y45": { + "bits": {}, + "grid_x": 41, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y46": { + "bits": {}, + "grid_x": 41, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y47": { + "bits": {}, + "grid_x": 41, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y48": { + "bits": {}, + "grid_x": 41, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y49": { + "bits": {}, + "grid_x": 41, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y50": { + "bits": {}, + "grid_x": 41, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y51": { + "bits": {}, + "grid_x": 41, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y53": { + "bits": {}, + "grid_x": 41, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y54": { + "bits": {}, + "grid_x": 41, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y55": { + "bits": {}, + "grid_x": 41, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y56": { + "bits": {}, + "grid_x": 41, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y57": { + "bits": {}, + "grid_x": 41, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y58": { + "bits": {}, + "grid_x": 41, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y59": { + "bits": {}, + "grid_x": 41, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y60": { + "bits": {}, + "grid_x": 41, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y61": { + "bits": {}, + "grid_x": 41, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y62": { + "bits": {}, + "grid_x": 41, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y63": { + "bits": {}, + "grid_x": 41, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y64": { + "bits": {}, + "grid_x": 41, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y65": { + "bits": {}, + "grid_x": 41, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y66": { + "bits": {}, + "grid_x": 41, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y67": { + "bits": {}, + "grid_x": 41, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y68": { + "bits": {}, + "grid_x": 41, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y69": { + "bits": {}, + "grid_x": 41, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y70": { + "bits": {}, + "grid_x": 41, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y71": { + "bits": {}, + "grid_x": 41, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y72": { + "bits": {}, + "grid_x": 41, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y73": { + "bits": {}, + "grid_x": 41, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y74": { + "bits": {}, + "grid_x": 41, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y75": { + "bits": {}, + "grid_x": 41, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y76": { + "bits": {}, + "grid_x": 41, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y77": { + "bits": {}, + "grid_x": 41, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y79": { + "bits": {}, + "grid_x": 41, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y80": { + "bits": {}, + "grid_x": 41, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y81": { + "bits": {}, + "grid_x": 41, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y82": { + "bits": {}, + "grid_x": 41, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y83": { + "bits": {}, + "grid_x": 41, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y84": { + "bits": {}, + "grid_x": 41, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y85": { + "bits": {}, + "grid_x": 41, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y86": { + "bits": {}, + "grid_x": 41, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y87": { + "bits": {}, + "grid_x": 41, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y88": { + "bits": {}, + "grid_x": 41, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y89": { + "bits": {}, + "grid_x": 41, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y90": { + "bits": {}, + "grid_x": 41, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y91": { + "bits": {}, + "grid_x": 41, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y92": { + "bits": {}, + "grid_x": 41, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y93": { + "bits": {}, + "grid_x": 41, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y94": { + "bits": {}, + "grid_x": 41, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y95": { + "bits": {}, + "grid_x": 41, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y96": { + "bits": {}, + "grid_x": 41, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y97": { + "bits": {}, + "grid_x": 41, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y98": { + "bits": {}, + "grid_x": 41, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y99": { + "bits": {}, + "grid_x": 41, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y100": { + "bits": {}, + "grid_x": 41, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y101": { + "bits": {}, + "grid_x": 41, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y102": { + "bits": {}, + "grid_x": 41, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X41Y103": { + "bits": {}, + "grid_x": 41, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y1": { + "bits": {}, + "grid_x": 44, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y2": { + "bits": {}, + "grid_x": 44, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y3": { + "bits": {}, + "grid_x": 44, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y4": { + "bits": {}, + "grid_x": 44, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y5": { + "bits": {}, + "grid_x": 44, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y6": { + "bits": {}, + "grid_x": 44, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y7": { + "bits": {}, + "grid_x": 44, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y8": { + "bits": {}, + "grid_x": 44, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y9": { + "bits": {}, + "grid_x": 44, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y10": { + "bits": {}, + "grid_x": 44, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y11": { + "bits": {}, + "grid_x": 44, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y12": { + "bits": {}, + "grid_x": 44, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y13": { + "bits": {}, + "grid_x": 44, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y14": { + "bits": {}, + "grid_x": 44, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y15": { + "bits": {}, + "grid_x": 44, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y16": { + "bits": {}, + "grid_x": 44, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y17": { + "bits": {}, + "grid_x": 44, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y18": { + "bits": {}, + "grid_x": 44, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y19": { + "bits": {}, + "grid_x": 44, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y20": { + "bits": {}, + "grid_x": 44, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y21": { + "bits": {}, + "grid_x": 44, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y22": { + "bits": {}, + "grid_x": 44, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y23": { + "bits": {}, + "grid_x": 44, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y24": { + "bits": {}, + "grid_x": 44, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y25": { + "bits": {}, + "grid_x": 44, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y27": { + "bits": {}, + "grid_x": 44, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y28": { + "bits": {}, + "grid_x": 44, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y29": { + "bits": {}, + "grid_x": 44, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y30": { + "bits": {}, + "grid_x": 44, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y31": { + "bits": {}, + "grid_x": 44, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y32": { + "bits": {}, + "grid_x": 44, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y33": { + "bits": {}, + "grid_x": 44, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y34": { + "bits": {}, + "grid_x": 44, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y35": { + "bits": {}, + "grid_x": 44, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y36": { + "bits": {}, + "grid_x": 44, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y37": { + "bits": {}, + "grid_x": 44, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y38": { + "bits": {}, + "grid_x": 44, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y39": { + "bits": {}, + "grid_x": 44, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y40": { + "bits": {}, + "grid_x": 44, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y41": { + "bits": {}, + "grid_x": 44, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y42": { + "bits": {}, + "grid_x": 44, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y43": { + "bits": {}, + "grid_x": 44, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y44": { + "bits": {}, + "grid_x": 44, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y45": { + "bits": {}, + "grid_x": 44, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y46": { + "bits": {}, + "grid_x": 44, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y47": { + "bits": {}, + "grid_x": 44, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y48": { + "bits": {}, + "grid_x": 44, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y49": { + "bits": {}, + "grid_x": 44, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y50": { + "bits": {}, + "grid_x": 44, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y51": { + "bits": {}, + "grid_x": 44, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y53": { + "bits": {}, + "grid_x": 44, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y54": { + "bits": {}, + "grid_x": 44, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y55": { + "bits": {}, + "grid_x": 44, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y56": { + "bits": {}, + "grid_x": 44, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y57": { + "bits": {}, + "grid_x": 44, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y58": { + "bits": {}, + "grid_x": 44, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y59": { + "bits": {}, + "grid_x": 44, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y60": { + "bits": {}, + "grid_x": 44, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y61": { + "bits": {}, + "grid_x": 44, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y62": { + "bits": {}, + "grid_x": 44, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y63": { + "bits": {}, + "grid_x": 44, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y64": { + "bits": {}, + "grid_x": 44, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y65": { + "bits": {}, + "grid_x": 44, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y66": { + "bits": {}, + "grid_x": 44, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y67": { + "bits": {}, + "grid_x": 44, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y68": { + "bits": {}, + "grid_x": 44, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y69": { + "bits": {}, + "grid_x": 44, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y70": { + "bits": {}, + "grid_x": 44, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y71": { + "bits": {}, + "grid_x": 44, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y72": { + "bits": {}, + "grid_x": 44, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y73": { + "bits": {}, + "grid_x": 44, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y74": { + "bits": {}, + "grid_x": 44, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y75": { + "bits": {}, + "grid_x": 44, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y76": { + "bits": {}, + "grid_x": 44, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y77": { + "bits": {}, + "grid_x": 44, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y79": { + "bits": {}, + "grid_x": 44, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y80": { + "bits": {}, + "grid_x": 44, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y81": { + "bits": {}, + "grid_x": 44, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y82": { + "bits": {}, + "grid_x": 44, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y83": { + "bits": {}, + "grid_x": 44, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y84": { + "bits": {}, + "grid_x": 44, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y85": { + "bits": {}, + "grid_x": 44, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y86": { + "bits": {}, + "grid_x": 44, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y87": { + "bits": {}, + "grid_x": 44, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y88": { + "bits": {}, + "grid_x": 44, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y89": { + "bits": {}, + "grid_x": 44, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y90": { + "bits": {}, + "grid_x": 44, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y91": { + "bits": {}, + "grid_x": 44, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y92": { + "bits": {}, + "grid_x": 44, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y93": { + "bits": {}, + "grid_x": 44, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y94": { + "bits": {}, + "grid_x": 44, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y95": { + "bits": {}, + "grid_x": 44, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y96": { + "bits": {}, + "grid_x": 44, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y97": { + "bits": {}, + "grid_x": 44, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y98": { + "bits": {}, + "grid_x": 44, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y99": { + "bits": {}, + "grid_x": 44, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y100": { + "bits": {}, + "grid_x": 44, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y101": { + "bits": {}, + "grid_x": 44, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y102": { + "bits": {}, + "grid_x": 44, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X44Y103": { + "bits": {}, + "grid_x": 44, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y1": { + "bits": {}, + "grid_x": 45, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y2": { + "bits": {}, + "grid_x": 45, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y3": { + "bits": {}, + "grid_x": 45, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y4": { + "bits": {}, + "grid_x": 45, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y5": { + "bits": {}, + "grid_x": 45, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y6": { + "bits": {}, + "grid_x": 45, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y7": { + "bits": {}, + "grid_x": 45, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y8": { + "bits": {}, + "grid_x": 45, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y9": { + "bits": {}, + "grid_x": 45, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y10": { + "bits": {}, + "grid_x": 45, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y11": { + "bits": {}, + "grid_x": 45, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y12": { + "bits": {}, + "grid_x": 45, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y13": { + "bits": {}, + "grid_x": 45, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y14": { + "bits": {}, + "grid_x": 45, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y15": { + "bits": {}, + "grid_x": 45, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y16": { + "bits": {}, + "grid_x": 45, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y17": { + "bits": {}, + "grid_x": 45, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y18": { + "bits": {}, + "grid_x": 45, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y19": { + "bits": {}, + "grid_x": 45, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y20": { + "bits": {}, + "grid_x": 45, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y21": { + "bits": {}, + "grid_x": 45, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y22": { + "bits": {}, + "grid_x": 45, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y23": { + "bits": {}, + "grid_x": 45, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y24": { + "bits": {}, + "grid_x": 45, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y25": { + "bits": {}, + "grid_x": 45, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y27": { + "bits": {}, + "grid_x": 45, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y28": { + "bits": {}, + "grid_x": 45, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y29": { + "bits": {}, + "grid_x": 45, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y30": { + "bits": {}, + "grid_x": 45, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y31": { + "bits": {}, + "grid_x": 45, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y32": { + "bits": {}, + "grid_x": 45, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y33": { + "bits": {}, + "grid_x": 45, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y34": { + "bits": {}, + "grid_x": 45, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y35": { + "bits": {}, + "grid_x": 45, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y36": { + "bits": {}, + "grid_x": 45, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y37": { + "bits": {}, + "grid_x": 45, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y38": { + "bits": {}, + "grid_x": 45, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y39": { + "bits": {}, + "grid_x": 45, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y40": { + "bits": {}, + "grid_x": 45, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y41": { + "bits": {}, + "grid_x": 45, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y42": { + "bits": {}, + "grid_x": 45, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y43": { + "bits": {}, + "grid_x": 45, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y44": { + "bits": {}, + "grid_x": 45, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y45": { + "bits": {}, + "grid_x": 45, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y46": { + "bits": {}, + "grid_x": 45, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y47": { + "bits": {}, + "grid_x": 45, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y48": { + "bits": {}, + "grid_x": 45, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y49": { + "bits": {}, + "grid_x": 45, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y50": { + "bits": {}, + "grid_x": 45, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y51": { + "bits": {}, + "grid_x": 45, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y53": { + "bits": {}, + "grid_x": 45, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y54": { + "bits": {}, + "grid_x": 45, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y55": { + "bits": {}, + "grid_x": 45, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y56": { + "bits": {}, + "grid_x": 45, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y57": { + "bits": {}, + "grid_x": 45, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y58": { + "bits": {}, + "grid_x": 45, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y59": { + "bits": {}, + "grid_x": 45, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y60": { + "bits": {}, + "grid_x": 45, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y61": { + "bits": {}, + "grid_x": 45, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y62": { + "bits": {}, + "grid_x": 45, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y63": { + "bits": {}, + "grid_x": 45, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y64": { + "bits": {}, + "grid_x": 45, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y65": { + "bits": {}, + "grid_x": 45, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y66": { + "bits": {}, + "grid_x": 45, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y67": { + "bits": {}, + "grid_x": 45, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y68": { + "bits": {}, + "grid_x": 45, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y69": { + "bits": {}, + "grid_x": 45, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y70": { + "bits": {}, + "grid_x": 45, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y71": { + "bits": {}, + "grid_x": 45, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y72": { + "bits": {}, + "grid_x": 45, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y73": { + "bits": {}, + "grid_x": 45, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y74": { + "bits": {}, + "grid_x": 45, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y75": { + "bits": {}, + "grid_x": 45, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y76": { + "bits": {}, + "grid_x": 45, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y77": { + "bits": {}, + "grid_x": 45, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y79": { + "bits": {}, + "grid_x": 45, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y80": { + "bits": {}, + "grid_x": 45, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y81": { + "bits": {}, + "grid_x": 45, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y82": { + "bits": {}, + "grid_x": 45, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y83": { + "bits": {}, + "grid_x": 45, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y84": { + "bits": {}, + "grid_x": 45, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y85": { + "bits": {}, + "grid_x": 45, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y86": { + "bits": {}, + "grid_x": 45, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y87": { + "bits": {}, + "grid_x": 45, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y88": { + "bits": {}, + "grid_x": 45, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y89": { + "bits": {}, + "grid_x": 45, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y90": { + "bits": {}, + "grid_x": 45, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y91": { + "bits": {}, + "grid_x": 45, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y92": { + "bits": {}, + "grid_x": 45, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y93": { + "bits": {}, + "grid_x": 45, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y94": { + "bits": {}, + "grid_x": 45, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y95": { + "bits": {}, + "grid_x": 45, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y96": { + "bits": {}, + "grid_x": 45, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y97": { + "bits": {}, + "grid_x": 45, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y98": { + "bits": {}, + "grid_x": 45, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y99": { + "bits": {}, + "grid_x": 45, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y100": { + "bits": {}, + "grid_x": 45, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y101": { + "bits": {}, + "grid_x": 45, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y102": { + "bits": {}, + "grid_x": 45, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_FEEDTHRU_2_X45Y103": { + "bits": {}, + "grid_x": 45, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_FEEDTHRU_2" + }, + "INT_INTERFACE_L_X18Y0": { + "bits": {}, + "grid_x": 48, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y1": { + "bits": {}, + "grid_x": 48, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y2": { + "bits": {}, + "grid_x": 48, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y3": { + "bits": {}, + "grid_x": 48, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y4": { + "bits": {}, + "grid_x": 48, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y5": { + "bits": {}, + "grid_x": 48, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y6": { + "bits": {}, + "grid_x": 48, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y7": { + "bits": {}, + "grid_x": 48, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y8": { + "bits": {}, + "grid_x": 48, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y9": { + "bits": {}, + "grid_x": 48, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y10": { + "bits": {}, + "grid_x": 48, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y11": { + "bits": {}, + "grid_x": 48, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y12": { + "bits": {}, + "grid_x": 48, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y13": { + "bits": {}, + "grid_x": 48, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y14": { + "bits": {}, + "grid_x": 48, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y15": { + "bits": {}, + "grid_x": 48, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y16": { + "bits": {}, + "grid_x": 48, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y17": { + "bits": {}, + "grid_x": 48, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y18": { + "bits": {}, + "grid_x": 48, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y19": { + "bits": {}, + "grid_x": 48, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y20": { + "bits": {}, + "grid_x": 48, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y21": { + "bits": {}, + "grid_x": 48, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y22": { + "bits": {}, + "grid_x": 48, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y23": { + "bits": {}, + "grid_x": 48, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y24": { + "bits": {}, + "grid_x": 48, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y25": { + "bits": {}, + "grid_x": 48, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y26": { + "bits": {}, + "grid_x": 48, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y27": { + "bits": {}, + "grid_x": 48, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y28": { + "bits": {}, + "grid_x": 48, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y29": { + "bits": {}, + "grid_x": 48, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y30": { + "bits": {}, + "grid_x": 48, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y31": { + "bits": {}, + "grid_x": 48, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y32": { + "bits": {}, + "grid_x": 48, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y33": { + "bits": {}, + "grid_x": 48, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y34": { + "bits": {}, + "grid_x": 48, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y35": { + "bits": {}, + "grid_x": 48, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y36": { + "bits": {}, + "grid_x": 48, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y37": { + "bits": {}, + "grid_x": 48, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y38": { + "bits": {}, + "grid_x": 48, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y39": { + "bits": {}, + "grid_x": 48, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y40": { + "bits": {}, + "grid_x": 48, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y41": { + "bits": {}, + "grid_x": 48, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y42": { + "bits": {}, + "grid_x": 48, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y43": { + "bits": {}, + "grid_x": 48, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y44": { + "bits": {}, + "grid_x": 48, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y45": { + "bits": {}, + "grid_x": 48, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y46": { + "bits": {}, + "grid_x": 48, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y47": { + "bits": {}, + "grid_x": 48, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y48": { + "bits": {}, + "grid_x": 48, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y49": { + "bits": {}, + "grid_x": 48, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y50": { + "bits": {}, + "grid_x": 48, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y51": { + "bits": {}, + "grid_x": 48, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y52": { + "bits": {}, + "grid_x": 48, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y53": { + "bits": {}, + "grid_x": 48, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y54": { + "bits": {}, + "grid_x": 48, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y55": { + "bits": {}, + "grid_x": 48, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y56": { + "bits": {}, + "grid_x": 48, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y57": { + "bits": {}, + "grid_x": 48, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y58": { + "bits": {}, + "grid_x": 48, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y59": { + "bits": {}, + "grid_x": 48, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y60": { + "bits": {}, + "grid_x": 48, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y61": { + "bits": {}, + "grid_x": 48, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y62": { + "bits": {}, + "grid_x": 48, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y63": { + "bits": {}, + "grid_x": 48, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y64": { + "bits": {}, + "grid_x": 48, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y65": { + "bits": {}, + "grid_x": 48, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y66": { + "bits": {}, + "grid_x": 48, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y67": { + "bits": {}, + "grid_x": 48, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y68": { + "bits": {}, + "grid_x": 48, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y69": { + "bits": {}, + "grid_x": 48, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y70": { + "bits": {}, + "grid_x": 48, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y71": { + "bits": {}, + "grid_x": 48, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y72": { + "bits": {}, + "grid_x": 48, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y73": { + "bits": {}, + "grid_x": 48, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y74": { + "bits": {}, + "grid_x": 48, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y75": { + "bits": {}, + "grid_x": 48, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y76": { + "bits": {}, + "grid_x": 48, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y77": { + "bits": {}, + "grid_x": 48, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y78": { + "bits": {}, + "grid_x": 48, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y79": { + "bits": {}, + "grid_x": 48, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y80": { + "bits": {}, + "grid_x": 48, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y81": { + "bits": {}, + "grid_x": 48, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y82": { + "bits": {}, + "grid_x": 48, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y83": { + "bits": {}, + "grid_x": 48, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y84": { + "bits": {}, + "grid_x": 48, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y85": { + "bits": {}, + "grid_x": 48, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y86": { + "bits": {}, + "grid_x": 48, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y87": { + "bits": {}, + "grid_x": 48, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y88": { + "bits": {}, + "grid_x": 48, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y89": { + "bits": {}, + "grid_x": 48, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y90": { + "bits": {}, + "grid_x": 48, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y91": { + "bits": {}, + "grid_x": 48, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y92": { + "bits": {}, + "grid_x": 48, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y93": { + "bits": {}, + "grid_x": 48, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y94": { + "bits": {}, + "grid_x": 48, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y95": { + "bits": {}, + "grid_x": 48, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y96": { + "bits": {}, + "grid_x": 48, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y97": { + "bits": {}, + "grid_x": 48, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y98": { + "bits": {}, + "grid_x": 48, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y99": { + "bits": {}, + "grid_x": 48, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y100": { + "bits": {}, + "grid_x": 48, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y101": { + "bits": {}, + "grid_x": 48, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y102": { + "bits": {}, + "grid_x": 48, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y103": { + "bits": {}, + "grid_x": 48, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y104": { + "bits": {}, + "grid_x": 48, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y105": { + "bits": {}, + "grid_x": 48, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y106": { + "bits": {}, + "grid_x": 48, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y107": { + "bits": {}, + "grid_x": 48, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y108": { + "bits": {}, + "grid_x": 48, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y109": { + "bits": {}, + "grid_x": 48, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y110": { + "bits": {}, + "grid_x": 48, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y111": { + "bits": {}, + "grid_x": 48, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y112": { + "bits": {}, + "grid_x": 48, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y113": { + "bits": {}, + "grid_x": 48, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y114": { + "bits": {}, + "grid_x": 48, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y115": { + "bits": {}, + "grid_x": 48, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y116": { + "bits": {}, + "grid_x": 48, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y117": { + "bits": {}, + "grid_x": 48, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y118": { + "bits": {}, + "grid_x": 48, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y119": { + "bits": {}, + "grid_x": 48, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y120": { + "bits": {}, + "grid_x": 48, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y121": { + "bits": {}, + "grid_x": 48, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y122": { + "bits": {}, + "grid_x": 48, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y123": { + "bits": {}, + "grid_x": 48, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y124": { + "bits": {}, + "grid_x": 48, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y125": { + "bits": {}, + "grid_x": 48, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y126": { + "bits": {}, + "grid_x": 48, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y127": { + "bits": {}, + "grid_x": 48, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y128": { + "bits": {}, + "grid_x": 48, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y129": { + "bits": {}, + "grid_x": 48, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y130": { + "bits": {}, + "grid_x": 48, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y131": { + "bits": {}, + "grid_x": 48, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y132": { + "bits": {}, + "grid_x": 48, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y133": { + "bits": {}, + "grid_x": 48, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y134": { + "bits": {}, + "grid_x": 48, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y135": { + "bits": {}, + "grid_x": 48, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y136": { + "bits": {}, + "grid_x": 48, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y137": { + "bits": {}, + "grid_x": 48, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y138": { + "bits": {}, + "grid_x": 48, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y139": { + "bits": {}, + "grid_x": 48, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y140": { + "bits": {}, + "grid_x": 48, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y141": { + "bits": {}, + "grid_x": 48, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y142": { + "bits": {}, + "grid_x": 48, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y143": { + "bits": {}, + "grid_x": 48, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y144": { + "bits": {}, + "grid_x": 48, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y145": { + "bits": {}, + "grid_x": 48, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y146": { + "bits": {}, + "grid_x": 48, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y147": { + "bits": {}, + "grid_x": 48, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y148": { + "bits": {}, + "grid_x": 48, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X18Y149": { + "bits": {}, + "grid_x": 48, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y0": { + "bits": {}, + "grid_x": 87, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y1": { + "bits": {}, + "grid_x": 87, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y2": { + "bits": {}, + "grid_x": 87, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y3": { + "bits": {}, + "grid_x": 87, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y4": { + "bits": {}, + "grid_x": 87, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y5": { + "bits": {}, + "grid_x": 87, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y6": { + "bits": {}, + "grid_x": 87, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y7": { + "bits": {}, + "grid_x": 87, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y8": { + "bits": {}, + "grid_x": 87, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y9": { + "bits": {}, + "grid_x": 87, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y10": { + "bits": {}, + "grid_x": 87, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y11": { + "bits": {}, + "grid_x": 87, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y12": { + "bits": {}, + "grid_x": 87, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y13": { + "bits": {}, + "grid_x": 87, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y14": { + "bits": {}, + "grid_x": 87, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y15": { + "bits": {}, + "grid_x": 87, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y16": { + "bits": {}, + "grid_x": 87, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y17": { + "bits": {}, + "grid_x": 87, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y18": { + "bits": {}, + "grid_x": 87, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y19": { + "bits": {}, + "grid_x": 87, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y20": { + "bits": {}, + "grid_x": 87, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y21": { + "bits": {}, + "grid_x": 87, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y22": { + "bits": {}, + "grid_x": 87, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y23": { + "bits": {}, + "grid_x": 87, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y24": { + "bits": {}, + "grid_x": 87, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y25": { + "bits": {}, + "grid_x": 87, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y26": { + "bits": {}, + "grid_x": 87, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y27": { + "bits": {}, + "grid_x": 87, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y28": { + "bits": {}, + "grid_x": 87, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y29": { + "bits": {}, + "grid_x": 87, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y30": { + "bits": {}, + "grid_x": 87, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y31": { + "bits": {}, + "grid_x": 87, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y32": { + "bits": {}, + "grid_x": 87, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y33": { + "bits": {}, + "grid_x": 87, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y34": { + "bits": {}, + "grid_x": 87, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y35": { + "bits": {}, + "grid_x": 87, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y36": { + "bits": {}, + "grid_x": 87, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y37": { + "bits": {}, + "grid_x": 87, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y38": { + "bits": {}, + "grid_x": 87, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y39": { + "bits": {}, + "grid_x": 87, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y40": { + "bits": {}, + "grid_x": 87, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y41": { + "bits": {}, + "grid_x": 87, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y42": { + "bits": {}, + "grid_x": 87, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y43": { + "bits": {}, + "grid_x": 87, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y44": { + "bits": {}, + "grid_x": 87, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y45": { + "bits": {}, + "grid_x": 87, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y46": { + "bits": {}, + "grid_x": 87, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y47": { + "bits": {}, + "grid_x": 87, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y48": { + "bits": {}, + "grid_x": 87, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y49": { + "bits": {}, + "grid_x": 87, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y50": { + "bits": {}, + "grid_x": 87, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y51": { + "bits": {}, + "grid_x": 87, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y52": { + "bits": {}, + "grid_x": 87, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y53": { + "bits": {}, + "grid_x": 87, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y54": { + "bits": {}, + "grid_x": 87, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y55": { + "bits": {}, + "grid_x": 87, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y56": { + "bits": {}, + "grid_x": 87, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y57": { + "bits": {}, + "grid_x": 87, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y58": { + "bits": {}, + "grid_x": 87, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y59": { + "bits": {}, + "grid_x": 87, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y60": { + "bits": {}, + "grid_x": 87, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y61": { + "bits": {}, + "grid_x": 87, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y62": { + "bits": {}, + "grid_x": 87, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y63": { + "bits": {}, + "grid_x": 87, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y64": { + "bits": {}, + "grid_x": 87, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y65": { + "bits": {}, + "grid_x": 87, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y66": { + "bits": {}, + "grid_x": 87, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y67": { + "bits": {}, + "grid_x": 87, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y68": { + "bits": {}, + "grid_x": 87, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y69": { + "bits": {}, + "grid_x": 87, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y70": { + "bits": {}, + "grid_x": 87, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y71": { + "bits": {}, + "grid_x": 87, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y72": { + "bits": {}, + "grid_x": 87, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y73": { + "bits": {}, + "grid_x": 87, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y74": { + "bits": {}, + "grid_x": 87, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y75": { + "bits": {}, + "grid_x": 87, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y76": { + "bits": {}, + "grid_x": 87, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y77": { + "bits": {}, + "grid_x": 87, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y78": { + "bits": {}, + "grid_x": 87, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y79": { + "bits": {}, + "grid_x": 87, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y80": { + "bits": {}, + "grid_x": 87, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y81": { + "bits": {}, + "grid_x": 87, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y82": { + "bits": {}, + "grid_x": 87, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y83": { + "bits": {}, + "grid_x": 87, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y84": { + "bits": {}, + "grid_x": 87, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y85": { + "bits": {}, + "grid_x": 87, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y86": { + "bits": {}, + "grid_x": 87, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y87": { + "bits": {}, + "grid_x": 87, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y88": { + "bits": {}, + "grid_x": 87, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y89": { + "bits": {}, + "grid_x": 87, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y90": { + "bits": {}, + "grid_x": 87, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y91": { + "bits": {}, + "grid_x": 87, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y92": { + "bits": {}, + "grid_x": 87, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y93": { + "bits": {}, + "grid_x": 87, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y94": { + "bits": {}, + "grid_x": 87, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y95": { + "bits": {}, + "grid_x": 87, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y96": { + "bits": {}, + "grid_x": 87, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y97": { + "bits": {}, + "grid_x": 87, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y98": { + "bits": {}, + "grid_x": 87, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y99": { + "bits": {}, + "grid_x": 87, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y100": { + "bits": {}, + "grid_x": 87, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y101": { + "bits": {}, + "grid_x": 87, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y102": { + "bits": {}, + "grid_x": 87, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y103": { + "bits": {}, + "grid_x": 87, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y104": { + "bits": {}, + "grid_x": 87, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y105": { + "bits": {}, + "grid_x": 87, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y106": { + "bits": {}, + "grid_x": 87, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y107": { + "bits": {}, + "grid_x": 87, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y108": { + "bits": {}, + "grid_x": 87, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y109": { + "bits": {}, + "grid_x": 87, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y110": { + "bits": {}, + "grid_x": 87, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y111": { + "bits": {}, + "grid_x": 87, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y112": { + "bits": {}, + "grid_x": 87, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y113": { + "bits": {}, + "grid_x": 87, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y114": { + "bits": {}, + "grid_x": 87, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y115": { + "bits": {}, + "grid_x": 87, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y116": { + "bits": {}, + "grid_x": 87, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y117": { + "bits": {}, + "grid_x": 87, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y118": { + "bits": {}, + "grid_x": 87, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y119": { + "bits": {}, + "grid_x": 87, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y120": { + "bits": {}, + "grid_x": 87, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y121": { + "bits": {}, + "grid_x": 87, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y122": { + "bits": {}, + "grid_x": 87, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y123": { + "bits": {}, + "grid_x": 87, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y124": { + "bits": {}, + "grid_x": 87, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y125": { + "bits": {}, + "grid_x": 87, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y126": { + "bits": {}, + "grid_x": 87, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y127": { + "bits": {}, + "grid_x": 87, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y128": { + "bits": {}, + "grid_x": 87, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y129": { + "bits": {}, + "grid_x": 87, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y130": { + "bits": {}, + "grid_x": 87, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y131": { + "bits": {}, + "grid_x": 87, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y132": { + "bits": {}, + "grid_x": 87, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y133": { + "bits": {}, + "grid_x": 87, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y134": { + "bits": {}, + "grid_x": 87, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y135": { + "bits": {}, + "grid_x": 87, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y136": { + "bits": {}, + "grid_x": 87, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y137": { + "bits": {}, + "grid_x": 87, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y138": { + "bits": {}, + "grid_x": 87, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y139": { + "bits": {}, + "grid_x": 87, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y140": { + "bits": {}, + "grid_x": 87, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y141": { + "bits": {}, + "grid_x": 87, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y142": { + "bits": {}, + "grid_x": 87, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y143": { + "bits": {}, + "grid_x": 87, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y144": { + "bits": {}, + "grid_x": 87, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y145": { + "bits": {}, + "grid_x": 87, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y146": { + "bits": {}, + "grid_x": 87, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y147": { + "bits": {}, + "grid_x": 87, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y148": { + "bits": {}, + "grid_x": 87, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X34Y149": { + "bits": {}, + "grid_x": 87, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y0": { + "bits": {}, + "grid_x": 108, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y1": { + "bits": {}, + "grid_x": 108, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y2": { + "bits": {}, + "grid_x": 108, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y3": { + "bits": {}, + "grid_x": 108, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y4": { + "bits": {}, + "grid_x": 108, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y5": { + "bits": {}, + "grid_x": 108, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y6": { + "bits": {}, + "grid_x": 108, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y7": { + "bits": {}, + "grid_x": 108, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y8": { + "bits": {}, + "grid_x": 108, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y9": { + "bits": {}, + "grid_x": 108, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y10": { + "bits": {}, + "grid_x": 108, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y11": { + "bits": {}, + "grid_x": 108, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y12": { + "bits": {}, + "grid_x": 108, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y13": { + "bits": {}, + "grid_x": 108, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y14": { + "bits": {}, + "grid_x": 108, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y15": { + "bits": {}, + "grid_x": 108, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y16": { + "bits": {}, + "grid_x": 108, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y17": { + "bits": {}, + "grid_x": 108, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y18": { + "bits": {}, + "grid_x": 108, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y19": { + "bits": {}, + "grid_x": 108, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y20": { + "bits": {}, + "grid_x": 108, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y21": { + "bits": {}, + "grid_x": 108, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y22": { + "bits": {}, + "grid_x": 108, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y23": { + "bits": {}, + "grid_x": 108, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y24": { + "bits": {}, + "grid_x": 108, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y25": { + "bits": {}, + "grid_x": 108, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y26": { + "bits": {}, + "grid_x": 108, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y27": { + "bits": {}, + "grid_x": 108, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y28": { + "bits": {}, + "grid_x": 108, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y29": { + "bits": {}, + "grid_x": 108, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y30": { + "bits": {}, + "grid_x": 108, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y31": { + "bits": {}, + "grid_x": 108, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y32": { + "bits": {}, + "grid_x": 108, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y33": { + "bits": {}, + "grid_x": 108, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y34": { + "bits": {}, + "grid_x": 108, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y35": { + "bits": {}, + "grid_x": 108, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y36": { + "bits": {}, + "grid_x": 108, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y37": { + "bits": {}, + "grid_x": 108, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y38": { + "bits": {}, + "grid_x": 108, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y39": { + "bits": {}, + "grid_x": 108, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y40": { + "bits": {}, + "grid_x": 108, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y41": { + "bits": {}, + "grid_x": 108, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y42": { + "bits": {}, + "grid_x": 108, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y43": { + "bits": {}, + "grid_x": 108, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y44": { + "bits": {}, + "grid_x": 108, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y45": { + "bits": {}, + "grid_x": 108, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y46": { + "bits": {}, + "grid_x": 108, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y47": { + "bits": {}, + "grid_x": 108, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y48": { + "bits": {}, + "grid_x": 108, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y49": { + "bits": {}, + "grid_x": 108, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y50": { + "bits": {}, + "grid_x": 108, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y51": { + "bits": {}, + "grid_x": 108, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y52": { + "bits": {}, + "grid_x": 108, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y53": { + "bits": {}, + "grid_x": 108, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y54": { + "bits": {}, + "grid_x": 108, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y55": { + "bits": {}, + "grid_x": 108, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y56": { + "bits": {}, + "grid_x": 108, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y57": { + "bits": {}, + "grid_x": 108, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y58": { + "bits": {}, + "grid_x": 108, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y59": { + "bits": {}, + "grid_x": 108, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y60": { + "bits": {}, + "grid_x": 108, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y61": { + "bits": {}, + "grid_x": 108, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y62": { + "bits": {}, + "grid_x": 108, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y63": { + "bits": {}, + "grid_x": 108, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y64": { + "bits": {}, + "grid_x": 108, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y65": { + "bits": {}, + "grid_x": 108, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y66": { + "bits": {}, + "grid_x": 108, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y67": { + "bits": {}, + "grid_x": 108, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y68": { + "bits": {}, + "grid_x": 108, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y69": { + "bits": {}, + "grid_x": 108, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y70": { + "bits": {}, + "grid_x": 108, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y71": { + "bits": {}, + "grid_x": 108, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y72": { + "bits": {}, + "grid_x": 108, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y73": { + "bits": {}, + "grid_x": 108, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y74": { + "bits": {}, + "grid_x": 108, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y75": { + "bits": {}, + "grid_x": 108, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y76": { + "bits": {}, + "grid_x": 108, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y77": { + "bits": {}, + "grid_x": 108, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y78": { + "bits": {}, + "grid_x": 108, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y79": { + "bits": {}, + "grid_x": 108, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y80": { + "bits": {}, + "grid_x": 108, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y81": { + "bits": {}, + "grid_x": 108, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y82": { + "bits": {}, + "grid_x": 108, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y83": { + "bits": {}, + "grid_x": 108, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y84": { + "bits": {}, + "grid_x": 108, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y85": { + "bits": {}, + "grid_x": 108, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y86": { + "bits": {}, + "grid_x": 108, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y87": { + "bits": {}, + "grid_x": 108, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y88": { + "bits": {}, + "grid_x": 108, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y89": { + "bits": {}, + "grid_x": 108, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y90": { + "bits": {}, + "grid_x": 108, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y91": { + "bits": {}, + "grid_x": 108, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y92": { + "bits": {}, + "grid_x": 108, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y93": { + "bits": {}, + "grid_x": 108, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y94": { + "bits": {}, + "grid_x": 108, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y95": { + "bits": {}, + "grid_x": 108, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y96": { + "bits": {}, + "grid_x": 108, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y97": { + "bits": {}, + "grid_x": 108, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y98": { + "bits": {}, + "grid_x": 108, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_L_X42Y99": { + "bits": {}, + "grid_x": 108, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_L" + }, + "INT_INTERFACE_R_X1Y0": { + "bits": {}, + "grid_x": 6, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y1": { + "bits": {}, + "grid_x": 6, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y2": { + "bits": {}, + "grid_x": 6, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y3": { + "bits": {}, + "grid_x": 6, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y4": { + "bits": {}, + "grid_x": 6, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y5": { + "bits": {}, + "grid_x": 6, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y6": { + "bits": {}, + "grid_x": 6, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y7": { + "bits": {}, + "grid_x": 6, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y8": { + "bits": {}, + "grid_x": 6, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y9": { + "bits": {}, + "grid_x": 6, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y10": { + "bits": {}, + "grid_x": 6, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y11": { + "bits": {}, + "grid_x": 6, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y12": { + "bits": {}, + "grid_x": 6, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y13": { + "bits": {}, + "grid_x": 6, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y14": { + "bits": {}, + "grid_x": 6, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y15": { + "bits": {}, + "grid_x": 6, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y16": { + "bits": {}, + "grid_x": 6, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y17": { + "bits": {}, + "grid_x": 6, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y18": { + "bits": {}, + "grid_x": 6, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y19": { + "bits": {}, + "grid_x": 6, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y20": { + "bits": {}, + "grid_x": 6, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y21": { + "bits": {}, + "grid_x": 6, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y22": { + "bits": {}, + "grid_x": 6, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y23": { + "bits": {}, + "grid_x": 6, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y24": { + "bits": {}, + "grid_x": 6, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y25": { + "bits": {}, + "grid_x": 6, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y26": { + "bits": {}, + "grid_x": 6, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y27": { + "bits": {}, + "grid_x": 6, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y28": { + "bits": {}, + "grid_x": 6, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y29": { + "bits": {}, + "grid_x": 6, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y30": { + "bits": {}, + "grid_x": 6, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y31": { + "bits": {}, + "grid_x": 6, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y32": { + "bits": {}, + "grid_x": 6, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y33": { + "bits": {}, + "grid_x": 6, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y34": { + "bits": {}, + "grid_x": 6, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y35": { + "bits": {}, + "grid_x": 6, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y36": { + "bits": {}, + "grid_x": 6, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y37": { + "bits": {}, + "grid_x": 6, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y38": { + "bits": {}, + "grid_x": 6, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y39": { + "bits": {}, + "grid_x": 6, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y40": { + "bits": {}, + "grid_x": 6, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y41": { + "bits": {}, + "grid_x": 6, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y42": { + "bits": {}, + "grid_x": 6, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y43": { + "bits": {}, + "grid_x": 6, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y44": { + "bits": {}, + "grid_x": 6, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y45": { + "bits": {}, + "grid_x": 6, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y46": { + "bits": {}, + "grid_x": 6, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y47": { + "bits": {}, + "grid_x": 6, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y48": { + "bits": {}, + "grid_x": 6, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y49": { + "bits": {}, + "grid_x": 6, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y50": { + "bits": {}, + "grid_x": 6, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y51": { + "bits": {}, + "grid_x": 6, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y52": { + "bits": {}, + "grid_x": 6, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y53": { + "bits": {}, + "grid_x": 6, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y54": { + "bits": {}, + "grid_x": 6, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y55": { + "bits": {}, + "grid_x": 6, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y56": { + "bits": {}, + "grid_x": 6, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y57": { + "bits": {}, + "grid_x": 6, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y58": { + "bits": {}, + "grid_x": 6, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y59": { + "bits": {}, + "grid_x": 6, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y60": { + "bits": {}, + "grid_x": 6, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y61": { + "bits": {}, + "grid_x": 6, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y62": { + "bits": {}, + "grid_x": 6, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y63": { + "bits": {}, + "grid_x": 6, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y64": { + "bits": {}, + "grid_x": 6, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y65": { + "bits": {}, + "grid_x": 6, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y66": { + "bits": {}, + "grid_x": 6, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y67": { + "bits": {}, + "grid_x": 6, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y68": { + "bits": {}, + "grid_x": 6, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y69": { + "bits": {}, + "grid_x": 6, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y70": { + "bits": {}, + "grid_x": 6, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y71": { + "bits": {}, + "grid_x": 6, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y72": { + "bits": {}, + "grid_x": 6, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y73": { + "bits": {}, + "grid_x": 6, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y74": { + "bits": {}, + "grid_x": 6, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y75": { + "bits": {}, + "grid_x": 6, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y76": { + "bits": {}, + "grid_x": 6, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y77": { + "bits": {}, + "grid_x": 6, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y78": { + "bits": {}, + "grid_x": 6, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y79": { + "bits": {}, + "grid_x": 6, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y80": { + "bits": {}, + "grid_x": 6, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y81": { + "bits": {}, + "grid_x": 6, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y82": { + "bits": {}, + "grid_x": 6, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y83": { + "bits": {}, + "grid_x": 6, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y84": { + "bits": {}, + "grid_x": 6, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y85": { + "bits": {}, + "grid_x": 6, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y86": { + "bits": {}, + "grid_x": 6, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y87": { + "bits": {}, + "grid_x": 6, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y88": { + "bits": {}, + "grid_x": 6, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y89": { + "bits": {}, + "grid_x": 6, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y90": { + "bits": {}, + "grid_x": 6, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y91": { + "bits": {}, + "grid_x": 6, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y92": { + "bits": {}, + "grid_x": 6, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y93": { + "bits": {}, + "grid_x": 6, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y94": { + "bits": {}, + "grid_x": 6, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y95": { + "bits": {}, + "grid_x": 6, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y96": { + "bits": {}, + "grid_x": 6, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y97": { + "bits": {}, + "grid_x": 6, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y98": { + "bits": {}, + "grid_x": 6, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y99": { + "bits": {}, + "grid_x": 6, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y100": { + "bits": {}, + "grid_x": 6, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y101": { + "bits": {}, + "grid_x": 6, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y102": { + "bits": {}, + "grid_x": 6, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y103": { + "bits": {}, + "grid_x": 6, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y104": { + "bits": {}, + "grid_x": 6, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y105": { + "bits": {}, + "grid_x": 6, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y106": { + "bits": {}, + "grid_x": 6, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y107": { + "bits": {}, + "grid_x": 6, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y108": { + "bits": {}, + "grid_x": 6, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y109": { + "bits": {}, + "grid_x": 6, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y110": { + "bits": {}, + "grid_x": 6, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y111": { + "bits": {}, + "grid_x": 6, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y112": { + "bits": {}, + "grid_x": 6, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y113": { + "bits": {}, + "grid_x": 6, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y114": { + "bits": {}, + "grid_x": 6, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y115": { + "bits": {}, + "grid_x": 6, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y116": { + "bits": {}, + "grid_x": 6, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y117": { + "bits": {}, + "grid_x": 6, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y118": { + "bits": {}, + "grid_x": 6, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y119": { + "bits": {}, + "grid_x": 6, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y120": { + "bits": {}, + "grid_x": 6, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y121": { + "bits": {}, + "grid_x": 6, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y122": { + "bits": {}, + "grid_x": 6, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y123": { + "bits": {}, + "grid_x": 6, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y124": { + "bits": {}, + "grid_x": 6, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y125": { + "bits": {}, + "grid_x": 6, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y126": { + "bits": {}, + "grid_x": 6, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y127": { + "bits": {}, + "grid_x": 6, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y128": { + "bits": {}, + "grid_x": 6, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y129": { + "bits": {}, + "grid_x": 6, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y130": { + "bits": {}, + "grid_x": 6, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y131": { + "bits": {}, + "grid_x": 6, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y132": { + "bits": {}, + "grid_x": 6, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y133": { + "bits": {}, + "grid_x": 6, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y134": { + "bits": {}, + "grid_x": 6, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y135": { + "bits": {}, + "grid_x": 6, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y136": { + "bits": {}, + "grid_x": 6, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y137": { + "bits": {}, + "grid_x": 6, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y138": { + "bits": {}, + "grid_x": 6, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y139": { + "bits": {}, + "grid_x": 6, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y140": { + "bits": {}, + "grid_x": 6, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y141": { + "bits": {}, + "grid_x": 6, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y142": { + "bits": {}, + "grid_x": 6, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y143": { + "bits": {}, + "grid_x": 6, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y144": { + "bits": {}, + "grid_x": 6, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y145": { + "bits": {}, + "grid_x": 6, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y146": { + "bits": {}, + "grid_x": 6, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y147": { + "bits": {}, + "grid_x": 6, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y148": { + "bits": {}, + "grid_x": 6, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X1Y149": { + "bits": {}, + "grid_x": 6, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y0": { + "bits": {}, + "grid_x": 27, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y1": { + "bits": {}, + "grid_x": 27, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y2": { + "bits": {}, + "grid_x": 27, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y3": { + "bits": {}, + "grid_x": 27, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y4": { + "bits": {}, + "grid_x": 27, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y5": { + "bits": {}, + "grid_x": 27, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y6": { + "bits": {}, + "grid_x": 27, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y7": { + "bits": {}, + "grid_x": 27, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y8": { + "bits": {}, + "grid_x": 27, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y9": { + "bits": {}, + "grid_x": 27, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y10": { + "bits": {}, + "grid_x": 27, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y11": { + "bits": {}, + "grid_x": 27, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y12": { + "bits": {}, + "grid_x": 27, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y13": { + "bits": {}, + "grid_x": 27, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y14": { + "bits": {}, + "grid_x": 27, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y15": { + "bits": {}, + "grid_x": 27, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y16": { + "bits": {}, + "grid_x": 27, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y17": { + "bits": {}, + "grid_x": 27, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y18": { + "bits": {}, + "grid_x": 27, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y19": { + "bits": {}, + "grid_x": 27, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y20": { + "bits": {}, + "grid_x": 27, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y21": { + "bits": {}, + "grid_x": 27, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y22": { + "bits": {}, + "grid_x": 27, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y23": { + "bits": {}, + "grid_x": 27, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y24": { + "bits": {}, + "grid_x": 27, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y25": { + "bits": {}, + "grid_x": 27, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y26": { + "bits": {}, + "grid_x": 27, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y27": { + "bits": {}, + "grid_x": 27, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y28": { + "bits": {}, + "grid_x": 27, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y29": { + "bits": {}, + "grid_x": 27, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y30": { + "bits": {}, + "grid_x": 27, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y31": { + "bits": {}, + "grid_x": 27, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y32": { + "bits": {}, + "grid_x": 27, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y33": { + "bits": {}, + "grid_x": 27, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y34": { + "bits": {}, + "grid_x": 27, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y35": { + "bits": {}, + "grid_x": 27, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y36": { + "bits": {}, + "grid_x": 27, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y37": { + "bits": {}, + "grid_x": 27, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y38": { + "bits": {}, + "grid_x": 27, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y39": { + "bits": {}, + "grid_x": 27, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y40": { + "bits": {}, + "grid_x": 27, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y41": { + "bits": {}, + "grid_x": 27, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y42": { + "bits": {}, + "grid_x": 27, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y43": { + "bits": {}, + "grid_x": 27, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y44": { + "bits": {}, + "grid_x": 27, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y45": { + "bits": {}, + "grid_x": 27, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y46": { + "bits": {}, + "grid_x": 27, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y47": { + "bits": {}, + "grid_x": 27, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y48": { + "bits": {}, + "grid_x": 27, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y49": { + "bits": {}, + "grid_x": 27, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y50": { + "bits": {}, + "grid_x": 27, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y51": { + "bits": {}, + "grid_x": 27, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y52": { + "bits": {}, + "grid_x": 27, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y53": { + "bits": {}, + "grid_x": 27, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y54": { + "bits": {}, + "grid_x": 27, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y55": { + "bits": {}, + "grid_x": 27, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y56": { + "bits": {}, + "grid_x": 27, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y57": { + "bits": {}, + "grid_x": 27, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y58": { + "bits": {}, + "grid_x": 27, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y59": { + "bits": {}, + "grid_x": 27, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y60": { + "bits": {}, + "grid_x": 27, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y61": { + "bits": {}, + "grid_x": 27, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y62": { + "bits": {}, + "grid_x": 27, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y63": { + "bits": {}, + "grid_x": 27, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y64": { + "bits": {}, + "grid_x": 27, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y65": { + "bits": {}, + "grid_x": 27, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y66": { + "bits": {}, + "grid_x": 27, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y67": { + "bits": {}, + "grid_x": 27, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y68": { + "bits": {}, + "grid_x": 27, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y69": { + "bits": {}, + "grid_x": 27, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y70": { + "bits": {}, + "grid_x": 27, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y71": { + "bits": {}, + "grid_x": 27, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y72": { + "bits": {}, + "grid_x": 27, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y73": { + "bits": {}, + "grid_x": 27, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y74": { + "bits": {}, + "grid_x": 27, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y75": { + "bits": {}, + "grid_x": 27, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y76": { + "bits": {}, + "grid_x": 27, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y77": { + "bits": {}, + "grid_x": 27, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y78": { + "bits": {}, + "grid_x": 27, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y79": { + "bits": {}, + "grid_x": 27, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y80": { + "bits": {}, + "grid_x": 27, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y81": { + "bits": {}, + "grid_x": 27, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y82": { + "bits": {}, + "grid_x": 27, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y83": { + "bits": {}, + "grid_x": 27, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y84": { + "bits": {}, + "grid_x": 27, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y85": { + "bits": {}, + "grid_x": 27, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y86": { + "bits": {}, + "grid_x": 27, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y87": { + "bits": {}, + "grid_x": 27, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y88": { + "bits": {}, + "grid_x": 27, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y89": { + "bits": {}, + "grid_x": 27, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y90": { + "bits": {}, + "grid_x": 27, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y91": { + "bits": {}, + "grid_x": 27, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y92": { + "bits": {}, + "grid_x": 27, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y93": { + "bits": {}, + "grid_x": 27, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y94": { + "bits": {}, + "grid_x": 27, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y95": { + "bits": {}, + "grid_x": 27, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y96": { + "bits": {}, + "grid_x": 27, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y97": { + "bits": {}, + "grid_x": 27, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y98": { + "bits": {}, + "grid_x": 27, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y99": { + "bits": {}, + "grid_x": 27, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y100": { + "bits": {}, + "grid_x": 27, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y101": { + "bits": {}, + "grid_x": 27, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y102": { + "bits": {}, + "grid_x": 27, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y103": { + "bits": {}, + "grid_x": 27, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y104": { + "bits": {}, + "grid_x": 27, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y105": { + "bits": {}, + "grid_x": 27, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y106": { + "bits": {}, + "grid_x": 27, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y107": { + "bits": {}, + "grid_x": 27, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y108": { + "bits": {}, + "grid_x": 27, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y109": { + "bits": {}, + "grid_x": 27, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y110": { + "bits": {}, + "grid_x": 27, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y111": { + "bits": {}, + "grid_x": 27, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y112": { + "bits": {}, + "grid_x": 27, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y113": { + "bits": {}, + "grid_x": 27, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y114": { + "bits": {}, + "grid_x": 27, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y115": { + "bits": {}, + "grid_x": 27, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y116": { + "bits": {}, + "grid_x": 27, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y117": { + "bits": {}, + "grid_x": 27, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y118": { + "bits": {}, + "grid_x": 27, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y119": { + "bits": {}, + "grid_x": 27, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y120": { + "bits": {}, + "grid_x": 27, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y121": { + "bits": {}, + "grid_x": 27, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y122": { + "bits": {}, + "grid_x": 27, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y123": { + "bits": {}, + "grid_x": 27, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y124": { + "bits": {}, + "grid_x": 27, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y125": { + "bits": {}, + "grid_x": 27, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y126": { + "bits": {}, + "grid_x": 27, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y127": { + "bits": {}, + "grid_x": 27, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y128": { + "bits": {}, + "grid_x": 27, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y129": { + "bits": {}, + "grid_x": 27, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y130": { + "bits": {}, + "grid_x": 27, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y131": { + "bits": {}, + "grid_x": 27, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y132": { + "bits": {}, + "grid_x": 27, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y133": { + "bits": {}, + "grid_x": 27, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y134": { + "bits": {}, + "grid_x": 27, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y135": { + "bits": {}, + "grid_x": 27, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y136": { + "bits": {}, + "grid_x": 27, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y137": { + "bits": {}, + "grid_x": 27, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y138": { + "bits": {}, + "grid_x": 27, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y139": { + "bits": {}, + "grid_x": 27, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y140": { + "bits": {}, + "grid_x": 27, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y141": { + "bits": {}, + "grid_x": 27, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y142": { + "bits": {}, + "grid_x": 27, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y143": { + "bits": {}, + "grid_x": 27, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y144": { + "bits": {}, + "grid_x": 27, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y145": { + "bits": {}, + "grid_x": 27, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y146": { + "bits": {}, + "grid_x": 27, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y147": { + "bits": {}, + "grid_x": 27, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y148": { + "bits": {}, + "grid_x": 27, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X9Y149": { + "bits": {}, + "grid_x": 27, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y0": { + "bits": {}, + "grid_x": 59, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y1": { + "bits": {}, + "grid_x": 59, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y2": { + "bits": {}, + "grid_x": 59, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y3": { + "bits": {}, + "grid_x": 59, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y4": { + "bits": {}, + "grid_x": 59, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y5": { + "bits": {}, + "grid_x": 59, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y6": { + "bits": {}, + "grid_x": 59, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y7": { + "bits": {}, + "grid_x": 59, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y8": { + "bits": {}, + "grid_x": 59, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y9": { + "bits": {}, + "grid_x": 59, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y10": { + "bits": {}, + "grid_x": 59, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y11": { + "bits": {}, + "grid_x": 59, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y12": { + "bits": {}, + "grid_x": 59, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y13": { + "bits": {}, + "grid_x": 59, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y14": { + "bits": {}, + "grid_x": 59, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y15": { + "bits": {}, + "grid_x": 59, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y16": { + "bits": {}, + "grid_x": 59, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y17": { + "bits": {}, + "grid_x": 59, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y18": { + "bits": {}, + "grid_x": 59, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y19": { + "bits": {}, + "grid_x": 59, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y20": { + "bits": {}, + "grid_x": 59, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y21": { + "bits": {}, + "grid_x": 59, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y22": { + "bits": {}, + "grid_x": 59, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y23": { + "bits": {}, + "grid_x": 59, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y24": { + "bits": {}, + "grid_x": 59, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y25": { + "bits": {}, + "grid_x": 59, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y26": { + "bits": {}, + "grid_x": 59, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y27": { + "bits": {}, + "grid_x": 59, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y28": { + "bits": {}, + "grid_x": 59, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y29": { + "bits": {}, + "grid_x": 59, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y30": { + "bits": {}, + "grid_x": 59, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y31": { + "bits": {}, + "grid_x": 59, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y32": { + "bits": {}, + "grid_x": 59, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y33": { + "bits": {}, + "grid_x": 59, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y34": { + "bits": {}, + "grid_x": 59, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y35": { + "bits": {}, + "grid_x": 59, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y36": { + "bits": {}, + "grid_x": 59, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y37": { + "bits": {}, + "grid_x": 59, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y38": { + "bits": {}, + "grid_x": 59, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y39": { + "bits": {}, + "grid_x": 59, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y40": { + "bits": {}, + "grid_x": 59, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y41": { + "bits": {}, + "grid_x": 59, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y42": { + "bits": {}, + "grid_x": 59, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y43": { + "bits": {}, + "grid_x": 59, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y44": { + "bits": {}, + "grid_x": 59, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y45": { + "bits": {}, + "grid_x": 59, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y46": { + "bits": {}, + "grid_x": 59, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y47": { + "bits": {}, + "grid_x": 59, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y48": { + "bits": {}, + "grid_x": 59, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y49": { + "bits": {}, + "grid_x": 59, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y50": { + "bits": {}, + "grid_x": 59, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y51": { + "bits": {}, + "grid_x": 59, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y52": { + "bits": {}, + "grid_x": 59, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y53": { + "bits": {}, + "grid_x": 59, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y54": { + "bits": {}, + "grid_x": 59, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y55": { + "bits": {}, + "grid_x": 59, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y56": { + "bits": {}, + "grid_x": 59, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y57": { + "bits": {}, + "grid_x": 59, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y58": { + "bits": {}, + "grid_x": 59, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y59": { + "bits": {}, + "grid_x": 59, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y60": { + "bits": {}, + "grid_x": 59, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y61": { + "bits": {}, + "grid_x": 59, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y62": { + "bits": {}, + "grid_x": 59, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y63": { + "bits": {}, + "grid_x": 59, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y64": { + "bits": {}, + "grid_x": 59, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y65": { + "bits": {}, + "grid_x": 59, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y66": { + "bits": {}, + "grid_x": 59, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y67": { + "bits": {}, + "grid_x": 59, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y68": { + "bits": {}, + "grid_x": 59, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y69": { + "bits": {}, + "grid_x": 59, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y70": { + "bits": {}, + "grid_x": 59, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y71": { + "bits": {}, + "grid_x": 59, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y72": { + "bits": {}, + "grid_x": 59, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y73": { + "bits": {}, + "grid_x": 59, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y74": { + "bits": {}, + "grid_x": 59, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y75": { + "bits": {}, + "grid_x": 59, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y76": { + "bits": {}, + "grid_x": 59, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y77": { + "bits": {}, + "grid_x": 59, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y78": { + "bits": {}, + "grid_x": 59, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y79": { + "bits": {}, + "grid_x": 59, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y80": { + "bits": {}, + "grid_x": 59, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y81": { + "bits": {}, + "grid_x": 59, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y82": { + "bits": {}, + "grid_x": 59, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y83": { + "bits": {}, + "grid_x": 59, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y84": { + "bits": {}, + "grid_x": 59, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y85": { + "bits": {}, + "grid_x": 59, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y86": { + "bits": {}, + "grid_x": 59, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y87": { + "bits": {}, + "grid_x": 59, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y88": { + "bits": {}, + "grid_x": 59, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y89": { + "bits": {}, + "grid_x": 59, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y90": { + "bits": {}, + "grid_x": 59, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y91": { + "bits": {}, + "grid_x": 59, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y92": { + "bits": {}, + "grid_x": 59, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y93": { + "bits": {}, + "grid_x": 59, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y94": { + "bits": {}, + "grid_x": 59, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y95": { + "bits": {}, + "grid_x": 59, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y96": { + "bits": {}, + "grid_x": 59, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y97": { + "bits": {}, + "grid_x": 59, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y98": { + "bits": {}, + "grid_x": 59, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y99": { + "bits": {}, + "grid_x": 59, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y100": { + "bits": {}, + "grid_x": 59, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y101": { + "bits": {}, + "grid_x": 59, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y102": { + "bits": {}, + "grid_x": 59, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y103": { + "bits": {}, + "grid_x": 59, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y104": { + "bits": {}, + "grid_x": 59, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y105": { + "bits": {}, + "grid_x": 59, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y106": { + "bits": {}, + "grid_x": 59, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y107": { + "bits": {}, + "grid_x": 59, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y108": { + "bits": {}, + "grid_x": 59, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y109": { + "bits": {}, + "grid_x": 59, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y110": { + "bits": {}, + "grid_x": 59, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y111": { + "bits": {}, + "grid_x": 59, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y112": { + "bits": {}, + "grid_x": 59, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y113": { + "bits": {}, + "grid_x": 59, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y114": { + "bits": {}, + "grid_x": 59, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y115": { + "bits": {}, + "grid_x": 59, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y116": { + "bits": {}, + "grid_x": 59, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y117": { + "bits": {}, + "grid_x": 59, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y118": { + "bits": {}, + "grid_x": 59, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y119": { + "bits": {}, + "grid_x": 59, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y120": { + "bits": {}, + "grid_x": 59, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y121": { + "bits": {}, + "grid_x": 59, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y122": { + "bits": {}, + "grid_x": 59, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y123": { + "bits": {}, + "grid_x": 59, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y124": { + "bits": {}, + "grid_x": 59, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y125": { + "bits": {}, + "grid_x": 59, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y126": { + "bits": {}, + "grid_x": 59, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y127": { + "bits": {}, + "grid_x": 59, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y128": { + "bits": {}, + "grid_x": 59, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y129": { + "bits": {}, + "grid_x": 59, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y130": { + "bits": {}, + "grid_x": 59, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y131": { + "bits": {}, + "grid_x": 59, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y132": { + "bits": {}, + "grid_x": 59, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y133": { + "bits": {}, + "grid_x": 59, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y134": { + "bits": {}, + "grid_x": 59, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y135": { + "bits": {}, + "grid_x": 59, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y136": { + "bits": {}, + "grid_x": 59, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y137": { + "bits": {}, + "grid_x": 59, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y138": { + "bits": {}, + "grid_x": 59, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y139": { + "bits": {}, + "grid_x": 59, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y140": { + "bits": {}, + "grid_x": 59, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y141": { + "bits": {}, + "grid_x": 59, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y142": { + "bits": {}, + "grid_x": 59, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y143": { + "bits": {}, + "grid_x": 59, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y144": { + "bits": {}, + "grid_x": 59, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y145": { + "bits": {}, + "grid_x": 59, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y146": { + "bits": {}, + "grid_x": 59, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y147": { + "bits": {}, + "grid_x": 59, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y148": { + "bits": {}, + "grid_x": 59, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_INTERFACE_R_X23Y149": { + "bits": {}, + "grid_x": 59, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "INT_INTERFACE_R" + }, + "INT_L_X0Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 4, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 4, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X0Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 4, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X0Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400100", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 11, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000100", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 11, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X2Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020100", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 11, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X2Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400200", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 15, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000200", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 15, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X4Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020200", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 15, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X4Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400300", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 21, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000300", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 21, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X6Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020300", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 21, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X6Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400400", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 25, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000400", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 25, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X8Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020400", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 25, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X8Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400500", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 31, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000500", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 31, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X10Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020500", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 31, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X11Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X12Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020600", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 36, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X13Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X14Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020700", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 40, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X15Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X16Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020800", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 44, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X17Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400900", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 49, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 49, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X18Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020900", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 49, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X19Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 53, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 53, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X20Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 53, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X21Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 57, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 57, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X22Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 57, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X23Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 63, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 63, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X24Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 63, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X25Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 68, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 68, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X26Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 68, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X27Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 72, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 72, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X28Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 72, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X29Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 77, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 77, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X30Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F00", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 77, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X31Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401000", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 82, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001000", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 82, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X32Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021000", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 82, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X33Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401100", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 88, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001100", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 88, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X34Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021100", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 88, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X36Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401200", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 92, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001200", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 92, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y100": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y101": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y102": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y103": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y104": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y105": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y106": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y107": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y108": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y109": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y110": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y111": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y112": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y113": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y114": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y115": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y116": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y117": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y118": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y119": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y120": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y121": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y122": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y123": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y124": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y125": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y126": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y127": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y128": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y129": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y130": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y131": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y132": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y133": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y134": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y135": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y136": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y137": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y138": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y139": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y140": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y141": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y142": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y143": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y144": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y145": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y146": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y147": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y148": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X36Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021200", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 92, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X38Y149": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401300", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 98, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X38Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001300", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 98, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X40Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401400", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 102, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X40Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001400", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 102, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X42Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y0": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y1": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y2": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y3": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y4": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y5": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y6": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y7": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y8": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y9": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y10": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y11": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y12": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y13": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y14": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y15": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y16": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y17": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y18": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y19": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y20": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y21": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y22": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y23": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y24": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y25": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y26": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y27": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y28": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y29": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y30": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y31": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y32": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y33": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y34": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y35": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y36": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y37": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y38": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y39": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y40": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y41": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y42": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y43": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y44": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y45": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y46": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y47": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y48": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401500", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 109, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y49": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y50": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y51": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y52": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y53": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y54": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y55": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y56": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y57": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y58": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y59": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y60": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y61": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y62": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y63": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y64": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y65": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y66": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y67": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y68": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y69": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y70": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y71": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y72": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y73": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y74": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y75": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y76": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y77": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y78": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y79": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y80": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y81": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y82": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y83": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y84": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y85": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y86": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y87": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y88": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y89": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y90": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y91": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y92": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y93": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y94": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y95": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y96": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y97": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y98": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_L_X42Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001500", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 109, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X44Y99": "TIEOFF" + }, + "type": "INT_L" + }, + "INT_R_X1Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400080", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 5, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000080", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 5, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X1Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020080", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 5, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X1Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400180", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 12, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000180", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 12, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X3Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020180", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 12, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X3Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400280", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 16, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000280", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 16, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X5Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020280", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 16, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X5Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400380", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 22, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000380", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 22, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X7Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020380", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 22, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X7Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400480", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 26, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000480", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 26, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X9Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020480", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 26, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X9Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400580", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 32, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000580", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 32, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X11Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020580", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 32, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X12Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X13Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020680", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 37, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X14Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X15Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020780", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 41, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X16Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X17Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020880", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 45, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X18Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400980", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 50, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000980", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 50, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X19Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020980", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 50, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X20Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400A80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 54, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000A80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 54, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X21Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020A80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 54, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X22Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400B80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 58, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000B80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 58, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X23Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020B80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 58, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X24Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400C80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 64, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000C80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 64, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X25Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020C80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 64, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X26Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400D80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 69, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000D80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 69, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X27Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020D80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 69, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X28Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400E80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 73, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000E80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 73, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X29Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020E80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 73, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X30Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400F80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 78, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000F80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 78, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X31Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020F80", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 78, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X32Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401080", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 83, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001080", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 83, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X33Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021080", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 83, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X34Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401180", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 89, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001180", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 89, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X35Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021180", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 89, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X37Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401280", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 93, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 93, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y100": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y100": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y101": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y102": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 49, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y102": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y103": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y104": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 47, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y104": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y105": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y106": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 45, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y106": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y107": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y108": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 43, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y108": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y109": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y110": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y110": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y111": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y112": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 39, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y112": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y113": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y114": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 37, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y114": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y115": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y116": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 35, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y116": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y117": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y118": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 33, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y118": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y119": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y120": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 31, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y120": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y121": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y122": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 29, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y122": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y123": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y124": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 27, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y124": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y125": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y126": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 24, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y126": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y127": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y128": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 22, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y128": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y129": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y130": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 20, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y130": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y131": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y132": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 18, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y132": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y133": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y134": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 16, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y134": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y135": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y136": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 14, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y136": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y137": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y138": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 12, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y138": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y139": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y140": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 10, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y140": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y141": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y142": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 8, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y142": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y143": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y144": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 6, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y144": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y145": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y146": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 4, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y146": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y147": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y148": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 2, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y148": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X37Y149": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y2", + "grid_x": 93, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "TIEOFF_X39Y149": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401380", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 99, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X39Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001380", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 99, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X41Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401480", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 103, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X41Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001480", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 103, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X43Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y0": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y0": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y1": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y2": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 153, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y2": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y3": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y4": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 151, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y4": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y5": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y6": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 149, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y6": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y7": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y8": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 147, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y8": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y9": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y10": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 145, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y10": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y11": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y12": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 143, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y12": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y13": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y14": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 141, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y14": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y15": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y16": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 139, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y16": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y17": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y18": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 137, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y18": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y19": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y20": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 135, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y20": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y21": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y22": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 133, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y22": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y23": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y24": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 131, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y24": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y25": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y26": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 128, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y26": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y27": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y28": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 126, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y28": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y29": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y30": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 124, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y30": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y31": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y32": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 122, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y32": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y33": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y34": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 120, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y34": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y35": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y36": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 118, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y36": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y37": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y38": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 116, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y38": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y39": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y40": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 114, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y40": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y41": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y42": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 112, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y42": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y43": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y44": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 110, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y44": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y45": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y46": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 108, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y46": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y47": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y48": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 106, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y48": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y49": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 110, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y49": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y50": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y50": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 2, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y51": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y52": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 4, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 101, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y52": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 6, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y53": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y54": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 8, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 99, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y54": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 10, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y55": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y56": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 12, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 97, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y56": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 14, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y57": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y58": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 16, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 95, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y58": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 18, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y59": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y60": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 20, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 93, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y60": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 22, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y61": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y62": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 24, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 91, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y62": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 26, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y63": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y64": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 28, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 89, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y64": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 30, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y65": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y66": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 32, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 87, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y66": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 34, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y67": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y68": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 36, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 85, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y68": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 38, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y69": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y70": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 40, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 83, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y70": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 42, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y71": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y72": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 44, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 81, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y72": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 46, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y73": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y74": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 48, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 79, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y74": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 51, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y75": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y76": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 53, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 76, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y76": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 55, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y77": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y78": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 57, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 74, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y78": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 59, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y79": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y80": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 61, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 72, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y80": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 63, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y81": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y82": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 65, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 70, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y82": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 67, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y83": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y84": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 69, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 68, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y84": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 71, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y85": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y86": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 73, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 66, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y86": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 75, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y87": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y88": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 77, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 64, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y88": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 79, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y89": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y90": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 81, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 62, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y90": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 83, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y91": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y92": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 85, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 60, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y92": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 87, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y93": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y94": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 89, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 58, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y94": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 91, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y95": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y96": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 93, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 56, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y96": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 95, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y97": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y98": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 97, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 54, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y98": "TIEOFF" + }, + "type": "INT_R" + }, + "INT_R_X43Y99": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 28, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 110, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "TIEOFF_X45Y99": "TIEOFF" + }, + "type": "INT_R" + }, + "IO_INT_INTERFACE_L_X0Y0": { + "bits": {}, + "grid_x": 3, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y1": { + "bits": {}, + "grid_x": 3, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y2": { + "bits": {}, + "grid_x": 3, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y3": { + "bits": {}, + "grid_x": 3, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y4": { + "bits": {}, + "grid_x": 3, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y5": { + "bits": {}, + "grid_x": 3, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y6": { + "bits": {}, + "grid_x": 3, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y7": { + "bits": {}, + "grid_x": 3, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y8": { + "bits": {}, + "grid_x": 3, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y9": { + "bits": {}, + "grid_x": 3, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y10": { + "bits": {}, + "grid_x": 3, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y11": { + "bits": {}, + "grid_x": 3, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y12": { + "bits": {}, + "grid_x": 3, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y13": { + "bits": {}, + "grid_x": 3, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y14": { + "bits": {}, + "grid_x": 3, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y15": { + "bits": {}, + "grid_x": 3, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y16": { + "bits": {}, + "grid_x": 3, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y17": { + "bits": {}, + "grid_x": 3, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y18": { + "bits": {}, + "grid_x": 3, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y19": { + "bits": {}, + "grid_x": 3, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y20": { + "bits": {}, + "grid_x": 3, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y21": { + "bits": {}, + "grid_x": 3, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y22": { + "bits": {}, + "grid_x": 3, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y23": { + "bits": {}, + "grid_x": 3, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y24": { + "bits": {}, + "grid_x": 3, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y25": { + "bits": {}, + "grid_x": 3, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y26": { + "bits": {}, + "grid_x": 3, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y27": { + "bits": {}, + "grid_x": 3, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y28": { + "bits": {}, + "grid_x": 3, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y29": { + "bits": {}, + "grid_x": 3, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y30": { + "bits": {}, + "grid_x": 3, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y31": { + "bits": {}, + "grid_x": 3, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y32": { + "bits": {}, + "grid_x": 3, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y33": { + "bits": {}, + "grid_x": 3, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y34": { + "bits": {}, + "grid_x": 3, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y35": { + "bits": {}, + "grid_x": 3, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y36": { + "bits": {}, + "grid_x": 3, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y37": { + "bits": {}, + "grid_x": 3, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y38": { + "bits": {}, + "grid_x": 3, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y39": { + "bits": {}, + "grid_x": 3, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y40": { + "bits": {}, + "grid_x": 3, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y41": { + "bits": {}, + "grid_x": 3, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y42": { + "bits": {}, + "grid_x": 3, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y43": { + "bits": {}, + "grid_x": 3, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y44": { + "bits": {}, + "grid_x": 3, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y45": { + "bits": {}, + "grid_x": 3, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y46": { + "bits": {}, + "grid_x": 3, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y47": { + "bits": {}, + "grid_x": 3, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y48": { + "bits": {}, + "grid_x": 3, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y49": { + "bits": {}, + "grid_x": 3, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y50": { + "bits": {}, + "grid_x": 3, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y51": { + "bits": {}, + "grid_x": 3, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y52": { + "bits": {}, + "grid_x": 3, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y53": { + "bits": {}, + "grid_x": 3, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y54": { + "bits": {}, + "grid_x": 3, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y55": { + "bits": {}, + "grid_x": 3, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y56": { + "bits": {}, + "grid_x": 3, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y57": { + "bits": {}, + "grid_x": 3, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y58": { + "bits": {}, + "grid_x": 3, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y59": { + "bits": {}, + "grid_x": 3, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y60": { + "bits": {}, + "grid_x": 3, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y61": { + "bits": {}, + "grid_x": 3, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y62": { + "bits": {}, + "grid_x": 3, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y63": { + "bits": {}, + "grid_x": 3, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y64": { + "bits": {}, + "grid_x": 3, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y65": { + "bits": {}, + "grid_x": 3, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y66": { + "bits": {}, + "grid_x": 3, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y67": { + "bits": {}, + "grid_x": 3, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y68": { + "bits": {}, + "grid_x": 3, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y69": { + "bits": {}, + "grid_x": 3, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y70": { + "bits": {}, + "grid_x": 3, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y71": { + "bits": {}, + "grid_x": 3, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y72": { + "bits": {}, + "grid_x": 3, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y73": { + "bits": {}, + "grid_x": 3, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y74": { + "bits": {}, + "grid_x": 3, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y75": { + "bits": {}, + "grid_x": 3, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y76": { + "bits": {}, + "grid_x": 3, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y77": { + "bits": {}, + "grid_x": 3, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y78": { + "bits": {}, + "grid_x": 3, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y79": { + "bits": {}, + "grid_x": 3, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y80": { + "bits": {}, + "grid_x": 3, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y81": { + "bits": {}, + "grid_x": 3, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y82": { + "bits": {}, + "grid_x": 3, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y83": { + "bits": {}, + "grid_x": 3, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y84": { + "bits": {}, + "grid_x": 3, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y85": { + "bits": {}, + "grid_x": 3, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y86": { + "bits": {}, + "grid_x": 3, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y87": { + "bits": {}, + "grid_x": 3, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y88": { + "bits": {}, + "grid_x": 3, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y89": { + "bits": {}, + "grid_x": 3, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y90": { + "bits": {}, + "grid_x": 3, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y91": { + "bits": {}, + "grid_x": 3, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y92": { + "bits": {}, + "grid_x": 3, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y93": { + "bits": {}, + "grid_x": 3, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y94": { + "bits": {}, + "grid_x": 3, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y95": { + "bits": {}, + "grid_x": 3, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y96": { + "bits": {}, + "grid_x": 3, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y97": { + "bits": {}, + "grid_x": 3, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y98": { + "bits": {}, + "grid_x": 3, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y99": { + "bits": {}, + "grid_x": 3, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y100": { + "bits": {}, + "grid_x": 3, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y101": { + "bits": {}, + "grid_x": 3, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y102": { + "bits": {}, + "grid_x": 3, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y103": { + "bits": {}, + "grid_x": 3, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y104": { + "bits": {}, + "grid_x": 3, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y105": { + "bits": {}, + "grid_x": 3, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y106": { + "bits": {}, + "grid_x": 3, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y107": { + "bits": {}, + "grid_x": 3, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y108": { + "bits": {}, + "grid_x": 3, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y109": { + "bits": {}, + "grid_x": 3, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y110": { + "bits": {}, + "grid_x": 3, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y111": { + "bits": {}, + "grid_x": 3, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y112": { + "bits": {}, + "grid_x": 3, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y113": { + "bits": {}, + "grid_x": 3, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y114": { + "bits": {}, + "grid_x": 3, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y115": { + "bits": {}, + "grid_x": 3, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y116": { + "bits": {}, + "grid_x": 3, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y117": { + "bits": {}, + "grid_x": 3, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y118": { + "bits": {}, + "grid_x": 3, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y119": { + "bits": {}, + "grid_x": 3, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y120": { + "bits": {}, + "grid_x": 3, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y121": { + "bits": {}, + "grid_x": 3, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y122": { + "bits": {}, + "grid_x": 3, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y123": { + "bits": {}, + "grid_x": 3, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y124": { + "bits": {}, + "grid_x": 3, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y125": { + "bits": {}, + "grid_x": 3, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y126": { + "bits": {}, + "grid_x": 3, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y127": { + "bits": {}, + "grid_x": 3, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y128": { + "bits": {}, + "grid_x": 3, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y129": { + "bits": {}, + "grid_x": 3, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y130": { + "bits": {}, + "grid_x": 3, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y131": { + "bits": {}, + "grid_x": 3, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y132": { + "bits": {}, + "grid_x": 3, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y133": { + "bits": {}, + "grid_x": 3, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y134": { + "bits": {}, + "grid_x": 3, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y135": { + "bits": {}, + "grid_x": 3, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y136": { + "bits": {}, + "grid_x": 3, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y137": { + "bits": {}, + "grid_x": 3, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y138": { + "bits": {}, + "grid_x": 3, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y139": { + "bits": {}, + "grid_x": 3, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y140": { + "bits": {}, + "grid_x": 3, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y141": { + "bits": {}, + "grid_x": 3, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y142": { + "bits": {}, + "grid_x": 3, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y143": { + "bits": {}, + "grid_x": 3, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y144": { + "bits": {}, + "grid_x": 3, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y145": { + "bits": {}, + "grid_x": 3, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y146": { + "bits": {}, + "grid_x": 3, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y147": { + "bits": {}, + "grid_x": 3, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y148": { + "bits": {}, + "grid_x": 3, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_L_X0Y149": { + "bits": {}, + "grid_x": 3, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_L" + }, + "IO_INT_INTERFACE_R_X43Y0": { + "bits": {}, + "grid_x": 111, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y1": { + "bits": {}, + "grid_x": 111, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y2": { + "bits": {}, + "grid_x": 111, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y3": { + "bits": {}, + "grid_x": 111, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y4": { + "bits": {}, + "grid_x": 111, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y5": { + "bits": {}, + "grid_x": 111, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y6": { + "bits": {}, + "grid_x": 111, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y7": { + "bits": {}, + "grid_x": 111, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y8": { + "bits": {}, + "grid_x": 111, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y9": { + "bits": {}, + "grid_x": 111, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y10": { + "bits": {}, + "grid_x": 111, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y11": { + "bits": {}, + "grid_x": 111, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y12": { + "bits": {}, + "grid_x": 111, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y13": { + "bits": {}, + "grid_x": 111, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y14": { + "bits": {}, + "grid_x": 111, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y15": { + "bits": {}, + "grid_x": 111, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y16": { + "bits": {}, + "grid_x": 111, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y17": { + "bits": {}, + "grid_x": 111, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y18": { + "bits": {}, + "grid_x": 111, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y19": { + "bits": {}, + "grid_x": 111, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y20": { + "bits": {}, + "grid_x": 111, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y21": { + "bits": {}, + "grid_x": 111, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y22": { + "bits": {}, + "grid_x": 111, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y23": { + "bits": {}, + "grid_x": 111, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y24": { + "bits": {}, + "grid_x": 111, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y25": { + "bits": {}, + "grid_x": 111, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y26": { + "bits": {}, + "grid_x": 111, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y27": { + "bits": {}, + "grid_x": 111, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y28": { + "bits": {}, + "grid_x": 111, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y29": { + "bits": {}, + "grid_x": 111, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y30": { + "bits": {}, + "grid_x": 111, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y31": { + "bits": {}, + "grid_x": 111, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y32": { + "bits": {}, + "grid_x": 111, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y33": { + "bits": {}, + "grid_x": 111, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y34": { + "bits": {}, + "grid_x": 111, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y35": { + "bits": {}, + "grid_x": 111, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y36": { + "bits": {}, + "grid_x": 111, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y37": { + "bits": {}, + "grid_x": 111, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y38": { + "bits": {}, + "grid_x": 111, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y39": { + "bits": {}, + "grid_x": 111, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y40": { + "bits": {}, + "grid_x": 111, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y41": { + "bits": {}, + "grid_x": 111, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y42": { + "bits": {}, + "grid_x": 111, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y43": { + "bits": {}, + "grid_x": 111, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y44": { + "bits": {}, + "grid_x": 111, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y45": { + "bits": {}, + "grid_x": 111, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y46": { + "bits": {}, + "grid_x": 111, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y47": { + "bits": {}, + "grid_x": 111, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y48": { + "bits": {}, + "grid_x": 111, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y49": { + "bits": {}, + "grid_x": 111, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y50": { + "bits": {}, + "grid_x": 111, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y51": { + "bits": {}, + "grid_x": 111, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y52": { + "bits": {}, + "grid_x": 111, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y53": { + "bits": {}, + "grid_x": 111, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y54": { + "bits": {}, + "grid_x": 111, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y55": { + "bits": {}, + "grid_x": 111, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y56": { + "bits": {}, + "grid_x": 111, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y57": { + "bits": {}, + "grid_x": 111, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y58": { + "bits": {}, + "grid_x": 111, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y59": { + "bits": {}, + "grid_x": 111, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y60": { + "bits": {}, + "grid_x": 111, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y61": { + "bits": {}, + "grid_x": 111, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y62": { + "bits": {}, + "grid_x": 111, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y63": { + "bits": {}, + "grid_x": 111, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y64": { + "bits": {}, + "grid_x": 111, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y65": { + "bits": {}, + "grid_x": 111, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y66": { + "bits": {}, + "grid_x": 111, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y67": { + "bits": {}, + "grid_x": 111, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y68": { + "bits": {}, + "grid_x": 111, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y69": { + "bits": {}, + "grid_x": 111, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y70": { + "bits": {}, + "grid_x": 111, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y71": { + "bits": {}, + "grid_x": 111, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y72": { + "bits": {}, + "grid_x": 111, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y73": { + "bits": {}, + "grid_x": 111, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y74": { + "bits": {}, + "grid_x": 111, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y75": { + "bits": {}, + "grid_x": 111, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y76": { + "bits": {}, + "grid_x": 111, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y77": { + "bits": {}, + "grid_x": 111, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y78": { + "bits": {}, + "grid_x": 111, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y79": { + "bits": {}, + "grid_x": 111, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y80": { + "bits": {}, + "grid_x": 111, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y81": { + "bits": {}, + "grid_x": 111, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y82": { + "bits": {}, + "grid_x": 111, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y83": { + "bits": {}, + "grid_x": 111, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y84": { + "bits": {}, + "grid_x": 111, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y85": { + "bits": {}, + "grid_x": 111, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y86": { + "bits": {}, + "grid_x": 111, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y87": { + "bits": {}, + "grid_x": 111, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y88": { + "bits": {}, + "grid_x": 111, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y89": { + "bits": {}, + "grid_x": 111, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y90": { + "bits": {}, + "grid_x": 111, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y91": { + "bits": {}, + "grid_x": 111, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y92": { + "bits": {}, + "grid_x": 111, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y93": { + "bits": {}, + "grid_x": 111, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y94": { + "bits": {}, + "grid_x": 111, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y95": { + "bits": {}, + "grid_x": 111, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y96": { + "bits": {}, + "grid_x": 111, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y97": { + "bits": {}, + "grid_x": 111, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y98": { + "bits": {}, + "grid_x": 111, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "IO_INT_INTERFACE_R_X43Y99": { + "bits": {}, + "grid_x": 111, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "IO_INT_INTERFACE_R" + }, + "LIOB33_SING_X0Y0": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y0" + }, + "start_offset": 2, + "type": "LIOB33" + }, + "baseaddr": "0x00400000", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 155, + "pin_functions": { + "IOB_X0Y0": "IO_25_14" + }, + "sites": { + "IOB_X0Y0": "IOB33" + }, + "type": "LIOB33_SING" + }, + "LIOB33_SING_X0Y49": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y1" + }, + "start_offset": 0, + "type": "LIOB33" + }, + "baseaddr": "0x00400000", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 105, + "pin_functions": { + "IOB_X0Y49": "IO_0_14" + }, + "sites": { + "IOB_X0Y49": "IOB33" + }, + "type": "LIOB33_SING" + }, + "LIOB33_SING_X0Y50": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y0" + }, + "start_offset": 2, + "type": "LIOB33" + }, + "baseaddr": "0x00000000", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 103, + "pin_functions": { + "IOB_X0Y50": "IO_25_15" + }, + "sites": { + "IOB_X0Y50": "IOB33" + }, + "type": "LIOB33_SING" + }, + "LIOB33_SING_X0Y99": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y1" + }, + "start_offset": 0, + "type": "LIOB33" + }, + "baseaddr": "0x00000000", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 53, + "pin_functions": { + "IOB_X0Y99": "IO_0_15" + }, + "sites": { + "IOB_X0Y99": "IOB33" + }, + "type": "LIOB33_SING" + }, + "LIOB33_SING_X0Y100": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y0" + }, + "start_offset": 2, + "type": "LIOB33" + }, + "baseaddr": "0x00020000", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 51, + "pin_functions": { + "IOB_X0Y100": "IO_25_16" + }, + "sites": { + "IOB_X0Y100": "IOB33" + }, + "type": "LIOB33_SING" + }, + "LIOB33_SING_X0Y149": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y1" + }, + "start_offset": 0, + "type": "LIOB33" + }, + "baseaddr": "0x00020000", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 1, + "pin_functions": { + "IOB_X0Y149": "IO_0_16" + }, + "sites": { + "IOB_X0Y149": "IOB33" + }, + "type": "LIOB33_SING" + }, + "LIOB33_X0Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 154, + "pin_functions": { + "IOB_X0Y1": "IO_L24N_T3_A00_D16_14", + "IOB_X0Y2": "IO_L24P_T3_A01_D17_14" + }, + "sites": { + "IOB_X0Y1": "IOB33S", + "IOB_X0Y2": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 152, + "pin_functions": { + "IOB_X0Y3": "IO_L23N_T3_A02_D18_14", + "IOB_X0Y4": "IO_L23P_T3_A03_D19_14" + }, + "sites": { + "IOB_X0Y3": "IOB33S", + "IOB_X0Y4": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 150, + "pin_functions": { + "IOB_X0Y5": "IO_L22N_T3_A04_D20_14", + "IOB_X0Y6": "IO_L22P_T3_A05_D21_14" + }, + "sites": { + "IOB_X0Y5": "IOB33S", + "IOB_X0Y6": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 148, + "pin_functions": { + "IOB_X0Y7": "IO_L21N_T3_DQS_A06_D22_14", + "IOB_X0Y8": "IO_L21P_T3_DQS_14" + }, + "sites": { + "IOB_X0Y7": "IOB33S", + "IOB_X0Y8": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 146, + "pin_functions": { + "IOB_X0Y9": "IO_L20N_T3_A07_D23_14", + "IOB_X0Y10": "IO_L20P_T3_A08_D24_14" + }, + "sites": { + "IOB_X0Y9": "IOB33S", + "IOB_X0Y10": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 144, + "pin_functions": { + "IOB_X0Y11": "IO_L19N_T3_A09_D25_VREF_14", + "IOB_X0Y12": "IO_L19P_T3_A10_D26_14" + }, + "sites": { + "IOB_X0Y11": "IOB33S", + "IOB_X0Y12": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 142, + "pin_functions": { + "IOB_X0Y13": "IO_L18N_T2_A11_D27_14", + "IOB_X0Y14": "IO_L18P_T2_A12_D28_14" + }, + "sites": { + "IOB_X0Y13": "IOB33S", + "IOB_X0Y14": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 140, + "pin_functions": { + "IOB_X0Y15": "IO_L17N_T2_A13_D29_14", + "IOB_X0Y16": "IO_L17P_T2_A14_D30_14" + }, + "sites": { + "IOB_X0Y15": "IOB33S", + "IOB_X0Y16": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 138, + "pin_functions": { + "IOB_X0Y17": "IO_L16N_T2_A15_D31_14", + "IOB_X0Y18": "IO_L16P_T2_CSI_B_14" + }, + "sites": { + "IOB_X0Y17": "IOB33S", + "IOB_X0Y18": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 136, + "pin_functions": { + "IOB_X0Y19": "IO_L15N_T2_DQS_DOUT_CSO_B_14", + "IOB_X0Y20": "IO_L15P_T2_DQS_RDWR_B_14" + }, + "sites": { + "IOB_X0Y19": "IOB33S", + "IOB_X0Y20": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 134, + "pin_functions": { + "IOB_X0Y21": "IO_L14N_T2_SRCC_14", + "IOB_X0Y22": "IO_L14P_T2_SRCC_14" + }, + "sites": { + "IOB_X0Y21": "IOB33S", + "IOB_X0Y22": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 132, + "pin_functions": { + "IOB_X0Y23": "IO_L13N_T2_MRCC_14", + "IOB_X0Y24": "IO_L13P_T2_MRCC_14" + }, + "sites": { + "IOB_X0Y23": "IOB33S", + "IOB_X0Y24": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 129, + "pin_functions": { + "IOB_X0Y25": "IO_L12N_T1_MRCC_14", + "IOB_X0Y26": "IO_L12P_T1_MRCC_14" + }, + "sites": { + "IOB_X0Y25": "IOB33S", + "IOB_X0Y26": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 127, + "pin_functions": { + "IOB_X0Y27": "IO_L11N_T1_SRCC_14", + "IOB_X0Y28": "IO_L11P_T1_SRCC_14" + }, + "sites": { + "IOB_X0Y27": "IOB33S", + "IOB_X0Y28": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 125, + "pin_functions": { + "IOB_X0Y29": "IO_L10N_T1_D15_14", + "IOB_X0Y30": "IO_L10P_T1_D14_14" + }, + "sites": { + "IOB_X0Y29": "IOB33S", + "IOB_X0Y30": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 123, + "pin_functions": { + "IOB_X0Y31": "IO_L9N_T1_DQS_D13_14", + "IOB_X0Y32": "IO_L9P_T1_DQS_14" + }, + "sites": { + "IOB_X0Y31": "IOB33S", + "IOB_X0Y32": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 121, + "pin_functions": { + "IOB_X0Y33": "IO_L8N_T1_D12_14", + "IOB_X0Y34": "IO_L8P_T1_D11_14" + }, + "sites": { + "IOB_X0Y33": "IOB33S", + "IOB_X0Y34": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 119, + "pin_functions": { + "IOB_X0Y35": "IO_L7N_T1_D10_14", + "IOB_X0Y36": "IO_L7P_T1_D09_14" + }, + "sites": { + "IOB_X0Y35": "IOB33S", + "IOB_X0Y36": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 117, + "pin_functions": { + "IOB_X0Y37": "IO_L6N_T0_D08_VREF_14", + "IOB_X0Y38": "IO_L6P_T0_FCS_B_14" + }, + "sites": { + "IOB_X0Y37": "IOB33S", + "IOB_X0Y38": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 115, + "pin_functions": { + "IOB_X0Y39": "IO_L5N_T0_D07_14", + "IOB_X0Y40": "IO_L5P_T0_D06_14" + }, + "sites": { + "IOB_X0Y39": "IOB33S", + "IOB_X0Y40": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 113, + "pin_functions": { + "IOB_X0Y41": "IO_L4N_T0_D05_14", + "IOB_X0Y42": "IO_L4P_T0_D04_14" + }, + "sites": { + "IOB_X0Y41": "IOB33S", + "IOB_X0Y42": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 111, + "pin_functions": { + "IOB_X0Y43": "IO_L3N_T0_DQS_EMCCLK_14", + "IOB_X0Y44": "IO_L3P_T0_DQS_PUDC_B_14" + }, + "sites": { + "IOB_X0Y43": "IOB33S", + "IOB_X0Y44": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 109, + "pin_functions": { + "IOB_X0Y45": "IO_L2N_T0_D03_14", + "IOB_X0Y46": "IO_L2P_T0_D02_14" + }, + "sites": { + "IOB_X0Y45": "IOB33S", + "IOB_X0Y46": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 0, + "grid_y": 107, + "pin_functions": { + "IOB_X0Y47": "IO_L1N_T0_D01_DIN_14", + "IOB_X0Y48": "IO_L1P_T0_D00_MOSI_14" + }, + "sites": { + "IOB_X0Y47": "IOB33S", + "IOB_X0Y48": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 102, + "pin_functions": { + "IOB_X0Y51": "IO_L24N_T3_RS0_15", + "IOB_X0Y52": "IO_L24P_T3_RS1_15" + }, + "sites": { + "IOB_X0Y51": "IOB33S", + "IOB_X0Y52": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 100, + "pin_functions": { + "IOB_X0Y53": "IO_L23N_T3_FWE_B_15", + "IOB_X0Y54": "IO_L23P_T3_FOE_B_15" + }, + "sites": { + "IOB_X0Y53": "IOB33S", + "IOB_X0Y54": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 98, + "pin_functions": { + "IOB_X0Y55": "IO_L22N_T3_A16_15", + "IOB_X0Y56": "IO_L22P_T3_A17_15" + }, + "sites": { + "IOB_X0Y55": "IOB33S", + "IOB_X0Y56": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 96, + "pin_functions": { + "IOB_X0Y57": "IO_L21N_T3_DQS_A18_15", + "IOB_X0Y58": "IO_L21P_T3_DQS_15" + }, + "sites": { + "IOB_X0Y57": "IOB33S", + "IOB_X0Y58": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 94, + "pin_functions": { + "IOB_X0Y59": "IO_L20N_T3_A19_15", + "IOB_X0Y60": "IO_L20P_T3_A20_15" + }, + "sites": { + "IOB_X0Y59": "IOB33S", + "IOB_X0Y60": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 92, + "pin_functions": { + "IOB_X0Y61": "IO_L19N_T3_A21_VREF_15", + "IOB_X0Y62": "IO_L19P_T3_A22_15" + }, + "sites": { + "IOB_X0Y61": "IOB33S", + "IOB_X0Y62": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 90, + "pin_functions": { + "IOB_X0Y63": "IO_L18N_T2_A23_15", + "IOB_X0Y64": "IO_L18P_T2_A24_15" + }, + "sites": { + "IOB_X0Y63": "IOB33S", + "IOB_X0Y64": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 88, + "pin_functions": { + "IOB_X0Y65": "IO_L17N_T2_A25_15", + "IOB_X0Y66": "IO_L17P_T2_A26_15" + }, + "sites": { + "IOB_X0Y65": "IOB33S", + "IOB_X0Y66": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 86, + "pin_functions": { + "IOB_X0Y67": "IO_L16N_T2_A27_15", + "IOB_X0Y68": "IO_L16P_T2_A28_15" + }, + "sites": { + "IOB_X0Y67": "IOB33S", + "IOB_X0Y68": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 84, + "pin_functions": { + "IOB_X0Y69": "IO_L15N_T2_DQS_ADV_B_15", + "IOB_X0Y70": "IO_L15P_T2_DQS_15" + }, + "sites": { + "IOB_X0Y69": "IOB33S", + "IOB_X0Y70": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 82, + "pin_functions": { + "IOB_X0Y71": "IO_L14N_T2_SRCC_15", + "IOB_X0Y72": "IO_L14P_T2_SRCC_15" + }, + "sites": { + "IOB_X0Y71": "IOB33S", + "IOB_X0Y72": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 80, + "pin_functions": { + "IOB_X0Y73": "IO_L13N_T2_MRCC_15", + "IOB_X0Y74": "IO_L13P_T2_MRCC_15" + }, + "sites": { + "IOB_X0Y73": "IOB33S", + "IOB_X0Y74": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 77, + "pin_functions": { + "IOB_X0Y75": "IO_L12N_T1_MRCC_15", + "IOB_X0Y76": "IO_L12P_T1_MRCC_15" + }, + "sites": { + "IOB_X0Y75": "IOB33S", + "IOB_X0Y76": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 75, + "pin_functions": { + "IOB_X0Y77": "IO_L11N_T1_SRCC_15", + "IOB_X0Y78": "IO_L11P_T1_SRCC_15" + }, + "sites": { + "IOB_X0Y77": "IOB33S", + "IOB_X0Y78": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 73, + "pin_functions": { + "IOB_X0Y79": "IO_L10N_T1_AD11N_15", + "IOB_X0Y80": "IO_L10P_T1_AD11P_15" + }, + "sites": { + "IOB_X0Y79": "IOB33S", + "IOB_X0Y80": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 71, + "pin_functions": { + "IOB_X0Y81": "IO_L9N_T1_DQS_AD3N_15", + "IOB_X0Y82": "IO_L9P_T1_DQS_AD3P_15" + }, + "sites": { + "IOB_X0Y81": "IOB33S", + "IOB_X0Y82": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 69, + "pin_functions": { + "IOB_X0Y83": "IO_L8N_T1_AD10N_15", + "IOB_X0Y84": "IO_L8P_T1_AD10P_15" + }, + "sites": { + "IOB_X0Y83": "IOB33S", + "IOB_X0Y84": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 67, + "pin_functions": { + "IOB_X0Y85": "IO_L7N_T1_AD2N_15", + "IOB_X0Y86": "IO_L7P_T1_AD2P_15" + }, + "sites": { + "IOB_X0Y85": "IOB33S", + "IOB_X0Y86": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 65, + "pin_functions": { + "IOB_X0Y87": "IO_L6N_T0_VREF_15", + "IOB_X0Y88": "IO_L6P_T0_15" + }, + "sites": { + "IOB_X0Y87": "IOB33S", + "IOB_X0Y88": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 63, + "pin_functions": { + "IOB_X0Y89": "IO_L5N_T0_AD9N_15", + "IOB_X0Y90": "IO_L5P_T0_AD9P_15" + }, + "sites": { + "IOB_X0Y89": "IOB33S", + "IOB_X0Y90": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 61, + "pin_functions": { + "IOB_X0Y91": "IO_L4N_T0_15", + "IOB_X0Y92": "IO_L4P_T0_15" + }, + "sites": { + "IOB_X0Y91": "IOB33S", + "IOB_X0Y92": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 59, + "pin_functions": { + "IOB_X0Y93": "IO_L3N_T0_DQS_AD1N_15", + "IOB_X0Y94": "IO_L3P_T0_DQS_AD1P_15" + }, + "sites": { + "IOB_X0Y93": "IOB33S", + "IOB_X0Y94": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 57, + "pin_functions": { + "IOB_X0Y95": "IO_L2N_T0_AD8N_15", + "IOB_X0Y96": "IO_L2P_T0_AD8P_15" + }, + "sites": { + "IOB_X0Y95": "IOB33S", + "IOB_X0Y96": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 0, + "grid_y": 55, + "pin_functions": { + "IOB_X0Y97": "IO_L1N_T0_AD0N_15", + "IOB_X0Y98": "IO_L1P_T0_AD0P_15" + }, + "sites": { + "IOB_X0Y97": "IOB33S", + "IOB_X0Y98": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 50, + "pin_functions": { + "IOB_X0Y101": "IO_L24N_T3_16", + "IOB_X0Y102": "IO_L24P_T3_16" + }, + "sites": { + "IOB_X0Y101": "IOB33S", + "IOB_X0Y102": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 48, + "pin_functions": { + "IOB_X0Y103": "IO_L23N_T3_16", + "IOB_X0Y104": "IO_L23P_T3_16" + }, + "sites": { + "IOB_X0Y103": "IOB33S", + "IOB_X0Y104": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 46, + "pin_functions": { + "IOB_X0Y105": "IO_L22N_T3_16", + "IOB_X0Y106": "IO_L22P_T3_16" + }, + "sites": { + "IOB_X0Y105": "IOB33S", + "IOB_X0Y106": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 44, + "pin_functions": { + "IOB_X0Y107": "IO_L21N_T3_DQS_16", + "IOB_X0Y108": "IO_L21P_T3_DQS_16" + }, + "sites": { + "IOB_X0Y107": "IOB33S", + "IOB_X0Y108": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 42, + "pin_functions": { + "IOB_X0Y109": "IO_L20N_T3_16", + "IOB_X0Y110": "IO_L20P_T3_16" + }, + "sites": { + "IOB_X0Y109": "IOB33S", + "IOB_X0Y110": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 40, + "pin_functions": { + "IOB_X0Y111": "IO_L19N_T3_VREF_16", + "IOB_X0Y112": "IO_L19P_T3_16" + }, + "sites": { + "IOB_X0Y111": "IOB33S", + "IOB_X0Y112": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 38, + "pin_functions": { + "IOB_X0Y113": "IO_L18N_T2_16", + "IOB_X0Y114": "IO_L18P_T2_16" + }, + "sites": { + "IOB_X0Y113": "IOB33S", + "IOB_X0Y114": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 36, + "pin_functions": { + "IOB_X0Y115": "IO_L17N_T2_16", + "IOB_X0Y116": "IO_L17P_T2_16" + }, + "sites": { + "IOB_X0Y115": "IOB33S", + "IOB_X0Y116": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 34, + "pin_functions": { + "IOB_X0Y117": "IO_L16N_T2_16", + "IOB_X0Y118": "IO_L16P_T2_16" + }, + "sites": { + "IOB_X0Y117": "IOB33S", + "IOB_X0Y118": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 32, + "pin_functions": { + "IOB_X0Y119": "IO_L15N_T2_DQS_16", + "IOB_X0Y120": "IO_L15P_T2_DQS_16" + }, + "sites": { + "IOB_X0Y119": "IOB33S", + "IOB_X0Y120": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 30, + "pin_functions": { + "IOB_X0Y121": "IO_L14N_T2_SRCC_16", + "IOB_X0Y122": "IO_L14P_T2_SRCC_16" + }, + "sites": { + "IOB_X0Y121": "IOB33S", + "IOB_X0Y122": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 28, + "pin_functions": { + "IOB_X0Y123": "IO_L13N_T2_MRCC_16", + "IOB_X0Y124": "IO_L13P_T2_MRCC_16" + }, + "sites": { + "IOB_X0Y123": "IOB33S", + "IOB_X0Y124": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 25, + "pin_functions": { + "IOB_X0Y125": "IO_L12N_T1_MRCC_16", + "IOB_X0Y126": "IO_L12P_T1_MRCC_16" + }, + "sites": { + "IOB_X0Y125": "IOB33S", + "IOB_X0Y126": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 23, + "pin_functions": { + "IOB_X0Y127": "IO_L11N_T1_SRCC_16", + "IOB_X0Y128": "IO_L11P_T1_SRCC_16" + }, + "sites": { + "IOB_X0Y127": "IOB33S", + "IOB_X0Y128": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 21, + "pin_functions": { + "IOB_X0Y129": "IO_L10N_T1_16", + "IOB_X0Y130": "IO_L10P_T1_16" + }, + "sites": { + "IOB_X0Y129": "IOB33S", + "IOB_X0Y130": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 19, + "pin_functions": { + "IOB_X0Y131": "IO_L9N_T1_DQS_16", + "IOB_X0Y132": "IO_L9P_T1_DQS_16" + }, + "sites": { + "IOB_X0Y131": "IOB33S", + "IOB_X0Y132": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 17, + "pin_functions": { + "IOB_X0Y133": "IO_L8N_T1_16", + "IOB_X0Y134": "IO_L8P_T1_16" + }, + "sites": { + "IOB_X0Y133": "IOB33S", + "IOB_X0Y134": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 15, + "pin_functions": { + "IOB_X0Y135": "IO_L7N_T1_16", + "IOB_X0Y136": "IO_L7P_T1_16" + }, + "sites": { + "IOB_X0Y135": "IOB33S", + "IOB_X0Y136": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 13, + "pin_functions": { + "IOB_X0Y137": "IO_L6N_T0_VREF_16", + "IOB_X0Y138": "IO_L6P_T0_16" + }, + "sites": { + "IOB_X0Y137": "IOB33S", + "IOB_X0Y138": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 11, + "pin_functions": { + "IOB_X0Y139": "IO_L5N_T0_16", + "IOB_X0Y140": "IO_L5P_T0_16" + }, + "sites": { + "IOB_X0Y139": "IOB33S", + "IOB_X0Y140": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 9, + "pin_functions": { + "IOB_X0Y141": "IO_L4N_T0_16", + "IOB_X0Y142": "IO_L4P_T0_16" + }, + "sites": { + "IOB_X0Y141": "IOB33S", + "IOB_X0Y142": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 7, + "pin_functions": { + "IOB_X0Y143": "IO_L3N_T0_DQS_16", + "IOB_X0Y144": "IO_L3P_T0_DQS_16" + }, + "sites": { + "IOB_X0Y143": "IOB33S", + "IOB_X0Y144": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 5, + "pin_functions": { + "IOB_X0Y145": "IO_L2N_T0_16", + "IOB_X0Y146": "IO_L2P_T0_16" + }, + "sites": { + "IOB_X0Y145": "IOB33S", + "IOB_X0Y146": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOB33_X0Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 0, + "grid_y": 3, + "pin_functions": { + "IOB_X0Y147": "IO_L1N_T0_16", + "IOB_X0Y148": "IO_L1P_T0_16" + }, + "sites": { + "IOB_X0Y147": "IOB33S", + "IOB_X0Y148": "IOB33M" + }, + "type": "LIOB33" + }, + "LIOI3_SING_X0Y0": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 2, + "type": "LIOI3" + }, + "baseaddr": "0x00400000", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y0": "IDELAYE2", + "ILOGIC_X0Y0": "ILOGICE3", + "OLOGIC_X0Y0": "OLOGICE3" + }, + "type": "LIOI3_SING" + }, + "LIOI3_SING_X0Y49": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "LIOI3" + }, + "baseaddr": "0x00400000", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y49": "IDELAYE2", + "ILOGIC_X0Y49": "ILOGICE3", + "OLOGIC_X0Y49": "OLOGICE3" + }, + "type": "LIOI3_SING" + }, + "LIOI3_SING_X0Y50": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 2, + "type": "LIOI3" + }, + "baseaddr": "0x00000000", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y50": "IDELAYE2", + "ILOGIC_X0Y50": "ILOGICE3", + "OLOGIC_X0Y50": "OLOGICE3" + }, + "type": "LIOI3_SING" + }, + "LIOI3_SING_X0Y99": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "LIOI3" + }, + "baseaddr": "0x00000000", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y99": "IDELAYE2", + "ILOGIC_X0Y99": "ILOGICE3", + "OLOGIC_X0Y99": "OLOGICE3" + }, + "type": "LIOI3_SING" + }, + "LIOI3_SING_X0Y100": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 2, + "type": "LIOI3" + }, + "baseaddr": "0x00020000", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 51, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y100": "IDELAYE2", + "ILOGIC_X0Y100": "ILOGICE3", + "OLOGIC_X0Y100": "OLOGICE3" + }, + "type": "LIOI3_SING" + }, + "LIOI3_SING_X0Y149": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "LIOI3" + }, + "baseaddr": "0x00020000", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 1, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y149": "IDELAYE2", + "ILOGIC_X0Y149": "ILOGICE3", + "OLOGIC_X0Y149": "OLOGICE3" + }, + "type": "LIOI3_SING" + }, + "LIOI3_TBYTESRC_X0Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y7": "IDELAYE2", + "IDELAY_X0Y8": "IDELAYE2", + "ILOGIC_X0Y7": "ILOGICE3", + "ILOGIC_X0Y8": "ILOGICE3", + "OLOGIC_X0Y7": "OLOGICE3", + "OLOGIC_X0Y8": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y19": "IDELAYE2", + "IDELAY_X0Y20": "IDELAYE2", + "ILOGIC_X0Y19": "ILOGICE3", + "ILOGIC_X0Y20": "ILOGICE3", + "OLOGIC_X0Y19": "OLOGICE3", + "OLOGIC_X0Y20": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y31": "IDELAYE2", + "IDELAY_X0Y32": "IDELAYE2", + "ILOGIC_X0Y31": "ILOGICE3", + "ILOGIC_X0Y32": "ILOGICE3", + "OLOGIC_X0Y31": "OLOGICE3", + "OLOGIC_X0Y32": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y43": "IDELAYE2", + "IDELAY_X0Y44": "IDELAYE2", + "ILOGIC_X0Y43": "ILOGICE3", + "ILOGIC_X0Y44": "ILOGICE3", + "OLOGIC_X0Y43": "OLOGICE3", + "OLOGIC_X0Y44": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y57": "IDELAYE2", + "IDELAY_X0Y58": "IDELAYE2", + "ILOGIC_X0Y57": "ILOGICE3", + "ILOGIC_X0Y58": "ILOGICE3", + "OLOGIC_X0Y57": "OLOGICE3", + "OLOGIC_X0Y58": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y69": "IDELAYE2", + "IDELAY_X0Y70": "IDELAYE2", + "ILOGIC_X0Y69": "ILOGICE3", + "ILOGIC_X0Y70": "ILOGICE3", + "OLOGIC_X0Y69": "OLOGICE3", + "OLOGIC_X0Y70": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y81": "IDELAYE2", + "IDELAY_X0Y82": "IDELAYE2", + "ILOGIC_X0Y81": "ILOGICE3", + "ILOGIC_X0Y82": "ILOGICE3", + "OLOGIC_X0Y81": "OLOGICE3", + "OLOGIC_X0Y82": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y93": "IDELAYE2", + "IDELAY_X0Y94": "IDELAYE2", + "ILOGIC_X0Y93": "ILOGICE3", + "ILOGIC_X0Y94": "ILOGICE3", + "OLOGIC_X0Y93": "OLOGICE3", + "OLOGIC_X0Y94": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y107": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 44, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y107": "IDELAYE2", + "IDELAY_X0Y108": "IDELAYE2", + "ILOGIC_X0Y107": "ILOGICE3", + "ILOGIC_X0Y108": "ILOGICE3", + "OLOGIC_X0Y107": "OLOGICE3", + "OLOGIC_X0Y108": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y119": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 32, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y119": "IDELAYE2", + "IDELAY_X0Y120": "IDELAYE2", + "ILOGIC_X0Y119": "ILOGICE3", + "ILOGIC_X0Y120": "ILOGICE3", + "OLOGIC_X0Y119": "OLOGICE3", + "OLOGIC_X0Y120": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y131": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 19, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y131": "IDELAYE2", + "IDELAY_X0Y132": "IDELAYE2", + "ILOGIC_X0Y131": "ILOGICE3", + "ILOGIC_X0Y132": "ILOGICE3", + "OLOGIC_X0Y131": "OLOGICE3", + "OLOGIC_X0Y132": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTESRC_X0Y143": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 7, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y143": "IDELAYE2", + "IDELAY_X0Y144": "IDELAYE2", + "ILOGIC_X0Y143": "ILOGICE3", + "ILOGIC_X0Y144": "ILOGICE3", + "OLOGIC_X0Y143": "OLOGICE3", + "OLOGIC_X0Y144": "OLOGICE3" + }, + "type": "LIOI3_TBYTESRC" + }, + "LIOI3_TBYTETERM_X0Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y13": "IDELAYE2", + "IDELAY_X0Y14": "IDELAYE2", + "ILOGIC_X0Y13": "ILOGICE3", + "ILOGIC_X0Y14": "ILOGICE3", + "OLOGIC_X0Y13": "OLOGICE3", + "OLOGIC_X0Y14": "OLOGICE3" + }, + "type": "LIOI3_TBYTETERM" + }, + "LIOI3_TBYTETERM_X0Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y37": "IDELAYE2", + "IDELAY_X0Y38": "IDELAYE2", + "ILOGIC_X0Y37": "ILOGICE3", + "ILOGIC_X0Y38": "ILOGICE3", + "OLOGIC_X0Y37": "OLOGICE3", + "OLOGIC_X0Y38": "OLOGICE3" + }, + "type": "LIOI3_TBYTETERM" + }, + "LIOI3_TBYTETERM_X0Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y63": "IDELAYE2", + "IDELAY_X0Y64": "IDELAYE2", + "ILOGIC_X0Y63": "ILOGICE3", + "ILOGIC_X0Y64": "ILOGICE3", + "OLOGIC_X0Y63": "OLOGICE3", + "OLOGIC_X0Y64": "OLOGICE3" + }, + "type": "LIOI3_TBYTETERM" + }, + "LIOI3_TBYTETERM_X0Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y87": "IDELAYE2", + "IDELAY_X0Y88": "IDELAYE2", + "ILOGIC_X0Y87": "ILOGICE3", + "ILOGIC_X0Y88": "ILOGICE3", + "OLOGIC_X0Y87": "OLOGICE3", + "OLOGIC_X0Y88": "OLOGICE3" + }, + "type": "LIOI3_TBYTETERM" + }, + "LIOI3_TBYTETERM_X0Y113": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 38, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y113": "IDELAYE2", + "IDELAY_X0Y114": "IDELAYE2", + "ILOGIC_X0Y113": "ILOGICE3", + "ILOGIC_X0Y114": "ILOGICE3", + "OLOGIC_X0Y113": "OLOGICE3", + "OLOGIC_X0Y114": "OLOGICE3" + }, + "type": "LIOI3_TBYTETERM" + }, + "LIOI3_TBYTETERM_X0Y137": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 13, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y137": "IDELAYE2", + "IDELAY_X0Y138": "IDELAYE2", + "ILOGIC_X0Y137": "ILOGICE3", + "ILOGIC_X0Y138": "ILOGICE3", + "OLOGIC_X0Y137": "OLOGICE3", + "OLOGIC_X0Y138": "OLOGICE3" + }, + "type": "LIOI3_TBYTETERM" + }, + "LIOI3_X0Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y1": "IDELAYE2", + "IDELAY_X0Y2": "IDELAYE2", + "ILOGIC_X0Y1": "ILOGICE3", + "ILOGIC_X0Y2": "ILOGICE3", + "OLOGIC_X0Y1": "OLOGICE3", + "OLOGIC_X0Y2": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y3": "IDELAYE2", + "IDELAY_X0Y4": "IDELAYE2", + "ILOGIC_X0Y3": "ILOGICE3", + "ILOGIC_X0Y4": "ILOGICE3", + "OLOGIC_X0Y3": "OLOGICE3", + "OLOGIC_X0Y4": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y5": "IDELAYE2", + "IDELAY_X0Y6": "IDELAYE2", + "ILOGIC_X0Y5": "ILOGICE3", + "ILOGIC_X0Y6": "ILOGICE3", + "OLOGIC_X0Y5": "OLOGICE3", + "OLOGIC_X0Y6": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y9": "IDELAYE2", + "IDELAY_X0Y10": "IDELAYE2", + "ILOGIC_X0Y9": "ILOGICE3", + "ILOGIC_X0Y10": "ILOGICE3", + "OLOGIC_X0Y9": "OLOGICE3", + "OLOGIC_X0Y10": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y11": "IDELAYE2", + "IDELAY_X0Y12": "IDELAYE2", + "ILOGIC_X0Y11": "ILOGICE3", + "ILOGIC_X0Y12": "ILOGICE3", + "OLOGIC_X0Y11": "OLOGICE3", + "OLOGIC_X0Y12": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y15": "IDELAYE2", + "IDELAY_X0Y16": "IDELAYE2", + "ILOGIC_X0Y15": "ILOGICE3", + "ILOGIC_X0Y16": "ILOGICE3", + "OLOGIC_X0Y15": "OLOGICE3", + "OLOGIC_X0Y16": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y17": "IDELAYE2", + "IDELAY_X0Y18": "IDELAYE2", + "ILOGIC_X0Y17": "ILOGICE3", + "ILOGIC_X0Y18": "ILOGICE3", + "OLOGIC_X0Y17": "OLOGICE3", + "OLOGIC_X0Y18": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y21": "IDELAYE2", + "IDELAY_X0Y22": "IDELAYE2", + "ILOGIC_X0Y21": "ILOGICE3", + "ILOGIC_X0Y22": "ILOGICE3", + "OLOGIC_X0Y21": "OLOGICE3", + "OLOGIC_X0Y22": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y23": "IDELAYE2", + "IDELAY_X0Y24": "IDELAYE2", + "ILOGIC_X0Y23": "ILOGICE3", + "ILOGIC_X0Y24": "ILOGICE3", + "OLOGIC_X0Y23": "OLOGICE3", + "OLOGIC_X0Y24": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y25": "IDELAYE2", + "IDELAY_X0Y26": "IDELAYE2", + "ILOGIC_X0Y25": "ILOGICE3", + "ILOGIC_X0Y26": "ILOGICE3", + "OLOGIC_X0Y25": "OLOGICE3", + "OLOGIC_X0Y26": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y27": "IDELAYE2", + "IDELAY_X0Y28": "IDELAYE2", + "ILOGIC_X0Y27": "ILOGICE3", + "ILOGIC_X0Y28": "ILOGICE3", + "OLOGIC_X0Y27": "OLOGICE3", + "OLOGIC_X0Y28": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y29": "IDELAYE2", + "IDELAY_X0Y30": "IDELAYE2", + "ILOGIC_X0Y29": "ILOGICE3", + "ILOGIC_X0Y30": "ILOGICE3", + "OLOGIC_X0Y29": "OLOGICE3", + "OLOGIC_X0Y30": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y33": "IDELAYE2", + "IDELAY_X0Y34": "IDELAYE2", + "ILOGIC_X0Y33": "ILOGICE3", + "ILOGIC_X0Y34": "ILOGICE3", + "OLOGIC_X0Y33": "OLOGICE3", + "OLOGIC_X0Y34": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y35": "IDELAYE2", + "IDELAY_X0Y36": "IDELAYE2", + "ILOGIC_X0Y35": "ILOGICE3", + "ILOGIC_X0Y36": "ILOGICE3", + "OLOGIC_X0Y35": "OLOGICE3", + "OLOGIC_X0Y36": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y39": "IDELAYE2", + "IDELAY_X0Y40": "IDELAYE2", + "ILOGIC_X0Y39": "ILOGICE3", + "ILOGIC_X0Y40": "ILOGICE3", + "OLOGIC_X0Y39": "OLOGICE3", + "OLOGIC_X0Y40": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y41": "IDELAYE2", + "IDELAY_X0Y42": "IDELAYE2", + "ILOGIC_X0Y41": "ILOGICE3", + "ILOGIC_X0Y42": "ILOGICE3", + "OLOGIC_X0Y41": "OLOGICE3", + "OLOGIC_X0Y42": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y45": "IDELAYE2", + "IDELAY_X0Y46": "IDELAYE2", + "ILOGIC_X0Y45": "ILOGICE3", + "ILOGIC_X0Y46": "ILOGICE3", + "OLOGIC_X0Y45": "OLOGICE3", + "OLOGIC_X0Y46": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00400000", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X0Y0", + "grid_x": 1, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y47": "IDELAYE2", + "IDELAY_X0Y48": "IDELAYE2", + "ILOGIC_X0Y47": "ILOGICE3", + "ILOGIC_X0Y48": "ILOGICE3", + "OLOGIC_X0Y47": "OLOGICE3", + "OLOGIC_X0Y48": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y51": "IDELAYE2", + "IDELAY_X0Y52": "IDELAYE2", + "ILOGIC_X0Y51": "ILOGICE3", + "ILOGIC_X0Y52": "ILOGICE3", + "OLOGIC_X0Y51": "OLOGICE3", + "OLOGIC_X0Y52": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y53": "IDELAYE2", + "IDELAY_X0Y54": "IDELAYE2", + "ILOGIC_X0Y53": "ILOGICE3", + "ILOGIC_X0Y54": "ILOGICE3", + "OLOGIC_X0Y53": "OLOGICE3", + "OLOGIC_X0Y54": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y55": "IDELAYE2", + "IDELAY_X0Y56": "IDELAYE2", + "ILOGIC_X0Y55": "ILOGICE3", + "ILOGIC_X0Y56": "ILOGICE3", + "OLOGIC_X0Y55": "OLOGICE3", + "OLOGIC_X0Y56": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y59": "IDELAYE2", + "IDELAY_X0Y60": "IDELAYE2", + "ILOGIC_X0Y59": "ILOGICE3", + "ILOGIC_X0Y60": "ILOGICE3", + "OLOGIC_X0Y59": "OLOGICE3", + "OLOGIC_X0Y60": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y61": "IDELAYE2", + "IDELAY_X0Y62": "IDELAYE2", + "ILOGIC_X0Y61": "ILOGICE3", + "ILOGIC_X0Y62": "ILOGICE3", + "OLOGIC_X0Y61": "OLOGICE3", + "OLOGIC_X0Y62": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y65": "IDELAYE2", + "IDELAY_X0Y66": "IDELAYE2", + "ILOGIC_X0Y65": "ILOGICE3", + "ILOGIC_X0Y66": "ILOGICE3", + "OLOGIC_X0Y65": "OLOGICE3", + "OLOGIC_X0Y66": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y67": "IDELAYE2", + "IDELAY_X0Y68": "IDELAYE2", + "ILOGIC_X0Y67": "ILOGICE3", + "ILOGIC_X0Y68": "ILOGICE3", + "OLOGIC_X0Y67": "OLOGICE3", + "OLOGIC_X0Y68": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y71": "IDELAYE2", + "IDELAY_X0Y72": "IDELAYE2", + "ILOGIC_X0Y71": "ILOGICE3", + "ILOGIC_X0Y72": "ILOGICE3", + "OLOGIC_X0Y71": "OLOGICE3", + "OLOGIC_X0Y72": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y73": "IDELAYE2", + "IDELAY_X0Y74": "IDELAYE2", + "ILOGIC_X0Y73": "ILOGICE3", + "ILOGIC_X0Y74": "ILOGICE3", + "OLOGIC_X0Y73": "OLOGICE3", + "OLOGIC_X0Y74": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y75": "IDELAYE2", + "IDELAY_X0Y76": "IDELAYE2", + "ILOGIC_X0Y75": "ILOGICE3", + "ILOGIC_X0Y76": "ILOGICE3", + "OLOGIC_X0Y75": "OLOGICE3", + "OLOGIC_X0Y76": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y77": "IDELAYE2", + "IDELAY_X0Y78": "IDELAYE2", + "ILOGIC_X0Y77": "ILOGICE3", + "ILOGIC_X0Y78": "ILOGICE3", + "OLOGIC_X0Y77": "OLOGICE3", + "OLOGIC_X0Y78": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y79": "IDELAYE2", + "IDELAY_X0Y80": "IDELAYE2", + "ILOGIC_X0Y79": "ILOGICE3", + "ILOGIC_X0Y80": "ILOGICE3", + "OLOGIC_X0Y79": "OLOGICE3", + "OLOGIC_X0Y80": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y83": "IDELAYE2", + "IDELAY_X0Y84": "IDELAYE2", + "ILOGIC_X0Y83": "ILOGICE3", + "ILOGIC_X0Y84": "ILOGICE3", + "OLOGIC_X0Y83": "OLOGICE3", + "OLOGIC_X0Y84": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y85": "IDELAYE2", + "IDELAY_X0Y86": "IDELAYE2", + "ILOGIC_X0Y85": "ILOGICE3", + "ILOGIC_X0Y86": "ILOGICE3", + "OLOGIC_X0Y85": "OLOGICE3", + "OLOGIC_X0Y86": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y89": "IDELAYE2", + "IDELAY_X0Y90": "IDELAYE2", + "ILOGIC_X0Y89": "ILOGICE3", + "ILOGIC_X0Y90": "ILOGICE3", + "OLOGIC_X0Y89": "OLOGICE3", + "OLOGIC_X0Y90": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y91": "IDELAYE2", + "IDELAY_X0Y92": "IDELAYE2", + "ILOGIC_X0Y91": "ILOGICE3", + "ILOGIC_X0Y92": "ILOGICE3", + "OLOGIC_X0Y91": "OLOGICE3", + "OLOGIC_X0Y92": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y95": "IDELAYE2", + "IDELAY_X0Y96": "IDELAYE2", + "ILOGIC_X0Y95": "ILOGICE3", + "ILOGIC_X0Y96": "ILOGICE3", + "OLOGIC_X0Y95": "OLOGICE3", + "OLOGIC_X0Y96": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000000", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X0Y1", + "grid_x": 1, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y97": "IDELAYE2", + "IDELAY_X0Y98": "IDELAYE2", + "ILOGIC_X0Y97": "ILOGICE3", + "ILOGIC_X0Y98": "ILOGICE3", + "OLOGIC_X0Y97": "OLOGICE3", + "OLOGIC_X0Y98": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y101": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 50, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y101": "IDELAYE2", + "IDELAY_X0Y102": "IDELAYE2", + "ILOGIC_X0Y101": "ILOGICE3", + "ILOGIC_X0Y102": "ILOGICE3", + "OLOGIC_X0Y101": "OLOGICE3", + "OLOGIC_X0Y102": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y103": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 48, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y103": "IDELAYE2", + "IDELAY_X0Y104": "IDELAYE2", + "ILOGIC_X0Y103": "ILOGICE3", + "ILOGIC_X0Y104": "ILOGICE3", + "OLOGIC_X0Y103": "OLOGICE3", + "OLOGIC_X0Y104": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y105": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 46, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y105": "IDELAYE2", + "IDELAY_X0Y106": "IDELAYE2", + "ILOGIC_X0Y105": "ILOGICE3", + "ILOGIC_X0Y106": "ILOGICE3", + "OLOGIC_X0Y105": "OLOGICE3", + "OLOGIC_X0Y106": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y109": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 42, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y109": "IDELAYE2", + "IDELAY_X0Y110": "IDELAYE2", + "ILOGIC_X0Y109": "ILOGICE3", + "ILOGIC_X0Y110": "ILOGICE3", + "OLOGIC_X0Y109": "OLOGICE3", + "OLOGIC_X0Y110": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y111": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 40, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y111": "IDELAYE2", + "IDELAY_X0Y112": "IDELAYE2", + "ILOGIC_X0Y111": "ILOGICE3", + "ILOGIC_X0Y112": "ILOGICE3", + "OLOGIC_X0Y111": "OLOGICE3", + "OLOGIC_X0Y112": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y115": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 36, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y115": "IDELAYE2", + "IDELAY_X0Y116": "IDELAYE2", + "ILOGIC_X0Y115": "ILOGICE3", + "ILOGIC_X0Y116": "ILOGICE3", + "OLOGIC_X0Y115": "OLOGICE3", + "OLOGIC_X0Y116": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y117": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 34, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y117": "IDELAYE2", + "IDELAY_X0Y118": "IDELAYE2", + "ILOGIC_X0Y117": "ILOGICE3", + "ILOGIC_X0Y118": "ILOGICE3", + "OLOGIC_X0Y117": "OLOGICE3", + "OLOGIC_X0Y118": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y121": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 30, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y121": "IDELAYE2", + "IDELAY_X0Y122": "IDELAYE2", + "ILOGIC_X0Y121": "ILOGICE3", + "ILOGIC_X0Y122": "ILOGICE3", + "OLOGIC_X0Y121": "OLOGICE3", + "OLOGIC_X0Y122": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y123": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 28, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y123": "IDELAYE2", + "IDELAY_X0Y124": "IDELAYE2", + "ILOGIC_X0Y123": "ILOGICE3", + "ILOGIC_X0Y124": "ILOGICE3", + "OLOGIC_X0Y123": "OLOGICE3", + "OLOGIC_X0Y124": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y125": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 25, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y125": "IDELAYE2", + "IDELAY_X0Y126": "IDELAYE2", + "ILOGIC_X0Y125": "ILOGICE3", + "ILOGIC_X0Y126": "ILOGICE3", + "OLOGIC_X0Y125": "OLOGICE3", + "OLOGIC_X0Y126": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y127": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 23, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y127": "IDELAYE2", + "IDELAY_X0Y128": "IDELAYE2", + "ILOGIC_X0Y127": "ILOGICE3", + "ILOGIC_X0Y128": "ILOGICE3", + "OLOGIC_X0Y127": "OLOGICE3", + "OLOGIC_X0Y128": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y129": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 21, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y129": "IDELAYE2", + "IDELAY_X0Y130": "IDELAYE2", + "ILOGIC_X0Y129": "ILOGICE3", + "ILOGIC_X0Y130": "ILOGICE3", + "OLOGIC_X0Y129": "OLOGICE3", + "OLOGIC_X0Y130": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y133": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 17, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y133": "IDELAYE2", + "IDELAY_X0Y134": "IDELAYE2", + "ILOGIC_X0Y133": "ILOGICE3", + "ILOGIC_X0Y134": "ILOGICE3", + "OLOGIC_X0Y133": "OLOGICE3", + "OLOGIC_X0Y134": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y135": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 15, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y135": "IDELAYE2", + "IDELAY_X0Y136": "IDELAYE2", + "ILOGIC_X0Y135": "ILOGICE3", + "ILOGIC_X0Y136": "ILOGICE3", + "OLOGIC_X0Y135": "OLOGICE3", + "OLOGIC_X0Y136": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y139": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 11, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y139": "IDELAYE2", + "IDELAY_X0Y140": "IDELAYE2", + "ILOGIC_X0Y139": "ILOGICE3", + "ILOGIC_X0Y140": "ILOGICE3", + "OLOGIC_X0Y139": "OLOGICE3", + "OLOGIC_X0Y140": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y141": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 9, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y141": "IDELAYE2", + "IDELAY_X0Y142": "IDELAYE2", + "ILOGIC_X0Y141": "ILOGICE3", + "ILOGIC_X0Y142": "ILOGICE3", + "OLOGIC_X0Y141": "OLOGICE3", + "OLOGIC_X0Y142": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y145": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 5, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y145": "IDELAYE2", + "IDELAY_X0Y146": "IDELAYE2", + "ILOGIC_X0Y145": "ILOGICE3", + "ILOGIC_X0Y146": "ILOGICE3", + "OLOGIC_X0Y145": "OLOGICE3", + "OLOGIC_X0Y146": "OLOGICE3" + }, + "type": "LIOI3" + }, + "LIOI3_X0Y147": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00020000", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X0Y2", + "grid_x": 1, + "grid_y": 3, + "pin_functions": {}, + "sites": { + "IDELAY_X0Y147": "IDELAYE2", + "IDELAY_X0Y148": "IDELAYE2", + "ILOGIC_X0Y147": "ILOGICE3", + "ILOGIC_X0Y148": "ILOGICE3", + "OLOGIC_X0Y147": "OLOGICE3", + "OLOGIC_X0Y148": "OLOGICE3" + }, + "type": "LIOI3" + }, + "L_TERM_INT_X2Y1": { + "bits": {}, + "grid_x": 2, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y2": { + "bits": {}, + "grid_x": 2, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y3": { + "bits": {}, + "grid_x": 2, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y4": { + "bits": {}, + "grid_x": 2, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y5": { + "bits": {}, + "grid_x": 2, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y6": { + "bits": {}, + "grid_x": 2, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y7": { + "bits": {}, + "grid_x": 2, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y8": { + "bits": {}, + "grid_x": 2, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y9": { + "bits": {}, + "grid_x": 2, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y10": { + "bits": {}, + "grid_x": 2, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y11": { + "bits": {}, + "grid_x": 2, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y12": { + "bits": {}, + "grid_x": 2, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y13": { + "bits": {}, + "grid_x": 2, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y14": { + "bits": {}, + "grid_x": 2, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y15": { + "bits": {}, + "grid_x": 2, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y16": { + "bits": {}, + "grid_x": 2, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y17": { + "bits": {}, + "grid_x": 2, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y18": { + "bits": {}, + "grid_x": 2, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y19": { + "bits": {}, + "grid_x": 2, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y20": { + "bits": {}, + "grid_x": 2, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y21": { + "bits": {}, + "grid_x": 2, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y22": { + "bits": {}, + "grid_x": 2, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y23": { + "bits": {}, + "grid_x": 2, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y24": { + "bits": {}, + "grid_x": 2, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y25": { + "bits": {}, + "grid_x": 2, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y27": { + "bits": {}, + "grid_x": 2, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y28": { + "bits": {}, + "grid_x": 2, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y29": { + "bits": {}, + "grid_x": 2, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y30": { + "bits": {}, + "grid_x": 2, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y31": { + "bits": {}, + "grid_x": 2, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y32": { + "bits": {}, + "grid_x": 2, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y33": { + "bits": {}, + "grid_x": 2, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y34": { + "bits": {}, + "grid_x": 2, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y35": { + "bits": {}, + "grid_x": 2, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y36": { + "bits": {}, + "grid_x": 2, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y37": { + "bits": {}, + "grid_x": 2, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y38": { + "bits": {}, + "grid_x": 2, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y39": { + "bits": {}, + "grid_x": 2, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y40": { + "bits": {}, + "grid_x": 2, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y41": { + "bits": {}, + "grid_x": 2, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y42": { + "bits": {}, + "grid_x": 2, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y43": { + "bits": {}, + "grid_x": 2, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y44": { + "bits": {}, + "grid_x": 2, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y45": { + "bits": {}, + "grid_x": 2, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y46": { + "bits": {}, + "grid_x": 2, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y47": { + "bits": {}, + "grid_x": 2, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y48": { + "bits": {}, + "grid_x": 2, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y49": { + "bits": {}, + "grid_x": 2, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y50": { + "bits": {}, + "grid_x": 2, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y51": { + "bits": {}, + "grid_x": 2, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y53": { + "bits": {}, + "grid_x": 2, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y54": { + "bits": {}, + "grid_x": 2, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y55": { + "bits": {}, + "grid_x": 2, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y56": { + "bits": {}, + "grid_x": 2, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y57": { + "bits": {}, + "grid_x": 2, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y58": { + "bits": {}, + "grid_x": 2, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y59": { + "bits": {}, + "grid_x": 2, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y60": { + "bits": {}, + "grid_x": 2, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y61": { + "bits": {}, + "grid_x": 2, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y62": { + "bits": {}, + "grid_x": 2, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y63": { + "bits": {}, + "grid_x": 2, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y64": { + "bits": {}, + "grid_x": 2, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y65": { + "bits": {}, + "grid_x": 2, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y66": { + "bits": {}, + "grid_x": 2, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y67": { + "bits": {}, + "grid_x": 2, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y68": { + "bits": {}, + "grid_x": 2, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y69": { + "bits": {}, + "grid_x": 2, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y70": { + "bits": {}, + "grid_x": 2, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y71": { + "bits": {}, + "grid_x": 2, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y72": { + "bits": {}, + "grid_x": 2, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y73": { + "bits": {}, + "grid_x": 2, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y74": { + "bits": {}, + "grid_x": 2, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y75": { + "bits": {}, + "grid_x": 2, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y76": { + "bits": {}, + "grid_x": 2, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y77": { + "bits": {}, + "grid_x": 2, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y79": { + "bits": {}, + "grid_x": 2, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y80": { + "bits": {}, + "grid_x": 2, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y81": { + "bits": {}, + "grid_x": 2, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y82": { + "bits": {}, + "grid_x": 2, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y83": { + "bits": {}, + "grid_x": 2, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y84": { + "bits": {}, + "grid_x": 2, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y85": { + "bits": {}, + "grid_x": 2, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y86": { + "bits": {}, + "grid_x": 2, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y87": { + "bits": {}, + "grid_x": 2, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y88": { + "bits": {}, + "grid_x": 2, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y89": { + "bits": {}, + "grid_x": 2, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y90": { + "bits": {}, + "grid_x": 2, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y91": { + "bits": {}, + "grid_x": 2, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y92": { + "bits": {}, + "grid_x": 2, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y93": { + "bits": {}, + "grid_x": 2, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y94": { + "bits": {}, + "grid_x": 2, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y95": { + "bits": {}, + "grid_x": 2, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y96": { + "bits": {}, + "grid_x": 2, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y97": { + "bits": {}, + "grid_x": 2, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y98": { + "bits": {}, + "grid_x": 2, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y99": { + "bits": {}, + "grid_x": 2, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y100": { + "bits": {}, + "grid_x": 2, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y101": { + "bits": {}, + "grid_x": 2, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y102": { + "bits": {}, + "grid_x": 2, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y103": { + "bits": {}, + "grid_x": 2, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y105": { + "bits": {}, + "grid_x": 2, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y106": { + "bits": {}, + "grid_x": 2, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y107": { + "bits": {}, + "grid_x": 2, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y108": { + "bits": {}, + "grid_x": 2, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y109": { + "bits": {}, + "grid_x": 2, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y110": { + "bits": {}, + "grid_x": 2, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y111": { + "bits": {}, + "grid_x": 2, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y112": { + "bits": {}, + "grid_x": 2, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y113": { + "bits": {}, + "grid_x": 2, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y114": { + "bits": {}, + "grid_x": 2, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y115": { + "bits": {}, + "grid_x": 2, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y116": { + "bits": {}, + "grid_x": 2, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y117": { + "bits": {}, + "grid_x": 2, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y118": { + "bits": {}, + "grid_x": 2, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y119": { + "bits": {}, + "grid_x": 2, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y120": { + "bits": {}, + "grid_x": 2, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y121": { + "bits": {}, + "grid_x": 2, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y122": { + "bits": {}, + "grid_x": 2, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y123": { + "bits": {}, + "grid_x": 2, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y124": { + "bits": {}, + "grid_x": 2, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y125": { + "bits": {}, + "grid_x": 2, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y126": { + "bits": {}, + "grid_x": 2, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y127": { + "bits": {}, + "grid_x": 2, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y128": { + "bits": {}, + "grid_x": 2, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y129": { + "bits": {}, + "grid_x": 2, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y131": { + "bits": {}, + "grid_x": 2, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y132": { + "bits": {}, + "grid_x": 2, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y133": { + "bits": {}, + "grid_x": 2, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y134": { + "bits": {}, + "grid_x": 2, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y135": { + "bits": {}, + "grid_x": 2, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y136": { + "bits": {}, + "grid_x": 2, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y137": { + "bits": {}, + "grid_x": 2, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y138": { + "bits": {}, + "grid_x": 2, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y139": { + "bits": {}, + "grid_x": 2, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y140": { + "bits": {}, + "grid_x": 2, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y141": { + "bits": {}, + "grid_x": 2, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y142": { + "bits": {}, + "grid_x": 2, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y143": { + "bits": {}, + "grid_x": 2, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y144": { + "bits": {}, + "grid_x": 2, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y145": { + "bits": {}, + "grid_x": 2, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y146": { + "bits": {}, + "grid_x": 2, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y147": { + "bits": {}, + "grid_x": 2, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y148": { + "bits": {}, + "grid_x": 2, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y149": { + "bits": {}, + "grid_x": 2, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y150": { + "bits": {}, + "grid_x": 2, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y151": { + "bits": {}, + "grid_x": 2, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y152": { + "bits": {}, + "grid_x": 2, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y153": { + "bits": {}, + "grid_x": 2, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y154": { + "bits": {}, + "grid_x": 2, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "L_TERM_INT_X2Y155": { + "bits": {}, + "grid_x": 2, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "L_TERM_INT" + }, + "MONITOR_BOT_X46Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00000900", + "frames": 30, + "offset": 0, + "words": 101 + } + }, + "clock_region": "X0Y1", + "grid_x": 46, + "grid_y": 77, + "pin_functions": { + "IPAD_X0Y0": "VP_0", + "IPAD_X0Y1": "VN_0" + }, + "sites": { + "IPAD_X0Y0": "IPAD", + "IPAD_X0Y1": "IPAD", + "XADC_X0Y0": "XADC" + }, + "type": "MONITOR_BOT" + }, + "MONITOR_MID_X46Y89": { + "bits": {}, + "grid_x": 46, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "MONITOR_MID" + }, + "MONITOR_TOP_X46Y99": { + "bits": {}, + "grid_x": 46, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "MONITOR_TOP" + }, + "NULL_X0Y0": { + "bits": {}, + "grid_x": 0, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y3": { + "bits": {}, + "grid_x": 0, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y5": { + "bits": {}, + "grid_x": 0, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y7": { + "bits": {}, + "grid_x": 0, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y9": { + "bits": {}, + "grid_x": 0, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y11": { + "bits": {}, + "grid_x": 0, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y13": { + "bits": {}, + "grid_x": 0, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y15": { + "bits": {}, + "grid_x": 0, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y17": { + "bits": {}, + "grid_x": 0, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y19": { + "bits": {}, + "grid_x": 0, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y21": { + "bits": {}, + "grid_x": 0, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y23": { + "bits": {}, + "grid_x": 0, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y25": { + "bits": {}, + "grid_x": 0, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y28": { + "bits": {}, + "grid_x": 0, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y30": { + "bits": {}, + "grid_x": 0, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y32": { + "bits": {}, + "grid_x": 0, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y34": { + "bits": {}, + "grid_x": 0, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y36": { + "bits": {}, + "grid_x": 0, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y38": { + "bits": {}, + "grid_x": 0, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y40": { + "bits": {}, + "grid_x": 0, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y42": { + "bits": {}, + "grid_x": 0, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y44": { + "bits": {}, + "grid_x": 0, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y46": { + "bits": {}, + "grid_x": 0, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y48": { + "bits": {}, + "grid_x": 0, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y50": { + "bits": {}, + "grid_x": 0, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y52": { + "bits": {}, + "grid_x": 0, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y55": { + "bits": {}, + "grid_x": 0, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y57": { + "bits": {}, + "grid_x": 0, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y59": { + "bits": {}, + "grid_x": 0, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y61": { + "bits": {}, + "grid_x": 0, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y63": { + "bits": {}, + "grid_x": 0, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y65": { + "bits": {}, + "grid_x": 0, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y67": { + "bits": {}, + "grid_x": 0, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y69": { + "bits": {}, + "grid_x": 0, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y71": { + "bits": {}, + "grid_x": 0, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y73": { + "bits": {}, + "grid_x": 0, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y75": { + "bits": {}, + "grid_x": 0, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y77": { + "bits": {}, + "grid_x": 0, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y80": { + "bits": {}, + "grid_x": 0, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y82": { + "bits": {}, + "grid_x": 0, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y84": { + "bits": {}, + "grid_x": 0, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y86": { + "bits": {}, + "grid_x": 0, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y88": { + "bits": {}, + "grid_x": 0, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y90": { + "bits": {}, + "grid_x": 0, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y92": { + "bits": {}, + "grid_x": 0, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y94": { + "bits": {}, + "grid_x": 0, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y96": { + "bits": {}, + "grid_x": 0, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y98": { + "bits": {}, + "grid_x": 0, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y100": { + "bits": {}, + "grid_x": 0, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y102": { + "bits": {}, + "grid_x": 0, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y104": { + "bits": {}, + "grid_x": 0, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y107": { + "bits": {}, + "grid_x": 0, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y109": { + "bits": {}, + "grid_x": 0, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y111": { + "bits": {}, + "grid_x": 0, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y113": { + "bits": {}, + "grid_x": 0, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y115": { + "bits": {}, + "grid_x": 0, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y117": { + "bits": {}, + "grid_x": 0, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y119": { + "bits": {}, + "grid_x": 0, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y121": { + "bits": {}, + "grid_x": 0, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y123": { + "bits": {}, + "grid_x": 0, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y125": { + "bits": {}, + "grid_x": 0, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y127": { + "bits": {}, + "grid_x": 0, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y129": { + "bits": {}, + "grid_x": 0, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y132": { + "bits": {}, + "grid_x": 0, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y134": { + "bits": {}, + "grid_x": 0, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y136": { + "bits": {}, + "grid_x": 0, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y138": { + "bits": {}, + "grid_x": 0, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y140": { + "bits": {}, + "grid_x": 0, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y142": { + "bits": {}, + "grid_x": 0, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y144": { + "bits": {}, + "grid_x": 0, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y146": { + "bits": {}, + "grid_x": 0, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y148": { + "bits": {}, + "grid_x": 0, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y150": { + "bits": {}, + "grid_x": 0, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y152": { + "bits": {}, + "grid_x": 0, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y154": { + "bits": {}, + "grid_x": 0, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X0Y156": { + "bits": {}, + "grid_x": 0, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y0": { + "bits": {}, + "grid_x": 1, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y3": { + "bits": {}, + "grid_x": 1, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y5": { + "bits": {}, + "grid_x": 1, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y7": { + "bits": {}, + "grid_x": 1, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y9": { + "bits": {}, + "grid_x": 1, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y11": { + "bits": {}, + "grid_x": 1, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y13": { + "bits": {}, + "grid_x": 1, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y15": { + "bits": {}, + "grid_x": 1, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y17": { + "bits": {}, + "grid_x": 1, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y19": { + "bits": {}, + "grid_x": 1, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y21": { + "bits": {}, + "grid_x": 1, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y23": { + "bits": {}, + "grid_x": 1, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y25": { + "bits": {}, + "grid_x": 1, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y28": { + "bits": {}, + "grid_x": 1, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y30": { + "bits": {}, + "grid_x": 1, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y32": { + "bits": {}, + "grid_x": 1, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y34": { + "bits": {}, + "grid_x": 1, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y36": { + "bits": {}, + "grid_x": 1, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y38": { + "bits": {}, + "grid_x": 1, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y40": { + "bits": {}, + "grid_x": 1, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y42": { + "bits": {}, + "grid_x": 1, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y44": { + "bits": {}, + "grid_x": 1, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y46": { + "bits": {}, + "grid_x": 1, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y48": { + "bits": {}, + "grid_x": 1, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y50": { + "bits": {}, + "grid_x": 1, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y52": { + "bits": {}, + "grid_x": 1, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y55": { + "bits": {}, + "grid_x": 1, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y57": { + "bits": {}, + "grid_x": 1, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y59": { + "bits": {}, + "grid_x": 1, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y61": { + "bits": {}, + "grid_x": 1, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y63": { + "bits": {}, + "grid_x": 1, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y65": { + "bits": {}, + "grid_x": 1, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y67": { + "bits": {}, + "grid_x": 1, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y69": { + "bits": {}, + "grid_x": 1, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y71": { + "bits": {}, + "grid_x": 1, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y73": { + "bits": {}, + "grid_x": 1, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y75": { + "bits": {}, + "grid_x": 1, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y77": { + "bits": {}, + "grid_x": 1, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y80": { + "bits": {}, + "grid_x": 1, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y82": { + "bits": {}, + "grid_x": 1, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y84": { + "bits": {}, + "grid_x": 1, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y86": { + "bits": {}, + "grid_x": 1, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y88": { + "bits": {}, + "grid_x": 1, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y90": { + "bits": {}, + "grid_x": 1, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y92": { + "bits": {}, + "grid_x": 1, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y94": { + "bits": {}, + "grid_x": 1, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y96": { + "bits": {}, + "grid_x": 1, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y98": { + "bits": {}, + "grid_x": 1, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y100": { + "bits": {}, + "grid_x": 1, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y102": { + "bits": {}, + "grid_x": 1, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y104": { + "bits": {}, + "grid_x": 1, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y107": { + "bits": {}, + "grid_x": 1, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y109": { + "bits": {}, + "grid_x": 1, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y111": { + "bits": {}, + "grid_x": 1, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y113": { + "bits": {}, + "grid_x": 1, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y115": { + "bits": {}, + "grid_x": 1, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y117": { + "bits": {}, + "grid_x": 1, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y119": { + "bits": {}, + "grid_x": 1, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y121": { + "bits": {}, + "grid_x": 1, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y123": { + "bits": {}, + "grid_x": 1, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y125": { + "bits": {}, + "grid_x": 1, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y127": { + "bits": {}, + "grid_x": 1, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y129": { + "bits": {}, + "grid_x": 1, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y132": { + "bits": {}, + "grid_x": 1, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y134": { + "bits": {}, + "grid_x": 1, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y136": { + "bits": {}, + "grid_x": 1, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y138": { + "bits": {}, + "grid_x": 1, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y140": { + "bits": {}, + "grid_x": 1, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y142": { + "bits": {}, + "grid_x": 1, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y144": { + "bits": {}, + "grid_x": 1, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y146": { + "bits": {}, + "grid_x": 1, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y148": { + "bits": {}, + "grid_x": 1, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y150": { + "bits": {}, + "grid_x": 1, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y152": { + "bits": {}, + "grid_x": 1, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y154": { + "bits": {}, + "grid_x": 1, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X1Y156": { + "bits": {}, + "grid_x": 1, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X2Y0": { + "bits": {}, + "grid_x": 2, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X2Y52": { + "bits": {}, + "grid_x": 2, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X2Y104": { + "bits": {}, + "grid_x": 2, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X2Y156": { + "bits": {}, + "grid_x": 2, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X3Y0": { + "bits": {}, + "grid_x": 3, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X3Y52": { + "bits": {}, + "grid_x": 3, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X3Y104": { + "bits": {}, + "grid_x": 3, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X3Y156": { + "bits": {}, + "grid_x": 3, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X6Y0": { + "bits": {}, + "grid_x": 6, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X6Y52": { + "bits": {}, + "grid_x": 6, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X6Y104": { + "bits": {}, + "grid_x": 6, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X6Y156": { + "bits": {}, + "grid_x": 6, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y0": { + "bits": {}, + "grid_x": 7, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y2": { + "bits": {}, + "grid_x": 7, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y3": { + "bits": {}, + "grid_x": 7, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y4": { + "bits": {}, + "grid_x": 7, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y5": { + "bits": {}, + "grid_x": 7, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y6": { + "bits": {}, + "grid_x": 7, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y7": { + "bits": {}, + "grid_x": 7, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y9": { + "bits": {}, + "grid_x": 7, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y10": { + "bits": {}, + "grid_x": 7, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y11": { + "bits": {}, + "grid_x": 7, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y12": { + "bits": {}, + "grid_x": 7, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y13": { + "bits": {}, + "grid_x": 7, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y14": { + "bits": {}, + "grid_x": 7, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y15": { + "bits": {}, + "grid_x": 7, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y16": { + "bits": {}, + "grid_x": 7, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y17": { + "bits": {}, + "grid_x": 7, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y18": { + "bits": {}, + "grid_x": 7, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y19": { + "bits": {}, + "grid_x": 7, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y21": { + "bits": {}, + "grid_x": 7, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y22": { + "bits": {}, + "grid_x": 7, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y23": { + "bits": {}, + "grid_x": 7, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y24": { + "bits": {}, + "grid_x": 7, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y25": { + "bits": {}, + "grid_x": 7, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y27": { + "bits": {}, + "grid_x": 7, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y28": { + "bits": {}, + "grid_x": 7, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y29": { + "bits": {}, + "grid_x": 7, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y30": { + "bits": {}, + "grid_x": 7, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y31": { + "bits": {}, + "grid_x": 7, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y32": { + "bits": {}, + "grid_x": 7, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y34": { + "bits": {}, + "grid_x": 7, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y35": { + "bits": {}, + "grid_x": 7, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y36": { + "bits": {}, + "grid_x": 7, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y37": { + "bits": {}, + "grid_x": 7, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y38": { + "bits": {}, + "grid_x": 7, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y39": { + "bits": {}, + "grid_x": 7, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y40": { + "bits": {}, + "grid_x": 7, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y41": { + "bits": {}, + "grid_x": 7, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y42": { + "bits": {}, + "grid_x": 7, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y43": { + "bits": {}, + "grid_x": 7, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y44": { + "bits": {}, + "grid_x": 7, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y46": { + "bits": {}, + "grid_x": 7, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y47": { + "bits": {}, + "grid_x": 7, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y48": { + "bits": {}, + "grid_x": 7, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y49": { + "bits": {}, + "grid_x": 7, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y50": { + "bits": {}, + "grid_x": 7, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y52": { + "bits": {}, + "grid_x": 7, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y54": { + "bits": {}, + "grid_x": 7, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y55": { + "bits": {}, + "grid_x": 7, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y56": { + "bits": {}, + "grid_x": 7, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y57": { + "bits": {}, + "grid_x": 7, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y58": { + "bits": {}, + "grid_x": 7, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y59": { + "bits": {}, + "grid_x": 7, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y61": { + "bits": {}, + "grid_x": 7, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y62": { + "bits": {}, + "grid_x": 7, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y63": { + "bits": {}, + "grid_x": 7, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y64": { + "bits": {}, + "grid_x": 7, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y65": { + "bits": {}, + "grid_x": 7, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y66": { + "bits": {}, + "grid_x": 7, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y67": { + "bits": {}, + "grid_x": 7, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y68": { + "bits": {}, + "grid_x": 7, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y69": { + "bits": {}, + "grid_x": 7, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y70": { + "bits": {}, + "grid_x": 7, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y71": { + "bits": {}, + "grid_x": 7, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y73": { + "bits": {}, + "grid_x": 7, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y74": { + "bits": {}, + "grid_x": 7, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y75": { + "bits": {}, + "grid_x": 7, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y76": { + "bits": {}, + "grid_x": 7, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y77": { + "bits": {}, + "grid_x": 7, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y79": { + "bits": {}, + "grid_x": 7, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y80": { + "bits": {}, + "grid_x": 7, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y81": { + "bits": {}, + "grid_x": 7, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y82": { + "bits": {}, + "grid_x": 7, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y83": { + "bits": {}, + "grid_x": 7, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y84": { + "bits": {}, + "grid_x": 7, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y86": { + "bits": {}, + "grid_x": 7, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y87": { + "bits": {}, + "grid_x": 7, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y88": { + "bits": {}, + "grid_x": 7, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y89": { + "bits": {}, + "grid_x": 7, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y90": { + "bits": {}, + "grid_x": 7, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y91": { + "bits": {}, + "grid_x": 7, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y92": { + "bits": {}, + "grid_x": 7, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y93": { + "bits": {}, + "grid_x": 7, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y94": { + "bits": {}, + "grid_x": 7, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y95": { + "bits": {}, + "grid_x": 7, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y96": { + "bits": {}, + "grid_x": 7, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y98": { + "bits": {}, + "grid_x": 7, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y99": { + "bits": {}, + "grid_x": 7, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y100": { + "bits": {}, + "grid_x": 7, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y101": { + "bits": {}, + "grid_x": 7, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y102": { + "bits": {}, + "grid_x": 7, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y104": { + "bits": {}, + "grid_x": 7, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y106": { + "bits": {}, + "grid_x": 7, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y107": { + "bits": {}, + "grid_x": 7, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y108": { + "bits": {}, + "grid_x": 7, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y109": { + "bits": {}, + "grid_x": 7, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y110": { + "bits": {}, + "grid_x": 7, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y111": { + "bits": {}, + "grid_x": 7, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y113": { + "bits": {}, + "grid_x": 7, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y114": { + "bits": {}, + "grid_x": 7, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y115": { + "bits": {}, + "grid_x": 7, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y116": { + "bits": {}, + "grid_x": 7, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y117": { + "bits": {}, + "grid_x": 7, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y118": { + "bits": {}, + "grid_x": 7, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y119": { + "bits": {}, + "grid_x": 7, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y120": { + "bits": {}, + "grid_x": 7, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y121": { + "bits": {}, + "grid_x": 7, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y122": { + "bits": {}, + "grid_x": 7, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y123": { + "bits": {}, + "grid_x": 7, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y125": { + "bits": {}, + "grid_x": 7, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y126": { + "bits": {}, + "grid_x": 7, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y127": { + "bits": {}, + "grid_x": 7, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y128": { + "bits": {}, + "grid_x": 7, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y129": { + "bits": {}, + "grid_x": 7, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y131": { + "bits": {}, + "grid_x": 7, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y132": { + "bits": {}, + "grid_x": 7, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y133": { + "bits": {}, + "grid_x": 7, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y134": { + "bits": {}, + "grid_x": 7, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y135": { + "bits": {}, + "grid_x": 7, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y136": { + "bits": {}, + "grid_x": 7, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y138": { + "bits": {}, + "grid_x": 7, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y139": { + "bits": {}, + "grid_x": 7, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y140": { + "bits": {}, + "grid_x": 7, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y141": { + "bits": {}, + "grid_x": 7, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y142": { + "bits": {}, + "grid_x": 7, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y143": { + "bits": {}, + "grid_x": 7, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y144": { + "bits": {}, + "grid_x": 7, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y145": { + "bits": {}, + "grid_x": 7, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y146": { + "bits": {}, + "grid_x": 7, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y147": { + "bits": {}, + "grid_x": 7, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y148": { + "bits": {}, + "grid_x": 7, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y150": { + "bits": {}, + "grid_x": 7, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y151": { + "bits": {}, + "grid_x": 7, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y152": { + "bits": {}, + "grid_x": 7, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y153": { + "bits": {}, + "grid_x": 7, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y154": { + "bits": {}, + "grid_x": 7, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X7Y156": { + "bits": {}, + "grid_x": 7, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y1": { + "bits": {}, + "grid_x": 8, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y2": { + "bits": {}, + "grid_x": 8, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y3": { + "bits": {}, + "grid_x": 8, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y4": { + "bits": {}, + "grid_x": 8, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y5": { + "bits": {}, + "grid_x": 8, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y6": { + "bits": {}, + "grid_x": 8, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y7": { + "bits": {}, + "grid_x": 8, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y8": { + "bits": {}, + "grid_x": 8, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y10": { + "bits": {}, + "grid_x": 8, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y11": { + "bits": {}, + "grid_x": 8, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y12": { + "bits": {}, + "grid_x": 8, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y13": { + "bits": {}, + "grid_x": 8, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y14": { + "bits": {}, + "grid_x": 8, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y15": { + "bits": {}, + "grid_x": 8, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y16": { + "bits": {}, + "grid_x": 8, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y17": { + "bits": {}, + "grid_x": 8, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y19": { + "bits": {}, + "grid_x": 8, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y20": { + "bits": {}, + "grid_x": 8, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y21": { + "bits": {}, + "grid_x": 8, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y22": { + "bits": {}, + "grid_x": 8, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y23": { + "bits": {}, + "grid_x": 8, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y24": { + "bits": {}, + "grid_x": 8, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y25": { + "bits": {}, + "grid_x": 8, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y27": { + "bits": {}, + "grid_x": 8, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y28": { + "bits": {}, + "grid_x": 8, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y29": { + "bits": {}, + "grid_x": 8, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y30": { + "bits": {}, + "grid_x": 8, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y32": { + "bits": {}, + "grid_x": 8, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y33": { + "bits": {}, + "grid_x": 8, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y34": { + "bits": {}, + "grid_x": 8, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y35": { + "bits": {}, + "grid_x": 8, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y36": { + "bits": {}, + "grid_x": 8, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y37": { + "bits": {}, + "grid_x": 8, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y38": { + "bits": {}, + "grid_x": 8, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y39": { + "bits": {}, + "grid_x": 8, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y40": { + "bits": {}, + "grid_x": 8, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y41": { + "bits": {}, + "grid_x": 8, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y42": { + "bits": {}, + "grid_x": 8, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y43": { + "bits": {}, + "grid_x": 8, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y45": { + "bits": {}, + "grid_x": 8, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y46": { + "bits": {}, + "grid_x": 8, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y47": { + "bits": {}, + "grid_x": 8, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y48": { + "bits": {}, + "grid_x": 8, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y49": { + "bits": {}, + "grid_x": 8, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y50": { + "bits": {}, + "grid_x": 8, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y51": { + "bits": {}, + "grid_x": 8, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y53": { + "bits": {}, + "grid_x": 8, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y54": { + "bits": {}, + "grid_x": 8, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y55": { + "bits": {}, + "grid_x": 8, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y56": { + "bits": {}, + "grid_x": 8, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y57": { + "bits": {}, + "grid_x": 8, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y58": { + "bits": {}, + "grid_x": 8, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y59": { + "bits": {}, + "grid_x": 8, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y60": { + "bits": {}, + "grid_x": 8, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y62": { + "bits": {}, + "grid_x": 8, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y63": { + "bits": {}, + "grid_x": 8, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y64": { + "bits": {}, + "grid_x": 8, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y65": { + "bits": {}, + "grid_x": 8, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y66": { + "bits": {}, + "grid_x": 8, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y67": { + "bits": {}, + "grid_x": 8, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y68": { + "bits": {}, + "grid_x": 8, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y69": { + "bits": {}, + "grid_x": 8, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y71": { + "bits": {}, + "grid_x": 8, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y72": { + "bits": {}, + "grid_x": 8, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y73": { + "bits": {}, + "grid_x": 8, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y74": { + "bits": {}, + "grid_x": 8, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y75": { + "bits": {}, + "grid_x": 8, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y76": { + "bits": {}, + "grid_x": 8, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y77": { + "bits": {}, + "grid_x": 8, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y79": { + "bits": {}, + "grid_x": 8, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y80": { + "bits": {}, + "grid_x": 8, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y81": { + "bits": {}, + "grid_x": 8, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y82": { + "bits": {}, + "grid_x": 8, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y84": { + "bits": {}, + "grid_x": 8, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y85": { + "bits": {}, + "grid_x": 8, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y86": { + "bits": {}, + "grid_x": 8, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y87": { + "bits": {}, + "grid_x": 8, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y88": { + "bits": {}, + "grid_x": 8, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y89": { + "bits": {}, + "grid_x": 8, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y90": { + "bits": {}, + "grid_x": 8, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y91": { + "bits": {}, + "grid_x": 8, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y92": { + "bits": {}, + "grid_x": 8, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y93": { + "bits": {}, + "grid_x": 8, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y94": { + "bits": {}, + "grid_x": 8, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y95": { + "bits": {}, + "grid_x": 8, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y97": { + "bits": {}, + "grid_x": 8, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y98": { + "bits": {}, + "grid_x": 8, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y99": { + "bits": {}, + "grid_x": 8, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y100": { + "bits": {}, + "grid_x": 8, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y101": { + "bits": {}, + "grid_x": 8, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y102": { + "bits": {}, + "grid_x": 8, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y103": { + "bits": {}, + "grid_x": 8, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y105": { + "bits": {}, + "grid_x": 8, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y106": { + "bits": {}, + "grid_x": 8, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y107": { + "bits": {}, + "grid_x": 8, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y108": { + "bits": {}, + "grid_x": 8, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y109": { + "bits": {}, + "grid_x": 8, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y110": { + "bits": {}, + "grid_x": 8, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y111": { + "bits": {}, + "grid_x": 8, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y112": { + "bits": {}, + "grid_x": 8, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y114": { + "bits": {}, + "grid_x": 8, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y115": { + "bits": {}, + "grid_x": 8, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y116": { + "bits": {}, + "grid_x": 8, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y117": { + "bits": {}, + "grid_x": 8, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y118": { + "bits": {}, + "grid_x": 8, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y119": { + "bits": {}, + "grid_x": 8, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y120": { + "bits": {}, + "grid_x": 8, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y121": { + "bits": {}, + "grid_x": 8, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y123": { + "bits": {}, + "grid_x": 8, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y124": { + "bits": {}, + "grid_x": 8, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y125": { + "bits": {}, + "grid_x": 8, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y126": { + "bits": {}, + "grid_x": 8, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y127": { + "bits": {}, + "grid_x": 8, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y128": { + "bits": {}, + "grid_x": 8, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y129": { + "bits": {}, + "grid_x": 8, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y131": { + "bits": {}, + "grid_x": 8, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y132": { + "bits": {}, + "grid_x": 8, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y133": { + "bits": {}, + "grid_x": 8, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y134": { + "bits": {}, + "grid_x": 8, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y136": { + "bits": {}, + "grid_x": 8, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y137": { + "bits": {}, + "grid_x": 8, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y138": { + "bits": {}, + "grid_x": 8, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y139": { + "bits": {}, + "grid_x": 8, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y140": { + "bits": {}, + "grid_x": 8, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y141": { + "bits": {}, + "grid_x": 8, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y142": { + "bits": {}, + "grid_x": 8, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y143": { + "bits": {}, + "grid_x": 8, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y144": { + "bits": {}, + "grid_x": 8, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y145": { + "bits": {}, + "grid_x": 8, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y146": { + "bits": {}, + "grid_x": 8, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y147": { + "bits": {}, + "grid_x": 8, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y149": { + "bits": {}, + "grid_x": 8, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y150": { + "bits": {}, + "grid_x": 8, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y151": { + "bits": {}, + "grid_x": 8, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y152": { + "bits": {}, + "grid_x": 8, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y153": { + "bits": {}, + "grid_x": 8, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y154": { + "bits": {}, + "grid_x": 8, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X8Y155": { + "bits": {}, + "grid_x": 8, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X9Y0": { + "bits": {}, + "grid_x": 9, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X9Y52": { + "bits": {}, + "grid_x": 9, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X9Y104": { + "bits": {}, + "grid_x": 9, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X9Y156": { + "bits": {}, + "grid_x": 9, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X10Y0": { + "bits": {}, + "grid_x": 10, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X10Y156": { + "bits": {}, + "grid_x": 10, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X13Y0": { + "bits": {}, + "grid_x": 13, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X13Y156": { + "bits": {}, + "grid_x": 13, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X14Y0": { + "bits": {}, + "grid_x": 14, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X14Y156": { + "bits": {}, + "grid_x": 14, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X17Y0": { + "bits": {}, + "grid_x": 17, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X17Y156": { + "bits": {}, + "grid_x": 17, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X18Y0": { + "bits": {}, + "grid_x": 18, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X18Y52": { + "bits": {}, + "grid_x": 18, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X18Y104": { + "bits": {}, + "grid_x": 18, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X18Y156": { + "bits": {}, + "grid_x": 18, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y0": { + "bits": {}, + "grid_x": 19, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y2": { + "bits": {}, + "grid_x": 19, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y3": { + "bits": {}, + "grid_x": 19, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y4": { + "bits": {}, + "grid_x": 19, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y5": { + "bits": {}, + "grid_x": 19, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y7": { + "bits": {}, + "grid_x": 19, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y8": { + "bits": {}, + "grid_x": 19, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y9": { + "bits": {}, + "grid_x": 19, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y10": { + "bits": {}, + "grid_x": 19, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y12": { + "bits": {}, + "grid_x": 19, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y13": { + "bits": {}, + "grid_x": 19, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y14": { + "bits": {}, + "grid_x": 19, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y15": { + "bits": {}, + "grid_x": 19, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y17": { + "bits": {}, + "grid_x": 19, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y18": { + "bits": {}, + "grid_x": 19, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y19": { + "bits": {}, + "grid_x": 19, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y20": { + "bits": {}, + "grid_x": 19, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y22": { + "bits": {}, + "grid_x": 19, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y23": { + "bits": {}, + "grid_x": 19, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y24": { + "bits": {}, + "grid_x": 19, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y25": { + "bits": {}, + "grid_x": 19, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y28": { + "bits": {}, + "grid_x": 19, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y29": { + "bits": {}, + "grid_x": 19, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y30": { + "bits": {}, + "grid_x": 19, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y31": { + "bits": {}, + "grid_x": 19, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y33": { + "bits": {}, + "grid_x": 19, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y34": { + "bits": {}, + "grid_x": 19, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y35": { + "bits": {}, + "grid_x": 19, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y36": { + "bits": {}, + "grid_x": 19, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y38": { + "bits": {}, + "grid_x": 19, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y39": { + "bits": {}, + "grid_x": 19, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y40": { + "bits": {}, + "grid_x": 19, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y41": { + "bits": {}, + "grid_x": 19, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y43": { + "bits": {}, + "grid_x": 19, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y44": { + "bits": {}, + "grid_x": 19, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y45": { + "bits": {}, + "grid_x": 19, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y46": { + "bits": {}, + "grid_x": 19, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y48": { + "bits": {}, + "grid_x": 19, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y49": { + "bits": {}, + "grid_x": 19, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y50": { + "bits": {}, + "grid_x": 19, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y51": { + "bits": {}, + "grid_x": 19, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y54": { + "bits": {}, + "grid_x": 19, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y55": { + "bits": {}, + "grid_x": 19, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y56": { + "bits": {}, + "grid_x": 19, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y57": { + "bits": {}, + "grid_x": 19, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y59": { + "bits": {}, + "grid_x": 19, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y60": { + "bits": {}, + "grid_x": 19, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y61": { + "bits": {}, + "grid_x": 19, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y62": { + "bits": {}, + "grid_x": 19, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y64": { + "bits": {}, + "grid_x": 19, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y65": { + "bits": {}, + "grid_x": 19, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y66": { + "bits": {}, + "grid_x": 19, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y67": { + "bits": {}, + "grid_x": 19, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y69": { + "bits": {}, + "grid_x": 19, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y70": { + "bits": {}, + "grid_x": 19, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y71": { + "bits": {}, + "grid_x": 19, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y72": { + "bits": {}, + "grid_x": 19, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y74": { + "bits": {}, + "grid_x": 19, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y75": { + "bits": {}, + "grid_x": 19, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y76": { + "bits": {}, + "grid_x": 19, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y77": { + "bits": {}, + "grid_x": 19, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y80": { + "bits": {}, + "grid_x": 19, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y81": { + "bits": {}, + "grid_x": 19, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y82": { + "bits": {}, + "grid_x": 19, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y83": { + "bits": {}, + "grid_x": 19, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y85": { + "bits": {}, + "grid_x": 19, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y86": { + "bits": {}, + "grid_x": 19, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y87": { + "bits": {}, + "grid_x": 19, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y88": { + "bits": {}, + "grid_x": 19, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y90": { + "bits": {}, + "grid_x": 19, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y91": { + "bits": {}, + "grid_x": 19, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y92": { + "bits": {}, + "grid_x": 19, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y93": { + "bits": {}, + "grid_x": 19, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y95": { + "bits": {}, + "grid_x": 19, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y96": { + "bits": {}, + "grid_x": 19, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y97": { + "bits": {}, + "grid_x": 19, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y98": { + "bits": {}, + "grid_x": 19, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y100": { + "bits": {}, + "grid_x": 19, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y101": { + "bits": {}, + "grid_x": 19, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y102": { + "bits": {}, + "grid_x": 19, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y103": { + "bits": {}, + "grid_x": 19, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y106": { + "bits": {}, + "grid_x": 19, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y107": { + "bits": {}, + "grid_x": 19, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y108": { + "bits": {}, + "grid_x": 19, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y109": { + "bits": {}, + "grid_x": 19, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y111": { + "bits": {}, + "grid_x": 19, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y112": { + "bits": {}, + "grid_x": 19, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y113": { + "bits": {}, + "grid_x": 19, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y114": { + "bits": {}, + "grid_x": 19, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y116": { + "bits": {}, + "grid_x": 19, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y117": { + "bits": {}, + "grid_x": 19, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y118": { + "bits": {}, + "grid_x": 19, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y119": { + "bits": {}, + "grid_x": 19, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y121": { + "bits": {}, + "grid_x": 19, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y122": { + "bits": {}, + "grid_x": 19, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y123": { + "bits": {}, + "grid_x": 19, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y124": { + "bits": {}, + "grid_x": 19, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y126": { + "bits": {}, + "grid_x": 19, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y127": { + "bits": {}, + "grid_x": 19, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y128": { + "bits": {}, + "grid_x": 19, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y129": { + "bits": {}, + "grid_x": 19, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y132": { + "bits": {}, + "grid_x": 19, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y133": { + "bits": {}, + "grid_x": 19, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y134": { + "bits": {}, + "grid_x": 19, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y135": { + "bits": {}, + "grid_x": 19, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y137": { + "bits": {}, + "grid_x": 19, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y138": { + "bits": {}, + "grid_x": 19, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y139": { + "bits": {}, + "grid_x": 19, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y140": { + "bits": {}, + "grid_x": 19, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y142": { + "bits": {}, + "grid_x": 19, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y143": { + "bits": {}, + "grid_x": 19, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y144": { + "bits": {}, + "grid_x": 19, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y145": { + "bits": {}, + "grid_x": 19, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y147": { + "bits": {}, + "grid_x": 19, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y148": { + "bits": {}, + "grid_x": 19, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y149": { + "bits": {}, + "grid_x": 19, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y150": { + "bits": {}, + "grid_x": 19, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y152": { + "bits": {}, + "grid_x": 19, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y153": { + "bits": {}, + "grid_x": 19, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y154": { + "bits": {}, + "grid_x": 19, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y155": { + "bits": {}, + "grid_x": 19, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X19Y156": { + "bits": {}, + "grid_x": 19, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X20Y0": { + "bits": {}, + "grid_x": 20, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X20Y52": { + "bits": {}, + "grid_x": 20, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X20Y104": { + "bits": {}, + "grid_x": 20, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X20Y156": { + "bits": {}, + "grid_x": 20, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X23Y0": { + "bits": {}, + "grid_x": 23, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X23Y156": { + "bits": {}, + "grid_x": 23, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X24Y0": { + "bits": {}, + "grid_x": 24, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X24Y156": { + "bits": {}, + "grid_x": 24, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X27Y0": { + "bits": {}, + "grid_x": 27, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X27Y52": { + "bits": {}, + "grid_x": 27, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X27Y104": { + "bits": {}, + "grid_x": 27, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X27Y156": { + "bits": {}, + "grid_x": 27, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y0": { + "bits": {}, + "grid_x": 28, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y2": { + "bits": {}, + "grid_x": 28, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y3": { + "bits": {}, + "grid_x": 28, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y4": { + "bits": {}, + "grid_x": 28, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y5": { + "bits": {}, + "grid_x": 28, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y7": { + "bits": {}, + "grid_x": 28, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y8": { + "bits": {}, + "grid_x": 28, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y9": { + "bits": {}, + "grid_x": 28, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y10": { + "bits": {}, + "grid_x": 28, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y12": { + "bits": {}, + "grid_x": 28, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y13": { + "bits": {}, + "grid_x": 28, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y14": { + "bits": {}, + "grid_x": 28, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y15": { + "bits": {}, + "grid_x": 28, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y17": { + "bits": {}, + "grid_x": 28, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y18": { + "bits": {}, + "grid_x": 28, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y19": { + "bits": {}, + "grid_x": 28, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y20": { + "bits": {}, + "grid_x": 28, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y22": { + "bits": {}, + "grid_x": 28, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y23": { + "bits": {}, + "grid_x": 28, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y24": { + "bits": {}, + "grid_x": 28, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y25": { + "bits": {}, + "grid_x": 28, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y28": { + "bits": {}, + "grid_x": 28, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y29": { + "bits": {}, + "grid_x": 28, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y30": { + "bits": {}, + "grid_x": 28, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y31": { + "bits": {}, + "grid_x": 28, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y33": { + "bits": {}, + "grid_x": 28, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y34": { + "bits": {}, + "grid_x": 28, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y35": { + "bits": {}, + "grid_x": 28, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y36": { + "bits": {}, + "grid_x": 28, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y38": { + "bits": {}, + "grid_x": 28, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y39": { + "bits": {}, + "grid_x": 28, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y40": { + "bits": {}, + "grid_x": 28, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y41": { + "bits": {}, + "grid_x": 28, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y43": { + "bits": {}, + "grid_x": 28, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y44": { + "bits": {}, + "grid_x": 28, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y45": { + "bits": {}, + "grid_x": 28, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y46": { + "bits": {}, + "grid_x": 28, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y48": { + "bits": {}, + "grid_x": 28, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y49": { + "bits": {}, + "grid_x": 28, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y50": { + "bits": {}, + "grid_x": 28, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y51": { + "bits": {}, + "grid_x": 28, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y54": { + "bits": {}, + "grid_x": 28, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y55": { + "bits": {}, + "grid_x": 28, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y56": { + "bits": {}, + "grid_x": 28, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y57": { + "bits": {}, + "grid_x": 28, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y59": { + "bits": {}, + "grid_x": 28, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y60": { + "bits": {}, + "grid_x": 28, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y61": { + "bits": {}, + "grid_x": 28, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y62": { + "bits": {}, + "grid_x": 28, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y64": { + "bits": {}, + "grid_x": 28, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y65": { + "bits": {}, + "grid_x": 28, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y66": { + "bits": {}, + "grid_x": 28, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y67": { + "bits": {}, + "grid_x": 28, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y69": { + "bits": {}, + "grid_x": 28, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y70": { + "bits": {}, + "grid_x": 28, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y71": { + "bits": {}, + "grid_x": 28, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y72": { + "bits": {}, + "grid_x": 28, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y74": { + "bits": {}, + "grid_x": 28, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y75": { + "bits": {}, + "grid_x": 28, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y76": { + "bits": {}, + "grid_x": 28, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y77": { + "bits": {}, + "grid_x": 28, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y80": { + "bits": {}, + "grid_x": 28, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y81": { + "bits": {}, + "grid_x": 28, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y82": { + "bits": {}, + "grid_x": 28, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y83": { + "bits": {}, + "grid_x": 28, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y85": { + "bits": {}, + "grid_x": 28, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y86": { + "bits": {}, + "grid_x": 28, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y87": { + "bits": {}, + "grid_x": 28, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y88": { + "bits": {}, + "grid_x": 28, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y90": { + "bits": {}, + "grid_x": 28, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y91": { + "bits": {}, + "grid_x": 28, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y92": { + "bits": {}, + "grid_x": 28, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y93": { + "bits": {}, + "grid_x": 28, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y95": { + "bits": {}, + "grid_x": 28, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y96": { + "bits": {}, + "grid_x": 28, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y97": { + "bits": {}, + "grid_x": 28, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y98": { + "bits": {}, + "grid_x": 28, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y100": { + "bits": {}, + "grid_x": 28, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y101": { + "bits": {}, + "grid_x": 28, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y102": { + "bits": {}, + "grid_x": 28, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y103": { + "bits": {}, + "grid_x": 28, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y106": { + "bits": {}, + "grid_x": 28, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y107": { + "bits": {}, + "grid_x": 28, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y108": { + "bits": {}, + "grid_x": 28, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y109": { + "bits": {}, + "grid_x": 28, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y111": { + "bits": {}, + "grid_x": 28, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y112": { + "bits": {}, + "grid_x": 28, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y113": { + "bits": {}, + "grid_x": 28, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y114": { + "bits": {}, + "grid_x": 28, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y116": { + "bits": {}, + "grid_x": 28, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y117": { + "bits": {}, + "grid_x": 28, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y118": { + "bits": {}, + "grid_x": 28, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y119": { + "bits": {}, + "grid_x": 28, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y121": { + "bits": {}, + "grid_x": 28, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y122": { + "bits": {}, + "grid_x": 28, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y123": { + "bits": {}, + "grid_x": 28, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y124": { + "bits": {}, + "grid_x": 28, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y126": { + "bits": {}, + "grid_x": 28, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y127": { + "bits": {}, + "grid_x": 28, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y128": { + "bits": {}, + "grid_x": 28, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y129": { + "bits": {}, + "grid_x": 28, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y132": { + "bits": {}, + "grid_x": 28, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y133": { + "bits": {}, + "grid_x": 28, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y134": { + "bits": {}, + "grid_x": 28, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y135": { + "bits": {}, + "grid_x": 28, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y137": { + "bits": {}, + "grid_x": 28, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y138": { + "bits": {}, + "grid_x": 28, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y139": { + "bits": {}, + "grid_x": 28, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y140": { + "bits": {}, + "grid_x": 28, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y142": { + "bits": {}, + "grid_x": 28, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y143": { + "bits": {}, + "grid_x": 28, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y144": { + "bits": {}, + "grid_x": 28, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y145": { + "bits": {}, + "grid_x": 28, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y147": { + "bits": {}, + "grid_x": 28, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y148": { + "bits": {}, + "grid_x": 28, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y149": { + "bits": {}, + "grid_x": 28, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y150": { + "bits": {}, + "grid_x": 28, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y152": { + "bits": {}, + "grid_x": 28, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y153": { + "bits": {}, + "grid_x": 28, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y154": { + "bits": {}, + "grid_x": 28, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y155": { + "bits": {}, + "grid_x": 28, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X28Y156": { + "bits": {}, + "grid_x": 28, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X29Y0": { + "bits": {}, + "grid_x": 29, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X29Y52": { + "bits": {}, + "grid_x": 29, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X29Y104": { + "bits": {}, + "grid_x": 29, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X29Y156": { + "bits": {}, + "grid_x": 29, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X30Y0": { + "bits": {}, + "grid_x": 30, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X30Y156": { + "bits": {}, + "grid_x": 30, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X33Y0": { + "bits": {}, + "grid_x": 33, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X33Y156": { + "bits": {}, + "grid_x": 33, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X34Y0": { + "bits": {}, + "grid_x": 34, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X34Y52": { + "bits": {}, + "grid_x": 34, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X34Y104": { + "bits": {}, + "grid_x": 34, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X34Y156": { + "bits": {}, + "grid_x": 34, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X35Y0": { + "bits": {}, + "grid_x": 35, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X35Y52": { + "bits": {}, + "grid_x": 35, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X35Y104": { + "bits": {}, + "grid_x": 35, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X35Y156": { + "bits": {}, + "grid_x": 35, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X36Y0": { + "bits": {}, + "grid_x": 36, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X36Y52": { + "bits": {}, + "grid_x": 36, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X37Y0": { + "bits": {}, + "grid_x": 37, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X37Y52": { + "bits": {}, + "grid_x": 37, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X38Y0": { + "bits": {}, + "grid_x": 38, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X38Y52": { + "bits": {}, + "grid_x": 38, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X38Y104": { + "bits": {}, + "grid_x": 38, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X38Y156": { + "bits": {}, + "grid_x": 38, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X39Y0": { + "bits": {}, + "grid_x": 39, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X39Y52": { + "bits": {}, + "grid_x": 39, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X39Y104": { + "bits": {}, + "grid_x": 39, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X39Y156": { + "bits": {}, + "grid_x": 39, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X40Y0": { + "bits": {}, + "grid_x": 40, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X40Y52": { + "bits": {}, + "grid_x": 40, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X41Y0": { + "bits": {}, + "grid_x": 41, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X41Y52": { + "bits": {}, + "grid_x": 41, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X42Y0": { + "bits": {}, + "grid_x": 42, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X42Y52": { + "bits": {}, + "grid_x": 42, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X42Y104": { + "bits": {}, + "grid_x": 42, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X42Y156": { + "bits": {}, + "grid_x": 42, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X43Y0": { + "bits": {}, + "grid_x": 43, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X43Y52": { + "bits": {}, + "grid_x": 43, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X43Y104": { + "bits": {}, + "grid_x": 43, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X43Y156": { + "bits": {}, + "grid_x": 43, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X44Y0": { + "bits": {}, + "grid_x": 44, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X44Y52": { + "bits": {}, + "grid_x": 44, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X45Y0": { + "bits": {}, + "grid_x": 45, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X45Y52": { + "bits": {}, + "grid_x": 45, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y0": { + "bits": {}, + "grid_x": 46, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y1": { + "bits": {}, + "grid_x": 46, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y2": { + "bits": {}, + "grid_x": 46, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y3": { + "bits": {}, + "grid_x": 46, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y4": { + "bits": {}, + "grid_x": 46, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y5": { + "bits": {}, + "grid_x": 46, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y6": { + "bits": {}, + "grid_x": 46, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y7": { + "bits": {}, + "grid_x": 46, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y8": { + "bits": {}, + "grid_x": 46, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y9": { + "bits": {}, + "grid_x": 46, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y10": { + "bits": {}, + "grid_x": 46, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y12": { + "bits": {}, + "grid_x": 46, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y13": { + "bits": {}, + "grid_x": 46, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y14": { + "bits": {}, + "grid_x": 46, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y15": { + "bits": {}, + "grid_x": 46, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y16": { + "bits": {}, + "grid_x": 46, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y17": { + "bits": {}, + "grid_x": 46, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y18": { + "bits": {}, + "grid_x": 46, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y19": { + "bits": {}, + "grid_x": 46, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y20": { + "bits": {}, + "grid_x": 46, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y21": { + "bits": {}, + "grid_x": 46, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y22": { + "bits": {}, + "grid_x": 46, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y23": { + "bits": {}, + "grid_x": 46, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y24": { + "bits": {}, + "grid_x": 46, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y25": { + "bits": {}, + "grid_x": 46, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y26": { + "bits": {}, + "grid_x": 46, + "grid_y": 130, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y27": { + "bits": {}, + "grid_x": 46, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y28": { + "bits": {}, + "grid_x": 46, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y29": { + "bits": {}, + "grid_x": 46, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y30": { + "bits": {}, + "grid_x": 46, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y31": { + "bits": {}, + "grid_x": 46, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y33": { + "bits": {}, + "grid_x": 46, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y34": { + "bits": {}, + "grid_x": 46, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y35": { + "bits": {}, + "grid_x": 46, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y36": { + "bits": {}, + "grid_x": 46, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y37": { + "bits": {}, + "grid_x": 46, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y38": { + "bits": {}, + "grid_x": 46, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y39": { + "bits": {}, + "grid_x": 46, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y40": { + "bits": {}, + "grid_x": 46, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y41": { + "bits": {}, + "grid_x": 46, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y43": { + "bits": {}, + "grid_x": 46, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y44": { + "bits": {}, + "grid_x": 46, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y45": { + "bits": {}, + "grid_x": 46, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y46": { + "bits": {}, + "grid_x": 46, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y47": { + "bits": {}, + "grid_x": 46, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y48": { + "bits": {}, + "grid_x": 46, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y49": { + "bits": {}, + "grid_x": 46, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y50": { + "bits": {}, + "grid_x": 46, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y51": { + "bits": {}, + "grid_x": 46, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y52": { + "bits": {}, + "grid_x": 46, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y80": { + "bits": {}, + "grid_x": 46, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y81": { + "bits": {}, + "grid_x": 46, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y82": { + "bits": {}, + "grid_x": 46, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y83": { + "bits": {}, + "grid_x": 46, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y84": { + "bits": {}, + "grid_x": 46, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y85": { + "bits": {}, + "grid_x": 46, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y86": { + "bits": {}, + "grid_x": 46, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y87": { + "bits": {}, + "grid_x": 46, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y88": { + "bits": {}, + "grid_x": 46, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y90": { + "bits": {}, + "grid_x": 46, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y91": { + "bits": {}, + "grid_x": 46, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y92": { + "bits": {}, + "grid_x": 46, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y93": { + "bits": {}, + "grid_x": 46, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y94": { + "bits": {}, + "grid_x": 46, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y95": { + "bits": {}, + "grid_x": 46, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y96": { + "bits": {}, + "grid_x": 46, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y97": { + "bits": {}, + "grid_x": 46, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y98": { + "bits": {}, + "grid_x": 46, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y100": { + "bits": {}, + "grid_x": 46, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y101": { + "bits": {}, + "grid_x": 46, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y102": { + "bits": {}, + "grid_x": 46, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y103": { + "bits": {}, + "grid_x": 46, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y104": { + "bits": {}, + "grid_x": 46, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X46Y156": { + "bits": {}, + "grid_x": 46, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X47Y0": { + "bits": {}, + "grid_x": 47, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X47Y52": { + "bits": {}, + "grid_x": 47, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X47Y104": { + "bits": {}, + "grid_x": 47, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X47Y156": { + "bits": {}, + "grid_x": 47, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X48Y0": { + "bits": {}, + "grid_x": 48, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X48Y52": { + "bits": {}, + "grid_x": 48, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X48Y104": { + "bits": {}, + "grid_x": 48, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X48Y156": { + "bits": {}, + "grid_x": 48, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X51Y0": { + "bits": {}, + "grid_x": 51, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X51Y156": { + "bits": {}, + "grid_x": 51, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X52Y0": { + "bits": {}, + "grid_x": 52, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X52Y156": { + "bits": {}, + "grid_x": 52, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X55Y0": { + "bits": {}, + "grid_x": 55, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X55Y156": { + "bits": {}, + "grid_x": 55, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X56Y0": { + "bits": {}, + "grid_x": 56, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X56Y156": { + "bits": {}, + "grid_x": 56, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X59Y0": { + "bits": {}, + "grid_x": 59, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X59Y52": { + "bits": {}, + "grid_x": 59, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X59Y104": { + "bits": {}, + "grid_x": 59, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X59Y156": { + "bits": {}, + "grid_x": 59, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y3": { + "bits": {}, + "grid_x": 60, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y4": { + "bits": {}, + "grid_x": 60, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y5": { + "bits": {}, + "grid_x": 60, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y6": { + "bits": {}, + "grid_x": 60, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y7": { + "bits": {}, + "grid_x": 60, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y8": { + "bits": {}, + "grid_x": 60, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y14": { + "bits": {}, + "grid_x": 60, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y22": { + "bits": {}, + "grid_x": 60, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y23": { + "bits": {}, + "grid_x": 60, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y24": { + "bits": {}, + "grid_x": 60, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y25": { + "bits": {}, + "grid_x": 60, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y27": { + "bits": {}, + "grid_x": 60, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y28": { + "bits": {}, + "grid_x": 60, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y29": { + "bits": {}, + "grid_x": 60, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y30": { + "bits": {}, + "grid_x": 60, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y39": { + "bits": {}, + "grid_x": 60, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y49": { + "bits": {}, + "grid_x": 60, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y50": { + "bits": {}, + "grid_x": 60, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y51": { + "bits": {}, + "grid_x": 60, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y54": { + "bits": {}, + "grid_x": 60, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y55": { + "bits": {}, + "grid_x": 60, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y56": { + "bits": {}, + "grid_x": 60, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y66": { + "bits": {}, + "grid_x": 60, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y74": { + "bits": {}, + "grid_x": 60, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y75": { + "bits": {}, + "grid_x": 60, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y76": { + "bits": {}, + "grid_x": 60, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y77": { + "bits": {}, + "grid_x": 60, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y79": { + "bits": {}, + "grid_x": 60, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y80": { + "bits": {}, + "grid_x": 60, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y81": { + "bits": {}, + "grid_x": 60, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y82": { + "bits": {}, + "grid_x": 60, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y91": { + "bits": {}, + "grid_x": 60, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y118": { + "bits": {}, + "grid_x": 60, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y126": { + "bits": {}, + "grid_x": 60, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y127": { + "bits": {}, + "grid_x": 60, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y128": { + "bits": {}, + "grid_x": 60, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y129": { + "bits": {}, + "grid_x": 60, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y131": { + "bits": {}, + "grid_x": 60, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y132": { + "bits": {}, + "grid_x": 60, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y133": { + "bits": {}, + "grid_x": 60, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y134": { + "bits": {}, + "grid_x": 60, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X60Y143": { + "bits": {}, + "grid_x": 60, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X61Y0": { + "bits": {}, + "grid_x": 61, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X61Y52": { + "bits": {}, + "grid_x": 61, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X61Y104": { + "bits": {}, + "grid_x": 61, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X61Y156": { + "bits": {}, + "grid_x": 61, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X62Y0": { + "bits": {}, + "grid_x": 62, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X62Y156": { + "bits": {}, + "grid_x": 62, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X65Y0": { + "bits": {}, + "grid_x": 65, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X65Y156": { + "bits": {}, + "grid_x": 65, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X66Y0": { + "bits": {}, + "grid_x": 66, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X66Y52": { + "bits": {}, + "grid_x": 66, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X66Y104": { + "bits": {}, + "grid_x": 66, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X66Y156": { + "bits": {}, + "grid_x": 66, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X67Y0": { + "bits": {}, + "grid_x": 67, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X67Y156": { + "bits": {}, + "grid_x": 67, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X70Y0": { + "bits": {}, + "grid_x": 70, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X70Y104": { + "bits": {}, + "grid_x": 70, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X70Y156": { + "bits": {}, + "grid_x": 70, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X71Y0": { + "bits": {}, + "grid_x": 71, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X71Y104": { + "bits": {}, + "grid_x": 71, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X71Y156": { + "bits": {}, + "grid_x": 71, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X74Y0": { + "bits": {}, + "grid_x": 74, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X74Y104": { + "bits": {}, + "grid_x": 74, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X74Y156": { + "bits": {}, + "grid_x": 74, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y0": { + "bits": {}, + "grid_x": 75, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y2": { + "bits": {}, + "grid_x": 75, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y3": { + "bits": {}, + "grid_x": 75, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y4": { + "bits": {}, + "grid_x": 75, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y5": { + "bits": {}, + "grid_x": 75, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y7": { + "bits": {}, + "grid_x": 75, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y8": { + "bits": {}, + "grid_x": 75, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y9": { + "bits": {}, + "grid_x": 75, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y10": { + "bits": {}, + "grid_x": 75, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y12": { + "bits": {}, + "grid_x": 75, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y13": { + "bits": {}, + "grid_x": 75, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y14": { + "bits": {}, + "grid_x": 75, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y15": { + "bits": {}, + "grid_x": 75, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y17": { + "bits": {}, + "grid_x": 75, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y18": { + "bits": {}, + "grid_x": 75, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y19": { + "bits": {}, + "grid_x": 75, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y20": { + "bits": {}, + "grid_x": 75, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y22": { + "bits": {}, + "grid_x": 75, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y23": { + "bits": {}, + "grid_x": 75, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y24": { + "bits": {}, + "grid_x": 75, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y25": { + "bits": {}, + "grid_x": 75, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y28": { + "bits": {}, + "grid_x": 75, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y29": { + "bits": {}, + "grid_x": 75, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y30": { + "bits": {}, + "grid_x": 75, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y31": { + "bits": {}, + "grid_x": 75, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y33": { + "bits": {}, + "grid_x": 75, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y34": { + "bits": {}, + "grid_x": 75, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y35": { + "bits": {}, + "grid_x": 75, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y36": { + "bits": {}, + "grid_x": 75, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y38": { + "bits": {}, + "grid_x": 75, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y39": { + "bits": {}, + "grid_x": 75, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y40": { + "bits": {}, + "grid_x": 75, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y41": { + "bits": {}, + "grid_x": 75, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y43": { + "bits": {}, + "grid_x": 75, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y44": { + "bits": {}, + "grid_x": 75, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y45": { + "bits": {}, + "grid_x": 75, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y46": { + "bits": {}, + "grid_x": 75, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y48": { + "bits": {}, + "grid_x": 75, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y49": { + "bits": {}, + "grid_x": 75, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y50": { + "bits": {}, + "grid_x": 75, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y51": { + "bits": {}, + "grid_x": 75, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y54": { + "bits": {}, + "grid_x": 75, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y55": { + "bits": {}, + "grid_x": 75, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y56": { + "bits": {}, + "grid_x": 75, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y57": { + "bits": {}, + "grid_x": 75, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y59": { + "bits": {}, + "grid_x": 75, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y60": { + "bits": {}, + "grid_x": 75, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y61": { + "bits": {}, + "grid_x": 75, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y62": { + "bits": {}, + "grid_x": 75, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y64": { + "bits": {}, + "grid_x": 75, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y65": { + "bits": {}, + "grid_x": 75, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y66": { + "bits": {}, + "grid_x": 75, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y67": { + "bits": {}, + "grid_x": 75, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y69": { + "bits": {}, + "grid_x": 75, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y70": { + "bits": {}, + "grid_x": 75, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y71": { + "bits": {}, + "grid_x": 75, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y72": { + "bits": {}, + "grid_x": 75, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y74": { + "bits": {}, + "grid_x": 75, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y75": { + "bits": {}, + "grid_x": 75, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y76": { + "bits": {}, + "grid_x": 75, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y77": { + "bits": {}, + "grid_x": 75, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y80": { + "bits": {}, + "grid_x": 75, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y81": { + "bits": {}, + "grid_x": 75, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y82": { + "bits": {}, + "grid_x": 75, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y83": { + "bits": {}, + "grid_x": 75, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y85": { + "bits": {}, + "grid_x": 75, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y86": { + "bits": {}, + "grid_x": 75, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y87": { + "bits": {}, + "grid_x": 75, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y88": { + "bits": {}, + "grid_x": 75, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y90": { + "bits": {}, + "grid_x": 75, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y91": { + "bits": {}, + "grid_x": 75, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y92": { + "bits": {}, + "grid_x": 75, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y93": { + "bits": {}, + "grid_x": 75, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y95": { + "bits": {}, + "grid_x": 75, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y96": { + "bits": {}, + "grid_x": 75, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y97": { + "bits": {}, + "grid_x": 75, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y98": { + "bits": {}, + "grid_x": 75, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y100": { + "bits": {}, + "grid_x": 75, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y101": { + "bits": {}, + "grid_x": 75, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y102": { + "bits": {}, + "grid_x": 75, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y103": { + "bits": {}, + "grid_x": 75, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y104": { + "bits": {}, + "grid_x": 75, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y132": { + "bits": {}, + "grid_x": 75, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y133": { + "bits": {}, + "grid_x": 75, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y134": { + "bits": {}, + "grid_x": 75, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y135": { + "bits": {}, + "grid_x": 75, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y137": { + "bits": {}, + "grid_x": 75, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y138": { + "bits": {}, + "grid_x": 75, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y139": { + "bits": {}, + "grid_x": 75, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y140": { + "bits": {}, + "grid_x": 75, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y142": { + "bits": {}, + "grid_x": 75, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y143": { + "bits": {}, + "grid_x": 75, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y144": { + "bits": {}, + "grid_x": 75, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y145": { + "bits": {}, + "grid_x": 75, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y147": { + "bits": {}, + "grid_x": 75, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y148": { + "bits": {}, + "grid_x": 75, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y149": { + "bits": {}, + "grid_x": 75, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y150": { + "bits": {}, + "grid_x": 75, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y152": { + "bits": {}, + "grid_x": 75, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y153": { + "bits": {}, + "grid_x": 75, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y154": { + "bits": {}, + "grid_x": 75, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y155": { + "bits": {}, + "grid_x": 75, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X75Y156": { + "bits": {}, + "grid_x": 75, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X76Y0": { + "bits": {}, + "grid_x": 76, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X76Y52": { + "bits": {}, + "grid_x": 76, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X76Y104": { + "bits": {}, + "grid_x": 76, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X76Y156": { + "bits": {}, + "grid_x": 76, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X79Y0": { + "bits": {}, + "grid_x": 79, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X79Y156": { + "bits": {}, + "grid_x": 79, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X80Y0": { + "bits": {}, + "grid_x": 80, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X80Y52": { + "bits": {}, + "grid_x": 80, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X80Y104": { + "bits": {}, + "grid_x": 80, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X80Y156": { + "bits": {}, + "grid_x": 80, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X81Y0": { + "bits": {}, + "grid_x": 81, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X81Y156": { + "bits": {}, + "grid_x": 81, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X84Y0": { + "bits": {}, + "grid_x": 84, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X84Y156": { + "bits": {}, + "grid_x": 84, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X85Y0": { + "bits": {}, + "grid_x": 85, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X85Y52": { + "bits": {}, + "grid_x": 85, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X85Y104": { + "bits": {}, + "grid_x": 85, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X85Y156": { + "bits": {}, + "grid_x": 85, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y0": { + "bits": {}, + "grid_x": 86, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y2": { + "bits": {}, + "grid_x": 86, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y3": { + "bits": {}, + "grid_x": 86, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y4": { + "bits": {}, + "grid_x": 86, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y5": { + "bits": {}, + "grid_x": 86, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y7": { + "bits": {}, + "grid_x": 86, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y8": { + "bits": {}, + "grid_x": 86, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y9": { + "bits": {}, + "grid_x": 86, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y10": { + "bits": {}, + "grid_x": 86, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y12": { + "bits": {}, + "grid_x": 86, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y13": { + "bits": {}, + "grid_x": 86, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y14": { + "bits": {}, + "grid_x": 86, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y15": { + "bits": {}, + "grid_x": 86, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y17": { + "bits": {}, + "grid_x": 86, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y18": { + "bits": {}, + "grid_x": 86, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y19": { + "bits": {}, + "grid_x": 86, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y20": { + "bits": {}, + "grid_x": 86, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y22": { + "bits": {}, + "grid_x": 86, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y23": { + "bits": {}, + "grid_x": 86, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y24": { + "bits": {}, + "grid_x": 86, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y25": { + "bits": {}, + "grid_x": 86, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y28": { + "bits": {}, + "grid_x": 86, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y29": { + "bits": {}, + "grid_x": 86, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y30": { + "bits": {}, + "grid_x": 86, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y31": { + "bits": {}, + "grid_x": 86, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y33": { + "bits": {}, + "grid_x": 86, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y34": { + "bits": {}, + "grid_x": 86, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y35": { + "bits": {}, + "grid_x": 86, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y36": { + "bits": {}, + "grid_x": 86, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y38": { + "bits": {}, + "grid_x": 86, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y39": { + "bits": {}, + "grid_x": 86, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y40": { + "bits": {}, + "grid_x": 86, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y41": { + "bits": {}, + "grid_x": 86, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y43": { + "bits": {}, + "grid_x": 86, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y44": { + "bits": {}, + "grid_x": 86, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y45": { + "bits": {}, + "grid_x": 86, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y46": { + "bits": {}, + "grid_x": 86, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y48": { + "bits": {}, + "grid_x": 86, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y49": { + "bits": {}, + "grid_x": 86, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y50": { + "bits": {}, + "grid_x": 86, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y51": { + "bits": {}, + "grid_x": 86, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y54": { + "bits": {}, + "grid_x": 86, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y55": { + "bits": {}, + "grid_x": 86, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y56": { + "bits": {}, + "grid_x": 86, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y57": { + "bits": {}, + "grid_x": 86, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y59": { + "bits": {}, + "grid_x": 86, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y60": { + "bits": {}, + "grid_x": 86, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y61": { + "bits": {}, + "grid_x": 86, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y62": { + "bits": {}, + "grid_x": 86, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y64": { + "bits": {}, + "grid_x": 86, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y65": { + "bits": {}, + "grid_x": 86, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y66": { + "bits": {}, + "grid_x": 86, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y67": { + "bits": {}, + "grid_x": 86, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y69": { + "bits": {}, + "grid_x": 86, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y70": { + "bits": {}, + "grid_x": 86, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y71": { + "bits": {}, + "grid_x": 86, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y72": { + "bits": {}, + "grid_x": 86, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y74": { + "bits": {}, + "grid_x": 86, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y75": { + "bits": {}, + "grid_x": 86, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y76": { + "bits": {}, + "grid_x": 86, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y77": { + "bits": {}, + "grid_x": 86, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y80": { + "bits": {}, + "grid_x": 86, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y81": { + "bits": {}, + "grid_x": 86, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y82": { + "bits": {}, + "grid_x": 86, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y83": { + "bits": {}, + "grid_x": 86, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y85": { + "bits": {}, + "grid_x": 86, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y86": { + "bits": {}, + "grid_x": 86, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y87": { + "bits": {}, + "grid_x": 86, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y88": { + "bits": {}, + "grid_x": 86, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y90": { + "bits": {}, + "grid_x": 86, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y91": { + "bits": {}, + "grid_x": 86, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y92": { + "bits": {}, + "grid_x": 86, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y93": { + "bits": {}, + "grid_x": 86, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y95": { + "bits": {}, + "grid_x": 86, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y96": { + "bits": {}, + "grid_x": 86, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y97": { + "bits": {}, + "grid_x": 86, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y98": { + "bits": {}, + "grid_x": 86, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y100": { + "bits": {}, + "grid_x": 86, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y101": { + "bits": {}, + "grid_x": 86, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y102": { + "bits": {}, + "grid_x": 86, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y103": { + "bits": {}, + "grid_x": 86, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y106": { + "bits": {}, + "grid_x": 86, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y107": { + "bits": {}, + "grid_x": 86, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y108": { + "bits": {}, + "grid_x": 86, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y109": { + "bits": {}, + "grid_x": 86, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y111": { + "bits": {}, + "grid_x": 86, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y112": { + "bits": {}, + "grid_x": 86, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y113": { + "bits": {}, + "grid_x": 86, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y114": { + "bits": {}, + "grid_x": 86, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y116": { + "bits": {}, + "grid_x": 86, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y117": { + "bits": {}, + "grid_x": 86, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y118": { + "bits": {}, + "grid_x": 86, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y119": { + "bits": {}, + "grid_x": 86, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y121": { + "bits": {}, + "grid_x": 86, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y122": { + "bits": {}, + "grid_x": 86, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y123": { + "bits": {}, + "grid_x": 86, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y124": { + "bits": {}, + "grid_x": 86, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y126": { + "bits": {}, + "grid_x": 86, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y127": { + "bits": {}, + "grid_x": 86, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y128": { + "bits": {}, + "grid_x": 86, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y129": { + "bits": {}, + "grid_x": 86, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y132": { + "bits": {}, + "grid_x": 86, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y133": { + "bits": {}, + "grid_x": 86, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y134": { + "bits": {}, + "grid_x": 86, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y135": { + "bits": {}, + "grid_x": 86, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y137": { + "bits": {}, + "grid_x": 86, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y138": { + "bits": {}, + "grid_x": 86, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y139": { + "bits": {}, + "grid_x": 86, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y140": { + "bits": {}, + "grid_x": 86, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y142": { + "bits": {}, + "grid_x": 86, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y143": { + "bits": {}, + "grid_x": 86, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y144": { + "bits": {}, + "grid_x": 86, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y145": { + "bits": {}, + "grid_x": 86, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y147": { + "bits": {}, + "grid_x": 86, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y148": { + "bits": {}, + "grid_x": 86, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y149": { + "bits": {}, + "grid_x": 86, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y150": { + "bits": {}, + "grid_x": 86, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y152": { + "bits": {}, + "grid_x": 86, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y153": { + "bits": {}, + "grid_x": 86, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y154": { + "bits": {}, + "grid_x": 86, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y155": { + "bits": {}, + "grid_x": 86, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X86Y156": { + "bits": {}, + "grid_x": 86, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X87Y0": { + "bits": {}, + "grid_x": 87, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X87Y52": { + "bits": {}, + "grid_x": 87, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X87Y104": { + "bits": {}, + "grid_x": 87, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X87Y156": { + "bits": {}, + "grid_x": 87, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X90Y0": { + "bits": {}, + "grid_x": 90, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X90Y156": { + "bits": {}, + "grid_x": 90, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X91Y0": { + "bits": {}, + "grid_x": 91, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X91Y156": { + "bits": {}, + "grid_x": 91, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X94Y0": { + "bits": {}, + "grid_x": 94, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X94Y52": { + "bits": {}, + "grid_x": 94, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X94Y104": { + "bits": {}, + "grid_x": 94, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X94Y156": { + "bits": {}, + "grid_x": 94, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y0": { + "bits": {}, + "grid_x": 95, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y2": { + "bits": {}, + "grid_x": 95, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y3": { + "bits": {}, + "grid_x": 95, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y4": { + "bits": {}, + "grid_x": 95, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y5": { + "bits": {}, + "grid_x": 95, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y7": { + "bits": {}, + "grid_x": 95, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y8": { + "bits": {}, + "grid_x": 95, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y9": { + "bits": {}, + "grid_x": 95, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y10": { + "bits": {}, + "grid_x": 95, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y12": { + "bits": {}, + "grid_x": 95, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y13": { + "bits": {}, + "grid_x": 95, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y14": { + "bits": {}, + "grid_x": 95, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y15": { + "bits": {}, + "grid_x": 95, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y17": { + "bits": {}, + "grid_x": 95, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y18": { + "bits": {}, + "grid_x": 95, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y19": { + "bits": {}, + "grid_x": 95, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y20": { + "bits": {}, + "grid_x": 95, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y22": { + "bits": {}, + "grid_x": 95, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y23": { + "bits": {}, + "grid_x": 95, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y24": { + "bits": {}, + "grid_x": 95, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y25": { + "bits": {}, + "grid_x": 95, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y28": { + "bits": {}, + "grid_x": 95, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y29": { + "bits": {}, + "grid_x": 95, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y30": { + "bits": {}, + "grid_x": 95, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y31": { + "bits": {}, + "grid_x": 95, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y33": { + "bits": {}, + "grid_x": 95, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y34": { + "bits": {}, + "grid_x": 95, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y35": { + "bits": {}, + "grid_x": 95, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y36": { + "bits": {}, + "grid_x": 95, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y38": { + "bits": {}, + "grid_x": 95, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y39": { + "bits": {}, + "grid_x": 95, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y40": { + "bits": {}, + "grid_x": 95, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y41": { + "bits": {}, + "grid_x": 95, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y43": { + "bits": {}, + "grid_x": 95, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y44": { + "bits": {}, + "grid_x": 95, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y45": { + "bits": {}, + "grid_x": 95, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y46": { + "bits": {}, + "grid_x": 95, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y48": { + "bits": {}, + "grid_x": 95, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y49": { + "bits": {}, + "grid_x": 95, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y50": { + "bits": {}, + "grid_x": 95, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y51": { + "bits": {}, + "grid_x": 95, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y54": { + "bits": {}, + "grid_x": 95, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y55": { + "bits": {}, + "grid_x": 95, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y56": { + "bits": {}, + "grid_x": 95, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y57": { + "bits": {}, + "grid_x": 95, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y59": { + "bits": {}, + "grid_x": 95, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y60": { + "bits": {}, + "grid_x": 95, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y61": { + "bits": {}, + "grid_x": 95, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y62": { + "bits": {}, + "grid_x": 95, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y64": { + "bits": {}, + "grid_x": 95, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y65": { + "bits": {}, + "grid_x": 95, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y66": { + "bits": {}, + "grid_x": 95, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y67": { + "bits": {}, + "grid_x": 95, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y69": { + "bits": {}, + "grid_x": 95, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y70": { + "bits": {}, + "grid_x": 95, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y71": { + "bits": {}, + "grid_x": 95, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y72": { + "bits": {}, + "grid_x": 95, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y74": { + "bits": {}, + "grid_x": 95, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y75": { + "bits": {}, + "grid_x": 95, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y76": { + "bits": {}, + "grid_x": 95, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y77": { + "bits": {}, + "grid_x": 95, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y80": { + "bits": {}, + "grid_x": 95, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y81": { + "bits": {}, + "grid_x": 95, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y82": { + "bits": {}, + "grid_x": 95, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y83": { + "bits": {}, + "grid_x": 95, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y85": { + "bits": {}, + "grid_x": 95, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y86": { + "bits": {}, + "grid_x": 95, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y87": { + "bits": {}, + "grid_x": 95, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y88": { + "bits": {}, + "grid_x": 95, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y90": { + "bits": {}, + "grid_x": 95, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y91": { + "bits": {}, + "grid_x": 95, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y92": { + "bits": {}, + "grid_x": 95, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y93": { + "bits": {}, + "grid_x": 95, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y95": { + "bits": {}, + "grid_x": 95, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y96": { + "bits": {}, + "grid_x": 95, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y97": { + "bits": {}, + "grid_x": 95, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y98": { + "bits": {}, + "grid_x": 95, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y100": { + "bits": {}, + "grid_x": 95, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y101": { + "bits": {}, + "grid_x": 95, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y102": { + "bits": {}, + "grid_x": 95, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y103": { + "bits": {}, + "grid_x": 95, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y104": { + "bits": {}, + "grid_x": 95, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X95Y156": { + "bits": {}, + "grid_x": 95, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X96Y0": { + "bits": {}, + "grid_x": 96, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X96Y52": { + "bits": {}, + "grid_x": 96, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X96Y104": { + "bits": {}, + "grid_x": 96, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X96Y156": { + "bits": {}, + "grid_x": 96, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y0": { + "bits": {}, + "grid_x": 97, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y105": { + "bits": {}, + "grid_x": 97, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y106": { + "bits": {}, + "grid_x": 97, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y107": { + "bits": {}, + "grid_x": 97, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y108": { + "bits": {}, + "grid_x": 97, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y109": { + "bits": {}, + "grid_x": 97, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y111": { + "bits": {}, + "grid_x": 97, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y112": { + "bits": {}, + "grid_x": 97, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y113": { + "bits": {}, + "grid_x": 97, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y114": { + "bits": {}, + "grid_x": 97, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y115": { + "bits": {}, + "grid_x": 97, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y116": { + "bits": {}, + "grid_x": 97, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y117": { + "bits": {}, + "grid_x": 97, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y118": { + "bits": {}, + "grid_x": 97, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y119": { + "bits": {}, + "grid_x": 97, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y120": { + "bits": {}, + "grid_x": 97, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y122": { + "bits": {}, + "grid_x": 97, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y123": { + "bits": {}, + "grid_x": 97, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y124": { + "bits": {}, + "grid_x": 97, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y125": { + "bits": {}, + "grid_x": 97, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y126": { + "bits": {}, + "grid_x": 97, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y128": { + "bits": {}, + "grid_x": 97, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y129": { + "bits": {}, + "grid_x": 97, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y130": { + "bits": {}, + "grid_x": 97, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y131": { + "bits": {}, + "grid_x": 97, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y132": { + "bits": {}, + "grid_x": 97, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y133": { + "bits": {}, + "grid_x": 97, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y134": { + "bits": {}, + "grid_x": 97, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y135": { + "bits": {}, + "grid_x": 97, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y136": { + "bits": {}, + "grid_x": 97, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y137": { + "bits": {}, + "grid_x": 97, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y138": { + "bits": {}, + "grid_x": 97, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y140": { + "bits": {}, + "grid_x": 97, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y141": { + "bits": {}, + "grid_x": 97, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y142": { + "bits": {}, + "grid_x": 97, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y143": { + "bits": {}, + "grid_x": 97, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y144": { + "bits": {}, + "grid_x": 97, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y145": { + "bits": {}, + "grid_x": 97, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y146": { + "bits": {}, + "grid_x": 97, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y147": { + "bits": {}, + "grid_x": 97, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y148": { + "bits": {}, + "grid_x": 97, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y149": { + "bits": {}, + "grid_x": 97, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y151": { + "bits": {}, + "grid_x": 97, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y152": { + "bits": {}, + "grid_x": 97, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y153": { + "bits": {}, + "grid_x": 97, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y154": { + "bits": {}, + "grid_x": 97, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y155": { + "bits": {}, + "grid_x": 97, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X97Y156": { + "bits": {}, + "grid_x": 97, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y105": { + "bits": {}, + "grid_x": 98, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y106": { + "bits": {}, + "grid_x": 98, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y107": { + "bits": {}, + "grid_x": 98, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y108": { + "bits": {}, + "grid_x": 98, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y109": { + "bits": {}, + "grid_x": 98, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y110": { + "bits": {}, + "grid_x": 98, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y111": { + "bits": {}, + "grid_x": 98, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y112": { + "bits": {}, + "grid_x": 98, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y113": { + "bits": {}, + "grid_x": 98, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y114": { + "bits": {}, + "grid_x": 98, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y115": { + "bits": {}, + "grid_x": 98, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y116": { + "bits": {}, + "grid_x": 98, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y117": { + "bits": {}, + "grid_x": 98, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y118": { + "bits": {}, + "grid_x": 98, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y119": { + "bits": {}, + "grid_x": 98, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y120": { + "bits": {}, + "grid_x": 98, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y121": { + "bits": {}, + "grid_x": 98, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y122": { + "bits": {}, + "grid_x": 98, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y123": { + "bits": {}, + "grid_x": 98, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y124": { + "bits": {}, + "grid_x": 98, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y125": { + "bits": {}, + "grid_x": 98, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y126": { + "bits": {}, + "grid_x": 98, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y127": { + "bits": {}, + "grid_x": 98, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y128": { + "bits": {}, + "grid_x": 98, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y129": { + "bits": {}, + "grid_x": 98, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y130": { + "bits": {}, + "grid_x": 98, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y131": { + "bits": {}, + "grid_x": 98, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y132": { + "bits": {}, + "grid_x": 98, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y133": { + "bits": {}, + "grid_x": 98, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y134": { + "bits": {}, + "grid_x": 98, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y135": { + "bits": {}, + "grid_x": 98, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y136": { + "bits": {}, + "grid_x": 98, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y137": { + "bits": {}, + "grid_x": 98, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y138": { + "bits": {}, + "grid_x": 98, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y139": { + "bits": {}, + "grid_x": 98, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y140": { + "bits": {}, + "grid_x": 98, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y141": { + "bits": {}, + "grid_x": 98, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y142": { + "bits": {}, + "grid_x": 98, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y143": { + "bits": {}, + "grid_x": 98, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y144": { + "bits": {}, + "grid_x": 98, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y145": { + "bits": {}, + "grid_x": 98, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y146": { + "bits": {}, + "grid_x": 98, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y147": { + "bits": {}, + "grid_x": 98, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y148": { + "bits": {}, + "grid_x": 98, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y149": { + "bits": {}, + "grid_x": 98, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y150": { + "bits": {}, + "grid_x": 98, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y151": { + "bits": {}, + "grid_x": 98, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y152": { + "bits": {}, + "grid_x": 98, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y153": { + "bits": {}, + "grid_x": 98, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y154": { + "bits": {}, + "grid_x": 98, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y155": { + "bits": {}, + "grid_x": 98, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X98Y156": { + "bits": {}, + "grid_x": 98, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y105": { + "bits": {}, + "grid_x": 99, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y106": { + "bits": {}, + "grid_x": 99, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y107": { + "bits": {}, + "grid_x": 99, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y108": { + "bits": {}, + "grid_x": 99, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y109": { + "bits": {}, + "grid_x": 99, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y110": { + "bits": {}, + "grid_x": 99, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y111": { + "bits": {}, + "grid_x": 99, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y112": { + "bits": {}, + "grid_x": 99, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y113": { + "bits": {}, + "grid_x": 99, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y114": { + "bits": {}, + "grid_x": 99, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y115": { + "bits": {}, + "grid_x": 99, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y116": { + "bits": {}, + "grid_x": 99, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y117": { + "bits": {}, + "grid_x": 99, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y118": { + "bits": {}, + "grid_x": 99, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y119": { + "bits": {}, + "grid_x": 99, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y120": { + "bits": {}, + "grid_x": 99, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y121": { + "bits": {}, + "grid_x": 99, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y122": { + "bits": {}, + "grid_x": 99, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y123": { + "bits": {}, + "grid_x": 99, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y124": { + "bits": {}, + "grid_x": 99, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y125": { + "bits": {}, + "grid_x": 99, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y126": { + "bits": {}, + "grid_x": 99, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y127": { + "bits": {}, + "grid_x": 99, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y128": { + "bits": {}, + "grid_x": 99, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y129": { + "bits": {}, + "grid_x": 99, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y130": { + "bits": {}, + "grid_x": 99, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y131": { + "bits": {}, + "grid_x": 99, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y132": { + "bits": {}, + "grid_x": 99, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y133": { + "bits": {}, + "grid_x": 99, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y134": { + "bits": {}, + "grid_x": 99, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y135": { + "bits": {}, + "grid_x": 99, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y136": { + "bits": {}, + "grid_x": 99, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y137": { + "bits": {}, + "grid_x": 99, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y138": { + "bits": {}, + "grid_x": 99, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y139": { + "bits": {}, + "grid_x": 99, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y140": { + "bits": {}, + "grid_x": 99, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y141": { + "bits": {}, + "grid_x": 99, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y142": { + "bits": {}, + "grid_x": 99, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y143": { + "bits": {}, + "grid_x": 99, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y144": { + "bits": {}, + "grid_x": 99, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y145": { + "bits": {}, + "grid_x": 99, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y146": { + "bits": {}, + "grid_x": 99, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y147": { + "bits": {}, + "grid_x": 99, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y148": { + "bits": {}, + "grid_x": 99, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y149": { + "bits": {}, + "grid_x": 99, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y150": { + "bits": {}, + "grid_x": 99, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y151": { + "bits": {}, + "grid_x": 99, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y152": { + "bits": {}, + "grid_x": 99, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y153": { + "bits": {}, + "grid_x": 99, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y154": { + "bits": {}, + "grid_x": 99, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y155": { + "bits": {}, + "grid_x": 99, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X99Y156": { + "bits": {}, + "grid_x": 99, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y0": { + "bits": {}, + "grid_x": 100, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y104": { + "bits": {}, + "grid_x": 100, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y105": { + "bits": {}, + "grid_x": 100, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y106": { + "bits": {}, + "grid_x": 100, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y107": { + "bits": {}, + "grid_x": 100, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y108": { + "bits": {}, + "grid_x": 100, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y109": { + "bits": {}, + "grid_x": 100, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y110": { + "bits": {}, + "grid_x": 100, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y111": { + "bits": {}, + "grid_x": 100, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y112": { + "bits": {}, + "grid_x": 100, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y113": { + "bits": {}, + "grid_x": 100, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y114": { + "bits": {}, + "grid_x": 100, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y115": { + "bits": {}, + "grid_x": 100, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y116": { + "bits": {}, + "grid_x": 100, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y117": { + "bits": {}, + "grid_x": 100, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y118": { + "bits": {}, + "grid_x": 100, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y119": { + "bits": {}, + "grid_x": 100, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y120": { + "bits": {}, + "grid_x": 100, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y121": { + "bits": {}, + "grid_x": 100, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y122": { + "bits": {}, + "grid_x": 100, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y123": { + "bits": {}, + "grid_x": 100, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y124": { + "bits": {}, + "grid_x": 100, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y125": { + "bits": {}, + "grid_x": 100, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y126": { + "bits": {}, + "grid_x": 100, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y127": { + "bits": {}, + "grid_x": 100, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y128": { + "bits": {}, + "grid_x": 100, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y129": { + "bits": {}, + "grid_x": 100, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y130": { + "bits": {}, + "grid_x": 100, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y131": { + "bits": {}, + "grid_x": 100, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y132": { + "bits": {}, + "grid_x": 100, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y133": { + "bits": {}, + "grid_x": 100, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y134": { + "bits": {}, + "grid_x": 100, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y135": { + "bits": {}, + "grid_x": 100, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y136": { + "bits": {}, + "grid_x": 100, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y137": { + "bits": {}, + "grid_x": 100, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y138": { + "bits": {}, + "grid_x": 100, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y139": { + "bits": {}, + "grid_x": 100, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y140": { + "bits": {}, + "grid_x": 100, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y141": { + "bits": {}, + "grid_x": 100, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y142": { + "bits": {}, + "grid_x": 100, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y143": { + "bits": {}, + "grid_x": 100, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y144": { + "bits": {}, + "grid_x": 100, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y145": { + "bits": {}, + "grid_x": 100, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y146": { + "bits": {}, + "grid_x": 100, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y147": { + "bits": {}, + "grid_x": 100, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y148": { + "bits": {}, + "grid_x": 100, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y149": { + "bits": {}, + "grid_x": 100, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y150": { + "bits": {}, + "grid_x": 100, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y151": { + "bits": {}, + "grid_x": 100, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y152": { + "bits": {}, + "grid_x": 100, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y153": { + "bits": {}, + "grid_x": 100, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y154": { + "bits": {}, + "grid_x": 100, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y155": { + "bits": {}, + "grid_x": 100, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X100Y156": { + "bits": {}, + "grid_x": 100, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y0": { + "bits": {}, + "grid_x": 101, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y104": { + "bits": {}, + "grid_x": 101, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y105": { + "bits": {}, + "grid_x": 101, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y106": { + "bits": {}, + "grid_x": 101, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y107": { + "bits": {}, + "grid_x": 101, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y108": { + "bits": {}, + "grid_x": 101, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y109": { + "bits": {}, + "grid_x": 101, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y110": { + "bits": {}, + "grid_x": 101, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y111": { + "bits": {}, + "grid_x": 101, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y112": { + "bits": {}, + "grid_x": 101, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y113": { + "bits": {}, + "grid_x": 101, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y114": { + "bits": {}, + "grid_x": 101, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y115": { + "bits": {}, + "grid_x": 101, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y116": { + "bits": {}, + "grid_x": 101, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y117": { + "bits": {}, + "grid_x": 101, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y118": { + "bits": {}, + "grid_x": 101, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y119": { + "bits": {}, + "grid_x": 101, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y120": { + "bits": {}, + "grid_x": 101, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y121": { + "bits": {}, + "grid_x": 101, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y122": { + "bits": {}, + "grid_x": 101, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y123": { + "bits": {}, + "grid_x": 101, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y124": { + "bits": {}, + "grid_x": 101, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y125": { + "bits": {}, + "grid_x": 101, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y126": { + "bits": {}, + "grid_x": 101, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y127": { + "bits": {}, + "grid_x": 101, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y128": { + "bits": {}, + "grid_x": 101, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y129": { + "bits": {}, + "grid_x": 101, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y130": { + "bits": {}, + "grid_x": 101, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y131": { + "bits": {}, + "grid_x": 101, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y132": { + "bits": {}, + "grid_x": 101, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y133": { + "bits": {}, + "grid_x": 101, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y134": { + "bits": {}, + "grid_x": 101, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y135": { + "bits": {}, + "grid_x": 101, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y136": { + "bits": {}, + "grid_x": 101, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y137": { + "bits": {}, + "grid_x": 101, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y138": { + "bits": {}, + "grid_x": 101, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y139": { + "bits": {}, + "grid_x": 101, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y140": { + "bits": {}, + "grid_x": 101, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y141": { + "bits": {}, + "grid_x": 101, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y142": { + "bits": {}, + "grid_x": 101, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y143": { + "bits": {}, + "grid_x": 101, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y144": { + "bits": {}, + "grid_x": 101, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y145": { + "bits": {}, + "grid_x": 101, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y146": { + "bits": {}, + "grid_x": 101, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y147": { + "bits": {}, + "grid_x": 101, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y148": { + "bits": {}, + "grid_x": 101, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y149": { + "bits": {}, + "grid_x": 101, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y150": { + "bits": {}, + "grid_x": 101, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y151": { + "bits": {}, + "grid_x": 101, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y152": { + "bits": {}, + "grid_x": 101, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y153": { + "bits": {}, + "grid_x": 101, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y154": { + "bits": {}, + "grid_x": 101, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y155": { + "bits": {}, + "grid_x": 101, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X101Y156": { + "bits": {}, + "grid_x": 101, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y105": { + "bits": {}, + "grid_x": 102, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y106": { + "bits": {}, + "grid_x": 102, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y107": { + "bits": {}, + "grid_x": 102, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y108": { + "bits": {}, + "grid_x": 102, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y109": { + "bits": {}, + "grid_x": 102, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y110": { + "bits": {}, + "grid_x": 102, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y111": { + "bits": {}, + "grid_x": 102, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y112": { + "bits": {}, + "grid_x": 102, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y113": { + "bits": {}, + "grid_x": 102, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y114": { + "bits": {}, + "grid_x": 102, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y115": { + "bits": {}, + "grid_x": 102, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y116": { + "bits": {}, + "grid_x": 102, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y117": { + "bits": {}, + "grid_x": 102, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y118": { + "bits": {}, + "grid_x": 102, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y119": { + "bits": {}, + "grid_x": 102, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y120": { + "bits": {}, + "grid_x": 102, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y121": { + "bits": {}, + "grid_x": 102, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y122": { + "bits": {}, + "grid_x": 102, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y123": { + "bits": {}, + "grid_x": 102, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y124": { + "bits": {}, + "grid_x": 102, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y125": { + "bits": {}, + "grid_x": 102, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y126": { + "bits": {}, + "grid_x": 102, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y127": { + "bits": {}, + "grid_x": 102, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y128": { + "bits": {}, + "grid_x": 102, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y129": { + "bits": {}, + "grid_x": 102, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y130": { + "bits": {}, + "grid_x": 102, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y131": { + "bits": {}, + "grid_x": 102, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y132": { + "bits": {}, + "grid_x": 102, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y133": { + "bits": {}, + "grid_x": 102, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y134": { + "bits": {}, + "grid_x": 102, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y135": { + "bits": {}, + "grid_x": 102, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y136": { + "bits": {}, + "grid_x": 102, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y137": { + "bits": {}, + "grid_x": 102, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y138": { + "bits": {}, + "grid_x": 102, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y139": { + "bits": {}, + "grid_x": 102, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y140": { + "bits": {}, + "grid_x": 102, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y141": { + "bits": {}, + "grid_x": 102, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y142": { + "bits": {}, + "grid_x": 102, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y143": { + "bits": {}, + "grid_x": 102, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y144": { + "bits": {}, + "grid_x": 102, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y145": { + "bits": {}, + "grid_x": 102, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y146": { + "bits": {}, + "grid_x": 102, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y147": { + "bits": {}, + "grid_x": 102, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y148": { + "bits": {}, + "grid_x": 102, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y149": { + "bits": {}, + "grid_x": 102, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y150": { + "bits": {}, + "grid_x": 102, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y151": { + "bits": {}, + "grid_x": 102, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y152": { + "bits": {}, + "grid_x": 102, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y153": { + "bits": {}, + "grid_x": 102, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y154": { + "bits": {}, + "grid_x": 102, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y155": { + "bits": {}, + "grid_x": 102, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X102Y156": { + "bits": {}, + "grid_x": 102, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y105": { + "bits": {}, + "grid_x": 103, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y106": { + "bits": {}, + "grid_x": 103, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y107": { + "bits": {}, + "grid_x": 103, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y108": { + "bits": {}, + "grid_x": 103, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y109": { + "bits": {}, + "grid_x": 103, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y110": { + "bits": {}, + "grid_x": 103, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y111": { + "bits": {}, + "grid_x": 103, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y112": { + "bits": {}, + "grid_x": 103, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y113": { + "bits": {}, + "grid_x": 103, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y114": { + "bits": {}, + "grid_x": 103, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y115": { + "bits": {}, + "grid_x": 103, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y116": { + "bits": {}, + "grid_x": 103, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y117": { + "bits": {}, + "grid_x": 103, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y118": { + "bits": {}, + "grid_x": 103, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y119": { + "bits": {}, + "grid_x": 103, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y120": { + "bits": {}, + "grid_x": 103, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y121": { + "bits": {}, + "grid_x": 103, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y122": { + "bits": {}, + "grid_x": 103, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y123": { + "bits": {}, + "grid_x": 103, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y124": { + "bits": {}, + "grid_x": 103, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y125": { + "bits": {}, + "grid_x": 103, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y126": { + "bits": {}, + "grid_x": 103, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y127": { + "bits": {}, + "grid_x": 103, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y128": { + "bits": {}, + "grid_x": 103, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y129": { + "bits": {}, + "grid_x": 103, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y130": { + "bits": {}, + "grid_x": 103, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y131": { + "bits": {}, + "grid_x": 103, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y132": { + "bits": {}, + "grid_x": 103, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y133": { + "bits": {}, + "grid_x": 103, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y134": { + "bits": {}, + "grid_x": 103, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y135": { + "bits": {}, + "grid_x": 103, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y136": { + "bits": {}, + "grid_x": 103, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y137": { + "bits": {}, + "grid_x": 103, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y138": { + "bits": {}, + "grid_x": 103, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y139": { + "bits": {}, + "grid_x": 103, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y140": { + "bits": {}, + "grid_x": 103, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y141": { + "bits": {}, + "grid_x": 103, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y142": { + "bits": {}, + "grid_x": 103, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y143": { + "bits": {}, + "grid_x": 103, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y144": { + "bits": {}, + "grid_x": 103, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y145": { + "bits": {}, + "grid_x": 103, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y146": { + "bits": {}, + "grid_x": 103, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y147": { + "bits": {}, + "grid_x": 103, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y148": { + "bits": {}, + "grid_x": 103, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y149": { + "bits": {}, + "grid_x": 103, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y150": { + "bits": {}, + "grid_x": 103, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y151": { + "bits": {}, + "grid_x": 103, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y152": { + "bits": {}, + "grid_x": 103, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y153": { + "bits": {}, + "grid_x": 103, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y154": { + "bits": {}, + "grid_x": 103, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y155": { + "bits": {}, + "grid_x": 103, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X103Y156": { + "bits": {}, + "grid_x": 103, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y0": { + "bits": {}, + "grid_x": 104, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y104": { + "bits": {}, + "grid_x": 104, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y105": { + "bits": {}, + "grid_x": 104, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y106": { + "bits": {}, + "grid_x": 104, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y107": { + "bits": {}, + "grid_x": 104, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y108": { + "bits": {}, + "grid_x": 104, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y109": { + "bits": {}, + "grid_x": 104, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y110": { + "bits": {}, + "grid_x": 104, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y111": { + "bits": {}, + "grid_x": 104, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y112": { + "bits": {}, + "grid_x": 104, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y113": { + "bits": {}, + "grid_x": 104, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y114": { + "bits": {}, + "grid_x": 104, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y115": { + "bits": {}, + "grid_x": 104, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y116": { + "bits": {}, + "grid_x": 104, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y117": { + "bits": {}, + "grid_x": 104, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y118": { + "bits": {}, + "grid_x": 104, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y119": { + "bits": {}, + "grid_x": 104, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y120": { + "bits": {}, + "grid_x": 104, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y121": { + "bits": {}, + "grid_x": 104, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y122": { + "bits": {}, + "grid_x": 104, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y123": { + "bits": {}, + "grid_x": 104, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y124": { + "bits": {}, + "grid_x": 104, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y125": { + "bits": {}, + "grid_x": 104, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y126": { + "bits": {}, + "grid_x": 104, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y127": { + "bits": {}, + "grid_x": 104, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y128": { + "bits": {}, + "grid_x": 104, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y129": { + "bits": {}, + "grid_x": 104, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y130": { + "bits": {}, + "grid_x": 104, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y131": { + "bits": {}, + "grid_x": 104, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y132": { + "bits": {}, + "grid_x": 104, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y133": { + "bits": {}, + "grid_x": 104, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y134": { + "bits": {}, + "grid_x": 104, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y135": { + "bits": {}, + "grid_x": 104, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y136": { + "bits": {}, + "grid_x": 104, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y137": { + "bits": {}, + "grid_x": 104, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y138": { + "bits": {}, + "grid_x": 104, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y139": { + "bits": {}, + "grid_x": 104, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y140": { + "bits": {}, + "grid_x": 104, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y141": { + "bits": {}, + "grid_x": 104, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y142": { + "bits": {}, + "grid_x": 104, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y143": { + "bits": {}, + "grid_x": 104, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y144": { + "bits": {}, + "grid_x": 104, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y145": { + "bits": {}, + "grid_x": 104, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y146": { + "bits": {}, + "grid_x": 104, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y147": { + "bits": {}, + "grid_x": 104, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y148": { + "bits": {}, + "grid_x": 104, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y149": { + "bits": {}, + "grid_x": 104, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y150": { + "bits": {}, + "grid_x": 104, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y151": { + "bits": {}, + "grid_x": 104, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y152": { + "bits": {}, + "grid_x": 104, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y153": { + "bits": {}, + "grid_x": 104, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y154": { + "bits": {}, + "grid_x": 104, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y155": { + "bits": {}, + "grid_x": 104, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X104Y156": { + "bits": {}, + "grid_x": 104, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y0": { + "bits": {}, + "grid_x": 105, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y52": { + "bits": {}, + "grid_x": 105, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y104": { + "bits": {}, + "grid_x": 105, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y105": { + "bits": {}, + "grid_x": 105, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y106": { + "bits": {}, + "grid_x": 105, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y107": { + "bits": {}, + "grid_x": 105, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y108": { + "bits": {}, + "grid_x": 105, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y109": { + "bits": {}, + "grid_x": 105, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y110": { + "bits": {}, + "grid_x": 105, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y111": { + "bits": {}, + "grid_x": 105, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y112": { + "bits": {}, + "grid_x": 105, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y113": { + "bits": {}, + "grid_x": 105, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y114": { + "bits": {}, + "grid_x": 105, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y115": { + "bits": {}, + "grid_x": 105, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y116": { + "bits": {}, + "grid_x": 105, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y117": { + "bits": {}, + "grid_x": 105, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y118": { + "bits": {}, + "grid_x": 105, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y119": { + "bits": {}, + "grid_x": 105, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y120": { + "bits": {}, + "grid_x": 105, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y121": { + "bits": {}, + "grid_x": 105, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y122": { + "bits": {}, + "grid_x": 105, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y123": { + "bits": {}, + "grid_x": 105, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y124": { + "bits": {}, + "grid_x": 105, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y125": { + "bits": {}, + "grid_x": 105, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y126": { + "bits": {}, + "grid_x": 105, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y127": { + "bits": {}, + "grid_x": 105, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y128": { + "bits": {}, + "grid_x": 105, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y129": { + "bits": {}, + "grid_x": 105, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y130": { + "bits": {}, + "grid_x": 105, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y131": { + "bits": {}, + "grid_x": 105, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y132": { + "bits": {}, + "grid_x": 105, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y133": { + "bits": {}, + "grid_x": 105, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y134": { + "bits": {}, + "grid_x": 105, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y135": { + "bits": {}, + "grid_x": 105, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y136": { + "bits": {}, + "grid_x": 105, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y137": { + "bits": {}, + "grid_x": 105, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y138": { + "bits": {}, + "grid_x": 105, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y139": { + "bits": {}, + "grid_x": 105, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y140": { + "bits": {}, + "grid_x": 105, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y141": { + "bits": {}, + "grid_x": 105, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y142": { + "bits": {}, + "grid_x": 105, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y143": { + "bits": {}, + "grid_x": 105, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y144": { + "bits": {}, + "grid_x": 105, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y145": { + "bits": {}, + "grid_x": 105, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y146": { + "bits": {}, + "grid_x": 105, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y147": { + "bits": {}, + "grid_x": 105, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y148": { + "bits": {}, + "grid_x": 105, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y149": { + "bits": {}, + "grid_x": 105, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y150": { + "bits": {}, + "grid_x": 105, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y151": { + "bits": {}, + "grid_x": 105, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y152": { + "bits": {}, + "grid_x": 105, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y153": { + "bits": {}, + "grid_x": 105, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y154": { + "bits": {}, + "grid_x": 105, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y155": { + "bits": {}, + "grid_x": 105, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X105Y156": { + "bits": {}, + "grid_x": 105, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y1": { + "bits": {}, + "grid_x": 106, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y2": { + "bits": {}, + "grid_x": 106, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y3": { + "bits": {}, + "grid_x": 106, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y4": { + "bits": {}, + "grid_x": 106, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y5": { + "bits": {}, + "grid_x": 106, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y6": { + "bits": {}, + "grid_x": 106, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y7": { + "bits": {}, + "grid_x": 106, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y8": { + "bits": {}, + "grid_x": 106, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y10": { + "bits": {}, + "grid_x": 106, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y11": { + "bits": {}, + "grid_x": 106, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y12": { + "bits": {}, + "grid_x": 106, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y13": { + "bits": {}, + "grid_x": 106, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y14": { + "bits": {}, + "grid_x": 106, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y15": { + "bits": {}, + "grid_x": 106, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y16": { + "bits": {}, + "grid_x": 106, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y17": { + "bits": {}, + "grid_x": 106, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y19": { + "bits": {}, + "grid_x": 106, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y20": { + "bits": {}, + "grid_x": 106, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y21": { + "bits": {}, + "grid_x": 106, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y22": { + "bits": {}, + "grid_x": 106, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y23": { + "bits": {}, + "grid_x": 106, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y24": { + "bits": {}, + "grid_x": 106, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y25": { + "bits": {}, + "grid_x": 106, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y27": { + "bits": {}, + "grid_x": 106, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y28": { + "bits": {}, + "grid_x": 106, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y29": { + "bits": {}, + "grid_x": 106, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y30": { + "bits": {}, + "grid_x": 106, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y32": { + "bits": {}, + "grid_x": 106, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y33": { + "bits": {}, + "grid_x": 106, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y34": { + "bits": {}, + "grid_x": 106, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y35": { + "bits": {}, + "grid_x": 106, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y36": { + "bits": {}, + "grid_x": 106, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y37": { + "bits": {}, + "grid_x": 106, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y38": { + "bits": {}, + "grid_x": 106, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y39": { + "bits": {}, + "grid_x": 106, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y40": { + "bits": {}, + "grid_x": 106, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y41": { + "bits": {}, + "grid_x": 106, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y42": { + "bits": {}, + "grid_x": 106, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y43": { + "bits": {}, + "grid_x": 106, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y45": { + "bits": {}, + "grid_x": 106, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y46": { + "bits": {}, + "grid_x": 106, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y47": { + "bits": {}, + "grid_x": 106, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y48": { + "bits": {}, + "grid_x": 106, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y49": { + "bits": {}, + "grid_x": 106, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y50": { + "bits": {}, + "grid_x": 106, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y51": { + "bits": {}, + "grid_x": 106, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y53": { + "bits": {}, + "grid_x": 106, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y54": { + "bits": {}, + "grid_x": 106, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y55": { + "bits": {}, + "grid_x": 106, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y56": { + "bits": {}, + "grid_x": 106, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y57": { + "bits": {}, + "grid_x": 106, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y58": { + "bits": {}, + "grid_x": 106, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y59": { + "bits": {}, + "grid_x": 106, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y60": { + "bits": {}, + "grid_x": 106, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y62": { + "bits": {}, + "grid_x": 106, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y63": { + "bits": {}, + "grid_x": 106, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y64": { + "bits": {}, + "grid_x": 106, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y65": { + "bits": {}, + "grid_x": 106, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y66": { + "bits": {}, + "grid_x": 106, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y67": { + "bits": {}, + "grid_x": 106, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y68": { + "bits": {}, + "grid_x": 106, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y69": { + "bits": {}, + "grid_x": 106, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y71": { + "bits": {}, + "grid_x": 106, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y72": { + "bits": {}, + "grid_x": 106, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y73": { + "bits": {}, + "grid_x": 106, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y74": { + "bits": {}, + "grid_x": 106, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y75": { + "bits": {}, + "grid_x": 106, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y76": { + "bits": {}, + "grid_x": 106, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y77": { + "bits": {}, + "grid_x": 106, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y79": { + "bits": {}, + "grid_x": 106, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y80": { + "bits": {}, + "grid_x": 106, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y81": { + "bits": {}, + "grid_x": 106, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y82": { + "bits": {}, + "grid_x": 106, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y84": { + "bits": {}, + "grid_x": 106, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y85": { + "bits": {}, + "grid_x": 106, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y86": { + "bits": {}, + "grid_x": 106, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y87": { + "bits": {}, + "grid_x": 106, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y88": { + "bits": {}, + "grid_x": 106, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y89": { + "bits": {}, + "grid_x": 106, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y90": { + "bits": {}, + "grid_x": 106, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y91": { + "bits": {}, + "grid_x": 106, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y92": { + "bits": {}, + "grid_x": 106, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y93": { + "bits": {}, + "grid_x": 106, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y94": { + "bits": {}, + "grid_x": 106, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y95": { + "bits": {}, + "grid_x": 106, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y97": { + "bits": {}, + "grid_x": 106, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y98": { + "bits": {}, + "grid_x": 106, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y99": { + "bits": {}, + "grid_x": 106, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y100": { + "bits": {}, + "grid_x": 106, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y101": { + "bits": {}, + "grid_x": 106, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y102": { + "bits": {}, + "grid_x": 106, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y103": { + "bits": {}, + "grid_x": 106, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y104": { + "bits": {}, + "grid_x": 106, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y105": { + "bits": {}, + "grid_x": 106, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y106": { + "bits": {}, + "grid_x": 106, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y107": { + "bits": {}, + "grid_x": 106, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y108": { + "bits": {}, + "grid_x": 106, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y109": { + "bits": {}, + "grid_x": 106, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y110": { + "bits": {}, + "grid_x": 106, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y111": { + "bits": {}, + "grid_x": 106, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y112": { + "bits": {}, + "grid_x": 106, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y113": { + "bits": {}, + "grid_x": 106, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y114": { + "bits": {}, + "grid_x": 106, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y115": { + "bits": {}, + "grid_x": 106, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y116": { + "bits": {}, + "grid_x": 106, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y117": { + "bits": {}, + "grid_x": 106, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y118": { + "bits": {}, + "grid_x": 106, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y119": { + "bits": {}, + "grid_x": 106, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y120": { + "bits": {}, + "grid_x": 106, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y121": { + "bits": {}, + "grid_x": 106, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y122": { + "bits": {}, + "grid_x": 106, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y123": { + "bits": {}, + "grid_x": 106, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y124": { + "bits": {}, + "grid_x": 106, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y125": { + "bits": {}, + "grid_x": 106, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y126": { + "bits": {}, + "grid_x": 106, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y127": { + "bits": {}, + "grid_x": 106, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y128": { + "bits": {}, + "grid_x": 106, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y129": { + "bits": {}, + "grid_x": 106, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y130": { + "bits": {}, + "grid_x": 106, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y131": { + "bits": {}, + "grid_x": 106, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y132": { + "bits": {}, + "grid_x": 106, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y133": { + "bits": {}, + "grid_x": 106, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y134": { + "bits": {}, + "grid_x": 106, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y135": { + "bits": {}, + "grid_x": 106, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y136": { + "bits": {}, + "grid_x": 106, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y137": { + "bits": {}, + "grid_x": 106, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y138": { + "bits": {}, + "grid_x": 106, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y139": { + "bits": {}, + "grid_x": 106, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y140": { + "bits": {}, + "grid_x": 106, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y141": { + "bits": {}, + "grid_x": 106, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y142": { + "bits": {}, + "grid_x": 106, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y143": { + "bits": {}, + "grid_x": 106, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y144": { + "bits": {}, + "grid_x": 106, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y145": { + "bits": {}, + "grid_x": 106, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y146": { + "bits": {}, + "grid_x": 106, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y147": { + "bits": {}, + "grid_x": 106, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y148": { + "bits": {}, + "grid_x": 106, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y149": { + "bits": {}, + "grid_x": 106, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y150": { + "bits": {}, + "grid_x": 106, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y151": { + "bits": {}, + "grid_x": 106, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y152": { + "bits": {}, + "grid_x": 106, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y153": { + "bits": {}, + "grid_x": 106, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y154": { + "bits": {}, + "grid_x": 106, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y155": { + "bits": {}, + "grid_x": 106, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X106Y156": { + "bits": {}, + "grid_x": 106, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y0": { + "bits": {}, + "grid_x": 107, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y2": { + "bits": {}, + "grid_x": 107, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y3": { + "bits": {}, + "grid_x": 107, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y4": { + "bits": {}, + "grid_x": 107, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y5": { + "bits": {}, + "grid_x": 107, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y6": { + "bits": {}, + "grid_x": 107, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y7": { + "bits": {}, + "grid_x": 107, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y9": { + "bits": {}, + "grid_x": 107, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y10": { + "bits": {}, + "grid_x": 107, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y11": { + "bits": {}, + "grid_x": 107, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y12": { + "bits": {}, + "grid_x": 107, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y13": { + "bits": {}, + "grid_x": 107, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y14": { + "bits": {}, + "grid_x": 107, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y15": { + "bits": {}, + "grid_x": 107, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y16": { + "bits": {}, + "grid_x": 107, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y17": { + "bits": {}, + "grid_x": 107, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y18": { + "bits": {}, + "grid_x": 107, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y19": { + "bits": {}, + "grid_x": 107, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y21": { + "bits": {}, + "grid_x": 107, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y22": { + "bits": {}, + "grid_x": 107, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y23": { + "bits": {}, + "grid_x": 107, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y24": { + "bits": {}, + "grid_x": 107, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y25": { + "bits": {}, + "grid_x": 107, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y27": { + "bits": {}, + "grid_x": 107, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y28": { + "bits": {}, + "grid_x": 107, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y29": { + "bits": {}, + "grid_x": 107, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y30": { + "bits": {}, + "grid_x": 107, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y31": { + "bits": {}, + "grid_x": 107, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y32": { + "bits": {}, + "grid_x": 107, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y34": { + "bits": {}, + "grid_x": 107, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y35": { + "bits": {}, + "grid_x": 107, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y36": { + "bits": {}, + "grid_x": 107, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y37": { + "bits": {}, + "grid_x": 107, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y38": { + "bits": {}, + "grid_x": 107, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y39": { + "bits": {}, + "grid_x": 107, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y40": { + "bits": {}, + "grid_x": 107, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y41": { + "bits": {}, + "grid_x": 107, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y42": { + "bits": {}, + "grid_x": 107, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y43": { + "bits": {}, + "grid_x": 107, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y44": { + "bits": {}, + "grid_x": 107, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y46": { + "bits": {}, + "grid_x": 107, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y47": { + "bits": {}, + "grid_x": 107, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y48": { + "bits": {}, + "grid_x": 107, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y49": { + "bits": {}, + "grid_x": 107, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y50": { + "bits": {}, + "grid_x": 107, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y52": { + "bits": {}, + "grid_x": 107, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y54": { + "bits": {}, + "grid_x": 107, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y55": { + "bits": {}, + "grid_x": 107, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y56": { + "bits": {}, + "grid_x": 107, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y57": { + "bits": {}, + "grid_x": 107, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y58": { + "bits": {}, + "grid_x": 107, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y59": { + "bits": {}, + "grid_x": 107, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y61": { + "bits": {}, + "grid_x": 107, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y62": { + "bits": {}, + "grid_x": 107, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y63": { + "bits": {}, + "grid_x": 107, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y64": { + "bits": {}, + "grid_x": 107, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y65": { + "bits": {}, + "grid_x": 107, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y66": { + "bits": {}, + "grid_x": 107, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y67": { + "bits": {}, + "grid_x": 107, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y68": { + "bits": {}, + "grid_x": 107, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y69": { + "bits": {}, + "grid_x": 107, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y70": { + "bits": {}, + "grid_x": 107, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y71": { + "bits": {}, + "grid_x": 107, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y73": { + "bits": {}, + "grid_x": 107, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y74": { + "bits": {}, + "grid_x": 107, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y75": { + "bits": {}, + "grid_x": 107, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y76": { + "bits": {}, + "grid_x": 107, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y77": { + "bits": {}, + "grid_x": 107, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y79": { + "bits": {}, + "grid_x": 107, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y80": { + "bits": {}, + "grid_x": 107, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y81": { + "bits": {}, + "grid_x": 107, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y82": { + "bits": {}, + "grid_x": 107, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y83": { + "bits": {}, + "grid_x": 107, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y84": { + "bits": {}, + "grid_x": 107, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y86": { + "bits": {}, + "grid_x": 107, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y87": { + "bits": {}, + "grid_x": 107, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y88": { + "bits": {}, + "grid_x": 107, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y89": { + "bits": {}, + "grid_x": 107, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y90": { + "bits": {}, + "grid_x": 107, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y91": { + "bits": {}, + "grid_x": 107, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y92": { + "bits": {}, + "grid_x": 107, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y93": { + "bits": {}, + "grid_x": 107, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y94": { + "bits": {}, + "grid_x": 107, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y95": { + "bits": {}, + "grid_x": 107, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y96": { + "bits": {}, + "grid_x": 107, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y98": { + "bits": {}, + "grid_x": 107, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y99": { + "bits": {}, + "grid_x": 107, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y100": { + "bits": {}, + "grid_x": 107, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y101": { + "bits": {}, + "grid_x": 107, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y102": { + "bits": {}, + "grid_x": 107, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y104": { + "bits": {}, + "grid_x": 107, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y105": { + "bits": {}, + "grid_x": 107, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y106": { + "bits": {}, + "grid_x": 107, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y107": { + "bits": {}, + "grid_x": 107, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y108": { + "bits": {}, + "grid_x": 107, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y109": { + "bits": {}, + "grid_x": 107, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y110": { + "bits": {}, + "grid_x": 107, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y111": { + "bits": {}, + "grid_x": 107, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y112": { + "bits": {}, + "grid_x": 107, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y113": { + "bits": {}, + "grid_x": 107, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y114": { + "bits": {}, + "grid_x": 107, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y115": { + "bits": {}, + "grid_x": 107, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y116": { + "bits": {}, + "grid_x": 107, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y117": { + "bits": {}, + "grid_x": 107, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y118": { + "bits": {}, + "grid_x": 107, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y119": { + "bits": {}, + "grid_x": 107, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y120": { + "bits": {}, + "grid_x": 107, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y121": { + "bits": {}, + "grid_x": 107, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y122": { + "bits": {}, + "grid_x": 107, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y123": { + "bits": {}, + "grid_x": 107, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y124": { + "bits": {}, + "grid_x": 107, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y125": { + "bits": {}, + "grid_x": 107, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y126": { + "bits": {}, + "grid_x": 107, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y127": { + "bits": {}, + "grid_x": 107, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y128": { + "bits": {}, + "grid_x": 107, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y129": { + "bits": {}, + "grid_x": 107, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y130": { + "bits": {}, + "grid_x": 107, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y131": { + "bits": {}, + "grid_x": 107, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y132": { + "bits": {}, + "grid_x": 107, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y133": { + "bits": {}, + "grid_x": 107, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y134": { + "bits": {}, + "grid_x": 107, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y135": { + "bits": {}, + "grid_x": 107, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y136": { + "bits": {}, + "grid_x": 107, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y137": { + "bits": {}, + "grid_x": 107, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y138": { + "bits": {}, + "grid_x": 107, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y139": { + "bits": {}, + "grid_x": 107, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y140": { + "bits": {}, + "grid_x": 107, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y141": { + "bits": {}, + "grid_x": 107, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y142": { + "bits": {}, + "grid_x": 107, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y143": { + "bits": {}, + "grid_x": 107, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y144": { + "bits": {}, + "grid_x": 107, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y145": { + "bits": {}, + "grid_x": 107, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y146": { + "bits": {}, + "grid_x": 107, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y147": { + "bits": {}, + "grid_x": 107, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y148": { + "bits": {}, + "grid_x": 107, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y149": { + "bits": {}, + "grid_x": 107, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y150": { + "bits": {}, + "grid_x": 107, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y151": { + "bits": {}, + "grid_x": 107, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y152": { + "bits": {}, + "grid_x": 107, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y153": { + "bits": {}, + "grid_x": 107, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y154": { + "bits": {}, + "grid_x": 107, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y155": { + "bits": {}, + "grid_x": 107, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X107Y156": { + "bits": {}, + "grid_x": 107, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y0": { + "bits": {}, + "grid_x": 108, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y52": { + "bits": {}, + "grid_x": 108, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y104": { + "bits": {}, + "grid_x": 108, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y105": { + "bits": {}, + "grid_x": 108, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y106": { + "bits": {}, + "grid_x": 108, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y107": { + "bits": {}, + "grid_x": 108, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y108": { + "bits": {}, + "grid_x": 108, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y109": { + "bits": {}, + "grid_x": 108, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y110": { + "bits": {}, + "grid_x": 108, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y111": { + "bits": {}, + "grid_x": 108, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y112": { + "bits": {}, + "grid_x": 108, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y113": { + "bits": {}, + "grid_x": 108, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y114": { + "bits": {}, + "grid_x": 108, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y115": { + "bits": {}, + "grid_x": 108, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y116": { + "bits": {}, + "grid_x": 108, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y117": { + "bits": {}, + "grid_x": 108, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y118": { + "bits": {}, + "grid_x": 108, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y119": { + "bits": {}, + "grid_x": 108, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y120": { + "bits": {}, + "grid_x": 108, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y121": { + "bits": {}, + "grid_x": 108, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y122": { + "bits": {}, + "grid_x": 108, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y123": { + "bits": {}, + "grid_x": 108, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y124": { + "bits": {}, + "grid_x": 108, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y125": { + "bits": {}, + "grid_x": 108, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y126": { + "bits": {}, + "grid_x": 108, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y127": { + "bits": {}, + "grid_x": 108, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y128": { + "bits": {}, + "grid_x": 108, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y129": { + "bits": {}, + "grid_x": 108, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y130": { + "bits": {}, + "grid_x": 108, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y131": { + "bits": {}, + "grid_x": 108, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y132": { + "bits": {}, + "grid_x": 108, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y133": { + "bits": {}, + "grid_x": 108, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y134": { + "bits": {}, + "grid_x": 108, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y135": { + "bits": {}, + "grid_x": 108, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y136": { + "bits": {}, + "grid_x": 108, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y137": { + "bits": {}, + "grid_x": 108, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y138": { + "bits": {}, + "grid_x": 108, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y139": { + "bits": {}, + "grid_x": 108, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y140": { + "bits": {}, + "grid_x": 108, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y141": { + "bits": {}, + "grid_x": 108, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y142": { + "bits": {}, + "grid_x": 108, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y143": { + "bits": {}, + "grid_x": 108, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y144": { + "bits": {}, + "grid_x": 108, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y145": { + "bits": {}, + "grid_x": 108, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y146": { + "bits": {}, + "grid_x": 108, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y147": { + "bits": {}, + "grid_x": 108, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y148": { + "bits": {}, + "grid_x": 108, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y149": { + "bits": {}, + "grid_x": 108, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y150": { + "bits": {}, + "grid_x": 108, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y151": { + "bits": {}, + "grid_x": 108, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y152": { + "bits": {}, + "grid_x": 108, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y153": { + "bits": {}, + "grid_x": 108, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y154": { + "bits": {}, + "grid_x": 108, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y155": { + "bits": {}, + "grid_x": 108, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X108Y156": { + "bits": {}, + "grid_x": 108, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y105": { + "bits": {}, + "grid_x": 109, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y106": { + "bits": {}, + "grid_x": 109, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y107": { + "bits": {}, + "grid_x": 109, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y108": { + "bits": {}, + "grid_x": 109, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y109": { + "bits": {}, + "grid_x": 109, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y110": { + "bits": {}, + "grid_x": 109, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y111": { + "bits": {}, + "grid_x": 109, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y112": { + "bits": {}, + "grid_x": 109, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y113": { + "bits": {}, + "grid_x": 109, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y114": { + "bits": {}, + "grid_x": 109, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y115": { + "bits": {}, + "grid_x": 109, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y116": { + "bits": {}, + "grid_x": 109, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y117": { + "bits": {}, + "grid_x": 109, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y118": { + "bits": {}, + "grid_x": 109, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y119": { + "bits": {}, + "grid_x": 109, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y120": { + "bits": {}, + "grid_x": 109, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y121": { + "bits": {}, + "grid_x": 109, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y122": { + "bits": {}, + "grid_x": 109, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y123": { + "bits": {}, + "grid_x": 109, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y124": { + "bits": {}, + "grid_x": 109, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y125": { + "bits": {}, + "grid_x": 109, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y126": { + "bits": {}, + "grid_x": 109, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y127": { + "bits": {}, + "grid_x": 109, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y128": { + "bits": {}, + "grid_x": 109, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y129": { + "bits": {}, + "grid_x": 109, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y130": { + "bits": {}, + "grid_x": 109, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y131": { + "bits": {}, + "grid_x": 109, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y132": { + "bits": {}, + "grid_x": 109, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y133": { + "bits": {}, + "grid_x": 109, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y134": { + "bits": {}, + "grid_x": 109, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y135": { + "bits": {}, + "grid_x": 109, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y136": { + "bits": {}, + "grid_x": 109, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y137": { + "bits": {}, + "grid_x": 109, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y138": { + "bits": {}, + "grid_x": 109, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y139": { + "bits": {}, + "grid_x": 109, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y140": { + "bits": {}, + "grid_x": 109, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y141": { + "bits": {}, + "grid_x": 109, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y142": { + "bits": {}, + "grid_x": 109, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y143": { + "bits": {}, + "grid_x": 109, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y144": { + "bits": {}, + "grid_x": 109, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y145": { + "bits": {}, + "grid_x": 109, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y146": { + "bits": {}, + "grid_x": 109, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y147": { + "bits": {}, + "grid_x": 109, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y148": { + "bits": {}, + "grid_x": 109, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y149": { + "bits": {}, + "grid_x": 109, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y150": { + "bits": {}, + "grid_x": 109, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y151": { + "bits": {}, + "grid_x": 109, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y152": { + "bits": {}, + "grid_x": 109, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y153": { + "bits": {}, + "grid_x": 109, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y154": { + "bits": {}, + "grid_x": 109, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y155": { + "bits": {}, + "grid_x": 109, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X109Y156": { + "bits": {}, + "grid_x": 109, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y105": { + "bits": {}, + "grid_x": 110, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y106": { + "bits": {}, + "grid_x": 110, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y107": { + "bits": {}, + "grid_x": 110, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y108": { + "bits": {}, + "grid_x": 110, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y109": { + "bits": {}, + "grid_x": 110, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y110": { + "bits": {}, + "grid_x": 110, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y111": { + "bits": {}, + "grid_x": 110, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y112": { + "bits": {}, + "grid_x": 110, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y113": { + "bits": {}, + "grid_x": 110, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y114": { + "bits": {}, + "grid_x": 110, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y115": { + "bits": {}, + "grid_x": 110, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y116": { + "bits": {}, + "grid_x": 110, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y117": { + "bits": {}, + "grid_x": 110, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y118": { + "bits": {}, + "grid_x": 110, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y119": { + "bits": {}, + "grid_x": 110, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y120": { + "bits": {}, + "grid_x": 110, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y121": { + "bits": {}, + "grid_x": 110, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y122": { + "bits": {}, + "grid_x": 110, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y123": { + "bits": {}, + "grid_x": 110, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y124": { + "bits": {}, + "grid_x": 110, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y125": { + "bits": {}, + "grid_x": 110, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y126": { + "bits": {}, + "grid_x": 110, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y127": { + "bits": {}, + "grid_x": 110, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y128": { + "bits": {}, + "grid_x": 110, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y129": { + "bits": {}, + "grid_x": 110, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y130": { + "bits": {}, + "grid_x": 110, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y131": { + "bits": {}, + "grid_x": 110, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y132": { + "bits": {}, + "grid_x": 110, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y133": { + "bits": {}, + "grid_x": 110, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y134": { + "bits": {}, + "grid_x": 110, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y135": { + "bits": {}, + "grid_x": 110, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y136": { + "bits": {}, + "grid_x": 110, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y137": { + "bits": {}, + "grid_x": 110, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y138": { + "bits": {}, + "grid_x": 110, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y139": { + "bits": {}, + "grid_x": 110, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y140": { + "bits": {}, + "grid_x": 110, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y141": { + "bits": {}, + "grid_x": 110, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y142": { + "bits": {}, + "grid_x": 110, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y143": { + "bits": {}, + "grid_x": 110, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y144": { + "bits": {}, + "grid_x": 110, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y145": { + "bits": {}, + "grid_x": 110, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y146": { + "bits": {}, + "grid_x": 110, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y147": { + "bits": {}, + "grid_x": 110, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y148": { + "bits": {}, + "grid_x": 110, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y149": { + "bits": {}, + "grid_x": 110, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y150": { + "bits": {}, + "grid_x": 110, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y151": { + "bits": {}, + "grid_x": 110, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y152": { + "bits": {}, + "grid_x": 110, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y153": { + "bits": {}, + "grid_x": 110, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y154": { + "bits": {}, + "grid_x": 110, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y155": { + "bits": {}, + "grid_x": 110, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X110Y156": { + "bits": {}, + "grid_x": 110, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y0": { + "bits": {}, + "grid_x": 111, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y52": { + "bits": {}, + "grid_x": 111, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y104": { + "bits": {}, + "grid_x": 111, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y105": { + "bits": {}, + "grid_x": 111, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y106": { + "bits": {}, + "grid_x": 111, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y107": { + "bits": {}, + "grid_x": 111, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y108": { + "bits": {}, + "grid_x": 111, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y109": { + "bits": {}, + "grid_x": 111, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y110": { + "bits": {}, + "grid_x": 111, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y111": { + "bits": {}, + "grid_x": 111, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y112": { + "bits": {}, + "grid_x": 111, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y113": { + "bits": {}, + "grid_x": 111, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y114": { + "bits": {}, + "grid_x": 111, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y115": { + "bits": {}, + "grid_x": 111, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y116": { + "bits": {}, + "grid_x": 111, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y117": { + "bits": {}, + "grid_x": 111, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y118": { + "bits": {}, + "grid_x": 111, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y119": { + "bits": {}, + "grid_x": 111, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y120": { + "bits": {}, + "grid_x": 111, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y121": { + "bits": {}, + "grid_x": 111, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y122": { + "bits": {}, + "grid_x": 111, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y123": { + "bits": {}, + "grid_x": 111, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y124": { + "bits": {}, + "grid_x": 111, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y125": { + "bits": {}, + "grid_x": 111, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y126": { + "bits": {}, + "grid_x": 111, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y127": { + "bits": {}, + "grid_x": 111, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y128": { + "bits": {}, + "grid_x": 111, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y129": { + "bits": {}, + "grid_x": 111, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y130": { + "bits": {}, + "grid_x": 111, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y131": { + "bits": {}, + "grid_x": 111, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y132": { + "bits": {}, + "grid_x": 111, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y133": { + "bits": {}, + "grid_x": 111, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y134": { + "bits": {}, + "grid_x": 111, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y135": { + "bits": {}, + "grid_x": 111, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y136": { + "bits": {}, + "grid_x": 111, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y137": { + "bits": {}, + "grid_x": 111, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y138": { + "bits": {}, + "grid_x": 111, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y139": { + "bits": {}, + "grid_x": 111, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y140": { + "bits": {}, + "grid_x": 111, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y141": { + "bits": {}, + "grid_x": 111, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y142": { + "bits": {}, + "grid_x": 111, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y143": { + "bits": {}, + "grid_x": 111, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y144": { + "bits": {}, + "grid_x": 111, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y145": { + "bits": {}, + "grid_x": 111, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y146": { + "bits": {}, + "grid_x": 111, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y147": { + "bits": {}, + "grid_x": 111, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y148": { + "bits": {}, + "grid_x": 111, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y149": { + "bits": {}, + "grid_x": 111, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y150": { + "bits": {}, + "grid_x": 111, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y151": { + "bits": {}, + "grid_x": 111, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y152": { + "bits": {}, + "grid_x": 111, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y153": { + "bits": {}, + "grid_x": 111, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y154": { + "bits": {}, + "grid_x": 111, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y155": { + "bits": {}, + "grid_x": 111, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X111Y156": { + "bits": {}, + "grid_x": 111, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y0": { + "bits": {}, + "grid_x": 112, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y52": { + "bits": {}, + "grid_x": 112, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y104": { + "bits": {}, + "grid_x": 112, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y105": { + "bits": {}, + "grid_x": 112, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y106": { + "bits": {}, + "grid_x": 112, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y107": { + "bits": {}, + "grid_x": 112, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y108": { + "bits": {}, + "grid_x": 112, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y109": { + "bits": {}, + "grid_x": 112, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y110": { + "bits": {}, + "grid_x": 112, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y111": { + "bits": {}, + "grid_x": 112, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y112": { + "bits": {}, + "grid_x": 112, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y113": { + "bits": {}, + "grid_x": 112, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y114": { + "bits": {}, + "grid_x": 112, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y115": { + "bits": {}, + "grid_x": 112, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y116": { + "bits": {}, + "grid_x": 112, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y117": { + "bits": {}, + "grid_x": 112, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y118": { + "bits": {}, + "grid_x": 112, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y119": { + "bits": {}, + "grid_x": 112, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y120": { + "bits": {}, + "grid_x": 112, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y121": { + "bits": {}, + "grid_x": 112, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y122": { + "bits": {}, + "grid_x": 112, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y123": { + "bits": {}, + "grid_x": 112, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y124": { + "bits": {}, + "grid_x": 112, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y125": { + "bits": {}, + "grid_x": 112, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y126": { + "bits": {}, + "grid_x": 112, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y127": { + "bits": {}, + "grid_x": 112, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y128": { + "bits": {}, + "grid_x": 112, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y129": { + "bits": {}, + "grid_x": 112, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y130": { + "bits": {}, + "grid_x": 112, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y131": { + "bits": {}, + "grid_x": 112, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y132": { + "bits": {}, + "grid_x": 112, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y133": { + "bits": {}, + "grid_x": 112, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y134": { + "bits": {}, + "grid_x": 112, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y135": { + "bits": {}, + "grid_x": 112, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y136": { + "bits": {}, + "grid_x": 112, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y137": { + "bits": {}, + "grid_x": 112, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y138": { + "bits": {}, + "grid_x": 112, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y139": { + "bits": {}, + "grid_x": 112, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y140": { + "bits": {}, + "grid_x": 112, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y141": { + "bits": {}, + "grid_x": 112, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y142": { + "bits": {}, + "grid_x": 112, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y143": { + "bits": {}, + "grid_x": 112, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y144": { + "bits": {}, + "grid_x": 112, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y145": { + "bits": {}, + "grid_x": 112, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y146": { + "bits": {}, + "grid_x": 112, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y147": { + "bits": {}, + "grid_x": 112, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y148": { + "bits": {}, + "grid_x": 112, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y149": { + "bits": {}, + "grid_x": 112, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y150": { + "bits": {}, + "grid_x": 112, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y151": { + "bits": {}, + "grid_x": 112, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y152": { + "bits": {}, + "grid_x": 112, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y153": { + "bits": {}, + "grid_x": 112, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y154": { + "bits": {}, + "grid_x": 112, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y155": { + "bits": {}, + "grid_x": 112, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X112Y156": { + "bits": {}, + "grid_x": 112, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y0": { + "bits": {}, + "grid_x": 113, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y3": { + "bits": {}, + "grid_x": 113, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y5": { + "bits": {}, + "grid_x": 113, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y7": { + "bits": {}, + "grid_x": 113, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y9": { + "bits": {}, + "grid_x": 113, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y11": { + "bits": {}, + "grid_x": 113, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y13": { + "bits": {}, + "grid_x": 113, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y15": { + "bits": {}, + "grid_x": 113, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y17": { + "bits": {}, + "grid_x": 113, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y19": { + "bits": {}, + "grid_x": 113, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y21": { + "bits": {}, + "grid_x": 113, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y23": { + "bits": {}, + "grid_x": 113, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y25": { + "bits": {}, + "grid_x": 113, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y28": { + "bits": {}, + "grid_x": 113, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y30": { + "bits": {}, + "grid_x": 113, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y32": { + "bits": {}, + "grid_x": 113, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y34": { + "bits": {}, + "grid_x": 113, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y36": { + "bits": {}, + "grid_x": 113, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y38": { + "bits": {}, + "grid_x": 113, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y40": { + "bits": {}, + "grid_x": 113, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y42": { + "bits": {}, + "grid_x": 113, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y44": { + "bits": {}, + "grid_x": 113, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y46": { + "bits": {}, + "grid_x": 113, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y48": { + "bits": {}, + "grid_x": 113, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y50": { + "bits": {}, + "grid_x": 113, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y52": { + "bits": {}, + "grid_x": 113, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y55": { + "bits": {}, + "grid_x": 113, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y57": { + "bits": {}, + "grid_x": 113, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y59": { + "bits": {}, + "grid_x": 113, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y61": { + "bits": {}, + "grid_x": 113, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y63": { + "bits": {}, + "grid_x": 113, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y65": { + "bits": {}, + "grid_x": 113, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y67": { + "bits": {}, + "grid_x": 113, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y69": { + "bits": {}, + "grid_x": 113, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y71": { + "bits": {}, + "grid_x": 113, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y73": { + "bits": {}, + "grid_x": 113, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y75": { + "bits": {}, + "grid_x": 113, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y77": { + "bits": {}, + "grid_x": 113, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y80": { + "bits": {}, + "grid_x": 113, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y82": { + "bits": {}, + "grid_x": 113, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y84": { + "bits": {}, + "grid_x": 113, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y86": { + "bits": {}, + "grid_x": 113, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y88": { + "bits": {}, + "grid_x": 113, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y90": { + "bits": {}, + "grid_x": 113, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y92": { + "bits": {}, + "grid_x": 113, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y94": { + "bits": {}, + "grid_x": 113, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y96": { + "bits": {}, + "grid_x": 113, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y98": { + "bits": {}, + "grid_x": 113, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y100": { + "bits": {}, + "grid_x": 113, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y102": { + "bits": {}, + "grid_x": 113, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y104": { + "bits": {}, + "grid_x": 113, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y105": { + "bits": {}, + "grid_x": 113, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y106": { + "bits": {}, + "grid_x": 113, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y107": { + "bits": {}, + "grid_x": 113, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y108": { + "bits": {}, + "grid_x": 113, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y109": { + "bits": {}, + "grid_x": 113, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y110": { + "bits": {}, + "grid_x": 113, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y111": { + "bits": {}, + "grid_x": 113, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y112": { + "bits": {}, + "grid_x": 113, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y113": { + "bits": {}, + "grid_x": 113, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y114": { + "bits": {}, + "grid_x": 113, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y115": { + "bits": {}, + "grid_x": 113, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y116": { + "bits": {}, + "grid_x": 113, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y117": { + "bits": {}, + "grid_x": 113, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y118": { + "bits": {}, + "grid_x": 113, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y119": { + "bits": {}, + "grid_x": 113, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y120": { + "bits": {}, + "grid_x": 113, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y121": { + "bits": {}, + "grid_x": 113, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y122": { + "bits": {}, + "grid_x": 113, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y123": { + "bits": {}, + "grid_x": 113, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y124": { + "bits": {}, + "grid_x": 113, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y125": { + "bits": {}, + "grid_x": 113, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y126": { + "bits": {}, + "grid_x": 113, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y127": { + "bits": {}, + "grid_x": 113, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y128": { + "bits": {}, + "grid_x": 113, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y129": { + "bits": {}, + "grid_x": 113, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y130": { + "bits": {}, + "grid_x": 113, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y131": { + "bits": {}, + "grid_x": 113, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y132": { + "bits": {}, + "grid_x": 113, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y133": { + "bits": {}, + "grid_x": 113, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y134": { + "bits": {}, + "grid_x": 113, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y135": { + "bits": {}, + "grid_x": 113, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y136": { + "bits": {}, + "grid_x": 113, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y137": { + "bits": {}, + "grid_x": 113, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y138": { + "bits": {}, + "grid_x": 113, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y139": { + "bits": {}, + "grid_x": 113, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y140": { + "bits": {}, + "grid_x": 113, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y141": { + "bits": {}, + "grid_x": 113, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y142": { + "bits": {}, + "grid_x": 113, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y143": { + "bits": {}, + "grid_x": 113, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y144": { + "bits": {}, + "grid_x": 113, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y145": { + "bits": {}, + "grid_x": 113, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y146": { + "bits": {}, + "grid_x": 113, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y147": { + "bits": {}, + "grid_x": 113, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y148": { + "bits": {}, + "grid_x": 113, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y149": { + "bits": {}, + "grid_x": 113, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y150": { + "bits": {}, + "grid_x": 113, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y151": { + "bits": {}, + "grid_x": 113, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y152": { + "bits": {}, + "grid_x": 113, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y153": { + "bits": {}, + "grid_x": 113, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y154": { + "bits": {}, + "grid_x": 113, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y155": { + "bits": {}, + "grid_x": 113, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X113Y156": { + "bits": {}, + "grid_x": 113, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y0": { + "bits": {}, + "grid_x": 114, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y3": { + "bits": {}, + "grid_x": 114, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y5": { + "bits": {}, + "grid_x": 114, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y7": { + "bits": {}, + "grid_x": 114, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y9": { + "bits": {}, + "grid_x": 114, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y11": { + "bits": {}, + "grid_x": 114, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y13": { + "bits": {}, + "grid_x": 114, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y15": { + "bits": {}, + "grid_x": 114, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y17": { + "bits": {}, + "grid_x": 114, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y19": { + "bits": {}, + "grid_x": 114, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y21": { + "bits": {}, + "grid_x": 114, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y23": { + "bits": {}, + "grid_x": 114, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y25": { + "bits": {}, + "grid_x": 114, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y28": { + "bits": {}, + "grid_x": 114, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y30": { + "bits": {}, + "grid_x": 114, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y32": { + "bits": {}, + "grid_x": 114, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y34": { + "bits": {}, + "grid_x": 114, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y36": { + "bits": {}, + "grid_x": 114, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y38": { + "bits": {}, + "grid_x": 114, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y40": { + "bits": {}, + "grid_x": 114, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y42": { + "bits": {}, + "grid_x": 114, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y44": { + "bits": {}, + "grid_x": 114, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y46": { + "bits": {}, + "grid_x": 114, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y48": { + "bits": {}, + "grid_x": 114, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y50": { + "bits": {}, + "grid_x": 114, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y52": { + "bits": {}, + "grid_x": 114, + "grid_y": 104, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y55": { + "bits": {}, + "grid_x": 114, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y57": { + "bits": {}, + "grid_x": 114, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y59": { + "bits": {}, + "grid_x": 114, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y61": { + "bits": {}, + "grid_x": 114, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y63": { + "bits": {}, + "grid_x": 114, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y65": { + "bits": {}, + "grid_x": 114, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y67": { + "bits": {}, + "grid_x": 114, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y69": { + "bits": {}, + "grid_x": 114, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y71": { + "bits": {}, + "grid_x": 114, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y73": { + "bits": {}, + "grid_x": 114, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y75": { + "bits": {}, + "grid_x": 114, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y77": { + "bits": {}, + "grid_x": 114, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y80": { + "bits": {}, + "grid_x": 114, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y82": { + "bits": {}, + "grid_x": 114, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y84": { + "bits": {}, + "grid_x": 114, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y86": { + "bits": {}, + "grid_x": 114, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y88": { + "bits": {}, + "grid_x": 114, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y90": { + "bits": {}, + "grid_x": 114, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y92": { + "bits": {}, + "grid_x": 114, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y94": { + "bits": {}, + "grid_x": 114, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y96": { + "bits": {}, + "grid_x": 114, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y98": { + "bits": {}, + "grid_x": 114, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y100": { + "bits": {}, + "grid_x": 114, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y102": { + "bits": {}, + "grid_x": 114, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y104": { + "bits": {}, + "grid_x": 114, + "grid_y": 52, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y105": { + "bits": {}, + "grid_x": 114, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y106": { + "bits": {}, + "grid_x": 114, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y107": { + "bits": {}, + "grid_x": 114, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y108": { + "bits": {}, + "grid_x": 114, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y109": { + "bits": {}, + "grid_x": 114, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y110": { + "bits": {}, + "grid_x": 114, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y111": { + "bits": {}, + "grid_x": 114, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y112": { + "bits": {}, + "grid_x": 114, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y113": { + "bits": {}, + "grid_x": 114, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y114": { + "bits": {}, + "grid_x": 114, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y115": { + "bits": {}, + "grid_x": 114, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y116": { + "bits": {}, + "grid_x": 114, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y117": { + "bits": {}, + "grid_x": 114, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y118": { + "bits": {}, + "grid_x": 114, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y119": { + "bits": {}, + "grid_x": 114, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y120": { + "bits": {}, + "grid_x": 114, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y121": { + "bits": {}, + "grid_x": 114, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y122": { + "bits": {}, + "grid_x": 114, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y123": { + "bits": {}, + "grid_x": 114, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y124": { + "bits": {}, + "grid_x": 114, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y125": { + "bits": {}, + "grid_x": 114, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y126": { + "bits": {}, + "grid_x": 114, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y127": { + "bits": {}, + "grid_x": 114, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y128": { + "bits": {}, + "grid_x": 114, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y129": { + "bits": {}, + "grid_x": 114, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y130": { + "bits": {}, + "grid_x": 114, + "grid_y": 26, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y131": { + "bits": {}, + "grid_x": 114, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y132": { + "bits": {}, + "grid_x": 114, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y133": { + "bits": {}, + "grid_x": 114, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y134": { + "bits": {}, + "grid_x": 114, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y135": { + "bits": {}, + "grid_x": 114, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y136": { + "bits": {}, + "grid_x": 114, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y137": { + "bits": {}, + "grid_x": 114, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y138": { + "bits": {}, + "grid_x": 114, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y139": { + "bits": {}, + "grid_x": 114, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y140": { + "bits": {}, + "grid_x": 114, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y141": { + "bits": {}, + "grid_x": 114, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y142": { + "bits": {}, + "grid_x": 114, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y143": { + "bits": {}, + "grid_x": 114, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y144": { + "bits": {}, + "grid_x": 114, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y145": { + "bits": {}, + "grid_x": 114, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y146": { + "bits": {}, + "grid_x": 114, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y147": { + "bits": {}, + "grid_x": 114, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y148": { + "bits": {}, + "grid_x": 114, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y149": { + "bits": {}, + "grid_x": 114, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y150": { + "bits": {}, + "grid_x": 114, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y151": { + "bits": {}, + "grid_x": 114, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y152": { + "bits": {}, + "grid_x": 114, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y153": { + "bits": {}, + "grid_x": 114, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y154": { + "bits": {}, + "grid_x": 114, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y155": { + "bits": {}, + "grid_x": 114, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "NULL_X114Y156": { + "bits": {}, + "grid_x": 114, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "NULL" + }, + "PCIE_BOT_X71Y115": { + "bits": {}, + "clock_region": "X1Y2", + "grid_x": 71, + "grid_y": 41, + "pin_functions": {}, + "sites": { + "PCIE_X0Y0": "PCIE_2_1" + }, + "type": "PCIE_BOT" + }, + "PCIE_INT_INTERFACE_L_X30Y100": { + "bits": {}, + "grid_x": 76, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y101": { + "bits": {}, + "grid_x": 76, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y102": { + "bits": {}, + "grid_x": 76, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y103": { + "bits": {}, + "grid_x": 76, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y104": { + "bits": {}, + "grid_x": 76, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y105": { + "bits": {}, + "grid_x": 76, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y106": { + "bits": {}, + "grid_x": 76, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y107": { + "bits": {}, + "grid_x": 76, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y108": { + "bits": {}, + "grid_x": 76, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y109": { + "bits": {}, + "grid_x": 76, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y110": { + "bits": {}, + "grid_x": 76, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y111": { + "bits": {}, + "grid_x": 76, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y112": { + "bits": {}, + "grid_x": 76, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y113": { + "bits": {}, + "grid_x": 76, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y114": { + "bits": {}, + "grid_x": 76, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y115": { + "bits": {}, + "grid_x": 76, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y116": { + "bits": {}, + "grid_x": 76, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y117": { + "bits": {}, + "grid_x": 76, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y118": { + "bits": {}, + "grid_x": 76, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y119": { + "bits": {}, + "grid_x": 76, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y120": { + "bits": {}, + "grid_x": 76, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y121": { + "bits": {}, + "grid_x": 76, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y122": { + "bits": {}, + "grid_x": 76, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y123": { + "bits": {}, + "grid_x": 76, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_L_X30Y124": { + "bits": {}, + "grid_x": 76, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_L" + }, + "PCIE_INT_INTERFACE_R_X27Y100": { + "bits": {}, + "grid_x": 70, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y101": { + "bits": {}, + "grid_x": 70, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y102": { + "bits": {}, + "grid_x": 70, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y103": { + "bits": {}, + "grid_x": 70, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y104": { + "bits": {}, + "grid_x": 70, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y105": { + "bits": {}, + "grid_x": 70, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y106": { + "bits": {}, + "grid_x": 70, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y107": { + "bits": {}, + "grid_x": 70, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y108": { + "bits": {}, + "grid_x": 70, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y109": { + "bits": {}, + "grid_x": 70, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y110": { + "bits": {}, + "grid_x": 70, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y111": { + "bits": {}, + "grid_x": 70, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y112": { + "bits": {}, + "grid_x": 70, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y113": { + "bits": {}, + "grid_x": 70, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y114": { + "bits": {}, + "grid_x": 70, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y115": { + "bits": {}, + "grid_x": 70, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y116": { + "bits": {}, + "grid_x": 70, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y117": { + "bits": {}, + "grid_x": 70, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y118": { + "bits": {}, + "grid_x": 70, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y119": { + "bits": {}, + "grid_x": 70, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y120": { + "bits": {}, + "grid_x": 70, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y121": { + "bits": {}, + "grid_x": 70, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y122": { + "bits": {}, + "grid_x": 70, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y123": { + "bits": {}, + "grid_x": 70, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_INT_INTERFACE_R_X27Y124": { + "bits": {}, + "grid_x": 70, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_INT_INTERFACE_R" + }, + "PCIE_NULL_X71Y105": { + "bits": {}, + "grid_x": 71, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y106": { + "bits": {}, + "grid_x": 71, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y107": { + "bits": {}, + "grid_x": 71, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y108": { + "bits": {}, + "grid_x": 71, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y109": { + "bits": {}, + "grid_x": 71, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y110": { + "bits": {}, + "grid_x": 71, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y111": { + "bits": {}, + "grid_x": 71, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y112": { + "bits": {}, + "grid_x": 71, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y113": { + "bits": {}, + "grid_x": 71, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y114": { + "bits": {}, + "grid_x": 71, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y116": { + "bits": {}, + "grid_x": 71, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y117": { + "bits": {}, + "grid_x": 71, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y118": { + "bits": {}, + "grid_x": 71, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y119": { + "bits": {}, + "grid_x": 71, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y120": { + "bits": {}, + "grid_x": 71, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y121": { + "bits": {}, + "grid_x": 71, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y122": { + "bits": {}, + "grid_x": 71, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y123": { + "bits": {}, + "grid_x": 71, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y124": { + "bits": {}, + "grid_x": 71, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y126": { + "bits": {}, + "grid_x": 71, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y127": { + "bits": {}, + "grid_x": 71, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y128": { + "bits": {}, + "grid_x": 71, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X71Y129": { + "bits": {}, + "grid_x": 71, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y105": { + "bits": {}, + "grid_x": 72, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y106": { + "bits": {}, + "grid_x": 72, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y107": { + "bits": {}, + "grid_x": 72, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y108": { + "bits": {}, + "grid_x": 72, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y109": { + "bits": {}, + "grid_x": 72, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y110": { + "bits": {}, + "grid_x": 72, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y111": { + "bits": {}, + "grid_x": 72, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y112": { + "bits": {}, + "grid_x": 72, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y113": { + "bits": {}, + "grid_x": 72, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y114": { + "bits": {}, + "grid_x": 72, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y115": { + "bits": {}, + "grid_x": 72, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y116": { + "bits": {}, + "grid_x": 72, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y117": { + "bits": {}, + "grid_x": 72, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y118": { + "bits": {}, + "grid_x": 72, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y119": { + "bits": {}, + "grid_x": 72, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y120": { + "bits": {}, + "grid_x": 72, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y121": { + "bits": {}, + "grid_x": 72, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y122": { + "bits": {}, + "grid_x": 72, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y123": { + "bits": {}, + "grid_x": 72, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y124": { + "bits": {}, + "grid_x": 72, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y125": { + "bits": {}, + "grid_x": 72, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y126": { + "bits": {}, + "grid_x": 72, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y127": { + "bits": {}, + "grid_x": 72, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y128": { + "bits": {}, + "grid_x": 72, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X72Y129": { + "bits": {}, + "grid_x": 72, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y105": { + "bits": {}, + "grid_x": 73, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y106": { + "bits": {}, + "grid_x": 73, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y107": { + "bits": {}, + "grid_x": 73, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y108": { + "bits": {}, + "grid_x": 73, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y109": { + "bits": {}, + "grid_x": 73, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y110": { + "bits": {}, + "grid_x": 73, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y111": { + "bits": {}, + "grid_x": 73, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y112": { + "bits": {}, + "grid_x": 73, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y113": { + "bits": {}, + "grid_x": 73, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y114": { + "bits": {}, + "grid_x": 73, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y115": { + "bits": {}, + "grid_x": 73, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y116": { + "bits": {}, + "grid_x": 73, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y117": { + "bits": {}, + "grid_x": 73, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y118": { + "bits": {}, + "grid_x": 73, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y119": { + "bits": {}, + "grid_x": 73, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y120": { + "bits": {}, + "grid_x": 73, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y121": { + "bits": {}, + "grid_x": 73, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y122": { + "bits": {}, + "grid_x": 73, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y123": { + "bits": {}, + "grid_x": 73, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y124": { + "bits": {}, + "grid_x": 73, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y125": { + "bits": {}, + "grid_x": 73, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y126": { + "bits": {}, + "grid_x": 73, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y127": { + "bits": {}, + "grid_x": 73, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y128": { + "bits": {}, + "grid_x": 73, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X73Y129": { + "bits": {}, + "grid_x": 73, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y105": { + "bits": {}, + "grid_x": 74, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y106": { + "bits": {}, + "grid_x": 74, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y107": { + "bits": {}, + "grid_x": 74, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y108": { + "bits": {}, + "grid_x": 74, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y109": { + "bits": {}, + "grid_x": 74, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y110": { + "bits": {}, + "grid_x": 74, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y111": { + "bits": {}, + "grid_x": 74, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y112": { + "bits": {}, + "grid_x": 74, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y113": { + "bits": {}, + "grid_x": 74, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y114": { + "bits": {}, + "grid_x": 74, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y115": { + "bits": {}, + "grid_x": 74, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y116": { + "bits": {}, + "grid_x": 74, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y117": { + "bits": {}, + "grid_x": 74, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y118": { + "bits": {}, + "grid_x": 74, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y119": { + "bits": {}, + "grid_x": 74, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y120": { + "bits": {}, + "grid_x": 74, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y121": { + "bits": {}, + "grid_x": 74, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y122": { + "bits": {}, + "grid_x": 74, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y123": { + "bits": {}, + "grid_x": 74, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y124": { + "bits": {}, + "grid_x": 74, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y125": { + "bits": {}, + "grid_x": 74, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y126": { + "bits": {}, + "grid_x": 74, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y127": { + "bits": {}, + "grid_x": 74, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y128": { + "bits": {}, + "grid_x": 74, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X74Y129": { + "bits": {}, + "grid_x": 74, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y105": { + "bits": {}, + "grid_x": 75, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y106": { + "bits": {}, + "grid_x": 75, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y107": { + "bits": {}, + "grid_x": 75, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y108": { + "bits": {}, + "grid_x": 75, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y109": { + "bits": {}, + "grid_x": 75, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y110": { + "bits": {}, + "grid_x": 75, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y111": { + "bits": {}, + "grid_x": 75, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y112": { + "bits": {}, + "grid_x": 75, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y113": { + "bits": {}, + "grid_x": 75, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y114": { + "bits": {}, + "grid_x": 75, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y115": { + "bits": {}, + "grid_x": 75, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y116": { + "bits": {}, + "grid_x": 75, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y117": { + "bits": {}, + "grid_x": 75, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y118": { + "bits": {}, + "grid_x": 75, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y119": { + "bits": {}, + "grid_x": 75, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y120": { + "bits": {}, + "grid_x": 75, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y121": { + "bits": {}, + "grid_x": 75, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y122": { + "bits": {}, + "grid_x": 75, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y123": { + "bits": {}, + "grid_x": 75, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y124": { + "bits": {}, + "grid_x": 75, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y125": { + "bits": {}, + "grid_x": 75, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y126": { + "bits": {}, + "grid_x": 75, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y127": { + "bits": {}, + "grid_x": 75, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y128": { + "bits": {}, + "grid_x": 75, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_NULL_X75Y129": { + "bits": {}, + "grid_x": 75, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_NULL" + }, + "PCIE_TOP_X71Y125": { + "bits": {}, + "grid_x": 71, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "PCIE_TOP" + }, + "RIOB33_SING_X43Y0": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y0" + }, + "start_offset": 2, + "type": "RIOB33" + }, + "baseaddr": "0x00401580", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 155, + "pin_functions": { + "IOB_X1Y0": "IO_25_34" + }, + "sites": { + "IOB_X1Y0": "IOB33" + }, + "type": "RIOB33_SING" + }, + "RIOB33_SING_X43Y49": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y1" + }, + "start_offset": 0, + "type": "RIOB33" + }, + "baseaddr": "0x00401580", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 105, + "pin_functions": { + "IOB_X1Y49": "IO_0_34" + }, + "sites": { + "IOB_X1Y49": "IOB33" + }, + "type": "RIOB33_SING" + }, + "RIOB33_SING_X43Y50": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y0" + }, + "start_offset": 2, + "type": "RIOB33" + }, + "baseaddr": "0x00001580", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 103, + "pin_functions": { + "IOB_X1Y50": "IO_25_35" + }, + "sites": { + "IOB_X1Y50": "IOB33" + }, + "type": "RIOB33_SING" + }, + "RIOB33_SING_X43Y99": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": { + "IOB33_Y0": "IOB33_Y1" + }, + "start_offset": 0, + "type": "RIOB33" + }, + "baseaddr": "0x00001580", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 53, + "pin_functions": { + "IOB_X1Y99": "IO_0_35" + }, + "sites": { + "IOB_X1Y99": "IOB33" + }, + "type": "RIOB33_SING" + }, + "RIOB33_X43Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 154, + "pin_functions": { + "IOB_X1Y1": "IO_L24N_T3_34", + "IOB_X1Y2": "IO_L24P_T3_34" + }, + "sites": { + "IOB_X1Y1": "IOB33S", + "IOB_X1Y2": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 152, + "pin_functions": { + "IOB_X1Y3": "IO_L23N_T3_34", + "IOB_X1Y4": "IO_L23P_T3_34" + }, + "sites": { + "IOB_X1Y3": "IOB33S", + "IOB_X1Y4": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 150, + "pin_functions": { + "IOB_X1Y5": "IO_L22N_T3_34", + "IOB_X1Y6": "IO_L22P_T3_34" + }, + "sites": { + "IOB_X1Y5": "IOB33S", + "IOB_X1Y6": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 148, + "pin_functions": { + "IOB_X1Y7": "IO_L21N_T3_DQS_34", + "IOB_X1Y8": "IO_L21P_T3_DQS_34" + }, + "sites": { + "IOB_X1Y7": "IOB33S", + "IOB_X1Y8": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 146, + "pin_functions": { + "IOB_X1Y9": "IO_L20N_T3_34", + "IOB_X1Y10": "IO_L20P_T3_34" + }, + "sites": { + "IOB_X1Y9": "IOB33S", + "IOB_X1Y10": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 144, + "pin_functions": { + "IOB_X1Y11": "IO_L19N_T3_VREF_34", + "IOB_X1Y12": "IO_L19P_T3_34" + }, + "sites": { + "IOB_X1Y11": "IOB33S", + "IOB_X1Y12": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 142, + "pin_functions": { + "IOB_X1Y13": "IO_L18N_T2_34", + "IOB_X1Y14": "IO_L18P_T2_34" + }, + "sites": { + "IOB_X1Y13": "IOB33S", + "IOB_X1Y14": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 140, + "pin_functions": { + "IOB_X1Y15": "IO_L17N_T2_34", + "IOB_X1Y16": "IO_L17P_T2_34" + }, + "sites": { + "IOB_X1Y15": "IOB33S", + "IOB_X1Y16": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 138, + "pin_functions": { + "IOB_X1Y17": "IO_L16N_T2_34", + "IOB_X1Y18": "IO_L16P_T2_34" + }, + "sites": { + "IOB_X1Y17": "IOB33S", + "IOB_X1Y18": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 136, + "pin_functions": { + "IOB_X1Y19": "IO_L15N_T2_DQS_34", + "IOB_X1Y20": "IO_L15P_T2_DQS_34" + }, + "sites": { + "IOB_X1Y19": "IOB33S", + "IOB_X1Y20": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 134, + "pin_functions": { + "IOB_X1Y21": "IO_L14N_T2_SRCC_34", + "IOB_X1Y22": "IO_L14P_T2_SRCC_34" + }, + "sites": { + "IOB_X1Y21": "IOB33S", + "IOB_X1Y22": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 132, + "pin_functions": { + "IOB_X1Y23": "IO_L13N_T2_MRCC_34", + "IOB_X1Y24": "IO_L13P_T2_MRCC_34" + }, + "sites": { + "IOB_X1Y23": "IOB33S", + "IOB_X1Y24": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 129, + "pin_functions": { + "IOB_X1Y25": "IO_L12N_T1_MRCC_34", + "IOB_X1Y26": "IO_L12P_T1_MRCC_34" + }, + "sites": { + "IOB_X1Y25": "IOB33S", + "IOB_X1Y26": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 127, + "pin_functions": { + "IOB_X1Y27": "IO_L11N_T1_SRCC_34", + "IOB_X1Y28": "IO_L11P_T1_SRCC_34" + }, + "sites": { + "IOB_X1Y27": "IOB33S", + "IOB_X1Y28": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 125, + "pin_functions": { + "IOB_X1Y29": "IO_L10N_T1_34", + "IOB_X1Y30": "IO_L10P_T1_34" + }, + "sites": { + "IOB_X1Y29": "IOB33S", + "IOB_X1Y30": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 123, + "pin_functions": { + "IOB_X1Y31": "IO_L9N_T1_DQS_34", + "IOB_X1Y32": "IO_L9P_T1_DQS_34" + }, + "sites": { + "IOB_X1Y31": "IOB33S", + "IOB_X1Y32": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 121, + "pin_functions": { + "IOB_X1Y33": "IO_L8N_T1_34", + "IOB_X1Y34": "IO_L8P_T1_34" + }, + "sites": { + "IOB_X1Y33": "IOB33S", + "IOB_X1Y34": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 119, + "pin_functions": { + "IOB_X1Y35": "IO_L7N_T1_34", + "IOB_X1Y36": "IO_L7P_T1_34" + }, + "sites": { + "IOB_X1Y35": "IOB33S", + "IOB_X1Y36": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 117, + "pin_functions": { + "IOB_X1Y37": "IO_L6N_T0_VREF_34", + "IOB_X1Y38": "IO_L6P_T0_34" + }, + "sites": { + "IOB_X1Y37": "IOB33S", + "IOB_X1Y38": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 115, + "pin_functions": { + "IOB_X1Y39": "IO_L5N_T0_34", + "IOB_X1Y40": "IO_L5P_T0_34" + }, + "sites": { + "IOB_X1Y39": "IOB33S", + "IOB_X1Y40": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 113, + "pin_functions": { + "IOB_X1Y41": "IO_L4N_T0_34", + "IOB_X1Y42": "IO_L4P_T0_34" + }, + "sites": { + "IOB_X1Y41": "IOB33S", + "IOB_X1Y42": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 111, + "pin_functions": { + "IOB_X1Y43": "IO_L3N_T0_DQS_34", + "IOB_X1Y44": "IO_L3P_T0_DQS_34" + }, + "sites": { + "IOB_X1Y43": "IOB33S", + "IOB_X1Y44": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 109, + "pin_functions": { + "IOB_X1Y45": "IO_L2N_T0_34", + "IOB_X1Y46": "IO_L2P_T0_34" + }, + "sites": { + "IOB_X1Y45": "IOB33S", + "IOB_X1Y46": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 114, + "grid_y": 107, + "pin_functions": { + "IOB_X1Y47": "IO_L1N_T0_34", + "IOB_X1Y48": "IO_L1P_T0_34" + }, + "sites": { + "IOB_X1Y47": "IOB33S", + "IOB_X1Y48": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 102, + "pin_functions": { + "IOB_X1Y51": "IO_L24N_T3_35", + "IOB_X1Y52": "IO_L24P_T3_35" + }, + "sites": { + "IOB_X1Y51": "IOB33S", + "IOB_X1Y52": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 100, + "pin_functions": { + "IOB_X1Y53": "IO_L23N_T3_35", + "IOB_X1Y54": "IO_L23P_T3_35" + }, + "sites": { + "IOB_X1Y53": "IOB33S", + "IOB_X1Y54": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 98, + "pin_functions": { + "IOB_X1Y55": "IO_L22N_T3_35", + "IOB_X1Y56": "IO_L22P_T3_35" + }, + "sites": { + "IOB_X1Y55": "IOB33S", + "IOB_X1Y56": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 96, + "pin_functions": { + "IOB_X1Y57": "IO_L21N_T3_DQS_35", + "IOB_X1Y58": "IO_L21P_T3_DQS_35" + }, + "sites": { + "IOB_X1Y57": "IOB33S", + "IOB_X1Y58": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 94, + "pin_functions": { + "IOB_X1Y59": "IO_L20N_T3_35", + "IOB_X1Y60": "IO_L20P_T3_35" + }, + "sites": { + "IOB_X1Y59": "IOB33S", + "IOB_X1Y60": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 92, + "pin_functions": { + "IOB_X1Y61": "IO_L19N_T3_VREF_35", + "IOB_X1Y62": "IO_L19P_T3_35" + }, + "sites": { + "IOB_X1Y61": "IOB33S", + "IOB_X1Y62": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 90, + "pin_functions": { + "IOB_X1Y63": "IO_L18N_T2_35", + "IOB_X1Y64": "IO_L18P_T2_35" + }, + "sites": { + "IOB_X1Y63": "IOB33S", + "IOB_X1Y64": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 88, + "pin_functions": { + "IOB_X1Y65": "IO_L17N_T2_35", + "IOB_X1Y66": "IO_L17P_T2_35" + }, + "sites": { + "IOB_X1Y65": "IOB33S", + "IOB_X1Y66": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 86, + "pin_functions": { + "IOB_X1Y67": "IO_L16N_T2_35", + "IOB_X1Y68": "IO_L16P_T2_35" + }, + "sites": { + "IOB_X1Y67": "IOB33S", + "IOB_X1Y68": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 84, + "pin_functions": { + "IOB_X1Y69": "IO_L15N_T2_DQS_35", + "IOB_X1Y70": "IO_L15P_T2_DQS_35" + }, + "sites": { + "IOB_X1Y69": "IOB33S", + "IOB_X1Y70": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 82, + "pin_functions": { + "IOB_X1Y71": "IO_L14N_T2_SRCC_35", + "IOB_X1Y72": "IO_L14P_T2_SRCC_35" + }, + "sites": { + "IOB_X1Y71": "IOB33S", + "IOB_X1Y72": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 80, + "pin_functions": { + "IOB_X1Y73": "IO_L13N_T2_MRCC_35", + "IOB_X1Y74": "IO_L13P_T2_MRCC_35" + }, + "sites": { + "IOB_X1Y73": "IOB33S", + "IOB_X1Y74": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 77, + "pin_functions": { + "IOB_X1Y75": "IO_L12N_T1_MRCC_35", + "IOB_X1Y76": "IO_L12P_T1_MRCC_35" + }, + "sites": { + "IOB_X1Y75": "IOB33S", + "IOB_X1Y76": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 75, + "pin_functions": { + "IOB_X1Y77": "IO_L11N_T1_SRCC_35", + "IOB_X1Y78": "IO_L11P_T1_SRCC_35" + }, + "sites": { + "IOB_X1Y77": "IOB33S", + "IOB_X1Y78": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 73, + "pin_functions": { + "IOB_X1Y79": "IO_L10N_T1_AD15N_35", + "IOB_X1Y80": "IO_L10P_T1_AD15P_35" + }, + "sites": { + "IOB_X1Y79": "IOB33S", + "IOB_X1Y80": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 71, + "pin_functions": { + "IOB_X1Y81": "IO_L9N_T1_DQS_AD7N_35", + "IOB_X1Y82": "IO_L9P_T1_DQS_AD7P_35" + }, + "sites": { + "IOB_X1Y81": "IOB33S", + "IOB_X1Y82": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 69, + "pin_functions": { + "IOB_X1Y83": "IO_L8N_T1_AD14N_35", + "IOB_X1Y84": "IO_L8P_T1_AD14P_35" + }, + "sites": { + "IOB_X1Y83": "IOB33S", + "IOB_X1Y84": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 67, + "pin_functions": { + "IOB_X1Y85": "IO_L7N_T1_AD6N_35", + "IOB_X1Y86": "IO_L7P_T1_AD6P_35" + }, + "sites": { + "IOB_X1Y85": "IOB33S", + "IOB_X1Y86": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 65, + "pin_functions": { + "IOB_X1Y87": "IO_L6N_T0_VREF_35", + "IOB_X1Y88": "IO_L6P_T0_35" + }, + "sites": { + "IOB_X1Y87": "IOB33S", + "IOB_X1Y88": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 63, + "pin_functions": { + "IOB_X1Y89": "IO_L5N_T0_AD13N_35", + "IOB_X1Y90": "IO_L5P_T0_AD13P_35" + }, + "sites": { + "IOB_X1Y89": "IOB33S", + "IOB_X1Y90": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 61, + "pin_functions": { + "IOB_X1Y91": "IO_L4N_T0_35", + "IOB_X1Y92": "IO_L4P_T0_35" + }, + "sites": { + "IOB_X1Y91": "IOB33S", + "IOB_X1Y92": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 59, + "pin_functions": { + "IOB_X1Y93": "IO_L3N_T0_DQS_AD5N_35", + "IOB_X1Y94": "IO_L3P_T0_DQS_AD5P_35" + }, + "sites": { + "IOB_X1Y93": "IOB33S", + "IOB_X1Y94": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 57, + "pin_functions": { + "IOB_X1Y95": "IO_L2N_T0_AD12N_35", + "IOB_X1Y96": "IO_L2P_T0_AD12P_35" + }, + "sites": { + "IOB_X1Y95": "IOB33S", + "IOB_X1Y96": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOB33_X43Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 114, + "grid_y": 55, + "pin_functions": { + "IOB_X1Y97": "IO_L1N_T0_AD4N_35", + "IOB_X1Y98": "IO_L1P_T0_AD4P_35" + }, + "sites": { + "IOB_X1Y97": "IOB33S", + "IOB_X1Y98": "IOB33M" + }, + "type": "RIOB33" + }, + "RIOI3_SING_X43Y0": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 2, + "type": "RIOI3" + }, + "baseaddr": "0x00401580", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 155, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y0": "IDELAYE2", + "ILOGIC_X1Y0": "ILOGICE3", + "OLOGIC_X1Y0": "OLOGICE3" + }, + "type": "RIOI3_SING" + }, + "RIOI3_SING_X43Y49": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "RIOI3" + }, + "baseaddr": "0x00401580", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 105, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y49": "IDELAYE2", + "ILOGIC_X1Y49": "ILOGICE3", + "OLOGIC_X1Y49": "OLOGICE3" + }, + "type": "RIOI3_SING" + }, + "RIOI3_SING_X43Y50": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 2, + "type": "RIOI3" + }, + "baseaddr": "0x00001580", + "frames": 42, + "offset": 0, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 103, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y50": "IDELAYE2", + "ILOGIC_X1Y50": "ILOGICE3", + "OLOGIC_X1Y50": "OLOGICE3" + }, + "type": "RIOI3_SING" + }, + "RIOI3_SING_X43Y99": { + "bits": { + "CLB_IO_CLK": { + "alias": { + "sites": {}, + "start_offset": 0, + "type": "RIOI3" + }, + "baseaddr": "0x00001580", + "frames": 42, + "offset": 99, + "words": 2 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 53, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y99": "IDELAYE2", + "ILOGIC_X1Y99": "ILOGICE3", + "OLOGIC_X1Y99": "OLOGICE3" + }, + "type": "RIOI3_SING" + }, + "RIOI3_TBYTESRC_X43Y7": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 148, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y7": "IDELAYE2", + "IDELAY_X1Y8": "IDELAYE2", + "ILOGIC_X1Y7": "ILOGICE3", + "ILOGIC_X1Y8": "ILOGICE3", + "OLOGIC_X1Y7": "OLOGICE3", + "OLOGIC_X1Y8": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y19": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 136, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y19": "IDELAYE2", + "IDELAY_X1Y20": "IDELAYE2", + "ILOGIC_X1Y19": "ILOGICE3", + "ILOGIC_X1Y20": "ILOGICE3", + "OLOGIC_X1Y19": "OLOGICE3", + "OLOGIC_X1Y20": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y31": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 123, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y31": "IDELAYE2", + "IDELAY_X1Y32": "IDELAYE2", + "ILOGIC_X1Y31": "ILOGICE3", + "ILOGIC_X1Y32": "ILOGICE3", + "OLOGIC_X1Y31": "OLOGICE3", + "OLOGIC_X1Y32": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y43": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 111, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y43": "IDELAYE2", + "IDELAY_X1Y44": "IDELAYE2", + "ILOGIC_X1Y43": "ILOGICE3", + "ILOGIC_X1Y44": "ILOGICE3", + "OLOGIC_X1Y43": "OLOGICE3", + "OLOGIC_X1Y44": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y57": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 14, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 96, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y57": "IDELAYE2", + "IDELAY_X1Y58": "IDELAYE2", + "ILOGIC_X1Y57": "ILOGICE3", + "ILOGIC_X1Y58": "ILOGICE3", + "OLOGIC_X1Y57": "OLOGICE3", + "OLOGIC_X1Y58": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y69": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 38, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 84, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y69": "IDELAYE2", + "IDELAY_X1Y70": "IDELAYE2", + "ILOGIC_X1Y69": "ILOGICE3", + "ILOGIC_X1Y70": "ILOGICE3", + "OLOGIC_X1Y69": "OLOGICE3", + "OLOGIC_X1Y70": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y81": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 63, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 71, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y81": "IDELAYE2", + "IDELAY_X1Y82": "IDELAYE2", + "ILOGIC_X1Y81": "ILOGICE3", + "ILOGIC_X1Y82": "ILOGICE3", + "OLOGIC_X1Y81": "OLOGICE3", + "OLOGIC_X1Y82": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTESRC_X43Y93": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 87, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 59, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y93": "IDELAYE2", + "IDELAY_X1Y94": "IDELAYE2", + "ILOGIC_X1Y93": "ILOGICE3", + "ILOGIC_X1Y94": "ILOGICE3", + "OLOGIC_X1Y93": "OLOGICE3", + "OLOGIC_X1Y94": "OLOGICE3" + }, + "type": "RIOI3_TBYTESRC" + }, + "RIOI3_TBYTETERM_X43Y13": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 142, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y13": "IDELAYE2", + "IDELAY_X1Y14": "IDELAYE2", + "ILOGIC_X1Y13": "ILOGICE3", + "ILOGIC_X1Y14": "ILOGICE3", + "OLOGIC_X1Y13": "OLOGICE3", + "OLOGIC_X1Y14": "OLOGICE3" + }, + "type": "RIOI3_TBYTETERM" + }, + "RIOI3_TBYTETERM_X43Y37": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 117, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y37": "IDELAYE2", + "IDELAY_X1Y38": "IDELAYE2", + "ILOGIC_X1Y37": "ILOGICE3", + "ILOGIC_X1Y38": "ILOGICE3", + "OLOGIC_X1Y37": "OLOGICE3", + "OLOGIC_X1Y38": "OLOGICE3" + }, + "type": "RIOI3_TBYTETERM" + }, + "RIOI3_TBYTETERM_X43Y63": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 26, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 90, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y63": "IDELAYE2", + "IDELAY_X1Y64": "IDELAYE2", + "ILOGIC_X1Y63": "ILOGICE3", + "ILOGIC_X1Y64": "ILOGICE3", + "OLOGIC_X1Y63": "OLOGICE3", + "OLOGIC_X1Y64": "OLOGICE3" + }, + "type": "RIOI3_TBYTETERM" + }, + "RIOI3_TBYTETERM_X43Y87": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 75, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 65, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y87": "IDELAYE2", + "IDELAY_X1Y88": "IDELAYE2", + "ILOGIC_X1Y87": "ILOGICE3", + "ILOGIC_X1Y88": "ILOGICE3", + "OLOGIC_X1Y87": "OLOGICE3", + "OLOGIC_X1Y88": "OLOGICE3" + }, + "type": "RIOI3_TBYTETERM" + }, + "RIOI3_X43Y1": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 154, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y1": "IDELAYE2", + "IDELAY_X1Y2": "IDELAYE2", + "ILOGIC_X1Y1": "ILOGICE3", + "ILOGIC_X1Y2": "ILOGICE3", + "OLOGIC_X1Y1": "OLOGICE3", + "OLOGIC_X1Y2": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y3": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 152, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y3": "IDELAYE2", + "IDELAY_X1Y4": "IDELAYE2", + "ILOGIC_X1Y3": "ILOGICE3", + "ILOGIC_X1Y4": "ILOGICE3", + "OLOGIC_X1Y3": "OLOGICE3", + "OLOGIC_X1Y4": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y5": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 150, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y5": "IDELAYE2", + "IDELAY_X1Y6": "IDELAYE2", + "ILOGIC_X1Y5": "ILOGICE3", + "ILOGIC_X1Y6": "ILOGICE3", + "OLOGIC_X1Y5": "OLOGICE3", + "OLOGIC_X1Y6": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y9": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 146, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y9": "IDELAYE2", + "IDELAY_X1Y10": "IDELAYE2", + "ILOGIC_X1Y9": "ILOGICE3", + "ILOGIC_X1Y10": "ILOGICE3", + "OLOGIC_X1Y9": "OLOGICE3", + "OLOGIC_X1Y10": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y11": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 144, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y11": "IDELAYE2", + "IDELAY_X1Y12": "IDELAYE2", + "ILOGIC_X1Y11": "ILOGICE3", + "ILOGIC_X1Y12": "ILOGICE3", + "OLOGIC_X1Y11": "OLOGICE3", + "OLOGIC_X1Y12": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y15": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 140, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y15": "IDELAYE2", + "IDELAY_X1Y16": "IDELAYE2", + "ILOGIC_X1Y15": "ILOGICE3", + "ILOGIC_X1Y16": "ILOGICE3", + "OLOGIC_X1Y15": "OLOGICE3", + "OLOGIC_X1Y16": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y17": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 138, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y17": "IDELAYE2", + "IDELAY_X1Y18": "IDELAYE2", + "ILOGIC_X1Y17": "ILOGICE3", + "ILOGIC_X1Y18": "ILOGICE3", + "OLOGIC_X1Y17": "OLOGICE3", + "OLOGIC_X1Y18": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y21": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 134, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y21": "IDELAYE2", + "IDELAY_X1Y22": "IDELAYE2", + "ILOGIC_X1Y21": "ILOGICE3", + "ILOGIC_X1Y22": "ILOGICE3", + "OLOGIC_X1Y21": "OLOGICE3", + "OLOGIC_X1Y22": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y23": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 132, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y23": "IDELAYE2", + "IDELAY_X1Y24": "IDELAYE2", + "ILOGIC_X1Y23": "ILOGICE3", + "ILOGIC_X1Y24": "ILOGICE3", + "OLOGIC_X1Y23": "OLOGICE3", + "OLOGIC_X1Y24": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y25": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 129, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y25": "IDELAYE2", + "IDELAY_X1Y26": "IDELAYE2", + "ILOGIC_X1Y25": "ILOGICE3", + "ILOGIC_X1Y26": "ILOGICE3", + "OLOGIC_X1Y25": "OLOGICE3", + "OLOGIC_X1Y26": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y27": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 127, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y27": "IDELAYE2", + "IDELAY_X1Y28": "IDELAYE2", + "ILOGIC_X1Y27": "ILOGICE3", + "ILOGIC_X1Y28": "ILOGICE3", + "OLOGIC_X1Y27": "OLOGICE3", + "OLOGIC_X1Y28": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y29": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 125, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y29": "IDELAYE2", + "IDELAY_X1Y30": "IDELAYE2", + "ILOGIC_X1Y29": "ILOGICE3", + "ILOGIC_X1Y30": "ILOGICE3", + "OLOGIC_X1Y29": "OLOGICE3", + "OLOGIC_X1Y30": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y33": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 121, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y33": "IDELAYE2", + "IDELAY_X1Y34": "IDELAYE2", + "ILOGIC_X1Y33": "ILOGICE3", + "ILOGIC_X1Y34": "ILOGICE3", + "OLOGIC_X1Y33": "OLOGICE3", + "OLOGIC_X1Y34": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y35": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 119, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y35": "IDELAYE2", + "IDELAY_X1Y36": "IDELAYE2", + "ILOGIC_X1Y35": "ILOGICE3", + "ILOGIC_X1Y36": "ILOGICE3", + "OLOGIC_X1Y35": "OLOGICE3", + "OLOGIC_X1Y36": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y39": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 115, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y39": "IDELAYE2", + "IDELAY_X1Y40": "IDELAYE2", + "ILOGIC_X1Y39": "ILOGICE3", + "ILOGIC_X1Y40": "ILOGICE3", + "OLOGIC_X1Y39": "OLOGICE3", + "OLOGIC_X1Y40": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y41": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 113, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y41": "IDELAYE2", + "IDELAY_X1Y42": "IDELAYE2", + "ILOGIC_X1Y41": "ILOGICE3", + "ILOGIC_X1Y42": "ILOGICE3", + "OLOGIC_X1Y41": "OLOGICE3", + "OLOGIC_X1Y42": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y45": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 109, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y45": "IDELAYE2", + "IDELAY_X1Y46": "IDELAYE2", + "ILOGIC_X1Y45": "ILOGICE3", + "ILOGIC_X1Y46": "ILOGICE3", + "OLOGIC_X1Y45": "OLOGICE3", + "OLOGIC_X1Y46": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y47": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00401580", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X1Y0", + "grid_x": 113, + "grid_y": 107, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y47": "IDELAYE2", + "IDELAY_X1Y48": "IDELAYE2", + "ILOGIC_X1Y47": "ILOGICE3", + "ILOGIC_X1Y48": "ILOGICE3", + "OLOGIC_X1Y47": "OLOGICE3", + "OLOGIC_X1Y48": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y51": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 2, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 102, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y51": "IDELAYE2", + "IDELAY_X1Y52": "IDELAYE2", + "ILOGIC_X1Y51": "ILOGICE3", + "ILOGIC_X1Y52": "ILOGICE3", + "OLOGIC_X1Y51": "OLOGICE3", + "OLOGIC_X1Y52": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y53": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 6, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 100, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y53": "IDELAYE2", + "IDELAY_X1Y54": "IDELAYE2", + "ILOGIC_X1Y53": "ILOGICE3", + "ILOGIC_X1Y54": "ILOGICE3", + "OLOGIC_X1Y53": "OLOGICE3", + "OLOGIC_X1Y54": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y55": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 10, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 98, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y55": "IDELAYE2", + "IDELAY_X1Y56": "IDELAYE2", + "ILOGIC_X1Y55": "ILOGICE3", + "ILOGIC_X1Y56": "ILOGICE3", + "OLOGIC_X1Y55": "OLOGICE3", + "OLOGIC_X1Y56": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y59": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 18, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 94, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y59": "IDELAYE2", + "IDELAY_X1Y60": "IDELAYE2", + "ILOGIC_X1Y59": "ILOGICE3", + "ILOGIC_X1Y60": "ILOGICE3", + "OLOGIC_X1Y59": "OLOGICE3", + "OLOGIC_X1Y60": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y61": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 22, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 92, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y61": "IDELAYE2", + "IDELAY_X1Y62": "IDELAYE2", + "ILOGIC_X1Y61": "ILOGICE3", + "ILOGIC_X1Y62": "ILOGICE3", + "OLOGIC_X1Y61": "OLOGICE3", + "OLOGIC_X1Y62": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y65": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 30, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 88, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y65": "IDELAYE2", + "IDELAY_X1Y66": "IDELAYE2", + "ILOGIC_X1Y65": "ILOGICE3", + "ILOGIC_X1Y66": "ILOGICE3", + "OLOGIC_X1Y65": "OLOGICE3", + "OLOGIC_X1Y66": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y67": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 34, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 86, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y67": "IDELAYE2", + "IDELAY_X1Y68": "IDELAYE2", + "ILOGIC_X1Y67": "ILOGICE3", + "ILOGIC_X1Y68": "ILOGICE3", + "OLOGIC_X1Y67": "OLOGICE3", + "OLOGIC_X1Y68": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y71": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 42, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 82, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y71": "IDELAYE2", + "IDELAY_X1Y72": "IDELAYE2", + "ILOGIC_X1Y71": "ILOGICE3", + "ILOGIC_X1Y72": "ILOGICE3", + "OLOGIC_X1Y71": "OLOGICE3", + "OLOGIC_X1Y72": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y73": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 46, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 80, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y73": "IDELAYE2", + "IDELAY_X1Y74": "IDELAYE2", + "ILOGIC_X1Y73": "ILOGICE3", + "ILOGIC_X1Y74": "ILOGICE3", + "OLOGIC_X1Y73": "OLOGICE3", + "OLOGIC_X1Y74": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y75": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 51, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 77, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y75": "IDELAYE2", + "IDELAY_X1Y76": "IDELAYE2", + "ILOGIC_X1Y75": "ILOGICE3", + "ILOGIC_X1Y76": "ILOGICE3", + "OLOGIC_X1Y75": "OLOGICE3", + "OLOGIC_X1Y76": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y77": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 55, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 75, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y77": "IDELAYE2", + "IDELAY_X1Y78": "IDELAYE2", + "ILOGIC_X1Y77": "ILOGICE3", + "ILOGIC_X1Y78": "ILOGICE3", + "OLOGIC_X1Y77": "OLOGICE3", + "OLOGIC_X1Y78": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y79": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 59, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 73, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y79": "IDELAYE2", + "IDELAY_X1Y80": "IDELAYE2", + "ILOGIC_X1Y79": "ILOGICE3", + "ILOGIC_X1Y80": "ILOGICE3", + "OLOGIC_X1Y79": "OLOGICE3", + "OLOGIC_X1Y80": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y83": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 67, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 69, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y83": "IDELAYE2", + "IDELAY_X1Y84": "IDELAYE2", + "ILOGIC_X1Y83": "ILOGICE3", + "ILOGIC_X1Y84": "ILOGICE3", + "OLOGIC_X1Y83": "OLOGICE3", + "OLOGIC_X1Y84": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y85": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 71, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 67, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y85": "IDELAYE2", + "IDELAY_X1Y86": "IDELAYE2", + "ILOGIC_X1Y85": "ILOGICE3", + "ILOGIC_X1Y86": "ILOGICE3", + "OLOGIC_X1Y85": "OLOGICE3", + "OLOGIC_X1Y86": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y89": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 79, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 63, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y89": "IDELAYE2", + "IDELAY_X1Y90": "IDELAYE2", + "ILOGIC_X1Y89": "ILOGICE3", + "ILOGIC_X1Y90": "ILOGICE3", + "OLOGIC_X1Y89": "OLOGICE3", + "OLOGIC_X1Y90": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y91": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 83, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 61, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y91": "IDELAYE2", + "IDELAY_X1Y92": "IDELAYE2", + "ILOGIC_X1Y91": "ILOGICE3", + "ILOGIC_X1Y92": "ILOGICE3", + "OLOGIC_X1Y91": "OLOGICE3", + "OLOGIC_X1Y92": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y95": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 91, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 57, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y95": "IDELAYE2", + "IDELAY_X1Y96": "IDELAYE2", + "ILOGIC_X1Y95": "ILOGICE3", + "ILOGIC_X1Y96": "ILOGICE3", + "OLOGIC_X1Y95": "OLOGICE3", + "OLOGIC_X1Y96": "OLOGICE3" + }, + "type": "RIOI3" + }, + "RIOI3_X43Y97": { + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001580", + "frames": 42, + "offset": 95, + "words": 4 + } + }, + "clock_region": "X1Y1", + "grid_x": 113, + "grid_y": 55, + "pin_functions": {}, + "sites": { + "IDELAY_X1Y97": "IDELAYE2", + "IDELAY_X1Y98": "IDELAYE2", + "ILOGIC_X1Y97": "ILOGICE3", + "ILOGIC_X1Y98": "ILOGICE3", + "OLOGIC_X1Y97": "OLOGICE3", + "OLOGIC_X1Y98": "OLOGICE3" + }, + "type": "RIOI3" + }, + "R_TERM_INT_GTX_X95Y105": { + "bits": {}, + "grid_x": 95, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y106": { + "bits": {}, + "grid_x": 95, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y107": { + "bits": {}, + "grid_x": 95, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y108": { + "bits": {}, + "grid_x": 95, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y109": { + "bits": {}, + "grid_x": 95, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y110": { + "bits": {}, + "grid_x": 95, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y111": { + "bits": {}, + "grid_x": 95, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y112": { + "bits": {}, + "grid_x": 95, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y113": { + "bits": {}, + "grid_x": 95, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y114": { + "bits": {}, + "grid_x": 95, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y115": { + "bits": {}, + "grid_x": 95, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y116": { + "bits": {}, + "grid_x": 95, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y117": { + "bits": {}, + "grid_x": 95, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y118": { + "bits": {}, + "grid_x": 95, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y119": { + "bits": {}, + "grid_x": 95, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y120": { + "bits": {}, + "grid_x": 95, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y121": { + "bits": {}, + "grid_x": 95, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y122": { + "bits": {}, + "grid_x": 95, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y123": { + "bits": {}, + "grid_x": 95, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y124": { + "bits": {}, + "grid_x": 95, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y125": { + "bits": {}, + "grid_x": 95, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y126": { + "bits": {}, + "grid_x": 95, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y127": { + "bits": {}, + "grid_x": 95, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y128": { + "bits": {}, + "grid_x": 95, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y129": { + "bits": {}, + "grid_x": 95, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y131": { + "bits": {}, + "grid_x": 95, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y132": { + "bits": {}, + "grid_x": 95, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y133": { + "bits": {}, + "grid_x": 95, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y134": { + "bits": {}, + "grid_x": 95, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y135": { + "bits": {}, + "grid_x": 95, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y136": { + "bits": {}, + "grid_x": 95, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y137": { + "bits": {}, + "grid_x": 95, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y138": { + "bits": {}, + "grid_x": 95, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y139": { + "bits": {}, + "grid_x": 95, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y140": { + "bits": {}, + "grid_x": 95, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y141": { + "bits": {}, + "grid_x": 95, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y142": { + "bits": {}, + "grid_x": 95, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y143": { + "bits": {}, + "grid_x": 95, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y144": { + "bits": {}, + "grid_x": 95, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y145": { + "bits": {}, + "grid_x": 95, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y146": { + "bits": {}, + "grid_x": 95, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y147": { + "bits": {}, + "grid_x": 95, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y148": { + "bits": {}, + "grid_x": 95, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y149": { + "bits": {}, + "grid_x": 95, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y150": { + "bits": {}, + "grid_x": 95, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y151": { + "bits": {}, + "grid_x": 95, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y152": { + "bits": {}, + "grid_x": 95, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y153": { + "bits": {}, + "grid_x": 95, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y154": { + "bits": {}, + "grid_x": 95, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_GTX_X95Y155": { + "bits": {}, + "grid_x": 95, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT_GTX" + }, + "R_TERM_INT_X112Y1": { + "bits": {}, + "grid_x": 112, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y2": { + "bits": {}, + "grid_x": 112, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y3": { + "bits": {}, + "grid_x": 112, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y4": { + "bits": {}, + "grid_x": 112, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y5": { + "bits": {}, + "grid_x": 112, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y6": { + "bits": {}, + "grid_x": 112, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y7": { + "bits": {}, + "grid_x": 112, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y8": { + "bits": {}, + "grid_x": 112, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y9": { + "bits": {}, + "grid_x": 112, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y10": { + "bits": {}, + "grid_x": 112, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y11": { + "bits": {}, + "grid_x": 112, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y12": { + "bits": {}, + "grid_x": 112, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y13": { + "bits": {}, + "grid_x": 112, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y14": { + "bits": {}, + "grid_x": 112, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y15": { + "bits": {}, + "grid_x": 112, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y16": { + "bits": {}, + "grid_x": 112, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y17": { + "bits": {}, + "grid_x": 112, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y18": { + "bits": {}, + "grid_x": 112, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y19": { + "bits": {}, + "grid_x": 112, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y20": { + "bits": {}, + "grid_x": 112, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y21": { + "bits": {}, + "grid_x": 112, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y22": { + "bits": {}, + "grid_x": 112, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y23": { + "bits": {}, + "grid_x": 112, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y24": { + "bits": {}, + "grid_x": 112, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y25": { + "bits": {}, + "grid_x": 112, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y27": { + "bits": {}, + "grid_x": 112, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y28": { + "bits": {}, + "grid_x": 112, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y29": { + "bits": {}, + "grid_x": 112, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y30": { + "bits": {}, + "grid_x": 112, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y31": { + "bits": {}, + "grid_x": 112, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y32": { + "bits": {}, + "grid_x": 112, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y33": { + "bits": {}, + "grid_x": 112, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y34": { + "bits": {}, + "grid_x": 112, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y35": { + "bits": {}, + "grid_x": 112, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y36": { + "bits": {}, + "grid_x": 112, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y37": { + "bits": {}, + "grid_x": 112, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y38": { + "bits": {}, + "grid_x": 112, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y39": { + "bits": {}, + "grid_x": 112, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y40": { + "bits": {}, + "grid_x": 112, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y41": { + "bits": {}, + "grid_x": 112, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y42": { + "bits": {}, + "grid_x": 112, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y43": { + "bits": {}, + "grid_x": 112, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y44": { + "bits": {}, + "grid_x": 112, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y45": { + "bits": {}, + "grid_x": 112, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y46": { + "bits": {}, + "grid_x": 112, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y47": { + "bits": {}, + "grid_x": 112, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y48": { + "bits": {}, + "grid_x": 112, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y49": { + "bits": {}, + "grid_x": 112, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y50": { + "bits": {}, + "grid_x": 112, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y51": { + "bits": {}, + "grid_x": 112, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y53": { + "bits": {}, + "grid_x": 112, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y54": { + "bits": {}, + "grid_x": 112, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y55": { + "bits": {}, + "grid_x": 112, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y56": { + "bits": {}, + "grid_x": 112, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y57": { + "bits": {}, + "grid_x": 112, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y58": { + "bits": {}, + "grid_x": 112, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y59": { + "bits": {}, + "grid_x": 112, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y60": { + "bits": {}, + "grid_x": 112, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y61": { + "bits": {}, + "grid_x": 112, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y62": { + "bits": {}, + "grid_x": 112, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y63": { + "bits": {}, + "grid_x": 112, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y64": { + "bits": {}, + "grid_x": 112, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y65": { + "bits": {}, + "grid_x": 112, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y66": { + "bits": {}, + "grid_x": 112, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y67": { + "bits": {}, + "grid_x": 112, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y68": { + "bits": {}, + "grid_x": 112, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y69": { + "bits": {}, + "grid_x": 112, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y70": { + "bits": {}, + "grid_x": 112, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y71": { + "bits": {}, + "grid_x": 112, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y72": { + "bits": {}, + "grid_x": 112, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y73": { + "bits": {}, + "grid_x": 112, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y74": { + "bits": {}, + "grid_x": 112, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y75": { + "bits": {}, + "grid_x": 112, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y76": { + "bits": {}, + "grid_x": 112, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y77": { + "bits": {}, + "grid_x": 112, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y79": { + "bits": {}, + "grid_x": 112, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y80": { + "bits": {}, + "grid_x": 112, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y81": { + "bits": {}, + "grid_x": 112, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y82": { + "bits": {}, + "grid_x": 112, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y83": { + "bits": {}, + "grid_x": 112, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y84": { + "bits": {}, + "grid_x": 112, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y85": { + "bits": {}, + "grid_x": 112, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y86": { + "bits": {}, + "grid_x": 112, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y87": { + "bits": {}, + "grid_x": 112, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y88": { + "bits": {}, + "grid_x": 112, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y89": { + "bits": {}, + "grid_x": 112, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y90": { + "bits": {}, + "grid_x": 112, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y91": { + "bits": {}, + "grid_x": 112, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y92": { + "bits": {}, + "grid_x": 112, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y93": { + "bits": {}, + "grid_x": 112, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y94": { + "bits": {}, + "grid_x": 112, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y95": { + "bits": {}, + "grid_x": 112, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y96": { + "bits": {}, + "grid_x": 112, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y97": { + "bits": {}, + "grid_x": 112, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y98": { + "bits": {}, + "grid_x": 112, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y99": { + "bits": {}, + "grid_x": 112, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y100": { + "bits": {}, + "grid_x": 112, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y101": { + "bits": {}, + "grid_x": 112, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y102": { + "bits": {}, + "grid_x": 112, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "R_TERM_INT_X112Y103": { + "bits": {}, + "grid_x": 112, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "R_TERM_INT" + }, + "TERM_CMT_X8Y0": { + "bits": {}, + "grid_x": 8, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "TERM_CMT" + }, + "TERM_CMT_X8Y156": { + "bits": {}, + "grid_x": 8, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "TERM_CMT" + }, + "TERM_CMT_X106Y0": { + "bits": {}, + "grid_x": 106, + "grid_y": 156, + "pin_functions": {}, + "sites": {}, + "type": "TERM_CMT" + }, + "T_TERM_INT_X4Y156": { + "bits": {}, + "grid_x": 4, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X5Y156": { + "bits": {}, + "grid_x": 5, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X11Y156": { + "bits": {}, + "grid_x": 11, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X12Y156": { + "bits": {}, + "grid_x": 12, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X15Y156": { + "bits": {}, + "grid_x": 15, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X16Y156": { + "bits": {}, + "grid_x": 16, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X21Y156": { + "bits": {}, + "grid_x": 21, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X22Y156": { + "bits": {}, + "grid_x": 22, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X25Y156": { + "bits": {}, + "grid_x": 25, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X26Y156": { + "bits": {}, + "grid_x": 26, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X31Y156": { + "bits": {}, + "grid_x": 31, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X32Y156": { + "bits": {}, + "grid_x": 32, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X36Y156": { + "bits": {}, + "grid_x": 36, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X37Y156": { + "bits": {}, + "grid_x": 37, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X40Y156": { + "bits": {}, + "grid_x": 40, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X41Y156": { + "bits": {}, + "grid_x": 41, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X44Y156": { + "bits": {}, + "grid_x": 44, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X45Y156": { + "bits": {}, + "grid_x": 45, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X49Y156": { + "bits": {}, + "grid_x": 49, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X50Y156": { + "bits": {}, + "grid_x": 50, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X53Y156": { + "bits": {}, + "grid_x": 53, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X54Y156": { + "bits": {}, + "grid_x": 54, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X57Y156": { + "bits": {}, + "grid_x": 57, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X58Y156": { + "bits": {}, + "grid_x": 58, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X63Y156": { + "bits": {}, + "grid_x": 63, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X64Y156": { + "bits": {}, + "grid_x": 64, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X68Y156": { + "bits": {}, + "grid_x": 68, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X69Y156": { + "bits": {}, + "grid_x": 69, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X72Y156": { + "bits": {}, + "grid_x": 72, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X73Y156": { + "bits": {}, + "grid_x": 73, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X77Y156": { + "bits": {}, + "grid_x": 77, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X78Y156": { + "bits": {}, + "grid_x": 78, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X82Y156": { + "bits": {}, + "grid_x": 82, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X83Y156": { + "bits": {}, + "grid_x": 83, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X88Y156": { + "bits": {}, + "grid_x": 88, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X89Y156": { + "bits": {}, + "grid_x": 89, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X92Y156": { + "bits": {}, + "grid_x": 92, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "T_TERM_INT_X93Y156": { + "bits": {}, + "grid_x": 93, + "grid_y": 0, + "pin_functions": {}, + "sites": {}, + "type": "T_TERM_INT" + }, + "VBRK_EXT_X96Y105": { + "bits": {}, + "grid_x": 96, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y106": { + "bits": {}, + "grid_x": 96, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y107": { + "bits": {}, + "grid_x": 96, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y108": { + "bits": {}, + "grid_x": 96, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y109": { + "bits": {}, + "grid_x": 96, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y110": { + "bits": {}, + "grid_x": 96, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y111": { + "bits": {}, + "grid_x": 96, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y112": { + "bits": {}, + "grid_x": 96, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y113": { + "bits": {}, + "grid_x": 96, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y114": { + "bits": {}, + "grid_x": 96, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y115": { + "bits": {}, + "grid_x": 96, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y116": { + "bits": {}, + "grid_x": 96, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y117": { + "bits": {}, + "grid_x": 96, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y118": { + "bits": {}, + "grid_x": 96, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y119": { + "bits": {}, + "grid_x": 96, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y120": { + "bits": {}, + "grid_x": 96, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y121": { + "bits": {}, + "grid_x": 96, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y122": { + "bits": {}, + "grid_x": 96, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y123": { + "bits": {}, + "grid_x": 96, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y124": { + "bits": {}, + "grid_x": 96, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y125": { + "bits": {}, + "grid_x": 96, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y126": { + "bits": {}, + "grid_x": 96, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y127": { + "bits": {}, + "grid_x": 96, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y128": { + "bits": {}, + "grid_x": 96, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y129": { + "bits": {}, + "grid_x": 96, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y131": { + "bits": {}, + "grid_x": 96, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y132": { + "bits": {}, + "grid_x": 96, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y133": { + "bits": {}, + "grid_x": 96, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y134": { + "bits": {}, + "grid_x": 96, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y135": { + "bits": {}, + "grid_x": 96, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y136": { + "bits": {}, + "grid_x": 96, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y137": { + "bits": {}, + "grid_x": 96, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y138": { + "bits": {}, + "grid_x": 96, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y139": { + "bits": {}, + "grid_x": 96, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y140": { + "bits": {}, + "grid_x": 96, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y141": { + "bits": {}, + "grid_x": 96, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y142": { + "bits": {}, + "grid_x": 96, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y143": { + "bits": {}, + "grid_x": 96, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y144": { + "bits": {}, + "grid_x": 96, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y145": { + "bits": {}, + "grid_x": 96, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y146": { + "bits": {}, + "grid_x": 96, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y147": { + "bits": {}, + "grid_x": 96, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y148": { + "bits": {}, + "grid_x": 96, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y149": { + "bits": {}, + "grid_x": 96, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y150": { + "bits": {}, + "grid_x": 96, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y151": { + "bits": {}, + "grid_x": 96, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y152": { + "bits": {}, + "grid_x": 96, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y153": { + "bits": {}, + "grid_x": 96, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y154": { + "bits": {}, + "grid_x": 96, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_EXT_X96Y155": { + "bits": {}, + "grid_x": 96, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK_EXT" + }, + "VBRK_X9Y1": { + "bits": {}, + "grid_x": 9, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y2": { + "bits": {}, + "grid_x": 9, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y3": { + "bits": {}, + "grid_x": 9, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y4": { + "bits": {}, + "grid_x": 9, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y5": { + "bits": {}, + "grid_x": 9, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y6": { + "bits": {}, + "grid_x": 9, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y7": { + "bits": {}, + "grid_x": 9, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y8": { + "bits": {}, + "grid_x": 9, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y9": { + "bits": {}, + "grid_x": 9, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y10": { + "bits": {}, + "grid_x": 9, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y11": { + "bits": {}, + "grid_x": 9, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y12": { + "bits": {}, + "grid_x": 9, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y13": { + "bits": {}, + "grid_x": 9, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y14": { + "bits": {}, + "grid_x": 9, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y15": { + "bits": {}, + "grid_x": 9, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y16": { + "bits": {}, + "grid_x": 9, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y17": { + "bits": {}, + "grid_x": 9, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y18": { + "bits": {}, + "grid_x": 9, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y19": { + "bits": {}, + "grid_x": 9, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y20": { + "bits": {}, + "grid_x": 9, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y21": { + "bits": {}, + "grid_x": 9, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y22": { + "bits": {}, + "grid_x": 9, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y23": { + "bits": {}, + "grid_x": 9, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y24": { + "bits": {}, + "grid_x": 9, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y25": { + "bits": {}, + "grid_x": 9, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y27": { + "bits": {}, + "grid_x": 9, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y28": { + "bits": {}, + "grid_x": 9, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y29": { + "bits": {}, + "grid_x": 9, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y30": { + "bits": {}, + "grid_x": 9, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y31": { + "bits": {}, + "grid_x": 9, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y32": { + "bits": {}, + "grid_x": 9, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y33": { + "bits": {}, + "grid_x": 9, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y34": { + "bits": {}, + "grid_x": 9, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y35": { + "bits": {}, + "grid_x": 9, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y36": { + "bits": {}, + "grid_x": 9, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y37": { + "bits": {}, + "grid_x": 9, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y38": { + "bits": {}, + "grid_x": 9, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y39": { + "bits": {}, + "grid_x": 9, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y40": { + "bits": {}, + "grid_x": 9, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y41": { + "bits": {}, + "grid_x": 9, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y42": { + "bits": {}, + "grid_x": 9, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y43": { + "bits": {}, + "grid_x": 9, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y44": { + "bits": {}, + "grid_x": 9, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y45": { + "bits": {}, + "grid_x": 9, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y46": { + "bits": {}, + "grid_x": 9, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y47": { + "bits": {}, + "grid_x": 9, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y48": { + "bits": {}, + "grid_x": 9, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y49": { + "bits": {}, + "grid_x": 9, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y50": { + "bits": {}, + "grid_x": 9, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y51": { + "bits": {}, + "grid_x": 9, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y53": { + "bits": {}, + "grid_x": 9, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y54": { + "bits": {}, + "grid_x": 9, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y55": { + "bits": {}, + "grid_x": 9, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y56": { + "bits": {}, + "grid_x": 9, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y57": { + "bits": {}, + "grid_x": 9, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y58": { + "bits": {}, + "grid_x": 9, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y59": { + "bits": {}, + "grid_x": 9, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y60": { + "bits": {}, + "grid_x": 9, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y61": { + "bits": {}, + "grid_x": 9, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y62": { + "bits": {}, + "grid_x": 9, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y63": { + "bits": {}, + "grid_x": 9, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y64": { + "bits": {}, + "grid_x": 9, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y65": { + "bits": {}, + "grid_x": 9, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y66": { + "bits": {}, + "grid_x": 9, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y67": { + "bits": {}, + "grid_x": 9, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y68": { + "bits": {}, + "grid_x": 9, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y69": { + "bits": {}, + "grid_x": 9, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y70": { + "bits": {}, + "grid_x": 9, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y71": { + "bits": {}, + "grid_x": 9, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y72": { + "bits": {}, + "grid_x": 9, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y73": { + "bits": {}, + "grid_x": 9, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y74": { + "bits": {}, + "grid_x": 9, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y75": { + "bits": {}, + "grid_x": 9, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y76": { + "bits": {}, + "grid_x": 9, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y77": { + "bits": {}, + "grid_x": 9, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y79": { + "bits": {}, + "grid_x": 9, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y80": { + "bits": {}, + "grid_x": 9, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y81": { + "bits": {}, + "grid_x": 9, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y82": { + "bits": {}, + "grid_x": 9, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y83": { + "bits": {}, + "grid_x": 9, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y84": { + "bits": {}, + "grid_x": 9, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y85": { + "bits": {}, + "grid_x": 9, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y86": { + "bits": {}, + "grid_x": 9, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y87": { + "bits": {}, + "grid_x": 9, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y88": { + "bits": {}, + "grid_x": 9, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y89": { + "bits": {}, + "grid_x": 9, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y90": { + "bits": {}, + "grid_x": 9, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y91": { + "bits": {}, + "grid_x": 9, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y92": { + "bits": {}, + "grid_x": 9, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y93": { + "bits": {}, + "grid_x": 9, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y94": { + "bits": {}, + "grid_x": 9, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y95": { + "bits": {}, + "grid_x": 9, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y96": { + "bits": {}, + "grid_x": 9, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y97": { + "bits": {}, + "grid_x": 9, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y98": { + "bits": {}, + "grid_x": 9, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y99": { + "bits": {}, + "grid_x": 9, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y100": { + "bits": {}, + "grid_x": 9, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y101": { + "bits": {}, + "grid_x": 9, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y102": { + "bits": {}, + "grid_x": 9, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y103": { + "bits": {}, + "grid_x": 9, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y105": { + "bits": {}, + "grid_x": 9, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y106": { + "bits": {}, + "grid_x": 9, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y107": { + "bits": {}, + "grid_x": 9, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y108": { + "bits": {}, + "grid_x": 9, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y109": { + "bits": {}, + "grid_x": 9, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y110": { + "bits": {}, + "grid_x": 9, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y111": { + "bits": {}, + "grid_x": 9, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y112": { + "bits": {}, + "grid_x": 9, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y113": { + "bits": {}, + "grid_x": 9, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y114": { + "bits": {}, + "grid_x": 9, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y115": { + "bits": {}, + "grid_x": 9, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y116": { + "bits": {}, + "grid_x": 9, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y117": { + "bits": {}, + "grid_x": 9, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y118": { + "bits": {}, + "grid_x": 9, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y119": { + "bits": {}, + "grid_x": 9, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y120": { + "bits": {}, + "grid_x": 9, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y121": { + "bits": {}, + "grid_x": 9, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y122": { + "bits": {}, + "grid_x": 9, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y123": { + "bits": {}, + "grid_x": 9, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y124": { + "bits": {}, + "grid_x": 9, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y125": { + "bits": {}, + "grid_x": 9, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y126": { + "bits": {}, + "grid_x": 9, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y127": { + "bits": {}, + "grid_x": 9, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y128": { + "bits": {}, + "grid_x": 9, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y129": { + "bits": {}, + "grid_x": 9, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y131": { + "bits": {}, + "grid_x": 9, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y132": { + "bits": {}, + "grid_x": 9, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y133": { + "bits": {}, + "grid_x": 9, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y134": { + "bits": {}, + "grid_x": 9, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y135": { + "bits": {}, + "grid_x": 9, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y136": { + "bits": {}, + "grid_x": 9, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y137": { + "bits": {}, + "grid_x": 9, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y138": { + "bits": {}, + "grid_x": 9, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y139": { + "bits": {}, + "grid_x": 9, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y140": { + "bits": {}, + "grid_x": 9, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y141": { + "bits": {}, + "grid_x": 9, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y142": { + "bits": {}, + "grid_x": 9, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y143": { + "bits": {}, + "grid_x": 9, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y144": { + "bits": {}, + "grid_x": 9, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y145": { + "bits": {}, + "grid_x": 9, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y146": { + "bits": {}, + "grid_x": 9, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y147": { + "bits": {}, + "grid_x": 9, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y148": { + "bits": {}, + "grid_x": 9, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y149": { + "bits": {}, + "grid_x": 9, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y150": { + "bits": {}, + "grid_x": 9, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y151": { + "bits": {}, + "grid_x": 9, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y152": { + "bits": {}, + "grid_x": 9, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y153": { + "bits": {}, + "grid_x": 9, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y154": { + "bits": {}, + "grid_x": 9, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X9Y155": { + "bits": {}, + "grid_x": 9, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y1": { + "bits": {}, + "grid_x": 18, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y2": { + "bits": {}, + "grid_x": 18, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y3": { + "bits": {}, + "grid_x": 18, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y4": { + "bits": {}, + "grid_x": 18, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y5": { + "bits": {}, + "grid_x": 18, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y6": { + "bits": {}, + "grid_x": 18, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y7": { + "bits": {}, + "grid_x": 18, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y8": { + "bits": {}, + "grid_x": 18, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y9": { + "bits": {}, + "grid_x": 18, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y10": { + "bits": {}, + "grid_x": 18, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y11": { + "bits": {}, + "grid_x": 18, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y12": { + "bits": {}, + "grid_x": 18, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y13": { + "bits": {}, + "grid_x": 18, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y14": { + "bits": {}, + "grid_x": 18, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y15": { + "bits": {}, + "grid_x": 18, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y16": { + "bits": {}, + "grid_x": 18, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y17": { + "bits": {}, + "grid_x": 18, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y18": { + "bits": {}, + "grid_x": 18, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y19": { + "bits": {}, + "grid_x": 18, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y20": { + "bits": {}, + "grid_x": 18, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y21": { + "bits": {}, + "grid_x": 18, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y22": { + "bits": {}, + "grid_x": 18, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y23": { + "bits": {}, + "grid_x": 18, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y24": { + "bits": {}, + "grid_x": 18, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y25": { + "bits": {}, + "grid_x": 18, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y27": { + "bits": {}, + "grid_x": 18, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y28": { + "bits": {}, + "grid_x": 18, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y29": { + "bits": {}, + "grid_x": 18, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y30": { + "bits": {}, + "grid_x": 18, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y31": { + "bits": {}, + "grid_x": 18, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y32": { + "bits": {}, + "grid_x": 18, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y33": { + "bits": {}, + "grid_x": 18, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y34": { + "bits": {}, + "grid_x": 18, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y35": { + "bits": {}, + "grid_x": 18, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y36": { + "bits": {}, + "grid_x": 18, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y37": { + "bits": {}, + "grid_x": 18, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y38": { + "bits": {}, + "grid_x": 18, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y39": { + "bits": {}, + "grid_x": 18, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y40": { + "bits": {}, + "grid_x": 18, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y41": { + "bits": {}, + "grid_x": 18, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y42": { + "bits": {}, + "grid_x": 18, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y43": { + "bits": {}, + "grid_x": 18, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y44": { + "bits": {}, + "grid_x": 18, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y45": { + "bits": {}, + "grid_x": 18, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y46": { + "bits": {}, + "grid_x": 18, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y47": { + "bits": {}, + "grid_x": 18, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y48": { + "bits": {}, + "grid_x": 18, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y49": { + "bits": {}, + "grid_x": 18, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y50": { + "bits": {}, + "grid_x": 18, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y51": { + "bits": {}, + "grid_x": 18, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y53": { + "bits": {}, + "grid_x": 18, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y54": { + "bits": {}, + "grid_x": 18, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y55": { + "bits": {}, + "grid_x": 18, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y56": { + "bits": {}, + "grid_x": 18, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y57": { + "bits": {}, + "grid_x": 18, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y58": { + "bits": {}, + "grid_x": 18, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y59": { + "bits": {}, + "grid_x": 18, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y60": { + "bits": {}, + "grid_x": 18, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y61": { + "bits": {}, + "grid_x": 18, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y62": { + "bits": {}, + "grid_x": 18, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y63": { + "bits": {}, + "grid_x": 18, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y64": { + "bits": {}, + "grid_x": 18, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y65": { + "bits": {}, + "grid_x": 18, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y66": { + "bits": {}, + "grid_x": 18, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y67": { + "bits": {}, + "grid_x": 18, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y68": { + "bits": {}, + "grid_x": 18, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y69": { + "bits": {}, + "grid_x": 18, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y70": { + "bits": {}, + "grid_x": 18, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y71": { + "bits": {}, + "grid_x": 18, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y72": { + "bits": {}, + "grid_x": 18, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y73": { + "bits": {}, + "grid_x": 18, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y74": { + "bits": {}, + "grid_x": 18, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y75": { + "bits": {}, + "grid_x": 18, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y76": { + "bits": {}, + "grid_x": 18, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y77": { + "bits": {}, + "grid_x": 18, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y79": { + "bits": {}, + "grid_x": 18, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y80": { + "bits": {}, + "grid_x": 18, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y81": { + "bits": {}, + "grid_x": 18, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y82": { + "bits": {}, + "grid_x": 18, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y83": { + "bits": {}, + "grid_x": 18, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y84": { + "bits": {}, + "grid_x": 18, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y85": { + "bits": {}, + "grid_x": 18, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y86": { + "bits": {}, + "grid_x": 18, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y87": { + "bits": {}, + "grid_x": 18, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y88": { + "bits": {}, + "grid_x": 18, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y89": { + "bits": {}, + "grid_x": 18, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y90": { + "bits": {}, + "grid_x": 18, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y91": { + "bits": {}, + "grid_x": 18, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y92": { + "bits": {}, + "grid_x": 18, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y93": { + "bits": {}, + "grid_x": 18, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y94": { + "bits": {}, + "grid_x": 18, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y95": { + "bits": {}, + "grid_x": 18, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y96": { + "bits": {}, + "grid_x": 18, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y97": { + "bits": {}, + "grid_x": 18, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y98": { + "bits": {}, + "grid_x": 18, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y99": { + "bits": {}, + "grid_x": 18, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y100": { + "bits": {}, + "grid_x": 18, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y101": { + "bits": {}, + "grid_x": 18, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y102": { + "bits": {}, + "grid_x": 18, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y103": { + "bits": {}, + "grid_x": 18, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y105": { + "bits": {}, + "grid_x": 18, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y106": { + "bits": {}, + "grid_x": 18, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y107": { + "bits": {}, + "grid_x": 18, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y108": { + "bits": {}, + "grid_x": 18, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y109": { + "bits": {}, + "grid_x": 18, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y110": { + "bits": {}, + "grid_x": 18, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y111": { + "bits": {}, + "grid_x": 18, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y112": { + "bits": {}, + "grid_x": 18, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y113": { + "bits": {}, + "grid_x": 18, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y114": { + "bits": {}, + "grid_x": 18, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y115": { + "bits": {}, + "grid_x": 18, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y116": { + "bits": {}, + "grid_x": 18, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y117": { + "bits": {}, + "grid_x": 18, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y118": { + "bits": {}, + "grid_x": 18, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y119": { + "bits": {}, + "grid_x": 18, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y120": { + "bits": {}, + "grid_x": 18, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y121": { + "bits": {}, + "grid_x": 18, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y122": { + "bits": {}, + "grid_x": 18, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y123": { + "bits": {}, + "grid_x": 18, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y124": { + "bits": {}, + "grid_x": 18, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y125": { + "bits": {}, + "grid_x": 18, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y126": { + "bits": {}, + "grid_x": 18, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y127": { + "bits": {}, + "grid_x": 18, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y128": { + "bits": {}, + "grid_x": 18, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y129": { + "bits": {}, + "grid_x": 18, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y131": { + "bits": {}, + "grid_x": 18, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y132": { + "bits": {}, + "grid_x": 18, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y133": { + "bits": {}, + "grid_x": 18, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y134": { + "bits": {}, + "grid_x": 18, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y135": { + "bits": {}, + "grid_x": 18, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y136": { + "bits": {}, + "grid_x": 18, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y137": { + "bits": {}, + "grid_x": 18, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y138": { + "bits": {}, + "grid_x": 18, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y139": { + "bits": {}, + "grid_x": 18, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y140": { + "bits": {}, + "grid_x": 18, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y141": { + "bits": {}, + "grid_x": 18, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y142": { + "bits": {}, + "grid_x": 18, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y143": { + "bits": {}, + "grid_x": 18, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y144": { + "bits": {}, + "grid_x": 18, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y145": { + "bits": {}, + "grid_x": 18, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y146": { + "bits": {}, + "grid_x": 18, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y147": { + "bits": {}, + "grid_x": 18, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y148": { + "bits": {}, + "grid_x": 18, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y149": { + "bits": {}, + "grid_x": 18, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y150": { + "bits": {}, + "grid_x": 18, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y151": { + "bits": {}, + "grid_x": 18, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y152": { + "bits": {}, + "grid_x": 18, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y153": { + "bits": {}, + "grid_x": 18, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y154": { + "bits": {}, + "grid_x": 18, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X18Y155": { + "bits": {}, + "grid_x": 18, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y1": { + "bits": {}, + "grid_x": 29, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y2": { + "bits": {}, + "grid_x": 29, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y3": { + "bits": {}, + "grid_x": 29, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y4": { + "bits": {}, + "grid_x": 29, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y5": { + "bits": {}, + "grid_x": 29, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y6": { + "bits": {}, + "grid_x": 29, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y7": { + "bits": {}, + "grid_x": 29, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y8": { + "bits": {}, + "grid_x": 29, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y9": { + "bits": {}, + "grid_x": 29, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y10": { + "bits": {}, + "grid_x": 29, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y11": { + "bits": {}, + "grid_x": 29, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y12": { + "bits": {}, + "grid_x": 29, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y13": { + "bits": {}, + "grid_x": 29, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y14": { + "bits": {}, + "grid_x": 29, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y15": { + "bits": {}, + "grid_x": 29, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y16": { + "bits": {}, + "grid_x": 29, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y17": { + "bits": {}, + "grid_x": 29, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y18": { + "bits": {}, + "grid_x": 29, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y19": { + "bits": {}, + "grid_x": 29, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y20": { + "bits": {}, + "grid_x": 29, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y21": { + "bits": {}, + "grid_x": 29, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y22": { + "bits": {}, + "grid_x": 29, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y23": { + "bits": {}, + "grid_x": 29, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y24": { + "bits": {}, + "grid_x": 29, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y25": { + "bits": {}, + "grid_x": 29, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y27": { + "bits": {}, + "grid_x": 29, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y28": { + "bits": {}, + "grid_x": 29, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y29": { + "bits": {}, + "grid_x": 29, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y30": { + "bits": {}, + "grid_x": 29, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y31": { + "bits": {}, + "grid_x": 29, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y32": { + "bits": {}, + "grid_x": 29, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y33": { + "bits": {}, + "grid_x": 29, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y34": { + "bits": {}, + "grid_x": 29, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y35": { + "bits": {}, + "grid_x": 29, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y36": { + "bits": {}, + "grid_x": 29, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y37": { + "bits": {}, + "grid_x": 29, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y38": { + "bits": {}, + "grid_x": 29, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y39": { + "bits": {}, + "grid_x": 29, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y40": { + "bits": {}, + "grid_x": 29, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y41": { + "bits": {}, + "grid_x": 29, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y42": { + "bits": {}, + "grid_x": 29, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y43": { + "bits": {}, + "grid_x": 29, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y44": { + "bits": {}, + "grid_x": 29, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y45": { + "bits": {}, + "grid_x": 29, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y46": { + "bits": {}, + "grid_x": 29, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y47": { + "bits": {}, + "grid_x": 29, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y48": { + "bits": {}, + "grid_x": 29, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y49": { + "bits": {}, + "grid_x": 29, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y50": { + "bits": {}, + "grid_x": 29, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y51": { + "bits": {}, + "grid_x": 29, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y53": { + "bits": {}, + "grid_x": 29, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y54": { + "bits": {}, + "grid_x": 29, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y55": { + "bits": {}, + "grid_x": 29, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y56": { + "bits": {}, + "grid_x": 29, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y57": { + "bits": {}, + "grid_x": 29, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y58": { + "bits": {}, + "grid_x": 29, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y59": { + "bits": {}, + "grid_x": 29, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y60": { + "bits": {}, + "grid_x": 29, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y61": { + "bits": {}, + "grid_x": 29, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y62": { + "bits": {}, + "grid_x": 29, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y63": { + "bits": {}, + "grid_x": 29, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y64": { + "bits": {}, + "grid_x": 29, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y65": { + "bits": {}, + "grid_x": 29, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y66": { + "bits": {}, + "grid_x": 29, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y67": { + "bits": {}, + "grid_x": 29, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y68": { + "bits": {}, + "grid_x": 29, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y69": { + "bits": {}, + "grid_x": 29, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y70": { + "bits": {}, + "grid_x": 29, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y71": { + "bits": {}, + "grid_x": 29, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y72": { + "bits": {}, + "grid_x": 29, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y73": { + "bits": {}, + "grid_x": 29, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y74": { + "bits": {}, + "grid_x": 29, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y75": { + "bits": {}, + "grid_x": 29, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y76": { + "bits": {}, + "grid_x": 29, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y77": { + "bits": {}, + "grid_x": 29, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y79": { + "bits": {}, + "grid_x": 29, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y80": { + "bits": {}, + "grid_x": 29, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y81": { + "bits": {}, + "grid_x": 29, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y82": { + "bits": {}, + "grid_x": 29, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y83": { + "bits": {}, + "grid_x": 29, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y84": { + "bits": {}, + "grid_x": 29, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y85": { + "bits": {}, + "grid_x": 29, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y86": { + "bits": {}, + "grid_x": 29, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y87": { + "bits": {}, + "grid_x": 29, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y88": { + "bits": {}, + "grid_x": 29, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y89": { + "bits": {}, + "grid_x": 29, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y90": { + "bits": {}, + "grid_x": 29, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y91": { + "bits": {}, + "grid_x": 29, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y92": { + "bits": {}, + "grid_x": 29, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y93": { + "bits": {}, + "grid_x": 29, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y94": { + "bits": {}, + "grid_x": 29, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y95": { + "bits": {}, + "grid_x": 29, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y96": { + "bits": {}, + "grid_x": 29, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y97": { + "bits": {}, + "grid_x": 29, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y98": { + "bits": {}, + "grid_x": 29, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y99": { + "bits": {}, + "grid_x": 29, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y100": { + "bits": {}, + "grid_x": 29, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y101": { + "bits": {}, + "grid_x": 29, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y102": { + "bits": {}, + "grid_x": 29, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y103": { + "bits": {}, + "grid_x": 29, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y105": { + "bits": {}, + "grid_x": 29, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y106": { + "bits": {}, + "grid_x": 29, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y107": { + "bits": {}, + "grid_x": 29, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y108": { + "bits": {}, + "grid_x": 29, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y109": { + "bits": {}, + "grid_x": 29, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y110": { + "bits": {}, + "grid_x": 29, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y111": { + "bits": {}, + "grid_x": 29, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y112": { + "bits": {}, + "grid_x": 29, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y113": { + "bits": {}, + "grid_x": 29, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y114": { + "bits": {}, + "grid_x": 29, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y115": { + "bits": {}, + "grid_x": 29, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y116": { + "bits": {}, + "grid_x": 29, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y117": { + "bits": {}, + "grid_x": 29, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y118": { + "bits": {}, + "grid_x": 29, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y119": { + "bits": {}, + "grid_x": 29, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y120": { + "bits": {}, + "grid_x": 29, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y121": { + "bits": {}, + "grid_x": 29, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y122": { + "bits": {}, + "grid_x": 29, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y123": { + "bits": {}, + "grid_x": 29, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y124": { + "bits": {}, + "grid_x": 29, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y125": { + "bits": {}, + "grid_x": 29, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y126": { + "bits": {}, + "grid_x": 29, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y127": { + "bits": {}, + "grid_x": 29, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y128": { + "bits": {}, + "grid_x": 29, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y129": { + "bits": {}, + "grid_x": 29, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y131": { + "bits": {}, + "grid_x": 29, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y132": { + "bits": {}, + "grid_x": 29, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y133": { + "bits": {}, + "grid_x": 29, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y134": { + "bits": {}, + "grid_x": 29, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y135": { + "bits": {}, + "grid_x": 29, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y136": { + "bits": {}, + "grid_x": 29, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y137": { + "bits": {}, + "grid_x": 29, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y138": { + "bits": {}, + "grid_x": 29, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y139": { + "bits": {}, + "grid_x": 29, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y140": { + "bits": {}, + "grid_x": 29, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y141": { + "bits": {}, + "grid_x": 29, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y142": { + "bits": {}, + "grid_x": 29, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y143": { + "bits": {}, + "grid_x": 29, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y144": { + "bits": {}, + "grid_x": 29, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y145": { + "bits": {}, + "grid_x": 29, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y146": { + "bits": {}, + "grid_x": 29, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y147": { + "bits": {}, + "grid_x": 29, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y148": { + "bits": {}, + "grid_x": 29, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y149": { + "bits": {}, + "grid_x": 29, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y150": { + "bits": {}, + "grid_x": 29, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y151": { + "bits": {}, + "grid_x": 29, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y152": { + "bits": {}, + "grid_x": 29, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y153": { + "bits": {}, + "grid_x": 29, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y154": { + "bits": {}, + "grid_x": 29, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X29Y155": { + "bits": {}, + "grid_x": 29, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y1": { + "bits": {}, + "grid_x": 34, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y2": { + "bits": {}, + "grid_x": 34, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y3": { + "bits": {}, + "grid_x": 34, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y4": { + "bits": {}, + "grid_x": 34, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y5": { + "bits": {}, + "grid_x": 34, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y6": { + "bits": {}, + "grid_x": 34, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y7": { + "bits": {}, + "grid_x": 34, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y8": { + "bits": {}, + "grid_x": 34, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y9": { + "bits": {}, + "grid_x": 34, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y10": { + "bits": {}, + "grid_x": 34, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y11": { + "bits": {}, + "grid_x": 34, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y12": { + "bits": {}, + "grid_x": 34, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y13": { + "bits": {}, + "grid_x": 34, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y14": { + "bits": {}, + "grid_x": 34, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y15": { + "bits": {}, + "grid_x": 34, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y16": { + "bits": {}, + "grid_x": 34, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y17": { + "bits": {}, + "grid_x": 34, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y18": { + "bits": {}, + "grid_x": 34, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y19": { + "bits": {}, + "grid_x": 34, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y20": { + "bits": {}, + "grid_x": 34, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y21": { + "bits": {}, + "grid_x": 34, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y22": { + "bits": {}, + "grid_x": 34, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y23": { + "bits": {}, + "grid_x": 34, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y24": { + "bits": {}, + "grid_x": 34, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y25": { + "bits": {}, + "grid_x": 34, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y27": { + "bits": {}, + "grid_x": 34, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y28": { + "bits": {}, + "grid_x": 34, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y29": { + "bits": {}, + "grid_x": 34, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y30": { + "bits": {}, + "grid_x": 34, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y31": { + "bits": {}, + "grid_x": 34, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y32": { + "bits": {}, + "grid_x": 34, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y33": { + "bits": {}, + "grid_x": 34, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y34": { + "bits": {}, + "grid_x": 34, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y35": { + "bits": {}, + "grid_x": 34, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y36": { + "bits": {}, + "grid_x": 34, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y37": { + "bits": {}, + "grid_x": 34, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y38": { + "bits": {}, + "grid_x": 34, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y39": { + "bits": {}, + "grid_x": 34, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y40": { + "bits": {}, + "grid_x": 34, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y41": { + "bits": {}, + "grid_x": 34, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y42": { + "bits": {}, + "grid_x": 34, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y43": { + "bits": {}, + "grid_x": 34, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y44": { + "bits": {}, + "grid_x": 34, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y45": { + "bits": {}, + "grid_x": 34, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y46": { + "bits": {}, + "grid_x": 34, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y47": { + "bits": {}, + "grid_x": 34, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y48": { + "bits": {}, + "grid_x": 34, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y49": { + "bits": {}, + "grid_x": 34, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y50": { + "bits": {}, + "grid_x": 34, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y51": { + "bits": {}, + "grid_x": 34, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y53": { + "bits": {}, + "grid_x": 34, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y54": { + "bits": {}, + "grid_x": 34, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y55": { + "bits": {}, + "grid_x": 34, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y56": { + "bits": {}, + "grid_x": 34, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y57": { + "bits": {}, + "grid_x": 34, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y58": { + "bits": {}, + "grid_x": 34, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y59": { + "bits": {}, + "grid_x": 34, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y60": { + "bits": {}, + "grid_x": 34, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y61": { + "bits": {}, + "grid_x": 34, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y62": { + "bits": {}, + "grid_x": 34, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y63": { + "bits": {}, + "grid_x": 34, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y64": { + "bits": {}, + "grid_x": 34, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y65": { + "bits": {}, + "grid_x": 34, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y66": { + "bits": {}, + "grid_x": 34, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y67": { + "bits": {}, + "grid_x": 34, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y68": { + "bits": {}, + "grid_x": 34, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y69": { + "bits": {}, + "grid_x": 34, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y70": { + "bits": {}, + "grid_x": 34, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y71": { + "bits": {}, + "grid_x": 34, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y72": { + "bits": {}, + "grid_x": 34, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y73": { + "bits": {}, + "grid_x": 34, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y74": { + "bits": {}, + "grid_x": 34, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y75": { + "bits": {}, + "grid_x": 34, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y76": { + "bits": {}, + "grid_x": 34, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y77": { + "bits": {}, + "grid_x": 34, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y79": { + "bits": {}, + "grid_x": 34, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y80": { + "bits": {}, + "grid_x": 34, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y81": { + "bits": {}, + "grid_x": 34, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y82": { + "bits": {}, + "grid_x": 34, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y83": { + "bits": {}, + "grid_x": 34, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y84": { + "bits": {}, + "grid_x": 34, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y85": { + "bits": {}, + "grid_x": 34, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y86": { + "bits": {}, + "grid_x": 34, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y87": { + "bits": {}, + "grid_x": 34, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y88": { + "bits": {}, + "grid_x": 34, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y89": { + "bits": {}, + "grid_x": 34, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y90": { + "bits": {}, + "grid_x": 34, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y91": { + "bits": {}, + "grid_x": 34, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y92": { + "bits": {}, + "grid_x": 34, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y93": { + "bits": {}, + "grid_x": 34, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y94": { + "bits": {}, + "grid_x": 34, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y95": { + "bits": {}, + "grid_x": 34, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y96": { + "bits": {}, + "grid_x": 34, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y97": { + "bits": {}, + "grid_x": 34, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y98": { + "bits": {}, + "grid_x": 34, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y99": { + "bits": {}, + "grid_x": 34, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y100": { + "bits": {}, + "grid_x": 34, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y101": { + "bits": {}, + "grid_x": 34, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y102": { + "bits": {}, + "grid_x": 34, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y103": { + "bits": {}, + "grid_x": 34, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y105": { + "bits": {}, + "grid_x": 34, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y106": { + "bits": {}, + "grid_x": 34, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y107": { + "bits": {}, + "grid_x": 34, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y108": { + "bits": {}, + "grid_x": 34, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y109": { + "bits": {}, + "grid_x": 34, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y110": { + "bits": {}, + "grid_x": 34, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y111": { + "bits": {}, + "grid_x": 34, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y112": { + "bits": {}, + "grid_x": 34, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y113": { + "bits": {}, + "grid_x": 34, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y114": { + "bits": {}, + "grid_x": 34, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y115": { + "bits": {}, + "grid_x": 34, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y116": { + "bits": {}, + "grid_x": 34, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y117": { + "bits": {}, + "grid_x": 34, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y118": { + "bits": {}, + "grid_x": 34, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y119": { + "bits": {}, + "grid_x": 34, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y120": { + "bits": {}, + "grid_x": 34, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y121": { + "bits": {}, + "grid_x": 34, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y122": { + "bits": {}, + "grid_x": 34, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y123": { + "bits": {}, + "grid_x": 34, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y124": { + "bits": {}, + "grid_x": 34, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y125": { + "bits": {}, + "grid_x": 34, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y126": { + "bits": {}, + "grid_x": 34, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y127": { + "bits": {}, + "grid_x": 34, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y128": { + "bits": {}, + "grid_x": 34, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y129": { + "bits": {}, + "grid_x": 34, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y131": { + "bits": {}, + "grid_x": 34, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y132": { + "bits": {}, + "grid_x": 34, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y133": { + "bits": {}, + "grid_x": 34, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y134": { + "bits": {}, + "grid_x": 34, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y135": { + "bits": {}, + "grid_x": 34, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y136": { + "bits": {}, + "grid_x": 34, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y137": { + "bits": {}, + "grid_x": 34, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y138": { + "bits": {}, + "grid_x": 34, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y139": { + "bits": {}, + "grid_x": 34, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y140": { + "bits": {}, + "grid_x": 34, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y141": { + "bits": {}, + "grid_x": 34, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y142": { + "bits": {}, + "grid_x": 34, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y143": { + "bits": {}, + "grid_x": 34, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y144": { + "bits": {}, + "grid_x": 34, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y145": { + "bits": {}, + "grid_x": 34, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y146": { + "bits": {}, + "grid_x": 34, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y147": { + "bits": {}, + "grid_x": 34, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y148": { + "bits": {}, + "grid_x": 34, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y149": { + "bits": {}, + "grid_x": 34, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y150": { + "bits": {}, + "grid_x": 34, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y151": { + "bits": {}, + "grid_x": 34, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y152": { + "bits": {}, + "grid_x": 34, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y153": { + "bits": {}, + "grid_x": 34, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y154": { + "bits": {}, + "grid_x": 34, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X34Y155": { + "bits": {}, + "grid_x": 34, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y1": { + "bits": {}, + "grid_x": 61, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y2": { + "bits": {}, + "grid_x": 61, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y3": { + "bits": {}, + "grid_x": 61, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y4": { + "bits": {}, + "grid_x": 61, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y5": { + "bits": {}, + "grid_x": 61, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y6": { + "bits": {}, + "grid_x": 61, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y7": { + "bits": {}, + "grid_x": 61, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y8": { + "bits": {}, + "grid_x": 61, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y9": { + "bits": {}, + "grid_x": 61, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y10": { + "bits": {}, + "grid_x": 61, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y11": { + "bits": {}, + "grid_x": 61, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y12": { + "bits": {}, + "grid_x": 61, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y13": { + "bits": {}, + "grid_x": 61, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y14": { + "bits": {}, + "grid_x": 61, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y15": { + "bits": {}, + "grid_x": 61, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y16": { + "bits": {}, + "grid_x": 61, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y17": { + "bits": {}, + "grid_x": 61, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y18": { + "bits": {}, + "grid_x": 61, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y19": { + "bits": {}, + "grid_x": 61, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y20": { + "bits": {}, + "grid_x": 61, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y21": { + "bits": {}, + "grid_x": 61, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y22": { + "bits": {}, + "grid_x": 61, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y23": { + "bits": {}, + "grid_x": 61, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y24": { + "bits": {}, + "grid_x": 61, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y25": { + "bits": {}, + "grid_x": 61, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y27": { + "bits": {}, + "grid_x": 61, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y28": { + "bits": {}, + "grid_x": 61, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y29": { + "bits": {}, + "grid_x": 61, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y30": { + "bits": {}, + "grid_x": 61, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y31": { + "bits": {}, + "grid_x": 61, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y32": { + "bits": {}, + "grid_x": 61, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y33": { + "bits": {}, + "grid_x": 61, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y34": { + "bits": {}, + "grid_x": 61, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y35": { + "bits": {}, + "grid_x": 61, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y36": { + "bits": {}, + "grid_x": 61, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y37": { + "bits": {}, + "grid_x": 61, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y38": { + "bits": {}, + "grid_x": 61, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y39": { + "bits": {}, + "grid_x": 61, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y40": { + "bits": {}, + "grid_x": 61, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y41": { + "bits": {}, + "grid_x": 61, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y42": { + "bits": {}, + "grid_x": 61, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y43": { + "bits": {}, + "grid_x": 61, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y44": { + "bits": {}, + "grid_x": 61, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y45": { + "bits": {}, + "grid_x": 61, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y46": { + "bits": {}, + "grid_x": 61, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y47": { + "bits": {}, + "grid_x": 61, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y48": { + "bits": {}, + "grid_x": 61, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y49": { + "bits": {}, + "grid_x": 61, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y50": { + "bits": {}, + "grid_x": 61, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y51": { + "bits": {}, + "grid_x": 61, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y53": { + "bits": {}, + "grid_x": 61, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y54": { + "bits": {}, + "grid_x": 61, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y55": { + "bits": {}, + "grid_x": 61, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y56": { + "bits": {}, + "grid_x": 61, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y57": { + "bits": {}, + "grid_x": 61, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y58": { + "bits": {}, + "grid_x": 61, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y59": { + "bits": {}, + "grid_x": 61, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y60": { + "bits": {}, + "grid_x": 61, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y61": { + "bits": {}, + "grid_x": 61, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y62": { + "bits": {}, + "grid_x": 61, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y63": { + "bits": {}, + "grid_x": 61, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y64": { + "bits": {}, + "grid_x": 61, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y65": { + "bits": {}, + "grid_x": 61, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y66": { + "bits": {}, + "grid_x": 61, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y67": { + "bits": {}, + "grid_x": 61, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y68": { + "bits": {}, + "grid_x": 61, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y69": { + "bits": {}, + "grid_x": 61, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y70": { + "bits": {}, + "grid_x": 61, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y71": { + "bits": {}, + "grid_x": 61, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y72": { + "bits": {}, + "grid_x": 61, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y73": { + "bits": {}, + "grid_x": 61, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y74": { + "bits": {}, + "grid_x": 61, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y75": { + "bits": {}, + "grid_x": 61, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y76": { + "bits": {}, + "grid_x": 61, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y77": { + "bits": {}, + "grid_x": 61, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y79": { + "bits": {}, + "grid_x": 61, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y80": { + "bits": {}, + "grid_x": 61, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y81": { + "bits": {}, + "grid_x": 61, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y82": { + "bits": {}, + "grid_x": 61, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y83": { + "bits": {}, + "grid_x": 61, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y84": { + "bits": {}, + "grid_x": 61, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y85": { + "bits": {}, + "grid_x": 61, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y86": { + "bits": {}, + "grid_x": 61, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y87": { + "bits": {}, + "grid_x": 61, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y88": { + "bits": {}, + "grid_x": 61, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y89": { + "bits": {}, + "grid_x": 61, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y90": { + "bits": {}, + "grid_x": 61, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y91": { + "bits": {}, + "grid_x": 61, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y92": { + "bits": {}, + "grid_x": 61, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y93": { + "bits": {}, + "grid_x": 61, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y94": { + "bits": {}, + "grid_x": 61, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y95": { + "bits": {}, + "grid_x": 61, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y96": { + "bits": {}, + "grid_x": 61, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y97": { + "bits": {}, + "grid_x": 61, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y98": { + "bits": {}, + "grid_x": 61, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y99": { + "bits": {}, + "grid_x": 61, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y100": { + "bits": {}, + "grid_x": 61, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y101": { + "bits": {}, + "grid_x": 61, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y102": { + "bits": {}, + "grid_x": 61, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y103": { + "bits": {}, + "grid_x": 61, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y105": { + "bits": {}, + "grid_x": 61, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y106": { + "bits": {}, + "grid_x": 61, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y107": { + "bits": {}, + "grid_x": 61, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y108": { + "bits": {}, + "grid_x": 61, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y109": { + "bits": {}, + "grid_x": 61, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y110": { + "bits": {}, + "grid_x": 61, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y111": { + "bits": {}, + "grid_x": 61, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y112": { + "bits": {}, + "grid_x": 61, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y113": { + "bits": {}, + "grid_x": 61, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y114": { + "bits": {}, + "grid_x": 61, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y115": { + "bits": {}, + "grid_x": 61, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y116": { + "bits": {}, + "grid_x": 61, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y117": { + "bits": {}, + "grid_x": 61, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y118": { + "bits": {}, + "grid_x": 61, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y119": { + "bits": {}, + "grid_x": 61, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y120": { + "bits": {}, + "grid_x": 61, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y121": { + "bits": {}, + "grid_x": 61, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y122": { + "bits": {}, + "grid_x": 61, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y123": { + "bits": {}, + "grid_x": 61, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y124": { + "bits": {}, + "grid_x": 61, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y125": { + "bits": {}, + "grid_x": 61, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y126": { + "bits": {}, + "grid_x": 61, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y127": { + "bits": {}, + "grid_x": 61, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y128": { + "bits": {}, + "grid_x": 61, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y129": { + "bits": {}, + "grid_x": 61, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y131": { + "bits": {}, + "grid_x": 61, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y132": { + "bits": {}, + "grid_x": 61, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y133": { + "bits": {}, + "grid_x": 61, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y134": { + "bits": {}, + "grid_x": 61, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y135": { + "bits": {}, + "grid_x": 61, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y136": { + "bits": {}, + "grid_x": 61, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y137": { + "bits": {}, + "grid_x": 61, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y138": { + "bits": {}, + "grid_x": 61, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y139": { + "bits": {}, + "grid_x": 61, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y140": { + "bits": {}, + "grid_x": 61, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y141": { + "bits": {}, + "grid_x": 61, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y142": { + "bits": {}, + "grid_x": 61, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y143": { + "bits": {}, + "grid_x": 61, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y144": { + "bits": {}, + "grid_x": 61, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y145": { + "bits": {}, + "grid_x": 61, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y146": { + "bits": {}, + "grid_x": 61, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y147": { + "bits": {}, + "grid_x": 61, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y148": { + "bits": {}, + "grid_x": 61, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y149": { + "bits": {}, + "grid_x": 61, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y150": { + "bits": {}, + "grid_x": 61, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y151": { + "bits": {}, + "grid_x": 61, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y152": { + "bits": {}, + "grid_x": 61, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y153": { + "bits": {}, + "grid_x": 61, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y154": { + "bits": {}, + "grid_x": 61, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X61Y155": { + "bits": {}, + "grid_x": 61, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y1": { + "bits": {}, + "grid_x": 66, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y2": { + "bits": {}, + "grid_x": 66, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y3": { + "bits": {}, + "grid_x": 66, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y4": { + "bits": {}, + "grid_x": 66, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y5": { + "bits": {}, + "grid_x": 66, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y6": { + "bits": {}, + "grid_x": 66, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y7": { + "bits": {}, + "grid_x": 66, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y8": { + "bits": {}, + "grid_x": 66, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y9": { + "bits": {}, + "grid_x": 66, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y10": { + "bits": {}, + "grid_x": 66, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y11": { + "bits": {}, + "grid_x": 66, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y12": { + "bits": {}, + "grid_x": 66, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y13": { + "bits": {}, + "grid_x": 66, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y14": { + "bits": {}, + "grid_x": 66, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y15": { + "bits": {}, + "grid_x": 66, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y16": { + "bits": {}, + "grid_x": 66, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y17": { + "bits": {}, + "grid_x": 66, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y18": { + "bits": {}, + "grid_x": 66, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y19": { + "bits": {}, + "grid_x": 66, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y20": { + "bits": {}, + "grid_x": 66, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y21": { + "bits": {}, + "grid_x": 66, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y22": { + "bits": {}, + "grid_x": 66, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y23": { + "bits": {}, + "grid_x": 66, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y24": { + "bits": {}, + "grid_x": 66, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y25": { + "bits": {}, + "grid_x": 66, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y27": { + "bits": {}, + "grid_x": 66, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y28": { + "bits": {}, + "grid_x": 66, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y29": { + "bits": {}, + "grid_x": 66, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y30": { + "bits": {}, + "grid_x": 66, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y31": { + "bits": {}, + "grid_x": 66, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y32": { + "bits": {}, + "grid_x": 66, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y33": { + "bits": {}, + "grid_x": 66, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y34": { + "bits": {}, + "grid_x": 66, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y35": { + "bits": {}, + "grid_x": 66, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y36": { + "bits": {}, + "grid_x": 66, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y37": { + "bits": {}, + "grid_x": 66, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y38": { + "bits": {}, + "grid_x": 66, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y39": { + "bits": {}, + "grid_x": 66, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y40": { + "bits": {}, + "grid_x": 66, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y41": { + "bits": {}, + "grid_x": 66, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y42": { + "bits": {}, + "grid_x": 66, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y43": { + "bits": {}, + "grid_x": 66, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y44": { + "bits": {}, + "grid_x": 66, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y45": { + "bits": {}, + "grid_x": 66, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y46": { + "bits": {}, + "grid_x": 66, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y47": { + "bits": {}, + "grid_x": 66, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y48": { + "bits": {}, + "grid_x": 66, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y49": { + "bits": {}, + "grid_x": 66, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y50": { + "bits": {}, + "grid_x": 66, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y51": { + "bits": {}, + "grid_x": 66, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y53": { + "bits": {}, + "grid_x": 66, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y54": { + "bits": {}, + "grid_x": 66, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y55": { + "bits": {}, + "grid_x": 66, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y56": { + "bits": {}, + "grid_x": 66, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y57": { + "bits": {}, + "grid_x": 66, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y58": { + "bits": {}, + "grid_x": 66, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y59": { + "bits": {}, + "grid_x": 66, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y60": { + "bits": {}, + "grid_x": 66, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y61": { + "bits": {}, + "grid_x": 66, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y62": { + "bits": {}, + "grid_x": 66, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y63": { + "bits": {}, + "grid_x": 66, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y64": { + "bits": {}, + "grid_x": 66, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y65": { + "bits": {}, + "grid_x": 66, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y66": { + "bits": {}, + "grid_x": 66, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y67": { + "bits": {}, + "grid_x": 66, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y68": { + "bits": {}, + "grid_x": 66, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y69": { + "bits": {}, + "grid_x": 66, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y70": { + "bits": {}, + "grid_x": 66, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y71": { + "bits": {}, + "grid_x": 66, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y72": { + "bits": {}, + "grid_x": 66, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y73": { + "bits": {}, + "grid_x": 66, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y74": { + "bits": {}, + "grid_x": 66, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y75": { + "bits": {}, + "grid_x": 66, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y76": { + "bits": {}, + "grid_x": 66, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y77": { + "bits": {}, + "grid_x": 66, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y79": { + "bits": {}, + "grid_x": 66, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y80": { + "bits": {}, + "grid_x": 66, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y81": { + "bits": {}, + "grid_x": 66, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y82": { + "bits": {}, + "grid_x": 66, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y83": { + "bits": {}, + "grid_x": 66, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y84": { + "bits": {}, + "grid_x": 66, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y85": { + "bits": {}, + "grid_x": 66, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y86": { + "bits": {}, + "grid_x": 66, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y87": { + "bits": {}, + "grid_x": 66, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y88": { + "bits": {}, + "grid_x": 66, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y89": { + "bits": {}, + "grid_x": 66, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y90": { + "bits": {}, + "grid_x": 66, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y91": { + "bits": {}, + "grid_x": 66, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y92": { + "bits": {}, + "grid_x": 66, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y93": { + "bits": {}, + "grid_x": 66, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y94": { + "bits": {}, + "grid_x": 66, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y95": { + "bits": {}, + "grid_x": 66, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y96": { + "bits": {}, + "grid_x": 66, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y97": { + "bits": {}, + "grid_x": 66, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y98": { + "bits": {}, + "grid_x": 66, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y99": { + "bits": {}, + "grid_x": 66, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y100": { + "bits": {}, + "grid_x": 66, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y101": { + "bits": {}, + "grid_x": 66, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y102": { + "bits": {}, + "grid_x": 66, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y103": { + "bits": {}, + "grid_x": 66, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y105": { + "bits": {}, + "grid_x": 66, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y106": { + "bits": {}, + "grid_x": 66, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y107": { + "bits": {}, + "grid_x": 66, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y108": { + "bits": {}, + "grid_x": 66, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y109": { + "bits": {}, + "grid_x": 66, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y110": { + "bits": {}, + "grid_x": 66, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y111": { + "bits": {}, + "grid_x": 66, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y112": { + "bits": {}, + "grid_x": 66, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y113": { + "bits": {}, + "grid_x": 66, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y114": { + "bits": {}, + "grid_x": 66, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y115": { + "bits": {}, + "grid_x": 66, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y116": { + "bits": {}, + "grid_x": 66, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y117": { + "bits": {}, + "grid_x": 66, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y118": { + "bits": {}, + "grid_x": 66, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y119": { + "bits": {}, + "grid_x": 66, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y120": { + "bits": {}, + "grid_x": 66, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y121": { + "bits": {}, + "grid_x": 66, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y122": { + "bits": {}, + "grid_x": 66, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y123": { + "bits": {}, + "grid_x": 66, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y124": { + "bits": {}, + "grid_x": 66, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y125": { + "bits": {}, + "grid_x": 66, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y126": { + "bits": {}, + "grid_x": 66, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y127": { + "bits": {}, + "grid_x": 66, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y128": { + "bits": {}, + "grid_x": 66, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y129": { + "bits": {}, + "grid_x": 66, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y131": { + "bits": {}, + "grid_x": 66, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y132": { + "bits": {}, + "grid_x": 66, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y133": { + "bits": {}, + "grid_x": 66, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y134": { + "bits": {}, + "grid_x": 66, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y135": { + "bits": {}, + "grid_x": 66, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y136": { + "bits": {}, + "grid_x": 66, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y137": { + "bits": {}, + "grid_x": 66, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y138": { + "bits": {}, + "grid_x": 66, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y139": { + "bits": {}, + "grid_x": 66, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y140": { + "bits": {}, + "grid_x": 66, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y141": { + "bits": {}, + "grid_x": 66, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y142": { + "bits": {}, + "grid_x": 66, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y143": { + "bits": {}, + "grid_x": 66, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y144": { + "bits": {}, + "grid_x": 66, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y145": { + "bits": {}, + "grid_x": 66, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y146": { + "bits": {}, + "grid_x": 66, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y147": { + "bits": {}, + "grid_x": 66, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y148": { + "bits": {}, + "grid_x": 66, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y149": { + "bits": {}, + "grid_x": 66, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y150": { + "bits": {}, + "grid_x": 66, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y151": { + "bits": {}, + "grid_x": 66, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y152": { + "bits": {}, + "grid_x": 66, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y153": { + "bits": {}, + "grid_x": 66, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y154": { + "bits": {}, + "grid_x": 66, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X66Y155": { + "bits": {}, + "grid_x": 66, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y1": { + "bits": {}, + "grid_x": 80, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y2": { + "bits": {}, + "grid_x": 80, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y3": { + "bits": {}, + "grid_x": 80, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y4": { + "bits": {}, + "grid_x": 80, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y5": { + "bits": {}, + "grid_x": 80, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y6": { + "bits": {}, + "grid_x": 80, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y7": { + "bits": {}, + "grid_x": 80, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y8": { + "bits": {}, + "grid_x": 80, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y9": { + "bits": {}, + "grid_x": 80, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y10": { + "bits": {}, + "grid_x": 80, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y11": { + "bits": {}, + "grid_x": 80, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y12": { + "bits": {}, + "grid_x": 80, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y13": { + "bits": {}, + "grid_x": 80, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y14": { + "bits": {}, + "grid_x": 80, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y15": { + "bits": {}, + "grid_x": 80, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y16": { + "bits": {}, + "grid_x": 80, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y17": { + "bits": {}, + "grid_x": 80, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y18": { + "bits": {}, + "grid_x": 80, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y19": { + "bits": {}, + "grid_x": 80, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y20": { + "bits": {}, + "grid_x": 80, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y21": { + "bits": {}, + "grid_x": 80, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y22": { + "bits": {}, + "grid_x": 80, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y23": { + "bits": {}, + "grid_x": 80, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y24": { + "bits": {}, + "grid_x": 80, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y25": { + "bits": {}, + "grid_x": 80, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y27": { + "bits": {}, + "grid_x": 80, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y28": { + "bits": {}, + "grid_x": 80, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y29": { + "bits": {}, + "grid_x": 80, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y30": { + "bits": {}, + "grid_x": 80, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y31": { + "bits": {}, + "grid_x": 80, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y32": { + "bits": {}, + "grid_x": 80, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y33": { + "bits": {}, + "grid_x": 80, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y34": { + "bits": {}, + "grid_x": 80, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y35": { + "bits": {}, + "grid_x": 80, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y36": { + "bits": {}, + "grid_x": 80, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y37": { + "bits": {}, + "grid_x": 80, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y38": { + "bits": {}, + "grid_x": 80, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y39": { + "bits": {}, + "grid_x": 80, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y40": { + "bits": {}, + "grid_x": 80, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y41": { + "bits": {}, + "grid_x": 80, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y42": { + "bits": {}, + "grid_x": 80, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y43": { + "bits": {}, + "grid_x": 80, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y44": { + "bits": {}, + "grid_x": 80, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y45": { + "bits": {}, + "grid_x": 80, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y46": { + "bits": {}, + "grid_x": 80, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y47": { + "bits": {}, + "grid_x": 80, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y48": { + "bits": {}, + "grid_x": 80, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y49": { + "bits": {}, + "grid_x": 80, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y50": { + "bits": {}, + "grid_x": 80, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y51": { + "bits": {}, + "grid_x": 80, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y53": { + "bits": {}, + "grid_x": 80, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y54": { + "bits": {}, + "grid_x": 80, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y55": { + "bits": {}, + "grid_x": 80, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y56": { + "bits": {}, + "grid_x": 80, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y57": { + "bits": {}, + "grid_x": 80, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y58": { + "bits": {}, + "grid_x": 80, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y59": { + "bits": {}, + "grid_x": 80, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y60": { + "bits": {}, + "grid_x": 80, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y61": { + "bits": {}, + "grid_x": 80, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y62": { + "bits": {}, + "grid_x": 80, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y63": { + "bits": {}, + "grid_x": 80, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y64": { + "bits": {}, + "grid_x": 80, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y65": { + "bits": {}, + "grid_x": 80, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y66": { + "bits": {}, + "grid_x": 80, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y67": { + "bits": {}, + "grid_x": 80, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y68": { + "bits": {}, + "grid_x": 80, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y69": { + "bits": {}, + "grid_x": 80, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y70": { + "bits": {}, + "grid_x": 80, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y71": { + "bits": {}, + "grid_x": 80, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y72": { + "bits": {}, + "grid_x": 80, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y73": { + "bits": {}, + "grid_x": 80, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y74": { + "bits": {}, + "grid_x": 80, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y75": { + "bits": {}, + "grid_x": 80, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y76": { + "bits": {}, + "grid_x": 80, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y77": { + "bits": {}, + "grid_x": 80, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y79": { + "bits": {}, + "grid_x": 80, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y80": { + "bits": {}, + "grid_x": 80, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y81": { + "bits": {}, + "grid_x": 80, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y82": { + "bits": {}, + "grid_x": 80, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y83": { + "bits": {}, + "grid_x": 80, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y84": { + "bits": {}, + "grid_x": 80, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y85": { + "bits": {}, + "grid_x": 80, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y86": { + "bits": {}, + "grid_x": 80, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y87": { + "bits": {}, + "grid_x": 80, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y88": { + "bits": {}, + "grid_x": 80, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y89": { + "bits": {}, + "grid_x": 80, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y90": { + "bits": {}, + "grid_x": 80, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y91": { + "bits": {}, + "grid_x": 80, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y92": { + "bits": {}, + "grid_x": 80, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y93": { + "bits": {}, + "grid_x": 80, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y94": { + "bits": {}, + "grid_x": 80, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y95": { + "bits": {}, + "grid_x": 80, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y96": { + "bits": {}, + "grid_x": 80, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y97": { + "bits": {}, + "grid_x": 80, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y98": { + "bits": {}, + "grid_x": 80, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y99": { + "bits": {}, + "grid_x": 80, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y100": { + "bits": {}, + "grid_x": 80, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y101": { + "bits": {}, + "grid_x": 80, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y102": { + "bits": {}, + "grid_x": 80, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y103": { + "bits": {}, + "grid_x": 80, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y105": { + "bits": {}, + "grid_x": 80, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y106": { + "bits": {}, + "grid_x": 80, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y107": { + "bits": {}, + "grid_x": 80, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y108": { + "bits": {}, + "grid_x": 80, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y109": { + "bits": {}, + "grid_x": 80, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y110": { + "bits": {}, + "grid_x": 80, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y111": { + "bits": {}, + "grid_x": 80, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y112": { + "bits": {}, + "grid_x": 80, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y113": { + "bits": {}, + "grid_x": 80, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y114": { + "bits": {}, + "grid_x": 80, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y115": { + "bits": {}, + "grid_x": 80, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y116": { + "bits": {}, + "grid_x": 80, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y117": { + "bits": {}, + "grid_x": 80, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y118": { + "bits": {}, + "grid_x": 80, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y119": { + "bits": {}, + "grid_x": 80, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y120": { + "bits": {}, + "grid_x": 80, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y121": { + "bits": {}, + "grid_x": 80, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y122": { + "bits": {}, + "grid_x": 80, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y123": { + "bits": {}, + "grid_x": 80, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y124": { + "bits": {}, + "grid_x": 80, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y125": { + "bits": {}, + "grid_x": 80, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y126": { + "bits": {}, + "grid_x": 80, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y127": { + "bits": {}, + "grid_x": 80, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y128": { + "bits": {}, + "grid_x": 80, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y129": { + "bits": {}, + "grid_x": 80, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y131": { + "bits": {}, + "grid_x": 80, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y132": { + "bits": {}, + "grid_x": 80, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y133": { + "bits": {}, + "grid_x": 80, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y134": { + "bits": {}, + "grid_x": 80, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y135": { + "bits": {}, + "grid_x": 80, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y136": { + "bits": {}, + "grid_x": 80, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y137": { + "bits": {}, + "grid_x": 80, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y138": { + "bits": {}, + "grid_x": 80, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y139": { + "bits": {}, + "grid_x": 80, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y140": { + "bits": {}, + "grid_x": 80, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y141": { + "bits": {}, + "grid_x": 80, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y142": { + "bits": {}, + "grid_x": 80, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y143": { + "bits": {}, + "grid_x": 80, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y144": { + "bits": {}, + "grid_x": 80, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y145": { + "bits": {}, + "grid_x": 80, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y146": { + "bits": {}, + "grid_x": 80, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y147": { + "bits": {}, + "grid_x": 80, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y148": { + "bits": {}, + "grid_x": 80, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y149": { + "bits": {}, + "grid_x": 80, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y150": { + "bits": {}, + "grid_x": 80, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y151": { + "bits": {}, + "grid_x": 80, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y152": { + "bits": {}, + "grid_x": 80, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y153": { + "bits": {}, + "grid_x": 80, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y154": { + "bits": {}, + "grid_x": 80, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X80Y155": { + "bits": {}, + "grid_x": 80, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y1": { + "bits": {}, + "grid_x": 85, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y2": { + "bits": {}, + "grid_x": 85, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y3": { + "bits": {}, + "grid_x": 85, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y4": { + "bits": {}, + "grid_x": 85, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y5": { + "bits": {}, + "grid_x": 85, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y6": { + "bits": {}, + "grid_x": 85, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y7": { + "bits": {}, + "grid_x": 85, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y8": { + "bits": {}, + "grid_x": 85, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y9": { + "bits": {}, + "grid_x": 85, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y10": { + "bits": {}, + "grid_x": 85, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y11": { + "bits": {}, + "grid_x": 85, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y12": { + "bits": {}, + "grid_x": 85, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y13": { + "bits": {}, + "grid_x": 85, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y14": { + "bits": {}, + "grid_x": 85, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y15": { + "bits": {}, + "grid_x": 85, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y16": { + "bits": {}, + "grid_x": 85, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y17": { + "bits": {}, + "grid_x": 85, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y18": { + "bits": {}, + "grid_x": 85, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y19": { + "bits": {}, + "grid_x": 85, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y20": { + "bits": {}, + "grid_x": 85, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y21": { + "bits": {}, + "grid_x": 85, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y22": { + "bits": {}, + "grid_x": 85, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y23": { + "bits": {}, + "grid_x": 85, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y24": { + "bits": {}, + "grid_x": 85, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y25": { + "bits": {}, + "grid_x": 85, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y27": { + "bits": {}, + "grid_x": 85, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y28": { + "bits": {}, + "grid_x": 85, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y29": { + "bits": {}, + "grid_x": 85, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y30": { + "bits": {}, + "grid_x": 85, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y31": { + "bits": {}, + "grid_x": 85, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y32": { + "bits": {}, + "grid_x": 85, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y33": { + "bits": {}, + "grid_x": 85, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y34": { + "bits": {}, + "grid_x": 85, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y35": { + "bits": {}, + "grid_x": 85, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y36": { + "bits": {}, + "grid_x": 85, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y37": { + "bits": {}, + "grid_x": 85, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y38": { + "bits": {}, + "grid_x": 85, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y39": { + "bits": {}, + "grid_x": 85, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y40": { + "bits": {}, + "grid_x": 85, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y41": { + "bits": {}, + "grid_x": 85, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y42": { + "bits": {}, + "grid_x": 85, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y43": { + "bits": {}, + "grid_x": 85, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y44": { + "bits": {}, + "grid_x": 85, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y45": { + "bits": {}, + "grid_x": 85, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y46": { + "bits": {}, + "grid_x": 85, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y47": { + "bits": {}, + "grid_x": 85, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y48": { + "bits": {}, + "grid_x": 85, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y49": { + "bits": {}, + "grid_x": 85, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y50": { + "bits": {}, + "grid_x": 85, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y51": { + "bits": {}, + "grid_x": 85, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y53": { + "bits": {}, + "grid_x": 85, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y54": { + "bits": {}, + "grid_x": 85, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y55": { + "bits": {}, + "grid_x": 85, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y56": { + "bits": {}, + "grid_x": 85, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y57": { + "bits": {}, + "grid_x": 85, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y58": { + "bits": {}, + "grid_x": 85, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y59": { + "bits": {}, + "grid_x": 85, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y60": { + "bits": {}, + "grid_x": 85, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y61": { + "bits": {}, + "grid_x": 85, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y62": { + "bits": {}, + "grid_x": 85, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y63": { + "bits": {}, + "grid_x": 85, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y64": { + "bits": {}, + "grid_x": 85, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y65": { + "bits": {}, + "grid_x": 85, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y66": { + "bits": {}, + "grid_x": 85, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y67": { + "bits": {}, + "grid_x": 85, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y68": { + "bits": {}, + "grid_x": 85, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y69": { + "bits": {}, + "grid_x": 85, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y70": { + "bits": {}, + "grid_x": 85, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y71": { + "bits": {}, + "grid_x": 85, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y72": { + "bits": {}, + "grid_x": 85, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y73": { + "bits": {}, + "grid_x": 85, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y74": { + "bits": {}, + "grid_x": 85, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y75": { + "bits": {}, + "grid_x": 85, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y76": { + "bits": {}, + "grid_x": 85, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y77": { + "bits": {}, + "grid_x": 85, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y79": { + "bits": {}, + "grid_x": 85, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y80": { + "bits": {}, + "grid_x": 85, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y81": { + "bits": {}, + "grid_x": 85, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y82": { + "bits": {}, + "grid_x": 85, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y83": { + "bits": {}, + "grid_x": 85, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y84": { + "bits": {}, + "grid_x": 85, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y85": { + "bits": {}, + "grid_x": 85, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y86": { + "bits": {}, + "grid_x": 85, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y87": { + "bits": {}, + "grid_x": 85, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y88": { + "bits": {}, + "grid_x": 85, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y89": { + "bits": {}, + "grid_x": 85, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y90": { + "bits": {}, + "grid_x": 85, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y91": { + "bits": {}, + "grid_x": 85, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y92": { + "bits": {}, + "grid_x": 85, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y93": { + "bits": {}, + "grid_x": 85, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y94": { + "bits": {}, + "grid_x": 85, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y95": { + "bits": {}, + "grid_x": 85, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y96": { + "bits": {}, + "grid_x": 85, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y97": { + "bits": {}, + "grid_x": 85, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y98": { + "bits": {}, + "grid_x": 85, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y99": { + "bits": {}, + "grid_x": 85, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y100": { + "bits": {}, + "grid_x": 85, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y101": { + "bits": {}, + "grid_x": 85, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y102": { + "bits": {}, + "grid_x": 85, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y103": { + "bits": {}, + "grid_x": 85, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y105": { + "bits": {}, + "grid_x": 85, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y106": { + "bits": {}, + "grid_x": 85, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y107": { + "bits": {}, + "grid_x": 85, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y108": { + "bits": {}, + "grid_x": 85, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y109": { + "bits": {}, + "grid_x": 85, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y110": { + "bits": {}, + "grid_x": 85, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y111": { + "bits": {}, + "grid_x": 85, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y112": { + "bits": {}, + "grid_x": 85, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y113": { + "bits": {}, + "grid_x": 85, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y114": { + "bits": {}, + "grid_x": 85, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y115": { + "bits": {}, + "grid_x": 85, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y116": { + "bits": {}, + "grid_x": 85, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y117": { + "bits": {}, + "grid_x": 85, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y118": { + "bits": {}, + "grid_x": 85, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y119": { + "bits": {}, + "grid_x": 85, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y120": { + "bits": {}, + "grid_x": 85, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y121": { + "bits": {}, + "grid_x": 85, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y122": { + "bits": {}, + "grid_x": 85, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y123": { + "bits": {}, + "grid_x": 85, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y124": { + "bits": {}, + "grid_x": 85, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y125": { + "bits": {}, + "grid_x": 85, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y126": { + "bits": {}, + "grid_x": 85, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y127": { + "bits": {}, + "grid_x": 85, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y128": { + "bits": {}, + "grid_x": 85, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y129": { + "bits": {}, + "grid_x": 85, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y131": { + "bits": {}, + "grid_x": 85, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y132": { + "bits": {}, + "grid_x": 85, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y133": { + "bits": {}, + "grid_x": 85, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y134": { + "bits": {}, + "grid_x": 85, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y135": { + "bits": {}, + "grid_x": 85, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y136": { + "bits": {}, + "grid_x": 85, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y137": { + "bits": {}, + "grid_x": 85, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y138": { + "bits": {}, + "grid_x": 85, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y139": { + "bits": {}, + "grid_x": 85, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y140": { + "bits": {}, + "grid_x": 85, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y141": { + "bits": {}, + "grid_x": 85, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y142": { + "bits": {}, + "grid_x": 85, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y143": { + "bits": {}, + "grid_x": 85, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y144": { + "bits": {}, + "grid_x": 85, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y145": { + "bits": {}, + "grid_x": 85, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y146": { + "bits": {}, + "grid_x": 85, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y147": { + "bits": {}, + "grid_x": 85, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y148": { + "bits": {}, + "grid_x": 85, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y149": { + "bits": {}, + "grid_x": 85, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y150": { + "bits": {}, + "grid_x": 85, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y151": { + "bits": {}, + "grid_x": 85, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y152": { + "bits": {}, + "grid_x": 85, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y153": { + "bits": {}, + "grid_x": 85, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y154": { + "bits": {}, + "grid_x": 85, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X85Y155": { + "bits": {}, + "grid_x": 85, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y1": { + "bits": {}, + "grid_x": 96, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y2": { + "bits": {}, + "grid_x": 96, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y3": { + "bits": {}, + "grid_x": 96, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y4": { + "bits": {}, + "grid_x": 96, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y5": { + "bits": {}, + "grid_x": 96, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y6": { + "bits": {}, + "grid_x": 96, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y7": { + "bits": {}, + "grid_x": 96, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y8": { + "bits": {}, + "grid_x": 96, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y9": { + "bits": {}, + "grid_x": 96, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y10": { + "bits": {}, + "grid_x": 96, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y11": { + "bits": {}, + "grid_x": 96, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y12": { + "bits": {}, + "grid_x": 96, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y13": { + "bits": {}, + "grid_x": 96, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y14": { + "bits": {}, + "grid_x": 96, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y15": { + "bits": {}, + "grid_x": 96, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y16": { + "bits": {}, + "grid_x": 96, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y17": { + "bits": {}, + "grid_x": 96, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y18": { + "bits": {}, + "grid_x": 96, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y19": { + "bits": {}, + "grid_x": 96, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y20": { + "bits": {}, + "grid_x": 96, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y21": { + "bits": {}, + "grid_x": 96, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y22": { + "bits": {}, + "grid_x": 96, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y23": { + "bits": {}, + "grid_x": 96, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y24": { + "bits": {}, + "grid_x": 96, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y25": { + "bits": {}, + "grid_x": 96, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y27": { + "bits": {}, + "grid_x": 96, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y28": { + "bits": {}, + "grid_x": 96, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y29": { + "bits": {}, + "grid_x": 96, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y30": { + "bits": {}, + "grid_x": 96, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y31": { + "bits": {}, + "grid_x": 96, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y32": { + "bits": {}, + "grid_x": 96, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y33": { + "bits": {}, + "grid_x": 96, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y34": { + "bits": {}, + "grid_x": 96, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y35": { + "bits": {}, + "grid_x": 96, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y36": { + "bits": {}, + "grid_x": 96, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y37": { + "bits": {}, + "grid_x": 96, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y38": { + "bits": {}, + "grid_x": 96, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y39": { + "bits": {}, + "grid_x": 96, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y40": { + "bits": {}, + "grid_x": 96, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y41": { + "bits": {}, + "grid_x": 96, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y42": { + "bits": {}, + "grid_x": 96, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y43": { + "bits": {}, + "grid_x": 96, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y44": { + "bits": {}, + "grid_x": 96, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y45": { + "bits": {}, + "grid_x": 96, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y46": { + "bits": {}, + "grid_x": 96, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y47": { + "bits": {}, + "grid_x": 96, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y48": { + "bits": {}, + "grid_x": 96, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y49": { + "bits": {}, + "grid_x": 96, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y50": { + "bits": {}, + "grid_x": 96, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y51": { + "bits": {}, + "grid_x": 96, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y53": { + "bits": {}, + "grid_x": 96, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y54": { + "bits": {}, + "grid_x": 96, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y55": { + "bits": {}, + "grid_x": 96, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y56": { + "bits": {}, + "grid_x": 96, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y57": { + "bits": {}, + "grid_x": 96, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y58": { + "bits": {}, + "grid_x": 96, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y59": { + "bits": {}, + "grid_x": 96, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y60": { + "bits": {}, + "grid_x": 96, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y61": { + "bits": {}, + "grid_x": 96, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y62": { + "bits": {}, + "grid_x": 96, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y63": { + "bits": {}, + "grid_x": 96, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y64": { + "bits": {}, + "grid_x": 96, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y65": { + "bits": {}, + "grid_x": 96, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y66": { + "bits": {}, + "grid_x": 96, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y67": { + "bits": {}, + "grid_x": 96, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y68": { + "bits": {}, + "grid_x": 96, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y69": { + "bits": {}, + "grid_x": 96, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y70": { + "bits": {}, + "grid_x": 96, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y71": { + "bits": {}, + "grid_x": 96, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y72": { + "bits": {}, + "grid_x": 96, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y73": { + "bits": {}, + "grid_x": 96, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y74": { + "bits": {}, + "grid_x": 96, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y75": { + "bits": {}, + "grid_x": 96, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y76": { + "bits": {}, + "grid_x": 96, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y77": { + "bits": {}, + "grid_x": 96, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y79": { + "bits": {}, + "grid_x": 96, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y80": { + "bits": {}, + "grid_x": 96, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y81": { + "bits": {}, + "grid_x": 96, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y82": { + "bits": {}, + "grid_x": 96, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y83": { + "bits": {}, + "grid_x": 96, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y84": { + "bits": {}, + "grid_x": 96, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y85": { + "bits": {}, + "grid_x": 96, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y86": { + "bits": {}, + "grid_x": 96, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y87": { + "bits": {}, + "grid_x": 96, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y88": { + "bits": {}, + "grid_x": 96, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y89": { + "bits": {}, + "grid_x": 96, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y90": { + "bits": {}, + "grid_x": 96, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y91": { + "bits": {}, + "grid_x": 96, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y92": { + "bits": {}, + "grid_x": 96, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y93": { + "bits": {}, + "grid_x": 96, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y94": { + "bits": {}, + "grid_x": 96, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y95": { + "bits": {}, + "grid_x": 96, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y96": { + "bits": {}, + "grid_x": 96, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y97": { + "bits": {}, + "grid_x": 96, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y98": { + "bits": {}, + "grid_x": 96, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y99": { + "bits": {}, + "grid_x": 96, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y100": { + "bits": {}, + "grid_x": 96, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y101": { + "bits": {}, + "grid_x": 96, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y102": { + "bits": {}, + "grid_x": 96, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X96Y103": { + "bits": {}, + "grid_x": 96, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y1": { + "bits": {}, + "grid_x": 105, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y2": { + "bits": {}, + "grid_x": 105, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y3": { + "bits": {}, + "grid_x": 105, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y4": { + "bits": {}, + "grid_x": 105, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y5": { + "bits": {}, + "grid_x": 105, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y6": { + "bits": {}, + "grid_x": 105, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y7": { + "bits": {}, + "grid_x": 105, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y8": { + "bits": {}, + "grid_x": 105, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y9": { + "bits": {}, + "grid_x": 105, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y10": { + "bits": {}, + "grid_x": 105, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y11": { + "bits": {}, + "grid_x": 105, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y12": { + "bits": {}, + "grid_x": 105, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y13": { + "bits": {}, + "grid_x": 105, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y14": { + "bits": {}, + "grid_x": 105, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y15": { + "bits": {}, + "grid_x": 105, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y16": { + "bits": {}, + "grid_x": 105, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y17": { + "bits": {}, + "grid_x": 105, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y18": { + "bits": {}, + "grid_x": 105, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y19": { + "bits": {}, + "grid_x": 105, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y20": { + "bits": {}, + "grid_x": 105, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y21": { + "bits": {}, + "grid_x": 105, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y22": { + "bits": {}, + "grid_x": 105, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y23": { + "bits": {}, + "grid_x": 105, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y24": { + "bits": {}, + "grid_x": 105, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y25": { + "bits": {}, + "grid_x": 105, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y27": { + "bits": {}, + "grid_x": 105, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y28": { + "bits": {}, + "grid_x": 105, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y29": { + "bits": {}, + "grid_x": 105, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y30": { + "bits": {}, + "grid_x": 105, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y31": { + "bits": {}, + "grid_x": 105, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y32": { + "bits": {}, + "grid_x": 105, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y33": { + "bits": {}, + "grid_x": 105, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y34": { + "bits": {}, + "grid_x": 105, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y35": { + "bits": {}, + "grid_x": 105, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y36": { + "bits": {}, + "grid_x": 105, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y37": { + "bits": {}, + "grid_x": 105, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y38": { + "bits": {}, + "grid_x": 105, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y39": { + "bits": {}, + "grid_x": 105, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y40": { + "bits": {}, + "grid_x": 105, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y41": { + "bits": {}, + "grid_x": 105, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y42": { + "bits": {}, + "grid_x": 105, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y43": { + "bits": {}, + "grid_x": 105, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y44": { + "bits": {}, + "grid_x": 105, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y45": { + "bits": {}, + "grid_x": 105, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y46": { + "bits": {}, + "grid_x": 105, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y47": { + "bits": {}, + "grid_x": 105, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y48": { + "bits": {}, + "grid_x": 105, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y49": { + "bits": {}, + "grid_x": 105, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y50": { + "bits": {}, + "grid_x": 105, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y51": { + "bits": {}, + "grid_x": 105, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y53": { + "bits": {}, + "grid_x": 105, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y54": { + "bits": {}, + "grid_x": 105, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y55": { + "bits": {}, + "grid_x": 105, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y56": { + "bits": {}, + "grid_x": 105, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y57": { + "bits": {}, + "grid_x": 105, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y58": { + "bits": {}, + "grid_x": 105, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y59": { + "bits": {}, + "grid_x": 105, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y60": { + "bits": {}, + "grid_x": 105, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y61": { + "bits": {}, + "grid_x": 105, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y62": { + "bits": {}, + "grid_x": 105, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y63": { + "bits": {}, + "grid_x": 105, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y64": { + "bits": {}, + "grid_x": 105, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y65": { + "bits": {}, + "grid_x": 105, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y66": { + "bits": {}, + "grid_x": 105, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y67": { + "bits": {}, + "grid_x": 105, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y68": { + "bits": {}, + "grid_x": 105, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y69": { + "bits": {}, + "grid_x": 105, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y70": { + "bits": {}, + "grid_x": 105, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y71": { + "bits": {}, + "grid_x": 105, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y72": { + "bits": {}, + "grid_x": 105, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y73": { + "bits": {}, + "grid_x": 105, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y74": { + "bits": {}, + "grid_x": 105, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y75": { + "bits": {}, + "grid_x": 105, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y76": { + "bits": {}, + "grid_x": 105, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y77": { + "bits": {}, + "grid_x": 105, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y79": { + "bits": {}, + "grid_x": 105, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y80": { + "bits": {}, + "grid_x": 105, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y81": { + "bits": {}, + "grid_x": 105, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y82": { + "bits": {}, + "grid_x": 105, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y83": { + "bits": {}, + "grid_x": 105, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y84": { + "bits": {}, + "grid_x": 105, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y85": { + "bits": {}, + "grid_x": 105, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y86": { + "bits": {}, + "grid_x": 105, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y87": { + "bits": {}, + "grid_x": 105, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y88": { + "bits": {}, + "grid_x": 105, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y89": { + "bits": {}, + "grid_x": 105, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y90": { + "bits": {}, + "grid_x": 105, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y91": { + "bits": {}, + "grid_x": 105, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y92": { + "bits": {}, + "grid_x": 105, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y93": { + "bits": {}, + "grid_x": 105, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y94": { + "bits": {}, + "grid_x": 105, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y95": { + "bits": {}, + "grid_x": 105, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y96": { + "bits": {}, + "grid_x": 105, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y97": { + "bits": {}, + "grid_x": 105, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y98": { + "bits": {}, + "grid_x": 105, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y99": { + "bits": {}, + "grid_x": 105, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y100": { + "bits": {}, + "grid_x": 105, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y101": { + "bits": {}, + "grid_x": 105, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y102": { + "bits": {}, + "grid_x": 105, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VBRK_X105Y103": { + "bits": {}, + "grid_x": 105, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VBRK" + }, + "VFRAME_X47Y1": { + "bits": {}, + "grid_x": 47, + "grid_y": 155, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y2": { + "bits": {}, + "grid_x": 47, + "grid_y": 154, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y3": { + "bits": {}, + "grid_x": 47, + "grid_y": 153, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y4": { + "bits": {}, + "grid_x": 47, + "grid_y": 152, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y5": { + "bits": {}, + "grid_x": 47, + "grid_y": 151, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y6": { + "bits": {}, + "grid_x": 47, + "grid_y": 150, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y7": { + "bits": {}, + "grid_x": 47, + "grid_y": 149, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y8": { + "bits": {}, + "grid_x": 47, + "grid_y": 148, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y9": { + "bits": {}, + "grid_x": 47, + "grid_y": 147, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y10": { + "bits": {}, + "grid_x": 47, + "grid_y": 146, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y11": { + "bits": {}, + "grid_x": 47, + "grid_y": 145, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y12": { + "bits": {}, + "grid_x": 47, + "grid_y": 144, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y13": { + "bits": {}, + "grid_x": 47, + "grid_y": 143, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y14": { + "bits": {}, + "grid_x": 47, + "grid_y": 142, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y15": { + "bits": {}, + "grid_x": 47, + "grid_y": 141, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y16": { + "bits": {}, + "grid_x": 47, + "grid_y": 140, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y17": { + "bits": {}, + "grid_x": 47, + "grid_y": 139, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y18": { + "bits": {}, + "grid_x": 47, + "grid_y": 138, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y19": { + "bits": {}, + "grid_x": 47, + "grid_y": 137, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y20": { + "bits": {}, + "grid_x": 47, + "grid_y": 136, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y21": { + "bits": {}, + "grid_x": 47, + "grid_y": 135, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y22": { + "bits": {}, + "grid_x": 47, + "grid_y": 134, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y23": { + "bits": {}, + "grid_x": 47, + "grid_y": 133, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y24": { + "bits": {}, + "grid_x": 47, + "grid_y": 132, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y25": { + "bits": {}, + "grid_x": 47, + "grid_y": 131, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y27": { + "bits": {}, + "grid_x": 47, + "grid_y": 129, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y28": { + "bits": {}, + "grid_x": 47, + "grid_y": 128, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y29": { + "bits": {}, + "grid_x": 47, + "grid_y": 127, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y30": { + "bits": {}, + "grid_x": 47, + "grid_y": 126, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y31": { + "bits": {}, + "grid_x": 47, + "grid_y": 125, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y32": { + "bits": {}, + "grid_x": 47, + "grid_y": 124, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y33": { + "bits": {}, + "grid_x": 47, + "grid_y": 123, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y34": { + "bits": {}, + "grid_x": 47, + "grid_y": 122, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y35": { + "bits": {}, + "grid_x": 47, + "grid_y": 121, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y36": { + "bits": {}, + "grid_x": 47, + "grid_y": 120, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y37": { + "bits": {}, + "grid_x": 47, + "grid_y": 119, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y38": { + "bits": {}, + "grid_x": 47, + "grid_y": 118, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y39": { + "bits": {}, + "grid_x": 47, + "grid_y": 117, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y40": { + "bits": {}, + "grid_x": 47, + "grid_y": 116, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y41": { + "bits": {}, + "grid_x": 47, + "grid_y": 115, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y42": { + "bits": {}, + "grid_x": 47, + "grid_y": 114, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y43": { + "bits": {}, + "grid_x": 47, + "grid_y": 113, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y44": { + "bits": {}, + "grid_x": 47, + "grid_y": 112, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y45": { + "bits": {}, + "grid_x": 47, + "grid_y": 111, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y46": { + "bits": {}, + "grid_x": 47, + "grid_y": 110, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y47": { + "bits": {}, + "grid_x": 47, + "grid_y": 109, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y48": { + "bits": {}, + "grid_x": 47, + "grid_y": 108, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y49": { + "bits": {}, + "grid_x": 47, + "grid_y": 107, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y50": { + "bits": {}, + "grid_x": 47, + "grid_y": 106, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y51": { + "bits": {}, + "grid_x": 47, + "grid_y": 105, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y53": { + "bits": {}, + "grid_x": 47, + "grid_y": 103, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y54": { + "bits": {}, + "grid_x": 47, + "grid_y": 102, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y55": { + "bits": {}, + "grid_x": 47, + "grid_y": 101, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y56": { + "bits": {}, + "grid_x": 47, + "grid_y": 100, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y57": { + "bits": {}, + "grid_x": 47, + "grid_y": 99, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y58": { + "bits": {}, + "grid_x": 47, + "grid_y": 98, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y59": { + "bits": {}, + "grid_x": 47, + "grid_y": 97, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y60": { + "bits": {}, + "grid_x": 47, + "grid_y": 96, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y61": { + "bits": {}, + "grid_x": 47, + "grid_y": 95, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y62": { + "bits": {}, + "grid_x": 47, + "grid_y": 94, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y63": { + "bits": {}, + "grid_x": 47, + "grid_y": 93, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y64": { + "bits": {}, + "grid_x": 47, + "grid_y": 92, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y65": { + "bits": {}, + "grid_x": 47, + "grid_y": 91, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y66": { + "bits": {}, + "grid_x": 47, + "grid_y": 90, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y67": { + "bits": {}, + "grid_x": 47, + "grid_y": 89, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y68": { + "bits": {}, + "grid_x": 47, + "grid_y": 88, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y69": { + "bits": {}, + "grid_x": 47, + "grid_y": 87, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y70": { + "bits": {}, + "grid_x": 47, + "grid_y": 86, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y71": { + "bits": {}, + "grid_x": 47, + "grid_y": 85, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y72": { + "bits": {}, + "grid_x": 47, + "grid_y": 84, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y73": { + "bits": {}, + "grid_x": 47, + "grid_y": 83, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y74": { + "bits": {}, + "grid_x": 47, + "grid_y": 82, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y75": { + "bits": {}, + "grid_x": 47, + "grid_y": 81, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y76": { + "bits": {}, + "grid_x": 47, + "grid_y": 80, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y77": { + "bits": {}, + "grid_x": 47, + "grid_y": 79, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y79": { + "bits": {}, + "grid_x": 47, + "grid_y": 77, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y80": { + "bits": {}, + "grid_x": 47, + "grid_y": 76, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y81": { + "bits": {}, + "grid_x": 47, + "grid_y": 75, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y82": { + "bits": {}, + "grid_x": 47, + "grid_y": 74, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y83": { + "bits": {}, + "grid_x": 47, + "grid_y": 73, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y84": { + "bits": {}, + "grid_x": 47, + "grid_y": 72, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y85": { + "bits": {}, + "grid_x": 47, + "grid_y": 71, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y86": { + "bits": {}, + "grid_x": 47, + "grid_y": 70, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y87": { + "bits": {}, + "grid_x": 47, + "grid_y": 69, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y88": { + "bits": {}, + "grid_x": 47, + "grid_y": 68, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y89": { + "bits": {}, + "grid_x": 47, + "grid_y": 67, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y90": { + "bits": {}, + "grid_x": 47, + "grid_y": 66, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y91": { + "bits": {}, + "grid_x": 47, + "grid_y": 65, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y92": { + "bits": {}, + "grid_x": 47, + "grid_y": 64, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y93": { + "bits": {}, + "grid_x": 47, + "grid_y": 63, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y94": { + "bits": {}, + "grid_x": 47, + "grid_y": 62, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y95": { + "bits": {}, + "grid_x": 47, + "grid_y": 61, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y96": { + "bits": {}, + "grid_x": 47, + "grid_y": 60, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y97": { + "bits": {}, + "grid_x": 47, + "grid_y": 59, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y98": { + "bits": {}, + "grid_x": 47, + "grid_y": 58, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y99": { + "bits": {}, + "grid_x": 47, + "grid_y": 57, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y100": { + "bits": {}, + "grid_x": 47, + "grid_y": 56, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y101": { + "bits": {}, + "grid_x": 47, + "grid_y": 55, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y102": { + "bits": {}, + "grid_x": 47, + "grid_y": 54, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y103": { + "bits": {}, + "grid_x": 47, + "grid_y": 53, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y105": { + "bits": {}, + "grid_x": 47, + "grid_y": 51, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y106": { + "bits": {}, + "grid_x": 47, + "grid_y": 50, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y107": { + "bits": {}, + "grid_x": 47, + "grid_y": 49, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y108": { + "bits": {}, + "grid_x": 47, + "grid_y": 48, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y109": { + "bits": {}, + "grid_x": 47, + "grid_y": 47, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y110": { + "bits": {}, + "grid_x": 47, + "grid_y": 46, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y111": { + "bits": {}, + "grid_x": 47, + "grid_y": 45, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y112": { + "bits": {}, + "grid_x": 47, + "grid_y": 44, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y113": { + "bits": {}, + "grid_x": 47, + "grid_y": 43, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y114": { + "bits": {}, + "grid_x": 47, + "grid_y": 42, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y115": { + "bits": {}, + "grid_x": 47, + "grid_y": 41, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y116": { + "bits": {}, + "grid_x": 47, + "grid_y": 40, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y117": { + "bits": {}, + "grid_x": 47, + "grid_y": 39, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y118": { + "bits": {}, + "grid_x": 47, + "grid_y": 38, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y119": { + "bits": {}, + "grid_x": 47, + "grid_y": 37, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y120": { + "bits": {}, + "grid_x": 47, + "grid_y": 36, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y121": { + "bits": {}, + "grid_x": 47, + "grid_y": 35, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y122": { + "bits": {}, + "grid_x": 47, + "grid_y": 34, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y123": { + "bits": {}, + "grid_x": 47, + "grid_y": 33, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y124": { + "bits": {}, + "grid_x": 47, + "grid_y": 32, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y125": { + "bits": {}, + "grid_x": 47, + "grid_y": 31, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y126": { + "bits": {}, + "grid_x": 47, + "grid_y": 30, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y127": { + "bits": {}, + "grid_x": 47, + "grid_y": 29, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y128": { + "bits": {}, + "grid_x": 47, + "grid_y": 28, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y129": { + "bits": {}, + "grid_x": 47, + "grid_y": 27, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y131": { + "bits": {}, + "grid_x": 47, + "grid_y": 25, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y132": { + "bits": {}, + "grid_x": 47, + "grid_y": 24, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y133": { + "bits": {}, + "grid_x": 47, + "grid_y": 23, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y134": { + "bits": {}, + "grid_x": 47, + "grid_y": 22, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y135": { + "bits": {}, + "grid_x": 47, + "grid_y": 21, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y136": { + "bits": {}, + "grid_x": 47, + "grid_y": 20, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y137": { + "bits": {}, + "grid_x": 47, + "grid_y": 19, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y138": { + "bits": {}, + "grid_x": 47, + "grid_y": 18, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y139": { + "bits": {}, + "grid_x": 47, + "grid_y": 17, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y140": { + "bits": {}, + "grid_x": 47, + "grid_y": 16, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y141": { + "bits": {}, + "grid_x": 47, + "grid_y": 15, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y142": { + "bits": {}, + "grid_x": 47, + "grid_y": 14, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y143": { + "bits": {}, + "grid_x": 47, + "grid_y": 13, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y144": { + "bits": {}, + "grid_x": 47, + "grid_y": 12, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y145": { + "bits": {}, + "grid_x": 47, + "grid_y": 11, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y146": { + "bits": {}, + "grid_x": 47, + "grid_y": 10, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y147": { + "bits": {}, + "grid_x": 47, + "grid_y": 9, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y148": { + "bits": {}, + "grid_x": 47, + "grid_y": 8, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y149": { + "bits": {}, + "grid_x": 47, + "grid_y": 7, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y150": { + "bits": {}, + "grid_x": 47, + "grid_y": 6, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y151": { + "bits": {}, + "grid_x": 47, + "grid_y": 5, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y152": { + "bits": {}, + "grid_x": 47, + "grid_y": 4, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y153": { + "bits": {}, + "grid_x": 47, + "grid_y": 3, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y154": { + "bits": {}, + "grid_x": 47, + "grid_y": 2, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + }, + "VFRAME_X47Y155": { + "bits": {}, + "grid_x": 47, + "grid_y": 1, + "pin_functions": {}, + "sites": {}, + "type": "VFRAME" + } +} diff --git a/kintex7/mask_lioi3.db b/kintex7/mask_lioi3.db index 4c3181d..6c7ffc3 100644 --- a/kintex7/mask_lioi3.db +++ b/kintex7/mask_lioi3.db @@ -1,4 +1,5 @@ bit 25_07 +bit 25_16 bit 25_20 bit 25_21 bit 25_31 diff --git a/kintex7/mask_lioi3_tbytesrc.db b/kintex7/mask_lioi3_tbytesrc.db index 4c3181d..6c7ffc3 100644 --- a/kintex7/mask_lioi3_tbytesrc.db +++ b/kintex7/mask_lioi3_tbytesrc.db @@ -1,4 +1,5 @@ bit 25_07 +bit 25_16 bit 25_20 bit 25_21 bit 25_31 diff --git a/kintex7/mask_lioi3_tbyteterm.db b/kintex7/mask_lioi3_tbyteterm.db index 4c3181d..6c7ffc3 100644 --- a/kintex7/mask_lioi3_tbyteterm.db +++ b/kintex7/mask_lioi3_tbyteterm.db @@ -1,4 +1,5 @@ bit 25_07 +bit 25_16 bit 25_20 bit 25_21 bit 25_31 diff --git a/kintex7/mask_rioi3.db b/kintex7/mask_rioi3.db index 4c3181d..6c7ffc3 100644 --- a/kintex7/mask_rioi3.db +++ b/kintex7/mask_rioi3.db @@ -1,4 +1,5 @@ bit 25_07 +bit 25_16 bit 25_20 bit 25_21 bit 25_31 diff --git a/kintex7/mask_rioi3_tbytesrc.db b/kintex7/mask_rioi3_tbytesrc.db index 4c3181d..6c7ffc3 100644 --- a/kintex7/mask_rioi3_tbytesrc.db +++ b/kintex7/mask_rioi3_tbytesrc.db @@ -1,4 +1,5 @@ bit 25_07 +bit 25_16 bit 25_20 bit 25_21 bit 25_31 diff --git a/kintex7/mask_rioi3_tbyteterm.db b/kintex7/mask_rioi3_tbyteterm.db index 4c3181d..6c7ffc3 100644 --- a/kintex7/mask_rioi3_tbyteterm.db +++ b/kintex7/mask_rioi3_tbyteterm.db @@ -1,4 +1,5 @@ bit 25_07 +bit 25_16 bit 25_20 bit 25_21 bit 25_31 diff --git a/kintex7/segbits_int_l.db b/kintex7/segbits_int_l.db index 43670e7..c5b5f4f 100644 --- a/kintex7/segbits_int_l.db +++ b/kintex7/segbits_int_l.db @@ -1260,7 +1260,7 @@ INT_L.IMUX_L32.FAN_BOUNCE2 21_05 !22_05 23_05 24_05 25_05 INT_L.IMUX_L32.FAN_BOUNCE7 21_05 22_05 !23_05 24_05 25_05 INT_L.IMUX_L32.LOGIC_OUTS_L0 20_05 !22_05 23_05 24_05 25_05 INT_L.IMUX_L32.LOGIC_OUTS_L12 20_05 22_05 !23_05 24_05 25_05 -INT_L.IMUX_L32.LOGIC_OUTS_L22 20_05 !22_05 !23_05 !24_05 25_05 +INT_L.IMUX_L32.LOGIC_OUTS_L22 20_00 20_05 !22_05 !23_05 !24_05 25_05 INT_L.IMUX_L32.SR1END_N3_3 17_05 !22_05 23_05 24_05 25_05 INT_L.IMUX_L32.WW2END_N0_3 18_04 !22_05 !23_05 24_05 !25_05 INT_L.IMUX_L32.EE2END0 19_04 !22_05 !23_05 24_05 !25_05 diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db index 14d59dc..008965d 100644 --- a/kintex7/segbits_int_l.origin_info.db +++ b/kintex7/segbits_int_l.origin_info.db @@ -1260,7 +1260,7 @@ INT_L.IMUX_L32.FAN_BOUNCE2 origin:050-pip-seed !22_05 21_05 23_05 24_05 25_05 INT_L.IMUX_L32.FAN_BOUNCE7 origin:050-pip-seed !23_05 21_05 22_05 24_05 25_05 INT_L.IMUX_L32.LOGIC_OUTS_L0 origin:051-pip-imuxlout-bypalts !22_05 20_05 23_05 24_05 25_05 INT_L.IMUX_L32.LOGIC_OUTS_L12 origin:051-pip-imuxlout-bypalts !23_05 20_05 22_05 24_05 25_05 -INT_L.IMUX_L32.LOGIC_OUTS_L22 origin:051-pip-imuxlout-bypalts !22_05 !23_05 !24_05 20_05 25_05 +INT_L.IMUX_L32.LOGIC_OUTS_L22 origin:051-pip-imuxlout-bypalts !22_05 !23_05 !24_05 20_00 20_05 25_05 INT_L.IMUX_L32.SR1END_N3_3 origin:050-pip-seed !22_05 17_05 23_05 24_05 25_05 INT_L.IMUX_L32.WW2END_N0_3 origin:050-pip-seed !22_05 !23_05 !25_05 18_04 24_05 INT_L.IMUX_L32.EE2END0 origin:050-pip-seed !22_05 !23_05 !25_05 19_04 24_05 @@ -1937,7 +1937,7 @@ INT_L.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56 INT_L.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_L.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_L.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_L.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 +INT_L.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 INT_L.EL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_20 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_21 14_21 INT_L.EL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_21 13_21 @@ -2253,7 +2253,7 @@ INT_L.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36 INT_L.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39 INT_L.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36 INT_L.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37 -INT_L.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36 +INT_L.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36 INT_L.NE6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_53 04_54 INT_L.NE6BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_53 07_53 INT_L.NE6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_52 07_53 @@ -2662,7 +2662,7 @@ INT_L.NW6BEG0.LOGIC_OUTS_L18 origin:050-pip-seed 05_01 07_03 INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03 INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00 -INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03 +INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03 @@ -3323,7 +3323,7 @@ INT_L.SW6BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 06_44 07_45 INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45 -INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44 +INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45 @@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35 -INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35 +INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33 diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db index fc1a8c3..5bc99fc 100644 --- a/kintex7/segbits_int_r.origin_info.db +++ b/kintex7/segbits_int_r.origin_info.db @@ -329,7 +329,7 @@ INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08 INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 -INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 +INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 @@ -725,7 +725,7 @@ INT_R.EE4BEG3.SE6END3 origin:050-pip-seed 03_57 06_56 INT_R.EE4BEG3.SS2END3 origin:050-pip-seed 03_56 05_59 INT_R.EE4BEG3.SS6END3 origin:050-pip-seed 05_59 06_56 INT_R.EE4BEG3.SW2END3 origin:050-pip-seed 02_57 05_59 -INT_R.EE4BEG3.SW6END3 origin:056-pip-rem 05_56 05_59 +INT_R.EE4BEG3.SW6END3 origin:050-pip-seed 05_56 05_59 INT_R.EL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_20 14_21 INT_R.EL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_21 14_21 INT_R.EL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_21 13_21 @@ -2253,7 +2253,7 @@ INT_R.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36 INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37 -INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36 +INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53 @@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 +INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07 diff --git a/kintex7/segbits_liob33.db b/kintex7/segbits_liob33.db index 3693490..37effb8 100644 --- a/kintex7/segbits_liob33.db +++ b/kintex7/segbits_liob33.db @@ -1,7 +1,8 @@ LIOB33.IOB_Y0.IBUFDISABLE.I 38_82 +LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123 LIOB33.IOB_Y0.INTERMDISABLE.I 39_89 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93 @@ -9,34 +10,37 @@ LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93 LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93 LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 !39_117 !39_119 39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95 -LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 !39_117 39_119 !39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 39_127 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 39_127 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 39_127 -LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 38_64 !38_112 38_118 !38_126 39_65 39_117 !39_119 !39_125 39_127 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127 -LIOB33.IOB_Y0.SSTL135.IN !38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 +LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87 +LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87 LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45 +LIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 39_07 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 !38_06 39_05 39_07 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 !38_06 !39_05 39_07 LIOB33.IOB_Y1.INTERMDISABLE.I 38_38 LIOB33.IOB_Y1.LVTTL.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_62 39_01 !39_09 !39_15 39_63 LIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35 diff --git a/kintex7/segbits_liob33.origin_info.db b/kintex7/segbits_liob33.origin_info.db index 8519332..1b3e6f7 100644 --- a/kintex7/segbits_liob33.origin_info.db +++ b/kintex7/segbits_liob33.origin_info.db @@ -1,7 +1,8 @@ LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82 +LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123 LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65 LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94 @@ -9,34 +10,37 @@ LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93 LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93 LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_125 39_65 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95 -LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_119 39_65 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_119 39_125 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_117 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_119 39_125 39_65 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_125 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_117 39_119 39_65 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_65 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_117 39_65 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_113 39_65 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_113 39_117 39_65 +LIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_86 39_85 39_87 LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39_119 38_118 38_64 39_125 39_127 39_65 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65 -LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob 38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 +LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87 +LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87 LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07 +LIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !38_6 38_4 39_5 39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_6 !39_5 38_4 39_7 LIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38 LIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63 LIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35 diff --git a/kintex7/segbits_riob33.db b/kintex7/segbits_riob33.db index 08ecab5..88ceb7d 100644 --- a/kintex7/segbits_riob33.db +++ b/kintex7/segbits_riob33.db @@ -1,7 +1,8 @@ RIOB33.IOB_Y0.IBUFDISABLE.I 38_82 +RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123 RIOB33.IOB_Y0.INTERMDISABLE.I 39_89 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93 @@ -9,34 +10,37 @@ RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93 RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93 RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 !39_117 !39_119 39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95 -RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 !39_117 39_119 !39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 39_127 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 39_127 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 39_127 -RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 38_64 !38_112 38_118 !38_126 39_65 39_117 !39_119 !39_125 39_127 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127 -RIOB33.IOB_Y0.SSTL135.IN !38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 +RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87 +RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87 RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45 +RIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 39_07 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 !38_06 39_05 39_07 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 !38_06 !39_05 39_07 RIOB33.IOB_Y1.INTERMDISABLE.I 38_38 RIOB33.IOB_Y1.LVTTL.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_62 39_01 !39_09 !39_15 39_63 RIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35 diff --git a/kintex7/segbits_riob33.origin_info.db b/kintex7/segbits_riob33.origin_info.db index 1e7da59..a87b92b 100644 --- a/kintex7/segbits_riob33.origin_info.db +++ b/kintex7/segbits_riob33.origin_info.db @@ -1,7 +1,8 @@ RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82 +RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123 RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65 RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94 @@ -9,34 +10,37 @@ RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93 RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93 RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_125 39_65 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95 -RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_119 39_65 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_119 39_125 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_117 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_119 39_125 39_65 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_125 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_117 39_119 39_65 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_65 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_117 39_65 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_113 39_65 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_113 39_117 39_65 +RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_86 39_85 39_87 RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39_119 38_118 38_64 39_125 39_127 39_65 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65 -RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob 38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 +RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87 +RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87 RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07 +RIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !38_6 38_4 39_5 39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_6 !39_5 38_4 39_7 RIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38 RIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63 RIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35 diff --git a/kintex7/tile_type_BRKH_INT.json b/kintex7/tile_type_BRKH_INT.json index 7edb0c2..4d3e85a 100644 --- a/kintex7/tile_type_BRKH_INT.json +++ b/kintex7/tile_type_BRKH_INT.json @@ -4,8 +4,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -18,8 +18,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -32,8 +32,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -46,8 +46,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -60,8 +60,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -74,8 +74,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -88,8 +88,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -102,8 +102,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -116,8 +116,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -130,8 +130,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -144,8 +144,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -158,8 +158,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -172,8 +172,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -186,8 +186,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -200,8 +200,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -214,8 +214,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -228,8 +228,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -242,8 +242,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -256,8 +256,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -270,8 +270,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -284,8 +284,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -298,8 +298,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -312,8 +312,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -326,8 +326,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -340,8 +340,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -354,8 +354,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -368,8 +368,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], @@ -382,8 +382,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.181", + "0.105", "0.206", "0.233" ], diff --git a/kintex7/tile_type_CFG_CENTER_MID.json b/kintex7/tile_type_CFG_CENTER_MID.json index 92a1ef7..ac12d59 100644 --- a/kintex7/tile_type_CFG_CENTER_MID.json +++ b/kintex7/tile_type_CFG_CENTER_MID.json @@ -5315,9 +5315,9 @@ "site_pins": { "CRCERROR": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5325,9 +5325,9 @@ }, "ECCERROR": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5335,9 +5335,9 @@ }, "ECCERRORSINGLE": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5345,9 +5345,9 @@ }, "FAR0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5355,9 +5355,9 @@ }, "FAR1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5365,9 +5365,9 @@ }, "FAR2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5375,9 +5375,9 @@ }, "FAR3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5385,9 +5385,9 @@ }, "FAR4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5395,9 +5395,9 @@ }, "FAR5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5405,9 +5405,9 @@ }, "FAR6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5415,9 +5415,9 @@ }, "FAR7": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5425,9 +5425,9 @@ }, "FAR8": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5435,9 +5435,9 @@ }, "FAR9": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5445,9 +5445,9 @@ }, "FAR10": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5455,9 +5455,9 @@ }, "FAR11": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5465,9 +5465,9 @@ }, "FAR12": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5475,9 +5475,9 @@ }, "FAR13": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5485,9 +5485,9 @@ }, "FAR14": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5495,9 +5495,9 @@ }, "FAR15": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5505,9 +5505,9 @@ }, "FAR16": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5515,9 +5515,9 @@ }, "FAR17": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5525,9 +5525,9 @@ }, "FAR18": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5535,9 +5535,9 @@ }, "FAR19": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5545,9 +5545,9 @@ }, "FAR20": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5555,9 +5555,9 @@ }, "FAR21": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5565,9 +5565,9 @@ }, "FAR22": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5575,9 +5575,9 @@ }, "FAR23": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5585,9 +5585,9 @@ }, "FAR24": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5595,9 +5595,9 @@ }, "FAR25": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5605,9 +5605,9 @@ }, "SYNBIT0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5615,9 +5615,9 @@ }, "SYNBIT1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5625,9 +5625,9 @@ }, "SYNBIT2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5635,9 +5635,9 @@ }, "SYNBIT3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5645,9 +5645,9 @@ }, "SYNBIT4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5655,9 +5655,9 @@ }, "SYNDROME0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5665,9 +5665,9 @@ }, "SYNDROME1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5675,9 +5675,9 @@ }, "SYNDROME2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5685,9 +5685,9 @@ }, "SYNDROME3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5695,9 +5695,9 @@ }, "SYNDROME4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5705,9 +5705,9 @@ }, "SYNDROME5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5715,9 +5715,9 @@ }, "SYNDROME6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5725,9 +5725,9 @@ }, "SYNDROME7": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5735,9 +5735,9 @@ }, "SYNDROME8": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5745,9 +5745,9 @@ }, "SYNDROME9": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5755,9 +5755,9 @@ }, "SYNDROME10": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5765,9 +5765,9 @@ }, "SYNDROME11": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5775,9 +5775,9 @@ }, "SYNDROME12": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5785,9 +5785,9 @@ }, "SYNDROMEVALID": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5795,9 +5795,9 @@ }, "SYNWORD0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5805,9 +5805,9 @@ }, "SYNWORD1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5815,9 +5815,9 @@ }, "SYNWORD2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5825,9 +5825,9 @@ }, "SYNWORD3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5835,9 +5835,9 @@ }, "SYNWORD4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5845,9 +5845,9 @@ }, "SYNWORD5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", @@ -5855,9 +5855,9 @@ }, "SYNWORD6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "206.25", diff --git a/kintex7/tile_type_CFG_CENTER_TOP.json b/kintex7/tile_type_CFG_CENTER_TOP.json index d2d58cf..aebf1d7 100644 --- a/kintex7/tile_type_CFG_CENTER_TOP.json +++ b/kintex7/tile_type_CFG_CENTER_TOP.json @@ -769,6 +769,86 @@ "res": "152.625", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR1" }, + "EFUSEUSR2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR2" + }, + "EFUSEUSR3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR3" + }, + "EFUSEUSR4": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR4" + }, + "EFUSEUSR5": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR5" + }, + "EFUSEUSR6": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR6" + }, + "EFUSEUSR7": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR7" + }, + "EFUSEUSR8": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR8" + }, + "EFUSEUSR9": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "152.625", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR9" + }, "EFUSEUSR10": { "delay": [ "0.000", @@ -869,16 +949,6 @@ "res": "152.625", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR19" }, - "EFUSEUSR2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR2" - }, "EFUSEUSR20": { "delay": [ "0.000", @@ -979,16 +1049,6 @@ "res": "152.625", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR29" }, - "EFUSEUSR3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR3" - }, "EFUSEUSR30": { "delay": [ "0.000", @@ -1008,66 +1068,6 @@ ], "res": "152.625", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR31" - }, - "EFUSEUSR4": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR4" - }, - "EFUSEUSR5": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR5" - }, - "EFUSEUSR6": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR6" - }, - "EFUSEUSR7": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR7" - }, - "EFUSEUSR8": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR8" - }, - "EFUSEUSR9": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "152.625", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR9" } }, "type": "EFUSE_USR", diff --git a/kintex7/tile_type_CLBLL_L.json b/kintex7/tile_type_CLBLL_L.json index f735f08..2f816a8 100644 --- a/kintex7/tile_type_CLBLL_L.json +++ b/kintex7/tile_type_CLBLL_L.json @@ -3210,465 +3210,6 @@ } }, "sites": [ - { - "name": "X1Y0", - "prefix": "SLICE", - "site_pins": { - "A": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "835.1804999999999", - "wire": "CLBLL_L_A" - }, - "A1": { - "cap": "0.000", - "delay": [ - "0.133", - "0.165", - "0.217", - "0.257" - ], - "wire": "CLBLL_L_A1" - }, - "A2": { - "cap": "0.000", - "delay": [ - "0.130", - "0.162", - "0.212", - "0.250" - ], - "wire": "CLBLL_L_A2" - }, - "A3": { - "cap": "0.000", - "delay": [ - "0.078", - "0.097", - "0.138", - "0.163" - ], - "wire": "CLBLL_L_A3" - }, - "A4": { - "cap": "0.000", - "delay": [ - "0.064", - "0.080", - "0.113", - "0.134" - ], - "wire": "CLBLL_L_A4" - }, - "A5": { - "cap": "0.000", - "delay": [ - "0.026", - "0.032", - "0.042", - "0.050" - ], - "wire": "CLBLL_L_A5" - }, - "A6": { - "cap": "0.000", - "delay": [ - "0.002", - "0.002", - "0.002", - "0.003" - ], - "wire": "CLBLL_L_A6" - }, - "AMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "894.144625", - "wire": "CLBLL_L_AMUX" - }, - "AQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLL_L_AQ" - }, - "AX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_AX" - }, - "B": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "810.616125", - "wire": "CLBLL_L_B" - }, - "B1": { - "cap": "0.000", - "delay": [ - "0.133", - "0.165", - "0.217", - "0.257" - ], - "wire": "CLBLL_L_B1" - }, - "B2": { - "cap": "0.000", - "delay": [ - "0.129", - "0.161", - "0.213", - "0.251" - ], - "wire": "CLBLL_L_B2" - }, - "B3": { - "cap": "0.000", - "delay": [ - "0.080", - "0.100", - "0.142", - "0.168" - ], - "wire": "CLBLL_L_B3" - }, - "B4": { - "cap": "0.000", - "delay": [ - "0.065", - "0.081", - "0.113", - "0.134" - ], - "wire": "CLBLL_L_B4" - }, - "B5": { - "cap": "0.000", - "delay": [ - "0.027", - "0.033", - "0.043", - "0.051" - ], - "wire": "CLBLL_L_B5" - }, - "B6": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "CLBLL_L_B6" - }, - "BMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "884.3346875000001", - "wire": "CLBLL_L_BMUX" - }, - "BQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLL_L_BQ" - }, - "BX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_BX" - }, - "C": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "808.31575", - "wire": "CLBLL_L_C" - }, - "C1": { - "cap": "0.000", - "delay": [ - "0.133", - "0.165", - "0.217", - "0.257" - ], - "wire": "CLBLL_L_C1" - }, - "C2": { - "cap": "0.000", - "delay": [ - "0.129", - "0.161", - "0.212", - "0.250" - ], - "wire": "CLBLL_L_C2" - }, - "C3": { - "cap": "0.000", - "delay": [ - "0.080", - "0.100", - "0.142", - "0.168" - ], - "wire": "CLBLL_L_C3" - }, - "C4": { - "cap": "0.000", - "delay": [ - "0.065", - "0.081", - "0.114", - "0.135" - ], - "wire": "CLBLL_L_C4" - }, - "C5": { - "cap": "0.000", - "delay": [ - "0.026", - "0.032", - "0.044", - "0.052" - ], - "wire": "CLBLL_L_C5" - }, - "C6": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_C6" - }, - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CE" - }, - "CIN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CIN" - }, - "CLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CLK" - }, - "CMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "858.1766875000001", - "wire": "CLBLL_L_CMUX" - }, - "COUT": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "687.5", - "wire": "CLBLL_L_COUT" - }, - "CQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLL_L_CQ" - }, - "CX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CX" - }, - "D": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "810.3796249999999", - "wire": "CLBLL_L_D" - }, - "D1": { - "cap": "0.000", - "delay": [ - "0.135", - "0.168", - "0.221", - "0.262" - ], - "wire": "CLBLL_L_D1" - }, - "D2": { - "cap": "0.000", - "delay": [ - "0.131", - "0.163", - "0.213", - "0.252" - ], - "wire": "CLBLL_L_D2" - }, - "D3": { - "cap": "0.000", - "delay": [ - "0.079", - "0.099", - "0.141", - "0.167" - ], - "wire": "CLBLL_L_D3" - }, - "D4": { - "cap": "0.000", - "delay": [ - "0.066", - "0.082", - "0.116", - "0.138" - ], - "wire": "CLBLL_L_D4" - }, - "D5": { - "cap": "0.000", - "delay": [ - "0.026", - "0.032", - "0.042", - "0.050" - ], - "wire": "CLBLL_L_D5" - }, - "D6": { - "cap": "0.000", - "delay": [ - "0.002", - "0.002", - "0.002", - "0.003" - ], - "wire": "CLBLL_L_D6" - }, - "DMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "825.0027499999999", - "wire": "CLBLL_L_DMUX" - }, - "DQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLL_L_DQ" - }, - "DX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_DX" - }, - "SR": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_SR" - } - }, - "type": "SLICEL", - "x_coord": 1, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "SLICE", @@ -4127,6 +3668,465 @@ "type": "SLICEL", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X1Y0", + "prefix": "SLICE", + "site_pins": { + "A": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "835.1804999999999", + "wire": "CLBLL_L_A" + }, + "A1": { + "cap": "0.000", + "delay": [ + "0.133", + "0.165", + "0.217", + "0.257" + ], + "wire": "CLBLL_L_A1" + }, + "A2": { + "cap": "0.000", + "delay": [ + "0.130", + "0.162", + "0.212", + "0.250" + ], + "wire": "CLBLL_L_A2" + }, + "A3": { + "cap": "0.000", + "delay": [ + "0.078", + "0.097", + "0.138", + "0.163" + ], + "wire": "CLBLL_L_A3" + }, + "A4": { + "cap": "0.000", + "delay": [ + "0.064", + "0.080", + "0.113", + "0.134" + ], + "wire": "CLBLL_L_A4" + }, + "A5": { + "cap": "0.000", + "delay": [ + "0.026", + "0.032", + "0.042", + "0.050" + ], + "wire": "CLBLL_L_A5" + }, + "A6": { + "cap": "0.000", + "delay": [ + "0.002", + "0.002", + "0.002", + "0.003" + ], + "wire": "CLBLL_L_A6" + }, + "AMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "894.144625", + "wire": "CLBLL_L_AMUX" + }, + "AQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLL_L_AQ" + }, + "AX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_AX" + }, + "B": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "810.616125", + "wire": "CLBLL_L_B" + }, + "B1": { + "cap": "0.000", + "delay": [ + "0.133", + "0.165", + "0.217", + "0.257" + ], + "wire": "CLBLL_L_B1" + }, + "B2": { + "cap": "0.000", + "delay": [ + "0.129", + "0.161", + "0.213", + "0.251" + ], + "wire": "CLBLL_L_B2" + }, + "B3": { + "cap": "0.000", + "delay": [ + "0.080", + "0.100", + "0.142", + "0.168" + ], + "wire": "CLBLL_L_B3" + }, + "B4": { + "cap": "0.000", + "delay": [ + "0.065", + "0.081", + "0.113", + "0.134" + ], + "wire": "CLBLL_L_B4" + }, + "B5": { + "cap": "0.000", + "delay": [ + "0.027", + "0.033", + "0.043", + "0.051" + ], + "wire": "CLBLL_L_B5" + }, + "B6": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "CLBLL_L_B6" + }, + "BMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "884.3346875000001", + "wire": "CLBLL_L_BMUX" + }, + "BQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLL_L_BQ" + }, + "BX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_BX" + }, + "C": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "808.31575", + "wire": "CLBLL_L_C" + }, + "C1": { + "cap": "0.000", + "delay": [ + "0.133", + "0.165", + "0.217", + "0.257" + ], + "wire": "CLBLL_L_C1" + }, + "C2": { + "cap": "0.000", + "delay": [ + "0.129", + "0.161", + "0.212", + "0.250" + ], + "wire": "CLBLL_L_C2" + }, + "C3": { + "cap": "0.000", + "delay": [ + "0.080", + "0.100", + "0.142", + "0.168" + ], + "wire": "CLBLL_L_C3" + }, + "C4": { + "cap": "0.000", + "delay": [ + "0.065", + "0.081", + "0.114", + "0.135" + ], + "wire": "CLBLL_L_C4" + }, + "C5": { + "cap": "0.000", + "delay": [ + "0.026", + "0.032", + "0.044", + "0.052" + ], + "wire": "CLBLL_L_C5" + }, + "C6": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_C6" + }, + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CE" + }, + "CIN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CIN" + }, + "CLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CLK" + }, + "CMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "858.1766875000001", + "wire": "CLBLL_L_CMUX" + }, + "COUT": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "687.5", + "wire": "CLBLL_L_COUT" + }, + "CQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLL_L_CQ" + }, + "CX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CX" + }, + "D": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "810.3796249999999", + "wire": "CLBLL_L_D" + }, + "D1": { + "cap": "0.000", + "delay": [ + "0.135", + "0.168", + "0.221", + "0.262" + ], + "wire": "CLBLL_L_D1" + }, + "D2": { + "cap": "0.000", + "delay": [ + "0.131", + "0.163", + "0.213", + "0.252" + ], + "wire": "CLBLL_L_D2" + }, + "D3": { + "cap": "0.000", + "delay": [ + "0.079", + "0.099", + "0.141", + "0.167" + ], + "wire": "CLBLL_L_D3" + }, + "D4": { + "cap": "0.000", + "delay": [ + "0.066", + "0.082", + "0.116", + "0.138" + ], + "wire": "CLBLL_L_D4" + }, + "D5": { + "cap": "0.000", + "delay": [ + "0.026", + "0.032", + "0.042", + "0.050" + ], + "wire": "CLBLL_L_D5" + }, + "D6": { + "cap": "0.000", + "delay": [ + "0.002", + "0.002", + "0.002", + "0.003" + ], + "wire": "CLBLL_L_D6" + }, + "DMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "825.0027499999999", + "wire": "CLBLL_L_DMUX" + }, + "DQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLL_L_DQ" + }, + "DX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_DX" + }, + "SR": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_SR" + } + }, + "type": "SLICEL", + "x_coord": 1, + "y_coord": 0 } ], "tile_type": "CLBLL_L", diff --git a/kintex7/tile_type_CLBLM_L.json b/kintex7/tile_type_CLBLM_L.json index 9f9cbf0..7a2132f 100644 --- a/kintex7/tile_type_CLBLM_L.json +++ b/kintex7/tile_type_CLBLM_L.json @@ -3300,6 +3300,515 @@ } }, "sites": [ + { + "name": "X0Y0", + "prefix": "SLICE", + "site_pins": { + "A": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "834.5342499999999", + "wire": "CLBLM_M_A" + }, + "A1": { + "cap": "0.000", + "delay": [ + "0.143", + "0.178", + "0.226", + "0.268" + ], + "wire": "CLBLM_M_A1" + }, + "A2": { + "cap": "0.000", + "delay": [ + "0.136", + "0.170", + "0.216", + "0.256" + ], + "wire": "CLBLM_M_A2" + }, + "A3": { + "cap": "0.000", + "delay": [ + "0.088", + "0.109", + "0.150", + "0.178" + ], + "wire": "CLBLM_M_A3" + }, + "A4": { + "cap": "0.000", + "delay": [ + "0.071", + "0.088", + "0.124", + "0.146" + ], + "wire": "CLBLM_M_A4" + }, + "A5": { + "cap": "0.000", + "delay": [ + "0.030", + "0.037", + "0.052", + "0.061" + ], + "wire": "CLBLM_M_A5" + }, + "A6": { + "cap": "0.000", + "delay": [ + "0.005", + "0.006", + "0.007", + "0.009" + ], + "wire": "CLBLM_M_A6" + }, + "AI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_AI" + }, + "AMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "803.0701250000001", + "wire": "CLBLM_M_AMUX" + }, + "AQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLM_M_AQ" + }, + "AX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_AX" + }, + "B": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "869.1326875", + "wire": "CLBLM_M_B" + }, + "B1": { + "cap": "0.000", + "delay": [ + "0.140", + "0.175", + "0.223", + "0.264" + ], + "wire": "CLBLM_M_B1" + }, + "B2": { + "cap": "0.000", + "delay": [ + "0.136", + "0.170", + "0.215", + "0.254" + ], + "wire": "CLBLM_M_B2" + }, + "B3": { + "cap": "0.000", + "delay": [ + "0.088", + "0.109", + "0.151", + "0.179" + ], + "wire": "CLBLM_M_B3" + }, + "B4": { + "cap": "0.000", + "delay": [ + "0.071", + "0.088", + "0.124", + "0.146" + ], + "wire": "CLBLM_M_B4" + }, + "B5": { + "cap": "0.000", + "delay": [ + "0.032", + "0.040", + "0.053", + "0.063" + ], + "wire": "CLBLM_M_B5" + }, + "B6": { + "cap": "0.000", + "delay": [ + "0.004", + "0.005", + "0.005", + "0.007" + ], + "wire": "CLBLM_M_B6" + }, + "BI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_BI" + }, + "BMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "929.1287500000001", + "wire": "CLBLM_M_BMUX" + }, + "BQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLM_M_BQ" + }, + "BX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_BX" + }, + "C": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "884.2975625", + "wire": "CLBLM_M_C" + }, + "C1": { + "cap": "0.000", + "delay": [ + "0.140", + "0.175", + "0.223", + "0.265" + ], + "wire": "CLBLM_M_C1" + }, + "C2": { + "cap": "0.000", + "delay": [ + "0.137", + "0.171", + "0.216", + "0.256" + ], + "wire": "CLBLM_M_C2" + }, + "C3": { + "cap": "0.000", + "delay": [ + "0.089", + "0.110", + "0.151", + "0.179" + ], + "wire": "CLBLM_M_C3" + }, + "C4": { + "cap": "0.000", + "delay": [ + "0.072", + "0.089", + "0.124", + "0.146" + ], + "wire": "CLBLM_M_C4" + }, + "C5": { + "cap": "0.000", + "delay": [ + "0.032", + "0.040", + "0.055", + "0.065" + ], + "wire": "CLBLM_M_C5" + }, + "C6": { + "cap": "0.000", + "delay": [ + "0.004", + "0.005", + "0.005", + "0.007" + ], + "wire": "CLBLM_M_C6" + }, + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CE" + }, + "CI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CI" + }, + "CIN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CIN" + }, + "CLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CLK" + }, + "CMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "804.9298125", + "wire": "CLBLM_M_CMUX" + }, + "COUT": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "687.5", + "wire": "CLBLM_M_COUT" + }, + "CQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLM_M_CQ" + }, + "CX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CX" + }, + "D": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "890.8645625", + "wire": "CLBLM_M_D" + }, + "D1": { + "cap": "0.000", + "delay": [ + "0.145", + "0.180", + "0.239", + "0.274" + ], + "wire": "CLBLM_M_D1" + }, + "D2": { + "cap": "0.000", + "delay": [ + "0.141", + "0.175", + "0.230", + "0.264" + ], + "wire": "CLBLM_M_D2" + }, + "D3": { + "cap": "0.000", + "delay": [ + "0.088", + "0.112", + "0.157", + "0.183" + ], + "wire": "CLBLM_M_D3" + }, + "D4": { + "cap": "0.000", + "delay": [ + "0.073", + "0.094", + "0.131", + "0.156" + ], + "wire": "CLBLM_M_D4" + }, + "D5": { + "cap": "0.000", + "delay": [ + "0.031", + "0.041", + "0.055", + "0.066" + ], + "wire": "CLBLM_M_D5" + }, + "D6": { + "cap": "0.000", + "delay": [ + "0.003", + "0.008", + "0.007", + "0.011" + ], + "wire": "CLBLM_M_D6" + }, + "DI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_DI" + }, + "DMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "860.9596875000001", + "wire": "CLBLM_M_DMUX" + }, + "DQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "982.5915", + "wire": "CLBLM_M_DQ" + }, + "DX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_DX" + }, + "SR": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_SR" + }, + "WE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_WE" + } + }, + "type": "SLICEM", + "x_coord": 0, + "y_coord": 0 + }, { "name": "X1Y0", "prefix": "SLICE", @@ -3758,515 +4267,6 @@ "type": "SLICEL", "x_coord": 1, "y_coord": 0 - }, - { - "name": "X0Y0", - "prefix": "SLICE", - "site_pins": { - "A": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "834.5342499999999", - "wire": "CLBLM_M_A" - }, - "A1": { - "cap": "0.000", - "delay": [ - "0.143", - "0.178", - "0.226", - "0.268" - ], - "wire": "CLBLM_M_A1" - }, - "A2": { - "cap": "0.000", - "delay": [ - "0.136", - "0.170", - "0.216", - "0.256" - ], - "wire": "CLBLM_M_A2" - }, - "A3": { - "cap": "0.000", - "delay": [ - "0.088", - "0.109", - "0.150", - "0.178" - ], - "wire": "CLBLM_M_A3" - }, - "A4": { - "cap": "0.000", - "delay": [ - "0.071", - "0.088", - "0.124", - "0.146" - ], - "wire": "CLBLM_M_A4" - }, - "A5": { - "cap": "0.000", - "delay": [ - "0.030", - "0.037", - "0.052", - "0.061" - ], - "wire": "CLBLM_M_A5" - }, - "A6": { - "cap": "0.000", - "delay": [ - "0.005", - "0.006", - "0.007", - "0.009" - ], - "wire": "CLBLM_M_A6" - }, - "AI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_AI" - }, - "AMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "803.0701250000001", - "wire": "CLBLM_M_AMUX" - }, - "AQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLM_M_AQ" - }, - "AX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_AX" - }, - "B": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "869.1326875", - "wire": "CLBLM_M_B" - }, - "B1": { - "cap": "0.000", - "delay": [ - "0.140", - "0.175", - "0.223", - "0.264" - ], - "wire": "CLBLM_M_B1" - }, - "B2": { - "cap": "0.000", - "delay": [ - "0.136", - "0.170", - "0.215", - "0.254" - ], - "wire": "CLBLM_M_B2" - }, - "B3": { - "cap": "0.000", - "delay": [ - "0.088", - "0.109", - "0.151", - "0.179" - ], - "wire": "CLBLM_M_B3" - }, - "B4": { - "cap": "0.000", - "delay": [ - "0.071", - "0.088", - "0.124", - "0.146" - ], - "wire": "CLBLM_M_B4" - }, - "B5": { - "cap": "0.000", - "delay": [ - "0.032", - "0.040", - "0.053", - "0.063" - ], - "wire": "CLBLM_M_B5" - }, - "B6": { - "cap": "0.000", - "delay": [ - "0.004", - "0.005", - "0.005", - "0.007" - ], - "wire": "CLBLM_M_B6" - }, - "BI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_BI" - }, - "BMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "929.1287500000001", - "wire": "CLBLM_M_BMUX" - }, - "BQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLM_M_BQ" - }, - "BX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_BX" - }, - "C": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "884.2975625", - "wire": "CLBLM_M_C" - }, - "C1": { - "cap": "0.000", - "delay": [ - "0.140", - "0.175", - "0.223", - "0.265" - ], - "wire": "CLBLM_M_C1" - }, - "C2": { - "cap": "0.000", - "delay": [ - "0.137", - "0.171", - "0.216", - "0.256" - ], - "wire": "CLBLM_M_C2" - }, - "C3": { - "cap": "0.000", - "delay": [ - "0.089", - "0.110", - "0.151", - "0.179" - ], - "wire": "CLBLM_M_C3" - }, - "C4": { - "cap": "0.000", - "delay": [ - "0.072", - "0.089", - "0.124", - "0.146" - ], - "wire": "CLBLM_M_C4" - }, - "C5": { - "cap": "0.000", - "delay": [ - "0.032", - "0.040", - "0.055", - "0.065" - ], - "wire": "CLBLM_M_C5" - }, - "C6": { - "cap": "0.000", - "delay": [ - "0.004", - "0.005", - "0.005", - "0.007" - ], - "wire": "CLBLM_M_C6" - }, - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CE" - }, - "CI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CI" - }, - "CIN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CIN" - }, - "CLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CLK" - }, - "CMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "804.9298125", - "wire": "CLBLM_M_CMUX" - }, - "COUT": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "687.5", - "wire": "CLBLM_M_COUT" - }, - "CQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLM_M_CQ" - }, - "CX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CX" - }, - "D": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "890.8645625", - "wire": "CLBLM_M_D" - }, - "D1": { - "cap": "0.000", - "delay": [ - "0.145", - "0.180", - "0.239", - "0.274" - ], - "wire": "CLBLM_M_D1" - }, - "D2": { - "cap": "0.000", - "delay": [ - "0.141", - "0.175", - "0.230", - "0.264" - ], - "wire": "CLBLM_M_D2" - }, - "D3": { - "cap": "0.000", - "delay": [ - "0.088", - "0.112", - "0.157", - "0.183" - ], - "wire": "CLBLM_M_D3" - }, - "D4": { - "cap": "0.000", - "delay": [ - "0.073", - "0.094", - "0.131", - "0.156" - ], - "wire": "CLBLM_M_D4" - }, - "D5": { - "cap": "0.000", - "delay": [ - "0.031", - "0.041", - "0.055", - "0.066" - ], - "wire": "CLBLM_M_D5" - }, - "D6": { - "cap": "0.000", - "delay": [ - "0.003", - "0.007", - "0.008", - "0.011" - ], - "wire": "CLBLM_M_D6" - }, - "DI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_DI" - }, - "DMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "860.9596875000001", - "wire": "CLBLM_M_DMUX" - }, - "DQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "982.5915", - "wire": "CLBLM_M_DQ" - }, - "DX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_DX" - }, - "SR": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_SR" - }, - "WE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_WE" - } - }, - "type": "SLICEM", - "x_coord": 0, - "y_coord": 0 } ], "tile_type": "CLBLM_L", diff --git a/kintex7/tile_type_CLBLM_R.json b/kintex7/tile_type_CLBLM_R.json index 2d50834..e8ec649 100644 --- a/kintex7/tile_type_CLBLM_R.json +++ b/kintex7/tile_type_CLBLM_R.json @@ -3738,8 +3738,8 @@ "cap": "0.000", "delay": [ "0.003", - "0.007", "0.008", + "0.007", "0.011" ], "wire": "CLBLM_M_D6" diff --git a/kintex7/tile_type_CLK_HROW_BOT_R.json b/kintex7/tile_type_CLK_HROW_BOT_R.json index 28e1dab..e3538d8 100644 --- a/kintex7/tile_type_CLK_HROW_BOT_R.json +++ b/kintex7/tile_type_CLK_HROW_BOT_R.json @@ -9893,9 +9893,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9907,9 +9907,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9921,9 +9921,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9935,9 +9935,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9949,9 +9949,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9963,9 +9963,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9977,9 +9977,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9991,9 +9991,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10005,9 +10005,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10019,9 +10019,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10033,9 +10033,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10047,9 +10047,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10061,9 +10061,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10075,9 +10075,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10089,9 +10089,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10103,9 +10103,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10117,9 +10117,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10131,9 +10131,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10145,9 +10145,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10159,9 +10159,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10173,9 +10173,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10187,9 +10187,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10201,9 +10201,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10215,9 +10215,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10229,9 +10229,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10243,9 +10243,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10257,9 +10257,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10271,9 +10271,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10285,9 +10285,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10299,9 +10299,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10313,9 +10313,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10327,9 +10327,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10341,9 +10341,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10355,9 +10355,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10369,9 +10369,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10383,9 +10383,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10397,9 +10397,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10411,9 +10411,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10425,9 +10425,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10439,9 +10439,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10453,9 +10453,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10467,9 +10467,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10481,9 +10481,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10495,9 +10495,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10509,9 +10509,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10523,9 +10523,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10537,9 +10537,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -10551,9 +10551,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null diff --git a/kintex7/tile_type_CLK_HROW_TOP_R.json b/kintex7/tile_type_CLK_HROW_TOP_R.json index d62aa8f..60ce260 100644 --- a/kintex7/tile_type_CLK_HROW_TOP_R.json +++ b/kintex7/tile_type_CLK_HROW_TOP_R.json @@ -8997,9 +8997,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9011,9 +9011,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9025,9 +9025,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9039,9 +9039,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9053,9 +9053,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9067,9 +9067,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9081,9 +9081,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9095,9 +9095,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9109,9 +9109,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9123,9 +9123,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9137,9 +9137,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9151,9 +9151,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9165,9 +9165,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9179,9 +9179,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9193,9 +9193,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9207,9 +9207,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9221,9 +9221,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9235,9 +9235,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9249,9 +9249,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9263,9 +9263,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9277,9 +9277,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9291,9 +9291,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9305,9 +9305,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9319,9 +9319,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9333,9 +9333,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9347,9 +9347,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9361,9 +9361,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9375,9 +9375,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9389,9 +9389,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9403,9 +9403,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9417,9 +9417,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9431,9 +9431,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9445,9 +9445,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9459,9 +9459,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9473,9 +9473,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9487,9 +9487,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9501,9 +9501,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9515,9 +9515,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9529,9 +9529,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9543,9 +9543,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9557,9 +9557,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9571,9 +9571,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9585,9 +9585,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9599,9 +9599,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9613,9 +9613,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9627,9 +9627,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9641,9 +9641,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null @@ -9655,9 +9655,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.120", "0.000", - "0.000", - "0.120" + "0.000" ], "in_cap": null, "res": null diff --git a/kintex7/tile_type_CMT_FIFO_L.json b/kintex7/tile_type_CMT_FIFO_L.json index acd0eef..709332a 100644 --- a/kintex7/tile_type_CMT_FIFO_L.json +++ b/kintex7/tile_type_CMT_FIFO_L.json @@ -5006,1505 +5006,6 @@ } }, "sites": [ - { - "name": "X0Y0", - "prefix": "OUT_FIFO", - "site_pins": { - "ALMOSTEMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" - }, - "ALMOSTFULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTFULL" - }, - "D00": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D00" - }, - "D01": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D01" - }, - "D02": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D02" - }, - "D03": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D03" - }, - "D04": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D04" - }, - "D05": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D05" - }, - "D06": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D06" - }, - "D07": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D07" - }, - "D10": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D10" - }, - "D11": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D11" - }, - "D12": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D12" - }, - "D13": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D13" - }, - "D14": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D14" - }, - "D15": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D15" - }, - "D16": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D16" - }, - "D17": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D17" - }, - "D20": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D20" - }, - "D21": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D21" - }, - "D22": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D22" - }, - "D23": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D23" - }, - "D24": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D24" - }, - "D25": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D25" - }, - "D26": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D26" - }, - "D27": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D27" - }, - "D30": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D30" - }, - "D31": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D31" - }, - "D32": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D32" - }, - "D33": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D33" - }, - "D34": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D34" - }, - "D35": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D35" - }, - "D36": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D36" - }, - "D37": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D37" - }, - "D40": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D40" - }, - "D41": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D41" - }, - "D42": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D42" - }, - "D43": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D43" - }, - "D44": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D44" - }, - "D45": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D45" - }, - "D46": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D46" - }, - "D47": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D47" - }, - "D50": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D50" - }, - "D51": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D51" - }, - "D52": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D52" - }, - "D53": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D53" - }, - "D54": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D54" - }, - "D55": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D55" - }, - "D56": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D56" - }, - "D57": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D57" - }, - "D60": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D60" - }, - "D61": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D61" - }, - "D62": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D62" - }, - "D63": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D63" - }, - "D64": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D64" - }, - "D65": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D65" - }, - "D66": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D66" - }, - "D67": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D67" - }, - "D70": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D70" - }, - "D71": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D71" - }, - "D72": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D72" - }, - "D73": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D73" - }, - "D74": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D74" - }, - "D75": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D75" - }, - "D76": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D76" - }, - "D77": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D77" - }, - "D80": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D80" - }, - "D81": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D81" - }, - "D82": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D82" - }, - "D83": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D83" - }, - "D84": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D84" - }, - "D85": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D85" - }, - "D86": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D86" - }, - "D87": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D87" - }, - "D90": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D90" - }, - "D91": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D91" - }, - "D92": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D92" - }, - "D93": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D93" - }, - "D94": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D94" - }, - "D95": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D95" - }, - "D96": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D96" - }, - "D97": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D97" - }, - "EMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_EMPTY" - }, - "FULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_FULL" - }, - "Q00": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q00" - }, - "Q01": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q01" - }, - "Q02": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q02" - }, - "Q03": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q03" - }, - "Q10": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q10" - }, - "Q11": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q11" - }, - "Q12": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q12" - }, - "Q13": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q13" - }, - "Q20": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q20" - }, - "Q21": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q21" - }, - "Q22": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q22" - }, - "Q23": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q23" - }, - "Q30": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q30" - }, - "Q31": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q31" - }, - "Q32": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q32" - }, - "Q33": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q33" - }, - "Q40": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q40" - }, - "Q41": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q41" - }, - "Q42": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q42" - }, - "Q43": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q43" - }, - "Q50": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q50" - }, - "Q51": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q51" - }, - "Q52": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q52" - }, - "Q53": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q53" - }, - "Q54": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q54" - }, - "Q55": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q55" - }, - "Q56": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q56" - }, - "Q57": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q57" - }, - "Q60": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q60" - }, - "Q61": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q61" - }, - "Q62": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q62" - }, - "Q63": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q63" - }, - "Q64": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q64" - }, - "Q65": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q65" - }, - "Q66": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q66" - }, - "Q67": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q67" - }, - "Q70": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q70" - }, - "Q71": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q71" - }, - "Q72": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q72" - }, - "Q73": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q73" - }, - "Q80": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q80" - }, - "Q81": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q81" - }, - "Q82": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q82" - }, - "Q83": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q83" - }, - "Q90": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q90" - }, - "Q91": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q91" - }, - "Q92": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q92" - }, - "Q93": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q93" - }, - "RDCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDCLK" - }, - "RDEN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDEN" - }, - "RESET": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RESET" - }, - "SCANENB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANENB" - }, - "SCANIN0": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN0" - }, - "SCANIN1": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN1" - }, - "SCANIN2": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN2" - }, - "SCANIN3": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN3" - }, - "SCANOUT0": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT0" - }, - "SCANOUT1": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT1" - }, - "SCANOUT2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT2" - }, - "SCANOUT3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT3" - }, - "TESTMODEB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTMODEB" - }, - "TESTREADDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTREADDISB" - }, - "TESTWRITEDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTWRITEDISB" - }, - "WRCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WRCLK" - }, - "WREN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WREN" - } - }, - "type": "OUT_FIFO", - "x_coord": 0, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "IN_FIFO", @@ -8003,6 +6504,1505 @@ "type": "IN_FIFO", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y0", + "prefix": "OUT_FIFO", + "site_pins": { + "ALMOSTEMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" + }, + "ALMOSTFULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTFULL" + }, + "D00": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D00" + }, + "D01": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D01" + }, + "D02": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D02" + }, + "D03": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D03" + }, + "D04": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D04" + }, + "D05": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D05" + }, + "D06": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D06" + }, + "D07": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D07" + }, + "D10": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D10" + }, + "D11": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D11" + }, + "D12": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D12" + }, + "D13": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D13" + }, + "D14": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D14" + }, + "D15": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D15" + }, + "D16": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D16" + }, + "D17": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D17" + }, + "D20": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D20" + }, + "D21": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D21" + }, + "D22": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D22" + }, + "D23": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D23" + }, + "D24": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D24" + }, + "D25": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D25" + }, + "D26": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D26" + }, + "D27": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D27" + }, + "D30": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D30" + }, + "D31": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D31" + }, + "D32": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D32" + }, + "D33": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D33" + }, + "D34": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D34" + }, + "D35": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D35" + }, + "D36": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D36" + }, + "D37": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D37" + }, + "D40": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D40" + }, + "D41": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D41" + }, + "D42": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D42" + }, + "D43": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D43" + }, + "D44": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D44" + }, + "D45": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D45" + }, + "D46": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D46" + }, + "D47": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D47" + }, + "D50": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D50" + }, + "D51": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D51" + }, + "D52": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D52" + }, + "D53": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D53" + }, + "D54": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D54" + }, + "D55": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D55" + }, + "D56": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D56" + }, + "D57": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D57" + }, + "D60": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D60" + }, + "D61": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D61" + }, + "D62": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D62" + }, + "D63": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D63" + }, + "D64": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D64" + }, + "D65": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D65" + }, + "D66": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D66" + }, + "D67": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D67" + }, + "D70": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D70" + }, + "D71": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D71" + }, + "D72": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D72" + }, + "D73": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D73" + }, + "D74": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D74" + }, + "D75": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D75" + }, + "D76": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D76" + }, + "D77": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D77" + }, + "D80": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D80" + }, + "D81": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D81" + }, + "D82": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D82" + }, + "D83": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D83" + }, + "D84": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D84" + }, + "D85": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D85" + }, + "D86": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D86" + }, + "D87": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D87" + }, + "D90": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D90" + }, + "D91": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D91" + }, + "D92": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D92" + }, + "D93": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D93" + }, + "D94": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D94" + }, + "D95": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D95" + }, + "D96": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D96" + }, + "D97": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D97" + }, + "EMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_EMPTY" + }, + "FULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_FULL" + }, + "Q00": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q00" + }, + "Q01": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q01" + }, + "Q02": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q02" + }, + "Q03": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q03" + }, + "Q10": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q10" + }, + "Q11": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q11" + }, + "Q12": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q12" + }, + "Q13": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q13" + }, + "Q20": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q20" + }, + "Q21": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q21" + }, + "Q22": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q22" + }, + "Q23": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q23" + }, + "Q30": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q30" + }, + "Q31": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q31" + }, + "Q32": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q32" + }, + "Q33": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q33" + }, + "Q40": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q40" + }, + "Q41": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q41" + }, + "Q42": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q42" + }, + "Q43": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q43" + }, + "Q50": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q50" + }, + "Q51": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q51" + }, + "Q52": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q52" + }, + "Q53": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q53" + }, + "Q54": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q54" + }, + "Q55": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q55" + }, + "Q56": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q56" + }, + "Q57": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q57" + }, + "Q60": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q60" + }, + "Q61": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q61" + }, + "Q62": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q62" + }, + "Q63": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q63" + }, + "Q64": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q64" + }, + "Q65": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q65" + }, + "Q66": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q66" + }, + "Q67": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q67" + }, + "Q70": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q70" + }, + "Q71": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q71" + }, + "Q72": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q72" + }, + "Q73": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q73" + }, + "Q80": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q80" + }, + "Q81": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q81" + }, + "Q82": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q82" + }, + "Q83": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q83" + }, + "Q90": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q90" + }, + "Q91": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q91" + }, + "Q92": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q92" + }, + "Q93": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q93" + }, + "RDCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDCLK" + }, + "RDEN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDEN" + }, + "RESET": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RESET" + }, + "SCANENB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANENB" + }, + "SCANIN0": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN0" + }, + "SCANIN1": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN1" + }, + "SCANIN2": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN2" + }, + "SCANIN3": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN3" + }, + "SCANOUT0": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT0" + }, + "SCANOUT1": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT1" + }, + "SCANOUT2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT2" + }, + "SCANOUT3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT3" + }, + "TESTMODEB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTMODEB" + }, + "TESTREADDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTREADDISB" + }, + "TESTWRITEDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTWRITEDISB" + }, + "WRCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WRCLK" + }, + "WREN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WREN" + } + }, + "type": "OUT_FIFO", + "x_coord": 0, + "y_coord": 0 } ], "tile_type": "CMT_FIFO_L", diff --git a/kintex7/tile_type_CMT_FIFO_R.json b/kintex7/tile_type_CMT_FIFO_R.json index 9d62168..7cf03c8 100644 --- a/kintex7/tile_type_CMT_FIFO_R.json +++ b/kintex7/tile_type_CMT_FIFO_R.json @@ -5006,1505 +5006,6 @@ } }, "sites": [ - { - "name": "X0Y0", - "prefix": "OUT_FIFO", - "site_pins": { - "ALMOSTEMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" - }, - "ALMOSTFULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTFULL" - }, - "D00": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D00" - }, - "D01": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D01" - }, - "D02": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D02" - }, - "D03": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D03" - }, - "D04": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D04" - }, - "D05": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D05" - }, - "D06": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D06" - }, - "D07": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D07" - }, - "D10": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D10" - }, - "D11": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D11" - }, - "D12": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D12" - }, - "D13": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D13" - }, - "D14": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D14" - }, - "D15": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D15" - }, - "D16": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D16" - }, - "D17": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D17" - }, - "D20": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D20" - }, - "D21": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D21" - }, - "D22": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D22" - }, - "D23": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D23" - }, - "D24": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D24" - }, - "D25": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D25" - }, - "D26": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D26" - }, - "D27": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D27" - }, - "D30": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D30" - }, - "D31": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D31" - }, - "D32": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D32" - }, - "D33": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D33" - }, - "D34": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D34" - }, - "D35": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D35" - }, - "D36": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D36" - }, - "D37": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D37" - }, - "D40": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D40" - }, - "D41": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D41" - }, - "D42": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D42" - }, - "D43": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D43" - }, - "D44": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D44" - }, - "D45": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D45" - }, - "D46": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D46" - }, - "D47": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D47" - }, - "D50": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D50" - }, - "D51": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D51" - }, - "D52": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D52" - }, - "D53": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D53" - }, - "D54": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D54" - }, - "D55": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D55" - }, - "D56": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D56" - }, - "D57": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D57" - }, - "D60": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D60" - }, - "D61": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D61" - }, - "D62": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D62" - }, - "D63": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D63" - }, - "D64": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D64" - }, - "D65": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D65" - }, - "D66": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D66" - }, - "D67": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D67" - }, - "D70": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D70" - }, - "D71": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D71" - }, - "D72": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D72" - }, - "D73": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D73" - }, - "D74": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D74" - }, - "D75": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D75" - }, - "D76": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D76" - }, - "D77": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D77" - }, - "D80": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D80" - }, - "D81": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D81" - }, - "D82": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D82" - }, - "D83": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D83" - }, - "D84": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D84" - }, - "D85": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D85" - }, - "D86": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D86" - }, - "D87": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D87" - }, - "D90": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D90" - }, - "D91": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D91" - }, - "D92": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D92" - }, - "D93": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D93" - }, - "D94": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D94" - }, - "D95": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D95" - }, - "D96": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D96" - }, - "D97": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D97" - }, - "EMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_EMPTY" - }, - "FULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_FULL" - }, - "Q00": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q00" - }, - "Q01": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q01" - }, - "Q02": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q02" - }, - "Q03": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q03" - }, - "Q10": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q10" - }, - "Q11": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q11" - }, - "Q12": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q12" - }, - "Q13": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q13" - }, - "Q20": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q20" - }, - "Q21": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q21" - }, - "Q22": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q22" - }, - "Q23": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q23" - }, - "Q30": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q30" - }, - "Q31": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q31" - }, - "Q32": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q32" - }, - "Q33": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q33" - }, - "Q40": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q40" - }, - "Q41": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q41" - }, - "Q42": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q42" - }, - "Q43": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q43" - }, - "Q50": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q50" - }, - "Q51": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q51" - }, - "Q52": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q52" - }, - "Q53": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q53" - }, - "Q54": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q54" - }, - "Q55": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q55" - }, - "Q56": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q56" - }, - "Q57": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q57" - }, - "Q60": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q60" - }, - "Q61": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q61" - }, - "Q62": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q62" - }, - "Q63": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q63" - }, - "Q64": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q64" - }, - "Q65": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q65" - }, - "Q66": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q66" - }, - "Q67": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q67" - }, - "Q70": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q70" - }, - "Q71": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q71" - }, - "Q72": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q72" - }, - "Q73": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q73" - }, - "Q80": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q80" - }, - "Q81": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q81" - }, - "Q82": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q82" - }, - "Q83": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q83" - }, - "Q90": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q90" - }, - "Q91": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q91" - }, - "Q92": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q92" - }, - "Q93": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q93" - }, - "RDCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDCLK" - }, - "RDEN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDEN" - }, - "RESET": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RESET" - }, - "SCANENB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANENB" - }, - "SCANIN0": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN0" - }, - "SCANIN1": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN1" - }, - "SCANIN2": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN2" - }, - "SCANIN3": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN3" - }, - "SCANOUT0": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT0" - }, - "SCANOUT1": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT1" - }, - "SCANOUT2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT2" - }, - "SCANOUT3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT3" - }, - "TESTMODEB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTMODEB" - }, - "TESTREADDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTREADDISB" - }, - "TESTWRITEDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTWRITEDISB" - }, - "WRCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WRCLK" - }, - "WREN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WREN" - } - }, - "type": "OUT_FIFO", - "x_coord": 0, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "IN_FIFO", @@ -8003,6 +6504,1505 @@ "type": "IN_FIFO", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y0", + "prefix": "OUT_FIFO", + "site_pins": { + "ALMOSTEMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" + }, + "ALMOSTFULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTFULL" + }, + "D00": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D00" + }, + "D01": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D01" + }, + "D02": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D02" + }, + "D03": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D03" + }, + "D04": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D04" + }, + "D05": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D05" + }, + "D06": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D06" + }, + "D07": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D07" + }, + "D10": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D10" + }, + "D11": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D11" + }, + "D12": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D12" + }, + "D13": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D13" + }, + "D14": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D14" + }, + "D15": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D15" + }, + "D16": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D16" + }, + "D17": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D17" + }, + "D20": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D20" + }, + "D21": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D21" + }, + "D22": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D22" + }, + "D23": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D23" + }, + "D24": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D24" + }, + "D25": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D25" + }, + "D26": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D26" + }, + "D27": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D27" + }, + "D30": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D30" + }, + "D31": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D31" + }, + "D32": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D32" + }, + "D33": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D33" + }, + "D34": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D34" + }, + "D35": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D35" + }, + "D36": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D36" + }, + "D37": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D37" + }, + "D40": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D40" + }, + "D41": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D41" + }, + "D42": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D42" + }, + "D43": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D43" + }, + "D44": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D44" + }, + "D45": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D45" + }, + "D46": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D46" + }, + "D47": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D47" + }, + "D50": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D50" + }, + "D51": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D51" + }, + "D52": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D52" + }, + "D53": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D53" + }, + "D54": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D54" + }, + "D55": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D55" + }, + "D56": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D56" + }, + "D57": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D57" + }, + "D60": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D60" + }, + "D61": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D61" + }, + "D62": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D62" + }, + "D63": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D63" + }, + "D64": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D64" + }, + "D65": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D65" + }, + "D66": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D66" + }, + "D67": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D67" + }, + "D70": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D70" + }, + "D71": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D71" + }, + "D72": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D72" + }, + "D73": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D73" + }, + "D74": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D74" + }, + "D75": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D75" + }, + "D76": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D76" + }, + "D77": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D77" + }, + "D80": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D80" + }, + "D81": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D81" + }, + "D82": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D82" + }, + "D83": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D83" + }, + "D84": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D84" + }, + "D85": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D85" + }, + "D86": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D86" + }, + "D87": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D87" + }, + "D90": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D90" + }, + "D91": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D91" + }, + "D92": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D92" + }, + "D93": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D93" + }, + "D94": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D94" + }, + "D95": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D95" + }, + "D96": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D96" + }, + "D97": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D97" + }, + "EMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_EMPTY" + }, + "FULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_FULL" + }, + "Q00": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q00" + }, + "Q01": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q01" + }, + "Q02": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q02" + }, + "Q03": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q03" + }, + "Q10": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q10" + }, + "Q11": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q11" + }, + "Q12": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q12" + }, + "Q13": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q13" + }, + "Q20": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q20" + }, + "Q21": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q21" + }, + "Q22": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q22" + }, + "Q23": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q23" + }, + "Q30": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q30" + }, + "Q31": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q31" + }, + "Q32": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q32" + }, + "Q33": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q33" + }, + "Q40": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q40" + }, + "Q41": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q41" + }, + "Q42": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q42" + }, + "Q43": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q43" + }, + "Q50": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q50" + }, + "Q51": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q51" + }, + "Q52": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q52" + }, + "Q53": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q53" + }, + "Q54": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q54" + }, + "Q55": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q55" + }, + "Q56": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q56" + }, + "Q57": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q57" + }, + "Q60": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q60" + }, + "Q61": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q61" + }, + "Q62": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q62" + }, + "Q63": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q63" + }, + "Q64": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q64" + }, + "Q65": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q65" + }, + "Q66": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q66" + }, + "Q67": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q67" + }, + "Q70": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q70" + }, + "Q71": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q71" + }, + "Q72": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q72" + }, + "Q73": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q73" + }, + "Q80": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q80" + }, + "Q81": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q81" + }, + "Q82": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q82" + }, + "Q83": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q83" + }, + "Q90": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q90" + }, + "Q91": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q91" + }, + "Q92": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q92" + }, + "Q93": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q93" + }, + "RDCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDCLK" + }, + "RDEN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDEN" + }, + "RESET": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RESET" + }, + "SCANENB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANENB" + }, + "SCANIN0": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN0" + }, + "SCANIN1": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN1" + }, + "SCANIN2": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN2" + }, + "SCANIN3": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN3" + }, + "SCANOUT0": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT0" + }, + "SCANOUT1": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT1" + }, + "SCANOUT2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT2" + }, + "SCANOUT3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT3" + }, + "TESTMODEB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTMODEB" + }, + "TESTREADDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTREADDISB" + }, + "TESTWRITEDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTWRITEDISB" + }, + "WRCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WRCLK" + }, + "WREN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WREN" + } + }, + "type": "OUT_FIFO", + "x_coord": 0, + "y_coord": 0 } ], "tile_type": "CMT_FIFO_R", diff --git a/kintex7/tile_type_HCLK_CMT.json b/kintex7/tile_type_HCLK_CMT.json index e01145e..307f812 100644 --- a/kintex7/tile_type_HCLK_CMT.json +++ b/kintex7/tile_type_HCLK_CMT.json @@ -27478,45 +27478,6 @@ } }, "sites": [ - { - "name": "X0Y1", - "prefix": "BUFMRCE", - "site_pins": { - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "HCLK_CMT_BUFMRCE_CEINP1" - }, - "I": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "HCLK_CMT_BUFMR_INP1" - }, - "O": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "HCLK_CMT_BUFMRCE_O1" - } - }, - "type": "BUFMRCE", - "x_coord": 0, - "y_coord": 1 - }, { "name": "X0Y0", "prefix": "BUFMRCE", @@ -27555,6 +27516,45 @@ "type": "BUFMRCE", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y1", + "prefix": "BUFMRCE", + "site_pins": { + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "HCLK_CMT_BUFMRCE_CEINP1" + }, + "I": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "HCLK_CMT_BUFMR_INP1" + }, + "O": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "HCLK_CMT_BUFMRCE_O1" + } + }, + "type": "BUFMRCE", + "x_coord": 0, + "y_coord": 1 } ], "tile_type": "HCLK_CMT", diff --git a/kintex7/tile_type_HCLK_CMT_L.json b/kintex7/tile_type_HCLK_CMT_L.json index 94dc441..4d8ed0e 100644 --- a/kintex7/tile_type_HCLK_CMT_L.json +++ b/kintex7/tile_type_HCLK_CMT_L.json @@ -27478,45 +27478,6 @@ } }, "sites": [ - { - "name": "X0Y1", - "prefix": "BUFMRCE", - "site_pins": { - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "HCLK_CMT_BUFMRCE_CEINP1" - }, - "I": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "HCLK_CMT_BUFMR_INP1" - }, - "O": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "HCLK_CMT_BUFMRCE_O1" - } - }, - "type": "BUFMRCE", - "x_coord": 0, - "y_coord": 1 - }, { "name": "X0Y0", "prefix": "BUFMRCE", @@ -27555,6 +27516,45 @@ "type": "BUFMRCE", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y1", + "prefix": "BUFMRCE", + "site_pins": { + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "HCLK_CMT_BUFMRCE_CEINP1" + }, + "I": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "HCLK_CMT_BUFMR_INP1" + }, + "O": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "HCLK_CMT_BUFMRCE_O1" + } + }, + "type": "BUFMRCE", + "x_coord": 0, + "y_coord": 1 } ], "tile_type": "HCLK_CMT_L", diff --git a/kintex7/tile_type_INT_L.json b/kintex7/tile_type_INT_L.json index b226bfd..fc7ce25 100644 --- a/kintex7/tile_type_INT_L.json +++ b/kintex7/tile_type_INT_L.json @@ -12856,13 +12856,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -12870,13 +12870,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "ER1END0" }, @@ -12884,13 +12884,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -12898,13 +12898,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "ER1END0" }, @@ -23048,13 +23048,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23062,13 +23062,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH0" }, @@ -23076,13 +23076,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23090,13 +23090,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH0" }, @@ -23356,13 +23356,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23370,13 +23370,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23384,13 +23384,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23398,13 +23398,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23412,13 +23412,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -23426,13 +23426,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23440,13 +23440,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -23454,13 +23454,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23692,13 +23692,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23706,13 +23706,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH12" }, @@ -23720,13 +23720,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23734,13 +23734,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH12" }, @@ -45672,13 +45672,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "0", @@ -45686,13 +45686,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LVB_L0" }, @@ -45952,13 +45952,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -45966,13 +45966,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV_L0" }, @@ -45980,13 +45980,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -45994,13 +45994,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV_L0" }, @@ -46204,13 +46204,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46232,13 +46232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH12", "is_directional": "0", @@ -46260,13 +46260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "0", @@ -46274,13 +46274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV_L0" }, @@ -46596,13 +46596,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -46610,13 +46610,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV_L18" }, @@ -46624,13 +46624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -46638,13 +46638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV_L18" }, @@ -46848,13 +46848,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46876,13 +46876,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH12", "is_directional": "0", @@ -49116,13 +49116,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -49130,13 +49130,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NE2END2" }, @@ -49144,13 +49144,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -49158,13 +49158,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NE2END2" }, @@ -58860,13 +58860,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -58874,13 +58874,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END0" }, @@ -58888,13 +58888,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -58902,13 +58902,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END0" }, @@ -60260,13 +60260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -60274,13 +60274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END3" }, @@ -60288,13 +60288,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -60302,13 +60302,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END3" }, @@ -61240,13 +61240,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -61254,13 +61254,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END0" }, @@ -61268,13 +61268,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -61282,13 +61282,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END0" }, @@ -63424,13 +63424,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -63438,13 +63438,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END3" }, @@ -63452,13 +63452,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -63466,13 +63466,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END3" }, @@ -65524,13 +65524,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -65538,13 +65538,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW2END2" }, @@ -65552,13 +65552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -65566,13 +65566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW2END2" }, @@ -67372,13 +67372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -67386,13 +67386,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END0" }, @@ -67400,13 +67400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -67414,13 +67414,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END0" }, @@ -68660,13 +68660,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -68674,13 +68674,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END3" }, @@ -68688,13 +68688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -68702,13 +68702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END3" }, @@ -72552,13 +72552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -72566,13 +72566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE2END3" }, @@ -72580,13 +72580,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -72594,13 +72594,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE2END3" }, @@ -74456,13 +74456,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -74470,13 +74470,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE6END3" }, @@ -74484,13 +74484,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -74498,13 +74498,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE6END3" }, @@ -78012,13 +78012,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -78026,13 +78026,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SR1BEG_S0" }, @@ -78040,13 +78040,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -78054,13 +78054,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SR1BEG_S0" }, @@ -88232,13 +88232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -88246,13 +88246,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END2" }, @@ -88260,13 +88260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -88274,13 +88274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END2" }, @@ -89072,13 +89072,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -89086,13 +89086,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END3" }, @@ -89100,13 +89100,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -89114,13 +89114,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END3" }, @@ -89688,13 +89688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -89702,13 +89702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END0" }, @@ -89716,13 +89716,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -89730,13 +89730,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END0" }, @@ -90696,13 +90696,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -90710,13 +90710,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END2" }, @@ -90724,13 +90724,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -90738,13 +90738,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END2" }, @@ -96464,13 +96464,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -96478,13 +96478,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END0" }, @@ -96492,13 +96492,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -96506,13 +96506,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END0" }, @@ -98536,13 +98536,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -98550,13 +98550,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END3" }, @@ -98564,13 +98564,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -98578,13 +98578,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END3" }, @@ -102624,13 +102624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -102638,13 +102638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END0" }, @@ -102652,13 +102652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -102666,13 +102666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END0" }, @@ -103940,13 +103940,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -103954,13 +103954,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END3" }, @@ -103968,13 +103968,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -103982,13 +103982,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END3" }, diff --git a/kintex7/tile_type_INT_R.json b/kintex7/tile_type_INT_R.json index fa46109..87aec1b 100644 --- a/kintex7/tile_type_INT_R.json +++ b/kintex7/tile_type_INT_R.json @@ -12856,13 +12856,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -12870,13 +12870,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "ER1END0" }, @@ -12884,13 +12884,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -12898,13 +12898,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "ER1END0" }, @@ -23048,13 +23048,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23062,13 +23062,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH0" }, @@ -23076,13 +23076,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23090,13 +23090,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH0" }, @@ -23356,13 +23356,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -23370,13 +23370,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23384,13 +23384,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -23398,13 +23398,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23412,13 +23412,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23426,13 +23426,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23440,13 +23440,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23454,13 +23454,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH6" }, @@ -23692,13 +23692,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23706,13 +23706,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH12" }, @@ -23720,13 +23720,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23734,13 +23734,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LH12" }, @@ -45476,13 +45476,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -45490,13 +45490,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV0" }, @@ -45504,13 +45504,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -45518,13 +45518,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV0" }, @@ -45728,13 +45728,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH0", "is_directional": "0", @@ -45756,13 +45756,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH12", "is_directional": "0", @@ -45784,13 +45784,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "0", @@ -45798,13 +45798,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV0" }, @@ -46120,13 +46120,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -46134,13 +46134,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV18" }, @@ -46148,13 +46148,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -46162,13 +46162,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LV18" }, @@ -46372,13 +46372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46400,13 +46400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.569375" }, "dst_wire": "LH12", "is_directional": "0", @@ -46652,13 +46652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "0", @@ -46666,13 +46666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "LVB0" }, @@ -49116,13 +49116,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -49130,13 +49130,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NE2END2" }, @@ -49144,13 +49144,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -49158,13 +49158,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NE2END2" }, @@ -58860,13 +58860,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -58874,13 +58874,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END0" }, @@ -58888,13 +58888,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -58902,13 +58902,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END0" }, @@ -60260,13 +60260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -60274,13 +60274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END3" }, @@ -60288,13 +60288,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -60302,13 +60302,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NN6END3" }, @@ -61240,13 +61240,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -61254,13 +61254,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END0" }, @@ -61268,13 +61268,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -61282,13 +61282,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END0" }, @@ -63424,13 +63424,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -63438,13 +63438,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END3" }, @@ -63452,13 +63452,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -63466,13 +63466,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NR1END3" }, @@ -65524,13 +65524,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -65538,13 +65538,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW2END2" }, @@ -65552,13 +65552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -65566,13 +65566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW2END2" }, @@ -67372,13 +67372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -67386,13 +67386,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END0" }, @@ -67400,13 +67400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -67414,13 +67414,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END0" }, @@ -68660,13 +68660,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -68674,13 +68674,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END3" }, @@ -68688,13 +68688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -68702,13 +68702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "NW6END3" }, @@ -72552,13 +72552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -72566,13 +72566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE2END3" }, @@ -72580,13 +72580,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -72594,13 +72594,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE2END3" }, @@ -74456,13 +74456,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -74470,13 +74470,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE6END3" }, @@ -74484,13 +74484,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -74498,13 +74498,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SE6END3" }, @@ -78012,13 +78012,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -78026,13 +78026,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SR1BEG_S0" }, @@ -78040,13 +78040,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -78054,13 +78054,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SR1BEG_S0" }, @@ -88232,13 +88232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -88246,13 +88246,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END2" }, @@ -88260,13 +88260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -88274,13 +88274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END2" }, @@ -89072,13 +89072,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -89086,13 +89086,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END3" }, @@ -89100,13 +89100,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -89114,13 +89114,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW2END3" }, @@ -89688,13 +89688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -89702,13 +89702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END0" }, @@ -89716,13 +89716,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -89730,13 +89730,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END0" }, @@ -90696,13 +90696,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -90710,13 +90710,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END2" }, @@ -90724,13 +90724,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -90738,13 +90738,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "SW6END2" }, @@ -96464,13 +96464,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -96478,13 +96478,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END0" }, @@ -96492,13 +96492,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -96506,13 +96506,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END0" }, @@ -98536,13 +98536,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -98550,13 +98550,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END3" }, @@ -98564,13 +98564,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -98578,13 +98578,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WR1END3" }, @@ -102624,13 +102624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV0", "is_directional": "1", @@ -102638,13 +102638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END0" }, @@ -102652,13 +102652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LV18", "is_directional": "1", @@ -102666,13 +102666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END0" }, @@ -103940,13 +103940,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB0", "is_directional": "1", @@ -103954,13 +103954,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END3" }, @@ -103968,13 +103968,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "dst_wire": "LVB12", "is_directional": "1", @@ -103982,13 +103982,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.087", + "0.112", + "0.162", + "0.198" ], - "in_cap": null, - "res": null + "in_cap": "10.856", + "res": "601.5686875" }, "src_wire": "WW4END3" }, diff --git a/kintex7/tile_type_LIOI3.json b/kintex7/tile_type_LIOI3.json index c2ad74a..957c818 100644 --- a/kintex7/tile_type_LIOI3.json +++ b/kintex7/tile_type_LIOI3.json @@ -815,8 +815,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -829,8 +829,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1005,8 +1005,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1019,8 +1019,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_LIOI3_SING.json b/kintex7/tile_type_LIOI3_SING.json index 55d97b4..2250918 100644 --- a/kintex7/tile_type_LIOI3_SING.json +++ b/kintex7/tile_type_LIOI3_SING.json @@ -257,8 +257,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -271,8 +271,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_LIOI3_TBYTESRC.json b/kintex7/tile_type_LIOI3_TBYTESRC.json index ed71174..f40e511 100644 --- a/kintex7/tile_type_LIOI3_TBYTESRC.json +++ b/kintex7/tile_type_LIOI3_TBYTESRC.json @@ -725,8 +725,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -739,8 +739,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -915,8 +915,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -929,8 +929,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_LIOI3_TBYTETERM.json b/kintex7/tile_type_LIOI3_TBYTETERM.json index 1e9831e..38214d1 100644 --- a/kintex7/tile_type_LIOI3_TBYTETERM.json +++ b/kintex7/tile_type_LIOI3_TBYTETERM.json @@ -725,8 +725,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -739,8 +739,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -897,8 +897,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -911,8 +911,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_RIOI.json b/kintex7/tile_type_RIOI.json index d790c8e..09bd3c7 100644 --- a/kintex7/tile_type_RIOI.json +++ b/kintex7/tile_type_RIOI.json @@ -995,8 +995,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1009,8 +1009,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1185,8 +1185,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1199,8 +1199,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_RIOI_SING.json b/kintex7/tile_type_RIOI_SING.json index 095d0a1..0fd7e15 100644 --- a/kintex7/tile_type_RIOI_SING.json +++ b/kintex7/tile_type_RIOI_SING.json @@ -347,8 +347,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -361,8 +361,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_RIOI_TBYTESRC.json b/kintex7/tile_type_RIOI_TBYTESRC.json index 4aadd0e..ab45744 100644 --- a/kintex7/tile_type_RIOI_TBYTESRC.json +++ b/kintex7/tile_type_RIOI_TBYTESRC.json @@ -905,8 +905,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -919,8 +919,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1095,8 +1095,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1109,8 +1109,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/kintex7/tile_type_RIOI_TBYTETERM.json b/kintex7/tile_type_RIOI_TBYTETERM.json index 414f3cc..61219e2 100644 --- a/kintex7/tile_type_RIOI_TBYTETERM.json +++ b/kintex7/tile_type_RIOI_TBYTETERM.json @@ -905,8 +905,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -919,8 +919,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1077,8 +1077,8 @@ "dst_to_src": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", @@ -1091,8 +1091,8 @@ "src_to_dst": { "delay": [ "0.033", - "0.039", "0.060", + "0.039", "0.089" ], "in_cap": "0.000", diff --git a/zynq7/mask_lioi3.db b/zynq7/mask_lioi3.db index 919251a..5da257f 100644 --- a/zynq7/mask_lioi3.db +++ b/zynq7/mask_lioi3.db @@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23 @@ -21,6 +21,7 @@ bit 25_95 bit 25_96 bit 25_98 bit 25_99 +bit 25_111 bit 25_112 bit 25_115 bit 25_116 diff --git a/zynq7/mask_lioi3_tbytesrc.db b/zynq7/mask_lioi3_tbytesrc.db index 919251a..5da257f 100644 --- a/zynq7/mask_lioi3_tbytesrc.db +++ b/zynq7/mask_lioi3_tbytesrc.db @@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23 @@ -21,6 +21,7 @@ bit 25_95 bit 25_96 bit 25_98 bit 25_99 +bit 25_111 bit 25_112 bit 25_115 bit 25_116 diff --git a/zynq7/mask_lioi3_tbyteterm.db b/zynq7/mask_lioi3_tbyteterm.db index 919251a..5da257f 100644 --- a/zynq7/mask_lioi3_tbyteterm.db +++ b/zynq7/mask_lioi3_tbyteterm.db @@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23 @@ -21,6 +21,7 @@ bit 25_95 bit 25_96 bit 25_98 bit 25_99 +bit 25_111 bit 25_112 bit 25_115 bit 25_116 diff --git a/zynq7/mask_rioi3.db b/zynq7/mask_rioi3.db index 919251a..5da257f 100644 --- a/zynq7/mask_rioi3.db +++ b/zynq7/mask_rioi3.db @@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23 @@ -21,6 +21,7 @@ bit 25_95 bit 25_96 bit 25_98 bit 25_99 +bit 25_111 bit 25_112 bit 25_115 bit 25_116 diff --git a/zynq7/mask_rioi3_tbytesrc.db b/zynq7/mask_rioi3_tbytesrc.db index 919251a..5da257f 100644 --- a/zynq7/mask_rioi3_tbytesrc.db +++ b/zynq7/mask_rioi3_tbytesrc.db @@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23 @@ -21,6 +21,7 @@ bit 25_95 bit 25_96 bit 25_98 bit 25_99 +bit 25_111 bit 25_112 bit 25_115 bit 25_116 diff --git a/zynq7/mask_rioi3_tbyteterm.db b/zynq7/mask_rioi3_tbyteterm.db index 919251a..5da257f 100644 --- a/zynq7/mask_rioi3_tbyteterm.db +++ b/zynq7/mask_rioi3_tbyteterm.db @@ -1,5 +1,5 @@ bit 25_07 -bit 25_16 +bit 25_08 bit 25_20 bit 25_21 bit 25_23 @@ -21,6 +21,7 @@ bit 25_95 bit 25_96 bit 25_98 bit 25_99 +bit 25_111 bit 25_112 bit 25_115 bit 25_116 diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db index 632076c..b957fb3 100644 --- a/zynq7/segbits_int_l.origin_info.db +++ b/zynq7/segbits_int_l.origin_info.db @@ -396,7 +396,7 @@ INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08 -INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08 +INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08 INT_L.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08 @@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43 -INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43 +INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58 @@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55 INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 +INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07 diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db index 32ae9c2..6b7597d 100644 --- a/zynq7/segbits_int_r.origin_info.db +++ b/zynq7/segbits_int_r.origin_info.db @@ -685,7 +685,7 @@ INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27 -INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27 +INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41 @@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53 -INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52 +INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17 @@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54 -INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55 +INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07 @@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35 -INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35 +INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33 diff --git a/zynq7/segbits_liob33.db b/zynq7/segbits_liob33.db index 3693490..37effb8 100644 --- a/zynq7/segbits_liob33.db +++ b/zynq7/segbits_liob33.db @@ -1,7 +1,8 @@ LIOB33.IOB_Y0.IBUFDISABLE.I 38_82 +LIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123 LIOB33.IOB_Y0.INTERMDISABLE.I 39_89 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 LIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93 @@ -9,34 +10,37 @@ LIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93 LIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93 LIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 !39_117 !39_119 39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95 -LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 !39_117 39_119 !39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 39_127 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 39_127 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 39_127 -LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 !39_127 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127 +LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 !39_127 +LIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 38_64 !38_112 38_118 !38_126 39_65 39_117 !39_119 !39_125 39_127 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127 -LIOB33.IOB_Y0.SSTL135.IN !38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 +LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87 +LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87 LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45 +LIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 39_07 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 !38_06 39_05 39_07 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 !38_06 !39_05 39_07 LIOB33.IOB_Y1.INTERMDISABLE.I 38_38 LIOB33.IOB_Y1.LVTTL.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_62 39_01 !39_09 !39_15 39_63 LIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35 diff --git a/zynq7/segbits_liob33.origin_info.db b/zynq7/segbits_liob33.origin_info.db index 8519332..1b3e6f7 100644 --- a/zynq7/segbits_liob33.origin_info.db +++ b/zynq7/segbits_liob33.origin_info.db @@ -1,7 +1,8 @@ LIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82 +LIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123 LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123 -LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123 +LIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123 LIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89 LIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65 LIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94 @@ -9,34 +10,37 @@ LIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94 LIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93 LIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93 LIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_125 39_65 -LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65 +LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95 -LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_119 39_65 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_119 39_125 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_117 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_119 39_125 39_65 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_125 39_127 39_65 -LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_117 39_119 39_65 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_65 -LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_117 39_65 +LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65 +LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_113 39_65 +LIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_113 39_117 39_65 +LIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_86 39_85 39_87 LIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39_119 38_118 38_64 39_125 39_127 39_65 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65 -LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob 38_86 39_87 -LIOB33.IOB_Y0.SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 +LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87 +LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87 LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07 -LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07 +LIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !38_6 38_4 39_5 39_7 +LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_6 !39_5 38_4 39_7 LIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38 LIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63 LIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35 diff --git a/zynq7/segbits_riob33.db b/zynq7/segbits_riob33.db index 08ecab5..88ceb7d 100644 --- a/zynq7/segbits_riob33.db +++ b/zynq7/segbits_riob33.db @@ -1,7 +1,8 @@ RIOB33.IOB_Y0.IBUFDISABLE.I 38_82 +RIOB33.IOB_Y0.IN_TERM.NONE !38_120 !38_122 !39_121 !39_123 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 38_120 38_122 39_121 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 38_120 38_122 !39_121 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 38_120 !38_122 !39_121 39_123 RIOB33.IOB_Y0.INTERMDISABLE.I 39_89 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 38_64 !38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 RIOB33.IOB_Y0.PULLTYPE.KEEPER 38_92 38_94 !39_93 @@ -9,34 +10,37 @@ RIOB33.IOB_Y0.PULLTYPE.NONE !38_92 38_94 !39_93 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN !38_92 !38_94 !39_93 RIOB33.IOB_Y0.PULLTYPE.PULLUP !38_92 38_94 39_93 RIOB33.IOB_Y0.ZIBUF_LOW_PWR 38_84 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 !39_117 !39_119 39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95 -RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 !39_117 39_119 !39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 39_127 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 39_127 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 39_127 -RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_117 39_119 !39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 !39_117 !39_119 !39_125 !39_127 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_117 !39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127 +RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 !39_127 +RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN 38_86 39_85 39_87 RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 38_64 !38_112 38_118 !38_126 39_65 39_117 !39_119 !39_125 39_127 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117 !39_119 39_125 39_127 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127 -RIOB33.IOB_Y0.SSTL135.IN !38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127 +RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87 +RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87 RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45 +RIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 39_07 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 38_04 !38_06 39_05 39_07 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 38_04 !38_06 !39_05 39_07 RIOB33.IOB_Y1.INTERMDISABLE.I 38_38 RIOB33.IOB_Y1.LVTTL.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_62 39_01 !39_09 !39_15 39_63 RIOB33.IOB_Y1.PULLTYPE.KEEPER !38_34 39_33 39_35 diff --git a/zynq7/segbits_riob33.origin_info.db b/zynq7/segbits_riob33.origin_info.db index 1e7da59..a87b92b 100644 --- a/zynq7/segbits_riob33.origin_info.db +++ b/zynq7/segbits_riob33.origin_info.db @@ -1,7 +1,8 @@ RIOB33.IOB_Y0.IBUFDISABLE.I origin:030-iob 38_82 +RIOB33.IOB_Y0.IN_TERM.NONE origin:030-iob !38_120 !38_122 !39_121 !39_123 RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_120 38_122 39_121 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_120 38_122 39_123 -RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_120 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !39_121 38_120 38_122 39_123 +RIOB33.IOB_Y0.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_122 !39_121 38_120 39_123 RIOB33.IOB_Y0.INTERMDISABLE.I origin:030-iob 39_89 RIOB33.IOB_Y0.LVTTL.DRIVE.I24 origin:030-iob !38_112 !38_118 !39_125 !39_127 38_126 38_64 39_117 39_119 39_65 RIOB33.IOB_Y0.PULLTYPE.KEEPER origin:030-iob !39_93 38_92 38_94 @@ -9,34 +10,37 @@ RIOB33.IOB_Y0.PULLTYPE.NONE origin:030-iob !38_92 !39_93 38_94 RIOB33.IOB_Y0.PULLTYPE.PULLDOWN origin:030-iob !38_92 !38_94 !39_93 RIOB33.IOB_Y0.PULLTYPE.PULLUP origin:030-iob !38_92 38_94 39_93 RIOB33.IOB_Y0.ZIBUF_LOW_PWR origin:030-iob 38_84 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_125 39_65 -RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38_118 38_126 38_64 39_113 39_125 39_65 +RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95 -RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_119 39_65 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_119 39_125 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_117 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_125 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_119 39_125 39_65 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_125 39_127 39_65 -RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_117 39_119 39_65 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_65 -RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_117 39_65 +RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65 +RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 !39_127 38_112 38_64 39_113 39_65 +RIOB33.IOB_Y0.LVCMOS25.DRIVE.I16 origin:030-iob !39_119 !39_125 !39_127 38_112 38_118 38_126 38_64 39_113 39_117 39_65 +RIOB33.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN origin:030-iob 38_86 39_85 39_87 RIOB33.IOB_Y0.LVCMOS33.DRIVE.I16 origin:030-iob !38_112 !38_126 !39_119 !39_125 38_118 38_64 39_117 39_127 39_65 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39_119 38_118 38_64 39_125 39_127 39_65 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65 -RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob 38_86 39_87 -RIOB33.IOB_Y0.SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125 +RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87 +RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87 RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_04 38_06 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob 38_04 39_05 39_07 -RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob 38_04 39_07 +RIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_50 origin:030-iob !38_6 38_4 39_5 39_7 +RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_60 origin:030-iob !38_6 !39_5 38_4 39_7 RIOB33.IOB_Y1.INTERMDISABLE.I origin:030-iob 38_38 RIOB33.IOB_Y1.LVTTL.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 !39_15 38_08 38_10 38_62 39_01 39_63 RIOB33.IOB_Y1.PULLTYPE.KEEPER origin:030-iob !38_34 39_33 39_35 diff --git a/zynq7/tile_type_BRKH_INT.json b/zynq7/tile_type_BRKH_INT.json index 3d8016a..6336b9a 100644 --- a/zynq7/tile_type_BRKH_INT.json +++ b/zynq7/tile_type_BRKH_INT.json @@ -4,8 +4,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -18,8 +18,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -32,8 +32,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -46,8 +46,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -60,8 +60,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -74,8 +74,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -88,8 +88,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -102,8 +102,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -116,8 +116,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -130,8 +130,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -144,8 +144,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -158,8 +158,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -172,8 +172,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -186,8 +186,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -200,8 +200,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -214,8 +214,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -228,8 +228,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -242,8 +242,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -256,8 +256,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -270,8 +270,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -284,8 +284,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -298,8 +298,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -312,8 +312,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -326,8 +326,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -340,8 +340,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -354,8 +354,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -368,8 +368,8 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], @@ -382,8 +382,8 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.105", "0.202", + "0.105", "0.231", "0.312" ], diff --git a/zynq7/tile_type_CFG_CENTER_MID.json b/zynq7/tile_type_CFG_CENTER_MID.json index b470d11..f9d9f49 100644 --- a/zynq7/tile_type_CFG_CENTER_MID.json +++ b/zynq7/tile_type_CFG_CENTER_MID.json @@ -5315,9 +5315,9 @@ "site_pins": { "CRCERROR": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5325,9 +5325,9 @@ }, "ECCERROR": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5335,9 +5335,9 @@ }, "ECCERRORSINGLE": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5345,9 +5345,9 @@ }, "FAR0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5355,9 +5355,9 @@ }, "FAR1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5365,9 +5365,9 @@ }, "FAR2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5375,9 +5375,9 @@ }, "FAR3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5385,9 +5385,9 @@ }, "FAR4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5395,9 +5395,9 @@ }, "FAR5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5405,9 +5405,9 @@ }, "FAR6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5415,9 +5415,9 @@ }, "FAR7": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5425,9 +5425,9 @@ }, "FAR8": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5435,9 +5435,9 @@ }, "FAR9": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5445,9 +5445,9 @@ }, "FAR10": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5455,9 +5455,9 @@ }, "FAR11": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5465,9 +5465,9 @@ }, "FAR12": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5475,9 +5475,9 @@ }, "FAR13": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5485,9 +5485,9 @@ }, "FAR14": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5495,9 +5495,9 @@ }, "FAR15": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5505,9 +5505,9 @@ }, "FAR16": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5515,9 +5515,9 @@ }, "FAR17": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5525,9 +5525,9 @@ }, "FAR18": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5535,9 +5535,9 @@ }, "FAR19": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5545,9 +5545,9 @@ }, "FAR20": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5555,9 +5555,9 @@ }, "FAR21": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5565,9 +5565,9 @@ }, "FAR22": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5575,9 +5575,9 @@ }, "FAR23": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5585,9 +5585,9 @@ }, "FAR24": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5595,9 +5595,9 @@ }, "FAR25": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5605,9 +5605,9 @@ }, "SYNBIT0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5615,9 +5615,9 @@ }, "SYNBIT1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5625,9 +5625,9 @@ }, "SYNBIT2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5635,9 +5635,9 @@ }, "SYNBIT3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5645,9 +5645,9 @@ }, "SYNBIT4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5655,9 +5655,9 @@ }, "SYNDROME0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5665,9 +5665,9 @@ }, "SYNDROME1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5675,9 +5675,9 @@ }, "SYNDROME2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5685,9 +5685,9 @@ }, "SYNDROME3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5695,9 +5695,9 @@ }, "SYNDROME4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5705,9 +5705,9 @@ }, "SYNDROME5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5715,9 +5715,9 @@ }, "SYNDROME6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5725,9 +5725,9 @@ }, "SYNDROME7": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5735,9 +5735,9 @@ }, "SYNDROME8": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5745,9 +5745,9 @@ }, "SYNDROME9": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5755,9 +5755,9 @@ }, "SYNDROME10": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5765,9 +5765,9 @@ }, "SYNDROME11": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5775,9 +5775,9 @@ }, "SYNDROME12": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5785,9 +5785,9 @@ }, "SYNDROMEVALID": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5795,9 +5795,9 @@ }, "SYNWORD0": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5805,9 +5805,9 @@ }, "SYNWORD1": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5815,9 +5815,9 @@ }, "SYNWORD2": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5825,9 +5825,9 @@ }, "SYNWORD3": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5835,9 +5835,9 @@ }, "SYNWORD4": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5845,9 +5845,9 @@ }, "SYNWORD5": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", @@ -5855,9 +5855,9 @@ }, "SYNWORD6": { "delay": [ - "4.709", "4.709", "5.000", + "4.709", "5.000" ], "res": "237.1875", diff --git a/zynq7/tile_type_CFG_CENTER_TOP.json b/zynq7/tile_type_CFG_CENTER_TOP.json index 960339a..0d3ab92 100644 --- a/zynq7/tile_type_CFG_CENTER_TOP.json +++ b/zynq7/tile_type_CFG_CENTER_TOP.json @@ -769,6 +769,86 @@ "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR1" }, + "EFUSEUSR2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR2" + }, + "EFUSEUSR3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR3" + }, + "EFUSEUSR4": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR4" + }, + "EFUSEUSR5": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR5" + }, + "EFUSEUSR6": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR6" + }, + "EFUSEUSR7": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR7" + }, + "EFUSEUSR8": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR8" + }, + "EFUSEUSR9": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "175.3125", + "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR9" + }, "EFUSEUSR10": { "delay": [ "0.000", @@ -869,16 +949,6 @@ "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR19" }, - "EFUSEUSR2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR2" - }, "EFUSEUSR20": { "delay": [ "0.000", @@ -979,16 +1049,6 @@ "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR29" }, - "EFUSEUSR3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR3" - }, "EFUSEUSR30": { "delay": [ "0.000", @@ -1008,66 +1068,6 @@ ], "res": "175.3125", "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR31" - }, - "EFUSEUSR4": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR4" - }, - "EFUSEUSR5": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR5" - }, - "EFUSEUSR6": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR6" - }, - "EFUSEUSR7": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR7" - }, - "EFUSEUSR8": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR8" - }, - "EFUSEUSR9": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "175.3125", - "wire": "CFG_CENTER_EFUSE_USR_EFUSEUSR9" } }, "type": "EFUSE_USR", diff --git a/zynq7/tile_type_CLBLL_L.json b/zynq7/tile_type_CLBLL_L.json index de172a4..ff5974d 100644 --- a/zynq7/tile_type_CLBLL_L.json +++ b/zynq7/tile_type_CLBLL_L.json @@ -3210,465 +3210,6 @@ } }, "sites": [ - { - "name": "X1Y0", - "prefix": "SLICE", - "site_pins": { - "A": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1326.1875", - "wire": "CLBLL_L_A" - }, - "A1": { - "cap": "0.000", - "delay": [ - "0.172", - "0.214", - "0.416", - "0.516" - ], - "wire": "CLBLL_L_A1" - }, - "A2": { - "cap": "0.000", - "delay": [ - "0.170", - "0.212", - "0.409", - "0.507" - ], - "wire": "CLBLL_L_A2" - }, - "A3": { - "cap": "0.000", - "delay": [ - "0.107", - "0.133", - "0.278", - "0.344" - ], - "wire": "CLBLL_L_A3" - }, - "A4": { - "cap": "0.000", - "delay": [ - "0.086", - "0.107", - "0.229", - "0.284" - ], - "wire": "CLBLL_L_A4" - }, - "A5": { - "cap": "0.000", - "delay": [ - "0.033", - "0.042", - "0.091", - "0.112" - ], - "wire": "CLBLL_L_A5" - }, - "A6": { - "cap": "0.000", - "delay": [ - "0.002", - "0.002", - "0.004", - "0.005" - ], - "wire": "CLBLL_L_A6" - }, - "AMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1852.976125", - "wire": "CLBLL_L_AMUX" - }, - "AQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_AQ" - }, - "AX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_AX" - }, - "B": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1404.5625", - "wire": "CLBLL_L_B" - }, - "B1": { - "cap": "0.000", - "delay": [ - "0.171", - "0.213", - "0.417", - "0.518" - ], - "wire": "CLBLL_L_B1" - }, - "B2": { - "cap": "0.000", - "delay": [ - "0.170", - "0.212", - "0.408", - "0.506" - ], - "wire": "CLBLL_L_B2" - }, - "B3": { - "cap": "0.000", - "delay": [ - "0.109", - "0.136", - "0.281", - "0.349" - ], - "wire": "CLBLL_L_B3" - }, - "B4": { - "cap": "0.000", - "delay": [ - "0.086", - "0.107", - "0.228", - "0.282" - ], - "wire": "CLBLL_L_B4" - }, - "B5": { - "cap": "0.000", - "delay": [ - "0.034", - "0.043", - "0.093", - "0.116" - ], - "wire": "CLBLL_L_B5" - }, - "B6": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.002", - "0.002" - ], - "wire": "CLBLL_L_B6" - }, - "BMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1869.3455", - "wire": "CLBLL_L_BMUX" - }, - "BQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_BQ" - }, - "BX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_BX" - }, - "C": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1453.375", - "wire": "CLBLL_L_C" - }, - "C1": { - "cap": "0.000", - "delay": [ - "0.173", - "0.215", - "0.417", - "0.517" - ], - "wire": "CLBLL_L_C1" - }, - "C2": { - "cap": "0.000", - "delay": [ - "0.171", - "0.213", - "0.409", - "0.507" - ], - "wire": "CLBLL_L_C2" - }, - "C3": { - "cap": "0.000", - "delay": [ - "0.110", - "0.137", - "0.283", - "0.351" - ], - "wire": "CLBLL_L_C3" - }, - "C4": { - "cap": "0.000", - "delay": [ - "0.087", - "0.108", - "0.227", - "0.281" - ], - "wire": "CLBLL_L_C4" - }, - "C5": { - "cap": "0.000", - "delay": [ - "0.033", - "0.042", - "0.092", - "0.114" - ], - "wire": "CLBLL_L_C5" - }, - "C6": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_C6" - }, - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CE" - }, - "CIN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CIN" - }, - "CLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CLK" - }, - "CMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1826.7858125", - "wire": "CLBLL_L_CMUX" - }, - "COUT": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "687.5", - "wire": "CLBLL_L_COUT" - }, - "CQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_CQ" - }, - "CX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_CX" - }, - "D": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1408.0", - "wire": "CLBLL_L_D" - }, - "D1": { - "cap": "0.000", - "delay": [ - "0.174", - "0.216", - "0.421", - "0.522" - ], - "wire": "CLBLL_L_D1" - }, - "D2": { - "cap": "0.000", - "delay": [ - "0.171", - "0.213", - "0.410", - "0.509" - ], - "wire": "CLBLL_L_D2" - }, - "D3": { - "cap": "0.000", - "delay": [ - "0.109", - "0.136", - "0.279", - "0.346" - ], - "wire": "CLBLL_L_D3" - }, - "D4": { - "cap": "0.000", - "delay": [ - "0.088", - "0.109", - "0.229", - "0.284" - ], - "wire": "CLBLL_L_D4" - }, - "D5": { - "cap": "0.000", - "delay": [ - "0.033", - "0.042", - "0.091", - "0.113" - ], - "wire": "CLBLL_L_D5" - }, - "D6": { - "cap": "0.000", - "delay": [ - "0.003", - "0.003", - "0.004", - "0.005" - ], - "wire": "CLBLL_L_D6" - }, - "DMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1826.7858125", - "wire": "CLBLL_L_DMUX" - }, - "DQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLL_L_DQ" - }, - "DX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_DX" - }, - "SR": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLL_L_SR" - } - }, - "type": "SLICEL", - "x_coord": 1, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "SLICE", @@ -4127,6 +3668,465 @@ "type": "SLICEL", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X1Y0", + "prefix": "SLICE", + "site_pins": { + "A": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1326.1875", + "wire": "CLBLL_L_A" + }, + "A1": { + "cap": "0.000", + "delay": [ + "0.172", + "0.214", + "0.416", + "0.516" + ], + "wire": "CLBLL_L_A1" + }, + "A2": { + "cap": "0.000", + "delay": [ + "0.170", + "0.212", + "0.409", + "0.507" + ], + "wire": "CLBLL_L_A2" + }, + "A3": { + "cap": "0.000", + "delay": [ + "0.107", + "0.133", + "0.278", + "0.344" + ], + "wire": "CLBLL_L_A3" + }, + "A4": { + "cap": "0.000", + "delay": [ + "0.086", + "0.107", + "0.229", + "0.284" + ], + "wire": "CLBLL_L_A4" + }, + "A5": { + "cap": "0.000", + "delay": [ + "0.033", + "0.042", + "0.091", + "0.112" + ], + "wire": "CLBLL_L_A5" + }, + "A6": { + "cap": "0.000", + "delay": [ + "0.002", + "0.002", + "0.004", + "0.005" + ], + "wire": "CLBLL_L_A6" + }, + "AMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1852.976125", + "wire": "CLBLL_L_AMUX" + }, + "AQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_AQ" + }, + "AX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_AX" + }, + "B": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1404.5625", + "wire": "CLBLL_L_B" + }, + "B1": { + "cap": "0.000", + "delay": [ + "0.171", + "0.213", + "0.417", + "0.518" + ], + "wire": "CLBLL_L_B1" + }, + "B2": { + "cap": "0.000", + "delay": [ + "0.170", + "0.212", + "0.408", + "0.506" + ], + "wire": "CLBLL_L_B2" + }, + "B3": { + "cap": "0.000", + "delay": [ + "0.109", + "0.136", + "0.281", + "0.349" + ], + "wire": "CLBLL_L_B3" + }, + "B4": { + "cap": "0.000", + "delay": [ + "0.086", + "0.107", + "0.228", + "0.282" + ], + "wire": "CLBLL_L_B4" + }, + "B5": { + "cap": "0.000", + "delay": [ + "0.034", + "0.043", + "0.093", + "0.116" + ], + "wire": "CLBLL_L_B5" + }, + "B6": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.002", + "0.002" + ], + "wire": "CLBLL_L_B6" + }, + "BMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1869.3455", + "wire": "CLBLL_L_BMUX" + }, + "BQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_BQ" + }, + "BX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_BX" + }, + "C": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1453.375", + "wire": "CLBLL_L_C" + }, + "C1": { + "cap": "0.000", + "delay": [ + "0.173", + "0.215", + "0.417", + "0.517" + ], + "wire": "CLBLL_L_C1" + }, + "C2": { + "cap": "0.000", + "delay": [ + "0.171", + "0.213", + "0.409", + "0.507" + ], + "wire": "CLBLL_L_C2" + }, + "C3": { + "cap": "0.000", + "delay": [ + "0.110", + "0.137", + "0.283", + "0.351" + ], + "wire": "CLBLL_L_C3" + }, + "C4": { + "cap": "0.000", + "delay": [ + "0.087", + "0.108", + "0.227", + "0.281" + ], + "wire": "CLBLL_L_C4" + }, + "C5": { + "cap": "0.000", + "delay": [ + "0.033", + "0.042", + "0.092", + "0.114" + ], + "wire": "CLBLL_L_C5" + }, + "C6": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_C6" + }, + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CE" + }, + "CIN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CIN" + }, + "CLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CLK" + }, + "CMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1826.7858125", + "wire": "CLBLL_L_CMUX" + }, + "COUT": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "687.5", + "wire": "CLBLL_L_COUT" + }, + "CQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_CQ" + }, + "CX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_CX" + }, + "D": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1408.0", + "wire": "CLBLL_L_D" + }, + "D1": { + "cap": "0.000", + "delay": [ + "0.174", + "0.216", + "0.421", + "0.522" + ], + "wire": "CLBLL_L_D1" + }, + "D2": { + "cap": "0.000", + "delay": [ + "0.171", + "0.213", + "0.410", + "0.509" + ], + "wire": "CLBLL_L_D2" + }, + "D3": { + "cap": "0.000", + "delay": [ + "0.109", + "0.136", + "0.279", + "0.346" + ], + "wire": "CLBLL_L_D3" + }, + "D4": { + "cap": "0.000", + "delay": [ + "0.088", + "0.109", + "0.229", + "0.284" + ], + "wire": "CLBLL_L_D4" + }, + "D5": { + "cap": "0.000", + "delay": [ + "0.033", + "0.042", + "0.091", + "0.113" + ], + "wire": "CLBLL_L_D5" + }, + "D6": { + "cap": "0.000", + "delay": [ + "0.003", + "0.003", + "0.004", + "0.005" + ], + "wire": "CLBLL_L_D6" + }, + "DMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1826.7858125", + "wire": "CLBLL_L_DMUX" + }, + "DQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLL_L_DQ" + }, + "DX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_DX" + }, + "SR": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLL_L_SR" + } + }, + "type": "SLICEL", + "x_coord": 1, + "y_coord": 0 } ], "tile_type": "CLBLL_L", diff --git a/zynq7/tile_type_CLBLM_L.json b/zynq7/tile_type_CLBLM_L.json index b74a4f5..3e3c0ca 100644 --- a/zynq7/tile_type_CLBLM_L.json +++ b/zynq7/tile_type_CLBLM_L.json @@ -3300,6 +3300,515 @@ } }, "sites": [ + { + "name": "X0Y0", + "prefix": "SLICE", + "site_pins": { + "A": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1463.6875", + "wire": "CLBLM_M_A" + }, + "A1": { + "cap": "0.000", + "delay": [ + "0.180", + "0.225", + "0.428", + "0.531" + ], + "wire": "CLBLM_M_A1" + }, + "A2": { + "cap": "0.000", + "delay": [ + "0.174", + "0.216", + "0.413", + "0.512" + ], + "wire": "CLBLM_M_A2" + }, + "A3": { + "cap": "0.000", + "delay": [ + "0.114", + "0.141", + "0.300", + "0.372" + ], + "wire": "CLBLM_M_A3" + }, + "A4": { + "cap": "0.000", + "delay": [ + "0.091", + "0.113", + "0.244", + "0.303" + ], + "wire": "CLBLM_M_A4" + }, + "A5": { + "cap": "0.000", + "delay": [ + "0.038", + "0.048", + "0.102", + "0.126" + ], + "wire": "CLBLM_M_A5" + }, + "A6": { + "cap": "0.000", + "delay": [ + "0.007", + "0.008", + "0.013", + "0.016" + ], + "wire": "CLBLM_M_A6" + }, + "AI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_AI" + }, + "AMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1833.3335625", + "wire": "CLBLM_M_AMUX" + }, + "AQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_AQ" + }, + "AX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_AX" + }, + "B": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1408.0", + "wire": "CLBLM_M_B" + }, + "B1": { + "cap": "0.000", + "delay": [ + "0.175", + "0.218", + "0.420", + "0.521" + ], + "wire": "CLBLM_M_B1" + }, + "B2": { + "cap": "0.000", + "delay": [ + "0.172", + "0.214", + "0.406", + "0.504" + ], + "wire": "CLBLM_M_B2" + }, + "B3": { + "cap": "0.000", + "delay": [ + "0.114", + "0.141", + "0.298", + "0.370" + ], + "wire": "CLBLM_M_B3" + }, + "B4": { + "cap": "0.000", + "delay": [ + "0.090", + "0.112", + "0.242", + "0.300" + ], + "wire": "CLBLM_M_B4" + }, + "B5": { + "cap": "0.000", + "delay": [ + "0.042", + "0.052", + "0.111", + "0.137" + ], + "wire": "CLBLM_M_B5" + }, + "B6": { + "cap": "0.000", + "delay": [ + "0.005", + "0.006", + "0.011", + "0.013" + ], + "wire": "CLBLM_M_B6" + }, + "BI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_BI" + }, + "BMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1898.8096875", + "wire": "CLBLM_M_BMUX" + }, + "BQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_BQ" + }, + "BX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_BX" + }, + "C": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1401.125", + "wire": "CLBLM_M_C" + }, + "C1": { + "cap": "0.000", + "delay": [ + "0.176", + "0.219", + "0.420", + "0.521" + ], + "wire": "CLBLM_M_C1" + }, + "C2": { + "cap": "0.000", + "delay": [ + "0.172", + "0.214", + "0.408", + "0.506" + ], + "wire": "CLBLM_M_C2" + }, + "C3": { + "cap": "0.000", + "delay": [ + "0.113", + "0.140", + "0.297", + "0.368" + ], + "wire": "CLBLM_M_C3" + }, + "C4": { + "cap": "0.000", + "delay": [ + "0.089", + "0.111", + "0.242", + "0.300" + ], + "wire": "CLBLM_M_C4" + }, + "C5": { + "cap": "0.000", + "delay": [ + "0.040", + "0.050", + "0.107", + "0.133" + ], + "wire": "CLBLM_M_C5" + }, + "C6": { + "cap": "0.000", + "delay": [ + "0.005", + "0.006", + "0.010", + "0.012" + ], + "wire": "CLBLM_M_C6" + }, + "CE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CE" + }, + "CI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CI" + }, + "CIN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CIN" + }, + "CLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CLK" + }, + "CMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1833.3335625", + "wire": "CLBLM_M_CMUX" + }, + "COUT": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "687.5", + "wire": "CLBLM_M_COUT" + }, + "CQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_CQ" + }, + "CX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_CX" + }, + "D": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1417.625", + "wire": "CLBLM_M_D" + }, + "D1": { + "cap": "0.000", + "delay": [ + "0.145", + "0.226", + "0.305", + "0.540" + ], + "wire": "CLBLM_M_D1" + }, + "D2": { + "cap": "0.000", + "delay": [ + "0.141", + "0.219", + "0.293", + "0.520" + ], + "wire": "CLBLM_M_D2" + }, + "D3": { + "cap": "0.000", + "delay": [ + "0.088", + "0.144", + "0.209", + "0.377" + ], + "wire": "CLBLM_M_D3" + }, + "D4": { + "cap": "0.000", + "delay": [ + "0.073", + "0.118", + "0.176", + "0.317" + ], + "wire": "CLBLM_M_D4" + }, + "D5": { + "cap": "0.000", + "delay": [ + "0.031", + "0.052", + "0.072", + "0.137" + ], + "wire": "CLBLM_M_D5" + }, + "D6": { + "cap": "0.000", + "delay": [ + "0.003", + "0.010", + "0.007", + "0.022" + ], + "wire": "CLBLM_M_D6" + }, + "DI": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_DI" + }, + "DMUX": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1859.523875", + "wire": "CLBLM_M_DMUX" + }, + "DQ": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "1427.9375", + "wire": "CLBLM_M_DQ" + }, + "DX": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_DX" + }, + "SR": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_SR" + }, + "WE": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CLBLM_M_WE" + } + }, + "type": "SLICEM", + "x_coord": 0, + "y_coord": 0 + }, { "name": "X1Y0", "prefix": "SLICE", @@ -3758,515 +4267,6 @@ "type": "SLICEL", "x_coord": 1, "y_coord": 0 - }, - { - "name": "X0Y0", - "prefix": "SLICE", - "site_pins": { - "A": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1463.6875", - "wire": "CLBLM_M_A" - }, - "A1": { - "cap": "0.000", - "delay": [ - "0.180", - "0.225", - "0.428", - "0.531" - ], - "wire": "CLBLM_M_A1" - }, - "A2": { - "cap": "0.000", - "delay": [ - "0.174", - "0.216", - "0.413", - "0.512" - ], - "wire": "CLBLM_M_A2" - }, - "A3": { - "cap": "0.000", - "delay": [ - "0.114", - "0.141", - "0.300", - "0.372" - ], - "wire": "CLBLM_M_A3" - }, - "A4": { - "cap": "0.000", - "delay": [ - "0.091", - "0.113", - "0.244", - "0.303" - ], - "wire": "CLBLM_M_A4" - }, - "A5": { - "cap": "0.000", - "delay": [ - "0.038", - "0.048", - "0.102", - "0.126" - ], - "wire": "CLBLM_M_A5" - }, - "A6": { - "cap": "0.000", - "delay": [ - "0.007", - "0.008", - "0.013", - "0.016" - ], - "wire": "CLBLM_M_A6" - }, - "AI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_AI" - }, - "AMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1833.3335625", - "wire": "CLBLM_M_AMUX" - }, - "AQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_AQ" - }, - "AX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_AX" - }, - "B": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1408.0", - "wire": "CLBLM_M_B" - }, - "B1": { - "cap": "0.000", - "delay": [ - "0.175", - "0.218", - "0.420", - "0.521" - ], - "wire": "CLBLM_M_B1" - }, - "B2": { - "cap": "0.000", - "delay": [ - "0.172", - "0.214", - "0.406", - "0.504" - ], - "wire": "CLBLM_M_B2" - }, - "B3": { - "cap": "0.000", - "delay": [ - "0.114", - "0.141", - "0.298", - "0.370" - ], - "wire": "CLBLM_M_B3" - }, - "B4": { - "cap": "0.000", - "delay": [ - "0.090", - "0.112", - "0.242", - "0.300" - ], - "wire": "CLBLM_M_B4" - }, - "B5": { - "cap": "0.000", - "delay": [ - "0.042", - "0.052", - "0.111", - "0.137" - ], - "wire": "CLBLM_M_B5" - }, - "B6": { - "cap": "0.000", - "delay": [ - "0.005", - "0.006", - "0.011", - "0.013" - ], - "wire": "CLBLM_M_B6" - }, - "BI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_BI" - }, - "BMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1898.8096875", - "wire": "CLBLM_M_BMUX" - }, - "BQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_BQ" - }, - "BX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_BX" - }, - "C": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1401.125", - "wire": "CLBLM_M_C" - }, - "C1": { - "cap": "0.000", - "delay": [ - "0.176", - "0.219", - "0.420", - "0.521" - ], - "wire": "CLBLM_M_C1" - }, - "C2": { - "cap": "0.000", - "delay": [ - "0.172", - "0.214", - "0.408", - "0.506" - ], - "wire": "CLBLM_M_C2" - }, - "C3": { - "cap": "0.000", - "delay": [ - "0.113", - "0.140", - "0.297", - "0.368" - ], - "wire": "CLBLM_M_C3" - }, - "C4": { - "cap": "0.000", - "delay": [ - "0.089", - "0.111", - "0.242", - "0.300" - ], - "wire": "CLBLM_M_C4" - }, - "C5": { - "cap": "0.000", - "delay": [ - "0.040", - "0.050", - "0.107", - "0.133" - ], - "wire": "CLBLM_M_C5" - }, - "C6": { - "cap": "0.000", - "delay": [ - "0.005", - "0.006", - "0.010", - "0.012" - ], - "wire": "CLBLM_M_C6" - }, - "CE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CE" - }, - "CI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CI" - }, - "CIN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CIN" - }, - "CLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CLK" - }, - "CMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1833.3335625", - "wire": "CLBLM_M_CMUX" - }, - "COUT": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "687.5", - "wire": "CLBLM_M_COUT" - }, - "CQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_CQ" - }, - "CX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_CX" - }, - "D": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1417.625", - "wire": "CLBLM_M_D" - }, - "D1": { - "cap": "0.000", - "delay": [ - "0.145", - "0.226", - "0.305", - "0.540" - ], - "wire": "CLBLM_M_D1" - }, - "D2": { - "cap": "0.000", - "delay": [ - "0.141", - "0.219", - "0.293", - "0.520" - ], - "wire": "CLBLM_M_D2" - }, - "D3": { - "cap": "0.000", - "delay": [ - "0.088", - "0.144", - "0.209", - "0.377" - ], - "wire": "CLBLM_M_D3" - }, - "D4": { - "cap": "0.000", - "delay": [ - "0.073", - "0.118", - "0.176", - "0.317" - ], - "wire": "CLBLM_M_D4" - }, - "D5": { - "cap": "0.000", - "delay": [ - "0.031", - "0.052", - "0.072", - "0.137" - ], - "wire": "CLBLM_M_D5" - }, - "D6": { - "cap": "0.000", - "delay": [ - "0.003", - "0.007", - "0.010", - "0.022" - ], - "wire": "CLBLM_M_D6" - }, - "DI": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_DI" - }, - "DMUX": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1859.523875", - "wire": "CLBLM_M_DMUX" - }, - "DQ": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "1427.9375", - "wire": "CLBLM_M_DQ" - }, - "DX": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_DX" - }, - "SR": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_SR" - }, - "WE": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CLBLM_M_WE" - } - }, - "type": "SLICEM", - "x_coord": 0, - "y_coord": 0 } ], "tile_type": "CLBLM_L", diff --git a/zynq7/tile_type_CLBLM_R.json b/zynq7/tile_type_CLBLM_R.json index 81bd1b0..a1cc5a2 100644 --- a/zynq7/tile_type_CLBLM_R.json +++ b/zynq7/tile_type_CLBLM_R.json @@ -3738,8 +3738,8 @@ "cap": "0.000", "delay": [ "0.003", - "0.007", "0.010", + "0.007", "0.022" ], "wire": "CLBLM_M_D6" diff --git a/zynq7/tile_type_CLK_HROW_BOT_R.json b/zynq7/tile_type_CLK_HROW_BOT_R.json index e483009..6d37b77 100644 --- a/zynq7/tile_type_CLK_HROW_BOT_R.json +++ b/zynq7/tile_type_CLK_HROW_BOT_R.json @@ -9893,9 +9893,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9907,9 +9907,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9921,9 +9921,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9935,9 +9935,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9949,9 +9949,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9963,9 +9963,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9977,9 +9977,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9991,9 +9991,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10005,9 +10005,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10019,9 +10019,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10033,9 +10033,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10047,9 +10047,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10061,9 +10061,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10075,9 +10075,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10089,9 +10089,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10103,9 +10103,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10117,9 +10117,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10131,9 +10131,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10145,9 +10145,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10159,9 +10159,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10173,9 +10173,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10187,9 +10187,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10201,9 +10201,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10215,9 +10215,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10229,9 +10229,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10243,9 +10243,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10257,9 +10257,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10271,9 +10271,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10285,9 +10285,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10299,9 +10299,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10313,9 +10313,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10327,9 +10327,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10341,9 +10341,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10355,9 +10355,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10369,9 +10369,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10383,9 +10383,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10397,9 +10397,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10411,9 +10411,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10425,9 +10425,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10439,9 +10439,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10453,9 +10453,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10467,9 +10467,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10481,9 +10481,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10495,9 +10495,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10509,9 +10509,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10523,9 +10523,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10537,9 +10537,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -10551,9 +10551,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null diff --git a/zynq7/tile_type_CLK_HROW_TOP_R.json b/zynq7/tile_type_CLK_HROW_TOP_R.json index 0b24a43..6820598 100644 --- a/zynq7/tile_type_CLK_HROW_TOP_R.json +++ b/zynq7/tile_type_CLK_HROW_TOP_R.json @@ -8997,9 +8997,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9011,9 +9011,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9025,9 +9025,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9039,9 +9039,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9053,9 +9053,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9067,9 +9067,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9081,9 +9081,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9095,9 +9095,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9109,9 +9109,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9123,9 +9123,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9137,9 +9137,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9151,9 +9151,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9165,9 +9165,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9179,9 +9179,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9193,9 +9193,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9207,9 +9207,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9221,9 +9221,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9235,9 +9235,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9249,9 +9249,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9263,9 +9263,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9277,9 +9277,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9291,9 +9291,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9305,9 +9305,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9319,9 +9319,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9333,9 +9333,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9347,9 +9347,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9361,9 +9361,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9375,9 +9375,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9389,9 +9389,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9403,9 +9403,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9417,9 +9417,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9431,9 +9431,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9445,9 +9445,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9459,9 +9459,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9473,9 +9473,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9487,9 +9487,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9501,9 +9501,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9515,9 +9515,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9529,9 +9529,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9543,9 +9543,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9557,9 +9557,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9571,9 +9571,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9585,9 +9585,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9599,9 +9599,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9613,9 +9613,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9627,9 +9627,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9641,9 +9641,9 @@ "dst_to_src": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null @@ -9655,9 +9655,9 @@ "src_to_dst": { "delay": [ "0.000", + "0.190", "0.000", - "0.000", - "0.190" + "0.000" ], "in_cap": null, "res": null diff --git a/zynq7/tile_type_CMT_FIFO_L.json b/zynq7/tile_type_CMT_FIFO_L.json index ec102b5..eca44fc 100644 --- a/zynq7/tile_type_CMT_FIFO_L.json +++ b/zynq7/tile_type_CMT_FIFO_L.json @@ -5006,1505 +5006,6 @@ } }, "sites": [ - { - "name": "X0Y0", - "prefix": "OUT_FIFO", - "site_pins": { - "ALMOSTEMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" - }, - "ALMOSTFULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTFULL" - }, - "D00": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D00" - }, - "D01": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D01" - }, - "D02": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D02" - }, - "D03": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D03" - }, - "D04": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D04" - }, - "D05": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D05" - }, - "D06": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D06" - }, - "D07": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D07" - }, - "D10": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D10" - }, - "D11": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D11" - }, - "D12": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D12" - }, - "D13": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D13" - }, - "D14": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D14" - }, - "D15": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D15" - }, - "D16": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D16" - }, - "D17": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D17" - }, - "D20": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D20" - }, - "D21": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D21" - }, - "D22": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D22" - }, - "D23": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D23" - }, - "D24": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D24" - }, - "D25": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D25" - }, - "D26": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D26" - }, - "D27": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D27" - }, - "D30": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D30" - }, - "D31": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D31" - }, - "D32": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D32" - }, - "D33": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D33" - }, - "D34": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D34" - }, - "D35": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D35" - }, - "D36": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D36" - }, - "D37": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D37" - }, - "D40": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D40" - }, - "D41": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D41" - }, - "D42": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D42" - }, - "D43": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D43" - }, - "D44": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D44" - }, - "D45": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D45" - }, - "D46": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D46" - }, - "D47": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D47" - }, - "D50": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D50" - }, - "D51": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D51" - }, - "D52": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D52" - }, - "D53": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D53" - }, - "D54": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D54" - }, - "D55": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D55" - }, - "D56": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D56" - }, - "D57": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D57" - }, - "D60": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D60" - }, - "D61": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D61" - }, - "D62": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D62" - }, - "D63": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D63" - }, - "D64": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D64" - }, - "D65": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D65" - }, - "D66": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D66" - }, - "D67": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D67" - }, - "D70": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D70" - }, - "D71": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D71" - }, - "D72": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D72" - }, - "D73": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D73" - }, - "D74": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D74" - }, - "D75": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D75" - }, - "D76": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D76" - }, - "D77": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D77" - }, - "D80": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D80" - }, - "D81": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D81" - }, - "D82": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D82" - }, - "D83": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D83" - }, - "D84": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D84" - }, - "D85": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D85" - }, - "D86": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D86" - }, - "D87": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D87" - }, - "D90": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D90" - }, - "D91": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D91" - }, - "D92": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D92" - }, - "D93": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D93" - }, - "D94": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D94" - }, - "D95": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D95" - }, - "D96": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D96" - }, - "D97": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D97" - }, - "EMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_EMPTY" - }, - "FULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_FULL" - }, - "Q00": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q00" - }, - "Q01": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q01" - }, - "Q02": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q02" - }, - "Q03": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q03" - }, - "Q10": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q10" - }, - "Q11": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q11" - }, - "Q12": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q12" - }, - "Q13": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q13" - }, - "Q20": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q20" - }, - "Q21": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q21" - }, - "Q22": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q22" - }, - "Q23": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q23" - }, - "Q30": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q30" - }, - "Q31": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q31" - }, - "Q32": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q32" - }, - "Q33": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q33" - }, - "Q40": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q40" - }, - "Q41": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q41" - }, - "Q42": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q42" - }, - "Q43": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q43" - }, - "Q50": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q50" - }, - "Q51": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q51" - }, - "Q52": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q52" - }, - "Q53": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q53" - }, - "Q54": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q54" - }, - "Q55": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q55" - }, - "Q56": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q56" - }, - "Q57": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q57" - }, - "Q60": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q60" - }, - "Q61": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q61" - }, - "Q62": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q62" - }, - "Q63": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q63" - }, - "Q64": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q64" - }, - "Q65": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q65" - }, - "Q66": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q66" - }, - "Q67": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q67" - }, - "Q70": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q70" - }, - "Q71": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q71" - }, - "Q72": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q72" - }, - "Q73": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q73" - }, - "Q80": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q80" - }, - "Q81": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q81" - }, - "Q82": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q82" - }, - "Q83": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q83" - }, - "Q90": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q90" - }, - "Q91": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q91" - }, - "Q92": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q92" - }, - "Q93": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q93" - }, - "RDCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDCLK" - }, - "RDEN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDEN" - }, - "RESET": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RESET" - }, - "SCANENB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANENB" - }, - "SCANIN0": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN0" - }, - "SCANIN1": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN1" - }, - "SCANIN2": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN2" - }, - "SCANIN3": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN3" - }, - "SCANOUT0": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT0" - }, - "SCANOUT1": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT1" - }, - "SCANOUT2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT2" - }, - "SCANOUT3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT3" - }, - "TESTMODEB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTMODEB" - }, - "TESTREADDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTREADDISB" - }, - "TESTWRITEDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTWRITEDISB" - }, - "WRCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WRCLK" - }, - "WREN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WREN" - } - }, - "type": "OUT_FIFO", - "x_coord": 0, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "IN_FIFO", @@ -8003,6 +6504,1505 @@ "type": "IN_FIFO", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y0", + "prefix": "OUT_FIFO", + "site_pins": { + "ALMOSTEMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" + }, + "ALMOSTFULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTFULL" + }, + "D00": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D00" + }, + "D01": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D01" + }, + "D02": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D02" + }, + "D03": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D03" + }, + "D04": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D04" + }, + "D05": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D05" + }, + "D06": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D06" + }, + "D07": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D07" + }, + "D10": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D10" + }, + "D11": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D11" + }, + "D12": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D12" + }, + "D13": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D13" + }, + "D14": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D14" + }, + "D15": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D15" + }, + "D16": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D16" + }, + "D17": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D17" + }, + "D20": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D20" + }, + "D21": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D21" + }, + "D22": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D22" + }, + "D23": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D23" + }, + "D24": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D24" + }, + "D25": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D25" + }, + "D26": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D26" + }, + "D27": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D27" + }, + "D30": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D30" + }, + "D31": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D31" + }, + "D32": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D32" + }, + "D33": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D33" + }, + "D34": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D34" + }, + "D35": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D35" + }, + "D36": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D36" + }, + "D37": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D37" + }, + "D40": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D40" + }, + "D41": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D41" + }, + "D42": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D42" + }, + "D43": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D43" + }, + "D44": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D44" + }, + "D45": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D45" + }, + "D46": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D46" + }, + "D47": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D47" + }, + "D50": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D50" + }, + "D51": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D51" + }, + "D52": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D52" + }, + "D53": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D53" + }, + "D54": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D54" + }, + "D55": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D55" + }, + "D56": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D56" + }, + "D57": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D57" + }, + "D60": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D60" + }, + "D61": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D61" + }, + "D62": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D62" + }, + "D63": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D63" + }, + "D64": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D64" + }, + "D65": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D65" + }, + "D66": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D66" + }, + "D67": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D67" + }, + "D70": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D70" + }, + "D71": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D71" + }, + "D72": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D72" + }, + "D73": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D73" + }, + "D74": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D74" + }, + "D75": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D75" + }, + "D76": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D76" + }, + "D77": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D77" + }, + "D80": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D80" + }, + "D81": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D81" + }, + "D82": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D82" + }, + "D83": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D83" + }, + "D84": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D84" + }, + "D85": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D85" + }, + "D86": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D86" + }, + "D87": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D87" + }, + "D90": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D90" + }, + "D91": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D91" + }, + "D92": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D92" + }, + "D93": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D93" + }, + "D94": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D94" + }, + "D95": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D95" + }, + "D96": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D96" + }, + "D97": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D97" + }, + "EMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_EMPTY" + }, + "FULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_FULL" + }, + "Q00": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q00" + }, + "Q01": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q01" + }, + "Q02": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q02" + }, + "Q03": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q03" + }, + "Q10": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q10" + }, + "Q11": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q11" + }, + "Q12": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q12" + }, + "Q13": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q13" + }, + "Q20": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q20" + }, + "Q21": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q21" + }, + "Q22": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q22" + }, + "Q23": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q23" + }, + "Q30": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q30" + }, + "Q31": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q31" + }, + "Q32": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q32" + }, + "Q33": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q33" + }, + "Q40": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q40" + }, + "Q41": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q41" + }, + "Q42": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q42" + }, + "Q43": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q43" + }, + "Q50": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q50" + }, + "Q51": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q51" + }, + "Q52": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q52" + }, + "Q53": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q53" + }, + "Q54": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q54" + }, + "Q55": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q55" + }, + "Q56": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q56" + }, + "Q57": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q57" + }, + "Q60": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q60" + }, + "Q61": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q61" + }, + "Q62": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q62" + }, + "Q63": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q63" + }, + "Q64": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q64" + }, + "Q65": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q65" + }, + "Q66": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q66" + }, + "Q67": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q67" + }, + "Q70": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q70" + }, + "Q71": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q71" + }, + "Q72": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q72" + }, + "Q73": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q73" + }, + "Q80": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q80" + }, + "Q81": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q81" + }, + "Q82": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q82" + }, + "Q83": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q83" + }, + "Q90": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q90" + }, + "Q91": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q91" + }, + "Q92": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q92" + }, + "Q93": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q93" + }, + "RDCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDCLK" + }, + "RDEN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDEN" + }, + "RESET": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RESET" + }, + "SCANENB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANENB" + }, + "SCANIN0": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN0" + }, + "SCANIN1": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN1" + }, + "SCANIN2": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN2" + }, + "SCANIN3": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN3" + }, + "SCANOUT0": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT0" + }, + "SCANOUT1": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT1" + }, + "SCANOUT2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT2" + }, + "SCANOUT3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT3" + }, + "TESTMODEB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTMODEB" + }, + "TESTREADDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTREADDISB" + }, + "TESTWRITEDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTWRITEDISB" + }, + "WRCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WRCLK" + }, + "WREN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WREN" + } + }, + "type": "OUT_FIFO", + "x_coord": 0, + "y_coord": 0 } ], "tile_type": "CMT_FIFO_L", diff --git a/zynq7/tile_type_CMT_FIFO_R.json b/zynq7/tile_type_CMT_FIFO_R.json index b289e0f..a85edd2 100644 --- a/zynq7/tile_type_CMT_FIFO_R.json +++ b/zynq7/tile_type_CMT_FIFO_R.json @@ -5006,1505 +5006,6 @@ } }, "sites": [ - { - "name": "X0Y0", - "prefix": "OUT_FIFO", - "site_pins": { - "ALMOSTEMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" - }, - "ALMOSTFULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_ALMOSTFULL" - }, - "D00": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D00" - }, - "D01": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D01" - }, - "D02": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D02" - }, - "D03": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D03" - }, - "D04": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D04" - }, - "D05": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D05" - }, - "D06": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D06" - }, - "D07": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D07" - }, - "D10": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D10" - }, - "D11": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D11" - }, - "D12": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D12" - }, - "D13": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D13" - }, - "D14": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D14" - }, - "D15": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D15" - }, - "D16": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D16" - }, - "D17": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D17" - }, - "D20": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D20" - }, - "D21": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D21" - }, - "D22": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D22" - }, - "D23": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D23" - }, - "D24": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D24" - }, - "D25": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D25" - }, - "D26": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D26" - }, - "D27": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D27" - }, - "D30": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D30" - }, - "D31": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D31" - }, - "D32": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D32" - }, - "D33": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D33" - }, - "D34": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D34" - }, - "D35": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D35" - }, - "D36": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D36" - }, - "D37": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D37" - }, - "D40": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D40" - }, - "D41": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D41" - }, - "D42": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D42" - }, - "D43": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D43" - }, - "D44": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D44" - }, - "D45": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D45" - }, - "D46": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D46" - }, - "D47": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D47" - }, - "D50": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D50" - }, - "D51": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D51" - }, - "D52": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D52" - }, - "D53": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D53" - }, - "D54": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D54" - }, - "D55": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D55" - }, - "D56": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D56" - }, - "D57": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D57" - }, - "D60": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D60" - }, - "D61": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D61" - }, - "D62": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D62" - }, - "D63": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D63" - }, - "D64": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D64" - }, - "D65": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D65" - }, - "D66": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D66" - }, - "D67": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D67" - }, - "D70": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D70" - }, - "D71": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D71" - }, - "D72": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D72" - }, - "D73": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D73" - }, - "D74": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D74" - }, - "D75": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D75" - }, - "D76": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D76" - }, - "D77": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D77" - }, - "D80": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D80" - }, - "D81": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D81" - }, - "D82": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D82" - }, - "D83": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D83" - }, - "D84": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D84" - }, - "D85": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D85" - }, - "D86": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D86" - }, - "D87": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D87" - }, - "D90": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D90" - }, - "D91": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D91" - }, - "D92": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D92" - }, - "D93": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D93" - }, - "D94": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D94" - }, - "D95": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D95" - }, - "D96": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D96" - }, - "D97": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_D97" - }, - "EMPTY": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_EMPTY" - }, - "FULL": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_FULL" - }, - "Q00": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q00" - }, - "Q01": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q01" - }, - "Q02": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q02" - }, - "Q03": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q03" - }, - "Q10": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q10" - }, - "Q11": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q11" - }, - "Q12": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q12" - }, - "Q13": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q13" - }, - "Q20": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q20" - }, - "Q21": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q21" - }, - "Q22": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q22" - }, - "Q23": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q23" - }, - "Q30": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q30" - }, - "Q31": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q31" - }, - "Q32": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q32" - }, - "Q33": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q33" - }, - "Q40": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q40" - }, - "Q41": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q41" - }, - "Q42": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q42" - }, - "Q43": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q43" - }, - "Q50": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q50" - }, - "Q51": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q51" - }, - "Q52": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q52" - }, - "Q53": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q53" - }, - "Q54": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q54" - }, - "Q55": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q55" - }, - "Q56": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q56" - }, - "Q57": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q57" - }, - "Q60": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q60" - }, - "Q61": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q61" - }, - "Q62": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q62" - }, - "Q63": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q63" - }, - "Q64": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q64" - }, - "Q65": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q65" - }, - "Q66": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q66" - }, - "Q67": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q67" - }, - "Q70": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q70" - }, - "Q71": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q71" - }, - "Q72": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q72" - }, - "Q73": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q73" - }, - "Q80": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q80" - }, - "Q81": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q81" - }, - "Q82": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q82" - }, - "Q83": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q83" - }, - "Q90": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q90" - }, - "Q91": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q91" - }, - "Q92": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q92" - }, - "Q93": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_Q93" - }, - "RDCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDCLK" - }, - "RDEN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RDEN" - }, - "RESET": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_RESET" - }, - "SCANENB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANENB" - }, - "SCANIN0": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN0" - }, - "SCANIN1": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN1" - }, - "SCANIN2": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN2" - }, - "SCANIN3": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_SCANIN3" - }, - "SCANOUT0": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT0" - }, - "SCANOUT1": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT1" - }, - "SCANOUT2": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT2" - }, - "SCANOUT3": { - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "res": "0.0", - "wire": "CMT_OUT_FIFO_SCANOUT3" - }, - "TESTMODEB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTMODEB" - }, - "TESTREADDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTREADDISB" - }, - "TESTWRITEDISB": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_TESTWRITEDISB" - }, - "WRCLK": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WRCLK" - }, - "WREN": { - "cap": "0.000", - "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" - ], - "wire": "CMT_OUT_FIFO_WREN" - } - }, - "type": "OUT_FIFO", - "x_coord": 0, - "y_coord": 0 - }, { "name": "X0Y0", "prefix": "IN_FIFO", @@ -8003,6 +6504,1505 @@ "type": "IN_FIFO", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y0", + "prefix": "OUT_FIFO", + "site_pins": { + "ALMOSTEMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTEMPTY" + }, + "ALMOSTFULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_ALMOSTFULL" + }, + "D00": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D00" + }, + "D01": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D01" + }, + "D02": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D02" + }, + "D03": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D03" + }, + "D04": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D04" + }, + "D05": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D05" + }, + "D06": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D06" + }, + "D07": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D07" + }, + "D10": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D10" + }, + "D11": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D11" + }, + "D12": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D12" + }, + "D13": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D13" + }, + "D14": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D14" + }, + "D15": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D15" + }, + "D16": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D16" + }, + "D17": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D17" + }, + "D20": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D20" + }, + "D21": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D21" + }, + "D22": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D22" + }, + "D23": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D23" + }, + "D24": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D24" + }, + "D25": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D25" + }, + "D26": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D26" + }, + "D27": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D27" + }, + "D30": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D30" + }, + "D31": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D31" + }, + "D32": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D32" + }, + "D33": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D33" + }, + "D34": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D34" + }, + "D35": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D35" + }, + "D36": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D36" + }, + "D37": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D37" + }, + "D40": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D40" + }, + "D41": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D41" + }, + "D42": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D42" + }, + "D43": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D43" + }, + "D44": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D44" + }, + "D45": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D45" + }, + "D46": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D46" + }, + "D47": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D47" + }, + "D50": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D50" + }, + "D51": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D51" + }, + "D52": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D52" + }, + "D53": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D53" + }, + "D54": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D54" + }, + "D55": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D55" + }, + "D56": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D56" + }, + "D57": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D57" + }, + "D60": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D60" + }, + "D61": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D61" + }, + "D62": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D62" + }, + "D63": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D63" + }, + "D64": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D64" + }, + "D65": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D65" + }, + "D66": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D66" + }, + "D67": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D67" + }, + "D70": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D70" + }, + "D71": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D71" + }, + "D72": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D72" + }, + "D73": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D73" + }, + "D74": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D74" + }, + "D75": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D75" + }, + "D76": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D76" + }, + "D77": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D77" + }, + "D80": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D80" + }, + "D81": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D81" + }, + "D82": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D82" + }, + "D83": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D83" + }, + "D84": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D84" + }, + "D85": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D85" + }, + "D86": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D86" + }, + "D87": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D87" + }, + "D90": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D90" + }, + "D91": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D91" + }, + "D92": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D92" + }, + "D93": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D93" + }, + "D94": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D94" + }, + "D95": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D95" + }, + "D96": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D96" + }, + "D97": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_D97" + }, + "EMPTY": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_EMPTY" + }, + "FULL": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_FULL" + }, + "Q00": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q00" + }, + "Q01": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q01" + }, + "Q02": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q02" + }, + "Q03": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q03" + }, + "Q10": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q10" + }, + "Q11": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q11" + }, + "Q12": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q12" + }, + "Q13": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q13" + }, + "Q20": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q20" + }, + "Q21": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q21" + }, + "Q22": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q22" + }, + "Q23": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q23" + }, + "Q30": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q30" + }, + "Q31": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q31" + }, + "Q32": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q32" + }, + "Q33": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q33" + }, + "Q40": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q40" + }, + "Q41": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q41" + }, + "Q42": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q42" + }, + "Q43": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q43" + }, + "Q50": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q50" + }, + "Q51": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q51" + }, + "Q52": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q52" + }, + "Q53": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q53" + }, + "Q54": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q54" + }, + "Q55": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q55" + }, + "Q56": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q56" + }, + "Q57": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q57" + }, + "Q60": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q60" + }, + "Q61": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q61" + }, + "Q62": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q62" + }, + "Q63": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q63" + }, + "Q64": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q64" + }, + "Q65": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q65" + }, + "Q66": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q66" + }, + "Q67": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q67" + }, + "Q70": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q70" + }, + "Q71": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q71" + }, + "Q72": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q72" + }, + "Q73": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q73" + }, + "Q80": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q80" + }, + "Q81": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q81" + }, + "Q82": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q82" + }, + "Q83": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q83" + }, + "Q90": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q90" + }, + "Q91": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q91" + }, + "Q92": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q92" + }, + "Q93": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_Q93" + }, + "RDCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDCLK" + }, + "RDEN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RDEN" + }, + "RESET": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_RESET" + }, + "SCANENB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANENB" + }, + "SCANIN0": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN0" + }, + "SCANIN1": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN1" + }, + "SCANIN2": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN2" + }, + "SCANIN3": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_SCANIN3" + }, + "SCANOUT0": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT0" + }, + "SCANOUT1": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT1" + }, + "SCANOUT2": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT2" + }, + "SCANOUT3": { + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "res": "0.0", + "wire": "CMT_OUT_FIFO_SCANOUT3" + }, + "TESTMODEB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTMODEB" + }, + "TESTREADDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTREADDISB" + }, + "TESTWRITEDISB": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_TESTWRITEDISB" + }, + "WRCLK": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WRCLK" + }, + "WREN": { + "cap": "0.000", + "delay": [ + "0.000", + "0.000", + "0.000", + "0.000" + ], + "wire": "CMT_OUT_FIFO_WREN" + } + }, + "type": "OUT_FIFO", + "x_coord": 0, + "y_coord": 0 } ], "tile_type": "CMT_FIFO_R", diff --git a/zynq7/tile_type_HCLK_CMT.json b/zynq7/tile_type_HCLK_CMT.json index 331b3cb..e5344a5 100644 --- a/zynq7/tile_type_HCLK_CMT.json +++ b/zynq7/tile_type_HCLK_CMT.json @@ -27478,45 +27478,6 @@ } }, "sites": [ - { - "name": "X0Y1", - "prefix": "BUFMRCE", - "site_pins": { - "CE": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMRCE_CEINP1" - }, - "I": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMR_INP1" - }, - "O": { - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "res": "0.0", - "wire": "HCLK_CMT_BUFMRCE_O1" - } - }, - "type": "BUFMRCE", - "x_coord": 0, - "y_coord": 1 - }, { "name": "X0Y0", "prefix": "BUFMRCE", @@ -27555,6 +27516,45 @@ "type": "BUFMRCE", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y1", + "prefix": "BUFMRCE", + "site_pins": { + "CE": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMRCE_CEINP1" + }, + "I": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMR_INP1" + }, + "O": { + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "res": "0.0", + "wire": "HCLK_CMT_BUFMRCE_O1" + } + }, + "type": "BUFMRCE", + "x_coord": 0, + "y_coord": 1 } ], "tile_type": "HCLK_CMT", diff --git a/zynq7/tile_type_HCLK_CMT_L.json b/zynq7/tile_type_HCLK_CMT_L.json index aa55825..3a388d5 100644 --- a/zynq7/tile_type_HCLK_CMT_L.json +++ b/zynq7/tile_type_HCLK_CMT_L.json @@ -27478,45 +27478,6 @@ } }, "sites": [ - { - "name": "X0Y1", - "prefix": "BUFMRCE", - "site_pins": { - "CE": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMRCE_CEINP1" - }, - "I": { - "cap": "0.000", - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "wire": "HCLK_CMT_BUFMR_INP1" - }, - "O": { - "delay": [ - "0.001", - "0.001", - "0.001", - "0.001" - ], - "res": "0.0", - "wire": "HCLK_CMT_BUFMRCE_O1" - } - }, - "type": "BUFMRCE", - "x_coord": 0, - "y_coord": 1 - }, { "name": "X0Y0", "prefix": "BUFMRCE", @@ -27555,6 +27516,45 @@ "type": "BUFMRCE", "x_coord": 0, "y_coord": 0 + }, + { + "name": "X0Y1", + "prefix": "BUFMRCE", + "site_pins": { + "CE": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMRCE_CEINP1" + }, + "I": { + "cap": "0.000", + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "wire": "HCLK_CMT_BUFMR_INP1" + }, + "O": { + "delay": [ + "0.001", + "0.001", + "0.001", + "0.001" + ], + "res": "0.0", + "wire": "HCLK_CMT_BUFMRCE_O1" + } + }, + "type": "BUFMRCE", + "x_coord": 0, + "y_coord": 1 } ], "tile_type": "HCLK_CMT_L", diff --git a/zynq7/tile_type_INT_L.json b/zynq7/tile_type_INT_L.json index 8f5cc59..68e74cf 100644 --- a/zynq7/tile_type_INT_L.json +++ b/zynq7/tile_type_INT_L.json @@ -12856,13 +12856,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -12870,13 +12870,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -12884,13 +12884,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -12898,13 +12898,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -23048,13 +23048,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23062,13 +23062,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23076,13 +23076,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23090,13 +23090,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23356,13 +23356,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23370,13 +23370,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23384,13 +23384,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23398,13 +23398,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23412,13 +23412,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -23426,13 +23426,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23440,13 +23440,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -23454,13 +23454,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23692,13 +23692,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -23706,13 +23706,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -23720,13 +23720,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -23734,13 +23734,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -45672,13 +45672,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "0", @@ -45686,13 +45686,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LVB_L0" }, @@ -45952,13 +45952,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -45966,13 +45966,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L0" }, @@ -45980,13 +45980,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -45994,13 +45994,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L0" }, @@ -46204,13 +46204,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46232,13 +46232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -46260,13 +46260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "0", @@ -46274,13 +46274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L0" }, @@ -46596,13 +46596,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -46610,13 +46610,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L18" }, @@ -46624,13 +46624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -46638,13 +46638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV_L18" }, @@ -46848,13 +46848,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46876,13 +46876,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -49116,13 +49116,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -49130,13 +49130,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -49144,13 +49144,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -49158,13 +49158,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -58860,13 +58860,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -58874,13 +58874,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -58888,13 +58888,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -58902,13 +58902,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -60260,13 +60260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -60274,13 +60274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -60288,13 +60288,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -60302,13 +60302,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -61240,13 +61240,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -61254,13 +61254,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -61268,13 +61268,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -61282,13 +61282,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -63424,13 +63424,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -63438,13 +63438,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -63452,13 +63452,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -63466,13 +63466,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -65524,13 +65524,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -65538,13 +65538,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -65552,13 +65552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -65566,13 +65566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -67372,13 +67372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -67386,13 +67386,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -67400,13 +67400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -67414,13 +67414,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -68660,13 +68660,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -68674,13 +68674,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -68688,13 +68688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -68702,13 +68702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -72552,13 +72552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -72566,13 +72566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -72580,13 +72580,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -72594,13 +72594,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -74456,13 +74456,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -74470,13 +74470,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -74484,13 +74484,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -74498,13 +74498,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -78012,13 +78012,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -78026,13 +78026,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -78040,13 +78040,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -78054,13 +78054,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -88232,13 +88232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -88246,13 +88246,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -88260,13 +88260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -88274,13 +88274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -89072,13 +89072,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -89086,13 +89086,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89100,13 +89100,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -89114,13 +89114,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89688,13 +89688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -89702,13 +89702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -89716,13 +89716,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -89730,13 +89730,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -90696,13 +90696,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -90710,13 +90710,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -90724,13 +90724,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -90738,13 +90738,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -96464,13 +96464,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -96478,13 +96478,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -96492,13 +96492,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -96506,13 +96506,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -98536,13 +98536,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -98550,13 +98550,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -98564,13 +98564,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -98578,13 +98578,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -102624,13 +102624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L0", "is_directional": "1", @@ -102638,13 +102638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -102652,13 +102652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV_L18", "is_directional": "1", @@ -102666,13 +102666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -103940,13 +103940,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L0", "is_directional": "1", @@ -103954,13 +103954,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, @@ -103968,13 +103968,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB_L12", "is_directional": "1", @@ -103982,13 +103982,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, diff --git a/zynq7/tile_type_INT_R.json b/zynq7/tile_type_INT_R.json index f2ba91a..0c043be 100644 --- a/zynq7/tile_type_INT_R.json +++ b/zynq7/tile_type_INT_R.json @@ -12856,13 +12856,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -12870,13 +12870,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -12884,13 +12884,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -12898,13 +12898,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "ER1END0" }, @@ -23048,13 +23048,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23062,13 +23062,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23076,13 +23076,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23090,13 +23090,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH0" }, @@ -23356,13 +23356,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -23370,13 +23370,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23384,13 +23384,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -23398,13 +23398,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23412,13 +23412,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23426,13 +23426,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23440,13 +23440,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23454,13 +23454,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH6" }, @@ -23692,13 +23692,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -23706,13 +23706,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -23720,13 +23720,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -23734,13 +23734,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LH12" }, @@ -45476,13 +45476,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -45490,13 +45490,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV0" }, @@ -45504,13 +45504,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -45518,13 +45518,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV0" }, @@ -45728,13 +45728,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -45756,13 +45756,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -45784,13 +45784,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "0", @@ -45798,13 +45798,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV0" }, @@ -46120,13 +46120,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -46134,13 +46134,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV18" }, @@ -46148,13 +46148,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -46162,13 +46162,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LV18" }, @@ -46372,13 +46372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH0", "is_directional": "0", @@ -46400,13 +46400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LH12", "is_directional": "0", @@ -46652,13 +46652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "0", @@ -46666,13 +46666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "LVB0" }, @@ -49116,13 +49116,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -49130,13 +49130,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -49144,13 +49144,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -49158,13 +49158,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NE2END2" }, @@ -58860,13 +58860,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -58874,13 +58874,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -58888,13 +58888,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -58902,13 +58902,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END0" }, @@ -60260,13 +60260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -60274,13 +60274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -60288,13 +60288,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -60302,13 +60302,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NN6END3" }, @@ -61240,13 +61240,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -61254,13 +61254,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -61268,13 +61268,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -61282,13 +61282,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END0" }, @@ -63424,13 +63424,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -63438,13 +63438,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -63452,13 +63452,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -63466,13 +63466,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NR1END3" }, @@ -65524,13 +65524,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -65538,13 +65538,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -65552,13 +65552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -65566,13 +65566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW2END2" }, @@ -67372,13 +67372,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -67386,13 +67386,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -67400,13 +67400,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -67414,13 +67414,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END0" }, @@ -68660,13 +68660,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -68674,13 +68674,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -68688,13 +68688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -68702,13 +68702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "NW6END3" }, @@ -72552,13 +72552,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -72566,13 +72566,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -72580,13 +72580,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -72594,13 +72594,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE2END3" }, @@ -74456,13 +74456,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -74470,13 +74470,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -74484,13 +74484,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -74498,13 +74498,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SE6END3" }, @@ -78012,13 +78012,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -78026,13 +78026,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -78040,13 +78040,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -78054,13 +78054,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SR1BEG_S0" }, @@ -88232,13 +88232,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -88246,13 +88246,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -88260,13 +88260,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -88274,13 +88274,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END2" }, @@ -89072,13 +89072,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -89086,13 +89086,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89100,13 +89100,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -89114,13 +89114,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW2END3" }, @@ -89688,13 +89688,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -89702,13 +89702,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -89716,13 +89716,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -89730,13 +89730,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END0" }, @@ -90696,13 +90696,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -90710,13 +90710,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -90724,13 +90724,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -90738,13 +90738,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "SW6END2" }, @@ -96464,13 +96464,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -96478,13 +96478,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -96492,13 +96492,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -96506,13 +96506,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END0" }, @@ -98536,13 +98536,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -98550,13 +98550,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -98564,13 +98564,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -98578,13 +98578,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WR1END3" }, @@ -102624,13 +102624,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV0", "is_directional": "1", @@ -102638,13 +102638,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -102652,13 +102652,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LV18", "is_directional": "1", @@ -102666,13 +102666,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END0" }, @@ -103940,13 +103940,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB0", "is_directional": "1", @@ -103954,13 +103954,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, @@ -103968,13 +103968,13 @@ "can_invert": "0", "dst_to_src": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "dst_wire": "LVB12", "is_directional": "1", @@ -103982,13 +103982,13 @@ "is_pseudo": "0", "src_to_dst": { "delay": [ - "0.000", - "0.000", - "0.000", - "0.000" + "0.108", + "0.131", + "0.249", + "0.301" ], - "in_cap": null, - "res": null + "in_cap": "13.478", + "res": "756.9375" }, "src_wire": "WW4END3" }, diff --git a/zynq7/timings/DSP_L.sdf b/zynq7/timings/DSP_L.sdf new file mode 100644 index 0000000..e23a6ff --- /dev/null +++ b/zynq7/timings/DSP_L.sdf @@ -0,0 +1,1881 @@ + +(DELAYFILE + (SDFVERSION "3.0") + (TIMESCALE 1ns) + + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN ACOUT (0.132::0.185)(0.317::0.521)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A ACOUT (0.219::0.303)(0.473::0.723)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_1_AREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_2_AREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::2.181)(0.753::5.329)) + (IOPATH ACIN CARRYOUT (0.313::2.046)(0.743::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.324::2.053)(0.731::4.958)) + (IOPATH ACIN P (0.320::2.055)(0.754::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PATTERNDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PCOUT (0.341::2.139)(0.797::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.565::2.181)(1.328::5.329)) + (IOPATH ACIN CARRYOUT (0.550::2.046)(1.317::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.562::2.053)(1.307::4.958)) + (IOPATH ACIN P (0.556::2.055)(1.329::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PATTERNDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PCOUT (0.579::2.139)(1.372::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.977)) + (SETUP ACIN (posedge CLK) (0.977::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-1.047)) + (SETUP ACIN (posedge CLK) (1.047::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::2.298)(0.908::5.531)) + (IOPATH A CARRYOUT (0.397::2.162)(0.900::5.177)) + (IOPATH A MULTSIGNOUT (0.410::2.170)(0.887::5.159)) + (IOPATH A P (0.404::2.173)(0.911::5.201)) + (IOPATH A PATTERNBDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PATTERNDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PCOUT (0.426::2.256)(0.952::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.653::2.298)(1.484::5.531)) + (IOPATH A CARRYOUT (0.637::2.162)(1.474::5.177)) + (IOPATH A MULTSIGNOUT (0.649::2.170)(1.462::5.159)) + (IOPATH A P (0.643::2.173)(1.485::5.201)) + (IOPATH A PATTERNBDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PATTERNDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PCOUT (0.666::2.256)(1.528::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-0.558)) + (SETUP A (posedge CLK) (0.558::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-0.627)) + (SETUP A (posedge CLK) (0.627::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-1.134)) + (SETUP A (posedge CLK) (1.134::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-1.203)) + (SETUP A (posedge CLK) (1.203::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH A P (0.587::2.142)(1.346::5.070)) + (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH A P (0.587::2.142)(1.346::5.070)) + (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.951::-0.994)) + (SETUP A (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.342::-1.063)) + (SETUP A (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.951::-0.994)) + (SETUP A (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.342::-1.063)) + (SETUP A (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEAD (posedge CLK) (-0.426::-0.038)) + (SETUP CEAD (posedge CLK) (0.038::0.426)) + (HOLD RSTD (posedge CLK) (-0.589::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.589)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.555::-0.034)) + (SETUP ACIN (posedge CLK) (0.034::1.555)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.756::-0.191)) + (SETUP A (posedge CLK) (0.191::1.756)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_DREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-1.626::-0.051)) + (SETUP D (posedge CLK) (0.051::1.626)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_INMODEREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.089::-0.036)) + (SETUP INMODE (posedge CLK) (0.036::2.089)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ALUMODE CARRYCASCOUT (0.417::1.051)(0.917::2.427)) + (IOPATH ALUMODE CARRYOUT (0.401::0.916)(0.907::2.074)) + (IOPATH ALUMODE MULTSIGNOUT (0.413::0.925)(0.895::2.055)) + (IOPATH ALUMODE P (0.407::0.927)(0.918::2.098)) + (IOPATH ALUMODE PATTERNBDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PATTERNDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PCOUT (0.429::1.010)(0.961::2.292)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-1.978::-0.566)) + (SETUP ALUMODE (posedge CLK) (0.566::1.978)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-2.369::-0.635)) + (SETUP ALUMODE (posedge CLK) (0.635::2.369)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-0.246::0.208)) + (SETUP ALUMODE (posedge CLK) (-0.208::0.246)) + (HOLD CEALUMODE (posedge CLK) (-0.411::0.121)) + (SETUP CEALUMODE (posedge CLK) (-0.121::0.411)) + (HOLD RSTALUMODE (posedge CLK) (-0.411::0.074)) + (SETUP RSTALUMODE (posedge CLK) (-0.074::0.411)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.062)(1.036::2.385)) + (IOPATH CLK CARRYOUT (0.458::0.926)(1.025::2.031)) + (IOPATH CLK MULTSIGNOUT (0.470::0.934)(1.014::2.013)) + (IOPATH CLK P (0.465::0.935)(1.037::2.054)) + (IOPATH CLK PATTERNBDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PATTERNDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PCOUT (0.486::1.018)(1.080::2.251)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::1.650)(0.753::3.969)) + (IOPATH ACIN CARRYOUT (0.313::1.514)(0.743::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.324::1.523)(0.731::3.598)) + (IOPATH ACIN P (0.320::1.526)(0.754::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PATTERNDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PCOUT (0.341::1.608)(0.797::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.531::1.650)(1.233::3.969)) + (IOPATH ACIN CARRYOUT (0.516::1.514)(1.223::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.527::1.523)(1.212::3.598)) + (IOPATH ACIN P (0.521::1.526)(1.235::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PATTERNDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PCOUT (0.543::1.608)(1.278::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.883)) + (SETUP ACIN (posedge CLK) (0.883::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.952)) + (SETUP ACIN (posedge CLK) (0.952::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::0.881)(0.753::2.205)) + (IOPATH ACIN CARRYOUT (0.313::0.745)(0.743::1.852)) + (IOPATH ACIN MULTSIGNOUT (0.324::0.754)(0.731::1.834)) + (IOPATH ACIN P (0.320::0.756)(0.754::1.874)) + (IOPATH ACIN PATTERNBDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PATTERNDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PCOUT (0.341::0.838)(0.797::2.071)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.755::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::1.755)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-2.148::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::2.148)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::1.767)(0.908::4.171)) + (IOPATH A CARRYOUT (0.397::1.632)(0.900::3.818)) + (IOPATH A MULTSIGNOUT (0.410::1.639)(0.887::3.799)) + (IOPATH A P (0.404::1.642)(0.911::3.841)) + (IOPATH A PATTERNBDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PATTERNDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PCOUT (0.426::1.725)(0.952::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.618::1.767)(1.389::4.171)) + (IOPATH A CARRYOUT (0.603::1.632)(1.380::3.818)) + (IOPATH A MULTSIGNOUT (0.614::1.639)(1.368::3.799)) + (IOPATH A P (0.609::1.642)(1.391::3.841)) + (IOPATH A PATTERNBDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PATTERNDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PCOUT (0.631::1.725)(1.434::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-0.558)) + (SETUP A (posedge CLK) (0.558::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-0.627)) + (SETUP A (posedge CLK) (0.627::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-1.040)) + (SETUP A (posedge CLK) (1.040::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-1.109)) + (SETUP A (posedge CLK) (1.109::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::0.997)(0.908::2.407)) + (IOPATH A CARRYOUT (0.397::0.863)(0.900::2.053)) + (IOPATH A MULTSIGNOUT (0.410::0.870)(0.887::2.036)) + (IOPATH A P (0.404::0.873)(0.911::2.077)) + (IOPATH A PATTERNBDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PATTERNDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PCOUT (0.426::0.956)(0.952::2.271)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.958::-0.558)) + (SETUP A (posedge CLK) (0.558::1.958)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-2.349::-0.627)) + (SETUP A (posedge CLK) (0.627::2.349)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN BCOUT (0.146::0.180)(0.348::0.490)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B BCOUT (0.235::0.308)(0.515::0.735)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_1_BREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_2_BREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::1.572)(0.749::3.741)) + (IOPATH BCIN CARRYOUT (0.309::1.436)(0.738::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.322::1.445)(0.728::3.369)) + (IOPATH BCIN P (0.316::1.447)(0.750::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PATTERNDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PCOUT (0.339::1.529)(0.793::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.491::1.572)(1.143::3.741)) + (IOPATH BCIN CARRYOUT (0.476::1.436)(1.134::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.487::1.445)(1.122::3.369)) + (IOPATH BCIN P (0.481::1.447)(1.145::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PATTERNDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PCOUT (0.504::1.529)(1.188::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.794)) + (SETUP BCIN (posedge CLK) (0.794::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.863)) + (SETUP BCIN (posedge CLK) (0.863::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::0.864)(0.749::2.141)) + (IOPATH BCIN CARRYOUT (0.309::0.728)(0.738::1.788)) + (IOPATH BCIN MULTSIGNOUT (0.322::0.736)(0.728::1.771)) + (IOPATH BCIN P (0.316::0.737)(0.750::1.812)) + (IOPATH BCIN PATTERNBDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PATTERNDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PCOUT (0.339::0.821)(0.793::2.006)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.692::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::1.692)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-2.085::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::2.085)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::1.699)(0.914::3.986)) + (IOPATH B CARRYOUT (0.400::1.564)(0.904::3.633)) + (IOPATH B MULTSIGNOUT (0.411::1.572)(0.893::3.615)) + (IOPATH B P (0.405::1.575)(0.915::3.656)) + (IOPATH B PATTERNBDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PATTERNDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PCOUT (0.428::1.658)(0.958::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.580::1.699)(1.309::3.986)) + (IOPATH B CARRYOUT (0.565::1.564)(1.299::3.633)) + (IOPATH B MULTSIGNOUT (0.577::1.572)(1.288::3.615)) + (IOPATH B P (0.571::1.575)(1.310::3.656)) + (IOPATH B PATTERNBDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PATTERNDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PCOUT (0.593::1.658)(1.354::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.564)) + (SETUP B (posedge CLK) (0.564::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-0.633)) + (SETUP B (posedge CLK) (0.633::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.959)) + (SETUP B (posedge CLK) (0.959::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-1.028)) + (SETUP B (posedge CLK) (1.028::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::0.991)(0.914::2.387)) + (IOPATH B CARRYOUT (0.400::0.855)(0.904::2.033)) + (IOPATH B MULTSIGNOUT (0.411::0.864)(0.893::2.017)) + (IOPATH B P (0.405::0.865)(0.915::2.057)) + (IOPATH B PATTERNBDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PATTERNDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PCOUT (0.428::0.948)(0.958::2.252)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.938::-0.564)) + (SETUP B (posedge CLK) (0.564::1.938)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-2.331::-0.633)) + (SETUP B (posedge CLK) (0.633::2.331)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYIN CARRYCASCOUT (0.361::0.723)(0.830::1.746)) + (IOPATH CARRYIN CARRYOUT (0.346::0.587)(0.820::1.393)) + (IOPATH CARRYIN MULTSIGNOUT (0.358::0.595)(0.809::1.376)) + (IOPATH CARRYIN P (0.352::0.596)(0.831::1.416)) + (IOPATH CARRYIN PATTERNBDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PATTERNDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PCOUT (0.375::0.680)(0.875::1.613)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.298::-0.480)) + (SETUP CARRYIN (posedge CLK) (0.480::1.298)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.690::-0.549)) + (SETUP CARRYIN (posedge CLK) (0.549::1.690)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-0.299::0.151)) + (SETUP CARRYIN (posedge CLK) (-0.151::0.299)) + (HOLD CECARRYIN (posedge CLK) (-0.665::-0.049)) + (SETUP CECARRYIN (posedge CLK) (0.049::0.665)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.284::0.123)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.123::0.284)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.461::0.885)(1.032::2.094)) + (IOPATH CLK CARRYOUT (0.445::0.749)(1.023::1.740)) + (IOPATH CLK MULTSIGNOUT (0.458::0.757)(1.012::1.723)) + (IOPATH CLK P (0.452::0.758)(1.034::1.764)) + (IOPATH CLK PATTERNBDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PATTERNDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PCOUT (0.473::0.841)(1.077::1.958)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYINSEL CARRYCASCOUT (0.384::0.919)(0.856::2.241)) + (IOPATH CARRYINSEL CARRYOUT (0.369::0.784)(0.846::1.888)) + (IOPATH CARRYINSEL MULTSIGNOUT (0.379::0.791)(0.835::1.870)) + (IOPATH CARRYINSEL P (0.375::0.794)(0.857::1.910)) + (IOPATH CARRYINSEL PATTERNBDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PATTERNDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PCOUT (0.396::0.878)(0.900::2.106)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-1.793::-0.506)) + (SETUP CARRYINSEL (posedge CLK) (0.506::1.793)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-2.184::-0.575)) + (SETUP CARRYINSEL (posedge CLK) (0.575::2.184)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-0.208::0.174)) + (SETUP CARRYINSEL (posedge CLK) (-0.174::0.208)) + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.455::0.981)(1.012::2.257)) + (IOPATH CLK CARRYOUT (0.440::0.844)(1.002::1.903)) + (IOPATH CLK MULTSIGNOUT (0.452::0.853)(0.991::1.884)) + (IOPATH CLK P (0.446::0.854)(1.014::1.927)) + (IOPATH CLK PATTERNBDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PATTERNDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PCOUT (0.468::0.938)(1.057::2.122)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH C CARRYCASCOUT (0.317::0.868)(0.705::2.150)) + (IOPATH C CARRYOUT (0.302::0.732)(0.696::1.797)) + (IOPATH C MULTSIGNOUT (0.314::0.742)(0.684::1.779)) + (IOPATH C P (0.308::0.743)(0.707::1.820)) + (IOPATH C PATTERNBDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PATTERNDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PCOUT (0.331::0.826)(0.750::2.016)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-1.701::-0.355)) + (SETUP C (posedge CLK) (0.355::1.701)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-2.093::-0.424)) + (SETUP C (posedge CLK) (0.424::2.093)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-0.233::0.210)) + (SETUP C (posedge CLK) (-0.210::0.233)) + (HOLD CEC (posedge CLK) (-0.414::0.124)) + (SETUP CEC (posedge CLK) (-0.124::0.414)) + (HOLD RSTC (posedge CLK) (-0.084::0.119)) + (SETUP RSTC (posedge CLK) (-0.119::0.084)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.487::1.077)(1.080::2.621)) + (IOPATH CLK CARRYOUT (0.472::0.941)(1.070::2.268)) + (IOPATH CLK MULTSIGNOUT (0.484::0.950)(1.059::2.251)) + (IOPATH CLK P (0.478::0.953)(1.082::2.291)) + (IOPATH CLK PATTERNBDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PATTERNDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PCOUT (0.501::1.035)(1.125::2.488)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_DREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CED (posedge CLK) (-0.513::-0.054)) + (SETUP CED (posedge CLK) (0.054::0.513)) + (HOLD D (posedge CLK) (-0.413::0.265)) + (SETUP D (posedge CLK) (-0.265::0.413)) + (HOLD RSTD (posedge CLK) (-0.587::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.587)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEINMODE (posedge CLK) (-0.603::0.205)) + (SETUP CEINMODE (posedge CLK) (-0.205::0.603)) + (HOLD INMODE (posedge CLK) (-0.449::0.186)) + (SETUP INMODE (posedge CLK) (-0.186::0.449)) + (HOLD RSTINMODE (posedge CLK) (-0.686::0.074)) + (SETUP RSTINMODE (posedge CLK) (-0.074::0.686)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEM (posedge CLK) (-0.266::0.224)) + (SETUP CEM (posedge CLK) (-0.224::0.266)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.287::0.120)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.120::0.287)) + (HOLD RSTM (posedge CLK) (-0.270::0.274)) + (SETUP RSTM (posedge CLK) (-0.274::0.270)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.045)(1.051::2.634)) + (IOPATH CLK CARRYOUT (0.458::0.909)(1.043::2.282)) + (IOPATH CLK MULTSIGNOUT (0.470::0.918)(1.030::2.263)) + (IOPATH CLK P (0.465::0.919)(1.053::2.305)) + (IOPATH CLK PATTERNBDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PATTERNDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PCOUT (0.486::1.003)(1.095::2.500)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH OPMODE CARRYCASCOUT (0.446::1.127)(0.991::2.657)) + (IOPATH OPMODE CARRYOUT (0.432::0.993)(0.981::2.304)) + (IOPATH OPMODE MULTSIGNOUT (0.443::1.000)(0.970::2.286)) + (IOPATH OPMODE P (0.437::1.003)(0.993::2.326)) + (IOPATH OPMODE PATTERNBDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PATTERNDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PCOUT (0.460::1.086)(1.036::2.522)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.209::-0.640)) + (SETUP OPMODE (posedge CLK) (0.640::2.209)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.600::-0.710)) + (SETUP OPMODE (posedge CLK) (0.710::2.600)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD OPMODE (posedge CLK) (-0.449::0.223)) + (SETUP OPMODE (posedge CLK) (-0.223::0.449)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.492::1.127)(1.093::2.562)) + (IOPATH CLK CARRYOUT (0.477::0.991)(1.084::2.208)) + (IOPATH CLK MULTSIGNOUT (0.489::1.000)(1.071::2.189)) + (IOPATH CLK P (0.483::1.002)(1.095::2.231)) + (IOPATH CLK PATTERNBDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PATTERNDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PCOUT (0.505::1.085)(1.139::2.426)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYCASCIN CARRYCASCOUT (0.271::0.615)(0.605::1.478)) + (IOPATH CARRYCASCIN CARRYOUT (0.255::0.479)(0.596::1.124)) + (IOPATH CARRYCASCIN MULTSIGNOUT (0.267::0.487)(0.585::1.106)) + (IOPATH CARRYCASCIN P (0.262::0.490)(0.607::1.147)) + (IOPATH CARRYCASCIN PATTERNBDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PATTERNDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PCOUT (0.283::0.573)(0.650::1.343)) + (IOPATH MULTSIGNIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH MULTSIGNIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH MULTSIGNIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH MULTSIGNIN P (0.246::0.633)(0.567::1.518)) + (IOPATH MULTSIGNIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PCOUT (0.267::0.716)(0.611::1.713)) + (IOPATH PCIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH PCIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH PCIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH PCIN P (0.246::0.633)(0.567::1.518)) + (IOPATH PCIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PCOUT (0.267::0.716)(0.611::1.713)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.383::0.457)(0.437::0.688)) + (IOPATH CLK CARRYOUT (0.126::0.182)(0.308::0.415)) + (IOPATH CLK MULTSIGNOUT (0.356::0.434)(0.386::0.478)) + (IOPATH CLK OVERFLOW (0.144::0.318)(0.319::0.700)) + (IOPATH CLK P (0.126::0.192)(0.304::0.434)) + (IOPATH CLK PATTERNBDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PATTERNDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PCOUT (0.400::0.434)(0.426::0.478)) + (IOPATH CLK UNDERFLOW (0.136::0.233)(0.302::0.525)) + ) + ) + (TIMINGCHECK + (HOLD CEP (posedge CLK) (-0.524::0.005)) + (SETUP CEP (posedge CLK) (-0.005::0.524)) + (HOLD RSTP (posedge CLK) (-0.347::0.006)) + (SETUP RSTP (posedge CLK) (-0.006::0.347)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.028::-0.256)) + (SETUP CARRYCASCIN (posedge CLK) (0.256::1.028)) + (HOLD MULTSIGNIN (posedge CLK) (-1.400::-0.215)) + (SETUP MULTSIGNIN (posedge CLK) (0.215::1.400)) + (HOLD PCIN (posedge CLK) (-1.400::-0.215)) + (SETUP PCIN (posedge CLK) (0.215::1.400)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.420::-0.325)) + (SETUP CARRYCASCIN (posedge CLK) (0.325::1.420)) + (HOLD MULTSIGNIN (posedge CLK) (-1.792::-0.285)) + (SETUP MULTSIGNIN (posedge CLK) (0.285::1.792)) + (HOLD PCIN (posedge CLK) (-1.792::-0.285)) + (SETUP PCIN (posedge CLK) (0.285::1.792)) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + ) + ) + ) +) \ No newline at end of file diff --git a/zynq7/timings/DSP_R.sdf b/zynq7/timings/DSP_R.sdf new file mode 100644 index 0000000..e23a6ff --- /dev/null +++ b/zynq7/timings/DSP_R.sdf @@ -0,0 +1,1881 @@ + +(DELAYFILE + (SDFVERSION "3.0") + (TIMESCALE 1ns) + + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN ACOUT (0.132::0.185)(0.317::0.521)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A ACOUT (0.219::0.303)(0.473::0.723)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_1_AREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ACASCREG_2_AREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK ACOUT (0.493::0.509)(0.612::0.864)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::2.181)(0.753::5.329)) + (IOPATH ACIN CARRYOUT (0.313::2.046)(0.743::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.324::2.053)(0.731::4.958)) + (IOPATH ACIN P (0.320::2.055)(0.754::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PATTERNDETECT (0.360::2.252)(0.839::5.564)) + (IOPATH ACIN PCOUT (0.341::2.139)(0.797::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.565::2.181)(1.328::5.329)) + (IOPATH ACIN CARRYOUT (0.550::2.046)(1.317::4.975)) + (IOPATH ACIN MULTSIGNOUT (0.562::2.053)(1.307::4.958)) + (IOPATH ACIN P (0.556::2.055)(1.329::4.998)) + (IOPATH ACIN PATTERNBDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PATTERNDETECT (0.598::2.252)(1.414::5.564)) + (IOPATH ACIN PCOUT (0.579::2.139)(1.372::5.194)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-4.881::-0.977)) + (SETUP ACIN (posedge CLK) (0.977::4.881)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-5.272::-1.047)) + (SETUP ACIN (posedge CLK) (1.047::5.272)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.087::-0.232)) + (SETUP ACIN (posedge CLK) (0.232::3.087)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::2.298)(0.908::5.531)) + (IOPATH A CARRYOUT (0.397::2.162)(0.900::5.177)) + (IOPATH A MULTSIGNOUT (0.410::2.170)(0.887::5.159)) + (IOPATH A P (0.404::2.173)(0.911::5.201)) + (IOPATH A PATTERNBDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PATTERNDETECT (0.445::2.368)(0.996::5.767)) + (IOPATH A PCOUT (0.426::2.256)(0.952::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.653::2.298)(1.484::5.531)) + (IOPATH A CARRYOUT (0.637::2.162)(1.474::5.177)) + (IOPATH A MULTSIGNOUT (0.649::2.170)(1.462::5.159)) + (IOPATH A P (0.643::2.173)(1.485::5.201)) + (IOPATH A PATTERNBDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PATTERNDETECT (0.685::2.368)(1.572::5.767)) + (IOPATH A PCOUT (0.666::2.256)(1.528::5.396)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-0.558)) + (SETUP A (posedge CLK) (0.558::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-0.627)) + (SETUP A (posedge CLK) (0.627::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.081::-1.134)) + (SETUP A (posedge CLK) (1.134::5.081)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.474::-1.203)) + (SETUP A (posedge CLK) (1.203::5.474)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.288::-0.388)) + (SETUP A (posedge CLK) (0.388::3.288)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::2.359)(1.076::5.700)) + (IOPATH CLK CARRYOUT (0.483::2.224)(1.066::5.346)) + (IOPATH CLK MULTSIGNOUT (0.493::2.231)(1.055::5.329)) + (IOPATH CLK P (0.490::2.234)(1.077::5.368)) + (IOPATH CLK PATTERNBDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PATTERNDETECT (0.530::2.429)(1.163::5.934)) + (IOPATH CLK PCOUT (0.511::2.317)(1.120::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_AREG_2_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.718::2.359)(1.563::5.700)) + (IOPATH CLK CARRYOUT (0.703::2.224)(1.554::5.346)) + (IOPATH CLK MULTSIGNOUT (0.713::2.231)(1.543::5.329)) + (IOPATH CLK P (0.709::2.234)(1.566::5.368)) + (IOPATH CLK PATTERNBDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PATTERNDETECT (0.750::2.429)(1.650::5.934)) + (IOPATH CLK PCOUT (0.731::2.317)(1.609::5.565)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH A P (0.587::2.142)(1.346::5.070)) + (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400)) + (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046)) + (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029)) + (IOPATH A P (0.587::2.142)(1.346::5.070)) + (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636)) + (IOPATH A PCOUT (0.580::2.133)(1.334::5.046)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.951::-0.994)) + (SETUP A (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.342::-1.063)) + (SETUP A (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.951::-0.994)) + (SETUP A (posedge CLK) (0.994::4.951)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-5.342::-1.063)) + (SETUP A (posedge CLK) (1.063::5.342)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.158::-0.249)) + (SETUP A (posedge CLK) (0.249::3.158)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.589::2.331)(1.330::5.615)) + (IOPATH INMODE CARRYOUT (0.573::2.195)(1.321::5.261)) + (IOPATH INMODE MULTSIGNOUT (0.586::2.204)(1.309::5.243)) + (IOPATH INMODE P (0.580::2.205)(1.332::5.283)) + (IOPATH INMODE PATTERNBDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PATTERNDETECT (0.621::2.401)(1.417::5.849)) + (IOPATH INMODE PCOUT (0.602::2.289)(1.376::5.480)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.165::-0.980)) + (SETUP INMODE (posedge CLK) (0.980::5.165)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-5.557::-1.049)) + (SETUP INMODE (posedge CLK) (1.049::5.557)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.372::-0.236)) + (SETUP INMODE (posedge CLK) (0.236::3.372)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_0_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.676::2.429)(1.489::5.801)) + (IOPATH CLK CARRYOUT (0.660::2.293)(1.478::5.448)) + (IOPATH CLK MULTSIGNOUT (0.672::2.303)(1.467::5.429)) + (IOPATH CLK P (0.667::2.304)(1.490::5.470)) + (IOPATH CLK PATTERNBDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PATTERNDETECT (0.708::2.500)(1.574::6.035)) + (IOPATH CLK PCOUT (0.688::2.387)(1.533::5.666)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEAD (posedge CLK) (-0.426::-0.038)) + (SETUP CEAD (posedge CLK) (0.038::0.426)) + (HOLD RSTD (posedge CLK) (-0.589::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.589)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.555::-0.034)) + (SETUP ACIN (posedge CLK) (0.034::1.555)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_AREG_0_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.756::-0.191)) + (SETUP A (posedge CLK) (0.191::1.756)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_DREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD D (posedge CLK) (-1.626::-0.051)) + (SETUP D (posedge CLK) (0.051::1.626)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_INMODEREG_0") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.089::-0.036)) + (SETUP INMODE (posedge CLK) (0.036::2.089)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ADREG_1_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.581::1.714)(1.277::4.014)) + (IOPATH CLK CARRYOUT (0.565::1.580)(1.267::3.661)) + (IOPATH CLK MULTSIGNOUT (0.578::1.587)(1.257::3.643)) + (IOPATH CLK P (0.572::1.589)(1.279::3.684)) + (IOPATH CLK PATTERNBDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PATTERNDETECT (0.612::1.786)(1.364::4.249)) + (IOPATH CLK PCOUT (0.593::1.672)(1.322::3.879)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ALUMODE CARRYCASCOUT (0.417::1.051)(0.917::2.427)) + (IOPATH ALUMODE CARRYOUT (0.401::0.916)(0.907::2.074)) + (IOPATH ALUMODE MULTSIGNOUT (0.413::0.925)(0.895::2.055)) + (IOPATH ALUMODE P (0.407::0.927)(0.918::2.098)) + (IOPATH ALUMODE PATTERNBDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PATTERNDETECT (0.395::1.038)(0.853::2.423)) + (IOPATH ALUMODE PCOUT (0.429::1.010)(0.961::2.292)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-1.978::-0.566)) + (SETUP ALUMODE (posedge CLK) (0.566::1.978)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-2.369::-0.635)) + (SETUP ALUMODE (posedge CLK) (0.635::2.369)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ALUMODE (posedge CLK) (-0.246::0.208)) + (SETUP ALUMODE (posedge CLK) (-0.208::0.246)) + (HOLD CEALUMODE (posedge CLK) (-0.411::0.121)) + (SETUP CEALUMODE (posedge CLK) (-0.121::0.411)) + (HOLD RSTALUMODE (posedge CLK) (-0.411::0.074)) + (SETUP RSTALUMODE (posedge CLK) (-0.074::0.411)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_ALUMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.062)(1.036::2.385)) + (IOPATH CLK CARRYOUT (0.458::0.926)(1.025::2.031)) + (IOPATH CLK MULTSIGNOUT (0.470::0.934)(1.014::2.013)) + (IOPATH CLK P (0.465::0.935)(1.037::2.054)) + (IOPATH CLK PATTERNBDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PATTERNDETECT (0.506::1.132)(1.121::2.620)) + (IOPATH CLK PCOUT (0.486::1.018)(1.080::2.251)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::1.650)(0.753::3.969)) + (IOPATH ACIN CARRYOUT (0.313::1.514)(0.743::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.324::1.523)(0.731::3.598)) + (IOPATH ACIN P (0.320::1.526)(0.754::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PATTERNDETECT (0.360::1.722)(0.839::4.205)) + (IOPATH ACIN PCOUT (0.341::1.608)(0.797::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.531::1.650)(1.233::3.969)) + (IOPATH ACIN CARRYOUT (0.516::1.514)(1.223::3.615)) + (IOPATH ACIN MULTSIGNOUT (0.527::1.523)(1.212::3.598)) + (IOPATH ACIN P (0.521::1.526)(1.235::3.639)) + (IOPATH ACIN PATTERNBDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PATTERNDETECT (0.563::1.722)(1.320::4.205)) + (IOPATH ACIN PCOUT (0.543::1.608)(1.278::3.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.520::-0.883)) + (SETUP ACIN (posedge CLK) (0.883::3.520)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-3.912::-0.952)) + (SETUP ACIN (posedge CLK) (0.952::3.912)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.727::-0.138)) + (SETUP ACIN (posedge CLK) (0.138::1.727)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH ACIN CARRYCASCOUT (0.328::0.881)(0.753::2.205)) + (IOPATH ACIN CARRYOUT (0.313::0.745)(0.743::1.852)) + (IOPATH ACIN MULTSIGNOUT (0.324::0.754)(0.731::1.834)) + (IOPATH ACIN P (0.320::0.756)(0.754::1.874)) + (IOPATH ACIN PATTERNBDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PATTERNDETECT (0.360::0.953)(0.839::2.440)) + (IOPATH ACIN PCOUT (0.341::0.838)(0.797::2.071)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-1.755::-0.401)) + (SETUP ACIN (posedge CLK) (0.401::1.755)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-2.148::-0.471)) + (SETUP ACIN (posedge CLK) (0.471::2.148)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::1.767)(0.908::4.171)) + (IOPATH A CARRYOUT (0.397::1.632)(0.900::3.818)) + (IOPATH A MULTSIGNOUT (0.410::1.639)(0.887::3.799)) + (IOPATH A P (0.404::1.642)(0.911::3.841)) + (IOPATH A PATTERNBDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PATTERNDETECT (0.445::1.839)(0.996::4.406)) + (IOPATH A PCOUT (0.426::1.725)(0.952::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.618::1.767)(1.389::4.171)) + (IOPATH A CARRYOUT (0.603::1.632)(1.380::3.818)) + (IOPATH A MULTSIGNOUT (0.614::1.639)(1.368::3.799)) + (IOPATH A P (0.609::1.642)(1.391::3.841)) + (IOPATH A PATTERNBDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PATTERNDETECT (0.650::1.839)(1.476::4.406)) + (IOPATH A PCOUT (0.631::1.725)(1.434::4.036)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-0.558)) + (SETUP A (posedge CLK) (0.558::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-0.627)) + (SETUP A (posedge CLK) (0.627::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-3.722::-1.040)) + (SETUP A (posedge CLK) (1.040::3.722)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-4.114::-1.109)) + (SETUP A (posedge CLK) (1.109::4.114)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.928::-0.294)) + (SETUP A (posedge CLK) (0.294::1.928)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH A CARRYCASCOUT (0.414::0.997)(0.908::2.407)) + (IOPATH A CARRYOUT (0.397::0.863)(0.900::2.053)) + (IOPATH A MULTSIGNOUT (0.410::0.870)(0.887::2.036)) + (IOPATH A P (0.404::0.873)(0.911::2.077)) + (IOPATH A PATTERNBDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PATTERNDETECT (0.445::1.069)(0.996::2.643)) + (IOPATH A PCOUT (0.426::0.956)(0.952::2.271)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-1.958::-0.558)) + (SETUP A (posedge CLK) (0.558::1.958)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_0_A_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-2.349::-0.627)) + (SETUP A (posedge CLK) (0.627::2.349)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEA1 (posedge CLK) (-0.497::0.035)) + (SETUP CEA1 (posedge CLK) (-0.035::0.497)) + (HOLD CEA2 (posedge CLK) (-0.497::0.035)) + (SETUP CEA2 (posedge CLK) (-0.035::0.497)) + (HOLD RSTA (posedge CLK) (-0.507::0.112)) + (SETUP RSTA (posedge CLK) (-0.112::0.507)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD ACIN (posedge CLK) (-0.319::0.139)) + (SETUP ACIN (posedge CLK) (-0.139::0.319)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_A_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD A (posedge CLK) (-0.362::0.139)) + (SETUP A (posedge CLK) (-0.139::0.362)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.828)(1.076::4.339)) + (IOPATH CLK CARRYOUT (0.483::1.692)(1.066::3.986)) + (IOPATH CLK MULTSIGNOUT (0.493::1.700)(1.055::3.969)) + (IOPATH CLK P (0.490::1.702)(1.077::4.009)) + (IOPATH CLK PATTERNBDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PATTERNDETECT (0.530::1.898)(1.163::4.575)) + (IOPATH CLK PCOUT (0.511::1.786)(1.120::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.684::1.828)(1.469::4.339)) + (IOPATH CLK CARRYOUT (0.667::1.692)(1.459::3.986)) + (IOPATH CLK MULTSIGNOUT (0.680::1.700)(1.448::3.969)) + (IOPATH CLK P (0.674::1.702)(1.471::4.009)) + (IOPATH CLK PATTERNBDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PATTERNDETECT (0.715::1.898)(1.556::4.575)) + (IOPATH CLK PCOUT (0.696::1.786)(1.513::4.206)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_AREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.498::1.072)(1.076::2.545)) + (IOPATH CLK CARRYOUT (0.483::0.936)(1.066::2.191)) + (IOPATH CLK MULTSIGNOUT (0.493::0.945)(1.055::2.175)) + (IOPATH CLK P (0.490::0.946)(1.077::2.215)) + (IOPATH CLK PATTERNBDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PATTERNDETECT (0.530::1.143)(1.163::2.781)) + (IOPATH CLK PCOUT (0.511::1.030)(1.120::2.411)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN BCOUT (0.146::0.180)(0.348::0.490)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_0_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B BCOUT (0.235::0.308)(0.515::0.735)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_1_BREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BCASCREG_2_BREG_2") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK BCOUT (0.505::0.516)(0.635::0.833)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::1.572)(0.749::3.741)) + (IOPATH BCIN CARRYOUT (0.309::1.436)(0.738::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.322::1.445)(0.728::3.369)) + (IOPATH BCIN P (0.316::1.447)(0.750::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PATTERNDETECT (0.358::1.643)(0.835::3.976)) + (IOPATH BCIN PCOUT (0.339::1.529)(0.793::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.491::1.572)(1.143::3.741)) + (IOPATH BCIN CARRYOUT (0.476::1.436)(1.134::3.387)) + (IOPATH BCIN MULTSIGNOUT (0.487::1.445)(1.122::3.369)) + (IOPATH BCIN P (0.481::1.447)(1.145::3.410)) + (IOPATH BCIN PATTERNBDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PATTERNDETECT (0.523::1.643)(1.230::3.976)) + (IOPATH BCIN PCOUT (0.504::1.529)(1.188::3.606)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.290::-0.794)) + (SETUP BCIN (posedge CLK) (0.794::3.290)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-3.684::-0.863)) + (SETUP BCIN (posedge CLK) (0.863::3.684)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.498::-0.049)) + (SETUP BCIN (posedge CLK) (0.049::1.498)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH BCIN CARRYCASCOUT (0.325::0.864)(0.749::2.141)) + (IOPATH BCIN CARRYOUT (0.309::0.728)(0.738::1.788)) + (IOPATH BCIN MULTSIGNOUT (0.322::0.736)(0.728::1.771)) + (IOPATH BCIN P (0.316::0.737)(0.750::1.812)) + (IOPATH BCIN PATTERNBDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PATTERNDETECT (0.358::0.934)(0.835::2.377)) + (IOPATH BCIN PCOUT (0.339::0.821)(0.793::2.006)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-1.692::-0.399)) + (SETUP BCIN (posedge CLK) (0.399::1.692)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_CASCADE_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-2.085::-0.468)) + (SETUP BCIN (posedge CLK) (0.468::2.085)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::1.699)(0.914::3.986)) + (IOPATH B CARRYOUT (0.400::1.564)(0.904::3.633)) + (IOPATH B MULTSIGNOUT (0.411::1.572)(0.893::3.615)) + (IOPATH B P (0.405::1.575)(0.915::3.656)) + (IOPATH B PATTERNBDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PATTERNDETECT (0.447::1.771)(1.000::4.221)) + (IOPATH B PCOUT (0.428::1.658)(0.958::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.580::1.699)(1.309::3.986)) + (IOPATH B CARRYOUT (0.565::1.564)(1.299::3.633)) + (IOPATH B MULTSIGNOUT (0.577::1.572)(1.288::3.615)) + (IOPATH B P (0.571::1.575)(1.310::3.656)) + (IOPATH B PATTERNBDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PATTERNDETECT (0.612::1.771)(1.396::4.221)) + (IOPATH B PCOUT (0.593::1.658)(1.354::3.851)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.564)) + (SETUP B (posedge CLK) (0.564::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-0.633)) + (SETUP B (posedge CLK) (0.633::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.536::-0.959)) + (SETUP B (posedge CLK) (0.959::3.536)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_0_PREG_1_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-3.929::-1.028)) + (SETUP B (posedge CLK) (1.028::3.929)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_MREG_1_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.743::-0.214)) + (SETUP B (posedge CLK) (0.214::1.743)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH B CARRYCASCOUT (0.415::0.991)(0.914::2.387)) + (IOPATH B CARRYOUT (0.400::0.855)(0.904::2.033)) + (IOPATH B MULTSIGNOUT (0.411::0.864)(0.893::2.017)) + (IOPATH B P (0.405::0.865)(0.915::2.057)) + (IOPATH B PATTERNBDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PATTERNDETECT (0.447::1.062)(1.000::2.623)) + (IOPATH B PCOUT (0.428::0.948)(0.958::2.252)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-1.938::-0.564)) + (SETUP B (posedge CLK) (0.564::1.938)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_0_B_INPUT_DIRECT_PREG_1_USE_MULT_NONE_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-2.331::-0.633)) + (SETUP B (posedge CLK) (0.633::2.331)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_1_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEB1 (posedge CLK) (-0.514::0.102)) + (SETUP CEB1 (posedge CLK) (-0.102::0.514)) + (HOLD CEB2 (posedge CLK) (-0.514::0.102)) + (SETUP CEB2 (posedge CLK) (-0.102::0.514)) + (HOLD RSTB (posedge CLK) (-0.543::0.144)) + (SETUP RSTB (posedge CLK) (-0.144::0.543)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_CASCADE") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD BCIN (posedge CLK) (-0.352::0.178)) + (SETUP BCIN (posedge CLK) (-0.178::0.352)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_B_INPUT_DIRECT") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD B (posedge CLK) (-0.450::0.178)) + (SETUP B (posedge CLK) (-0.178::0.450)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.766)(1.068::4.143)) + (IOPATH CLK CARRYOUT (0.481::1.630)(1.059::3.790)) + (IOPATH CLK MULTSIGNOUT (0.492::1.638)(1.046::3.772)) + (IOPATH CLK P (0.487::1.641)(1.070::3.813)) + (IOPATH CLK PATTERNBDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PATTERNDETECT (0.529::1.837)(1.156::4.378)) + (IOPATH CLK PCOUT (0.510::1.723)(1.114::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.639::1.766)(1.376::4.143)) + (IOPATH CLK CARRYOUT (0.623::1.630)(1.366::3.790)) + (IOPATH CLK MULTSIGNOUT (0.635::1.638)(1.355::3.772)) + (IOPATH CLK P (0.630::1.641)(1.378::3.813)) + (IOPATH CLK PATTERNBDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PATTERNDETECT (0.671::1.837)(1.462::4.378)) + (IOPATH CLK PCOUT (0.651::1.723)(1.421::4.008)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_BREG_2_PREG_0_USE_MULT_NONE") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.496::1.062)(1.068::2.522)) + (IOPATH CLK CARRYOUT (0.481::0.927)(1.059::2.168)) + (IOPATH CLK MULTSIGNOUT (0.492::0.934)(1.046::2.150)) + (IOPATH CLK P (0.487::0.936)(1.070::2.191)) + (IOPATH CLK PATTERNBDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PATTERNDETECT (0.529::1.133)(1.156::2.756)) + (IOPATH CLK PCOUT (0.510::1.020)(1.114::2.387)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYIN CARRYCASCOUT (0.361::0.723)(0.830::1.746)) + (IOPATH CARRYIN CARRYOUT (0.346::0.587)(0.820::1.393)) + (IOPATH CARRYIN MULTSIGNOUT (0.358::0.595)(0.809::1.376)) + (IOPATH CARRYIN P (0.352::0.596)(0.831::1.416)) + (IOPATH CARRYIN PATTERNBDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PATTERNDETECT (0.395::0.792)(0.917::1.982)) + (IOPATH CARRYIN PCOUT (0.375::0.680)(0.875::1.613)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.298::-0.480)) + (SETUP CARRYIN (posedge CLK) (0.480::1.298)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-1.690::-0.549)) + (SETUP CARRYIN (posedge CLK) (0.549::1.690)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYIN (posedge CLK) (-0.299::0.151)) + (SETUP CARRYIN (posedge CLK) (-0.151::0.299)) + (HOLD CECARRYIN (posedge CLK) (-0.665::-0.049)) + (SETUP CECARRYIN (posedge CLK) (0.049::0.665)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.284::0.123)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.123::0.284)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.461::0.885)(1.032::2.094)) + (IOPATH CLK CARRYOUT (0.445::0.749)(1.023::1.740)) + (IOPATH CLK MULTSIGNOUT (0.458::0.757)(1.012::1.723)) + (IOPATH CLK P (0.452::0.758)(1.034::1.764)) + (IOPATH CLK PATTERNBDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PATTERNDETECT (0.492::0.956)(1.119::2.330)) + (IOPATH CLK PCOUT (0.473::0.841)(1.077::1.958)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYINSEL CARRYCASCOUT (0.384::0.919)(0.856::2.241)) + (IOPATH CARRYINSEL CARRYOUT (0.369::0.784)(0.846::1.888)) + (IOPATH CARRYINSEL MULTSIGNOUT (0.379::0.791)(0.835::1.870)) + (IOPATH CARRYINSEL P (0.375::0.794)(0.857::1.910)) + (IOPATH CARRYINSEL PATTERNBDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PATTERNDETECT (0.416::0.990)(0.943::2.476)) + (IOPATH CARRYINSEL PCOUT (0.396::0.878)(0.900::2.106)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-1.793::-0.506)) + (SETUP CARRYINSEL (posedge CLK) (0.506::1.793)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-2.184::-0.575)) + (SETUP CARRYINSEL (posedge CLK) (0.575::2.184)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYINSEL (posedge CLK) (-0.208::0.174)) + (SETUP CARRYINSEL (posedge CLK) (-0.174::0.208)) + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CARRYINSELREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.455::0.981)(1.012::2.257)) + (IOPATH CLK CARRYOUT (0.440::0.844)(1.002::1.903)) + (IOPATH CLK MULTSIGNOUT (0.452::0.853)(0.991::1.884)) + (IOPATH CLK P (0.446::0.854)(1.014::1.927)) + (IOPATH CLK PATTERNBDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PATTERNDETECT (0.487::1.050)(1.099::2.493)) + (IOPATH CLK PCOUT (0.468::0.938)(1.057::2.122)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH C CARRYCASCOUT (0.317::0.868)(0.705::2.150)) + (IOPATH C CARRYOUT (0.302::0.732)(0.696::1.797)) + (IOPATH C MULTSIGNOUT (0.314::0.742)(0.684::1.779)) + (IOPATH C P (0.308::0.743)(0.707::1.820)) + (IOPATH C PATTERNBDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PATTERNDETECT (0.350::0.939)(0.792::2.386)) + (IOPATH C PCOUT (0.331::0.826)(0.750::2.016)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-1.701::-0.355)) + (SETUP C (posedge CLK) (0.355::1.701)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-2.093::-0.424)) + (SETUP C (posedge CLK) (0.424::2.093)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD C (posedge CLK) (-0.233::0.210)) + (SETUP C (posedge CLK) (-0.210::0.233)) + (HOLD CEC (posedge CLK) (-0.414::0.124)) + (SETUP CEC (posedge CLK) (-0.124::0.414)) + (HOLD RSTC (posedge CLK) (-0.084::0.119)) + (SETUP RSTC (posedge CLK) (-0.119::0.084)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_CREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.487::1.077)(1.080::2.621)) + (IOPATH CLK CARRYOUT (0.472::0.941)(1.070::2.268)) + (IOPATH CLK MULTSIGNOUT (0.484::0.950)(1.059::2.251)) + (IOPATH CLK P (0.478::0.953)(1.082::2.291)) + (IOPATH CLK PATTERNBDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PATTERNDETECT (0.520::1.148)(1.166::2.857)) + (IOPATH CLK PCOUT (0.501::1.035)(1.125::2.488)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_DREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CED (posedge CLK) (-0.513::-0.054)) + (SETUP CED (posedge CLK) (0.054::0.513)) + (HOLD D (posedge CLK) (-0.413::0.265)) + (SETUP D (posedge CLK) (-0.265::0.413)) + (HOLD RSTD (posedge CLK) (-0.587::0.083)) + (SETUP RSTD (posedge CLK) (-0.083::0.587)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.606::1.800)(1.341::4.254)) + (IOPATH INMODE CARRYOUT (0.591::1.665)(1.332::3.900)) + (IOPATH INMODE MULTSIGNOUT (0.603::1.672)(1.320::3.883)) + (IOPATH INMODE P (0.597::1.675)(1.343::3.923)) + (IOPATH INMODE PATTERNBDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PATTERNDETECT (0.639::1.871)(1.428::4.489)) + (IOPATH INMODE PCOUT (0.619::1.759)(1.386::4.119)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_0_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH INMODE CARRYCASCOUT (0.592::1.719)(1.310::4.085)) + (IOPATH INMODE CARRYOUT (0.577::1.583)(1.302::3.732)) + (IOPATH INMODE MULTSIGNOUT (0.588::1.591)(1.289::3.715)) + (IOPATH INMODE P (0.584::1.593)(1.313::3.755)) + (IOPATH INMODE PATTERNBDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PATTERNDETECT (0.624::1.789)(1.398::4.321)) + (IOPATH INMODE PCOUT (0.605::1.676)(1.355::3.950)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-3.805::-0.991)) + (SETUP INMODE (posedge CLK) (0.991::3.805)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_0_PREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-4.196::-1.061)) + (SETUP INMODE (posedge CLK) (1.061::4.196)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_0_MREG_1_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD INMODE (posedge CLK) (-2.012::-0.245)) + (SETUP INMODE (posedge CLK) (0.245::2.012)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEINMODE (posedge CLK) (-0.603::0.205)) + (SETUP CEINMODE (posedge CLK) (-0.205::0.603)) + (HOLD INMODE (posedge CLK) (-0.449::0.186)) + (SETUP INMODE (posedge CLK) (-0.186::0.449)) + (HOLD RSTINMODE (posedge CLK) (-0.686::0.074)) + (SETUP RSTINMODE (posedge CLK) (-0.074::0.686)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_INMODEREG_1_MREG_0_PREG_0_USE_DPORT_FALSE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.687::1.898)(1.503::4.441)) + (IOPATH CLK CARRYOUT (0.672::1.764)(1.493::4.088)) + (IOPATH CLK MULTSIGNOUT (0.684::1.771)(1.481::4.070)) + (IOPATH CLK P (0.679::1.773)(1.504::4.111)) + (IOPATH CLK PATTERNBDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PATTERNDETECT (0.719::1.970)(1.590::4.676)) + (IOPATH CLK PCOUT (0.700::1.856)(1.548::4.307)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CEM (posedge CLK) (-0.266::0.224)) + (SETUP CEM (posedge CLK) (-0.224::0.266)) + (HOLD RSTALLCARRYIN (posedge CLK) (-0.287::0.120)) + (SETUP RSTALLCARRYIN (posedge CLK) (-0.120::0.287)) + (HOLD RSTM (posedge CLK) (-0.270::0.274)) + (SETUP RSTM (posedge CLK) (-0.274::0.270)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_MREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.473::1.045)(1.051::2.634)) + (IOPATH CLK CARRYOUT (0.458::0.909)(1.043::2.282)) + (IOPATH CLK MULTSIGNOUT (0.470::0.918)(1.030::2.263)) + (IOPATH CLK P (0.465::0.919)(1.053::2.305)) + (IOPATH CLK PATTERNBDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PATTERNDETECT (0.505::1.116)(1.139::2.870)) + (IOPATH CLK PCOUT (0.486::1.003)(1.095::2.500)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH OPMODE CARRYCASCOUT (0.446::1.127)(0.991::2.657)) + (IOPATH OPMODE CARRYOUT (0.432::0.993)(0.981::2.304)) + (IOPATH OPMODE MULTSIGNOUT (0.443::1.000)(0.970::2.286)) + (IOPATH OPMODE P (0.437::1.003)(0.993::2.326)) + (IOPATH OPMODE PATTERNBDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PATTERNDETECT (0.479::1.199)(1.077::2.892)) + (IOPATH OPMODE PCOUT (0.460::1.086)(1.036::2.522)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.209::-0.640)) + (SETUP OPMODE (posedge CLK) (0.640::2.209)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_0_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD OPMODE (posedge CLK) (-2.600::-0.710)) + (SETUP OPMODE (posedge CLK) (0.710::2.600)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CECTRL (posedge CLK) (-0.421::0.123)) + (SETUP CECTRL (posedge CLK) (-0.123::0.421)) + (HOLD OPMODE (posedge CLK) (-0.449::0.223)) + (SETUP OPMODE (posedge CLK) (-0.223::0.449)) + (HOLD RSTCTRL (posedge CLK) (-0.469::0.076)) + (SETUP RSTCTRL (posedge CLK) (-0.076::0.469)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_OPMODEREG_1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.492::1.127)(1.093::2.562)) + (IOPATH CLK CARRYOUT (0.477::0.991)(1.084::2.208)) + (IOPATH CLK MULTSIGNOUT (0.489::1.000)(1.071::2.189)) + (IOPATH CLK P (0.483::1.002)(1.095::2.231)) + (IOPATH CLK PATTERNBDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PATTERNDETECT (0.524::1.199)(1.181::2.796)) + (IOPATH CLK PCOUT (0.505::1.085)(1.139::2.426)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_0") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CARRYCASCIN CARRYCASCOUT (0.271::0.615)(0.605::1.478)) + (IOPATH CARRYCASCIN CARRYOUT (0.255::0.479)(0.596::1.124)) + (IOPATH CARRYCASCIN MULTSIGNOUT (0.267::0.487)(0.585::1.106)) + (IOPATH CARRYCASCIN P (0.262::0.490)(0.607::1.147)) + (IOPATH CARRYCASCIN PATTERNBDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PATTERNDETECT (0.302::0.686)(0.692::1.712)) + (IOPATH CARRYCASCIN PCOUT (0.283::0.573)(0.650::1.343)) + (IOPATH MULTSIGNIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH MULTSIGNIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH MULTSIGNIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH MULTSIGNIN P (0.246::0.633)(0.567::1.518)) + (IOPATH MULTSIGNIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH MULTSIGNIN PCOUT (0.267::0.716)(0.611::1.713)) + (IOPATH PCIN CARRYCASCOUT (0.255::0.758)(0.565::1.848)) + (IOPATH PCIN CARRYOUT (0.239::0.622)(0.556::1.494)) + (IOPATH PCIN MULTSIGNOUT (0.252::0.631)(0.543::1.478)) + (IOPATH PCIN P (0.246::0.633)(0.567::1.518)) + (IOPATH PCIN PATTERNBDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PATTERNDETECT (0.287::0.830)(0.653::2.084)) + (IOPATH PCIN PCOUT (0.267::0.716)(0.611::1.713)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.383::0.457)(0.437::0.688)) + (IOPATH CLK CARRYOUT (0.126::0.182)(0.308::0.415)) + (IOPATH CLK MULTSIGNOUT (0.356::0.434)(0.386::0.478)) + (IOPATH CLK OVERFLOW (0.144::0.318)(0.319::0.700)) + (IOPATH CLK P (0.126::0.192)(0.304::0.434)) + (IOPATH CLK PATTERNBDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PATTERNDETECT (0.132::0.302)(0.290::0.662)) + (IOPATH CLK PCOUT (0.400::0.434)(0.426::0.478)) + (IOPATH CLK UNDERFLOW (0.136::0.233)(0.302::0.525)) + ) + ) + (TIMINGCHECK + (HOLD CEP (posedge CLK) (-0.524::0.005)) + (SETUP CEP (posedge CLK) (-0.005::0.524)) + (HOLD RSTP (posedge CLK) (-0.347::0.006)) + (SETUP RSTP (posedge CLK) (-0.006::0.347)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_NO_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.028::-0.256)) + (SETUP CARRYCASCIN (posedge CLK) (0.256::1.028)) + (HOLD MULTSIGNIN (posedge CLK) (-1.400::-0.215)) + (SETUP MULTSIGNIN (posedge CLK) (0.215::1.400)) + (HOLD PCIN (posedge CLK) (-1.400::-0.215)) + (SETUP PCIN (posedge CLK) (0.215::1.400)) + ) + ) + (CELL + (CELLTYPE "DSP48E1_PREG_1_USE_PATTERN_DETECT_PATDET") + (INSTANCE DSP48E1) + (TIMINGCHECK + (HOLD CARRYCASCIN (posedge CLK) (-1.420::-0.325)) + (SETUP CARRYCASCIN (posedge CLK) (0.325::1.420)) + (HOLD MULTSIGNIN (posedge CLK) (-1.792::-0.285)) + (SETUP MULTSIGNIN (posedge CLK) (0.285::1.792)) + (HOLD PCIN (posedge CLK) (-1.792::-0.285)) + (SETUP PCIN (posedge CLK) (0.285::1.792)) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297)) + (IOPATH CLK P (0.696::2.251)(1.533::5.320)) + (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + ) + ) + ) + (CELL + (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY") + (INSTANCE DSP48E1) + (DELAY + (ABSOLUTE + (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650)) + (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279)) + (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885)) + (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885)) + ) + ) + ) +) \ No newline at end of file diff --git a/zynq7/timings/RIOI3_SING.sdf b/zynq7/timings/RIOI3_SING.sdf index 6bcce62..5e0c802 100644 --- a/zynq7/timings/RIOI3_SING.sdf +++ b/zynq7/timings/RIOI3_SING.sdf @@ -172,6 +172,232 @@ (RECOVERY SR (posedge CK) (0.518::0.596)) ) ) + (CELL + (CELLTYPE "ISERDESE2") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLKDIV Q1 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q2 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q3 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q4 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q5 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q6 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q7 (0.177::0.204)(0.568::0.653)) + (IOPATH CLKDIV Q8 (0.177::0.204)(0.568::0.653)) + (IOPATH OFB O (0.125::0.144)(0.327::0.376)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD OFB (posedge CLK) (-0.064::-0.072)) + (SETUP OFB (posedge CLK) (0.177::0.203)) + (HOLD OFB (posedge CLKB) (-0.064::-0.072)) + (SETUP OFB (posedge CLKB) (0.177::0.203)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_BOTH") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + (HOLD DDLY (posedge CLKB) (0.142::0.165)) + (SETUP DDLY (posedge CLKB) (-0.029::-0.034)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_IBUF") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + (HOLD D (posedge CLKB) (0.143::0.166)) + (SETUP D (posedge CLKB) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_IFD") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + (HOLD DDLY (posedge CLKB) (0.142::0.165)) + (SETUP DDLY (posedge CLKB) (0.142::0.165)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_DDR_IOBDELAY_NONE") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + (HOLD D (posedge CLKB) (0.143::0.166)) + (SETUP D (posedge CLKB) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD OFB (posedge CLK) (-0.064::-0.072)) + (SETUP OFB (posedge CLK) (0.177::0.203)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_BOTH") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_IBUF") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_IFD") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD DDLY (posedge CLK) (0.142::0.165)) + (SETUP DDLY (posedge CLK) (-0.029::-0.034)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_DATA_RATE_SDR_IOBDELAY_NONE") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD D (posedge CLK) (0.143::0.166)) + (SETUP D (posedge CLK) (-0.030::-0.035)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_INTERFACE_TYPE_NETWORKING") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD BITSLIP (posedge CLKDIV) (0.147::0.169)) + (SETUP BITSLIP (posedge CLKDIV) (0.017::0.019)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_INTERFACE_TYPE_OVERSAMPLE") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLK Q1 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q2 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q3 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q4 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q5 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q6 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q7 (0.187::0.215)(0.498::0.573)) + (IOPATH CLK Q8 (0.187::0.215)(0.498::0.573)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_BOTH") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH DDLY O (0.047::0.055)(0.120::0.138)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_IBUF") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH DDLY O (0.047::0.055)(0.120::0.138)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_IFD") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH D O (0.047::0.054)(0.112::0.129)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_IOBDELAY_NONE") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH D O (0.047::0.054)(0.112::0.129)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_NUM_CE_1") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD CE1 (posedge CLK) (-0.065::-0.053)) + (SETUP CE1 (posedge CLK) (0.419::0.713)) + (HOLD CE1 (posedge CLKB) (-0.065::-0.053)) + (SETUP CE1 (posedge CLKB) (0.419::0.713)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_NUM_CE_2") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD CE1 (posedge CLKDIV) (0.295::0.340)) + (SETUP CE1 (posedge CLKDIV) (-0.101::-0.088)) + (HOLD CE1 (posedge CLKDIVP) (0.115::0.132)) + (SETUP CE1 (posedge CLKDIVP) (0.047::0.054)) + (HOLD CE2 (posedge CLKDIV) (0.346::0.398)) + (SETUP CE2 (posedge CLKDIV) (-0.128::-0.112)) + (HOLD CE2 (posedge CLKDIVP) (0.128::0.147)) + (SETUP CE2 (posedge CLKDIVP) (0.016::0.018)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_SRTYPE_SYNC") + (INSTANCE ILOGICE3) + (TIMINGCHECK + (HOLD RST (posedge CLKDIV) (-0.174::-0.152)) + (SETUP RST (posedge CLKDIV) (0.450::0.517)) + (HOLD RST (posedge CLKDIVP) (-0.272::-0.237)) + (SETUP RST (posedge CLKDIVP) (0.667::0.767)) + ) + ) + (CELL + (CELLTYPE "ISERDESE2_TFB_USED_TRUE") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH TFB O (0.142::0.164)(0.398::0.457)) + ) + ) + ) + (CELL + (CELLTYPE "ISERDESE2DDR3_INTERFACE_TYPE_MEMORY") + (INSTANCE ILOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLKDIVP Q1 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q2 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q3 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q4 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q5 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q6 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q7 (0.130::0.150)(0.370::0.425)) + (IOPATH CLKDIVP Q8 (0.130::0.150)(0.370::0.425)) + ) + ) + ) (CELL (CELLTYPE "SELMUX2_1") (INSTANCE ILOGICE3) @@ -361,4 +587,126 @@ ) ) ) + (CELL + (CELLTYPE "OSERDESE2") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLK OFB (0.177::0.204)(0.449::0.472)) + (IOPATH CLK OQ (0.177::0.204)(0.449::0.472)) + (IOPATH CLK TFB (0.192::0.221)(0.480::0.552)) + (IOPATH CLK TQ (0.192::0.221)(0.480::0.552)) + ) + ) + (TIMINGCHECK + (HOLD D1 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D1 (posedge CLKDIV) (0.511::0.625)) + (HOLD D2 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D2 (posedge CLKDIV) (0.511::0.625)) + (HOLD D3 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D3 (posedge CLKDIV) (0.511::0.625)) + (HOLD D4 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D4 (posedge CLKDIV) (0.511::0.625)) + (HOLD D5 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D5 (posedge CLKDIV) (0.511::0.625)) + (HOLD D6 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D6 (posedge CLKDIV) (0.511::0.625)) + (HOLD D7 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D7 (posedge CLKDIV) (0.511::0.625)) + (HOLD D8 (posedge CLKDIV) (-0.073::-0.063)) + (SETUP D8 (posedge CLKDIV) (0.511::0.625)) + (HOLD OCE (posedge CLK) (-0.059::-0.051)) + (SETUP OCE (posedge CLK) (0.380::0.504)) + (HOLD TCE (posedge CLK) (-0.068::-0.060)) + (SETUP TCE (posedge CLK) (0.389::0.505)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_BUF") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH T1 TQ (0.350::0.403)(0.958::1.102)) + ) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_DDR_TRISTATE_WIDTH_1") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLK) (-0.302::-0.264)) + (SETUP T1 (posedge CLK) (0.697::0.873)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_DDR_TRISTATE_WIDTH_4") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T1 (posedge CLKDIV) (0.334::0.385)) + (HOLD T2 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T2 (posedge CLKDIV) (0.334::0.385)) + (HOLD T3 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T3 (posedge CLKDIV) (0.334::0.385)) + (HOLD T4 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T4 (posedge CLKDIV) (0.334::0.385)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_SDR_TRISTATE_WIDTH_1") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLK) (-0.302::-0.264)) + (SETUP T1 (posedge CLK) (0.697::0.873)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_DATA_RATE_TQ_SDR_TRISTATE_WIDTH_4") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD T1 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T1 (posedge CLKDIV) (0.334::0.385)) + (HOLD T2 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T2 (posedge CLKDIV) (0.334::0.385)) + (HOLD T3 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T3 (posedge CLKDIV) (0.334::0.385)) + (HOLD T4 (posedge CLKDIV) (-0.185::-0.161)) + (SETUP T4 (posedge CLKDIV) (0.334::0.385)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_SELFHEAL_TRUE") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH CLKDIV IOCLKGLITCH (0.196::0.226)(0.493::0.567)) + ) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_SRTYPE_SYNC") + (INSTANCE OLOGICE3) + (TIMINGCHECK + (HOLD RST (posedge CLKDIV) (-0.004::-0.004)) + (SETUP RST (posedge CLKDIV) (0.703::0.849)) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_TBYTE_CTL_TRUE") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH TBYTEIN TQ (0.000::0.000)(0.000::0.000)) + ) + ) + ) + (CELL + (CELLTYPE "OSERDESE2_TBYTE_SRC_TRUE") + (INSTANCE OLOGICE3) + (DELAY + (ABSOLUTE + (IOPATH T1 TBYTEOUT (0.000::0.000)(0.000::0.000)) + ) + ) + ) ) \ No newline at end of file